diff options
| author | Yuval Adam <yuv.adm@gmail.com> | 2014-06-29 12:34:32 +0300 |
|---|---|---|
| committer | Yuval Adam <yuv.adm@gmail.com> | 2014-06-29 12:34:32 +0300 |
| commit | c3e4c9a25c2910d2d66d52215b3406b13d5b23d5 (patch) | |
| tree | added370d1e356901f8579f076e3263fb0464db7 /boards/dk-tm4c129x/enet_uip | |
| parent | 990090a4cc9070837d31e66b58d40f0c3d038741 (diff) | |
Add more board models
Diffstat (limited to 'boards/dk-tm4c129x/enet_uip')
32 files changed, 5606 insertions, 0 deletions
diff --git a/boards/dk-tm4c129x/enet_uip/Makefile b/boards/dk-tm4c129x/enet_uip/Makefile new file mode 100644 index 0000000..f0c0525 --- /dev/null +++ b/boards/dk-tm4c129x/enet_uip/Makefile @@ -0,0 +1,106 @@ +#******************************************************************************
+#
+# Makefile - Rules for building the Ethernet with uIP.
+#
+# Copyright (c) 2013-2014 Texas Instruments Incorporated. All rights reserved.
+# Software License Agreement
+#
+# Texas Instruments (TI) is supplying this software for use solely and
+# exclusively on TI's microcontroller products. The software is owned by
+# TI and/or its suppliers, and is protected under applicable copyright
+# laws. You may not combine this software with "viral" open-source
+# software in order to form a larger program.
+#
+# THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
+# NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
+# NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+# A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
+# CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
+# DAMAGES, FOR ANY REASON WHATSOEVER.
+#
+# This is part of revision 2.1.0.12573 of the DK-TM4C129X Firmware Package.
+#
+#******************************************************************************
+
+#
+# Defines the part type that this project uses.
+#
+PART=TM4C129XNCZAD
+
+#
+# The base directory for TivaWare.
+#
+ROOT=../../../..
+
+#
+# Include the common make definitions.
+#
+include ${ROOT}/makedefs
+
+#
+# Where to find source files that do not live in this directory.
+#
+VPATH=.
+VPATH+=../../../../third_party/uip-1.0/apps/dhcpc
+VPATH+=../drivers
+VPATH+=../../../../third_party/uip-1.0/apps/httpd
+VPATH+=../../../../third_party/uip-1.0/uip
+VPATH+=../../../../utils
+
+#
+# Where to find header files that do not live in the source directory.
+#
+IPATH=.
+IPATH+=..
+IPATH+=../../../..
+IPATH+=../../../../third_party/uip-1.0/apps
+IPATH+=../../../../third_party/uip-1.0/uip
+IPATH+=../../../../third_party/uip-1.0
+IPATH+=../../../../utils
+
+#
+# The default rule, which causes the Ethernet with uIP to be built.
+#
+all: ${COMPILER}
+all: ${COMPILER}/enet_uip.axf
+
+#
+# The rule to clean out all the build products.
+#
+clean:
+ @rm -rf ${COMPILER} ${wildcard *~}
+
+#
+# The rule to create the target directory.
+#
+${COMPILER}:
+ @mkdir -p ${COMPILER}
+
+#
+# Rules for building the Ethernet with uIP.
+#
+${COMPILER}/enet_uip.axf: ${COMPILER}/dhcpc.o
+${COMPILER}/enet_uip.axf: ${COMPILER}/enet_uip.o
+${COMPILER}/enet_uip.axf: ${COMPILER}/frame.o
+${COMPILER}/enet_uip.axf: ${COMPILER}/httpd.o
+${COMPILER}/enet_uip.axf: ${COMPILER}/kentec320x240x16_ssd2119.o
+${COMPILER}/enet_uip.axf: ${COMPILER}/pinout.o
+${COMPILER}/enet_uip.axf: ${COMPILER}/startup_${COMPILER}.o
+${COMPILER}/enet_uip.axf: ${COMPILER}/uartstdio.o
+${COMPILER}/enet_uip.axf: ${COMPILER}/uip.o
+${COMPILER}/enet_uip.axf: ${COMPILER}/uip_arp.o
+${COMPILER}/enet_uip.axf: ${COMPILER}/uip_timer.o
+${COMPILER}/enet_uip.axf: ${COMPILER}/ustdlib.o
+${COMPILER}/enet_uip.axf: ${ROOT}/grlib/${COMPILER}/libgr.a
+${COMPILER}/enet_uip.axf: ${ROOT}/driverlib/${COMPILER}/libdriver.a
+${COMPILER}/enet_uip.axf: enet_uip.ld
+SCATTERgcc_enet_uip=enet_uip.ld
+ENTRY_enet_uip=ResetISR
+CFLAGSgcc=-DTARGET_IS_TM4C129_RA0 -DDEBUG_OUTPUT -DUIP_OFFLOAD_ICMP_CHKSUM
+
+#
+# Include the automatically generated dependency files.
+#
+ifneq (${MAKECMDGOALS},clean)
+-include ${wildcard ${COMPILER}/*.d} __dummy__
+endif
diff --git a/boards/dk-tm4c129x/enet_uip/ccs/.ccsimportspec b/boards/dk-tm4c129x/enet_uip/ccs/.ccsimportspec new file mode 100644 index 0000000..a415eb8 --- /dev/null +++ b/boards/dk-tm4c129x/enet_uip/ccs/.ccsimportspec @@ -0,0 +1,10 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<importSpec>
+ <source root="..">
+ <file name="clock-arch.h"/>
+ <file name="enet_uip.c"/>
+ <file name="uip-conf.h"/>
+ <file regex=".*_ccs\.cmd"/>
+ <file name="startup_ccs.c"/>
+ </source>
+</importSpec>
diff --git a/boards/dk-tm4c129x/enet_uip/ccs/.ccsproject b/boards/dk-tm4c129x/enet_uip/ccs/.ccsproject new file mode 100644 index 0000000..59a3400 --- /dev/null +++ b/boards/dk-tm4c129x/enet_uip/ccs/.ccsproject @@ -0,0 +1,10 @@ +<?xml version="1.0" encoding="UTF-8" ?>
+<?ccsproject version="1.0"?>
+<projectOptions>
+ <deviceVariant value="Cortex M.TM4C129XNCZAD"/>
+ <deviceFamily value="TMS470"/>
+ <deviceEndianness value="little"/>
+ <codegenToolVersion value="5.0.4"/>
+ <isElfFormat value="true"/>
+ <rts value="libc.a"/>
+</projectOptions>
diff --git a/boards/dk-tm4c129x/enet_uip/ccs/.cproject b/boards/dk-tm4c129x/enet_uip/ccs/.cproject new file mode 100644 index 0000000..8fa2006 --- /dev/null +++ b/boards/dk-tm4c129x/enet_uip/ccs/.cproject @@ -0,0 +1,205 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?>
+
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+ </tool>
+ </toolChain>
+ </folderInfo>
+ </configuration>
+ </storageModule>
+ <storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+ </cconfiguration>
+ </storageModule>
+ <storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
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+ <project-mappings>
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+ </storageModule>
+</cproject>
diff --git a/boards/dk-tm4c129x/enet_uip/ccs/.project b/boards/dk-tm4c129x/enet_uip/ccs/.project new file mode 100644 index 0000000..ddf4617 --- /dev/null +++ b/boards/dk-tm4c129x/enet_uip/ccs/.project @@ -0,0 +1,100 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+ <name>enet_uip</name>
+ <comment></comment>
+ <projects>
+ </projects>
+ <buildSpec>
+ <buildCommand>
+ <name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+ <arguments>
+ </arguments>
+ </buildCommand>
+ <buildCommand>
+ <name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+ <triggers>full,incremental,</triggers>
+ <arguments>
+ </arguments>
+ </buildCommand>
+ </buildSpec>
+ <natures>
+ <nature>com.ti.ccstudio.core.ccsNature</nature>
+ <nature>org.eclipse.cdt.core.cnature</nature>
+ <nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+ <nature>org.eclipse.cdt.core.ccnature</nature>
+ <nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+ </natures>
+ <linkedResources>
+ <link>
+ <name>enet_uip.c</name>
+ <type>1</type>
+ <locationURI>SW_ROOT/examples/boards/dk-tm4c129x/enet_uip/enet_uip.c</locationURI>
+ </link>
+ <link>
+ <name>enet_uip_ccs.cmd</name>
+ <type>1</type>
+ <locationURI>SW_ROOT/examples/boards/dk-tm4c129x/enet_uip/enet_uip_ccs.cmd</locationURI>
+ </link>
+ <link>
+ <name>startup_ccs.c</name>
+ <type>1</type>
+ <locationURI>SW_ROOT/examples/boards/dk-tm4c129x/enet_uip/startup_ccs.c</locationURI>
+ </link>
+ <link>
+ <name>drivers/frame.c</name>
+ <type>1</type>
+ <locationURI>SW_ROOT/examples/boards/dk-tm4c129x/drivers/frame.c</locationURI>
+ </link>
+ <link>
+ <name>drivers/kentec320x240x16_ssd2119.c</name>
+ <type>1</type>
+ <locationURI>SW_ROOT/examples/boards/dk-tm4c129x/drivers/kentec320x240x16_ssd2119.c</locationURI>
+ </link>
+ <link>
+ <name>drivers/pinout.c</name>
+ <type>1</type>
+ <locationURI>SW_ROOT/examples/boards/dk-tm4c129x/drivers/pinout.c</locationURI>
+ </link>
+ <link>
+ <name>utils/uartstdio.c</name>
+ <type>1</type>
+ <locationURI>SW_ROOT/utils/uartstdio.c</locationURI>
+ </link>
+ <link>
+ <name>utils/ustdlib.c</name>
+ <type>1</type>
+ <locationURI>SW_ROOT/utils/ustdlib.c</locationURI>
+ </link>
+ <link>
+ <name>third_party/uip-1.0/uip/uip.c</name>
+ <type>1</type>
+ <locationURI>SW_ROOT/third_party/uip-1.0/uip/uip.c</locationURI>
+ </link>
+ <link>
+ <name>third_party/uip-1.0/uip/uip_arp.c</name>
+ <type>1</type>
+ <locationURI>SW_ROOT/third_party/uip-1.0/uip/uip_arp.c</locationURI>
+ </link>
+ <link>
+ <name>third_party/uip-1.0/uip/uip_timer.c</name>
+ <type>1</type>
+ <locationURI>SW_ROOT/third_party/uip-1.0/uip/uip_timer.c</locationURI>
+ </link>
+ <link>
+ <name>third_party/uip-1.0/apps/dhcpc/dhcpc.c</name>
+ <type>1</type>
+ <locationURI>SW_ROOT/third_party/uip-1.0/apps/dhcpc/dhcpc.c</locationURI>
+ </link>
+ <link>
+ <name>third_party/uip-1.0/apps/httpd/httpd.c</name>
+ <type>1</type>
+ <locationURI>SW_ROOT/third_party/uip-1.0/apps/httpd/httpd.c</locationURI>
+ </link>
+ </linkedResources>
+ <variableList>
+ <variable>
+ <name>SW_ROOT</name>
+ <value>$%7BPARENT-5-PROJECT_LOC%7D</value>
+ </variable>
+ </variableList>
+</projectDescription>
diff --git a/boards/dk-tm4c129x/enet_uip/ccs/.settings/org.eclipse.cdt.codan.core.prefs b/boards/dk-tm4c129x/enet_uip/ccs/.settings/org.eclipse.cdt.codan.core.prefs new file mode 100644 index 0000000..98b6350 --- /dev/null +++ b/boards/dk-tm4c129x/enet_uip/ccs/.settings/org.eclipse.cdt.codan.core.prefs @@ -0,0 +1,3 @@ +eclipse.preferences.version=1
+inEditor=false
+onBuild=false
diff --git a/boards/dk-tm4c129x/enet_uip/ccs/Debug/enet_uip.bin b/boards/dk-tm4c129x/enet_uip/ccs/Debug/enet_uip.bin Binary files differnew file mode 100644 index 0000000..f54b913 --- /dev/null +++ b/boards/dk-tm4c129x/enet_uip/ccs/Debug/enet_uip.bin diff --git a/boards/dk-tm4c129x/enet_uip/ccs/Debug/enet_uip.out b/boards/dk-tm4c129x/enet_uip/ccs/Debug/enet_uip.out Binary files differnew file mode 100644 index 0000000..ef573d9 --- /dev/null +++ b/boards/dk-tm4c129x/enet_uip/ccs/Debug/enet_uip.out diff --git a/boards/dk-tm4c129x/enet_uip/ccs/macros.ini_initial b/boards/dk-tm4c129x/enet_uip/ccs/macros.ini_initial new file mode 100644 index 0000000..31214b5 --- /dev/null +++ b/boards/dk-tm4c129x/enet_uip/ccs/macros.ini_initial @@ -0,0 +1 @@ +SW_ROOT = ../../../../..
diff --git a/boards/dk-tm4c129x/enet_uip/ccs/target_config.ccxml b/boards/dk-tm4c129x/enet_uip/ccs/target_config.ccxml new file mode 100644 index 0000000..6e5ef45 --- /dev/null +++ b/boards/dk-tm4c129x/enet_uip/ccs/target_config.ccxml @@ -0,0 +1,13 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<configurations XML_version="1.2" id="configurations_0">
+ <configuration XML_version="1.2" id="Stellaris In-Circuit Debug Interface_0">
+ <instance XML_version="1.2" desc="Stellaris In-Circuit Debug Interface_0" href="connections/Stellaris_ICDI_Connection.xml" id="Stellaris In-Circuit Debug Interface_0" xml="Stellaris_ICDI_Connection.xml" xmlpath="connections"/>
+ <connection XML_version="1.2" id="Stellaris In-Circuit Debug Interface_0">
+ <instance XML_version="1.2" href="drivers/stellaris_cs_dap.xml" id="drivers" xml="stellaris_cs_dap.xml" xmlpath="drivers"/>
+ <instance XML_version="1.2" href="drivers/stellaris_cortex_m4.xml" id="drivers" xml="stellaris_cortex_m4.xml" xmlpath="drivers"/>
+ <platform XML_version="1.2" id="platform_0">
+ <instance XML_version="1.2" desc="Stellaris TM4C129XNCZAD_0" href="devices/tm4c129xnczad.xml" id="Stellaris TM4C129XNCZAD_0" xml="tm4c129xnczad.xml" xmlpath="devices"/>
+ </platform>
+ </connection>
+ </configuration>
+</configurations>
diff --git a/boards/dk-tm4c129x/enet_uip/clock-arch.h b/boards/dk-tm4c129x/enet_uip/clock-arch.h new file mode 100644 index 0000000..f30285e --- /dev/null +++ b/boards/dk-tm4c129x/enet_uip/clock-arch.h @@ -0,0 +1,41 @@ +//*****************************************************************************
+//
+// clock-arch.h - uIP Project Specific Clock-Architecture header file.
+//
+// Copyright (c) 2013-2014 Texas Instruments Incorporated. All rights reserved.
+// Software License Agreement
+//
+// Texas Instruments (TI) is supplying this software for use solely and
+// exclusively on TI's microcontroller products. The software is owned by
+// TI and/or its suppliers, and is protected under applicable copyright
+// laws. You may not combine this software with "viral" open-source
+// software in order to form a larger program.
+//
+// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
+// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
+// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
+// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
+// DAMAGES, FOR ANY REASON WHATSOEVER.
+//
+// This is part of revision 2.1.0.12573 of the DK-TM4C129X Firmware Package.
+//
+//*****************************************************************************
+
+#ifndef __CLOCK_ARCH_H__
+#define __CLOCK_ARCH_H__
+
+#include <stdint.h>
+
+//
+// Define how many clock ticks in one second.
+// Note: This should match the value of SYSTICKHZ in the main program.
+//
+#define CLOCK_CONF_SECOND 100
+
+//
+// Define the clock type used for returning system ticks.
+//
+typedef uint32_t clock_time_t;
+
+#endif // __CLOCK_ARCH_H__
diff --git a/boards/dk-tm4c129x/enet_uip/enet_uip.c b/boards/dk-tm4c129x/enet_uip/enet_uip.c new file mode 100644 index 0000000..675f9af --- /dev/null +++ b/boards/dk-tm4c129x/enet_uip/enet_uip.c @@ -0,0 +1,1065 @@ +//*****************************************************************************
+//
+// enet_uip.c - Sample WebServer Application for Ethernet Demo
+//
+// Copyright (c) 2013-2014 Texas Instruments Incorporated. All rights reserved.
+// Software License Agreement
+//
+// Texas Instruments (TI) is supplying this software for use solely and
+// exclusively on TI's microcontroller products. The software is owned by
+// TI and/or its suppliers, and is protected under applicable copyright
+// laws. You may not combine this software with "viral" open-source
+// software in order to form a larger program.
+//
+// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
+// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
+// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
+// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
+// DAMAGES, FOR ANY REASON WHATSOEVER.
+//
+// This is part of revision 2.1.0.12573 of the DK-TM4C129X Firmware Package.
+//
+//*****************************************************************************
+
+#include <stdbool.h>
+#include <stdint.h>
+#include "inc/hw_emac.h"
+#include "inc/hw_ints.h"
+#include "inc/hw_memmap.h"
+#include "inc/hw_types.h"
+#include "driverlib/debug.h"
+#include "driverlib/emac.h"
+#include "driverlib/flash.h"
+#include "driverlib/interrupt.h"
+#include "driverlib/rom.h"
+#include "driverlib/rom_map.h"
+#include "driverlib/sysctl.h"
+#include "driverlib/systick.h"
+#include "grlib/grlib.h"
+#include "utils/uartstdio.h"
+#include "utils/ustdlib.h"
+#include "uip/uip.h"
+#include "uip/uip_arp.h"
+#include "httpd/httpd.h"
+#include "dhcpc/dhcpc.h"
+#include "drivers/frame.h"
+#include "drivers/kentec320x240x16_ssd2119.h"
+#include "drivers/pinout.h"
+
+//*****************************************************************************
+//
+//! \addtogroup example_list
+//! <h1>Ethernet with uIP (enet_uip)</h1>
+//!
+//! This example application demonstrates the operation of the Tiva C Series
+//! Ethernet controller using the uIP TCP/IP Stack. DHCP is used to obtain
+//! an Ethernet address. A basic web site is served over the Ethernet port.
+//! The web site displays a few lines of text, and a counter that increments
+//! each time the page is sent.
+//!
+//! UART0, connected to the ICDI virtual COM port and running at 115,200,
+//! 8-N-1, is used to display messages from this application.
+//!
+//! For additional details on uIP, refer to the uIP web page at:
+//! http://www.sics.se/~adam/uip/
+//
+//*****************************************************************************
+
+//*****************************************************************************
+//
+// Defines for setting up the system clock.
+//
+//*****************************************************************************
+#define SYSTICKHZ CLOCK_CONF_SECOND
+#define SYSTICKMS (1000 / SYSTICKHZ)
+#define SYSTICKUS (1000000 / SYSTICKHZ)
+#define SYSTICKNS (1000000000 / SYSTICKHZ)
+
+//*****************************************************************************
+//
+// Macro for accessing the Ethernet header information in the buffer.
+//
+//*****************************************************************************
+u8_t g_pui8UIPBuffer[UIP_BUFSIZE + 2];
+u8_t *uip_buf = g_pui8UIPBuffer;
+
+#define BUF ((struct uip_eth_hdr *)uip_buf)
+
+//*****************************************************************************
+//
+// Ethernet DMA descriptors.
+//
+// Although uIP uses a single buffer, the MAC hardware needs a minimum of
+// 3 receive descriptors to operate.
+//
+//*****************************************************************************
+#define NUM_TX_DESCRIPTORS 3
+#define NUM_RX_DESCRIPTORS 3
+tEMACDMADescriptor g_psRxDescriptor[NUM_TX_DESCRIPTORS];
+tEMACDMADescriptor g_psTxDescriptor[NUM_RX_DESCRIPTORS];
+
+uint32_t g_ui32RxDescIndex;
+uint32_t g_ui32TxDescIndex;
+
+//*****************************************************************************
+//
+// Transmit and receive buffers.
+//
+//*****************************************************************************
+#define RX_BUFFER_SIZE 1536
+#define TX_BUFFER_SIZE 1536
+uint8_t g_pui8RxBuffer[RX_BUFFER_SIZE];
+uint8_t g_pui8TxBuffer[TX_BUFFER_SIZE];
+
+//*****************************************************************************
+//
+// A set of flags. The flag bits are defined as follows:
+//
+// 0 -> An indicator that a SysTick interrupt has occurred.
+// 1 -> An RX Packet has been received.
+// 2 -> A TX packet DMA transfer is pending.
+// 3 -> A RX packet DMA transfer is pending.
+//
+//*****************************************************************************
+#define FLAG_SYSTICK 0
+#define FLAG_RXPKT 1
+#define FLAG_TXPKT 2
+#define FLAG_RXPKTPEND 3
+static volatile uint32_t g_ui32Flags;
+
+//*****************************************************************************
+//
+// A system tick counter, incremented every SYSTICKMS.
+//
+//*****************************************************************************
+volatile uint32_t g_ui32TickCounter = 0;
+
+//*****************************************************************************
+//
+// Default TCP/IP Settings for this application.
+//
+// Default to Link Local address ... (169.254.1.0 to 169.254.254.255). Note:
+// This application does not implement the Zeroconf protocol. No ARP query is
+// issued to determine if this static IP address is already in use.
+//
+// Uncomment the following #define statement to enable STATIC IP
+// instead of DHCP.
+//
+//*****************************************************************************
+//#define USE_STATIC_IP
+
+#ifndef DEFAULT_IPADDR0
+#define DEFAULT_IPADDR0 169
+#endif
+
+#ifndef DEFAULT_IPADDR1
+#define DEFAULT_IPADDR1 254
+#endif
+
+#ifndef DEFAULT_IPADDR2
+#define DEFAULT_IPADDR2 19
+#endif
+
+#ifndef DEFAULT_IPADDR3
+#define DEFAULT_IPADDR3 63
+#endif
+
+#ifndef DEFAULT_NETMASK0
+#define DEFAULT_NETMASK0 255
+#endif
+
+#ifndef DEFAULT_NETMASK1
+#define DEFAULT_NETMASK1 255
+#endif
+
+#ifndef DEFAULT_NETMASK2
+#define DEFAULT_NETMASK2 0
+#endif
+
+#ifndef DEFAULT_NETMASK3
+#define DEFAULT_NETMASK3 0
+#endif
+
+//*****************************************************************************
+//
+// UIP Timers (in MS)
+//
+//*****************************************************************************
+#define UIP_PERIODIC_TIMER_MS 500
+#define UIP_ARP_TIMER_MS 10000
+
+//*****************************************************************************
+//
+// The drawing context used to draw to the screen.
+//
+//*****************************************************************************
+static tContext g_sContext;
+
+//*****************************************************************************
+//
+// The vertical position of the status string on the LCD display.
+//
+//*****************************************************************************
+#define STATUS_Y 128
+
+//*****************************************************************************
+//
+// The error routine that is called if the driver library encounters an error.
+//
+//*****************************************************************************
+void
+__error__(char *pcFilename, uint32_t ui32Line)
+{
+}
+
+//*****************************************************************************
+//
+// The interrupt handler for the SysTick interrupt.
+//
+//*****************************************************************************
+void
+SysTickIntHandler(void)
+{
+ //
+ // Increment the system tick count.
+ //
+ g_ui32TickCounter++;
+
+ //
+ // Indicate that a SysTick interrupt has occurred.
+ //
+ HWREGBITW(&g_ui32Flags, FLAG_SYSTICK) = 1;
+}
+
+//*****************************************************************************
+//
+// When using the timer module in UIP, this function is required to return
+// the number of ticks. Note that the file "clock-arch.h" must be provided
+// by the application, and define CLOCK_CONF_SECONDS as the number of ticks
+// per second, and must also define the typedef "clock_time_t".
+//
+//*****************************************************************************
+clock_time_t
+clock_time(void)
+{
+ return((clock_time_t)g_ui32TickCounter);
+}
+
+//*****************************************************************************
+//
+// Display a status string on the LCD and also transmit it via the serial port.
+//
+//*****************************************************************************
+void
+UpdateStatus(char *pcStatus)
+{
+ tRectangle sRect;
+
+ //
+ // Dump that status string to the serial port.
+ //
+ UARTprintf("%s\n", pcStatus);
+
+ //
+ // Clear any previous status message.
+ //
+ sRect.i16XMin = 0;
+ sRect.i16XMax = GrContextDpyWidthGet(&g_sContext) - 1;
+ sRect.i16YMin = STATUS_Y - 16;
+ sRect.i16YMax = STATUS_Y + 16;
+ GrContextForegroundSet(&g_sContext, ClrBlack);
+ GrRectFill(&g_sContext, &sRect);
+
+ //
+ // Display the new status string.
+ //
+ GrContextFontSet(&g_sContext, g_psFontCmss20);
+ GrContextForegroundSet(&g_sContext, ClrWhite);
+ GrStringDrawCentered(&g_sContext, pcStatus, -1,
+ GrContextDpyWidthGet(&g_sContext) / 2, STATUS_Y, 0);
+}
+
+//*****************************************************************************
+//
+// Display the current IP address on the screen and transmit it via the UART.
+//
+//*****************************************************************************
+void
+ShowIPAddress(const uip_ipaddr_t sIPAddr)
+{
+ char pcBuffer[24];
+
+ usprintf(pcBuffer, "IP: %d.%d.%d.%d", sIPAddr[0] & 0xff,
+ sIPAddr[0] >> 8, sIPAddr[1] & 0xff, sIPAddr[1] >> 8);
+ UpdateStatus(pcBuffer);
+}
+
+//*****************************************************************************
+//
+// The interrupt handler for the Ethernet interrupt.
+//
+//*****************************************************************************
+void
+EthernetIntHandler(void)
+{
+ uint32_t ui32Temp;
+
+ //
+ // Read and Clear the interrupt.
+ //
+ ui32Temp = ROM_EMACIntStatus(EMAC0_BASE, true);
+ ROM_EMACIntClear(EMAC0_BASE, ui32Temp);
+
+ //
+ // Check to see if an RX Interrupt has occurred.
+ //
+ if(ui32Temp & EMAC_INT_RECEIVE)
+ {
+ //
+ // Indicate that a packet has been received.
+ //
+ HWREGBITW(&g_ui32Flags, FLAG_RXPKT) = 1;
+ }
+
+ //
+ // Has the DMA finished transferring a packet to the transmitter?
+ //
+ if(ui32Temp & EMAC_INT_TRANSMIT)
+ {
+ //
+ // Indicate that a packet has been sent.
+ //
+ HWREGBITW(&g_ui32Flags, FLAG_TXPKT) = 0;
+ }
+}
+
+//*****************************************************************************
+//
+// Callback for when DHCP client has been configured.
+//
+//*****************************************************************************
+void
+dhcpc_configured(const struct dhcpc_state *s)
+{
+ uip_sethostaddr(&s->ipaddr);
+ uip_setnetmask(&s->netmask);
+ uip_setdraddr(&s->default_router);
+ ShowIPAddress(s->ipaddr);
+}
+
+//*****************************************************************************
+//
+// Read a packet from the DMA receive buffer into the uIP packet buffer.
+//
+//*****************************************************************************
+int32_t
+PacketReceive(uint32_t ui32Base, uint8_t *pui8Buf, int32_t i32BufLen)
+{
+ int_fast32_t i32FrameLen, i32Loop;
+
+ //
+ // Check the arguments.
+ //
+ ASSERT(ui32Base == EMAC0_BASE);
+ ASSERT(pui8Buf != 0);
+ ASSERT(i32BufLen > 0);
+
+ //
+ // By default, we assume we got a bad frame.
+ //
+ i32FrameLen = 0;
+
+ //
+ // Make sure that we own the receive descriptor.
+ //
+ if(!(g_psRxDescriptor[g_ui32RxDescIndex].ui32CtrlStatus & DES0_RX_CTRL_OWN))
+ {
+ //
+ // We own the receive descriptor so check to see if it contains a valid
+ // frame. Look for a descriptor error, indicating that the incoming
+ // packet was truncated or, if this is the last frame in a packet,
+ // the receive error bit.
+ //
+ if(!(g_psRxDescriptor[g_ui32RxDescIndex].ui32CtrlStatus &
+ DES0_RX_STAT_ERR))
+ {
+ //
+ // We have a valid frame so copy the content to the supplied
+ // buffer. First check that the "last descriptor" flag is set. We
+ // sized the receive buffer such that it can always hold a valid
+ // frame so this flag should never be clear at this point but...
+ //
+ if(g_psRxDescriptor[g_ui32RxDescIndex].ui32CtrlStatus &
+ DES0_RX_STAT_LAST_DESC)
+ {
+ i32FrameLen =
+ ((g_psRxDescriptor[g_ui32RxDescIndex].ui32CtrlStatus &
+ DES0_RX_STAT_FRAME_LENGTH_M) >>
+ DES0_RX_STAT_FRAME_LENGTH_S);
+
+ //
+ // Sanity check. This shouldn't be required since we sized the
+ // uIP buffer such that it's the same size as the DMA receive
+ // buffer but, just in case...
+ //
+ if(i32FrameLen > i32BufLen)
+ {
+ i32FrameLen = i32BufLen;
+ }
+
+ //
+ // Copy the data from the DMA receive buffer into the provided
+ // frame buffer.
+ //
+ for(i32Loop = 0; i32Loop < i32FrameLen; i32Loop++)
+ {
+ pui8Buf[i32Loop] = g_pui8RxBuffer[i32Loop];
+ }
+ }
+ }
+
+ //
+ // Move on to the next descriptor in the chain.
+ //
+ g_ui32RxDescIndex++;
+ if(g_ui32RxDescIndex == NUM_RX_DESCRIPTORS)
+ {
+ g_ui32RxDescIndex = 0;
+ }
+
+ //
+ // Mark the next descriptor in the ring as available for the receiver
+ // to write into.
+ //
+ g_psRxDescriptor[g_ui32RxDescIndex].ui32CtrlStatus = DES0_RX_CTRL_OWN;
+ }
+
+ //
+ // Return the Frame Length
+ //
+ return(i32FrameLen);
+}
+
+//*****************************************************************************
+//
+// Transmit a packet from the supplied buffer.
+//
+//*****************************************************************************
+static int32_t
+PacketTransmit(uint32_t ui32Base, uint8_t *pui8Buf, int32_t i32BufLen)
+{
+ int_fast32_t i32Loop;
+
+ //
+ // Indicate that a packet is being sent.
+ //
+ HWREGBITW(&g_ui32Flags, FLAG_TXPKT) = 1;
+
+ //
+ // Wait for the previous packet to be transmitted.
+ //
+ while(g_psTxDescriptor[g_ui32TxDescIndex].ui32CtrlStatus &
+ DES0_TX_CTRL_OWN)
+ {
+ //
+ // Spin and waste time.
+ //
+ }
+
+ //
+ // Check that we're not going to overflow the transmit buffer. This
+ // shouldn't be necessary since the uIP buffer is smaller than our DMA
+ // transmit buffer but, just in case...
+ //
+ if(i32BufLen > TX_BUFFER_SIZE)
+ {
+ i32BufLen = TX_BUFFER_SIZE;
+ }
+
+ //
+ // Copy the packet data into the transmit buffer.
+ //
+ for(i32Loop = 0; i32Loop < i32BufLen; i32Loop++)
+ {
+ g_pui8TxBuffer[i32Loop] = pui8Buf[i32Loop];
+ }
+
+ //
+ // Move to the next descriptor.
+ //
+ g_ui32TxDescIndex++;
+ if(g_ui32TxDescIndex == NUM_TX_DESCRIPTORS)
+ {
+ g_ui32TxDescIndex = 0;
+ }
+
+ //
+ // Fill in the packet size and tell the transmitter to start work.
+ //
+ g_psTxDescriptor[g_ui32TxDescIndex].ui32Count = (uint32_t)i32BufLen;
+ g_psTxDescriptor[g_ui32TxDescIndex].ui32CtrlStatus =
+ (DES0_TX_CTRL_LAST_SEG | DES0_TX_CTRL_FIRST_SEG |
+ DES0_TX_CTRL_INTERRUPT | DES0_TX_CTRL_IP_ALL_CKHSUMS |
+ DES0_TX_CTRL_CHAINED | DES0_TX_CTRL_OWN);
+
+ //
+ // Tell the DMA to reacquire the descriptor now that we've filled it in.
+ //
+ ROM_EMACTxDMAPollDemand(EMAC0_BASE);
+
+ //
+ // Return the number of bytes sent.
+ //
+ return(i32BufLen);
+}
+
+//*****************************************************************************
+//
+// Initialize the transmit and receive DMA descriptors. We apparently need
+// a minimum of 3 descriptors in each chain. This is overkill since uIP uses
+// a single, common transmit and receive buffer so we tag each descriptor
+// with the same buffer and will make sure we only hand the DMA one descriptor
+// at a time.
+//
+//*****************************************************************************
+void
+InitDescriptors(uint32_t ui32Base)
+{
+ uint32_t ui32Loop;
+
+ //
+ // Initialize each of the transmit descriptors. Note that we leave the OWN
+ // bit clear here since we have not set up any transmissions yet.
+ //
+ for(ui32Loop = 0; ui32Loop < NUM_TX_DESCRIPTORS; ui32Loop++)
+ {
+ g_psTxDescriptor[ui32Loop].ui32Count =
+ (DES1_TX_CTRL_SADDR_INSERT |
+ (TX_BUFFER_SIZE << DES1_TX_CTRL_BUFF1_SIZE_S));
+ g_psTxDescriptor[ui32Loop].pvBuffer1 = g_pui8TxBuffer;
+ g_psTxDescriptor[ui32Loop].DES3.pLink =
+ (ui32Loop == (NUM_TX_DESCRIPTORS - 1)) ?
+ g_psTxDescriptor : &g_psTxDescriptor[ui32Loop + 1];
+ g_psTxDescriptor[ui32Loop].ui32CtrlStatus =
+ (DES0_TX_CTRL_LAST_SEG | DES0_TX_CTRL_FIRST_SEG |
+ DES0_TX_CTRL_INTERRUPT | DES0_TX_CTRL_CHAINED |
+ DES0_TX_CTRL_IP_ALL_CKHSUMS);
+ }
+
+ //
+ // Initialize each of the receive descriptors. We clear the OWN bit here
+ // to make sure that the receiver doesn't start writing anything
+ // immediately.
+ //
+ for(ui32Loop = 0; ui32Loop < NUM_RX_DESCRIPTORS; ui32Loop++)
+ {
+ g_psRxDescriptor[ui32Loop].ui32CtrlStatus = 0;
+ g_psRxDescriptor[ui32Loop].ui32Count =
+ (DES1_RX_CTRL_CHAINED |
+ (RX_BUFFER_SIZE << DES1_RX_CTRL_BUFF1_SIZE_S));
+ g_psRxDescriptor[ui32Loop].pvBuffer1 = g_pui8RxBuffer;
+ g_psRxDescriptor[ui32Loop].DES3.pLink =
+ (ui32Loop == (NUM_RX_DESCRIPTORS - 1)) ?
+ g_psRxDescriptor : &g_psRxDescriptor[ui32Loop + 1];
+ }
+
+ //
+ // Set the descriptor pointers in the hardware.
+ //
+ ROM_EMACRxDMADescriptorListSet(ui32Base, g_psRxDescriptor);
+ ROM_EMACTxDMADescriptorListSet(ui32Base, g_psTxDescriptor);
+
+ //
+ // Start from the beginning of both descriptor chains. We actually set
+ // the transmit descriptor index to the last descriptor in the chain
+ // since it will be incremented before use and this means the first
+ // transmission we perform will use the correct descriptor.
+ //
+ g_ui32RxDescIndex = 0;
+ g_ui32TxDescIndex = NUM_TX_DESCRIPTORS - 1;
+}
+
+//*****************************************************************************
+//
+// This example demonstrates the use of the Ethernet Controller with the uIP
+// TCP/IP stack.
+//
+//*****************************************************************************
+int
+main(void)
+{
+ uip_ipaddr_t sIPAddr;
+ static struct uip_eth_addr sTempAddr;
+ int32_t i32PeriodicTimer, i32ARPTimer;
+#ifdef EXTERNAL_RMII_PHY
+ uint16_t ui16Val;
+#endif
+ uint32_t ui32User0, ui32User1;
+ uint32_t ui32Temp, ui32PHYConfig, ui32SysClock;
+ uint8_t ui8PHYAddr;
+
+ //
+ // Run from the PLL at 120 MHz.
+ //
+ ui32SysClock = MAP_SysCtlClockFreqSet((SYSCTL_XTAL_25MHZ |
+ SYSCTL_OSC_MAIN | SYSCTL_USE_PLL |
+ SYSCTL_CFG_VCO_480), 120000000);
+
+ //
+ // Configure the device pins.
+ //
+ PinoutSet();
+
+ //
+ // Initialize the display driver.
+ //
+ Kentec320x240x16_SSD2119Init(ui32SysClock);
+
+ //
+ // Initialize the graphics context.
+ //
+ GrContextInit(&g_sContext, &g_sKentec320x240x16_SSD2119);
+
+ //
+ // Draw the application frame.
+ //
+ FrameDraw(&g_sContext, "enet-uip");
+
+ //
+ // Initialize the UART.
+ //
+ UARTStdioConfig(0, 115200, ui32SysClock);
+ UARTprintf("Ethernet with uIP\n-----------------\n\n");
+
+#ifdef EXTERNAL_RMII_PHY
+ UpdateStatus("Using RMII PHY.");
+ ui32PHYConfig = EMAC_PHY_TYPE_EXTERNAL_RMII;
+ ui8PHYAddr = 0;
+#elif defined EXTERNAL_MII_PHY
+ UpdateStatus("Using MII PHY.");
+ ui32PHYConfig = EMAC_PHY_TYPE_EXTERNAL_MII;
+ ui8PHYAddr = 0;
+#else
+ UpdateStatus("Using Internal PHY.");
+ ui32PHYConfig = (EMAC_PHY_TYPE_INTERNAL | EMAC_PHY_INT_MDIX_EN |
+ EMAC_PHY_AN_100B_T_FULL_DUPLEX);
+ ui8PHYAddr = 0;
+#endif
+
+ //
+ // Read the MAC address from the user registers.
+ //
+ ROM_FlashUserGet(&ui32User0, &ui32User1);
+ if((ui32User0 == 0xffffffff) || (ui32User1 == 0xffffffff))
+ {
+ //
+ // We should never get here. This is an error if the MAC address has
+ // not been programmed into the device. Exit the program.
+ //
+ UpdateStatus("MAC Address Not Programmed!");
+ while(1)
+ {
+ }
+ }
+
+ //
+ // Convert the 24/24 split MAC address from NV ram into a 32/16 split MAC
+ // address needed to program the hardware registers, then program the MAC
+ // address into the Ethernet Controller registers.
+ //
+ sTempAddr.addr[0] = ((ui32User0 >> 0) & 0xff);
+ sTempAddr.addr[1] = ((ui32User0 >> 8) & 0xff);
+ sTempAddr.addr[2] = ((ui32User0 >> 16) & 0xff);
+ sTempAddr.addr[3] = ((ui32User1 >> 0) & 0xff);
+ sTempAddr.addr[4] = ((ui32User1 >> 8) & 0xff);
+ sTempAddr.addr[5] = ((ui32User1 >> 16) & 0xff);
+
+ //
+ // Configure SysTick for a periodic interrupt.
+ //
+ ROM_SysTickPeriodSet(ui32SysClock / SYSTICKHZ);
+ ROM_SysTickEnable();
+ ROM_SysTickIntEnable();
+
+ //
+ // Enable and reset the Ethernet modules.
+ //
+ ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_EMAC0);
+ ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_EPHY0);
+ ROM_SysCtlPeripheralReset(SYSCTL_PERIPH_EMAC0);
+ ROM_SysCtlPeripheralReset(SYSCTL_PERIPH_EPHY0);
+
+ //
+ // Wait for the MAC to be ready.
+ //
+ UpdateStatus("Waiting for MAC to be ready...");
+ while(!ROM_SysCtlPeripheralReady(SYSCTL_PERIPH_EMAC0))
+ {
+ }
+
+ //
+ // Configure for use with the internal PHY.
+ //
+ MAP_EMACPHYConfigSet(EMAC0_BASE, ui32PHYConfig);
+ UpdateStatus("MAC ready.");
+
+ //
+ // Reset the MAC.
+ //
+ ROM_EMACReset(EMAC0_BASE);
+
+ //
+ // Initialize the MAC and set the DMA mode.
+ //
+ ROM_EMACInit(EMAC0_BASE, ui32SysClock,
+ EMAC_BCONFIG_MIXED_BURST | EMAC_BCONFIG_PRIORITY_FIXED, 4, 4,
+ 0);
+
+#ifdef EXTERNAL_RMII_PHY
+ //
+ // When using an external RMII PHY, we need to acquire link before we can
+ // determine how to configure the MAC. Unfortunately, the bit signalling
+ // on RMII changes depending upon whether the PHY is configured to use
+ // 10Mbps or 100Mbps and we need to tell the MAC which signalling method
+ // to use.
+ //
+ // With MII, the signalling is the same for both speeds so we don't need to
+ // include code to wait for the link to be acquired.
+ //
+
+ //
+ // Write the PHY register that tells it to start auto-negotiation.
+ //
+ UpdateStatus("Starting autonegotiation...");
+ ROM_EMACPHYWrite(EMAC0_BASE, ui8PHYAddr, EPHY_BMCR,
+ EPHY_BMCR_ANEN | EPHY_BMCR_RESTARTAN);
+
+ //
+ // Poll, waiting for auto-negotiation to complete.
+ //
+ UpdateStatus("Waiting for autonegotiation to complete...");
+ do
+ {
+ ui16Val = ROM_EMACPHYRead(EMAC0_BASE, ui8PHYAddr, EPHY_BMSR);
+ ROM_SysCtlDelay(ui32SysClock / (10 * 3));
+ }
+ while(!(ui16Val & EPHY_BMSR_ANC));
+
+ //
+ // Wait for link to be acquired.
+ //
+ UpdateStatus("Waiting for link...");
+ while(!(ui16Val & EPHY_BMSR_LINKSTAT))
+ {
+ ui16Val = ROM_EMACPHYRead(EMAC0_BASE, ui8PHYAddr, EPHY_BMSR);
+ }
+
+ UpdateStatus("Link acquired.");
+
+ //
+ // What's the operating speed?
+ //
+ ui16Val = ROM_EMACPHYRead(EMAC0_BASE, ui8PHYAddr, EPHY_STS);
+
+ //
+ // Set the MAC to PHY communication speed and duplex mode accordingly.
+ //
+ UARTprintf("Speed is 10%sMbps.\n", (ui16Val & EPHY_STS_SPEED) ? "" : "0");
+
+ ROM_EMACConfigSet(EMAC0_BASE,
+ (((ui16Val & EPHY_STS_SPEED) ? 0 : EMAC_CONFIG_100MBPS) |
+ ((ui16Val & EPHY_STS_DUPLEX) ? EMAC_CONFIG_FULL_DUPLEX :
+ 0) |
+ EMAC_CONFIG_FULL_DUPLEX |
+ EMAC_CONFIG_CHECKSUM_OFFLOAD |
+ EMAC_CONFIG_7BYTE_PREAMBLE |
+ EMAC_CONFIG_IF_GAP_96BITS | EMAC_CONFIG_USE_MACADDR0 |
+ EMAC_CONFIG_SA_FROM_DESCRIPTOR |
+ EMAC_CONFIG_BO_LIMIT_1024),
+ (EMAC_MODE_RX_STORE_FORWARD |
+ EMAC_MODE_TX_STORE_FORWARD |
+ EMAC_MODE_TX_THRESHOLD_64_BYTES |
+ EMAC_MODE_RX_THRESHOLD_64_BYTES), 0);
+#else
+ //
+ // Set MAC configuration options.
+ //
+ ROM_EMACConfigSet(EMAC0_BASE,
+ (EMAC_CONFIG_FULL_DUPLEX | EMAC_CONFIG_CHECKSUM_OFFLOAD |
+ EMAC_CONFIG_7BYTE_PREAMBLE | EMAC_CONFIG_IF_GAP_96BITS |
+ EMAC_CONFIG_USE_MACADDR0 |
+ EMAC_CONFIG_SA_FROM_DESCRIPTOR |
+ EMAC_CONFIG_BO_LIMIT_1024),
+ (EMAC_MODE_RX_STORE_FORWARD |
+ EMAC_MODE_TX_STORE_FORWARD |
+ EMAC_MODE_TX_THRESHOLD_64_BYTES |
+ EMAC_MODE_RX_THRESHOLD_64_BYTES), 0);
+#endif
+
+ //
+ // Initialize the Ethernet DMA descriptors.
+ //
+ InitDescriptors(EMAC0_BASE);
+
+ //
+ // Program the hardware with its MAC address (for filtering).
+ //
+ ROM_EMACAddrSet(EMAC0_BASE, 0, (uint8_t *)&sTempAddr);
+
+#ifndef EXTERNAL_RMII_PHY
+ //
+ // Wait for the link to become active. If we are using an external
+ // RMII PHY, we already waited for link to be acquired prior to
+ // configuring the MAC so don't wait again here.
+ //
+ UpdateStatus("Waiting for Link");
+ while((ROM_EMACPHYRead(EMAC0_BASE, ui8PHYAddr, EPHY_BMSR) &
+ EPHY_BMSR_LINKSTAT) == 0)
+ {
+ }
+ UpdateStatus("Link Established");
+#endif
+
+ //
+ // Set MAC filtering options. We receive all broadcast and multicast
+ // packets along with those addressed specifically for us.
+ //
+ ROM_EMACFrameFilterSet(EMAC0_BASE, (EMAC_FRMFILTER_SADDR |
+ EMAC_FRMFILTER_PASS_MULTICAST |
+ EMAC_FRMFILTER_PASS_NO_CTRL));
+
+ //
+ // Clear any pending interrupts.
+ //
+ ROM_EMACIntClear(EMAC0_BASE, EMACIntStatus(EMAC0_BASE, false));
+
+ //
+ // Initialize the uIP TCP/IP stack.
+ //
+ uip_init();
+
+ //
+ // Set the local MAC address (for uIP).
+ //
+ uip_setethaddr(sTempAddr);
+#ifdef USE_STATIC_IP
+ uip_ipaddr(sIPAddr, DEFAULT_IPADDR0, DEFAULT_IPADDR1, DEFAULT_IPADDR2,
+ DEFAULT_IPADDR3);
+ uip_sethostaddr(sIPAddr);
+ ShowIPAddress(sIPAddr);
+ uip_ipaddr(sIPAddr, DEFAULT_NETMASK0, DEFAULT_NETMASK1, DEFAULT_NETMASK2,
+ DEFAULT_NETMASK3);
+ uip_setnetmask(sIPAddr);
+#else
+ uip_ipaddr(sIPAddr, 0, 0, 0, 0);
+ uip_sethostaddr(sIPAddr);
+ UpdateStatus("Waiting for IP address...");
+ uip_ipaddr(sIPAddr, 0, 0, 0, 0);
+ uip_setnetmask(sIPAddr);
+#endif
+
+ //
+ // Enable the Ethernet MAC transmitter and receiver.
+ //
+ ROM_EMACTxEnable(EMAC0_BASE);
+ ROM_EMACRxEnable(EMAC0_BASE);
+
+ //
+ // Enable the Ethernet interrupt.
+ //
+ ROM_IntEnable(INT_EMAC0);
+
+ //
+ // Enable the Ethernet RX Packet interrupt source.
+ //
+ ROM_EMACIntEnable(EMAC0_BASE, EMAC_INT_RECEIVE);
+
+ //
+ // Mark the first receive descriptor as available to the DMA to start
+ // the receive processing.
+ //
+ g_psRxDescriptor[g_ui32RxDescIndex].ui32CtrlStatus |= DES0_RX_CTRL_OWN;
+
+ //
+ // Initialize the TCP/IP Application (e.g. web server).
+ //
+ httpd_init();
+
+#ifndef USE_STATIC_IP
+ //
+ // Initialize the DHCP Client Application.
+ //
+ dhcpc_init(&sTempAddr.addr[0], 6);
+ dhcpc_request();
+#endif
+
+ //
+ // Main Application Loop.
+ //
+ i32PeriodicTimer = 0;
+ i32ARPTimer = 0;
+ while(true)
+ {
+ //
+ // Wait for an event to occur. This can be either a System Tick event,
+ // or an RX Packet event.
+ //
+ while(!g_ui32Flags)
+ {
+ }
+
+ //
+ // If SysTick, Clear the SysTick interrupt flag and increment the
+ // timers.
+ //
+ if(HWREGBITW(&g_ui32Flags, FLAG_SYSTICK) == 1)
+ {
+ HWREGBITW(&g_ui32Flags, FLAG_SYSTICK) = 0;
+ i32PeriodicTimer += SYSTICKMS;
+ i32ARPTimer += SYSTICKMS;
+ }
+
+ //
+ // Check for an RX Packet and read it.
+ //
+ if(HWREGBITW(&g_ui32Flags, FLAG_RXPKT))
+ {
+ //
+ // Clear the RX Packet event flag.
+ //
+ HWREGBITW(&g_ui32Flags, FLAG_RXPKT) = 0;
+
+ // Get the packet and set uip_len for uIP stack usage.
+ //
+ uip_len = (unsigned short)PacketReceive(EMAC0_BASE, uip_buf,
+ sizeof(g_pui8UIPBuffer));
+
+ //
+ // Process incoming IP packets here.
+ //
+ if(BUF->type == htons(UIP_ETHTYPE_IP))
+ {
+ uip_arp_ipin();
+ uip_input();
+
+ //
+ // If the above function invocation resulted in data that
+ // should be sent out on the network, the global variable
+ // uip_len is set to a value > 0.
+ //
+ if(uip_len > 0)
+ {
+ uip_arp_out();
+ PacketTransmit(EMAC0_BASE, uip_buf, uip_len);
+ uip_len = 0;
+ }
+ }
+
+ //
+ // Process incoming ARP packets here.
+ //
+ else if(BUF->type == htons(UIP_ETHTYPE_ARP))
+ {
+ uip_arp_arpin();
+
+ //
+ // If the above function invocation resulted in data that
+ // should be sent out on the network, the global variable
+ // uip_len is set to a value > 0.
+ //
+ if(uip_len > 0)
+ {
+ PacketTransmit(EMAC0_BASE, uip_buf, uip_len);
+ uip_len = 0;
+ }
+ }
+ }
+
+ //
+ // Process TCP/IP Periodic Timer here.
+ //
+ if(i32PeriodicTimer > UIP_PERIODIC_TIMER_MS)
+ {
+ i32PeriodicTimer = 0;
+ for(ui32Temp = 0; ui32Temp < UIP_CONNS; ui32Temp++)
+ {
+ uip_periodic(ui32Temp);
+
+ //
+ // If the above function invocation resulted in data that
+ // should be sent out on the network, the global variable
+ // uip_len is set to a value > 0.
+ //
+ if(uip_len > 0)
+ {
+ uip_arp_out();
+ PacketTransmit(EMAC0_BASE, uip_buf, uip_len);
+ uip_len = 0;
+ }
+ }
+
+#if UIP_UDP
+ for(ui32Temp = 0; ui32Temp < UIP_UDP_CONNS; ui32Temp++)
+ {
+ uip_udp_periodic(ui32Temp);
+
+ //
+ // If the above function invocation resulted in data that
+ // should be sent out on the network, the global variable
+ // uip_len is set to a value > 0.
+ //
+ if(uip_len > 0)
+ {
+ uip_arp_out();
+ PacketTransmit(EMAC0_BASE, uip_buf, uip_len);
+ uip_len = 0;
+ }
+ }
+#endif
+ }
+
+ //
+ // Process ARP Timer here.
+ //
+ if(i32ARPTimer > UIP_ARP_TIMER_MS)
+ {
+ i32ARPTimer = 0;
+ uip_arp_timer();
+ }
+ }
+}
+
+#ifdef UIP_ARCH_IPCHKSUM
+//
+// Return the IP checksum for the packet in uip_buf. This is a dummy since
+// the hardware calculates this for us.
+//
+u16_t
+uip_ipchksum(void)
+{
+ //
+ // Dummy function - the hardware calculates and inserts all required
+ // checksums for us.
+ //
+ return(0xffff);
+}
+
+u16_t
+uip_chksum(u16_t *data, u16_t len)
+{
+ return(0xffff);
+}
+
+u16_t
+uip_icmp6chksum(void)
+{
+ return(0xffff);
+}
+
+u16_t
+uip_tcpchksum(void)
+{
+ return(0xffff);
+}
+#endif
diff --git a/boards/dk-tm4c129x/enet_uip/enet_uip.ewd b/boards/dk-tm4c129x/enet_uip/enet_uip.ewd new file mode 100644 index 0000000..484e41a --- /dev/null +++ b/boards/dk-tm4c129x/enet_uip/enet_uip.ewd @@ -0,0 +1,614 @@ +<?xml version="1.0" encoding="iso-8859-1"?>
+
+<project>
+ <fileVersion>1</fileVersion>
+ <configuration>
+ <name>Debug</name>
+ <toolchain>
+ <name>ARM</name>
+ </toolchain>
+ <debug>1</debug>
+ <settings>
+ <name>C-SPY</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>15</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>CInput</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CEndian</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CProcessor</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OCVariant</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>MacOverride</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>MacFile</name>
+ <state></state>
+ </option>
+ <option>
+ <name>MemOverride</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>MemFile</name>
+ <state>$TOOLKIT_DIR$\CONFIG\debugger\TexasInstruments\tm4c129xnczad</state>
+ </option>
+ <option>
+ <name>RunToEnable</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>RunToName</name>
+ <state>main</state>
+ </option>
+ <option>
+ <name>CExtraOptionsCheck</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CExtraOptions</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CFpuProcessor</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OCDDFArgumentProducer</name>
+ <state></state>
+ </option>
+ <option>
+ <name>OCDownloadSuppressDownload</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OCDownloadVerifyAll</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OCProductVersion</name>
+ <state>5.11.0.50579</state>
+ </option>
+ <option>
+ <name>OCDynDriverList</name>
+ <state>LMIFTDI_ID</state>
+ </option>
+ <option>
+ <name>OCLastSavedByProductVersion</name>
+ <state>5.11.0.50579</state>
+ </option>
+ <option>
+ <name>OCDownloadAttachToProgram</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>FlashLoaders</name>
+ <state>,,,,(default),</state>
+ </option>
+ <option>
+ <name>UseFlashLoader</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CLowLevel</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OCBE8Slave</name>
+ <state>1</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>ARMSIM_ID</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>1</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>OCSimDriverInfo</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OCSimEnablePSP</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OCSimPspOverrideConfig</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OCSimPspConfigFile</name>
+ <state></state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>ANGEL_ID</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>0</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>CCAngelHeartbeat</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CAngelCommunication</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CAngelCommBaud</name>
+ <version>0</version>
+ <state>3</state>
+ </option>
+ <option>
+ <name>CAngelCommPort</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>ANGELTCPIP</name>
+ <state>aaa.bbb.ccc.ddd</state>
+ </option>
+ <option>
+ <name>DoAngelLogfile</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AngelLogFile</name>
+ <state>$TOOLKIT_DIR$\cspycomm.log</state>
+ </option>
+ <option>
+ <name>OCDriverInfo</name>
+ <state>1</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>GDBSERVER_ID</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>0</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>OCDriverInfo</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>TCPIP</name>
+ <state>aaa.bbb.ccc.ddd</state>
+ </option>
+ <option>
+ <name>DoLogfile</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>LogFile</name>
+ <state>$TOOLKIT_DIR$\cspycomm.log</state>
+ </option>
+ <option>
+ <name>CCJTagBreakpointRadio</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCJTagDoUpdateBreakpoints</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCJTagUpdateBreakpoints</name>
+ <state>main</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>IARROM_ID</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>0</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>CRomLogFileCheck</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CRomLogFileEditB</name>
+ <state>$TOOLKIT_DIR$\cspycomm.log</state>
+ </option>
+ <option>
+ <name>CRomCommunication</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CRomCommPort</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CRomCommBaud</name>
+ <version>0</version>
+ <state>7</state>
+ </option>
+ <option>
+ <name>OCDriverInfo</name>
+ <state>1</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>JLINK_ID</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>9</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>JLinkSpeed</name>
+ <state>32</state>
+ </option>
+ <option>
+ <name>CCJLinkDoLogfile</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCJLinkLogFile</name>
+ <state>$TOOLKIT_DIR$\cspycomm.log</state>
+ </option>
+ <option>
+ <name>CCJLinkHWResetDelay</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OCDriverInfo</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>JLinkInitialSpeed</name>
+ <state>32</state>
+ </option>
+ <option>
+ <name>CCDoJlinkMultiTarget</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCScanChainNonARMDevices</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCJLinkMultiTarget</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCJLinkIRLength</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCJLinkCommRadio</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCJLinkTCPIP</name>
+ <state>aaa.bbb.ccc.ddd</state>
+ </option>
+ <option>
+ <name>CCJLinkSpeedRadioV2</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCUSBDevice</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCRDICatchReset</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCRDICatchUndef</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCRDICatchSWI</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCRDICatchData</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCRDICatchPrefetch</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCRDICatchIRQ</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCRDICatchFIQ</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCJLinkBreakpointRadio</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCJLinkDoUpdateBreakpoints</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCJLinkUpdateBreakpoints</name>
+ <state>main</state>
+ </option>
+ <option>
+ <name>CCJLinkInterfaceRadio</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OCJLinkAttachSlave</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CCJLinkResetList</name>
+ <version>0</version>
+ <state>5</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>LMIFTDI_ID</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>1</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>OCDriverInfo</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>LmiftdiSpeed</name>
+ <state>500</state>
+ </option>
+ <option>
+ <name>CCLmiftdiDoLogfile</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCLmiftdiLogFile</name>
+ <state>$TOOLKIT_DIR$\cspycomm.log</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>MACRAIGOR_ID</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>2</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>jtag</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>EmuSpeed</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>TCPIP</name>
+ <state>aaa.bbb.ccc.ddd</state>
+ </option>
+ <option>
+ <name>DoLogfile</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>LogFile</name>
+ <state>$TOOLKIT_DIR$\cspycomm.log</state>
+ </option>
+ <option>
+ <name>DoEmuMultiTarget</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>EmuMultiTarget</name>
+ <state>0@ARM7TDMI</state>
+ </option>
+ <option>
+ <name>EmuHWReset</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CEmuCommBaud</name>
+ <version>0</version>
+ <state>4</state>
+ </option>
+ <option>
+ <name>CEmuCommPort</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>jtago</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OCDriverInfo</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>UnusedAddr</name>
+ <state>0x00800000</state>
+ </option>
+ <option>
+ <name>CCMacraigorHWResetDelay</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CCJTagBreakpointRadio</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCJTagDoUpdateBreakpoints</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCJTagUpdateBreakpoints</name>
+ <state>main</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>RDI_ID</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>1</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>CRDIDriverDll</name>
+ <state>Browse to your RDI driver</state>
+ </option>
+ <option>
+ <name>CRDILogFileCheck</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CRDILogFileEdit</name>
+ <state>$TOOLKIT_DIR$\cspycomm.log</state>
+ </option>
+ <option>
+ <name>CCRDIHWReset</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCRDICatchReset</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCRDICatchUndef</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCRDICatchSWI</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCRDICatchData</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCRDICatchPrefetch</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCRDICatchIRQ</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCRDICatchFIQ</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCRDIUseETM</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OCDriverInfo</name>
+ <state>1</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>THIRDPARTY_ID</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>0</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>CThirdPartyDriverDll</name>
+ <state>Browse to your third-party driver</state>
+ </option>
+ <option>
+ <name>CThirdPartyLogFileCheck</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CThirdPartyLogFileEditB</name>
+ <state>$TOOLKIT_DIR$\cspycomm.log</state>
+ </option>
+ <option>
+ <name>OCDriverInfo</name>
+ <state>1</state>
+ </option>
+ </data>
+ </settings>
+ <debuggerPlugins>
+ <plugin>
+ <file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ewplugin</file>
+ <loadFlag>0</loadFlag>
+ </plugin>
+ <plugin>
+ <file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ewplugin</file>
+ <loadFlag>0</loadFlag>
+ </plugin>
+ <plugin>
+ <file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>
+ <loadFlag>0</loadFlag>
+ </plugin>
+ <plugin>
+ <file>$TOOLKIT_DIR$\plugins\rtos\OSE\OseEpsilonPlugin.ewplugin</file>
+ <loadFlag>0</loadFlag>
+ </plugin>
+ <plugin>
+ <file>$TOOLKIT_DIR$\plugins\rtos\PowerPac\PowerPacRTOS.ewplugin</file>
+ <loadFlag>0</loadFlag>
+ </plugin>
+ <plugin>
+ <file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ewplugin</file>
+ <loadFlag>0</loadFlag>
+ </plugin>
+ <plugin>
+ <file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>
+ <loadFlag>0</loadFlag>
+ </plugin>
+ <plugin>
+ <file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file>
+ <loadFlag>1</loadFlag>
+ </plugin>
+ <plugin>
+ <file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>
+ <loadFlag>0</loadFlag>
+ </plugin>
+ <plugin>
+ <file>$EW_DIR$\common\plugins\Profiling\Profiling.ENU.ewplugin</file>
+ <loadFlag>1</loadFlag>
+ </plugin>
+ <plugin>
+ <file>$EW_DIR$\common\plugins\Stack\Stack.ENU.ewplugin</file>
+ <loadFlag>1</loadFlag>
+ </plugin>
+ </debuggerPlugins>
+ </configuration>
+</project>
diff --git a/boards/dk-tm4c129x/enet_uip/enet_uip.ewp b/boards/dk-tm4c129x/enet_uip/enet_uip.ewp new file mode 100644 index 0000000..a4c24c1 --- /dev/null +++ b/boards/dk-tm4c129x/enet_uip/enet_uip.ewp @@ -0,0 +1,831 @@ +<?xml version="1.0" encoding="iso-8859-1"?>
+
+<project>
+ <fileVersion>1</fileVersion>
+ <configuration>
+ <name>Debug</name>
+ <toolchain>
+ <name>ARM</name>
+ </toolchain>
+ <debug>1</debug>
+ <settings>
+ <name>General</name>
+ <archiveVersion>3</archiveVersion>
+ <data>
+ <version>14</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>ExePath</name>
+ <state>ewarm\Exe</state>
+ </option>
+ <option>
+ <name>ObjPath</name>
+ <state>ewarm\Obj</state>
+ </option>
+ <option>
+ <name>ListPath</name>
+ <state>ewarm\List</state>
+ </option>
+ <option>
+ <name>Variant</name>
+ <version>19</version>
+ <state>39</state>
+ </option>
+ <option>
+ <name>GEndianMode</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>Input variant</name>
+ <version>1</version>
+ <state>3</state>
+ </option>
+ <option>
+ <name>Input description</name>
+ <state>No specifier n, no float nor long long, no scan set, no assignment suppressing.</state>
+ </option>
+ <option>
+ <name>Output variant</name>
+ <version>0</version>
+ <state>3</state>
+ </option>
+ <option>
+ <name>Output description</name>
+ <state>No specifier a, A, no specifier n, no float nor long long, no flags.</state>
+ </option>
+ <option>
+ <name>GOutputBinary</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>FPU</name>
+ <version>2</version>
+ <state>5</state>
+ </option>
+ <option>
+ <name>OGCoreOrChip</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>GRuntimeLibSelect</name>
+ <version>0</version>
+ <state>1</state>
+ </option>
+ <option>
+ <name>GRuntimeLibSelectSlave</name>
+ <version>0</version>
+ <state>1</state>
+ </option>
+ <option>
+ <name>RTDescription</name>
+ <state>Use the normal configuration of the C/C++ runtime library. No locale interface, C locale, no file descriptor support, no multibytes in printf and scanf, and no hex floats in strtod.</state>
+ </option>
+ <option>
+ <name>RTConfigPath</name>
+ <state>$TOOLKIT_DIR$\INC\DLib_Config_Normal.h</state>
+ </option>
+ <option>
+ <name>OGProductVersion</name>
+ <state>5.11.0.50579</state>
+ </option>
+ <option>
+ <name>OGLastSavedByProductVersion</name>
+ <state>5.11.0.50579</state>
+ </option>
+ <option>
+ <name>GeneralMisraRules</name>
+ <version>0</version>
+ <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+ </option>
+ <option>
+ <name>GeneralEnableMisra</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GeneralMisraVerbose</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGChipSelectEditMenu</name>
+ <state>TM4C129XNCZAD TexasInstruments TM4C129XNCZAD</state>
+ </option>
+ <option>
+ <name>GenLowLevelInterface</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>GEndianModeBE</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OGBufferedTerminalOutput</name>
+ <state>0</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>ICCARM</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>19</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>CCDefines</name>
+ <state>ewarm</state>
+ <state>PART_TM4C129XNCZAD</state>
+ <state>TARGET_IS_TM4C129_RA0</state>
+ <state>DEBUG_OUTPUT</state>
+ <state>UIP_OFFLOAD_ICMP_CHKSUM</state>
+ </option>
+ <option>
+ <name>CCPreprocFile</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCPreprocComments</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCPreprocLine</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCListCFile</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCListCMnemonics</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCListCMessages</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCListAssFile</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCListAssSource</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCEnableRemarks</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCDiagSuppress</name>
+ <state>Pa050</state>
+ </option>
+ <option>
+ <name>CCDiagRemark</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CCDiagWarning</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CCDiagError</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CCObjPrefix</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CCAllowList</name>
+ <version>1</version>
+ <state>1111111</state>
+ </option>
+ <option>
+ <name>CCDebugInfo</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IEndianMode</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IProcessor</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IExtraOptionsCheck</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IExtraOptions</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CCLangConformance</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCSignedPlainChar</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CCRequirePrototypes</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCMultibyteSupport</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCDiagWarnAreErr</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCCompilerRuntimeInfo</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IFpuProcessor</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OutputFile</name>
+ <state>$FILE_BNAME$.o</state>
+ </option>
+ <option>
+ <name>CCLangSelect</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCLibConfigHeader</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>PreInclude</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CompilerMisraRules</name>
+ <version>0</version>
+ <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+ </option>
+ <option>
+ <name>CompilerMisraOverride</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCIncludePath2</name>
+ <state>$PROJ_DIR$\.</state>
+ <state>$PROJ_DIR$\..</state>
+ <state>$PROJ_DIR$\..\..\..\..</state>
+ <state>$PROJ_DIR$\..\..\..\..\third_party\uip-1.0\apps</state>
+ <state>$PROJ_DIR$\..\..\..\..\third_party\uip-1.0\uip</state>
+ <state>$PROJ_DIR$\..\..\..\..\third_party\uip-1.0</state>
+ <state>$PROJ_DIR$\..\..\..\..\utils</state>
+ </option>
+ <option>
+ <name>CCStdIncCheck</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCStdIncludePath</name>
+ <state>$TOOLKIT_DIR$\INC\</state>
+ </option>
+ <option>
+ <name>CCCodeSection</name>
+ <state>.text</state>
+ </option>
+ <option>
+ <name>IInterwork2</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IProcessorMode2</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CCOptLevel</name>
+ <state>3</state>
+ </option>
+ <option>
+ <name>CCOptStrategy</name>
+ <version>0</version>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CCOptLevelSlave</name>
+ <state>3</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>AARM</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>7</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>AObjPrefix</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>AEndian</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>ACaseSensitivity</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>MacroChars</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AWarnEnable</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AWarnWhat</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AWarnOne</name>
+ <state></state>
+ </option>
+ <option>
+ <name>AWarnRange1</name>
+ <state></state>
+ </option>
+ <option>
+ <name>AWarnRange2</name>
+ <state></state>
+ </option>
+ <option>
+ <name>ADebug</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>AltRegisterNames</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>ADefines</name>
+ <state>ewarm</state>
+ </option>
+ <option>
+ <name>AList</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AListHeader</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>AListing</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>Includes</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>MacDefs</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>MacExps</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>MacExec</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OnlyAssed</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>MultiLine</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>PageLengthCheck</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>PageLength</name>
+ <state>80</state>
+ </option>
+ <option>
+ <name>TabSpacing</name>
+ <state>8</state>
+ </option>
+ <option>
+ <name>AXRef</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AXRefDefines</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AXRefInternal</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AXRefDual</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AProcessor</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>AFpuProcessor</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>AOutputFile</name>
+ <state>$FILE_BNAME$.o</state>
+ </option>
+ <option>
+ <name>AMultibyteSupport</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>ALimitErrorsCheck</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>ALimitErrorsEdit</name>
+ <state>100</state>
+ </option>
+ <option>
+ <name>AIgnoreStdInclude</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AStdIncludes</name>
+ <state>$TOOLKIT_DIR$\INC\</state>
+ </option>
+ <option>
+ <name>AUserIncludes</name>
+ <state>$PROJ_DIR$\.</state>
+ <state>$PROJ_DIR$\..</state>
+ <state>$PROJ_DIR$\..\..\..\..</state>
+ <state>$PROJ_DIR$\..\..\..\..\third_party\uip-1.0\apps</state>
+ <state>$PROJ_DIR$\..\..\..\..\third_party\uip-1.0\uip</state>
+ <state>$PROJ_DIR$\..\..\..\..\third_party\uip-1.0</state>
+ <state>$PROJ_DIR$\..\..\..\..\utils</state>
+ </option>
+ <option>
+ <name>AExtraOptionsCheckV2</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AExtraOptionsV2</name>
+ <state></state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>OBJCOPY</name>
+ <archiveVersion>0</archiveVersion>
+ <data>
+ <version>1</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>OOCOutputFormat</name>
+ <version>1</version>
+ <state>2</state>
+ </option>
+ <option>
+ <name>OCOutputOverride</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OOCOutputFile</name>
+ <state>enet_uip.bin</state>
+ </option>
+ <option>
+ <name>OOCCommandLineProducer</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OOCObjCopyEnable</name>
+ <state>1</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>CUSTOM</name>
+ <archiveVersion>3</archiveVersion>
+ <data>
+ <extensions></extensions>
+ <cmdline></cmdline>
+ </data>
+ </settings>
+ <settings>
+ <name>BICOMP</name>
+ <archiveVersion>0</archiveVersion>
+ <data/>
+ </settings>
+ <settings>
+ <name>BUILDACTION</name>
+ <archiveVersion>1</archiveVersion>
+ <data>
+ <prebuild></prebuild>
+ <postbuild></postbuild>
+ </data>
+ </settings>
+ <settings>
+ <name>ILINK</name>
+ <archiveVersion>0</archiveVersion>
+ <data>
+ <version>5</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>IlinkLibIOConfig</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>XLinkMisraHandler</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkInputFileSlave</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkOutputFile</name>
+ <state>enet_uip.out</state>
+ </option>
+ <option>
+ <name>IlinkDebugInfoEnable</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkKeepSymbols</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkRawBinaryFile</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkRawBinarySymbol</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkRawBinarySegment</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkRawBinaryAlign</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkDefines</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkConfigDefines</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkMapFile</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkLogFile</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkLogInitialization</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkLogModule</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkLogSection</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkLogVeneer</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkIcfOverride</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkIcfFile</name>
+ <state>$PROJ_DIR$\enet_uip.icf</state>
+ </option>
+ <option>
+ <name>IlinkIcfFileSlave</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkEnableRemarks</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkSuppressDiags</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkTreatAsRem</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkTreatAsWarn</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkTreatAsErr</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkWarningsAreErrors</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkUseExtraOptions</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkExtraOptions</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkLowLevelInterfaceSlave</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkAutoLibEnable</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkAdditionalLibs</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkOverrideProgramEntryLabel</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkProgramEntryLabelSelect</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkProgramEntryLabel</name>
+ <state>__iar_program_start</state>
+ </option>
+ <option>
+ <name>IlinkNXPLPCChecksum</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>DoFill</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>FillerByte</name>
+ <state>0xFF</state>
+ </option>
+ <option>
+ <name>FillerStart</name>
+ <state>0x0</state>
+ </option>
+ <option>
+ <name>FillerEnd</name>
+ <state>0x0</state>
+ </option>
+ <option>
+ <name>CrcSize</name>
+ <version>0</version>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CrcAlign</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CrcAlgo</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CrcPoly</name>
+ <state>0x11021</state>
+ </option>
+ <option>
+ <name>CrcCompl</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CrcBitOrder</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CrcInitialValue</name>
+ <state>0x0</state>
+ </option>
+ <option>
+ <name>DoCrc</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkBE8Slave</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkBufferedTerminalOutput</name>
+ <state>1</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>IARCHIVE</name>
+ <archiveVersion>0</archiveVersion>
+ <data>
+ <version>0</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>IarchiveInputs</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IarchiveOverride</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IarchiveOutput</name>
+ <state>###Unitialized###</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>BILINK</name>
+ <archiveVersion>0</archiveVersion>
+ <data/>
+ </settings>
+ </configuration>
+ <group>
+ <name>Libraries</name>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\..\driverlib\ewarm\Exe\driverlib.a</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\..\grlib\ewarm\Exe\grlib.a</name>
+ </file>
+ </group>
+ <group>
+ <name>Source</name>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\..\third_party\uip-1.0\apps\dhcpc\dhcpc.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\enet_uip.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\drivers\frame.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\..\third_party\uip-1.0\apps\httpd\httpd.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\drivers\kentec320x240x16_ssd2119.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\drivers\pinout.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\startup_ewarm.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\..\utils\uartstdio.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\..\third_party\uip-1.0\uip\uip.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\..\third_party\uip-1.0\uip\uip_arp.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\..\third_party\uip-1.0\uip\uip_timer.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\..\utils\ustdlib.c</name>
+ </file>
+ </group>
+</project>
diff --git a/boards/dk-tm4c129x/enet_uip/enet_uip.icf b/boards/dk-tm4c129x/enet_uip/enet_uip.icf new file mode 100644 index 0000000..9255df7 --- /dev/null +++ b/boards/dk-tm4c129x/enet_uip/enet_uip.icf @@ -0,0 +1,78 @@ +//*****************************************************************************
+//
+// enet_uip.icf - Linker configuration file for enet_uip.
+//
+// Copyright (c) 2013-2014 Texas Instruments Incorporated. All rights reserved.
+// Software License Agreement
+//
+// Texas Instruments (TI) is supplying this software for use solely and
+// exclusively on TI's microcontroller products. The software is owned by
+// TI and/or its suppliers, and is protected under applicable copyright
+// laws. You may not combine this software with "viral" open-source
+// software in order to form a larger program.
+//
+// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
+// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
+// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
+// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
+// DAMAGES, FOR ANY REASON WHATSOEVER.
+//
+// This is part of revision 2.1.0.12573 of the DK-TM4C129X Firmware Package.
+//
+//*****************************************************************************
+
+//
+// Define a memory region that covers the entire 4 GB addressible space of the
+// processor.
+//
+define memory mem with size = 4G;
+
+//
+// Define a region for the on-chip flash.
+//
+define region FLASH = mem:[from 0x00000000 to 0x000fffff];
+
+//
+// Define a region for the on-chip SRAM.
+//
+define region SRAM = mem:[from 0x20000000 to 0x2003ffff];
+
+//
+// Define a block for the heap. The size should be set to something other
+// than zero if things in the C library that require the heap are used.
+//
+define block HEAP with alignment = 8, size = 0x00000000 { };
+
+//
+// Indicate that the read/write values should be initialized by copying from
+// flash.
+//
+initialize by copy { readwrite };
+
+//
+// Indicate that the noinit values should be left alone. This includes the
+// stack, which if initialized will destroy the return address from the
+// initialization code, causing the processor to branch to zero and fault.
+//
+do not initialize { section .noinit };
+
+//
+// Place the interrupt vectors at the start of flash.
+//
+place at start of FLASH { readonly section .intvec };
+
+//
+// Place the remainder of the read-only items into flash.
+//
+place in FLASH { readonly };
+
+//
+// Place the RAM vector table at the start of SRAM.
+//
+place at start of SRAM { section VTABLE };
+
+//
+// Place all read/write items into SRAM.
+//
+place in SRAM { readwrite, block HEAP };
diff --git a/boards/dk-tm4c129x/enet_uip/enet_uip.ld b/boards/dk-tm4c129x/enet_uip/enet_uip.ld new file mode 100644 index 0000000..beef25d --- /dev/null +++ b/boards/dk-tm4c129x/enet_uip/enet_uip.ld @@ -0,0 +1,57 @@ +/******************************************************************************
+ *
+ * enet_uip.ld - Linker configuration file for enet_uip.
+ *
+ * Copyright (c) 2013-2014 Texas Instruments Incorporated. All rights reserved.
+ * Software License Agreement
+ *
+ * Texas Instruments (TI) is supplying this software for use solely and
+ * exclusively on TI's microcontroller products. The software is owned by
+ * TI and/or its suppliers, and is protected under applicable copyright
+ * laws. You may not combine this software with "viral" open-source
+ * software in order to form a larger program.
+ *
+ * THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
+ * NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
+ * NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
+ * CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
+ * DAMAGES, FOR ANY REASON WHATSOEVER.
+ *
+ * This is part of revision 2.1.0.12573 of the DK-TM4C129X Firmware Package.
+ *
+ *****************************************************************************/
+
+MEMORY
+{
+ FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x00100000
+ SRAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00040000
+}
+
+SECTIONS
+{
+ .text :
+ {
+ _text = .;
+ KEEP(*(.isr_vector))
+ *(.text*)
+ *(.rodata*)
+ _etext = .;
+ } > FLASH
+
+ .data : AT(ADDR(.text) + SIZEOF(.text))
+ {
+ _data = .;
+ *(vtable)
+ *(.data*)
+ _edata = .;
+ } > SRAM
+
+ .bss :
+ {
+ _bss = .;
+ *(.bss*)
+ *(COMMON)
+ _ebss = .;
+ } > SRAM
+}
diff --git a/boards/dk-tm4c129x/enet_uip/enet_uip.sct b/boards/dk-tm4c129x/enet_uip/enet_uip.sct new file mode 100644 index 0000000..53e9515 --- /dev/null +++ b/boards/dk-tm4c129x/enet_uip/enet_uip.sct @@ -0,0 +1,47 @@ +;******************************************************************************
+;
+; enet_uip.sct - Linker configuration file for enet_uip.
+;
+; Copyright (c) 2013-2014 Texas Instruments Incorporated. All rights reserved.
+; Software License Agreement
+;
+; Texas Instruments (TI) is supplying this software for use solely and
+; exclusively on TI's microcontroller products. The software is owned by
+; TI and/or its suppliers, and is protected under applicable copyright
+; laws. You may not combine this software with "viral" open-source
+; software in order to form a larger program.
+;
+; THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
+; NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
+; NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+; A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
+; CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
+; DAMAGES, FOR ANY REASON WHATSOEVER.
+;
+; This is part of revision 2.1.0.12573 of the DK-TM4C129X Firmware Package.
+;
+;******************************************************************************
+
+LR_IROM 0x00000000 0x00100000
+{
+ ;
+ ; Specify the Execution Address of the code and the size.
+ ;
+ ER_IROM 0x00000000 0x00100000
+ {
+ *.o (RESET, +First)
+ * (InRoot$$Sections, +RO)
+ }
+
+ ;
+ ; Specify the Execution Address of the data area.
+ ;
+ RW_IRAM 0x20000000 0x00040000
+ {
+ ;
+ ; Uncomment the following line in order to use IntRegister().
+ ;
+ ;* (vtable, +First)
+ * (+RW, +ZI)
+ }
+}
diff --git a/boards/dk-tm4c129x/enet_uip/enet_uip.uvopt b/boards/dk-tm4c129x/enet_uip/enet_uip.uvopt new file mode 100644 index 0000000..d77228e --- /dev/null +++ b/boards/dk-tm4c129x/enet_uip/enet_uip.uvopt @@ -0,0 +1,443 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_opt.xsd">
+
+ <SchemaVersion>1.0</SchemaVersion>
+
+ <Header>### uVision Project, (C) Keil Software</Header>
+
+ <Extensions>
+ <cExt>*.c</cExt>
+ <aExt>*.s*; *.src; *.a*</aExt>
+ <oExt>*.obj</oExt>
+ <lExt>*.lib</lExt>
+ <tExt>*.txt; *.h; *.inc</tExt>
+ <pExt>*.plm</pExt>
+ <CppX>*.cpp</CppX>
+ </Extensions>
+
+ <DaveTm>
+ <dwLowDateTime>0</dwLowDateTime>
+ <dwHighDateTime>0</dwHighDateTime>
+ </DaveTm>
+
+ <Target>
+ <TargetName>enet_uip</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <TargetOption>
+ <CLKADS>25000000</CLKADS>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>1</RunSim>
+ <RunTarget>0</RunTarget>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>79</PageWidth>
+ <PageLength>66</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\rvmdk\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
+ <CreateIListing>0</CreateIListing>
+ <AsmCond>1</AsmCond>
+ <AsmSymb>1</AsmSymb>
+ <AsmXref>0</AsmXref>
+ <CCond>1</CCond>
+ <CCode>0</CCode>
+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
+ <LinkerCodeListing>0</LinkerCodeListing>
+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
+ <LGenerateSymbols>1</LGenerateSymbols>
+ <LLibSym>1</LLibSym>
+ <LLines>1</LLines>
+ <LLocSym>1</LLocSym>
+ <LPubSym>1</LPubSym>
+ <LXref>0</LXref>
+ <LExpSel>0</LExpSel>
+ </OPTXL>
+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>1</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>255</CpuCode>
+ <Books>
+ <Book>
+ <Number>0</Number>
+ <Title>Data Sheet</Title>
+ <Path>DATASHTS\Luminary\TM4C129XNCZAD.PDF</Path>
+ </Book>
+ </Books>
+ <DllOpt>
+ <SimDllName>SARMCM3.DLL</SimDllName>
+ <SimDllArguments>-MPU</SimDllArguments>
+ <SimDlgDllName>DCM.DLL</SimDlgDllName>
+ <SimDlgDllArguments>-pCM4</SimDlgDllArguments>
+ <TargetDllName>SARMCM3.DLL</TargetDllName>
+ <TargetDllArguments>-MPU</TargetDllArguments>
+ <TargetDlgDllName>TCM.DLL</TargetDlgDllName>
+ <TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
+ </DllOpt>
+ <DebugOpt>
+ <uSim>0</uSim>
+ <uTrg>1</uTrg>
+ <sLdApp>1</sLdApp>
+ <sGomain>1</sGomain>
+ <sRbreak>1</sRbreak>
+ <sRwatch>1</sRwatch>
+ <sRmem>1</sRmem>
+ <sRfunc>1</sRfunc>
+ <sRbox>1</sRbox>
+ <tLdApp>1</tLdApp>
+ <tGomain>0</tGomain>
+ <tRbreak>1</tRbreak>
+ <tRwatch>1</tRwatch>
+ <tRmem>1</tRmem>
+ <tRfunc>0</tRfunc>
+ <tRbox>1</tRbox>
+ <sRunDeb>0</sRunDeb>
+ <sLrtime>0</sLrtime>
+ <nTsel>4</nTsel>
+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile></sIfile>
+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile></tIfile>
+ <pMon>BIN\lmidk-agdi.dll</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>lmidk-agdi</Key>
+ <Name>-O4614 -S1 -FO29</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGTARM</Key>
+ <Name></Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMDBGFLAGS</Key>
+ <Name></Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
+ <DebugFlag>
+ <trace>0</trace>
+ <periodic>1</periodic>
+ <aLwin>0</aLwin>
+ <aCover>0</aCover>
+ <aSer1>0</aSer1>
+ <aSer2>0</aSer2>
+ <aPa>0</aPa>
+ <viewmode>1</viewmode>
+ <vrSel>0</vrSel>
+ <aSym>0</aSym>
+ <aTbox>0</aTbox>
+ <AscS1>0</AscS1>
+ <AscS2>0</AscS2>
+ <AscS3>0</AscS3>
+ <aSer3>0</aSer3>
+ <eProf>0</eProf>
+ <aLa>0</aLa>
+ <aPa1>0</aPa1>
+ <AscS4>0</AscS4>
+ <aSer4>0</aSer4>
+ <StkLoc>0</StkLoc>
+ <TrcWin>0</TrcWin>
+ <newCpu>0</newCpu>
+ <uProt>0</uProt>
+ </DebugFlag>
+ <LintExecutable></LintExecutable>
+ <LintConfigFile></LintConfigFile>
+ </TargetOption>
+ </Target>
+
+ <Group>
+ <GroupName>Source</GroupName>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <cbSel>0</cbSel>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>1</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <Focus>0</Focus>
+ <ColumnNumber>0</ColumnNumber>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <TopLine>0</TopLine>
+ <CurrentLine>0</CurrentLine>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\..\..\third_party\uip-1.0\apps\dhcpc\dhcpc.c</PathWithFileName>
+ <FilenameWithoutPath>dhcpc.c</FilenameWithoutPath>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>2</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <Focus>0</Focus>
+ <ColumnNumber>0</ColumnNumber>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <TopLine>0</TopLine>
+ <CurrentLine>0</CurrentLine>
+ <bDave2>0</bDave2>
+ <PathWithFileName>.\enet_uip.c</PathWithFileName>
+ <FilenameWithoutPath>enet_uip.c</FilenameWithoutPath>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>3</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <Focus>0</Focus>
+ <ColumnNumber>0</ColumnNumber>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <TopLine>0</TopLine>
+ <CurrentLine>0</CurrentLine>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\drivers\frame.c</PathWithFileName>
+ <FilenameWithoutPath>frame.c</FilenameWithoutPath>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>4</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <Focus>0</Focus>
+ <ColumnNumber>0</ColumnNumber>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <TopLine>0</TopLine>
+ <CurrentLine>0</CurrentLine>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\..\..\third_party\uip-1.0\apps\httpd\httpd.c</PathWithFileName>
+ <FilenameWithoutPath>httpd.c</FilenameWithoutPath>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>5</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <Focus>0</Focus>
+ <ColumnNumber>0</ColumnNumber>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <TopLine>0</TopLine>
+ <CurrentLine>0</CurrentLine>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\drivers\kentec320x240x16_ssd2119.c</PathWithFileName>
+ <FilenameWithoutPath>kentec320x240x16_ssd2119.c</FilenameWithoutPath>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>6</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <Focus>0</Focus>
+ <ColumnNumber>0</ColumnNumber>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <TopLine>0</TopLine>
+ <CurrentLine>0</CurrentLine>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\drivers\pinout.c</PathWithFileName>
+ <FilenameWithoutPath>pinout.c</FilenameWithoutPath>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>7</FileNumber>
+ <FileType>2</FileType>
+ <tvExp>0</tvExp>
+ <Focus>0</Focus>
+ <ColumnNumber>0</ColumnNumber>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <TopLine>0</TopLine>
+ <CurrentLine>0</CurrentLine>
+ <bDave2>0</bDave2>
+ <PathWithFileName>.\startup_rvmdk.S</PathWithFileName>
+ <FilenameWithoutPath>startup_rvmdk.S</FilenameWithoutPath>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>8</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <Focus>0</Focus>
+ <ColumnNumber>0</ColumnNumber>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <TopLine>0</TopLine>
+ <CurrentLine>0</CurrentLine>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\..\..\utils\uartstdio.c</PathWithFileName>
+ <FilenameWithoutPath>uartstdio.c</FilenameWithoutPath>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>9</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <Focus>0</Focus>
+ <ColumnNumber>0</ColumnNumber>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <TopLine>0</TopLine>
+ <CurrentLine>0</CurrentLine>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\..\..\third_party\uip-1.0\uip\uip.c</PathWithFileName>
+ <FilenameWithoutPath>uip.c</FilenameWithoutPath>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>10</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <Focus>0</Focus>
+ <ColumnNumber>0</ColumnNumber>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <TopLine>0</TopLine>
+ <CurrentLine>0</CurrentLine>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\..\..\third_party\uip-1.0\uip\uip_arp.c</PathWithFileName>
+ <FilenameWithoutPath>uip_arp.c</FilenameWithoutPath>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>11</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <Focus>0</Focus>
+ <ColumnNumber>0</ColumnNumber>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <TopLine>0</TopLine>
+ <CurrentLine>0</CurrentLine>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\..\..\third_party\uip-1.0\uip\uip_timer.c</PathWithFileName>
+ <FilenameWithoutPath>uip_timer.c</FilenameWithoutPath>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>12</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <Focus>0</Focus>
+ <ColumnNumber>0</ColumnNumber>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <TopLine>0</TopLine>
+ <CurrentLine>0</CurrentLine>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\..\..\utils\ustdlib.c</PathWithFileName>
+ <FilenameWithoutPath>ustdlib.c</FilenameWithoutPath>
+ </File>
+ </Group>
+
+ <Group>
+ <GroupName>Libraries</GroupName>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <cbSel>0</cbSel>
+ <File>
+ <GroupNumber>2</GroupNumber>
+ <FileNumber>13</FileNumber>
+ <FileType>4</FileType>
+ <tvExp>0</tvExp>
+ <Focus>0</Focus>
+ <ColumnNumber>0</ColumnNumber>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <TopLine>0</TopLine>
+ <CurrentLine>0</CurrentLine>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\..\..\driverlib\rvmdk\driverlib.lib</PathWithFileName>
+ <FilenameWithoutPath>driverlib.lib</FilenameWithoutPath>
+ </File>
+ <File>
+ <GroupNumber>2</GroupNumber>
+ <FileNumber>14</FileNumber>
+ <FileType>4</FileType>
+ <tvExp>0</tvExp>
+ <Focus>0</Focus>
+ <ColumnNumber>0</ColumnNumber>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <TopLine>0</TopLine>
+ <CurrentLine>0</CurrentLine>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\..\..\grlib\rvmdk\grlib.lib</PathWithFileName>
+ <FilenameWithoutPath>grlib.lib</FilenameWithoutPath>
+ </File>
+ </Group>
+
+ <Group>
+ <GroupName>Documentation</GroupName>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <cbSel>0</cbSel>
+ <File>
+ <GroupNumber>3</GroupNumber>
+ <FileNumber>15</FileNumber>
+ <FileType>5</FileType>
+ <tvExp>0</tvExp>
+ <Focus>1</Focus>
+ <ColumnNumber>0</ColumnNumber>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <TopLine>1</TopLine>
+ <CurrentLine>1</CurrentLine>
+ <bDave2>0</bDave2>
+ <PathWithFileName>.\readme.txt</PathWithFileName>
+ <FilenameWithoutPath>readme.txt</FilenameWithoutPath>
+ <WindowPosition>
+ <length>44</length>
+ <flags>0</flags>
+ <showCmd>1</showCmd>
+ <MinPosition>
+ <xPos>-1</xPos>
+ <yPos>-1</yPos>
+ </MinPosition>
+ <MaxPosition>
+ <xPos>-1</xPos>
+ <yPos>-1</yPos>
+ </MaxPosition>
+ <NormalPosition>
+ <Top>0</Top>
+ <Left>0</Left>
+ <Right>729</Right>
+ <Bottom>300</Bottom>
+ </NormalPosition>
+ </WindowPosition>
+ </File>
+ </Group>
+
+ <MDIGroups>
+ <Orientation>1</Orientation>
+ <ActiveMDIGroup>0</ActiveMDIGroup>
+ <MDIGroup>
+ <Size>100</Size>
+ <ActiveTab>0</ActiveTab>
+ <Documents>
+ <Doc>
+ <Name>.\readme.txt</Name>
+ <ColumnNumber>0</ColumnNumber>
+ <TopLine>1</TopLine>
+ <CurrentLine>1</CurrentLine>
+ </Doc>
+ </Documents>
+ </MDIGroup>
+ </MDIGroups>
+
+</ProjectOpt>
diff --git a/boards/dk-tm4c129x/enet_uip/enet_uip.uvproj b/boards/dk-tm4c129x/enet_uip/enet_uip.uvproj new file mode 100644 index 0000000..5b5af9c --- /dev/null +++ b/boards/dk-tm4c129x/enet_uip/enet_uip.uvproj @@ -0,0 +1,479 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_proj.xsd">
+
+ <SchemaVersion>1.1</SchemaVersion>
+
+ <Header>### uVision Project, (C) Keil Software</Header>
+
+ <Targets>
+ <Target>
+ <TargetName>enet_uip</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <TargetOption>
+ <TargetCommonOption>
+ <Device>TM4C129XNCZAD</Device>
+ <Vendor>Texas Instruments</Vendor>
+ <Cpu>IRAM(0x20000000-0x2003FFFF) IROM(0-0xFFFFF) CLOCK(25000000) CPUTYPE("Cortex-M4") FPU2</Cpu>
+ <FlashUtilSpec></FlashUtilSpec>
+ <StartupFile>"STARTUP\Luminary\Startup.s" ("Luminary Startup Code")</StartupFile>
+ <FlashDriverDll>UL2CM3(-O207 -S0 -C0 -FO7 -FD20000000 -FC800 -FN1 -FF0LM4F_1024 -FS00 -FL0100000)</FlashDriverDll>
+ <DeviceId>5919</DeviceId>
+ <RegisterFile>LM4Fxxxx.H</RegisterFile>
+ <MemoryEnv></MemoryEnv>
+ <Cmp></Cmp>
+ <Asm></Asm>
+ <Linker></Linker>
+ <OHString></OHString>
+ <InfinionOptionDll></InfinionOptionDll>
+ <SLE66CMisc></SLE66CMisc>
+ <SLE66AMisc></SLE66AMisc>
+ <SLE66LinkerMisc></SLE66LinkerMisc>
+ <UseEnv>0</UseEnv>
+ <BinPath></BinPath>
+ <IncludePath></IncludePath>
+ <LibPath></LibPath>
+ <RegisterFilePath>Luminary\</RegisterFilePath>
+ <DBRegisterFilePath>Luminary\</DBRegisterFilePath>
+ <TargetStatus>
+ <Error>0</Error>
+ <ExitCodeStop>0</ExitCodeStop>
+ <ButtonStop>0</ButtonStop>
+ <NotGenerated>0</NotGenerated>
+ <InvalidFlash>1</InvalidFlash>
+ </TargetStatus>
+ <OutputDirectory>.\rvmdk\</OutputDirectory>
+ <OutputName>enet_uip</OutputName>
+ <CreateExecutable>1</CreateExecutable>
+ <CreateLib>0</CreateLib>
+ <CreateHexFile>0</CreateHexFile>
+ <DebugInformation>1</DebugInformation>
+ <BrowseInformation>1</BrowseInformation>
+ <ListingPath>.\rvmdk\</ListingPath>
+ <HexFormatSelection>1</HexFormatSelection>
+ <Merge32K>0</Merge32K>
+ <CreateBatchFile>0</CreateBatchFile>
+ <BeforeCompile>
+ <RunUserProg1>0</RunUserProg1>
+ <RunUserProg2>0</RunUserProg2>
+ <UserProg1Name></UserProg1Name>
+ <UserProg2Name></UserProg2Name>
+ <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+ <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+ </BeforeCompile>
+ <BeforeMake>
+ <RunUserProg1>0</RunUserProg1>
+ <RunUserProg2>0</RunUserProg2>
+ <UserProg1Name></UserProg1Name>
+ <UserProg2Name></UserProg2Name>
+ <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+ <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+ </BeforeMake>
+ <AfterMake>
+ <RunUserProg1>1</RunUserProg1>
+ <RunUserProg2>0</RunUserProg2>
+ <UserProg1Name>fromelf --bin --output .\rvmdk\enet_uip.bin .\rvmdk\enet_uip.axf</UserProg1Name>
+ <UserProg2Name></UserProg2Name>
+ <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+ <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+ </AfterMake>
+ <SelectedForBatchBuild>0</SelectedForBatchBuild>
+ <SVCSIdString></SVCSIdString>
+ </TargetCommonOption>
+ <CommonProperty>
+ <UseCPPCompiler>0</UseCPPCompiler>
+ <RVCTCodeConst>0</RVCTCodeConst>
+ <RVCTZI>0</RVCTZI>
+ <RVCTOtherData>0</RVCTOtherData>
+ <ModuleSelection>0</ModuleSelection>
+ <IncludeInBuild>1</IncludeInBuild>
+ <AlwaysBuild>0</AlwaysBuild>
+ <GenerateAssemblyFile>0</GenerateAssemblyFile>
+ <AssembleAssemblyFile>0</AssembleAssemblyFile>
+ <PublicsOnly>0</PublicsOnly>
+ <StopOnExitCode>3</StopOnExitCode>
+ <CustomArgument></CustomArgument>
+ <IncludeLibraryModules></IncludeLibraryModules>
+ </CommonProperty>
+ <DllOption>
+ <SimDllName>SARMCM3.DLL</SimDllName>
+ <SimDllArguments>-MPU</SimDllArguments>
+ <SimDlgDll>DCM.DLL</SimDlgDll>
+ <SimDlgDllArguments>-pCM4</SimDlgDllArguments>
+ <TargetDllName>SARMCM3.DLL</TargetDllName>
+ <TargetDllArguments>-MPU</TargetDllArguments>
+ <TargetDlgDll>TCM.DLL</TargetDlgDll>
+ <TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
+ </DllOption>
+ <DebugOption>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ <Oh166RecLen>16</Oh166RecLen>
+ </OPTHX>
+ <Simulator>
+ <UseSimulator>0</UseSimulator>
+ <LoadApplicationAtStartup>1</LoadApplicationAtStartup>
+ <RunToMain>1</RunToMain>
+ <RestoreBreakpoints>1</RestoreBreakpoints>
+ <RestoreWatchpoints>1</RestoreWatchpoints>
+ <RestoreMemoryDisplay>1</RestoreMemoryDisplay>
+ <RestoreFunctions>1</RestoreFunctions>
+ <RestoreToolbox>1</RestoreToolbox>
+ <LimitSpeedToRealTime>0</LimitSpeedToRealTime>
+ </Simulator>
+ <Target>
+ <UseTarget>1</UseTarget>
+ <LoadApplicationAtStartup>1</LoadApplicationAtStartup>
+ <RunToMain>0</RunToMain>
+ <RestoreBreakpoints>1</RestoreBreakpoints>
+ <RestoreWatchpoints>1</RestoreWatchpoints>
+ <RestoreMemoryDisplay>1</RestoreMemoryDisplay>
+ <RestoreFunctions>0</RestoreFunctions>
+ <RestoreToolbox>1</RestoreToolbox>
+ </Target>
+ <RunDebugAfterBuild>0</RunDebugAfterBuild>
+ <TargetSelection>4</TargetSelection>
+ <SimDlls>
+ <CpuDll></CpuDll>
+ <CpuDllArguments></CpuDllArguments>
+ <PeripheralDll></PeripheralDll>
+ <PeripheralDllArguments></PeripheralDllArguments>
+ <InitializationFile></InitializationFile>
+ </SimDlls>
+ <TargetDlls>
+ <CpuDll></CpuDll>
+ <CpuDllArguments></CpuDllArguments>
+ <PeripheralDll></PeripheralDll>
+ <PeripheralDllArguments></PeripheralDllArguments>
+ <InitializationFile></InitializationFile>
+ <Driver>BIN\lmidk-agdi.dll</Driver>
+ </TargetDlls>
+ </DebugOption>
+ <Utilities>
+ <Flash1>
+ <UseTargetDll>1</UseTargetDll>
+ <UseExternalTool>0</UseExternalTool>
+ <RunIndependent>0</RunIndependent>
+ <UpdateFlashBeforeDebugging>0</UpdateFlashBeforeDebugging>
+ <Capability>1</Capability>
+ <DriverSelection>4099</DriverSelection>
+ </Flash1>
+ <Flash2>BIN\lmidk-agdi.dll</Flash2>
+ <Flash3></Flash3>
+ <Flash4></Flash4>
+ </Utilities>
+ <TargetArmAds>
+ <ArmAdsMisc>
+ <GenerateListings>0</GenerateListings>
+ <asHll>1</asHll>
+ <asAsm>1</asAsm>
+ <asMacX>1</asMacX>
+ <asSyms>1</asSyms>
+ <asFals>1</asFals>
+ <asDbgD>1</asDbgD>
+ <asForm>1</asForm>
+ <ldLst>0</ldLst>
+ <ldmm>1</ldmm>
+ <ldXref>1</ldXref>
+ <BigEnd>0</BigEnd>
+ <AdsALst>0</AdsALst>
+ <AdsACrf>0</AdsACrf>
+ <AdsANop>0</AdsANop>
+ <AdsANot>0</AdsANot>
+ <AdsLLst>1</AdsLLst>
+ <AdsLmap>1</AdsLmap>
+ <AdsLcgr>1</AdsLcgr>
+ <AdsLsym>1</AdsLsym>
+ <AdsLszi>1</AdsLszi>
+ <AdsLtoi>1</AdsLtoi>
+ <AdsLsun>1</AdsLsun>
+ <AdsLven>1</AdsLven>
+ <AdsLsxf>1</AdsLsxf>
+ <RvctClst>0</RvctClst>
+ <GenPPlst>0</GenPPlst>
+ <AdsCpuType>"Cortex-M4"</AdsCpuType>
+ <RvctDeviceName></RvctDeviceName>
+ <mOS>0</mOS>
+ <uocRom>0</uocRom>
+ <uocRam>0</uocRam>
+ <hadIROM>1</hadIROM>
+ <hadIRAM>1</hadIRAM>
+ <hadXRAM>0</hadXRAM>
+ <uocXRam>0</uocXRam>
+ <RvdsVP>2</RvdsVP>
+ <hadIRAM2>0</hadIRAM2>
+ <hadIROM2>0</hadIROM2>
+ <StupSel>8</StupSel>
+ <useUlib>1</useUlib>
+ <EndSel>0</EndSel>
+ <uLtcg>0</uLtcg>
+ <RoSelD>3</RoSelD>
+ <RwSelD>3</RwSelD>
+ <CodeSel>0</CodeSel>
+ <OptFeed>0</OptFeed>
+ <NoZi1>0</NoZi1>
+ <NoZi2>0</NoZi2>
+ <NoZi3>0</NoZi3>
+ <NoZi4>0</NoZi4>
+ <NoZi5>0</NoZi5>
+ <Ro1Chk>0</Ro1Chk>
+ <Ro2Chk>0</Ro2Chk>
+ <Ro3Chk>0</Ro3Chk>
+ <Ir1Chk>1</Ir1Chk>
+ <Ir2Chk>0</Ir2Chk>
+ <Ra1Chk>0</Ra1Chk>
+ <Ra2Chk>0</Ra2Chk>
+ <Ra3Chk>0</Ra3Chk>
+ <Im1Chk>1</Im1Chk>
+ <Im2Chk>0</Im2Chk>
+ <OnChipMemories>
+ <Ocm1>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm1>
+ <Ocm2>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm2>
+ <Ocm3>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm3>
+ <Ocm4>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm4>
+ <Ocm5>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm5>
+ <Ocm6>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm6>
+ <IRAM>
+ <Type>0</Type>
+ <StartAddress>0x20000000</StartAddress>
+ <Size>0x40000</Size>
+ </IRAM>
+ <IROM>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x100000</Size>
+ </IROM>
+ <XRAM>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </XRAM>
+ <OCR_RVCT1>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT1>
+ <OCR_RVCT2>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT2>
+ <OCR_RVCT3>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT3>
+ <OCR_RVCT4>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x100000</Size>
+ </OCR_RVCT4>
+ <OCR_RVCT5>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT5>
+ <OCR_RVCT6>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT6>
+ <OCR_RVCT7>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT7>
+ <OCR_RVCT8>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT8>
+ <OCR_RVCT9>
+ <Type>0</Type>
+ <StartAddress>0x20000000</StartAddress>
+ <Size>0x40000</Size>
+ </OCR_RVCT9>
+ <OCR_RVCT10>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT10>
+ </OnChipMemories>
+ <RvctStartVector></RvctStartVector>
+ </ArmAdsMisc>
+ <Cads>
+ <interw>0</interw>
+ <Optim>3</Optim>
+ <oTime>0</oTime>
+ <SplitLS>0</SplitLS>
+ <OneElfS>1</OneElfS>
+ <Strict>0</Strict>
+ <EnumInt>0</EnumInt>
+ <PlainCh>0</PlainCh>
+ <Ropi>0</Ropi>
+ <Rwpi>0</Rwpi>
+ <wLevel>2</wLevel>
+ <uThumb>0</uThumb>
+ <VariousControls>
+ <MiscControls>--c99</MiscControls>
+ <Define>rvmdk PART_TM4C129XNCZAD TARGET_IS_TM4C129_RA0 DEBUG_OUTPUT UIP_OFFLOAD_ICMP_CHKSUM</Define>
+ <Undefine></Undefine>
+ <IncludePath>.;..;..\..\..\..;..\..\..\..\third_party\uip-1.0\apps;..\..\..\..\third_party\uip-1.0\uip;..\..\..\..\third_party\uip-1.0;..\..\..\..\utils;</IncludePath>
+ </VariousControls>
+ </Cads>
+ <Aads>
+ <interw>1</interw>
+ <Ropi>0</Ropi>
+ <Rwpi>0</Rwpi>
+ <thumb>0</thumb>
+ <SplitLS>0</SplitLS>
+ <SwStkChk>0</SwStkChk>
+ <NoWarn>0</NoWarn>
+ <VariousControls>
+ <MiscControls></MiscControls>
+ <Define></Define>
+ <Undefine></Undefine>
+ <IncludePath></IncludePath>
+ </VariousControls>
+ </Aads>
+ <LDads>
+ <umfTarg>0</umfTarg>
+ <Ropi>0</Ropi>
+ <Rwpi>0</Rwpi>
+ <noStLib>0</noStLib>
+ <RepFail>1</RepFail>
+ <useFile>0</useFile>
+ <TextAddressRange>0x00000000</TextAddressRange>
+ <DataAddressRange>0x20000000</DataAddressRange>
+ <ScatterFile>enet_uip.sct</ScatterFile>
+ <IncludeLibs></IncludeLibs>
+ <IncludeLibsPath></IncludeLibsPath>
+ <Misc>--entry Reset_Handler</Misc>
+ <LinkerInputFile></LinkerInputFile>
+ <DisabledWarnings></DisabledWarnings>
+ </LDads>
+ </TargetArmAds>
+ </TargetOption>
+ <Groups>
+ <Group>
+ <GroupName>Source</GroupName>
+ <Files>
+ <File>
+ <FileName>dhcpc.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\third_party\uip-1.0\apps\dhcpc\dhcpc.c</FilePath>
+ </File>
+ <File>
+ <FileName>enet_uip.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>.\enet_uip.c</FilePath>
+ </File>
+ <File>
+ <FileName>frame.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\drivers\frame.c</FilePath>
+ </File>
+ <File>
+ <FileName>httpd.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\third_party\uip-1.0\apps\httpd\httpd.c</FilePath>
+ </File>
+ <File>
+ <FileName>kentec320x240x16_ssd2119.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\drivers\kentec320x240x16_ssd2119.c</FilePath>
+ </File>
+ <File>
+ <FileName>pinout.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\drivers\pinout.c</FilePath>
+ </File>
+ <File>
+ <FileName>startup_rvmdk.S</FileName>
+ <FileType>2</FileType>
+ <FilePath>.\startup_rvmdk.S</FilePath>
+ </File>
+ <File>
+ <FileName>uartstdio.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\utils\uartstdio.c</FilePath>
+ </File>
+ <File>
+ <FileName>uip.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\third_party\uip-1.0\uip\uip.c</FilePath>
+ </File>
+ <File>
+ <FileName>uip_arp.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\third_party\uip-1.0\uip\uip_arp.c</FilePath>
+ </File>
+ <File>
+ <FileName>uip_timer.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\third_party\uip-1.0\uip\uip_timer.c</FilePath>
+ </File>
+ <File>
+ <FileName>ustdlib.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\utils\ustdlib.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>Libraries</GroupName>
+ <Files>
+ <File>
+ <FileName>driverlib.lib</FileName>
+ <FileType>4</FileType>
+ <FilePath>..\..\..\..\driverlib\rvmdk\driverlib.lib</FilePath>
+ </File>
+ <File>
+ <FileName>grlib.lib</FileName>
+ <FileType>4</FileType>
+ <FilePath>..\..\..\..\grlib\rvmdk\grlib.lib</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>Documentation</GroupName>
+ <Files>
+ <File>
+ <FileName>readme.txt</FileName>
+ <FileType>5</FileType>
+ <FilePath>.\readme.txt</FilePath>
+ </File>
+ </Files>
+ </Group>
+ </Groups>
+ </Target>
+ </Targets>
+
+</Project>
diff --git a/boards/dk-tm4c129x/enet_uip/enet_uip_ccs.cmd b/boards/dk-tm4c129x/enet_uip/enet_uip_ccs.cmd new file mode 100644 index 0000000..ed998cf --- /dev/null +++ b/boards/dk-tm4c129x/enet_uip/enet_uip_ccs.cmd @@ -0,0 +1,70 @@ +/******************************************************************************
+ *
+ * enet_uip_ccs.cmd - CCS linker configuration file for enet_uip.
+ *
+ * Copyright (c) 2013-2014 Texas Instruments Incorporated. All rights reserved.
+ * Software License Agreement
+ *
+ * Texas Instruments (TI) is supplying this software for use solely and
+ * exclusively on TI's microcontroller products. The software is owned by
+ * TI and/or its suppliers, and is protected under applicable copyright
+ * laws. You may not combine this software with "viral" open-source
+ * software in order to form a larger program.
+ *
+ * THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
+ * NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
+ * NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
+ * CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
+ * DAMAGES, FOR ANY REASON WHATSOEVER.
+ *
+ * This is part of revision 2.1.0.12573 of the DK-TM4C129X Firmware Package.
+ *
+ *****************************************************************************/
+
+--retain=g_pfnVectors
+
+/* The following command line options are set as part of the CCS project. */
+/* If you are building using the command line, or for some reason want to */
+/* define them here, you can uncomment and modify these lines as needed. */
+/* If you are using CCS for building, it is probably better to make any such */
+/* modifications in your CCS project and leave this file alone. */
+/* */
+/* --heap_size=0 */
+/* --stack_size=256 */
+/* --library=rtsv7M3_T_le_eabi.lib */
+
+/* The starting address of the application. Normally the interrupt vectors */
+/* must be located at the beginning of the application. */
+#define APP_BASE 0x00000000
+#define RAM_BASE 0x20000000
+
+/* System memory map */
+
+MEMORY
+{
+ /* Application stored in and executes from internal flash */
+ FLASH (RX) : origin = APP_BASE, length = 0x00100000
+ /* Application uses internal RAM for data */
+ SRAM (RWX) : origin = 0x20000000, length = 0x00040000
+}
+
+/* Section allocation in memory */
+
+SECTIONS
+{
+ .intvecs: > APP_BASE
+ .text : > FLASH
+ .const : > FLASH
+ .cinit : > FLASH
+ .pinit : > FLASH
+ .init_array : > FLASH
+
+ .vtable : > RAM_BASE
+ .data : > SRAM
+ .bss : > SRAM
+ .sysmem : > SRAM
+ .stack : > SRAM
+}
+
+__STACK_TOP = __stack + 512;
diff --git a/boards/dk-tm4c129x/enet_uip/ewarm/Exe/enet_uip.bin b/boards/dk-tm4c129x/enet_uip/ewarm/Exe/enet_uip.bin Binary files differnew file mode 100644 index 0000000..9629b78 --- /dev/null +++ b/boards/dk-tm4c129x/enet_uip/ewarm/Exe/enet_uip.bin diff --git a/boards/dk-tm4c129x/enet_uip/ewarm/Exe/enet_uip.out b/boards/dk-tm4c129x/enet_uip/ewarm/Exe/enet_uip.out Binary files differnew file mode 100644 index 0000000..0cb9e40 --- /dev/null +++ b/boards/dk-tm4c129x/enet_uip/ewarm/Exe/enet_uip.out diff --git a/boards/dk-tm4c129x/enet_uip/gcc/enet_uip.axf b/boards/dk-tm4c129x/enet_uip/gcc/enet_uip.axf Binary files differnew file mode 100644 index 0000000..8583dc1 --- /dev/null +++ b/boards/dk-tm4c129x/enet_uip/gcc/enet_uip.axf diff --git a/boards/dk-tm4c129x/enet_uip/gcc/enet_uip.bin b/boards/dk-tm4c129x/enet_uip/gcc/enet_uip.bin Binary files differnew file mode 100644 index 0000000..19eafcb --- /dev/null +++ b/boards/dk-tm4c129x/enet_uip/gcc/enet_uip.bin diff --git a/boards/dk-tm4c129x/enet_uip/readme.txt b/boards/dk-tm4c129x/enet_uip/readme.txt new file mode 100644 index 0000000..d8313dc --- /dev/null +++ b/boards/dk-tm4c129x/enet_uip/readme.txt @@ -0,0 +1,33 @@ +Ethernet with uIP
+
+This example application demonstrates the operation of the Tiva C Series
+Ethernet controller using the uIP TCP/IP Stack. DHCP is used to obtain
+an Ethernet address. A basic web site is served over the Ethernet port.
+The web site displays a few lines of text, and a counter that increments
+each time the page is sent.
+
+UART0, connected to the ICDI virtual COM port and running at 115,200,
+8-N-1, is used to display messages from this application.
+
+For additional details on uIP, refer to the uIP web page at:
+http://www.sics.se/~adam/uip/
+
+-------------------------------------------------------------------------------
+
+Copyright (c) 2013-2014 Texas Instruments Incorporated. All rights reserved.
+Software License Agreement
+
+Texas Instruments (TI) is supplying this software for use solely and
+exclusively on TI's microcontroller products. The software is owned by
+TI and/or its suppliers, and is protected under applicable copyright
+laws. You may not combine this software with "viral" open-source
+software in order to form a larger program.
+
+THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
+NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
+NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
+CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
+DAMAGES, FOR ANY REASON WHATSOEVER.
+
+This is part of revision 2.1.0.12573 of the DK-TM4C129X Firmware Package.
diff --git a/boards/dk-tm4c129x/enet_uip/rvmdk/enet_uip.axf b/boards/dk-tm4c129x/enet_uip/rvmdk/enet_uip.axf Binary files differnew file mode 100644 index 0000000..fc04caf --- /dev/null +++ b/boards/dk-tm4c129x/enet_uip/rvmdk/enet_uip.axf diff --git a/boards/dk-tm4c129x/enet_uip/rvmdk/enet_uip.bin b/boards/dk-tm4c129x/enet_uip/rvmdk/enet_uip.bin Binary files differnew file mode 100644 index 0000000..f2799ca --- /dev/null +++ b/boards/dk-tm4c129x/enet_uip/rvmdk/enet_uip.bin diff --git a/boards/dk-tm4c129x/enet_uip/startup_ccs.c b/boards/dk-tm4c129x/enet_uip/startup_ccs.c new file mode 100644 index 0000000..d2bb22a --- /dev/null +++ b/boards/dk-tm4c129x/enet_uip/startup_ccs.c @@ -0,0 +1,276 @@ +//*****************************************************************************
+//
+// startup_ccs.c - Startup code for use with TI's Code Composer Studio.
+//
+// Copyright (c) 2013-2014 Texas Instruments Incorporated. All rights reserved.
+// Software License Agreement
+//
+// Texas Instruments (TI) is supplying this software for use solely and
+// exclusively on TI's microcontroller products. The software is owned by
+// TI and/or its suppliers, and is protected under applicable copyright
+// laws. You may not combine this software with "viral" open-source
+// software in order to form a larger program.
+//
+// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
+// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
+// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
+// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
+// DAMAGES, FOR ANY REASON WHATSOEVER.
+//
+// This is part of revision 2.1.0.12573 of the DK-TM4C129X Firmware Package.
+//
+//*****************************************************************************
+
+#include <stdint.h>
+#include "inc/hw_nvic.h"
+#include "inc/hw_types.h"
+
+//*****************************************************************************
+//
+// Forward declaration of the default fault handlers.
+//
+//*****************************************************************************
+void ResetISR(void);
+static void NmiSR(void);
+static void FaultISR(void);
+static void IntDefaultHandler(void);
+
+//*****************************************************************************
+//
+// External declaration for the reset handler that is to be called when the
+// processor is started
+//
+//*****************************************************************************
+extern void _c_int00(void);
+
+//*****************************************************************************
+//
+// Linker variable that marks the top of the stack.
+//
+//*****************************************************************************
+extern uint32_t __STACK_TOP;
+
+//*****************************************************************************
+//
+// External declarations for the interrupt handlers used by the application.
+//
+//*****************************************************************************
+extern void EthernetIntHandler(void);
+extern void SysTickIntHandler(void);
+
+//*****************************************************************************
+//
+// The vector table. Note that the proper constructs must be placed on this to
+// ensure that it ends up at physical address 0x0000.0000 or at the start of
+// the program if located at a start address other than 0.
+//
+//*****************************************************************************
+#pragma DATA_SECTION(g_pfnVectors, ".intvecs")
+void (* const g_pfnVectors[])(void) =
+{
+ (void (*)(void))((uint32_t)&__STACK_TOP),
+ // The initial stack pointer
+ ResetISR, // The reset handler
+ NmiSR, // The NMI handler
+ FaultISR, // The hard fault handler
+ IntDefaultHandler, // The MPU fault handler
+ IntDefaultHandler, // The bus fault handler
+ IntDefaultHandler, // The usage fault handler
+ 0, // Reserved
+ 0, // Reserved
+ 0, // Reserved
+ 0, // Reserved
+ IntDefaultHandler, // SVCall handler
+ IntDefaultHandler, // Debug monitor handler
+ 0, // Reserved
+ IntDefaultHandler, // The PendSV handler
+ SysTickIntHandler, // The SysTick handler
+ IntDefaultHandler, // GPIO Port A
+ IntDefaultHandler, // GPIO Port B
+ IntDefaultHandler, // GPIO Port C
+ IntDefaultHandler, // GPIO Port D
+ IntDefaultHandler, // GPIO Port E
+ IntDefaultHandler, // UART0 Rx and Tx
+ IntDefaultHandler, // UART1 Rx and Tx
+ IntDefaultHandler, // SSI0 Rx and Tx
+ IntDefaultHandler, // I2C0 Master and Slave
+ IntDefaultHandler, // PWM Fault
+ IntDefaultHandler, // PWM Generator 0
+ IntDefaultHandler, // PWM Generator 1
+ IntDefaultHandler, // PWM Generator 2
+ IntDefaultHandler, // Quadrature Encoder 0
+ IntDefaultHandler, // ADC Sequence 0
+ IntDefaultHandler, // ADC Sequence 1
+ IntDefaultHandler, // ADC Sequence 2
+ IntDefaultHandler, // ADC Sequence 3
+ IntDefaultHandler, // Watchdog timer
+ IntDefaultHandler, // Timer 0 subtimer A
+ IntDefaultHandler, // Timer 0 subtimer B
+ IntDefaultHandler, // Timer 1 subtimer A
+ IntDefaultHandler, // Timer 1 subtimer B
+ IntDefaultHandler, // Timer 2 subtimer A
+ IntDefaultHandler, // Timer 2 subtimer B
+ IntDefaultHandler, // Analog Comparator 0
+ IntDefaultHandler, // Analog Comparator 1
+ IntDefaultHandler, // Analog Comparator 2
+ IntDefaultHandler, // System Control (PLL, OSC, BO)
+ IntDefaultHandler, // FLASH Control
+ IntDefaultHandler, // GPIO Port F
+ IntDefaultHandler, // GPIO Port G
+ IntDefaultHandler, // GPIO Port H
+ IntDefaultHandler, // UART2 Rx and Tx
+ IntDefaultHandler, // SSI1 Rx and Tx
+ IntDefaultHandler, // Timer 3 subtimer A
+ IntDefaultHandler, // Timer 3 subtimer B
+ IntDefaultHandler, // I2C1 Master and Slave
+ IntDefaultHandler, // CAN0
+ IntDefaultHandler, // CAN1
+ EthernetIntHandler, // Ethernet
+ IntDefaultHandler, // Hibernate
+ IntDefaultHandler, // USB0
+ IntDefaultHandler, // PWM Generator 3
+ IntDefaultHandler, // uDMA Software Transfer
+ IntDefaultHandler, // uDMA Error
+ IntDefaultHandler, // ADC1 Sequence 0
+ IntDefaultHandler, // ADC1 Sequence 1
+ IntDefaultHandler, // ADC1 Sequence 2
+ IntDefaultHandler, // ADC1 Sequence 3
+ IntDefaultHandler, // External Bus Interface 0
+ IntDefaultHandler, // GPIO Port J
+ IntDefaultHandler, // GPIO Port K
+ IntDefaultHandler, // GPIO Port L
+ IntDefaultHandler, // SSI2 Rx and Tx
+ IntDefaultHandler, // SSI3 Rx and Tx
+ IntDefaultHandler, // UART3 Rx and Tx
+ IntDefaultHandler, // UART4 Rx and Tx
+ IntDefaultHandler, // UART5 Rx and Tx
+ IntDefaultHandler, // UART6 Rx and Tx
+ IntDefaultHandler, // UART7 Rx and Tx
+ IntDefaultHandler, // I2C2 Master and Slave
+ IntDefaultHandler, // I2C3 Master and Slave
+ IntDefaultHandler, // Timer 4 subtimer A
+ IntDefaultHandler, // Timer 4 subtimer B
+ IntDefaultHandler, // Timer 5 subtimer A
+ IntDefaultHandler, // Timer 5 subtimer B
+ IntDefaultHandler, // FPU
+ 0, // Reserved
+ 0, // Reserved
+ IntDefaultHandler, // I2C4 Master and Slave
+ IntDefaultHandler, // I2C5 Master and Slave
+ IntDefaultHandler, // GPIO Port M
+ IntDefaultHandler, // GPIO Port N
+ 0, // Reserved
+ IntDefaultHandler, // Tamper
+ IntDefaultHandler, // GPIO Port P (Summary or P0)
+ IntDefaultHandler, // GPIO Port P1
+ IntDefaultHandler, // GPIO Port P2
+ IntDefaultHandler, // GPIO Port P3
+ IntDefaultHandler, // GPIO Port P4
+ IntDefaultHandler, // GPIO Port P5
+ IntDefaultHandler, // GPIO Port P6
+ IntDefaultHandler, // GPIO Port P7
+ IntDefaultHandler, // GPIO Port Q (Summary or Q0)
+ IntDefaultHandler, // GPIO Port Q1
+ IntDefaultHandler, // GPIO Port Q2
+ IntDefaultHandler, // GPIO Port Q3
+ IntDefaultHandler, // GPIO Port Q4
+ IntDefaultHandler, // GPIO Port Q5
+ IntDefaultHandler, // GPIO Port Q6
+ IntDefaultHandler, // GPIO Port Q7
+ IntDefaultHandler, // GPIO Port R
+ IntDefaultHandler, // GPIO Port S
+ IntDefaultHandler, // SHA/MD5 0
+ IntDefaultHandler, // AES 0
+ IntDefaultHandler, // DES3DES 0
+ IntDefaultHandler, // LCD Controller 0
+ IntDefaultHandler, // Timer 6 subtimer A
+ IntDefaultHandler, // Timer 6 subtimer B
+ IntDefaultHandler, // Timer 7 subtimer A
+ IntDefaultHandler, // Timer 7 subtimer B
+ IntDefaultHandler, // I2C6 Master and Slave
+ IntDefaultHandler, // I2C7 Master and Slave
+ IntDefaultHandler, // HIM Scan Matrix Keyboard 0
+ IntDefaultHandler, // One Wire 0
+ IntDefaultHandler, // HIM PS/2 0
+ IntDefaultHandler, // HIM LED Sequencer 0
+ IntDefaultHandler, // HIM Consumer IR 0
+ IntDefaultHandler, // I2C8 Master and Slave
+ IntDefaultHandler, // I2C9 Master and Slave
+ IntDefaultHandler // GPIO Port T
+};
+
+//*****************************************************************************
+//
+// This is the code that gets called when the processor first starts execution
+// following a reset event. Only the absolutely necessary set is performed,
+// after which the application supplied entry() routine is called. Any fancy
+// actions (such as making decisions based on the reset cause register, and
+// resetting the bits in that register) are left solely in the hands of the
+// application.
+//
+//*****************************************************************************
+void
+ResetISR(void)
+{
+ //
+ // Jump to the CCS C initialization routine. This will enable the
+ // floating-point unit as well, so that does not need to be done here.
+ //
+ __asm(" .global _c_int00\n"
+ " b.w _c_int00");
+}
+
+//*****************************************************************************
+//
+// This is the code that gets called when the processor receives a NMI. This
+// simply enters an infinite loop, preserving the system state for examination
+// by a debugger.
+//
+//*****************************************************************************
+static void
+NmiSR(void)
+{
+ //
+ // Enter an infinite loop.
+ //
+ while(1)
+ {
+ }
+}
+
+//*****************************************************************************
+//
+// This is the code that gets called when the processor receives a fault
+// interrupt. This simply enters an infinite loop, preserving the system state
+// for examination by a debugger.
+//
+//*****************************************************************************
+static void
+FaultISR(void)
+{
+ //
+ // Enter an infinite loop.
+ //
+ while(1)
+ {
+ }
+}
+
+//*****************************************************************************
+//
+// This is the code that gets called when the processor receives an unexpected
+// interrupt. This simply enters an infinite loop, preserving the system state
+// for examination by a debugger.
+//
+//*****************************************************************************
+static void
+IntDefaultHandler(void)
+{
+ //
+ // Go into an infinite loop.
+ //
+ while(1)
+ {
+ }
+}
diff --git a/boards/dk-tm4c129x/enet_uip/startup_ewarm.c b/boards/dk-tm4c129x/enet_uip/startup_ewarm.c new file mode 100644 index 0000000..79a712c --- /dev/null +++ b/boards/dk-tm4c129x/enet_uip/startup_ewarm.c @@ -0,0 +1,307 @@ +//*****************************************************************************
+//
+// startup_ewarm.c - Startup code for use with IAR's Embedded Workbench,
+// version 5.
+//
+// Copyright (c) 2013-2014 Texas Instruments Incorporated. All rights reserved.
+// Software License Agreement
+//
+// Texas Instruments (TI) is supplying this software for use solely and
+// exclusively on TI's microcontroller products. The software is owned by
+// TI and/or its suppliers, and is protected under applicable copyright
+// laws. You may not combine this software with "viral" open-source
+// software in order to form a larger program.
+//
+// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
+// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
+// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
+// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
+// DAMAGES, FOR ANY REASON WHATSOEVER.
+//
+// This is part of revision 2.1.0.12573 of the DK-TM4C129X Firmware Package.
+//
+//*****************************************************************************
+
+#include <stdint.h>
+#include "inc/hw_nvic.h"
+#include "inc/hw_types.h"
+
+//*****************************************************************************
+//
+// Enable the IAR extensions for this source file.
+//
+//*****************************************************************************
+#pragma language=extended
+
+//*****************************************************************************
+//
+// Forward declaration of the default fault handlers.
+//
+//*****************************************************************************
+void ResetISR(void);
+static void NmiSR(void);
+static void FaultISR(void);
+static void IntDefaultHandler(void);
+
+//*****************************************************************************
+//
+// External declarations for the interrupt handlers used by the application.
+//
+//*****************************************************************************
+extern void EthernetIntHandler(void);
+extern void SysTickIntHandler(void);
+
+//*****************************************************************************
+//
+// The entry point for the application startup code.
+//
+//*****************************************************************************
+extern void __iar_program_start(void);
+
+//*****************************************************************************
+//
+// Reserve space for the system stack.
+//
+//*****************************************************************************
+static uint32_t pui32Stack[128] @ ".noinit";
+
+//*****************************************************************************
+//
+// A union that describes the entries of the vector table. The union is needed
+// since the first entry is the stack pointer and the remainder are function
+// pointers.
+//
+//*****************************************************************************
+typedef union
+{
+ void (*pfnHandler)(void);
+ uint32_t ui32Ptr;
+}
+uVectorEntry;
+
+//*****************************************************************************
+//
+// The vector table. Note that the proper constructs must be placed on this to
+// ensure that it ends up at physical address 0x0000.0000.
+//
+//*****************************************************************************
+__root const uVectorEntry __vector_table[] @ ".intvec" =
+{
+ { .ui32Ptr = (uint32_t)pui32Stack + sizeof(pui32Stack) },
+ // The initial stack pointer
+ ResetISR, // The reset handler
+ NmiSR, // The NMI handler
+ FaultISR, // The hard fault handler
+ IntDefaultHandler, // The MPU fault handler
+ IntDefaultHandler, // The bus fault handler
+ IntDefaultHandler, // The usage fault handler
+ 0, // Reserved
+ 0, // Reserved
+ 0, // Reserved
+ 0, // Reserved
+ IntDefaultHandler, // SVCall handler
+ IntDefaultHandler, // Debug monitor handler
+ 0, // Reserved
+ IntDefaultHandler, // The PendSV handler
+ SysTickIntHandler, // The SysTick handler
+ IntDefaultHandler, // GPIO Port A
+ IntDefaultHandler, // GPIO Port B
+ IntDefaultHandler, // GPIO Port C
+ IntDefaultHandler, // GPIO Port D
+ IntDefaultHandler, // GPIO Port E
+ IntDefaultHandler, // UART0 Rx and Tx
+ IntDefaultHandler, // UART1 Rx and Tx
+ IntDefaultHandler, // SSI0 Rx and Tx
+ IntDefaultHandler, // I2C0 Master and Slave
+ IntDefaultHandler, // PWM Fault
+ IntDefaultHandler, // PWM Generator 0
+ IntDefaultHandler, // PWM Generator 1
+ IntDefaultHandler, // PWM Generator 2
+ IntDefaultHandler, // Quadrature Encoder 0
+ IntDefaultHandler, // ADC Sequence 0
+ IntDefaultHandler, // ADC Sequence 1
+ IntDefaultHandler, // ADC Sequence 2
+ IntDefaultHandler, // ADC Sequence 3
+ IntDefaultHandler, // Watchdog timer
+ IntDefaultHandler, // Timer 0 subtimer A
+ IntDefaultHandler, // Timer 0 subtimer B
+ IntDefaultHandler, // Timer 1 subtimer A
+ IntDefaultHandler, // Timer 1 subtimer B
+ IntDefaultHandler, // Timer 2 subtimer A
+ IntDefaultHandler, // Timer 2 subtimer B
+ IntDefaultHandler, // Analog Comparator 0
+ IntDefaultHandler, // Analog Comparator 1
+ IntDefaultHandler, // Analog Comparator 2
+ IntDefaultHandler, // System Control (PLL, OSC, BO)
+ IntDefaultHandler, // FLASH Control
+ IntDefaultHandler, // GPIO Port F
+ IntDefaultHandler, // GPIO Port G
+ IntDefaultHandler, // GPIO Port H
+ IntDefaultHandler, // UART2 Rx and Tx
+ IntDefaultHandler, // SSI1 Rx and Tx
+ IntDefaultHandler, // Timer 3 subtimer A
+ IntDefaultHandler, // Timer 3 subtimer B
+ IntDefaultHandler, // I2C1 Master and Slave
+ IntDefaultHandler, // CAN0
+ IntDefaultHandler, // CAN1
+ EthernetIntHandler, // Ethernet
+ IntDefaultHandler, // Hibernate
+ IntDefaultHandler, // USB0
+ IntDefaultHandler, // PWM Generator 3
+ IntDefaultHandler, // uDMA Software Transfer
+ IntDefaultHandler, // uDMA Error
+ IntDefaultHandler, // ADC1 Sequence 0
+ IntDefaultHandler, // ADC1 Sequence 1
+ IntDefaultHandler, // ADC1 Sequence 2
+ IntDefaultHandler, // ADC1 Sequence 3
+ IntDefaultHandler, // External Bus Interface 0
+ IntDefaultHandler, // GPIO Port J
+ IntDefaultHandler, // GPIO Port K
+ IntDefaultHandler, // GPIO Port L
+ IntDefaultHandler, // SSI2 Rx and Tx
+ IntDefaultHandler, // SSI3 Rx and Tx
+ IntDefaultHandler, // UART3 Rx and Tx
+ IntDefaultHandler, // UART4 Rx and Tx
+ IntDefaultHandler, // UART5 Rx and Tx
+ IntDefaultHandler, // UART6 Rx and Tx
+ IntDefaultHandler, // UART7 Rx and Tx
+ IntDefaultHandler, // I2C2 Master and Slave
+ IntDefaultHandler, // I2C3 Master and Slave
+ IntDefaultHandler, // Timer 4 subtimer A
+ IntDefaultHandler, // Timer 4 subtimer B
+ IntDefaultHandler, // Timer 5 subtimer A
+ IntDefaultHandler, // Timer 5 subtimer B
+ IntDefaultHandler, // FPU
+ 0, // Reserved
+ 0, // Reserved
+ IntDefaultHandler, // I2C4 Master and Slave
+ IntDefaultHandler, // I2C5 Master and Slave
+ IntDefaultHandler, // GPIO Port M
+ IntDefaultHandler, // GPIO Port N
+ 0, // Reserved
+ IntDefaultHandler, // Tamper
+ IntDefaultHandler, // GPIO Port P (Summary or P0)
+ IntDefaultHandler, // GPIO Port P1
+ IntDefaultHandler, // GPIO Port P2
+ IntDefaultHandler, // GPIO Port P3
+ IntDefaultHandler, // GPIO Port P4
+ IntDefaultHandler, // GPIO Port P5
+ IntDefaultHandler, // GPIO Port P6
+ IntDefaultHandler, // GPIO Port P7
+ IntDefaultHandler, // GPIO Port Q (Summary or Q0)
+ IntDefaultHandler, // GPIO Port Q1
+ IntDefaultHandler, // GPIO Port Q2
+ IntDefaultHandler, // GPIO Port Q3
+ IntDefaultHandler, // GPIO Port Q4
+ IntDefaultHandler, // GPIO Port Q5
+ IntDefaultHandler, // GPIO Port Q6
+ IntDefaultHandler, // GPIO Port Q7
+ IntDefaultHandler, // GPIO Port R
+ IntDefaultHandler, // GPIO Port S
+ IntDefaultHandler, // SHA/MD5 0
+ IntDefaultHandler, // AES 0
+ IntDefaultHandler, // DES3DES 0
+ IntDefaultHandler, // LCD Controller 0
+ IntDefaultHandler, // Timer 6 subtimer A
+ IntDefaultHandler, // Timer 6 subtimer B
+ IntDefaultHandler, // Timer 7 subtimer A
+ IntDefaultHandler, // Timer 7 subtimer B
+ IntDefaultHandler, // I2C6 Master and Slave
+ IntDefaultHandler, // I2C7 Master and Slave
+ IntDefaultHandler, // HIM Scan Matrix Keyboard 0
+ IntDefaultHandler, // One Wire 0
+ IntDefaultHandler, // HIM PS/2 0
+ IntDefaultHandler, // HIM LED Sequencer 0
+ IntDefaultHandler, // HIM Consumer IR 0
+ IntDefaultHandler, // I2C8 Master and Slave
+ IntDefaultHandler, // I2C9 Master and Slave
+ IntDefaultHandler // GPIO Port T
+};
+
+//*****************************************************************************
+//
+// This is the code that gets called when the processor first starts execution
+// following a reset event. Only the absolutely necessary set is performed,
+// after which the application supplied entry() routine is called. Any fancy
+// actions (such as making decisions based on the reset cause register, and
+// resetting the bits in that register) are left solely in the hands of the
+// application.
+//
+//*****************************************************************************
+void
+ResetISR(void)
+{
+ //
+ // Enable the floating-point unit. This must be done here to handle the
+ // case where main() uses floating-point and the function prologue saves
+ // floating-point registers (which will fault if floating-point is not
+ // enabled). Any configuration of the floating-point unit using DriverLib
+ // APIs must be done here prior to the floating-point unit being enabled.
+ //
+ // Note that this does not use DriverLib since it might not be included in
+ // this project.
+ //
+ HWREG(NVIC_CPAC) = ((HWREG(NVIC_CPAC) &
+ ~(NVIC_CPAC_CP10_M | NVIC_CPAC_CP11_M)) |
+ NVIC_CPAC_CP10_FULL | NVIC_CPAC_CP11_FULL);
+
+ //
+ // Call the application's entry point.
+ //
+ __iar_program_start();
+}
+
+//*****************************************************************************
+//
+// This is the code that gets called when the processor receives a NMI. This
+// simply enters an infinite loop, preserving the system state for examination
+// by a debugger.
+//
+//*****************************************************************************
+static void
+NmiSR(void)
+{
+ //
+ // Enter an infinite loop.
+ //
+ while(1)
+ {
+ }
+}
+
+//*****************************************************************************
+//
+// This is the code that gets called when the processor receives a fault
+// interrupt. This simply enters an infinite loop, preserving the system state
+// for examination by a debugger.
+//
+//*****************************************************************************
+static void
+FaultISR(void)
+{
+ //
+ // Enter an infinite loop.
+ //
+ while(1)
+ {
+ }
+}
+
+//*****************************************************************************
+//
+// This is the code that gets called when the processor receives an unexpected
+// interrupt. This simply enters an infinite loop, preserving the system state
+// for examination by a debugger.
+//
+//*****************************************************************************
+static void
+IntDefaultHandler(void)
+{
+ //
+ // Go into an infinite loop.
+ //
+ while(1)
+ {
+ }
+}
diff --git a/boards/dk-tm4c129x/enet_uip/startup_gcc.c b/boards/dk-tm4c129x/enet_uip/startup_gcc.c new file mode 100644 index 0000000..2cfa08f --- /dev/null +++ b/boards/dk-tm4c129x/enet_uip/startup_gcc.c @@ -0,0 +1,323 @@ +//*****************************************************************************
+//
+// startup_gcc.c - Startup code for use with GNU tools.
+//
+// Copyright (c) 2013-2014 Texas Instruments Incorporated. All rights reserved.
+// Software License Agreement
+//
+// Texas Instruments (TI) is supplying this software for use solely and
+// exclusively on TI's microcontroller products. The software is owned by
+// TI and/or its suppliers, and is protected under applicable copyright
+// laws. You may not combine this software with "viral" open-source
+// software in order to form a larger program.
+//
+// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
+// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
+// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
+// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
+// DAMAGES, FOR ANY REASON WHATSOEVER.
+//
+// This is part of revision 2.1.0.12573 of the DK-TM4C129X Firmware Package.
+//
+//*****************************************************************************
+
+#include <stdint.h>
+#include "inc/hw_nvic.h"
+#include "inc/hw_types.h"
+
+//*****************************************************************************
+//
+// Forward declaration of the default fault handlers.
+//
+//*****************************************************************************
+void ResetISR(void);
+static void NmiSR(void);
+static void FaultISR(void);
+static void IntDefaultHandler(void);
+
+//*****************************************************************************
+//
+// External declarations for the interrupt handlers used by the application.
+//
+//*****************************************************************************
+extern void EthernetIntHandler(void);
+extern void SysTickIntHandler(void);
+
+//*****************************************************************************
+//
+// The entry point for the application.
+//
+//*****************************************************************************
+extern int main(void);
+
+//*****************************************************************************
+//
+// Reserve space for the system stack.
+//
+//*****************************************************************************
+static uint32_t pui32Stack[128];
+
+//*****************************************************************************
+//
+// The vector table. Note that the proper constructs must be placed on this to
+// ensure that it ends up at physical address 0x0000.0000.
+//
+//*****************************************************************************
+__attribute__ ((section(".isr_vector")))
+void (* const g_pfnVectors[])(void) =
+{
+ (void (*)(void))((uint32_t)pui32Stack + sizeof(pui32Stack)),
+ // The initial stack pointer
+ ResetISR, // The reset handler
+ NmiSR, // The NMI handler
+ FaultISR, // The hard fault handler
+ IntDefaultHandler, // The MPU fault handler
+ IntDefaultHandler, // The bus fault handler
+ IntDefaultHandler, // The usage fault handler
+ 0, // Reserved
+ 0, // Reserved
+ 0, // Reserved
+ 0, // Reserved
+ IntDefaultHandler, // SVCall handler
+ IntDefaultHandler, // Debug monitor handler
+ 0, // Reserved
+ IntDefaultHandler, // The PendSV handler
+ SysTickIntHandler, // The SysTick handler
+ IntDefaultHandler, // GPIO Port A
+ IntDefaultHandler, // GPIO Port B
+ IntDefaultHandler, // GPIO Port C
+ IntDefaultHandler, // GPIO Port D
+ IntDefaultHandler, // GPIO Port E
+ IntDefaultHandler, // UART0 Rx and Tx
+ IntDefaultHandler, // UART1 Rx and Tx
+ IntDefaultHandler, // SSI0 Rx and Tx
+ IntDefaultHandler, // I2C0 Master and Slave
+ IntDefaultHandler, // PWM Fault
+ IntDefaultHandler, // PWM Generator 0
+ IntDefaultHandler, // PWM Generator 1
+ IntDefaultHandler, // PWM Generator 2
+ IntDefaultHandler, // Quadrature Encoder 0
+ IntDefaultHandler, // ADC Sequence 0
+ IntDefaultHandler, // ADC Sequence 1
+ IntDefaultHandler, // ADC Sequence 2
+ IntDefaultHandler, // ADC Sequence 3
+ IntDefaultHandler, // Watchdog timer
+ IntDefaultHandler, // Timer 0 subtimer A
+ IntDefaultHandler, // Timer 0 subtimer B
+ IntDefaultHandler, // Timer 1 subtimer A
+ IntDefaultHandler, // Timer 1 subtimer B
+ IntDefaultHandler, // Timer 2 subtimer A
+ IntDefaultHandler, // Timer 2 subtimer B
+ IntDefaultHandler, // Analog Comparator 0
+ IntDefaultHandler, // Analog Comparator 1
+ IntDefaultHandler, // Analog Comparator 2
+ IntDefaultHandler, // System Control (PLL, OSC, BO)
+ IntDefaultHandler, // FLASH Control
+ IntDefaultHandler, // GPIO Port F
+ IntDefaultHandler, // GPIO Port G
+ IntDefaultHandler, // GPIO Port H
+ IntDefaultHandler, // UART2 Rx and Tx
+ IntDefaultHandler, // SSI1 Rx and Tx
+ IntDefaultHandler, // Timer 3 subtimer A
+ IntDefaultHandler, // Timer 3 subtimer B
+ IntDefaultHandler, // I2C1 Master and Slave
+ IntDefaultHandler, // CAN0
+ IntDefaultHandler, // CAN1
+ EthernetIntHandler, // Ethernet
+ IntDefaultHandler, // Hibernate
+ IntDefaultHandler, // USB0
+ IntDefaultHandler, // PWM Generator 3
+ IntDefaultHandler, // uDMA Software Transfer
+ IntDefaultHandler, // uDMA Error
+ IntDefaultHandler, // ADC1 Sequence 0
+ IntDefaultHandler, // ADC1 Sequence 1
+ IntDefaultHandler, // ADC1 Sequence 2
+ IntDefaultHandler, // ADC1 Sequence 3
+ IntDefaultHandler, // External Bus Interface 0
+ IntDefaultHandler, // GPIO Port J
+ IntDefaultHandler, // GPIO Port K
+ IntDefaultHandler, // GPIO Port L
+ IntDefaultHandler, // SSI2 Rx and Tx
+ IntDefaultHandler, // SSI3 Rx and Tx
+ IntDefaultHandler, // UART3 Rx and Tx
+ IntDefaultHandler, // UART4 Rx and Tx
+ IntDefaultHandler, // UART5 Rx and Tx
+ IntDefaultHandler, // UART6 Rx and Tx
+ IntDefaultHandler, // UART7 Rx and Tx
+ IntDefaultHandler, // I2C2 Master and Slave
+ IntDefaultHandler, // I2C3 Master and Slave
+ IntDefaultHandler, // Timer 4 subtimer A
+ IntDefaultHandler, // Timer 4 subtimer B
+ IntDefaultHandler, // Timer 5 subtimer A
+ IntDefaultHandler, // Timer 5 subtimer B
+ IntDefaultHandler, // FPU
+ 0, // Reserved
+ 0, // Reserved
+ IntDefaultHandler, // I2C4 Master and Slave
+ IntDefaultHandler, // I2C5 Master and Slave
+ IntDefaultHandler, // GPIO Port M
+ IntDefaultHandler, // GPIO Port N
+ 0, // Reserved
+ IntDefaultHandler, // Tamper
+ IntDefaultHandler, // GPIO Port P (Summary or P0)
+ IntDefaultHandler, // GPIO Port P1
+ IntDefaultHandler, // GPIO Port P2
+ IntDefaultHandler, // GPIO Port P3
+ IntDefaultHandler, // GPIO Port P4
+ IntDefaultHandler, // GPIO Port P5
+ IntDefaultHandler, // GPIO Port P6
+ IntDefaultHandler, // GPIO Port P7
+ IntDefaultHandler, // GPIO Port Q (Summary or Q0)
+ IntDefaultHandler, // GPIO Port Q1
+ IntDefaultHandler, // GPIO Port Q2
+ IntDefaultHandler, // GPIO Port Q3
+ IntDefaultHandler, // GPIO Port Q4
+ IntDefaultHandler, // GPIO Port Q5
+ IntDefaultHandler, // GPIO Port Q6
+ IntDefaultHandler, // GPIO Port Q7
+ IntDefaultHandler, // GPIO Port R
+ IntDefaultHandler, // GPIO Port S
+ IntDefaultHandler, // SHA/MD5 0
+ IntDefaultHandler, // AES 0
+ IntDefaultHandler, // DES3DES 0
+ IntDefaultHandler, // LCD Controller 0
+ IntDefaultHandler, // Timer 6 subtimer A
+ IntDefaultHandler, // Timer 6 subtimer B
+ IntDefaultHandler, // Timer 7 subtimer A
+ IntDefaultHandler, // Timer 7 subtimer B
+ IntDefaultHandler, // I2C6 Master and Slave
+ IntDefaultHandler, // I2C7 Master and Slave
+ IntDefaultHandler, // HIM Scan Matrix Keyboard 0
+ IntDefaultHandler, // One Wire 0
+ IntDefaultHandler, // HIM PS/2 0
+ IntDefaultHandler, // HIM LED Sequencer 0
+ IntDefaultHandler, // HIM Consumer IR 0
+ IntDefaultHandler, // I2C8 Master and Slave
+ IntDefaultHandler, // I2C9 Master and Slave
+ IntDefaultHandler // GPIO Port T
+};
+
+//*****************************************************************************
+//
+// The following are constructs created by the linker, indicating where the
+// the "data" and "bss" segments reside in memory. The initializers for the
+// for the "data" segment resides immediately following the "text" segment.
+//
+//*****************************************************************************
+extern uint32_t _etext;
+extern uint32_t _data;
+extern uint32_t _edata;
+extern uint32_t _bss;
+extern uint32_t _ebss;
+
+//*****************************************************************************
+//
+// This is the code that gets called when the processor first starts execution
+// following a reset event. Only the absolutely necessary set is performed,
+// after which the application supplied entry() routine is called. Any fancy
+// actions (such as making decisions based on the reset cause register, and
+// resetting the bits in that register) are left solely in the hands of the
+// application.
+//
+//*****************************************************************************
+void
+ResetISR(void)
+{
+ uint32_t *pui32Src, *pui32Dest;
+
+ //
+ // Copy the data segment initializers from flash to SRAM.
+ //
+ pui32Src = &_etext;
+ for(pui32Dest = &_data; pui32Dest < &_edata; )
+ {
+ *pui32Dest++ = *pui32Src++;
+ }
+
+ //
+ // Zero fill the bss segment.
+ //
+ __asm(" ldr r0, =_bss\n"
+ " ldr r1, =_ebss\n"
+ " mov r2, #0\n"
+ " .thumb_func\n"
+ "zero_loop:\n"
+ " cmp r0, r1\n"
+ " it lt\n"
+ " strlt r2, [r0], #4\n"
+ " blt zero_loop");
+
+ //
+ // Enable the floating-point unit. This must be done here to handle the
+ // case where main() uses floating-point and the function prologue saves
+ // floating-point registers (which will fault if floating-point is not
+ // enabled). Any configuration of the floating-point unit using DriverLib
+ // APIs must be done here prior to the floating-point unit being enabled.
+ //
+ // Note that this does not use DriverLib since it might not be included in
+ // this project.
+ //
+ HWREG(NVIC_CPAC) = ((HWREG(NVIC_CPAC) &
+ ~(NVIC_CPAC_CP10_M | NVIC_CPAC_CP11_M)) |
+ NVIC_CPAC_CP10_FULL | NVIC_CPAC_CP11_FULL);
+
+ //
+ // Call the application's entry point.
+ //
+ main();
+}
+
+//*****************************************************************************
+//
+// This is the code that gets called when the processor receives a NMI. This
+// simply enters an infinite loop, preserving the system state for examination
+// by a debugger.
+//
+//*****************************************************************************
+static void
+NmiSR(void)
+{
+ //
+ // Enter an infinite loop.
+ //
+ while(1)
+ {
+ }
+}
+
+//*****************************************************************************
+//
+// This is the code that gets called when the processor receives a fault
+// interrupt. This simply enters an infinite loop, preserving the system state
+// for examination by a debugger.
+//
+//*****************************************************************************
+static void
+FaultISR(void)
+{
+ //
+ // Enter an infinite loop.
+ //
+ while(1)
+ {
+ }
+}
+
+//*****************************************************************************
+//
+// This is the code that gets called when the processor receives an unexpected
+// interrupt. This simply enters an infinite loop, preserving the system state
+// for examination by a debugger.
+//
+//*****************************************************************************
+static void
+IntDefaultHandler(void)
+{
+ //
+ // Go into an infinite loop.
+ //
+ while(1)
+ {
+ }
+}
diff --git a/boards/dk-tm4c129x/enet_uip/startup_rvmdk.S b/boards/dk-tm4c129x/enet_uip/startup_rvmdk.S new file mode 100644 index 0000000..043a697 --- /dev/null +++ b/boards/dk-tm4c129x/enet_uip/startup_rvmdk.S @@ -0,0 +1,332 @@ +; <<< Use Configuration Wizard in Context Menu >>>
+;******************************************************************************
+;
+; startup_rvmdk.S - Startup code for use with Keil's uVision.
+;
+; Copyright (c) 2013-2014 Texas Instruments Incorporated. All rights reserved.
+; Software License Agreement
+;
+; Texas Instruments (TI) is supplying this software for use solely and
+; exclusively on TI's microcontroller products. The software is owned by
+; TI and/or its suppliers, and is protected under applicable copyright
+; laws. You may not combine this software with "viral" open-source
+; software in order to form a larger program.
+;
+; THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
+; NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
+; NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+; A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
+; CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
+; DAMAGES, FOR ANY REASON WHATSOEVER.
+;
+; This is part of revision 2.1.0.12573 of the DK-TM4C129X Firmware Package.
+;
+;******************************************************************************
+
+;******************************************************************************
+;
+; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;
+;******************************************************************************
+Stack EQU 0x00000200
+
+;******************************************************************************
+;
+; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;
+;******************************************************************************
+Heap EQU 0x00000000
+
+;******************************************************************************
+;
+; Allocate space for the stack.
+;
+;******************************************************************************
+ AREA STACK, NOINIT, READWRITE, ALIGN=3
+StackMem
+ SPACE Stack
+__initial_sp
+
+;******************************************************************************
+;
+; Allocate space for the heap.
+;
+;******************************************************************************
+ AREA HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+HeapMem
+ SPACE Heap
+__heap_limit
+
+;******************************************************************************
+;
+; Indicate that the code in this file preserves 8-byte alignment of the stack.
+;
+;******************************************************************************
+ PRESERVE8
+
+;******************************************************************************
+;
+; Place code into the reset code section.
+;
+;******************************************************************************
+ AREA RESET, CODE, READONLY
+ THUMB
+
+;******************************************************************************
+;
+; External declarations for the interrupt handlers used by the application.
+;
+;******************************************************************************
+ EXTERN EthernetIntHandler
+ EXTERN SysTickIntHandler
+
+;******************************************************************************
+;
+; The vector table.
+;
+;******************************************************************************
+ EXPORT __Vectors
+__Vectors
+ DCD StackMem + Stack ; Top of Stack
+ DCD Reset_Handler ; Reset Handler
+ DCD NmiSR ; NMI Handler
+ DCD FaultISR ; Hard Fault Handler
+ DCD IntDefaultHandler ; The MPU fault handler
+ DCD IntDefaultHandler ; The bus fault handler
+ DCD IntDefaultHandler ; The usage fault handler
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD IntDefaultHandler ; SVCall handler
+ DCD IntDefaultHandler ; Debug monitor handler
+ DCD 0 ; Reserved
+ DCD IntDefaultHandler ; The PendSV handler
+ DCD SysTickIntHandler ; The SysTick handler
+ DCD IntDefaultHandler ; GPIO Port A
+ DCD IntDefaultHandler ; GPIO Port B
+ DCD IntDefaultHandler ; GPIO Port C
+ DCD IntDefaultHandler ; GPIO Port D
+ DCD IntDefaultHandler ; GPIO Port E
+ DCD IntDefaultHandler ; UART0 Rx and Tx
+ DCD IntDefaultHandler ; UART1 Rx and Tx
+ DCD IntDefaultHandler ; SSI0 Rx and Tx
+ DCD IntDefaultHandler ; I2C0 Master and Slave
+ DCD IntDefaultHandler ; PWM Fault
+ DCD IntDefaultHandler ; PWM Generator 0
+ DCD IntDefaultHandler ; PWM Generator 1
+ DCD IntDefaultHandler ; PWM Generator 2
+ DCD IntDefaultHandler ; Quadrature Encoder 0
+ DCD IntDefaultHandler ; ADC Sequence 0
+ DCD IntDefaultHandler ; ADC Sequence 1
+ DCD IntDefaultHandler ; ADC Sequence 2
+ DCD IntDefaultHandler ; ADC Sequence 3
+ DCD IntDefaultHandler ; Watchdog timer
+ DCD IntDefaultHandler ; Timer 0 subtimer A
+ DCD IntDefaultHandler ; Timer 0 subtimer B
+ DCD IntDefaultHandler ; Timer 1 subtimer A
+ DCD IntDefaultHandler ; Timer 1 subtimer B
+ DCD IntDefaultHandler ; Timer 2 subtimer A
+ DCD IntDefaultHandler ; Timer 2 subtimer B
+ DCD IntDefaultHandler ; Analog Comparator 0
+ DCD IntDefaultHandler ; Analog Comparator 1
+ DCD IntDefaultHandler ; Analog Comparator 2
+ DCD IntDefaultHandler ; System Control (PLL, OSC, BO)
+ DCD IntDefaultHandler ; FLASH Control
+ DCD IntDefaultHandler ; GPIO Port F
+ DCD IntDefaultHandler ; GPIO Port G
+ DCD IntDefaultHandler ; GPIO Port H
+ DCD IntDefaultHandler ; UART2 Rx and Tx
+ DCD IntDefaultHandler ; SSI1 Rx and Tx
+ DCD IntDefaultHandler ; Timer 3 subtimer A
+ DCD IntDefaultHandler ; Timer 3 subtimer B
+ DCD IntDefaultHandler ; I2C1 Master and Slave
+ DCD IntDefaultHandler ; CAN0
+ DCD IntDefaultHandler ; CAN1
+ DCD EthernetIntHandler ; Ethernet
+ DCD IntDefaultHandler ; Hibernate
+ DCD IntDefaultHandler ; USB0
+ DCD IntDefaultHandler ; PWM Generator 3
+ DCD IntDefaultHandler ; uDMA Software Transfer
+ DCD IntDefaultHandler ; uDMA Error
+ DCD IntDefaultHandler ; ADC1 Sequence 0
+ DCD IntDefaultHandler ; ADC1 Sequence 1
+ DCD IntDefaultHandler ; ADC1 Sequence 2
+ DCD IntDefaultHandler ; ADC1 Sequence 3
+ DCD IntDefaultHandler ; External Bus Interface 0
+ DCD IntDefaultHandler ; GPIO Port J
+ DCD IntDefaultHandler ; GPIO Port K
+ DCD IntDefaultHandler ; GPIO Port L
+ DCD IntDefaultHandler ; SSI2 Rx and Tx
+ DCD IntDefaultHandler ; SSI3 Rx and Tx
+ DCD IntDefaultHandler ; UART3 Rx and Tx
+ DCD IntDefaultHandler ; UART4 Rx and Tx
+ DCD IntDefaultHandler ; UART5 Rx and Tx
+ DCD IntDefaultHandler ; UART6 Rx and Tx
+ DCD IntDefaultHandler ; UART7 Rx and Tx
+ DCD IntDefaultHandler ; I2C2 Master and Slave
+ DCD IntDefaultHandler ; I2C3 Master and Slave
+ DCD IntDefaultHandler ; Timer 4 subtimer A
+ DCD IntDefaultHandler ; Timer 4 subtimer B
+ DCD IntDefaultHandler ; Timer 5 subtimer A
+ DCD IntDefaultHandler ; Timer 5 subtimer B
+ DCD IntDefaultHandler ; FPU
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD IntDefaultHandler ; I2C4 Master and Slave
+ DCD IntDefaultHandler ; I2C5 Master and Slave
+ DCD IntDefaultHandler ; GPIO Port M
+ DCD IntDefaultHandler ; GPIO Port N
+ DCD 0 ; Reserved
+ DCD IntDefaultHandler ; Tamper
+ DCD IntDefaultHandler ; GPIO Port P (Summary or P0)
+ DCD IntDefaultHandler ; GPIO Port P1
+ DCD IntDefaultHandler ; GPIO Port P2
+ DCD IntDefaultHandler ; GPIO Port P3
+ DCD IntDefaultHandler ; GPIO Port P4
+ DCD IntDefaultHandler ; GPIO Port P5
+ DCD IntDefaultHandler ; GPIO Port P6
+ DCD IntDefaultHandler ; GPIO Port P7
+ DCD IntDefaultHandler ; GPIO Port Q (Summary or Q0)
+ DCD IntDefaultHandler ; GPIO Port Q1
+ DCD IntDefaultHandler ; GPIO Port Q2
+ DCD IntDefaultHandler ; GPIO Port Q3
+ DCD IntDefaultHandler ; GPIO Port Q4
+ DCD IntDefaultHandler ; GPIO Port Q5
+ DCD IntDefaultHandler ; GPIO Port Q6
+ DCD IntDefaultHandler ; GPIO Port Q7
+ DCD IntDefaultHandler ; GPIO Port R
+ DCD IntDefaultHandler ; GPIO Port S
+ DCD IntDefaultHandler ; SHA/MD5 0
+ DCD IntDefaultHandler ; AES 0
+ DCD IntDefaultHandler ; DES3DES 0
+ DCD IntDefaultHandler ; LCD Controller 0
+ DCD IntDefaultHandler ; Timer 6 subtimer A
+ DCD IntDefaultHandler ; Timer 6 subtimer B
+ DCD IntDefaultHandler ; Timer 7 subtimer A
+ DCD IntDefaultHandler ; Timer 7 subtimer B
+ DCD IntDefaultHandler ; I2C6 Master and Slave
+ DCD IntDefaultHandler ; I2C7 Master and Slave
+ DCD IntDefaultHandler ; HIM Scan Matrix Keyboard 0
+ DCD IntDefaultHandler ; One Wire 0
+ DCD IntDefaultHandler ; HIM PS/2 0
+ DCD IntDefaultHandler ; HIM LED Sequencer 0
+ DCD IntDefaultHandler ; HIM Consumer IR 0
+ DCD IntDefaultHandler ; I2C8 Master and Slave
+ DCD IntDefaultHandler ; I2C9 Master and Slave
+ DCD IntDefaultHandler ; GPIO Port T
+
+;******************************************************************************
+;
+; This is the code that gets called when the processor first starts execution
+; following a reset event.
+;
+;******************************************************************************
+ EXPORT Reset_Handler
+Reset_Handler
+ ;
+ ; Enable the floating-point unit. This must be done here to handle the
+ ; case where main() uses floating-point and the function prologue saves
+ ; floating-point registers (which will fault if floating-point is not
+ ; enabled). Any configuration of the floating-point unit using
+ ; DriverLib APIs must be done here prior to the floating-point unit
+ ; being enabled.
+ ;
+ ; Note that this does not use DriverLib since it might not be included
+ ; in this project.
+ ;
+ MOVW R0, #0xED88
+ MOVT R0, #0xE000
+ LDR R1, [R0]
+ ORR R1, #0x00F00000
+ STR R1, [R0]
+
+ ;
+ ; Call the C library enty point that handles startup. This will copy
+ ; the .data section initializers from flash to SRAM and zero fill the
+ ; .bss section.
+ ;
+ IMPORT __main
+ B __main
+
+;******************************************************************************
+;
+; This is the code that gets called when the processor receives a NMI. This
+; simply enters an infinite loop, preserving the system state for examination
+; by a debugger.
+;
+;******************************************************************************
+NmiSR
+ B NmiSR
+
+;******************************************************************************
+;
+; This is the code that gets called when the processor receives a fault
+; interrupt. This simply enters an infinite loop, preserving the system state
+; for examination by a debugger.
+;
+;******************************************************************************
+FaultISR
+ B FaultISR
+
+;******************************************************************************
+;
+; This is the code that gets called when the processor receives an unexpected
+; interrupt. This simply enters an infinite loop, preserving the system state
+; for examination by a debugger.
+;
+;******************************************************************************
+IntDefaultHandler
+ B IntDefaultHandler
+
+;******************************************************************************
+;
+; Make sure the end of this section is aligned.
+;
+;******************************************************************************
+ ALIGN
+
+;******************************************************************************
+;
+; Some code in the normal code section for initializing the heap and stack.
+;
+;******************************************************************************
+ AREA |.text|, CODE, READONLY
+
+;******************************************************************************
+;
+; The function expected of the C library startup code for defining the stack
+; and heap memory locations. For the C library version of the startup code,
+; provide this function so that the C library initialization code can find out
+; the location of the stack and heap.
+;
+;******************************************************************************
+ IF :DEF: __MICROLIB
+ EXPORT __initial_sp
+ EXPORT __heap_base
+ EXPORT __heap_limit
+ ELSE
+ IMPORT __use_two_region_memory
+ EXPORT __user_initial_stackheap
+__user_initial_stackheap
+ LDR R0, =HeapMem
+ LDR R1, =(StackMem + Stack)
+ LDR R2, =(HeapMem + Heap)
+ LDR R3, =StackMem
+ BX LR
+ ENDIF
+
+;******************************************************************************
+;
+; Make sure the end of this section is aligned.
+;
+;******************************************************************************
+ ALIGN
+
+;******************************************************************************
+;
+; Tell the assembler that we're done.
+;
+;******************************************************************************
+ END
diff --git a/boards/dk-tm4c129x/enet_uip/uip-conf.h b/boards/dk-tm4c129x/enet_uip/uip-conf.h new file mode 100644 index 0000000..5176f49 --- /dev/null +++ b/boards/dk-tm4c129x/enet_uip/uip-conf.h @@ -0,0 +1,162 @@ +//*****************************************************************************
+//
+// uip-conf.h - uIP Project Specific Configuration File
+//
+// Copyright (c) 2013-2014 Texas Instruments Incorporated. All rights reserved.
+// Software License Agreement
+//
+// Texas Instruments (TI) is supplying this software for use solely and
+// exclusively on TI's microcontroller products. The software is owned by
+// TI and/or its suppliers, and is protected under applicable copyright
+// laws. You may not combine this software with "viral" open-source
+// software in order to form a larger program.
+//
+// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
+// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
+// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
+// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
+// DAMAGES, FOR ANY REASON WHATSOEVER.
+//
+// This is part of revision 2.1.0.12573 of the DK-TM4C129X Firmware Package.
+//
+//*****************************************************************************
+
+#ifndef __UIP_CONF_H__
+#define __UIP_CONF_H__
+
+//
+// 8 bit datatype
+// This typedef defines the 8-bit type used throughout uIP.
+//
+typedef unsigned char u8_t;
+
+//
+// 16 bit datatype
+// This typedef defines the 16-bit type used throughout uIP.
+//
+typedef unsigned short u16_t;
+
+//
+// Statistics datatype
+// This typedef defines the dataype used for keeping statistics in
+// uIP.
+//
+typedef unsigned short uip_stats_t;
+
+//
+// Ping IP address assignment
+// Use first incoming "ping" packet to derive host IP address
+//
+#define UIP_CONF_PINGADDRCONF 0
+
+//
+// UDP support on or off
+//
+#define UIP_CONF_UDP 1
+
+//
+// UDP checksums on or off
+// (not currently supported ... should be 0)
+//
+#define UIP_CONF_UDP_CHECKSUMS 0
+
+//
+// UDP Maximum Connections
+//
+#define UIP_CONF_UDP_CONNS 4
+
+//
+// Maximum number of TCP connections.
+//
+#define UIP_CONF_MAX_CONNECTIONS 2
+
+//
+// Maximum number of listening TCP ports.
+//
+#define UIP_CONF_MAX_LISTENPORTS 4
+
+//
+// Size of advertised receiver's window
+//
+//#define UIP_CONF_RECEIVE_WINDOW 400
+
+//
+// Size of ARP table
+//
+#define UIP_CONF_ARPTAB_SIZE 8
+
+//
+// uIP buffer size.
+//
+#define UIP_CONF_BUFFER_SIZE 1600
+
+//
+// uIP buffer is defined in the application.
+//
+#define UIP_CONF_EXTERNAL_BUFFER
+
+//
+// uIP statistics on or off
+//
+#define UIP_CONF_STATISTICS 1
+
+//
+// Logging on or off
+//
+#define UIP_CONF_LOGGING 0
+
+//
+// Broadcast Support
+//
+#define UIP_CONF_BROADCAST 0
+
+//
+// Link-Level Header length
+//
+#define UIP_CONF_LLH_LEN 14
+
+//
+// CPU byte order.
+//
+#define UIP_CONF_BYTE_ORDER LITTLE_ENDIAN
+
+//
+// Offload checksum calculation to the hardware.
+//
+// TODO: Once things are working, turn on hardware checksum calculation and
+// make sure the application source includes stubs for uip_ipchksum(),
+// uip_tcpchksum() and uip_udpchksum(). uip_icmp6chksum() is also needed if
+// IPv6 is in use.
+//
+#define UIP_ARCH_IPCHKSUM
+#define UIP_ARCH_CHKSUM 1
+
+
+//
+// Here we include the header file for the application we are using in
+// this example
+//
+#include "httpd/httpd.h"
+
+//
+// Define the uIP Application State type, based on the httpd.h state variable.
+//
+typedef struct httpd_state uip_tcp_appstate_t;
+
+//
+// UIP_APPCALL: the name of the application function. This function
+// must return void and take no arguments (i.e., C type "void
+// appfunc(void)").
+//
+#ifndef UIP_APPCALL
+#define UIP_APPCALL httpd_appcall
+#endif
+
+//
+// Here we include the header file for the DPCP client we are using in
+// this example
+//
+#include "dhcpc/dhcpc.h"
+
+#endif // __UIP_CONF_H_
|