summaryrefslogtreecommitdiff
path: root/include/soc/sprd/chip_x35l64/__regs_mm_clk.h
blob: 4b73f5ef8079c203a8f4995cdc44c339346df7f2 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
/*
 * Copyright (C) 2012 Spreadtrum Communications Inc.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version 2
 * of the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 *************************************************
 * Automatically generated C header: do not edit *
 *************************************************
 */

#ifndef __REGS_MM_CLK_H__
#define __REGS_MM_CLK_H__

#ifndef __SCI_GLB_REGS_H__
#error  "Don't include this file directly, include <mach/sci_glb_regs.h>"
#endif

#define REGS_MM_CLK

/* registers definitions for controller REGS_MM_CLK */
#define REG_MM_CLK_MM_AHB_CFG           SCI_ADDR(REGS_MM_CLK_BASE, 0x0020)
#define REG_MM_CLK_SENSOR_CFG           SCI_ADDR(REGS_MM_CLK_BASE, 0x0024)
#define REG_MM_CLK_CCIR_CFG             SCI_ADDR(REGS_MM_CLK_BASE, 0x0028)
#define REG_MM_CLK_DCAM_CFG             SCI_ADDR(REGS_MM_CLK_BASE, 0x002c)
#define REG_MM_CLK_VSP_CFG              SCI_ADDR(REGS_MM_CLK_BASE, 0x0030)
#define REG_MM_CLK_ISP_CFG              SCI_ADDR(REGS_MM_CLK_BASE, 0x0034)
#define REG_MM_CLK_JPG_CFG              SCI_ADDR(REGS_MM_CLK_BASE, 0x0038)
#define REG_MM_CLK_MIPI_CSI_CFG         SCI_ADDR(REGS_MM_CLK_BASE, 0x003c)
#define REG_MM_CLK_CPHY_CFG_CFG         SCI_ADDR(REGS_MM_CLK_BASE, 0x0040)
#define REG_MM_CLK_ORP_TCK_CFG          SCI_ADDR(REGS_MM_CLK_BASE, 0x0044)

/* vars definitions for controller REGS_MM_CLK */

#endif //__REGS_MM_CLK_H__