diff options
Diffstat (limited to 'include/linux/battery/charger')
| -rw-r--r-- | include/linux/battery/charger/bq24157_charger.h | 48 | ||||
| -rw-r--r-- | include/linux/battery/charger/rt5033_charger.h | 96 | ||||
| -rw-r--r-- | include/linux/battery/charger/rt9455_charger.h | 287 | ||||
| -rw-r--r-- | include/linux/battery/charger/sm5414_charger.h | 299 | ||||
| -rw-r--r-- | include/linux/battery/charger/sm5701_charger.h | 167 | ||||
| -rw-r--r-- | include/linux/battery/charger/smb328_charger.h | 72 | ||||
| -rwxr-xr-x | include/linux/battery/charger/smb358_charger.h | 79 | ||||
| -rwxr-xr-x | include/linux/battery/charger/sprd27x3_charger4samsung.h | 124 |
8 files changed, 1172 insertions, 0 deletions
diff --git a/include/linux/battery/charger/bq24157_charger.h b/include/linux/battery/charger/bq24157_charger.h new file mode 100644 index 00000000..f6eb589d --- /dev/null +++ b/include/linux/battery/charger/bq24157_charger.h @@ -0,0 +1,48 @@ +/* + * bq24157_charger.h + * Samsung BQ24157 Charger Header + * + * Copyright (C) 2012 Samsung Electronics, Inc. + * + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#ifndef __BQ24157_CHARGER_H +#define __BQ24157_CHARGER_H __FILE__ + +/* Slave address should be shifted to the right 1bit. + * R/W bit should NOT be included. + */ +#define SEC_CHARGER_I2C_SLAVEADDR 0x6a + +/* BQ24157 Registers. */ +#define BQ24157_STATUS 0x00 +#define BQ24157_CONTROL 0x01 +#define BQ24157_VOLTAGE 0x02 +#define BQ24157_VENDOR 0x03 +#define BQ24157_CURRENT 0x04 +#define BQ24157_SPECIAL 0x05 +#define BQ24157_SAFETY 0x06 + +#define FLOAT_VOLTAGE_MASK 0xfc +#define FAST_CHARGING_CURRENT_MASK 0x70 +#define TERMINATION_CURRENT_MASK 0x07 +#define INPUT_CURRENT_MASK 0xC0 + +struct sec_chg_info { + bool dummy; +}; + +#endif /* __BQ24157_CHARGER_H */ + + + diff --git a/include/linux/battery/charger/rt5033_charger.h b/include/linux/battery/charger/rt5033_charger.h new file mode 100644 index 00000000..ce19b0d7 --- /dev/null +++ b/include/linux/battery/charger/rt5033_charger.h @@ -0,0 +1,96 @@ +/* + * drivers/battery/rt5033_charger.h + * + * Header of Richtek RT5033 Fuelgauge Driver + * + * Copyright (C) 2013 Richtek Technology Corp. + * Patrick Chang <patrick_chang@richtek.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef RT5033_CHARGER_H +#define RT5033_CHARGER_H +#include <linux/mfd/rt5033.h> +#include <linux/mfd/rt5033_irq.h> + +#define RT5033_CHG_STAT_CTRL 0x00 +#define RT5033_CHG_CTRL1 0x01 +#define RT5033_CHG_CTRL2 0x02 +#define RT5033_CHG_CTRL3 0x04 +#define RT5033_CHG_CTRL4 0x05 +#define RT5033_CHG_CTRL5 0x06 +#define RT5033_EOC_CTRL 0x07 +#define RT5033_CHG_RESET 0x08 +#define RT5033_UUG 0x19 + + +#define RT5033_CHGENB_MASK (1 << 0) +#define RT5033_OPAMODE_MASK (1 << 0) +#define RT5033_COF_EN_MASK (1 << 6) +#define RT5033_TIMEREN_MASK (1 << 0) +#define RT5033_SEL_SWFREQ_MASK (1 << 2) +#define RT5033_EOC_RESET_MASK (1<<4) +#define RT5033_TEEN_MASK (1 << 3) +#define RT5033_AICR_LIMIT_MASK (0x7 << 5) +#define RT5033_AICR_LIMIT_SHIFT 5 +#define RT5033_MIVR_MASK (0x7 << 5) +#define RT5033_MIVR_SHIFT 5 +#define RT5033_HZ_MASK (1 << 1) +#define RT5033_VOREG_MASK (0x3f << 2) +#define RT5033_VOREG_SHIFT 2 +#define RT5033_IEOC_MASK 0x07 +#define RT5033_IEOC_SHIFT 0 +#define RT5033_ICHRG_MASK 0xf0 +#define RT5033_ICHRG_SHIFT 4 + +#define RT5033_CHG_IRQ1 0x60 +#define RT5033_CHG_IRQ2 0x61 +#define RT5033_CHG_IRQ3 0x62 + +#define RT5033_CHG_IRQ_CTRL1 0x63 +#define RT5033_CHG_IRQ_CTRL2 0x64 +#define RT5033_CHG_IRQ_CTRL3 0x65 + +/* RT5033_CHG_STAT */ +#define RT5033_EXT_PMOS_CTRL 0x1 +#define RT5033_EXT_PMOS_CTRL_SHIFT 7 +#define RT5033SW_HW_CTRL 0x1 +#define RT5033SW_HW_CTRL_SHIFT 2 +#define RT5033_OTG_SS_DISABLE 0x1 +#define RT5033_OTG_SS_DISABLE_SHIFT 1 + +/* RT5033_CHR_CTRL1 */ +#define RT5033_IAICR 0x101 +#define RT5033_IAICR_SHIFT 5 +#define RT5033_HIGHER_OCP 0x1 +#define RT5033_HIGHER_OCP_SHIFT 4 +#define RT5033_TERMINATION_EN 0x0 +#define RT5033_TERMINATION_EN_SHIFT 3 +#define RT5033_SEL_SWFREQ 0x1 +#define RT5033_SEL_SWFREQ_SHIFT 2 +#define RT5033_HIGH_IMPEDANCE 0 +#define RT5033_HIGH_IMPEDANCE_SHIFT 1 +#define RT5033_OPA_MODE 2 +#define RT5033_OPA_MODE_SHIFT 0 + +/* RT5033_CHG_CTRL2 */ +#define RT5033_REG_VOLTAGE 0x011100 +#define RT5033_REG_VOLTAGE_SHIFT 2 +#define RT5033_TDEG_EOC 0x0 +#define RT5033_TDEG_EOC_SHIFT 0 + +/* RT5033_CHG_CTRL3 */ +#define RT5033_PPC_TE 0x0 +#define RT5033_PPC_TE_SHIFT 7 +#define RT5033_CHG_EN 0x1 +#define RT5033_CHG_EN_SHIFT 6 + + + +extern sec_battery_platform_data_t sec_battery_pdata; + + +#endif /*RT5033_CHARGER_H*/ diff --git a/include/linux/battery/charger/rt9455_charger.h b/include/linux/battery/charger/rt9455_charger.h new file mode 100644 index 00000000..c862fa99 --- /dev/null +++ b/include/linux/battery/charger/rt9455_charger.h @@ -0,0 +1,287 @@ +/* + * include/linux/battery/charger/rt9455_charger.h + * Include header file for Richtek RT9455 Switch Mode Charger IC + * + * Copyright (C) 2013 Richtek Electronics + * cy_huang <cy_huang@richtek.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __LINUX_BATTERY_CHARGER_RT9455_H + +#define SEC_CHARGER_I2C_SLAVEADDR (0x22) + +#define RT9455_DEVICE_NAME "RT9455" + +#define RT9455_RST_MASK 0x80 +#define RT9455_RST_SHIFT 7 + +#define RT9455_OPAMODE_MASK 0x01 +#define RT9455_OPAMODE_SHIFT 0 +enum { + OPA_CHARGER_MODE, + OPA_BOOST_MODE, +}; + +enum { + IAICR_EXTERNAL, + IAICR_INTERNAL, +}; + +enum { + OCP_2P5A, + OCP_3P5A, +}; + +enum { + SEL_FREQ_3MHz, + SEL_FREQ_1P5MHz, +}; + +#define RT9455_AICR_LIMIT_MASK 0xC0 +#define RT9455_AICR_LIMIT_SHIFT 6 +enum { + IAICR_LIMIT_100MA, + IAICR_LIMIT_500MA, + IAICR_LIMIT_1A, + IAICR_LIMIT_NO, + IAICR_LIMIT_MAX, +}; + +#define RT9455_VOREG_MASK 0xFC +#define RT9455_VOREG_SHIFT 2 + +enum { + OTGPL_ACTIVE_LOW, + OTGPL_ACTIVE_HIGH, +}; + +#define RT9455_IEOC_MASK 0x3 +#define RT9455_IEOC_SHIFT 0 +enum { + IEOC_10P, + IEOC_30P, + IEOC_20P, + IEOC_RESV, +}; + +enum { + IPREC_20MA, + IPREC_40MA, + IPREC_60MA, +}; + +enum { + VDPM_4V, + VDPM_4P25V, + VDPM_4P5V, + VDPM_DISABLE, +}; + +enum { + VPREC_2V, + VPREC_2P2V, + VPREC_2P4V, + VPREC_2P6V, + VPREC_2P8V, + VPREC_3V, +}; + + +#define RT9455_ICHRG_MASK 0x70 +#define RT9455_ICHRG_SHIFT 4 +enum { + ICHRG_20MV, + ICHRG_26MV, + ICHRG_32MV, + ICHRG_38MV, + ICHRG_44MV, + ICHRG_50MV, + ICHRG_56MV, + ICHRG_62MV, + ICHRG_MAX, +}; + +#define RT9455_CHGEN_MASK 0x10 +#define RT9455_CHGEN_SHIFT 4 + +#define RT9455_TEEN_MASK 0x80 +#define RT9455_TEEN_SHIFT 3 + +enum { + RT9455_REG_CTRL1, + RT9455_REG_CTRL2, + RT9455_REG_CTRL3, + RT9455_REG_DEVICE_ID, + RT9455_REG_CTRL4, + RT9455_REG_CTRL5, + RT9455_REG_CTRL6, + RT9455_REG_CTRL7, + RT9455_REG_IRQ1, + RT9455_REG_IRQ2, + RT9455_REG_IRQ3, + RT9455_REG_MASK1, + RT9455_REG_MASK2, + RT9455_REG_MASK3, + RT9455_REG_MAX, +}; + +// VBOOST EVENT BIT +#define RT9455_EVENT_BSTVINOVI 0x80 +#define RT9455_EVENT_BSTOLI 0x40 +#define RT9455_EVENT_BSTLOWVI 0x20 +#define RT9455_EVENT_BST32SI 0x08 + +// CHARGER EVENT BIT +#define RT9455_EVENT_CHRVPI 0x80 +#define RT9455_EVENT_CHBATOVI 0x20 +#define RT9455_EVENT_CHTERMI 0x10 +#define RT9455_EVENT_CHRCHGI 0x08 +#define RT9455_EVNET_CH32MI 0x04 +#define RT9455_EVENT_CHTREGI 0x02 +#define RT9455_EVENT_CHDPMI 0x01 + +// GENERAL EVENT BIT +#define RT9455_EVENT_TSDI 0x80 +#define RT9455_EVENT_VINOVPI 0x40 +#define RT9455_EVENT_BATAB 0x01 + +// RESET EVENT BIT +#define RT9455_EVENT_BEFORE_RST 0x80 +#define RT9455_EVENT_AFTER_RST 0x40 + +// If not set, no irq event will be masked +struct rt9455_irq_mask { + union { + struct { + unsigned char BATABM:1; + unsigned char Resv:5; + unsigned char VINOVPIM:1; + unsigned char TSDM:1; + }bitfield; + unsigned char val; + }mask1; + union { + struct { + unsigned char CHDPMIM:1; + unsigned char CHTREGIM:1; + unsigned char CH32MIM:1; + unsigned char CHRCHGIM:1; + unsigned char CHTERMIM:1; + unsigned char CHBATOVIM:1; + unsigned char Resv:1; + unsigned char CHRVPIM:1; + }bitfield; + unsigned char val; + }mask2; + union { + struct { + unsigned char Resv1:3; + unsigned char BST32SIM:1; + unsigned char Resv2:1; + unsigned char BSTLOWVIM:1; + unsigned char BSTOLIM:1; + unsigned char BSTVIMOVIM:1; + }bitfield; + unsigned char val; + }mask3; +}; + +struct rt9455_init_ctrlval { + union { + struct { + unsigned char OPA_MODE:1; + unsigned char HZ_BIT:1; + unsigned char IAICR_INT:1; + unsigned char TE:1; + unsigned char HIGH_OCP:1; + unsigned char SEL_SWFREQ:1; + unsigned char IAICR:2; + }bitfield; + unsigned char val; + }ctrl2; + union { + struct { + unsigned char OTG_EN:1; + unsigned char OTG_PL:1; + unsigned char VOREG:6; + }bitfield; + unsigned char val; + }ctrl3; + union { + struct { + unsigned char IEOC:2; + unsigned char IPREC:2; + unsigned char VDPM:2; + unsigned char Resv:1; + unsigned char TMR_EN:1; + }bitfield; + unsigned char val; + }ctrl5; + union { + struct { + unsigned char VPREC:3; + unsigned char Resv1:1; + unsigned char ICHRG:3; + unsigned char Resv2:1; + }bitfield; + unsigned char val; + }ctrl6; + union { + struct { + unsigned char VMREG:4; + unsigned char CHG_EN:1; + unsigned char Resv1:1; + unsigned char BATD_EN:1; + unsigned char Resv2:1; + }bitfield; + unsigned char val; + }ctrl7; +}; + +struct rt9455_callbacks { + void (*boost_callback)(int); + void (*charger_callback)(int); + void (*general_callback)(int); + void (*reset_callback)(int); +}; + +struct rt9455_chip_init_data { + struct rt9455_irq_mask irq_mask; + struct rt9455_init_ctrlval init_ctrlval; + struct rt9455_callbacks *callbacks; +}; + +#if 0 +struct rt9455_chip { + struct i2c_client *i2c; + struct device *dev; + struct workqueue_struct *wq; + struct rt9455_callbacks *cb; + int intr_gpio; + int irq; + int suspend; + int otg_ext_enable; + struct work_struct work; + struct mutex io_lock; +}; +#endif + +//external function for the customer +#if 0 +int rt9455_ext_force_otamode(int onoff); +int rt9455_ext_charger_current(int value); +int rt9455_ext_charger_switch(int onoff); +#endif + +#ifdef CONFIG_CHARGER_RT9455_DBG +#define RT_DBG(format, args...) \ + pr_info("%s:%s() line-%d: " format, RT9455_DEVICE_NAME, __FUNCTION__, __LINE__, ##args) +#else +#define RT_DBG(format, args...) +#endif /* CONFIG_CHARGER_RT9455_DBG */ + +#endif /* __LINUX_BATTERY_CHARGER_RT9455_H */ diff --git a/include/linux/battery/charger/sm5414_charger.h b/include/linux/battery/charger/sm5414_charger.h new file mode 100644 index 00000000..1bee317b --- /dev/null +++ b/include/linux/battery/charger/sm5414_charger.h @@ -0,0 +1,299 @@ +/* + * SM5414_charger.h + * SiliconMitus SM5414 Charger Header + * + * Copyright (C) 2013 SiliconMitus + * + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#ifndef __SM5414_CHARGER_H +#define __SM5414_CHARGER_H __FILE__ + +/* Slave address should be shifted to the right 1bit. + * R/W bit should NOT be included. + */ +#define SEC_CHARGER_I2C_SLAVEADDR (0x92>>1) + +#define CALL_EVENT_SIOP 50 +#define HIGH_TEMP_SIOP 30 +#define CALL_EVENT_CURRENT 450 +#define HIGH_TEMP_CURRENT 350 + +/* SM5414 Registers. */ + +#define SM5414_INT1 0x00 +#define SM5414_INT2 0x01 +#define SM5414_INT3 0x02 +#define SM5414_INTMASK1 0x03 +#define SM5414_INTMASK2 0x04 +#define SM5414_INTMASK3 0x05 +#define SM5414_STATUS 0x06 +#define SM5414_CTRL 0x07 +#define SM5414_VBUSCTRL 0x08 +#define SM5414_CHGCTRL1 0x09 +#define SM5414_CHGCTRL2 0x0A +#define SM5414_CHGCTRL3 0x0B +#define SM5414_CHGCTRL4 0x0C +#define SM5414_CHGCTRL5 0x0D + +#define SM5414_INT1_THEMREG 0x01 +#define SM5414_INT1_THEMSHDN 0x02 +#define SM5414_INT1_BATOVP 0x04 +#define SM5414_INT1_VBUSLIMIT 0x08 +#define SM5414_INT1_AICL 0x10 +#define SM5414_INT1_VBUSINOK 0x20 +#define SM5414_INT1_VBUSUVLO 0x40 +#define SM5414_INT1_VBUSOVP 0x80 + +#define SM5414_INT2_TOPOFF 0x01 +#define SM5414_INT2_DONE 0x02 +#define SM5414_INT2_CHGRSTF 0x04 +#define SM5414_INT2_PRETMROFF 0x08 +#define SM5414_INT2_OTGFAIL 0x10 +#define SM5414_INT2_WEAKBAT 0x20 +#define SM5414_INT2_NOBAT 0x40 +#define SM5414_INT2_FASTTMROFF 0x80 + +#define SM5414_INT3_DISLIMIT 0x01 +#define SM5414_INT3_VSYSOLP 0x02 +#define SM5414_INT3_VSYSNG 0x04 +#define SM5414_INT3_VSYSOK 0x08 +#define SM5414_CHGCTRL1_AUTOSTOP (1 << 3) + +/* FAST Charge current */ +#define FASTCHG_100mA 0 +#define FASTCHG_150mA 1 +#define FASTCHG_200mA 2 +#define FASTCHG_250mA 3 +#define FASTCHG_300mA 4 +#define FASTCHG_350mA 5 +#define FASTCHG_400mA 6 +#define FASTCHG_450mA 7 +#define FASTCHG_500mA 8 +#define FASTCHG_550mA 9 +#define FASTCHG_600mA 10 +#define FASTCHG_650mA 11 +#define FASTCHG_700mA 12 +#define FASTCHG_750mA 13 +#define FASTCHG_800mA 14 +#define FASTCHG_850mA 15 +#define FASTCHG_900mA 16 +#define FASTCHG_950mA 17 +#define FASTCHG_1000mA 18 +#define FASTCHG_1050mA 19 +#define FASTCHG_1100mA 20 +#define FASTCHG_1150mA 21 +#define FASTCHG_1200mA 22 +#define FASTCHG_1250mA 23 +#define FASTCHG_1300mA 24 +#define FASTCHG_1350mA 25 +#define FASTCHG_1400mA 26 +#define FASTCHG_1450mA 27 +#define FASTCHG_1500mA 28 +#define FASTCHG_1550mA 29 +#define FASTCHG_1600mA 30 +#define FASTCHG_1650mA 31 +#define FASTCHG_1700mA 32 +#define FASTCHG_1750mA 33 +#define FASTCHG_1800mA 34 +#define FASTCHG_1850mA 35 +#define FASTCHG_1900mA 36 +#define FASTCHG_1950mA 37 +#define FASTCHG_2000mA 38 +#define FASTCHG_2050mA 39 +#define FASTCHG_2100mA 40 +#define FASTCHG_2150mA 41 +#define FASTCHG_2200mA 42 +#define FASTCHG_2250mA 43 +#define FASTCHG_2300mA 44 +#define FASTCHG_2350mA 45 +#define FASTCHG_2400mA 46 +#define FASTCHG_2450mA 47 +#define FASTCHG_2500mA 48 + +/* Input current Limit */ +#define VBUSLIMIT_100mA 0 +#define VBUSLIMIT_150mA 1 +#define VBUSLIMIT_200mA 2 +#define VBUSLIMIT_250mA 3 +#define VBUSLIMIT_300mA 4 +#define VBUSLIMIT_350mA 5 +#define VBUSLIMIT_400mA 6 +#define VBUSLIMIT_450mA 7 +#define VBUSLIMIT_500mA 8 +#define VBUSLIMIT_550mA 9 +#define VBUSLIMIT_600mA 10 +#define VBUSLIMIT_650mA 11 +#define VBUSLIMIT_700mA 12 +#define VBUSLIMIT_750mA 13 +#define VBUSLIMIT_800mA 14 +#define VBUSLIMIT_850mA 15 +#define VBUSLIMIT_900mA 16 +#define VBUSLIMIT_950mA 17 +#define VBUSLIMIT_1000mA 18 +#define VBUSLIMIT_1050mA 19 +#define VBUSLIMIT_1100mA 20 +#define VBUSLIMIT_1150mA 21 +#define VBUSLIMIT_1200mA 22 +#define VBUSLIMIT_1250mA 23 +#define VBUSLIMIT_1300mA 24 +#define VBUSLIMIT_1350mA 25 +#define VBUSLIMIT_1400mA 26 +#define VBUSLIMIT_1450mA 27 +#define VBUSLIMIT_1500mA 28 +#define VBUSLIMIT_1550mA 29 +#define VBUSLIMIT_1600mA 30 +#define VBUSLIMIT_1650mA 31 +#define VBUSLIMIT_1700mA 32 +#define VBUSLIMIT_1750mA 33 +#define VBUSLIMIT_1800mA 34 +#define VBUSLIMIT_1850mA 35 +#define VBUSLIMIT_1900mA 36 +#define VBUSLIMIT_1950mA 37 +#define VBUSLIMIT_2000mA 38 +#define VBUSLIMIT_2050mA 39 +#define VBUSLIMIT_2100mA 40 +#define VBUSLIMIT_2150mA 41 +#define VBUSLIMIT_2200mA 42 +#define VBUSLIMIT_2250mA 43 +#define VBUSLIMIT_2300mA 44 +#define VBUSLIMIT_2350mA 45 +#define VBUSLIMIT_2400mA 46 +#define VBUSLIMIT_2450mA 47 +#define VBUSLIMIT_2500mA 48 + +/* AICL TH */ +#define AICL_THRESHOLD_4_3_V 0 +#define AICL_THRESHOLD_4_4_V 1 +#define AICL_THRESHOLD_4_5_V 2 +#define AICL_THRESHOLD_4_6_V 3 +#define AICL_THRESHOLD_4_7_V 4 +#define AICL_THRESHOLD_4_8_V 5 +#define AICL_THRESHOLD_4_9_V 6 +#define AICL_THRESHOLD_MASK 0x0F + +/* AUTOSTOP */ +#define AUTOSTOP_EN (1<<3) + +/* AICLEN */ +#define AICL_EN (1<<2) + +/* PRECHG */ +#define PRECHG_150mA 0 +#define PRECHG_250mA 1 +#define PRECHG_350mA 2 +#define PRECHG_450mA 3 +#define PRECHG_MASK 0xFC + +/* Battery Regulation Voltage */ +#define BATREG_4_1_0_0_V 0 +#define BATREG_4_1_2_5_V 1 +#define BATREG_4_1_5_0_V 2 +#define BATREG_4_1_7_5_V 3 +#define BATREG_4_2_0_0_V 4 +#define BATREG_4_2_2_5_V 5 +#define BATREG_4_2_5_0_V 6 +#define BATREG_4_2_7_5_V 7 +#define BATREG_4_3_0_0_V 8 +#define BATREG_4_3_2_5_V 9 +#define BATREG_4_3_5_0_V 10 +#define BATREG_4_3_7_5_V 11 +#define BATREG_4_4_0_0_V 12 +#define BATREG_4_4_2_5_V 13 +#define BATREG_4_4_5_0_V 14 +#define BATREG_4_4_7_5_V 15 +#define BATREG_MASK 0x0F + +/* Weak Battery Voltage */ +#define WEAKBAT_3_0_0_V 0 +#define WEAKBAT_3_0_5_V 1 +#define WEAKBAT_3_1_0_V 2 +#define WEAKBAT_3_1_5_V 3 +#define WEAKBAT_3_2_0_V 4 +#define WEAKBAT_3_2_5_V 5 +#define WEAKBAT_3_3_0_V 6 +#define WEAKBAT_3_3_5_V 7 +#define WEAKBAT_3_4_0_V 8 +#define WEAKBAT_3_4_5_V 9 +#define WEAKBAT_3_5_0_V 10 +#define WEAKBAT_3_5_5_V 11 +#define WEAKBAT_3_6_0_V 12 +#define WEAKBAT_3_6_5_V 13 +#define WEAKBAT_3_7_0_V 14 +#define WEAKBAT_3_7_5_V 15 +#define WEAKBAT_MASK 0xF0 + +/* top-off charge current */ +#define TOPOFF_100mA 0 +#define TOPOFF_150mA 1 +#define TOPOFF_200mA 2 +#define TOPOFF_250mA 3 +#define TOPOFF_300mA 4 +#define TOPOFF_350mA 5 +#define TOPOFF_400mA 6 +#define TOPOFF_450mA 7 +#define TOPOFF_500mA 8 +#define TOPOFF_550mA 9 +#define TOPOFF_600mA 10 +#define TOPOFF_650mA 11 +#define TOPOFF_MASK 0x07 + +/* discharge current */ +#define DISCHARGELIMIT_DISABLED 0 +#define DISCHARGELIMIT_2_0_A 1 +#define DISCHARGELIMIT_2_5_A 2 +#define DISCHARGELIMIT_3_0_A 3 +#define DISCHARGELIMIT_3_5_A 4 +#define DISCHARGELIMIT_4_0_A 5 +#define DISCHARGELIMIT_4_5_A 6 +#define DISCHARGELIMIT_5_0_A 7 +#define DISCHARGELIMIT_MASK 0xF8 + +/* OTG voltage */ +#define VOTG_5_0_V 0 +#define VOTG_5_1_V 1 +#define VOTG_5_2_V 2 +#define VOTG_MASK 0x0F + +/* Fast timer */ +#define FASTTIMER_3_5_HOUR 0 +#define FASTTIMER_4_5_HOUR 1 +#define FASTTIMER_5_5_HOUR 2 +#define FASTTIMER_DISABLED 3 +#define FASTTIMER_MASK 0xF3 + +/* Topoff timer */ +#define TOPOFFTIMER_10MIN 0 +#define TOPOFFTIMER_20MIN 1 +#define TOPOFFTIMER_30MIN 2 +#define TOPOFFTIMER_45MIN 3 +#define TOPOFFTIMER_MASK 0xFC + +/* Enable charger */ +#define CHARGE_EN 0x02 + +void SM5414_i2c_int_read(struct i2c_client *client); + +#define BATREG_MASK 0x0F + +struct sec_chg_info { + bool dummy; + u8 int_1_s; + u8 int_2_s; + u8 int_3_s; + u8 int_1_h; + u8 int_2_h; + u8 int_3_h; +}; + +#endif /* __SM5414_CHARGER_H */ diff --git a/include/linux/battery/charger/sm5701_charger.h b/include/linux/battery/charger/sm5701_charger.h new file mode 100644 index 00000000..9956cddf --- /dev/null +++ b/include/linux/battery/charger/sm5701_charger.h @@ -0,0 +1,167 @@ +/* + * SM5701_charger.h + * SiliconMitus SM5701 Charger Header + * + * Copyright (C) 2014 SiliconMitus + * + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#ifndef __SM5701_CHARGER_H +#define __SM5701_CHARGER_H __FILE__ +#include <linux/mfd/core.h> +#include <linux/mfd/sm5701_core.h> + +/* SM5701 Registers. */ +#define SM5701_INT1 0x00 +#define SM5701_INT2 0x01 +#define SM5701_INT3 0x02 +#define SM5701_INTMASK1 0x03 +#define SM5701_INTMASK2 0x04 +#define SM5701_INTMASK3 0x05 +#define SM5701_STATUS1 0x06 +#define SM5701_STATUS2 0x07 +#define SM5701_STATUS3 0x08 +#define SM5701_CNTL 0x09 +#define SM5701_VBUSCNTL 0x0A +#define SM5701_CHGCNTL1 0x0B +#define SM5701_CHGCNTL2 0x0C +#define SM5701_CHGCNTL3 0x0D +#define SM5701_CHGCNTL4 0x0E + +#define SM5701_FLEDCNTL1 0x0F +#define SM5701_FLEDCNTL2 0x10 +#define SM5701_FLEDCNTL3 0x11 +#define SM5701_FLEDCNTL4 0x12 +#define SM5701_FLEDCNTL5 0x13 +#define SM5701_FLEDCNTL6 0x14 +#define SM5701_DEVICE_ID 0x15 + +#define BATREG_MASK 0x00 + +//INT1 +#define SM5701_INT1_AICL 0x01 +#define SM5701_INT1_BATOVP 0x02 +#define SM5701_INT1_VBUSOK 0x04 +#define SM5701_INT1_VBUSUVLO 0x08 +#define SM5701_INT1_VBUSOVP 0x10 +#define SM5701_INT1_VBUSLIMIT 0x20 +#define SM5701_INT1_CHGRSTF 0x40 +#define SM5701_INT1_NOBAT 0x80 +//INT2 +#define SM5701_INT2_TOPOFF 0x01 +#define SM5701_INT2_DONE 0x02 +#define SM5701_INT2_FASTTMROFF 0x04 +#define SM5701_INT2_CHGON 0x08 +//INT3 +#define SM5701_INT3_THEMSHDN 0x01 +#define SM5701_INT3_THEMREG 0x02 +#define SM5701_INT3_FLEDSHORT 0x04 +#define SM5701_INT3_FLEDOPEN 0x08 +#define SM5701_INT3_BOOSTPOK_NG 0x10 +#define SM5701_INT3_BOOSTPOK 0x20 +#define SM5701_INT3_AMSTMROFF 0x40 +#define SM5701_INT3_LOWBATT 0x80 +//INTMSK1 +#define SM5701_INTMSK1_AICLM 0x01 +#define SM5701_INTMSK1_BATOVPM 0x02 +#define SM5701_INTMSK1_VBUSOKM 0x04 +#define SM5701_INTMSK1_VBUSUVLOM 0x08 +#define SM5701_INTMSK1_VBUSOVPM 0x10 +#define SM5701_INTMSK1_VBUSLIMITM 0x20 +#define SM5701_INTMSK1_CHGRSTFM 0x40 +#define SM5701_INTMSK1_NOBATM 0x80 +//INTMSK2 +#define SM5701_INTMSK2_TOPOFFM 0x01 +#define SM5701_INTMSK2_DONEM 0x02 +#define SM5701_INTMSK2_FASTTMROFFM 0x04 +#define SM5701_INTMSK2_CHGONM 0x08 +//INTMSK3 +#define SM5701_INTMSK3_THEMSHDNM 0x01 +#define SM5701_INTMSK3_THEMREGM 0x02 +#define SM5701_INTMSK3_FLEDSHORTM 0x04 +#define SM5701_INTMSK3_FLEDOPENM 0x08 +#define SM5701_INTMSK3_BOOSTPOK_NGM 0x10 +#define SM5701_INTMSK3_BOOSTPOKM 0x20 +#define SM5701_INTMSK3_AMSTMROFFM 0x40 +#define SM5701_INTMSK3_LOWBATTM 0x80 +//STATUS1 +#define SM5701_STATUS1_AICL 0x01 +#define SM5701_STATUS1_BATOVP 0x02 +#define SM5701_STATUS1_VBUSOK 0x04 +#define SM5701_STATUS1_VBUSUVLO 0x08 +#define SM5701_STATUS1_VBUSOVP 0x10 +#define SM5701_STATUS1_VBUSLIMIT 0x20 +#define SM5701_STATUS1_CHGRSTF 0x40 +#define SM5701_STATUS1_NOBAT 0x80 +//STATUS2 +#define SM5701_STATUS2_TOPOFF 0x01 +#define SM5701_STATUS2_DONE 0x02 +#define SM5701_STATUS2_FASTTMROFF 0x04 +#define SM5701_STATUS2_CHGON 0x08 +//STATUS3 +#define SM5701_STATUS3_THEMSHDN 0x01 +#define SM5701_STATUS3_THEMREG 0x02 +#define SM5701_STATUS3_FLEDSHORT 0x04 +#define SM5701_STATUS3_FLEDOPEN 0x08 +#define SM5701_STATUS3_BOOSTPOK_NG 0x10 +#define SM5701_STATUS3_BOOSTPOK 0x20 +#define SM5701_STATUS3_ABSTMROFF 0x40 +#define SM5701_STATUS3_LOWBATT 0x80 +//CNTL +#define SM5701_CNTL_OPERATIONMODE 0x07 +#define SM5701_CNTL_RESET 0x08 +#define SM5701_CNTL_OVPSEL 0x30 +#define SM5701_CNTL_FREQSEL 0xc0 +#define SM5701_RESET 0x1 +//VBUSCNTL +#define SM5701_VBUSCNTL_VBUSLIMIT 0x07 +#define SM5701_VBUSCNTL_AICLTH 0x38 +#define SM5701_VBUSCNTL_AICLEN 0x40 + +//CHGCNTL1 +#define SM5701_CHGCNTL1_TOPOFF 0x0F +#define SM5701_CHGCNTL1_AUTOSTOP 0x10 +#define SM5701_CHGCNTL1_HSSLPCTRL 0x60 + +//CHGCNTL2 +#define SM5701_CHGCNTL2_FASTCHG 0x3F + +//CHGCNTL3 +#define SM5701_CHGCNTL3_BATREG 0x1F + +//CHGCNTL4 +#define SM5701_CHGCNTL4_TOPOFFTIMER 0x03 +#define SM5701_CHGCNTL4_FASTTIMER 0x0B + +#define SM5701_STATUS1_NOBAT_SHIFT 7 + +/* Enable charger Operation Mode */ +#define OP_MODE_CHG_ON 0x02 + +/* Disable charger Operation Mode */ +#define OP_MODE_CHG_OFF 0x01 + +#define FREQ_15 (0x00 << 6) +#define FREQ_12 (0x01 << 6) +#define FREQ_18 (0x02 << 6) +#define FREQ_24 (0x03 << 6) + +enum { + POWER_SUPPLY_VBUS_UNKNOWN = 0, + POWER_SUPPLY_VBUS_UVLO, + POWER_SUPPLY_VBUS_WEAK, + POWER_SUPPLY_VBUS_OVLO, + POWER_SUPPLY_VBUS_GOOD, +}; + +#endif /* __SM5701_CHARGER_H */ diff --git a/include/linux/battery/charger/smb328_charger.h b/include/linux/battery/charger/smb328_charger.h new file mode 100644 index 00000000..13da7b1c --- /dev/null +++ b/include/linux/battery/charger/smb328_charger.h @@ -0,0 +1,72 @@ +/* + * smb328_charger.h + * Samsung SMB328 Charger Header + * + * Copyright (C) 2012 Samsung Electronics, Inc. + * + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#ifndef __SMB328_CHARGER_H +#define __SMB328_CHARGER_H __FILE__ + +#if defined(CONFIG_MACH_DELOSLTE_KOR_SKT) || defined(CONFIG_MACH_DELOSLTE_KOR_KT) || \ + defined(CONFIG_MACH_DELOSLTE_KOR_LGT) +#define SIOP_CHARGING_CURRENT_LIMIT_FEATURE +#endif + +/* Slave address should be shifted to the right 1bit. + * R/W bit should NOT be included. + */ + +#define SEC_CHARGER_I2C_SLAVEADDR (0x69 >> 1) + +#define CMD_A_ALLOW_WRITE BIT(7) +#define CMD_CHARGE_EN BIT(4) +#define CFG_AICL_ENABLE BIT(2) +#define CFG_OTG_ENABLE BIT(5) +#define CFG_AUTOMATIC_INPUT_CURRENT_LIMIT BIT(4) +#define CFG_AICL_VOLTAGE 0x03 +#define CFG_FLOAT_VOLTAGE_MASK 0x7E +#define CFG_FLOAT_VOLTAGE_SHIFT 1 +#define CFG_CHARGE_CURRENT_MASK 0xE0 +#define CFG_CHARGE_CURRENT_SHIFT 5 +#define CFG_INPUT_CURRENT_MASK 0xE0 +#define CFG_INPUT_CURRENT_SHIFT 5 +#define CFG_TERMINATION_CURRENT_MASK 0x07 +#define CFG_TERMINATION_CURRENT_SHIFT 0 +#define CFG_STAT_ASSETION_TERM_MASK 0xE0 +#define CFG_STAT_ASSETION_TERM_SHIFT 5 + +/* Register define */ +#define SMB328_CHARGE_CURRENT 0X00 +#define SMB328_INPUT_CURRENTLIMIT 0X01 +#define SMB328_FLOAT_VOLTAGE 0X02 +#define SMB328_FUNCTION_CONTROL_A 0X03 +#define SMB328_FUNCTION_CONTROL_B 0X04 +#define SMB328_FUNCTION_CONTROL_C 0X05 +#define SMB328_OTG_POWER_AND_LDO 0x06 +#define SMB328_VARIOUS_FUNCTIONS 0x07 +#define SMB328_OTHER_CONFIGURATION_SELECTION 0x08 +#define SMB328_INTERRUPT_SIGNAL_SELECTION 0x09 + +#define SMB328_COMMAND 0x31 +#define SMB328_INTERRUPT_STATUS_A 0x32 +#define SMB328_BATTERY_CHARGING_STATUS_A 0x33 +#define SMB328_INTERRUPT_STATUS_B 0x34 +#define SMB328_BATTERY_CHARGING_STATUS_B 0x35 +#define SMB328_BATTERY_CHARGING_STATUS_C 0x36 +#define SMB328_INTERRUPT_STATUS_C 0x37 +#define SMB328_BATTERY_CHARGING_STATUS_D 0x38 +#define SMB328_AUTOMATIC_INPUT_CURRENT_STATUS 0x39 + +#endif /* __SMB328_CHARGER_H */ diff --git a/include/linux/battery/charger/smb358_charger.h b/include/linux/battery/charger/smb358_charger.h new file mode 100755 index 00000000..26f9e620 --- /dev/null +++ b/include/linux/battery/charger/smb358_charger.h @@ -0,0 +1,79 @@ +/* + * smb358_charger.h + * Samsung SMB358 Charger Header + * + * Copyright (C) 2012 Samsung Electronics, Inc. + * + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#ifndef __SMB358_CHARGER_H +#define __SMB358_CHARGER_H __FILE__ + +/* Slave address should be shifted to the right 1bit. + * R/W bit should NOT be included. + */ +#define SEC_CHARGER_I2C_SLAVEADDR 0x6A + +/* Register define */ +#define SMB358_CHARGE_CURRENT 0x00 +#define SMB358_INPUT_CURRENTLIMIT 0x01 +#define SMB358_VARIOUS_FUNCTIONS 0x02 +#define SMB358_FLOAT_VOLTAGE 0x03 +#define SMB358_CHARGE_CONTROL 0x04 +#define SMB358_STAT_TIMERS_CONTROL 0x05 +#define SMB358_PIN_ENABLE_CONTROL 0x06 +#define SMB358_THERM_CONTROL_A 0x07 +#define SMB358_SYSOK_USB30_SELECTION 0x08 +#define SMB358_OTHER_CONTROL_A 0x09 +#define SMB358_OTG_TLIM_THERM_CONTROL 0x0A +#define SMB358_LIMIT_CELL_TEMPERATURE_MONITOR 0x0B +#define SMB358_FAULT_INTERRUPT 0x0C +#define SMB358_STATUS_INTERRUPT 0x0D +#define SMB358_I2C_BUS_SLAVE_ADDR 0x0E + +#define SMB358_COMMAND_A 0x30 +#define SMB358_COMMAND_B 0x31 +#define SMB358_COMMAND_C 0x33 +#define SMB358_ADC_STATUS 0x34 +#define SMB358_INTERRUPT_STATUS_A 0x35 +#define SMB358_INTERRUPT_STATUS_B 0x36 +#define SMB358_INTERRUPT_STATUS_C 0x37 +#define SMB358_INTERRUPT_STATUS_D 0x38 +#define SMB358_INTERRUPT_STATUS_E 0x39 +#define SMB358_INTERRUPT_STATUS_F 0x3A +#define SMB358_STATUS_A 0x3B +#define SMB358_STATUS_B 0x3C +#define SMB358_STATUS_C 0x3D +#define SMB358_STATUS_D 0x3E +#define SMB358_STATUS_E 0x3F + +#define ENABLE_WRT_ACCESS 0x80 +#define SMB358_ENABLE_WRITE 1 +#define SMB358_DISABLE_WRITE 0 + +#define SMB358_ENABLE_CHARGER 0x02 + +ssize_t smb358_chg_show_attrs(struct device *dev, + struct device_attribute *attr, char *buf); + +ssize_t smb358_chg_store_attrs(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count); + +#define SMB358_CHARGER_ATTR(_name) \ +{ \ + .attr = {.name = #_name, .mode = 0664}, \ + .show = smb358_chg_show_attrs, \ + .store = smb358_chg_store_attrs, \ +} +#endif /* __SMB358_CHARGER_H */ diff --git a/include/linux/battery/charger/sprd27x3_charger4samsung.h b/include/linux/battery/charger/sprd27x3_charger4samsung.h new file mode 100755 index 00000000..425a9633 --- /dev/null +++ b/include/linux/battery/charger/sprd27x3_charger4samsung.h @@ -0,0 +1,124 @@ +/* + * sprd27x3_charger4samsung.h + * Samsung SPRD27X3 Charger Header + * + * Copyright (C) 2012 Samsung Electronics, Inc. + * + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#ifndef __SPRD27X3_CHARGER4SAMSUNG_H +#define __SPRD27X3_CHARGER4SAMSUNG_H + +/* Slave address should be shifted to the right 1bit. + * R/W bit should NOT be included. + */ + +#define SPRDBAT_AUXADC_CAL_NO 0 +#define SPRDBAT_AUXADC_CAL_NV 1 +#define SPRDBAT_AUXADC_CAL_CHIP 2 + +#define SPRDBAT_CHG_END_NONE_BIT 0 +#define SPRDBAT_CHG_END_FULL_BIT (1 << 0) +#define SPRDBAT_CHG_END_OTP_OVERHEAT_BIT (1 << 1) +#define SPRDBAT_CHG_END_OTP_COLD_BIT (1 << 2) +#define SPRDBAT_CHG_END_TIMEOUT_BIT (1 << 3) +#define SPRDBAT_CHG_END_OVP_BIT (1 << 4) + +//#define SPRDBAT_AVERAGE_COUNT 3 + +#define SPRDBAT_AUXADC_CAL_TYPE_NO 0 +#define SPRDBAT_AUXADC_CAL_TYPE_NV 1 +#define SPRDBAT_AUXADC_CAL_TYPE_EFUSE 2 + +#define SPRDBAT_CCCV_MIN 0x00 +#define SPRDBAT_CCCV_MAX 0x3F +#define SPRDBAT_CCCV_DEFAULT 0x0 +#define ONE_CCCV_STEP_VOL 75 //7.5mV + +#ifdef CONFIG_MACH_VIVALTO +#define SPRDBAT_CHG_END_VOL_PURE (4350) +#elif defined(CONFIG_MACH_HIGGS) +#define SPRDBAT_CHG_END_VOL_PURE (4350) +#elif defined(CONFIG_MACH_YOUNG2) +#define SPRDBAT_CHG_END_VOL_PURE (4200) +#else +#define SPRDBAT_CHG_END_VOL_PURE (4200) +#endif +#define SPRDBAT_CHG_END_H (SPRDBAT_CHG_END_VOL_PURE + 25) +#define SPRDBAT_CHG_END_L (SPRDBAT_CHG_END_VOL_PURE - 10) +#define SPRDBAT_RECHG_VOL (SPRDBAT_CHG_END_VOL_PURE - 70) //recharge voltage + +#define SPRDBAT_CHG_OVP_LEVEL_MIN 5600 +#define SPRDBAT_CHG_OVP_LEVEL_MAX 9000 +#define SPRDBAT_OVP_STOP_VOL 6500 +#define SPRDBAT_OVP_RESTERT_VOL 5800 //reserved + +/*charge current type*/ +#define SPRDBAT_CHG_CUR_LEVEL_MIN 300 +#define SPRDBAT_CHG_CUR_LEVEL_MAX 2300 +#define SPRDBAT_SDP_CUR_LEVEL 500 //usb +#define SPRDBAT_DCP_CUR_LEVEL 700 //AC +#define SPRDBAT_CDP_CUR_LEVEL 700 //AC&USB + +#define SPRDBAT_CHG_END_CUR 70 + +#define SPRDBAT_OTP_HIGH_STOP 600 //60C +#define SPRDBAT_OTP_HIGH_RESTART (550) //55C +#define SPRDBAT_OTP_LOW_STOP -50 //-5C +#define SPRDBAT_OTP_LOW_RESTART 0 //0C + +#define SPRDBAT_CHG_NORMAL_TIMEOUT (6*60*60) /* set for charge over time, 6 hours */ +#define SPRDBAT_CHG_SPECIAL_TIMEOUT (90*60) /* when charge timeout, recharge timeout is 90min */ + +#define SPRDBAT_TRICKLE_CHG_TIME (1500) //reserved + +#define SPRDBAT_ADC_CHANNEL_VCHG ADC_CHANNEL_VCHGSEN + +#define SPRDBAT_ADC_CHANNEL_TEMP ADC_CHANNEL_3 +#define SPRDBAT_ADC_CHANNEL_TEMP_WPA ADC_CHANNEL_1 +#define SPRDBAT_ADC_CHANNEL_TEMP_DCXO ADC_CHANNEL_2 + +#define SPRDBAT_POLL_TIMER_NORMAL 60 +#define SPRDBAT_POLL_TIMER_TEMP 1 + +#define SPRDBAT_TEMP_TRIGGER_TIMES 2 + +#define SPRDBAT_CAPACITY_MONITOR_NORMAL (HZ*10) +#define SPRDBAT_CAPACITY_MONITOR_FAST (HZ*5) + +enum { + POWER_SUPPLY_PWR_RDY_FALSE = 0, + POWER_SUPPLY_PWR_RDY_TRUE, + POWER_SUPPLY_PWR_RDY_UNKNOWN, +}; + + +#if !defined(CONFIG_CHARGER_SM5414) +struct sec_chg_info { + bool dummy; +}; +#endif + +#if 0 +struct sprdbat_auxadc_cal { + uint16_t p0_vol; //4.2V + uint16_t p0_adc; + uint16_t p1_vol; //3.6V + uint16_t p1_adc; + uint16_t cal_type; +}; +#endif +#endif /* __SPRD27X3_CHARGER4SAMSUNG_H */ + + + |