diff options
Diffstat (limited to 'drivers/net/wireless/bcmdhd/pcie_core.c')
| -rw-r--r-- | drivers/net/wireless/bcmdhd/pcie_core.c | 70 |
1 files changed, 70 insertions, 0 deletions
diff --git a/drivers/net/wireless/bcmdhd/pcie_core.c b/drivers/net/wireless/bcmdhd/pcie_core.c new file mode 100644 index 00000000..508eccb2 --- /dev/null +++ b/drivers/net/wireless/bcmdhd/pcie_core.c @@ -0,0 +1,70 @@ +/** @file pcie_core.c + * + * Contains PCIe related functions that are shared between different driver models (e.g. firmware + * builds, DHD builds, BMAC builds), in order to avoid code duplication. + * + * $Copyright Open Broadcom Corporation$ + * + * $Id: pcie_core.c 444841 2013-12-21 04:32:29Z $ + */ + +#include <bcm_cfg.h> +#include <typedefs.h> +#include <bcmutils.h> +#include <bcmdefs.h> +#include <osl.h> +#include <siutils.h> +#include <hndsoc.h> +#include <sbchipc.h> + +#include "pcie_core.h" + +/* local prototypes */ + +/* local variables */ + +/* function definitions */ + +#ifdef BCMDRIVER + +void pcie_watchdog_reset(osl_t *osh, si_t *sih, sbpcieregs_t *sbpcieregs) +{ + uint32 val, i, lsc; + uint16 cfg_offset[] = {PCIECFGREG_STATUS_CMD, PCIECFGREG_PM_CSR, + PCIECFGREG_MSI_CAP, PCIECFGREG_MSI_ADDR_L, + PCIECFGREG_MSI_ADDR_H, PCIECFGREG_MSI_DATA, + PCIECFGREG_LINK_STATUS_CTRL2, PCIECFGREG_RBAR_CTRL, + PCIECFGREG_PML1_SUB_CTRL1, PCIECFGREG_REG_BAR2_CONFIG, + PCIECFGREG_REG_BAR3_CONFIG}; + sbpcieregs_t *pcie = NULL; + uint32 origidx = si_coreidx(sih); + + /* Switch to PCIE2 core */ + pcie = (sbpcieregs_t *)si_setcore(sih, PCIE2_CORE_ID, 0); + BCM_REFERENCE(pcie); + ASSERT(pcie != NULL); + + /* Disable/restore ASPM Control to protect the watchdog reset */ + W_REG(osh, &sbpcieregs->configaddr, PCIECFGREG_LINK_STATUS_CTRL); + lsc = R_REG(osh, &sbpcieregs->configdata); + val = lsc & (~PCIE_ASPM_ENAB); + W_REG(osh, &sbpcieregs->configdata, val); + + si_corereg(sih, SI_CC_IDX, OFFSETOF(chipcregs_t, watchdog), ~0, 4); + OSL_DELAY(100000); + + W_REG(osh, &sbpcieregs->configaddr, PCIECFGREG_LINK_STATUS_CTRL); + W_REG(osh, &sbpcieregs->configdata, lsc); + + /* Write configuration registers back to the shadow registers + * cause shadow registers are cleared out after watchdog reset. + */ + for (i = 0; i < ARRAYSIZE(cfg_offset); i++) { + W_REG(osh, &sbpcieregs->configaddr, cfg_offset[i]); + val = R_REG(osh, &sbpcieregs->configdata); + W_REG(osh, &sbpcieregs->configdata, val); + } + si_setcoreidx(sih, origidx); +} + +#endif /* BCMDRIVER */ |
