diff options
Diffstat (limited to 'drivers/input/touchscreen/goodix')
| -rw-r--r-- | drivers/input/touchscreen/goodix/Makefile | 5 | ||||
| -rw-r--r-- | drivers/input/touchscreen/goodix/goodix_tool.c | 548 | ||||
| -rw-r--r-- | drivers/input/touchscreen/goodix/gt9xx.c | 2408 | ||||
| -rw-r--r-- | drivers/input/touchscreen/goodix/gt9xx.h | 340 | ||||
| -rw-r--r-- | drivers/input/touchscreen/goodix/gt9xx_update.c | 2716 |
5 files changed, 6017 insertions, 0 deletions
diff --git a/drivers/input/touchscreen/goodix/Makefile b/drivers/input/touchscreen/goodix/Makefile new file mode 100644 index 00000000..2fb522e6 --- /dev/null +++ b/drivers/input/touchscreen/goodix/Makefile @@ -0,0 +1,5 @@ +obj-$(CONFIG_TOUCHSCREEN_GOODIX) += goodix_ts.o + +goodix_ts-objs := gt9xx.o +goodix_ts-objs += gt9xx_update.o +goodix_ts-objs += goodix_tool.o diff --git a/drivers/input/touchscreen/goodix/goodix_tool.c b/drivers/input/touchscreen/goodix/goodix_tool.c new file mode 100644 index 00000000..586aac34 --- /dev/null +++ b/drivers/input/touchscreen/goodix/goodix_tool.c @@ -0,0 +1,548 @@ +/* drivers/input/touchscreen/goodix_tool.c + * + * 2010 - 2012 Goodix Technology. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be a reference + * to you, when you are integrating the GOODiX's CTP IC into your system, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * Version:1.6 + * V1.0:2012/05/01,create file. + * V1.2:2012/06/08,modify some warning. + * V1.4:2012/08/28,modified to support GT9XX + * V1.6:new proc name + */ + +#include "gt9xx.h" + +#define DATA_LENGTH_UINT 512 +#define CMD_HEAD_LENGTH (sizeof(st_cmd_head) - sizeof(u8*)) +static char procname[20] = {0}; + +#define UPDATE_FUNCTIONS + +#ifdef UPDATE_FUNCTIONS +extern s32 gup_enter_update_mode(struct i2c_client *client); +extern void gup_leave_update_mode(void); +extern s32 gup_update_proc(void *dir); +#endif + +extern void gtp_irq_disable(struct goodix_ts_data *); +extern void gtp_irq_enable(struct goodix_ts_data *); + +#pragma pack(1) +typedef struct { + u8 wr; //write read flagŁ¬0:R 1:W 2:PID 3: + u8 flag; //0:no need flag/int 1: need flag 2:need int + u8 flag_addr[2]; //flag address + u8 flag_val; //flag val + u8 flag_relation; //flag_val:flag 0:not equal 1:equal 2:> 3:< + u16 circle; //polling cycle + u8 times; //plling times + u8 retry; //I2C retry times + u16 delay; //delay befor read or after write + u16 data_len; //data length + u8 addr_len; //address length + u8 addr[2]; //address + u8 res[3]; //reserved + u8* data; //data pointer +} st_cmd_head; +#pragma pack() +st_cmd_head cmd_head; + +static struct i2c_client *gt_client = NULL; + +static struct proc_dir_entry *goodix_proc_entry; + +static s32 goodix_tool_write(struct file *filp, const char __user *buff, unsigned long len, void *data); +static s32 goodix_tool_read( char *page, char **start, off_t off, int count, int *eof, void *data ); +static s32 (*tool_i2c_read)(u8 *, u16); +static s32 (*tool_i2c_write)(u8 *, u16); + +#if GTP_ESD_PROTECT +extern void gtp_esd_switch(struct i2c_client *, s32); +#endif +s32 DATA_LENGTH = 0; +s8 IC_TYPE[16] = "GT9XX"; + +static void tool_set_proc_name(char * procname) +{ + char *months[12] = {"Jan", "Feb", "Mar", "Apr", "May", + "Jun", "Jul", "Aug", "Sep", "Oct", "Nov", "Dec" + }; + char date[20] = {0}; + char month[4] = {0}; + int i = 0, n_month = 1, n_day = 0, n_year = 0; + + sprintf(date, "%s", __DATE__); + + //GTP_DEBUG("compile date: %s", date); + + sscanf(date, "%s %d %d", month, &n_day, &n_year); + + for (i = 0; i < 12; ++i) { + if (!memcmp(months[i], month, 3)) { + n_month = i+1; + break; + } + } + + sprintf(procname, "gmnode%04d%02d%02d", n_year, n_month, n_day); + + //GTP_DEBUG("procname = %s", procname); +} + + +static s32 tool_i2c_read_no_extra(u8* buf, u16 len) +{ + s32 ret = -1; + s32 i = 0; + struct i2c_msg msgs[2]; + + msgs[0].flags = !I2C_M_RD; + msgs[0].addr = gt_client->addr; + msgs[0].len = cmd_head.addr_len; + msgs[0].buf = &buf[0]; + + msgs[1].flags = I2C_M_RD; + msgs[1].addr = gt_client->addr; + msgs[1].len = len; + msgs[1].buf = &buf[GTP_ADDR_LENGTH]; + + for (i = 0; i < cmd_head.retry; i++) { + ret=i2c_transfer(gt_client->adapter, msgs, 2); + if (ret > 0) { + break; + } + } + return ret; +} + +static s32 tool_i2c_write_no_extra(u8* buf, u16 len) +{ + s32 ret = -1; + s32 i = 0; + struct i2c_msg msg; + + msg.flags = !I2C_M_RD; + msg.addr = gt_client->addr; + msg.len = len; + msg.buf = buf; + + for (i = 0; i < cmd_head.retry; i++) { + ret=i2c_transfer(gt_client->adapter, &msg, 1); + if (ret > 0) { + break; + } + } + return ret; +} + +static s32 tool_i2c_read_with_extra(u8* buf, u16 len) +{ + s32 ret = -1; + u8 pre[2] = {0x0f, 0xff}; + u8 end[2] = {0x80, 0x00}; + + tool_i2c_write_no_extra(pre, 2); + ret = tool_i2c_read_no_extra(buf, len); + tool_i2c_write_no_extra(end, 2); + + return ret; +} + +static s32 tool_i2c_write_with_extra(u8* buf, u16 len) +{ + s32 ret = -1; + u8 pre[2] = {0x0f, 0xff}; + u8 end[2] = {0x80, 0x00}; + + tool_i2c_write_no_extra(pre, 2); + ret = tool_i2c_write_no_extra(buf, len); + tool_i2c_write_no_extra(end, 2); + + return ret; +} + +static void register_i2c_func(void) +{ +// if (!strncmp(IC_TYPE, "GT818", 5) || !strncmp(IC_TYPE, "GT816", 5) +// || !strncmp(IC_TYPE, "GT811", 5) || !strncmp(IC_TYPE, "GT818F", 6) +// || !strncmp(IC_TYPE, "GT827", 5) || !strncmp(IC_TYPE,"GT828", 5) +// || !strncmp(IC_TYPE, "GT813", 5)) + if (strncmp(IC_TYPE, "GT8110", 6) && strncmp(IC_TYPE, "GT8105", 6) + && strncmp(IC_TYPE, "GT801", 5) && strncmp(IC_TYPE, "GT800", 5) + && strncmp(IC_TYPE, "GT801PLUS", 9) && strncmp(IC_TYPE, "GT811", 5) + && strncmp(IC_TYPE, "GTxxx", 5) && strncmp(IC_TYPE, "GT9XX", 5)) { + tool_i2c_read = tool_i2c_read_with_extra; + tool_i2c_write = tool_i2c_write_with_extra; + GTP_DEBUG("I2C function: with pre and end cmd!"); + } else { + tool_i2c_read = tool_i2c_read_no_extra; + tool_i2c_write = tool_i2c_write_no_extra; + GTP_INFO("I2C function: without pre and end cmd!"); + } +} + +static void unregister_i2c_func(void) +{ + tool_i2c_read = NULL; + tool_i2c_write = NULL; + GTP_INFO("I2C function: unregister i2c transfer function!"); +} + + +static const struct file_operations goodix_ops = { + .owner = THIS_MODULE, + .read = goodix_tool_read, + .write = goodix_tool_write, +}; + +s32 init_wr_node(struct i2c_client *client) +{ + s32 i; + + gt_client = client; + memset(&cmd_head, 0, sizeof(cmd_head)); + cmd_head.data = NULL; + + i = 5; + while ((!cmd_head.data) && i) { + cmd_head.data = kzalloc(i * DATA_LENGTH_UINT, GFP_KERNEL); + if (NULL != cmd_head.data) { + break; + } + i--; + } + if (i) { + DATA_LENGTH = i * DATA_LENGTH_UINT + GTP_ADDR_LENGTH; + GTP_INFO("Applied memory size:%d.", DATA_LENGTH); + } else { + GTP_ERROR("Apply for memory failed."); + return FAIL; + } + + cmd_head.addr_len = 2; + cmd_head.retry = 5; + + register_i2c_func(); + + tool_set_proc_name(procname); + goodix_proc_entry = proc_create(procname, 0666, NULL,&goodix_ops); /*create_proc_entry(procname, 0666, NULL);*/ + if (goodix_proc_entry == NULL) { + GTP_ERROR("Couldn't create proc entry!"); + return FAIL; + } else { + GTP_INFO("Create proc entry success!"); + //goodix_proc_entry->write_proc = goodix_tool_write; + //goodix_proc_entry->read_proc = goodix_tool_read; + } + + return SUCCESS; +} + +void uninit_wr_node(void) +{ + kfree(cmd_head.data); + cmd_head.data = NULL; + unregister_i2c_func(); + remove_proc_entry(procname, NULL); +} + +static u8 relation(u8 src, u8 dst, u8 rlt) +{ + u8 ret = 0; + + switch (rlt) { + case 0: + ret = (src != dst) ? true : false; + break; + + case 1: + ret = (src == dst) ? true : false; + GTP_DEBUG("equal:src:0x%02x dst:0x%02x ret:%d.", src, dst, (s32)ret); + break; + + case 2: + ret = (src > dst) ? true : false; + break; + + case 3: + ret = (src < dst) ? true : false; + break; + + case 4: + ret = (src & dst) ? true : false; + break; + + case 5: + ret = (!(src | dst)) ? true : false; + break; + + default: + ret = false; + break; + } + + return ret; +} + +/******************************************************* +Function: + Comfirm function. +Input: + None. +Output: + Return write length. +********************************************************/ +static u8 comfirm(void) +{ + s32 i = 0; + u8 buf[32]; + +// memcpy(&buf[GTP_ADDR_LENGTH - cmd_head.addr_len], &cmd_head.flag_addr, cmd_head.addr_len); +// memcpy(buf, &cmd_head.flag_addr, cmd_head.addr_len);//Modified by Scott, 2012-02-17 + memcpy(buf, cmd_head.flag_addr, cmd_head.addr_len); + + for (i = 0; i < cmd_head.times; i++) { + if (tool_i2c_read(buf, 1) <= 0) { + GTP_ERROR("Read flag data failed!"); + return FAIL; + } + if (true == relation(buf[GTP_ADDR_LENGTH], cmd_head.flag_val, cmd_head.flag_relation)) { + GTP_DEBUG("value at flag addr:0x%02x.", buf[GTP_ADDR_LENGTH]); + GTP_DEBUG("flag value:0x%02x.", cmd_head.flag_val); + break; + } + + msleep(cmd_head.circle); + } + + if (i >= cmd_head.times) { + GTP_ERROR("Didn't get the flag to continue!"); + return FAIL; + } + + return SUCCESS; +} + +/******************************************************* +Function: + Goodix tool write function. +Input: + standard proc write function param. +Output: + Return write length. +********************************************************/ +static s32 goodix_tool_write(struct file *filp, const char __user *buff, unsigned long len, void *data) +{ + s32 ret = 0; + GTP_DEBUG_FUNC(); + GTP_DEBUG_ARRAY((u8*)buff, len); + + ret = copy_from_user(&cmd_head, buff, CMD_HEAD_LENGTH); + if(ret) { + GTP_ERROR("copy_from_user failed."); + } + + GTP_DEBUG("wr :0x%02x.", cmd_head.wr); + GTP_DEBUG("flag:0x%02x.", cmd_head.flag); + GTP_DEBUG("flag addr:0x%02x%02x.", cmd_head.flag_addr[0], cmd_head.flag_addr[1]); + GTP_DEBUG("flag val:0x%02x.", cmd_head.flag_val); + GTP_DEBUG("flag rel:0x%02x.", cmd_head.flag_relation); + GTP_DEBUG("circle :%d.", (s32)cmd_head.circle); + GTP_DEBUG("times :%d.", (s32)cmd_head.times); + GTP_DEBUG("retry :%d.", (s32)cmd_head.retry); + GTP_DEBUG("delay :%d.", (s32)cmd_head.delay); + GTP_DEBUG("data len:%d.", (s32)cmd_head.data_len); + GTP_DEBUG("addr len:%d.", (s32)cmd_head.addr_len); + GTP_DEBUG("addr:0x%02x%02x.", cmd_head.addr[0], cmd_head.addr[1]); + GTP_DEBUG("len:%d.", (s32)len); + GTP_DEBUG("buf[20]:0x%02x.", buff[CMD_HEAD_LENGTH]); + + if (1 == cmd_head.wr) { + // copy_from_user(&cmd_head.data[cmd_head.addr_len], &buff[CMD_HEAD_LENGTH], cmd_head.data_len); + ret = copy_from_user(&cmd_head.data[GTP_ADDR_LENGTH], &buff[CMD_HEAD_LENGTH], cmd_head.data_len); + if(ret) { + GTP_ERROR("copy_from_user failed."); + } + memcpy(&cmd_head.data[GTP_ADDR_LENGTH - cmd_head.addr_len], cmd_head.addr, cmd_head.addr_len); + + GTP_DEBUG_ARRAY(cmd_head.data, cmd_head.data_len + cmd_head.addr_len); + GTP_DEBUG_ARRAY((u8*)&buff[CMD_HEAD_LENGTH], cmd_head.data_len); + + if (1 == cmd_head.flag) { + if (FAIL == comfirm()) { + GTP_ERROR("[WRITE]Comfirm fail!"); + return FAIL; + } + } else if (2 == cmd_head.flag) { + //Need interrupt! + } + if (tool_i2c_write(&cmd_head.data[GTP_ADDR_LENGTH - cmd_head.addr_len], + cmd_head.data_len + cmd_head.addr_len) <= 0) { + GTP_ERROR("[WRITE]Write data failed!"); + return FAIL; + } + + GTP_DEBUG_ARRAY(&cmd_head.data[GTP_ADDR_LENGTH - cmd_head.addr_len],cmd_head.data_len + cmd_head.addr_len); + if (cmd_head.delay) { + msleep(cmd_head.delay); + } + + return cmd_head.data_len + CMD_HEAD_LENGTH; + } else if (3 == cmd_head.wr) { //Write ic type + ret = copy_from_user(&cmd_head.data[0], &buff[CMD_HEAD_LENGTH], cmd_head.data_len); + if(ret) { + GTP_ERROR("copy_from_user failed."); + } + memcpy(IC_TYPE, cmd_head.data, cmd_head.data_len); + + register_i2c_func(); + + return cmd_head.data_len + CMD_HEAD_LENGTH; + } else if (5 == cmd_head.wr) { + //memcpy(IC_TYPE, cmd_head.data, cmd_head.data_len); + + return cmd_head.data_len + CMD_HEAD_LENGTH; + } else if (7 == cmd_head.wr) { //disable irq! + gtp_irq_disable(i2c_get_clientdata(gt_client)); + +#if GTP_ESD_PROTECT + gtp_esd_switch(gt_client, SWITCH_OFF); +#endif + return CMD_HEAD_LENGTH; + } else if (9 == cmd_head.wr) { //enable irq! + gtp_irq_enable(i2c_get_clientdata(gt_client)); + +#if GTP_ESD_PROTECT + gtp_esd_switch(gt_client, SWITCH_ON); +#endif + return CMD_HEAD_LENGTH; + } else if(17 == cmd_head.wr) { + struct goodix_ts_data *ts = i2c_get_clientdata(gt_client); + ret = copy_from_user(&cmd_head.data[GTP_ADDR_LENGTH], &buff[CMD_HEAD_LENGTH], cmd_head.data_len); + if(ret) { + GTP_DEBUG("copy_from_user failed."); + } + if(cmd_head.data[GTP_ADDR_LENGTH]) { + GTP_DEBUG("gtp enter rawdiff."); + ts->gtp_rawdiff_mode = true; + } else { + ts->gtp_rawdiff_mode = false; + GTP_DEBUG("gtp leave rawdiff."); + } + return CMD_HEAD_LENGTH; + } +#ifdef UPDATE_FUNCTIONS + else if (11 == cmd_head.wr) { //Enter update mode! + if (FAIL == gup_enter_update_mode(gt_client)) { + return FAIL; + } + } else if (13 == cmd_head.wr) { //Leave update mode! + gup_leave_update_mode(); + } else if (15 == cmd_head.wr) { //Update firmware! + show_len = 0; + total_len = 0; + memset(cmd_head.data, 0, cmd_head.data_len + 1); + memcpy(cmd_head.data, &buff[CMD_HEAD_LENGTH], cmd_head.data_len); + + if (FAIL == gup_update_proc((void*)cmd_head.data)) { + return FAIL; + } + } +#endif + + return CMD_HEAD_LENGTH; +} + +/******************************************************* +Function: + Goodix tool read function. +Input: + standard proc read function param. +Output: + Return read length. +********************************************************/ +static s32 goodix_tool_read( char *page, char **start, off_t off, int count, int *eof, void *data ) +{ + GTP_DEBUG_FUNC(); + + if (cmd_head.wr % 2) { + return FAIL; + } else if (!cmd_head.wr) { + u16 len = 0; + s16 data_len = 0; + u16 loc = 0; + + if (1 == cmd_head.flag) { + if (FAIL == comfirm()) { + GTP_ERROR("[READ]Comfirm fail!"); + return FAIL; + } + } else if (2 == cmd_head.flag) { + //Need interrupt! + } + + memcpy(cmd_head.data, cmd_head.addr, cmd_head.addr_len); + + GTP_DEBUG("[CMD HEAD DATA] ADDR:0x%02x%02x.", cmd_head.data[0], cmd_head.data[1]); + GTP_DEBUG("[CMD HEAD ADDR] ADDR:0x%02x%02x.", cmd_head.addr[0], cmd_head.addr[1]); + + if (cmd_head.delay) { + msleep(cmd_head.delay); + } + + data_len = cmd_head.data_len; + while(data_len > 0) { + if (data_len > DATA_LENGTH) { + len = DATA_LENGTH; + } else { + len = data_len; + } + data_len -= DATA_LENGTH; + + if (tool_i2c_read(cmd_head.data, len) <= 0) { + GTP_ERROR("[READ]Read data failed!"); + return FAIL; + } + memcpy(&page[loc], &cmd_head.data[GTP_ADDR_LENGTH], len); + loc += len; + + GTP_DEBUG_ARRAY(&cmd_head.data[GTP_ADDR_LENGTH], len); + GTP_DEBUG_ARRAY(page, len); + } + } else if (2 == cmd_head.wr) { + // memcpy(page, "gt8", cmd_head.data_len); + // memcpy(page, "GT818", 5); + // page[5] = 0; + + GTP_DEBUG("Return ic type:%s len:%d.", page, (s32)cmd_head.data_len); + return cmd_head.data_len; + //return sizeof(IC_TYPE_NAME); + } else if (4 == cmd_head.wr) { + page[0] = show_len >> 8; + page[1] = show_len & 0xff; + page[2] = total_len >> 8; + page[3] = total_len & 0xff; + + return cmd_head.data_len; + } else if (6 == cmd_head.wr) { + //Read error code! + } else if (8 == cmd_head.wr) { //Read driver version + // memcpy(page, GTP_DRIVER_VERSION, strlen(GTP_DRIVER_VERSION)); + s32 tmp_len; + tmp_len = strlen(GTP_DRIVER_VERSION); + memcpy(page, GTP_DRIVER_VERSION, tmp_len); + page[tmp_len] = 0; + } + + return cmd_head.data_len; +} diff --git a/drivers/input/touchscreen/goodix/gt9xx.c b/drivers/input/touchscreen/goodix/gt9xx.c new file mode 100644 index 00000000..71befd38 --- /dev/null +++ b/drivers/input/touchscreen/goodix/gt9xx.c @@ -0,0 +1,2408 @@ +/* drivers/input/touchscreen/gt9xx.c + * + * 2010 - 2013 Goodix Technology. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be a reference + * to you, when you are integrating the GOODiX's CTP IC into your system, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * Version: 2.0 + * Authors: andrew@goodix.com, meta@goodix.com + * Release Date: 2013/04/25 + * Revision record: + * V1.0: + * first Release. By Andrew, 2012/08/31 + * V1.2: + * modify gtp_reset_guitar,slot report,tracking_id & 0x0F. By Andrew, 2012/10/15 + * V1.4: + * modify gt9xx_update.c. By Andrew, 2012/12/12 + * V1.6: + * 1. new heartbeat/esd_protect mechanism(add external watchdog) + * 2. doze mode, sliding wakeup + * 3. 3 more cfg_group(GT9 Sensor_ID: 0~5) + * 3. config length verification + * 4. names & comments + * By Meta, 2013/03/11 + * V1.8: + * 1. pen/stylus identification + * 2. read double check & fixed config support + * 3. new esd & slide wakeup optimization + * By Meta, 2013/06/08 + * V2.0: + * 1. compatible with GT9XXF + * 2. send config after resume + * By Meta, 2013/08/06 + */ + +#include <linux/irq.h> +#include "gt9xx.h" + +#if GTP_ICS_SLOT_REPORT +#include <linux/input/mt.h> +#endif + +static const char *goodix_ts_name = GTP_I2C_NAME; +static struct workqueue_struct *goodix_wq; +struct i2c_client * i2c_connect_client = NULL; +u8 config[GTP_CONFIG_MAX_LENGTH + GTP_ADDR_LENGTH] += {GTP_REG_CONFIG_DATA >> 8, GTP_REG_CONFIG_DATA & 0xff}; + +#if GTP_HAVE_TOUCH_KEY +static const u16 touch_key_array[] = GTP_KEY_TAB; +#define GTP_MAX_KEY_NUM (sizeof(touch_key_array)/sizeof(touch_key_array[0])) + +#if GTP_DEBUG_ON +static const int key_codes[] = {KEY_HOME, KEY_BACK, KEY_MENU, KEY_SEARCH}; +static const char *key_names[] = {"Key_Home", "Key_Back", "Key_Menu", "Key_Search"}; +#endif + +#endif + +static s8 gtp_i2c_test(struct i2c_client *client); +void gtp_reset_guitar(struct i2c_client *client, s32 ms); +s32 gtp_send_cfg(struct i2c_client *client); +void gtp_int_sync(s32 ms); + +#ifdef CONFIG_HAS_EARLYSUSPEND +static void goodix_ts_early_suspend(struct early_suspend *h); +static void goodix_ts_late_resume(struct early_suspend *h); +#endif + +#if GTP_CREATE_WR_NODE +extern s32 init_wr_node(struct i2c_client*); +extern void uninit_wr_node(void); +#endif + +#if GTP_AUTO_UPDATE +extern u8 gup_init_update_proc(struct goodix_ts_data *); +#endif + +#if GTP_ESD_PROTECT +static struct delayed_work gtp_esd_check_work; +static struct workqueue_struct * gtp_esd_check_workqueue = NULL; +static void gtp_esd_check_func(struct work_struct *); +static s32 gtp_init_ext_watchdog(struct i2c_client *client); +void gtp_esd_switch(struct i2c_client *, s32); +#endif + +//*********** For GT9XXF Start **********// +#if GTP_COMPATIBLE_MODE +extern s32 i2c_read_bytes(struct i2c_client *client, u16 addr, u8 *buf, s32 len); +extern s32 i2c_write_bytes(struct i2c_client *client, u16 addr, u8 *buf, s32 len); +extern s32 gup_clk_calibration(void); +extern s32 gup_fw_download_proc(void *dir, u8 dwn_mode); +extern u8 gup_check_fs_mounted(char *path_name); + +void gtp_recovery_reset(struct i2c_client *client); +static s32 gtp_esd_recovery(struct i2c_client *client); +s32 gtp_fw_startup(struct i2c_client *client); +static s32 gtp_main_clk_proc(struct goodix_ts_data *ts); +static s32 gtp_bak_ref_proc(struct goodix_ts_data *ts, u8 mode); +#endif +//********** For GT9XXF End **********// + +#if GTP_SLIDE_WAKEUP +typedef enum { + DOZE_DISABLED = 0, + DOZE_ENABLED = 1, + DOZE_WAKEUP = 2, +} DOZE_T; +static DOZE_T doze_status = DOZE_DISABLED; +static s8 gtp_enter_doze(struct goodix_ts_data *ts); +#endif + +static u8 chip_gt9xxs = 0; // true if ic is gt9xxs, like gt915s +u8 grp_cfg_version = 0; + +/******************************************************* +Function: + Read data from the i2c slave device. +Input: + client: i2c device. + buf[0~1]: read start address. + buf[2~len-1]: read data buffer. + len: GTP_ADDR_LENGTH + read bytes count +Output: + numbers of i2c_msgs to transfer: + 2: succeed, otherwise: failed +*********************************************************/ +s32 gtp_i2c_read(struct i2c_client *client, u8 *buf, s32 len) +{ + struct i2c_msg msgs[2]; + s32 ret=-1; + s32 retries = 0; + + GTP_DEBUG_FUNC(); + + msgs[0].flags = !I2C_M_RD; + msgs[0].addr = client->addr; + msgs[0].len = GTP_ADDR_LENGTH; + msgs[0].buf = &buf[0]; + //msgs[0].scl_rate = 300 * 1000; // for Rockchip, etc. + + msgs[1].flags = I2C_M_RD; + msgs[1].addr = client->addr; + msgs[1].len = len - GTP_ADDR_LENGTH; + msgs[1].buf = &buf[GTP_ADDR_LENGTH]; + //msgs[1].scl_rate = 300 * 1000; + + while(retries < 5) { + ret = i2c_transfer(client->adapter, msgs, 2); + if(ret == 2)break; + retries++; + } + if((retries >= 5)) { +#if GTP_COMPATIBLE_MODE + struct goodix_ts_data *ts = i2c_get_clientdata(client); +#endif + +#if GTP_SLIDE_WAKEUP + // reset chip would quit doze mode + if (DOZE_ENABLED == doze_status) { + return ret; + } +#endif + GTP_ERROR("I2C Read: 0x%04X, %d bytes failed, errcode: %d! Process reset.", (((u16)(buf[0] << 8)) | buf[1]), len-2, ret); +#if GTP_COMPATIBLE_MODE + if (CHIP_TYPE_GT9F == ts->chip_type) { + gtp_recovery_reset(client); + } else +#endif + { + gtp_reset_guitar(client, 10); + } + } + return ret; +} + + + +/******************************************************* +Function: + Write data to the i2c slave device. +Input: + client: i2c device. + buf[0~1]: write start address. + buf[2~len-1]: data buffer + len: GTP_ADDR_LENGTH + write bytes count +Output: + numbers of i2c_msgs to transfer: + 1: succeed, otherwise: failed +*********************************************************/ +s32 gtp_i2c_write(struct i2c_client *client,u8 *buf,s32 len) +{ + struct i2c_msg msg; + s32 ret = -1; + s32 retries = 0; + + GTP_DEBUG_FUNC(); + + msg.flags = !I2C_M_RD; + msg.addr = client->addr; + msg.len = len; + msg.buf = buf; + //msg.scl_rate = 300 * 1000; // for Rockchip, etc + + while(retries < 5) { + ret = i2c_transfer(client->adapter, &msg, 1); + if (ret == 1)break; + retries++; + } + if((retries >= 5)) { +#if GTP_COMPATIBLE_MODE + struct goodix_ts_data *ts = i2c_get_clientdata(client); +#endif + +#if GTP_SLIDE_WAKEUP + if (DOZE_ENABLED == doze_status) { + return ret; + } +#endif + GTP_ERROR("I2C Write: 0x%04X, %d bytes failed, errcode: %d! Process reset.", (((u16)(buf[0] << 8)) | buf[1]), len-2, ret); +#if GTP_COMPATIBLE_MODE + if (CHIP_TYPE_GT9F == ts->chip_type) { + gtp_recovery_reset(client); + } else +#endif + { + gtp_reset_guitar(client, 10); + } + } + return ret; +} + + +/******************************************************* +Function: + i2c read twice, compare the results +Input: + client: i2c device + addr: operate address + rxbuf: read data to store, if compare successful + len: bytes to read +Output: + FAIL: read failed + SUCCESS: read successful +*********************************************************/ +s32 gtp_i2c_read_dbl_check(struct i2c_client *client, u16 addr, u8 *rxbuf, int len) +{ + u8 buf[16] = {0}; + u8 confirm_buf[16] = {0}; + u8 retry = 0; + + while (retry++ < 3) { + memset(buf, 0xAA, 16); + buf[0] = (u8)(addr >> 8); + buf[1] = (u8)(addr & 0xFF); + gtp_i2c_read(client, buf, len + 2); + + memset(confirm_buf, 0xAB, 16); + confirm_buf[0] = (u8)(addr >> 8); + confirm_buf[1] = (u8)(addr & 0xFF); + gtp_i2c_read(client, confirm_buf, len + 2); + + if (!memcmp(buf, confirm_buf, len+2)) { + memcpy(rxbuf, confirm_buf+2, len); + return SUCCESS; + } + } + GTP_ERROR("I2C read 0x%04X, %d bytes, double check failed!", addr, len); + return FAIL; +} + +/******************************************************* +Function: + Send config. +Input: + client: i2c device. +Output: + result of i2c write operation. + 1: succeed, otherwise: failed +*********************************************************/ + +s32 gtp_send_cfg(struct i2c_client *client) +{ + s32 ret = 2; + +#if GTP_DRIVER_SEND_CFG + s32 retry = 0; + struct goodix_ts_data *ts = i2c_get_clientdata(client); + + if (ts->fixed_cfg) { + GTP_INFO("Ic fixed config, no config sent!"); + return 0; + } else if (ts->pnl_init_error) { + GTP_INFO("Error occured in init_panel, no config sent"); + return 0; + } + + GTP_INFO("Driver send config."); + for (retry = 0; retry < 5; retry++) { + ret = gtp_i2c_write(client, config , GTP_CONFIG_MAX_LENGTH + GTP_ADDR_LENGTH); + if (ret > 0) { + break; + } + } +#endif + return ret; +} +/******************************************************* +Function: + Disable irq function +Input: + ts: goodix i2c_client private data +Output: + None. +*********************************************************/ +void gtp_irq_disable(struct goodix_ts_data *ts) +{ + unsigned long irqflags; + + GTP_DEBUG_FUNC(); + + spin_lock_irqsave(&ts->irq_lock, irqflags); + if (!ts->irq_is_disable) { + ts->irq_is_disable = 1; + disable_irq_nosync(ts->client->irq); + } + spin_unlock_irqrestore(&ts->irq_lock, irqflags); +} + +/******************************************************* +Function: + Enable irq function +Input: + ts: goodix i2c_client private data +Output: + None. +*********************************************************/ +void gtp_irq_enable(struct goodix_ts_data *ts) +{ + unsigned long irqflags = 0; + + GTP_DEBUG_FUNC(); + + spin_lock_irqsave(&ts->irq_lock, irqflags); + if (ts->irq_is_disable) { + enable_irq(ts->client->irq); + ts->irq_is_disable = 0; + } + spin_unlock_irqrestore(&ts->irq_lock, irqflags); +} + + +/******************************************************* +Function: + Report touch point event +Input: + ts: goodix i2c_client private data + id: trackId + x: input x coordinate + y: input y coordinate + w: input pressure +Output: + None. +*********************************************************/ +static void gtp_touch_down(struct goodix_ts_data* ts,s32 id,s32 x,s32 y,s32 w) +{ +#if GTP_CHANGE_X2Y + GTP_SWAP(x, y); +#endif + +#if GTP_ICS_SLOT_REPORT + input_mt_slot(ts->input_dev, id); + input_report_abs(ts->input_dev, ABS_MT_TRACKING_ID, id); + input_report_abs(ts->input_dev, ABS_MT_POSITION_X, x); + input_report_abs(ts->input_dev, ABS_MT_POSITION_Y, y); + input_report_abs(ts->input_dev, ABS_MT_TOUCH_MAJOR, w); + input_report_abs(ts->input_dev, ABS_MT_WIDTH_MAJOR, w); +#else + input_report_abs(ts->input_dev, ABS_MT_POSITION_X, x); + input_report_abs(ts->input_dev, ABS_MT_POSITION_Y, y); + input_report_abs(ts->input_dev, ABS_MT_TOUCH_MAJOR, w); + input_report_abs(ts->input_dev, ABS_MT_WIDTH_MAJOR, w); + input_report_abs(ts->input_dev, ABS_MT_TRACKING_ID, id); + input_mt_sync(ts->input_dev); +#endif + + GTP_DEBUG("ID:%d, X:%d, Y:%d, W:%d", id, x, y, w); +} + +/******************************************************* +Function: + Report touch release event +Input: + ts: goodix i2c_client private data +Output: + None. +*********************************************************/ +static void gtp_touch_up(struct goodix_ts_data* ts, s32 id) +{ +#if GTP_ICS_SLOT_REPORT + input_mt_slot(ts->input_dev, id); + input_report_abs(ts->input_dev, ABS_MT_TRACKING_ID, -1); + GTP_DEBUG("Touch id[%2d] release!", id); +#else + //input_report_abs(ts->input_dev, ABS_MT_TOUCH_MAJOR, 0); + //input_report_abs(ts->input_dev, ABS_MT_WIDTH_MAJOR, 0); + input_mt_sync(ts->input_dev); +#endif +} + + +/******************************************************* +Function: + Goodix touchscreen work function +Input: + work: work struct of goodix_workqueue +Output: + None. +*********************************************************/ +static void goodix_ts_work_func(struct work_struct *work) +{ + u8 end_cmd[3] = {GTP_READ_COOR_ADDR >> 8, GTP_READ_COOR_ADDR & 0xFF, 0}; + u8 point_data[2 + 1 + 8 * GTP_MAX_TOUCH + 1]= {GTP_READ_COOR_ADDR >> 8, GTP_READ_COOR_ADDR & 0xFF}; + u8 touch_num = 0; + u8 finger = 0; + static u16 pre_touch = 0; + static u8 pre_key = 0; +#if GTP_WITH_PEN + static u8 pre_pen = 0; +#endif + u8 key_value = 0; + u8* coor_data = NULL; + s32 input_x = 0; + s32 input_y = 0; + s32 input_w = 0; + s32 id = 0; + s32 i = 0; + s32 ret = -1; + struct goodix_ts_data *ts = NULL; + +#if GTP_COMPATIBLE_MODE + u8 rqst_buf[3] = {0x80, 0x43}; // for GT9XXF +#endif + +#if GTP_SLIDE_WAKEUP + u8 doze_buf[3] = {0x81, 0x4B}; +#endif + + GTP_DEBUG_FUNC(); + ts = container_of(work, struct goodix_ts_data, work); + if (ts->enter_update) { + return; + } +#if GTP_SLIDE_WAKEUP + if (DOZE_ENABLED == doze_status) { + ret = gtp_i2c_read(i2c_connect_client, doze_buf, 3); + GTP_DEBUG("0x814B = 0x%02X", doze_buf[2]); + if (ret > 0) { + if (doze_buf[2] == 0xAA) { + GTP_INFO("Forward slide to light up the screen!"); + doze_status = DOZE_WAKEUP; + input_report_key(ts->input_dev, KEY_POWER, 1); + input_sync(ts->input_dev); + input_report_key(ts->input_dev, KEY_POWER, 0); + input_sync(ts->input_dev); + // clear 0x814B + doze_buf[2] = 0x00; + gtp_i2c_write(i2c_connect_client, doze_buf, 3); + } else if (doze_buf[2] == 0xBB) { + GTP_INFO("Backward slide to light up the screen!"); + doze_status = DOZE_WAKEUP; + input_report_key(ts->input_dev, KEY_POWER, 1); + input_sync(ts->input_dev); + input_report_key(ts->input_dev, KEY_POWER, 0); + input_sync(ts->input_dev); + // clear 0x814B + doze_buf[2] = 0x00; + gtp_i2c_write(i2c_connect_client, doze_buf, 3); + } else if (0xC0 == (doze_buf[2] & 0xC0)) { + GTP_INFO("Double click to light up the screen!"); + doze_status = DOZE_WAKEUP; + input_report_key(ts->input_dev, KEY_POWER, 1); + input_sync(ts->input_dev); + input_report_key(ts->input_dev, KEY_POWER, 0); + input_sync(ts->input_dev); + // clear 0x814B + doze_buf[2] = 0x00; + gtp_i2c_write(i2c_connect_client, doze_buf, 3); + } else { + gtp_enter_doze(ts); + } + } + if (ts->use_irq) { + gtp_irq_enable(ts); + } + return; + } +#endif + + ret = gtp_i2c_read(ts->client, point_data, 12); + if (ret < 0) { + GTP_ERROR("I2C transfer error. errno:%d\n ", ret); + goto exit_work_func; + } + + finger = point_data[GTP_ADDR_LENGTH]; + +#if GTP_COMPATIBLE_MODE + // GT9XXF + if ((finger == 0x00) && (CHIP_TYPE_GT9F == ts->chip_type)) { // request arrived + ret = gtp_i2c_read(ts->client, rqst_buf, 3); + if (ret < 0) { + GTP_ERROR("Read request status error!"); + goto exit_work_func; + } + + switch (rqst_buf[2] & 0x0F) { + case GTP_RQST_CONFIG: + GTP_INFO("Request for config."); + ret = gtp_send_cfg(ts->client); + if (ret < 0) { + GTP_ERROR("Request for config unresponded!"); + } else { + rqst_buf[2] = GTP_RQST_RESPONDED; + gtp_i2c_write(ts->client, rqst_buf, 3); + GTP_INFO("Request for config responded!"); + } + break; + + case GTP_RQST_BAK_REF: + GTP_INFO("Request for backup reference."); + ret = gtp_bak_ref_proc(ts, GTP_BAK_REF_SEND); + if (SUCCESS == ret) { + rqst_buf[2] = GTP_RQST_RESPONDED; + gtp_i2c_write(ts->client, rqst_buf, 3); + GTP_INFO("Request for backup reference responded!"); + } else { + GTP_ERROR("Requeset for backup reference unresponed!"); + } + break; + + case GTP_RQST_RESET: + GTP_INFO("Request for reset."); + gtp_recovery_reset(ts->client); + break; + + case GTP_RQST_MAIN_CLOCK: + GTP_INFO("Request for main clock."); + ts->rqst_processing = 1; + ret = gtp_main_clk_proc(ts); + if (FAIL == ret) { + GTP_ERROR("Request for main clock unresponded!"); + } else { + GTP_INFO("Request for main clock responded!"); + rqst_buf[2] = GTP_RQST_RESPONDED; + gtp_i2c_write(ts->client, rqst_buf, 3); + ts->rqst_processing = 0; + ts->clk_chk_fs_times = 0; + } + break; + + case GTP_RQST_IDLE: + default: + break; + } + } +#endif + + if((finger & 0x80) == 0) { + goto exit_work_func; + } + + touch_num = finger & 0x0f; + if (touch_num > GTP_MAX_TOUCH) { + goto exit_work_func; + } + + if (touch_num > 1) { + u8 buf[8 * GTP_MAX_TOUCH] = {(GTP_READ_COOR_ADDR + 10) >> 8, (GTP_READ_COOR_ADDR + 10) & 0xff}; + + ret = gtp_i2c_read(ts->client, buf, 2 + 8 * (touch_num - 1)); + memcpy(&point_data[12], &buf[2], 8 * (touch_num - 1)); + } + +#if GTP_HAVE_TOUCH_KEY + key_value = point_data[3 + 8 * touch_num]; + + if(key_value || pre_key) { + for (i = 0; i < GTP_MAX_KEY_NUM; i++) { +#if GTP_DEBUG_ON + for (ret = 0; ret < 4; ++ret) { + if (key_codes[ret] == touch_key_array[i]) { + GTP_DEBUG("Key: %s %s", key_names[ret], (key_value & (0x01 << i)) ? "Down" : "Up"); + break; + } + } +#endif + input_report_key(ts->input_dev, touch_key_array[i], key_value & (0x01<<i)); + } + touch_num = 0; + pre_touch = 0; + } +#endif + pre_key = key_value; + + GTP_DEBUG("pre_touch:%02x, finger:%02x.", pre_touch, finger); + +#if GTP_ICS_SLOT_REPORT + +#if GTP_WITH_PEN + if (pre_pen && (touch_num == 0)) { + GTP_DEBUG("Pen touch UP(Slot)!"); + input_report_key(ts->input_dev, BTN_TOOL_PEN, 0); + input_mt_slot(ts->input_dev, 5); + input_report_abs(ts->input_dev, ABS_MT_TRACKING_ID, -1); + pre_pen = 0; + } +#endif + if (pre_touch || touch_num) { + s32 pos = 0; + u16 touch_index = 0; + u8 report_num = 0; + coor_data = &point_data[3]; + + if(touch_num) { + id = coor_data[pos] & 0x0F; + +#if GTP_WITH_PEN + id = coor_data[pos]; + if ((id & 0x80)) { + GTP_DEBUG("Pen touch DOWN(Slot)!"); + input_x = coor_data[pos + 1] | (coor_data[pos + 2] << 8); + input_y = coor_data[pos + 3] | (coor_data[pos + 4] << 8); + input_w = coor_data[pos + 5] | (coor_data[pos + 6] << 8); + + input_report_key(ts->input_dev, BTN_TOOL_PEN, 1); + input_mt_slot(ts->input_dev, 5); + input_report_abs(ts->input_dev, ABS_MT_TRACKING_ID, 5); + input_report_abs(ts->input_dev, ABS_MT_POSITION_X, input_x); + input_report_abs(ts->input_dev, ABS_MT_POSITION_Y, input_y); + input_report_abs(ts->input_dev, ABS_MT_TOUCH_MAJOR, input_w); + GTP_DEBUG("Pen/Stylus: (%d, %d)[%d]", input_x, input_y, input_w); + pre_pen = 1; + pre_touch = 0; + } +#endif + + touch_index |= (0x01<<id); + } + + GTP_DEBUG("id = %d,touch_index = 0x%x, pre_touch = 0x%x\n",id, touch_index,pre_touch); + for (i = 0; i < GTP_MAX_TOUCH; i++) { +#if GTP_WITH_PEN + if (pre_pen == 1) { + break; + } +#endif + + if ((touch_index & (0x01<<i))) { + input_x = coor_data[pos + 1] | (coor_data[pos + 2] << 8); + input_y = coor_data[pos + 3] | (coor_data[pos + 4] << 8); + input_w = coor_data[pos + 5] | (coor_data[pos + 6] << 8); + + gtp_touch_down(ts, id, input_x, input_y, input_w); + pre_touch |= 0x01 << i; + + report_num++; + if (report_num < touch_num) { + pos += 8; + id = coor_data[pos] & 0x0F; + touch_index |= (0x01<<id); + } + } else { + gtp_touch_up(ts, i); + pre_touch &= ~(0x01 << i); + } + } + } +#else + input_report_key(ts->input_dev, BTN_TOUCH, (touch_num || key_value)); + if (touch_num) { + for (i = 0; i < touch_num; i++) { + coor_data = &point_data[i * 8 + 3]; + + id = coor_data[0] & 0x0F; + input_x = coor_data[1] | (coor_data[2] << 8); + input_y = coor_data[3] | (coor_data[4] << 8); + input_w = coor_data[5] | (coor_data[6] << 8); + +#if GTP_WITH_PEN + id = coor_data[0]; + if (id & 0x80) { + GTP_DEBUG("Pen touch DOWN!"); + input_report_key(ts->input_dev, BTN_TOOL_PEN, 1); + pre_pen = 1; + id = 0; + } +#endif + + gtp_touch_down(ts, id, input_x, input_y, input_w); + } + } else if (pre_touch) { + +#if GTP_WITH_PEN + if (pre_pen == 1) { + GTP_DEBUG("Pen touch UP!"); + input_report_key(ts->input_dev, BTN_TOOL_PEN, 0); + pre_pen = 0; + } +#endif + + GTP_DEBUG("Touch Release!"); + gtp_touch_up(ts, 0); + } + + pre_touch = touch_num; +#endif + + input_sync(ts->input_dev); + +exit_work_func: + if(!ts->gtp_rawdiff_mode) { + ret = gtp_i2c_write(ts->client, end_cmd, 3); + if (ret < 0) { + GTP_INFO("I2C write end_cmd error!"); + } + } + if (ts->use_irq) { + gtp_irq_enable(ts); + } +} + +/******************************************************* +Function: + Timer interrupt service routine for polling mode. +Input: + timer: timer struct pointer +Output: + Timer work mode. + HRTIMER_NORESTART: no restart mode +*********************************************************/ +static enum hrtimer_restart goodix_ts_timer_handler(struct hrtimer *timer) +{ + struct goodix_ts_data *ts = container_of(timer, struct goodix_ts_data, timer); + + GTP_DEBUG_FUNC(); + + queue_work(goodix_wq, &ts->work); + hrtimer_start(&ts->timer, ktime_set(0, (GTP_POLL_TIME+6)*1000000), HRTIMER_MODE_REL); + return HRTIMER_NORESTART; +} + +/******************************************************* +Function: + External interrupt service routine for interrupt mode. +Input: + irq: interrupt number. + dev_id: private data pointer +Output: + Handle Result. + IRQ_HANDLED: interrupt handled successfully +*********************************************************/ +static irqreturn_t goodix_ts_irq_handler(int irq, void *dev_id) +{ + struct goodix_ts_data *ts = dev_id; + + GTP_DEBUG_FUNC(); + + gtp_irq_disable(ts); + + queue_work(goodix_wq, &ts->work); + + return IRQ_HANDLED; +} +/******************************************************* +Function: + Synchronization. +Input: + ms: synchronization time in millisecond. +Output: + None. +*******************************************************/ +void gtp_int_sync(s32 ms) +{ + GTP_GPIO_OUTPUT(GTP_INT_PORT, 0); + msleep(ms); + GTP_GPIO_AS_INT(GTP_INT_PORT); +} + + +/******************************************************* +Function: + Reset chip. +Input: + ms: reset time in millisecond +Output: + None. +*******************************************************/ +void gtp_reset_guitar(struct i2c_client *client, s32 ms) +{ +#if GTP_COMPATIBLE_MODE + struct goodix_ts_data *ts = i2c_get_clientdata(client); +#endif + + GTP_DEBUG_FUNC(); + GTP_INFO("Guitar reset"); + GTP_GPIO_OUTPUT(GTP_RST_PORT, 0); // begin select I2C slave addr + msleep(ms); // T2: > 10ms + // HIGH: 0x28/0x29, LOW: 0xBA/0xBB + GTP_GPIO_OUTPUT(GTP_INT_PORT, client->addr == 0x14); + + msleep(2); // T3: > 100us + GTP_GPIO_OUTPUT(GTP_RST_PORT, 1); + + msleep(6); // T4: > 5ms + + GTP_GPIO_AS_INPUT(GTP_RST_PORT); // end select I2C slave addr + +#if GTP_COMPATIBLE_MODE + if (CHIP_TYPE_GT9F == ts->chip_type) { + return; + } +#endif + + gtp_int_sync(50); +#if GTP_ESD_PROTECT + gtp_init_ext_watchdog(client); +#endif +} + +#if GTP_SLIDE_WAKEUP +/******************************************************* +Function: + Enter doze mode for sliding wakeup. +Input: + ts: goodix tp private data +Output: + 1: succeed, otherwise failed +*******************************************************/ +static s8 gtp_enter_doze(struct goodix_ts_data *ts) +{ + s8 ret = -1; + s8 retry = 0; + u8 i2c_control_buf[3] = {(u8)(GTP_REG_SLEEP >> 8), (u8)GTP_REG_SLEEP, 8}; + + GTP_DEBUG_FUNC(); + +#if GTP_DBL_CLK_WAKEUP + i2c_control_buf[2] = 0x09; +#endif + + gtp_irq_disable(ts); + + GTP_DEBUG("Entering doze mode."); + while(retry++ < 5) { + i2c_control_buf[0] = 0x80; + i2c_control_buf[1] = 0x46; + ret = gtp_i2c_write(ts->client, i2c_control_buf, 3); + if (ret < 0) { + GTP_DEBUG("failed to set doze flag into 0x8046, %d", retry); + continue; + } + i2c_control_buf[0] = 0x80; + i2c_control_buf[1] = 0x40; + ret = gtp_i2c_write(ts->client, i2c_control_buf, 3); + if (ret > 0) { + doze_status = DOZE_ENABLED; + GTP_INFO("GTP has been working in doze mode!"); + gtp_irq_enable(ts); + return ret; + } + msleep(10); + } + GTP_ERROR("GTP send doze cmd failed."); + gtp_irq_enable(ts); + return ret; +} +#else +/******************************************************* +Function: + Enter sleep mode. +Input: + ts: private data. +Output: + Executive outcomes. + 1: succeed, otherwise failed. +*******************************************************/ +static s8 gtp_enter_sleep(struct goodix_ts_data * ts) +{ + s8 ret = -1; + s8 retry = 0; + u8 i2c_control_buf[3] = {(u8)(GTP_REG_SLEEP >> 8), (u8)GTP_REG_SLEEP, 5}; + +#if GTP_COMPATIBLE_MODE + u8 status_buf[3] = {0x80, 0x44}; +#endif + + GTP_DEBUG_FUNC(); + +#if GTP_COMPATIBLE_MODE + if (CHIP_TYPE_GT9F == ts->chip_type) { + // GT9XXF: host interact with ic + ret = gtp_i2c_read(ts->client, status_buf, 3); + if (ret < 0) { + GTP_ERROR("failed to get backup-reference status"); + } + + if (status_buf[2] & 0x80) { + ret = gtp_bak_ref_proc(ts, GTP_BAK_REF_STORE); + if (FAIL == ret) { + GTP_ERROR("failed to store bak_ref"); + } + } + } +#endif + + GTP_GPIO_OUTPUT(GTP_INT_PORT, 0); + msleep(5); + + while(retry++ < 5) { + ret = gtp_i2c_write(ts->client, i2c_control_buf, 3); + if (ret > 0) { + GTP_INFO("GTP enter sleep!"); + + return ret; + } + msleep(10); + } + GTP_ERROR("GTP send sleep cmd failed."); + return ret; +} +#endif +/******************************************************* +Function: + Wakeup from sleep. +Input: + ts: private data. +Output: + Executive outcomes. + >0: succeed, otherwise: failed. +*******************************************************/ +static s8 gtp_wakeup_sleep(struct goodix_ts_data * ts) +{ + u8 retry = 0; + s8 ret = -1; + + GTP_DEBUG_FUNC(); + +#if GTP_COMPATIBLE_MODE + if (CHIP_TYPE_GT9F == ts->chip_type) { + u8 opr_buf[3] = {0x41, 0x80}; + + GTP_GPIO_OUTPUT(GTP_INT_PORT, 1); + msleep(5); + + for (retry = 0; retry < 20; ++retry) { + // hold ss51 & dsp + opr_buf[2] = 0x0C; + ret = gtp_i2c_write(ts->client, opr_buf, 3); + if (FAIL == ret) { + GTP_ERROR("failed to hold ss51 & dsp!"); + continue; + } + opr_buf[2] = 0x00; + ret = gtp_i2c_read(ts->client, opr_buf, 3); + if (FAIL == ret) { + GTP_ERROR("failed to get ss51 & dsp status!"); + continue; + } + if (0x0C != opr_buf[2]) { + GTP_DEBUG("ss51 & dsp not been hold, %d", retry+1); + continue; + } + GTP_DEBUG("ss51 & dsp confirmed hold"); + + ret = gtp_fw_startup(ts->client); + if (FAIL == ret) { + GTP_ERROR("failed to startup GT9XXF, process recovery"); + gtp_esd_recovery(ts->client); + } + break; + } + if (retry >= 10) { + GTP_ERROR("failed to wakeup, processing esd recovery"); + gtp_esd_recovery(ts->client); + } else { + GTP_INFO("GT9XXF gtp wakeup success"); + } + return ret; + } +#endif + +#if GTP_POWER_CTRL_SLEEP + while(retry++ < 5) { + gtp_reset_guitar(ts->client, 20); + + GTP_INFO("GTP wakeup sleep."); + return 1; + } +#else + while(retry++ < 10) { +#if GTP_SLIDE_WAKEUP + if (DOZE_WAKEUP != doze_status) { // wakeup not by slide + GTP_DEBUG("wakeup by power, reset guitar"); + doze_status = DOZE_DISABLED; + gtp_irq_disable(ts); + gtp_reset_guitar(ts->client, 10); + gtp_irq_enable(ts); + } else { // wakeup by slide + GTP_DEBUG("wakeup by slide/double-click, no reset guitar"); + doze_status = DOZE_DISABLED; +#if GTP_ESD_PROTECT + gtp_init_ext_watchdog(ts->client); +#endif + } + +#else + if (chip_gt9xxs == 1) { + gtp_reset_guitar(ts->client, 10); + } else { + GTP_GPIO_OUTPUT(GTP_INT_PORT, 1); + msleep(5); + } +#endif + + ret = gtp_i2c_test(ts->client); + if (ret > 0) { + GTP_INFO("GTP wakeup sleep."); + +#if (!GTP_SLIDE_WAKEUP) + if (chip_gt9xxs == 0) { + gtp_int_sync(25); +#if GTP_ESD_PROTECT + gtp_init_ext_watchdog(ts->client); +#endif + } +#endif + + return ret; + } + gtp_reset_guitar(ts->client, 20); + } +#endif + + GTP_ERROR("GTP wakeup sleep failed."); + return ret; +} +#if GTP_DRIVER_SEND_CFG +static s32 gtp_get_info(struct goodix_ts_data *ts) +{ + u8 opr_buf[6] = {0}; + s32 ret = 0; + + opr_buf[0] = (u8)((GTP_REG_CONFIG_DATA+1) >> 8); + opr_buf[1] = (u8)((GTP_REG_CONFIG_DATA+1) & 0xFF); + + ret = gtp_i2c_read(ts->client, opr_buf, 6); + if (ret < 0) { + return FAIL; + } + + ts->abs_x_max = (opr_buf[3] << 8) + opr_buf[2]; + ts->abs_y_max = (opr_buf[5] << 8) + opr_buf[4]; + + opr_buf[0] = (u8)((GTP_REG_CONFIG_DATA+6) >> 8); + opr_buf[1] = (u8)((GTP_REG_CONFIG_DATA+6) & 0xFF); + + ret = gtp_i2c_read(ts->client, opr_buf, 3); + if (ret < 0) { + return FAIL; + } + ts->int_trigger_type = opr_buf[2] & 0x03; + + GTP_INFO("X_MAX = %d, Y_MAX = %d, TRIGGER = 0x%02x", + ts->abs_x_max,ts->abs_y_max,ts->int_trigger_type); + + return SUCCESS; +} +#endif + +/******************************************************* +Function: + Initialize gtp. +Input: + ts: goodix private data +Output: + Executive outcomes. + 0: succeed, otherwise: failed +*******************************************************/ +static s32 gtp_init_panel(struct goodix_ts_data *ts) +{ + s32 ret = -1; + +#if GTP_DRIVER_SEND_CFG + s32 i = 0; + u8 check_sum = 0; + u8 opr_buf[16] = {0}; + u8 sensor_id = 0; + + u8 cfg_info_group1[] = CTP_CFG_GROUP1; + u8 cfg_info_group2[] = CTP_CFG_GROUP2; + u8 cfg_info_group3[] = CTP_CFG_GROUP3; + u8 cfg_info_group4[] = CTP_CFG_GROUP4; + u8 cfg_info_group5[] = CTP_CFG_GROUP5; + u8 cfg_info_group6[] = CTP_CFG_GROUP6; + u8 *send_cfg_buf[] = {cfg_info_group1, cfg_info_group2, cfg_info_group3, + cfg_info_group4, cfg_info_group5, cfg_info_group6 + }; + u8 cfg_info_len[] = { CFG_GROUP_LEN(cfg_info_group1), + CFG_GROUP_LEN(cfg_info_group2), + CFG_GROUP_LEN(cfg_info_group3), + CFG_GROUP_LEN(cfg_info_group4), + CFG_GROUP_LEN(cfg_info_group5), + CFG_GROUP_LEN(cfg_info_group6) + }; + + GTP_DEBUG_FUNC(); + GTP_DEBUG("Config Groups\' Lengths: %d, %d, %d, %d, %d, %d", + cfg_info_len[0], cfg_info_len[1], cfg_info_len[2], cfg_info_len[3], + cfg_info_len[4], cfg_info_len[5]); + + +#if GTP_COMPATIBLE_MODE + if (CHIP_TYPE_GT9F == ts->chip_type) { + ts->fw_error = 0; + } else +#endif + { + ret = gtp_i2c_read_dbl_check(ts->client, 0x41E4, opr_buf, 1); + if (SUCCESS == ret) { + if (opr_buf[0] != 0xBE) { + ts->fw_error = 1; + GTP_ERROR("Firmware error, no config sent!"); + return -1; + } + } + } + + if ((!cfg_info_len[1]) && (!cfg_info_len[2]) && + (!cfg_info_len[3]) && (!cfg_info_len[4]) && + (!cfg_info_len[5])) { + sensor_id = 0; + } else { +#if GTP_COMPATIBLE_MODE + msleep(50); +#endif + ret = gtp_i2c_read_dbl_check(ts->client, GTP_REG_SENSOR_ID, &sensor_id, 1); + if (SUCCESS == ret) { + if (sensor_id >= 0x06) { + GTP_ERROR("Invalid sensor_id(0x%02X), No Config Sent!", sensor_id); + ts->pnl_init_error = 1; +#if GTP_COMPATIBLE_MODE + if (CHIP_TYPE_GT9F == ts->chip_type) { + return -1; + } else +#endif + { + gtp_get_info(ts); + } + return 0; + } + } else { + GTP_ERROR("Failed to get sensor_id, No config sent!"); + ts->pnl_init_error = 1; + return -1; + } + GTP_INFO("Sensor_ID: %d", sensor_id); + } + ts->gtp_cfg_len = cfg_info_len[sensor_id]; + GTP_INFO("CTP_CONFIG_GROUP%d used, config length: %d", sensor_id + 1, ts->gtp_cfg_len); + + if (ts->gtp_cfg_len < GTP_CONFIG_MIN_LENGTH) { + GTP_ERROR("Config Group%d is INVALID CONFIG GROUP(Len: %d)! NO Config Sent! You need to check you header file CFG_GROUP section!", sensor_id+1, ts->gtp_cfg_len); + ts->pnl_init_error = 1; + return -1; + } + +#if GTP_COMPATIBLE_MODE + if (CHIP_TYPE_GT9F == ts->chip_type) { + ts->fixed_cfg = 0; + } else +#endif + { + ret = gtp_i2c_read_dbl_check(ts->client, GTP_REG_CONFIG_DATA, &opr_buf[0], 1); + + if (ret == SUCCESS) { + GTP_DEBUG("CFG_GROUP%d Config Version: %d, 0x%02X; IC Config Version: %d, 0x%02X", sensor_id+1, + send_cfg_buf[sensor_id][0], send_cfg_buf[sensor_id][0], opr_buf[0], opr_buf[0]); + + if (opr_buf[0] < 90) { + grp_cfg_version = send_cfg_buf[sensor_id][0]; // backup group config version + send_cfg_buf[sensor_id][0] = 0x00; + ts->fixed_cfg = 0; + } else { // treated as fixed config, not send config + GTP_INFO("Ic fixed config with config version(%d, 0x%02X)", opr_buf[0], opr_buf[0]); + ts->fixed_cfg = 1; + gtp_get_info(ts); + return 0; + } + } else { + GTP_ERROR("Failed to get ic config version!No config sent!"); + return -1; + } + } + + memset(&config[GTP_ADDR_LENGTH], 0, GTP_CONFIG_MAX_LENGTH); + memcpy(&config[GTP_ADDR_LENGTH], send_cfg_buf[sensor_id], ts->gtp_cfg_len); + +#if GTP_CUSTOM_CFG + config[RESOLUTION_LOC] = (u8)GTP_MAX_WIDTH; + config[RESOLUTION_LOC + 1] = (u8)(GTP_MAX_WIDTH>>8); + config[RESOLUTION_LOC + 2] = (u8)GTP_MAX_HEIGHT; + config[RESOLUTION_LOC + 3] = (u8)(GTP_MAX_HEIGHT>>8); + + if (GTP_INT_TRIGGER == 0) { //RISING + config[TRIGGER_LOC] &= 0xfe; + } else if (GTP_INT_TRIGGER == 1) { //FALLING + config[TRIGGER_LOC] |= 0x01; + } +#endif // GTP_CUSTOM_CFG + + check_sum = 0; + for (i = GTP_ADDR_LENGTH; i < ts->gtp_cfg_len; i++) { + check_sum += config[i]; + } + config[ts->gtp_cfg_len] = (~check_sum) + 1; + +#else // driver not send config + + ts->gtp_cfg_len = GTP_CONFIG_MAX_LENGTH; + ret = gtp_i2c_read(ts->client, config, ts->gtp_cfg_len + GTP_ADDR_LENGTH); + if (ret < 0) { + GTP_ERROR("Read Config Failed, Using Default Resolution & INT Trigger!"); + ts->abs_x_max = GTP_MAX_WIDTH; + ts->abs_y_max = GTP_MAX_HEIGHT; + ts->int_trigger_type = GTP_INT_TRIGGER; + } + +#endif // GTP_DRIVER_SEND_CFG + + if ((ts->abs_x_max == 0) && (ts->abs_y_max == 0)) { + ts->abs_x_max = (config[RESOLUTION_LOC + 1] << 8) + config[RESOLUTION_LOC]; + ts->abs_y_max = (config[RESOLUTION_LOC + 3] << 8) + config[RESOLUTION_LOC + 2]; + ts->int_trigger_type = (config[TRIGGER_LOC]) & 0x03; + } + +#if GTP_COMPATIBLE_MODE + if (CHIP_TYPE_GT9F == ts->chip_type) { + u8 sensor_num = 0; + u8 driver_num = 0; + u8 have_key = 0; + + have_key = (config[GTP_REG_HAVE_KEY - GTP_REG_CONFIG_DATA + 2] & 0x01); + + if (1 == ts->is_950) { + driver_num = config[GTP_REG_MATRIX_DRVNUM - GTP_REG_CONFIG_DATA + 2]; + sensor_num = config[GTP_REG_MATRIX_SENNUM - GTP_REG_CONFIG_DATA + 2]; + if (have_key) { + driver_num--; + } + ts->bak_ref_len = (driver_num * (sensor_num - 1) + 2) * 2 * 6; + } else { + driver_num = (config[CFG_LOC_DRVA_NUM] & 0x1F) + (config[CFG_LOC_DRVB_NUM]&0x1F); + if (have_key) { + driver_num--; + } + sensor_num = (config[CFG_LOC_SENS_NUM] & 0x0F) + ((config[CFG_LOC_SENS_NUM] >> 4) & 0x0F); + ts->bak_ref_len = (driver_num * (sensor_num - 2) + 2) * 2; + } + + GTP_INFO("Drv * Sen: %d * %d(key: %d), X_MAX: %d, Y_MAX: %d, TRIGGER: 0x%02x", + driver_num, sensor_num, have_key, ts->abs_x_max,ts->abs_y_max,ts->int_trigger_type); + return 0; + } else +#endif + { +#if GTP_DRIVER_SEND_CFG + ret = gtp_send_cfg(ts->client); + if (ret < 0) { + GTP_ERROR("Send config error."); + } + // set config version to CTP_CFG_GROUP, for resume to send config + config[GTP_ADDR_LENGTH] = grp_cfg_version; + check_sum = 0; + for (i = GTP_ADDR_LENGTH; i < ts->gtp_cfg_len; i++) { + check_sum += config[i]; + } + config[ts->gtp_cfg_len] = (~check_sum) + 1; +#endif + GTP_INFO("X_MAX: %d, Y_MAX: %d, TRIGGER: 0x%02x", ts->abs_x_max,ts->abs_y_max,ts->int_trigger_type); + } + + msleep(10); + return 0; +} + +/******************************************************* +Function: + Read chip version. +Input: + client: i2c device + version: buffer to keep ic firmware version +Output: + read operation return. + 2: succeed, otherwise: failed +*******************************************************/ +s32 gtp_read_version(struct i2c_client *client, u16* version) +{ + s32 ret = -1; + u8 buf[8] = {GTP_REG_VERSION >> 8, GTP_REG_VERSION & 0xff}; + + GTP_DEBUG_FUNC(); + + ret = gtp_i2c_read(client, buf, sizeof(buf)); + if (ret < 0) { + GTP_ERROR("GTP read version failed"); + return ret; + } + + if (version) { + *version = (buf[7] << 8) | buf[6]; + } + + if (buf[5] == 0x00) { + GTP_INFO("IC Version: %c%c%c_%02x%02x", buf[2], buf[3], buf[4], buf[7], buf[6]); + } else { + if (buf[5] == 'S' || buf[5] == 's') { + chip_gt9xxs = 1; + } + GTP_INFO("IC Version: %c%c%c%c_%02x%02x", buf[2], buf[3], buf[4], buf[5], buf[7], buf[6]); + } + return ret; +} + +/******************************************************* +Function: + I2c test Function. +Input: + client:i2c client. +Output: + Executive outcomes. + 2: succeed, otherwise failed. +*******************************************************/ +static s8 gtp_i2c_test(struct i2c_client *client) +{ + u8 test[3] = {GTP_REG_CONFIG_DATA >> 8, GTP_REG_CONFIG_DATA & 0xff}; + u8 retry = 0; + s8 ret = -1; + + GTP_DEBUG_FUNC(); + + while(retry++ < 5) { + ret = gtp_i2c_read(client, test, 3); + if (ret > 0) { + return ret; + } + GTP_ERROR("GTP i2c test failed time %d.",retry); + msleep(10); + } + return ret; +} + +/******************************************************* +Function: + Request gpio(INT & RST) ports. +Input: + ts: private data. +Output: + Executive outcomes. + >= 0: succeed, < 0: failed +*******************************************************/ +static s8 gtp_request_io_port(struct goodix_ts_data *ts) +{ + s32 ret = 0; + + GTP_DEBUG_FUNC(); + ret = GTP_GPIO_REQUEST(GTP_INT_PORT, "GTP_INT_IRQ"); + if (ret < 0) { + GTP_ERROR("Failed to request GPIO:%d, ERRNO:%d", (s32)GTP_INT_PORT, ret); + ret = -ENODEV; + } else { + GTP_GPIO_AS_INT(GTP_INT_PORT); + ts->client->irq = GTP_INT_IRQ; + } + + ret = GTP_GPIO_REQUEST(GTP_RST_PORT, "GTP_RST_PORT"); + if (ret < 0) { + GTP_ERROR("Failed to request GPIO:%d, ERRNO:%d",(s32)GTP_RST_PORT,ret); + ret = -ENODEV; + } + + GTP_GPIO_AS_INPUT(GTP_RST_PORT); + + gtp_reset_guitar(ts->client, 20); + + if(ret < 0) { + GTP_GPIO_FREE(GTP_RST_PORT); + GTP_GPIO_FREE(GTP_INT_PORT); + } + + return ret; +} + +/******************************************************* +Function: + Request interrupt. +Input: + ts: private data. +Output: + Executive outcomes. + 0: succeed, -1: failed. +*******************************************************/ +static s8 gtp_request_irq(struct goodix_ts_data *ts) +{ + s32 ret = -1; + const u8 irq_table[] = GTP_IRQ_TAB; + + GTP_DEBUG_FUNC(); + GTP_DEBUG("INT trigger type:%x", ts->int_trigger_type); + + ret = request_irq(ts->client->irq, + goodix_ts_irq_handler, + irq_table[ts->int_trigger_type], + ts->client->name, + ts); + if (ret) { + GTP_ERROR("Request IRQ failed!ERRNO:%d.", ret); + GTP_GPIO_AS_INPUT(GTP_INT_PORT); + GTP_GPIO_FREE(GTP_INT_PORT); + + hrtimer_init(&ts->timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); + ts->timer.function = goodix_ts_timer_handler; + hrtimer_start(&ts->timer, ktime_set(1, 0), HRTIMER_MODE_REL); + return -1; + } else { + gtp_irq_disable(ts); + ts->use_irq = 1; + return 0; + } +} + +/******************************************************* +Function: + Request input device Function. +Input: + ts:private data. +Output: + Executive outcomes. + 0: succeed, otherwise: failed. +*******************************************************/ +static s8 gtp_request_input_dev(struct goodix_ts_data *ts) +{ + s8 ret = -1; + s8 phys[32]; +#if GTP_HAVE_TOUCH_KEY + u8 index = 0; +#endif + + GTP_DEBUG_FUNC(); + + ts->input_dev = input_allocate_device(); + if (ts->input_dev == NULL) { + GTP_ERROR("Failed to allocate input device."); + return -ENOMEM; + } + + ts->input_dev->evbit[0] = BIT_MASK(EV_SYN) | BIT_MASK(EV_KEY) | BIT_MASK(EV_ABS) ; +#if GTP_ICS_SLOT_REPORT + __set_bit(INPUT_PROP_DIRECT, ts->input_dev->propbit); + input_mt_init_slots(ts->input_dev, 16); // in case of "out of memory" +#else + ts->input_dev->keybit[BIT_WORD(BTN_TOUCH)] = BIT_MASK(BTN_TOUCH); +#endif + +#if GTP_HAVE_TOUCH_KEY + for (index = 0; index < GTP_MAX_KEY_NUM; index++) { + input_set_capability(ts->input_dev, EV_KEY, touch_key_array[index]); + } +#endif + +#if GTP_SLIDE_WAKEUP + input_set_capability(ts->input_dev, EV_KEY, KEY_POWER); +#endif + +#if GTP_WITH_PEN + // pen support + __set_bit(BTN_TOOL_PEN, ts->input_dev->keybit); + __set_bit(INPUT_PROP_DIRECT, ts->input_dev->propbit); + //__set_bit(INPUT_PROP_POINTER, ts->input_dev->propbit); +#endif + +#if GTP_CHANGE_X2Y + GTP_SWAP(ts->abs_x_max, ts->abs_y_max); +#endif + + input_set_abs_params(ts->input_dev, ABS_MT_POSITION_X, 0, ts->abs_x_max, 0, 0); + input_set_abs_params(ts->input_dev, ABS_MT_POSITION_Y, 0, ts->abs_y_max, 0, 0); + input_set_abs_params(ts->input_dev, ABS_MT_WIDTH_MAJOR, 0, 255, 0, 0); + input_set_abs_params(ts->input_dev, ABS_MT_TOUCH_MAJOR, 0, 255, 0, 0); + input_set_abs_params(ts->input_dev, ABS_MT_TRACKING_ID, 0, 255, 0, 0); + + sprintf(phys, "input/ts"); + ts->input_dev->name = goodix_ts_name; + ts->input_dev->phys = phys; + ts->input_dev->id.bustype = BUS_I2C; + ts->input_dev->id.vendor = 0xDEAD; + ts->input_dev->id.product = 0xBEEF; + ts->input_dev->id.version = 10427; + + ret = input_register_device(ts->input_dev); + if (ret) { + GTP_ERROR("Register %s input device failed", ts->input_dev->name); + return -ENODEV; + } + + return 0; +} + +//************** For GT9XXF Start *************// +#if GTP_COMPATIBLE_MODE + +s32 gtp_fw_startup(struct i2c_client *client) +{ + u8 opr_buf[4]; + s32 ret = 0; + + //init sw WDT + opr_buf[0] = 0xAA; + ret = i2c_write_bytes(client, 0x8041, opr_buf, 1); + if (ret < 0) { + return FAIL; + } + + //release SS51 & DSP + opr_buf[0] = 0x00; + ret = i2c_write_bytes(client, 0x4180, opr_buf, 1); + if (ret < 0) { + return FAIL; + } + //int sync + gtp_int_sync(25); + + //check fw run status + ret = i2c_read_bytes(client, 0x8041, opr_buf, 1); + if (ret < 0) { + return FAIL; + } + if(0xAA == opr_buf[0]) { + GTP_ERROR("IC works abnormally,startup failed."); + return FAIL; + } else { + GTP_INFO("IC works normally, Startup success."); + opr_buf[0] = 0xAA; + i2c_write_bytes(client, 0x8041, opr_buf, 1); + return SUCCESS; + } +} + +static s32 gtp_esd_recovery(struct i2c_client *client) +{ + s32 retry = 0; + s32 ret = 0; + struct goodix_ts_data *ts; + + ts = i2c_get_clientdata(client); + + gtp_irq_disable(ts); + + GTP_INFO("GT9XXF esd recovery mode"); + gtp_reset_guitar(client, 20); // reset & select I2C addr + for (retry = 0; retry < 5; ++retry) { + ret = gup_fw_download_proc(NULL, GTP_FL_ESD_RECOVERY); + if (FAIL == ret) { + GTP_ERROR("esd recovery failed %d", retry+1); + continue; + } + ret = gtp_fw_startup(ts->client); + if (FAIL == ret) { + GTP_ERROR("GT9XXF start up failed %d", retry+1); + continue; + } + break; + } + gtp_irq_enable(ts); + + if (retry >= 5) { + GTP_ERROR("failed to esd recovery"); + return FAIL; + } + + GTP_INFO("Esd recovery successful"); + return SUCCESS; +} + +void gtp_recovery_reset(struct i2c_client *client) +{ +#if GTP_ESD_PROTECT + gtp_esd_switch(client, SWITCH_OFF); +#endif + GTP_DEBUG_FUNC(); + + gtp_esd_recovery(client); + +#if GTP_ESD_PROTECT + gtp_esd_switch(client, SWITCH_ON); +#endif +} + +static s32 gtp_bak_ref_proc(struct goodix_ts_data *ts, u8 mode) +{ + s32 ret = 0; + s32 i = 0; + s32 j = 0; + u16 ref_sum = 0; + u16 learn_cnt = 0; + u16 chksum = 0; + s32 ref_seg_len = 0; + s32 ref_grps = 0; + struct file *ref_filp = NULL; + u8 *p_bak_ref; + + ret = gup_check_fs_mounted("/data"); + if (FAIL == ret) { + ts->ref_chk_fs_times++; + GTP_DEBUG("Ref check /data times/MAX_TIMES: %d / %d", ts->ref_chk_fs_times, GTP_CHK_FS_MNT_MAX); + if (ts->ref_chk_fs_times < GTP_CHK_FS_MNT_MAX) { + msleep(50); + GTP_INFO("/data not mounted."); + return FAIL; + } + GTP_INFO("check /data mount timeout..."); + } else { + GTP_INFO("/data mounted!!!(%d/%d)", ts->ref_chk_fs_times, GTP_CHK_FS_MNT_MAX); + } + + p_bak_ref = (u8 *)kzalloc(ts->bak_ref_len, GFP_KERNEL); + + if (NULL == p_bak_ref) { + GTP_ERROR("Allocate memory for p_bak_ref failed!"); + return FAIL; + } + + if (ts->is_950) { + ref_seg_len = ts->bak_ref_len / 6; + ref_grps = 6; + } else { + ref_seg_len = ts->bak_ref_len; + ref_grps = 1; + } + ref_filp = filp_open(GTP_BAK_REF_PATH, O_RDWR | O_CREAT, 0666); + if (IS_ERR(ref_filp)) { + GTP_INFO("%s is unavailable, default backup-reference used", GTP_BAK_REF_PATH); + goto bak_ref_default; + } + + switch (mode) { + case GTP_BAK_REF_SEND: + GTP_INFO("Send backup-reference"); + ref_filp->f_op->llseek(ref_filp, 0, SEEK_SET); + ret = ref_filp->f_op->read(ref_filp, (char*)p_bak_ref, ts->bak_ref_len, &ref_filp->f_pos); + if (ret < 0) { + GTP_ERROR("failed to read bak_ref info from file, sending defualt bak_ref"); + goto bak_ref_default; + } + for (j = 0; j < ref_grps; ++j) { + ref_sum = 0; + for (i = 0; i < (ref_seg_len); i += 2) { + ref_sum += (p_bak_ref[i + j * ref_seg_len] << 8) + p_bak_ref[i+1 + j * ref_seg_len]; + } + learn_cnt = (p_bak_ref[j * ref_seg_len + ref_seg_len -4] << 8) + (p_bak_ref[j * ref_seg_len + ref_seg_len -3]); + chksum = (p_bak_ref[j * ref_seg_len + ref_seg_len -2] << 8) + (p_bak_ref[j * ref_seg_len + ref_seg_len -1]); + GTP_DEBUG("learn count = %d", learn_cnt); + GTP_DEBUG("chksum = %d", chksum); + GTP_DEBUG("ref_sum = 0x%04X", ref_sum & 0xFFFF); + // Sum(1~ref_seg_len) == 1 + if (1 != ref_sum) { + GTP_INFO("wrong chksum for bak_ref, reset to 0x00 bak_ref"); + memset(&p_bak_ref[j * ref_seg_len], 0, ref_seg_len); + p_bak_ref[ref_seg_len + j * ref_seg_len - 1] = 0x01; + } else { + if (j == (ref_grps - 1)) { + GTP_INFO("backup-reference data in %s used", GTP_BAK_REF_PATH); + } + } + } + ret = i2c_write_bytes(ts->client, GTP_REG_BAK_REF, p_bak_ref, ts->bak_ref_len); + if (FAIL == ret) { + GTP_ERROR("failed to send bak_ref because of iic comm error"); + filp_close(ref_filp, NULL); + return FAIL; + } + break; + + case GTP_BAK_REF_STORE: + GTP_INFO("Store backup-reference"); + ret = i2c_read_bytes(ts->client, GTP_REG_BAK_REF, p_bak_ref, ts->bak_ref_len); + if (ret < 0) { + GTP_ERROR("failed to read bak_ref info, sending default back-reference"); + goto bak_ref_default; + } + ref_filp->f_op->llseek(ref_filp, 0, SEEK_SET); + ref_filp->f_op->write(ref_filp, (char*)p_bak_ref, ts->bak_ref_len, &ref_filp->f_pos); + break; + + default: + GTP_ERROR("invalid backup-reference request"); + break; + } + filp_close(ref_filp, NULL); + return SUCCESS; + +bak_ref_default: + + for (j = 0; j < ref_grps; ++j) { + memset(&p_bak_ref[j * ref_seg_len], 0, ref_seg_len); + p_bak_ref[j * ref_seg_len + ref_seg_len - 1] = 0x01; // checksum = 1 + } + ret = i2c_write_bytes(ts->client, GTP_REG_BAK_REF, p_bak_ref, ts->bak_ref_len); + if (!IS_ERR(ref_filp)) { + GTP_INFO("write backup-reference data into %s", GTP_BAK_REF_PATH); + ref_filp->f_op->llseek(ref_filp, 0, SEEK_SET); + ref_filp->f_op->write(ref_filp, (char*)p_bak_ref, ts->bak_ref_len, &ref_filp->f_pos); + filp_close(ref_filp, NULL); + } + if (ret == FAIL) { + GTP_ERROR("failed to load the default backup reference"); + return FAIL; + } + return SUCCESS; +} + + +static s32 gtp_verify_main_clk(u8 *p_main_clk) +{ + u8 chksum = 0; + u8 main_clock = p_main_clk[0]; + s32 i = 0; + + if (main_clock < 50 || main_clock > 120) { + return FAIL; + } + + for (i = 0; i < 5; ++i) { + if (main_clock != p_main_clk[i]) { + return FAIL; + } + chksum += p_main_clk[i]; + } + chksum += p_main_clk[5]; + if ( (chksum) == 0) { + return SUCCESS; + } else { + return FAIL; + } +} + +static s32 gtp_main_clk_proc(struct goodix_ts_data *ts) +{ + s32 ret = 0; + s32 i = 0; + s32 clk_chksum = 0; + struct file *clk_filp = NULL; + u8 p_main_clk[6] = {0}; + + ret = gup_check_fs_mounted("/data"); + if (FAIL == ret) { + ts->clk_chk_fs_times++; + GTP_DEBUG("Clock check /data times/MAX_TIMES: %d / %d", ts->clk_chk_fs_times, GTP_CHK_FS_MNT_MAX); + if (ts->clk_chk_fs_times < GTP_CHK_FS_MNT_MAX) { + msleep(50); + GTP_INFO("/data not mounted."); + return FAIL; + } + GTP_INFO("Check /data mount timeout!"); + } else { + GTP_INFO("/data mounted!!!(%d/%d)", ts->clk_chk_fs_times, GTP_CHK_FS_MNT_MAX); + } + + clk_filp = filp_open(GTP_MAIN_CLK_PATH, O_RDWR | O_CREAT, 0666); + if (IS_ERR(clk_filp)) { + GTP_ERROR("%s is unavailable, calculate main clock", GTP_MAIN_CLK_PATH); + } else { + clk_filp->f_op->llseek(clk_filp, 0, SEEK_SET); + clk_filp->f_op->read(clk_filp, (char *)p_main_clk, 6, &clk_filp->f_pos); + + ret = gtp_verify_main_clk(p_main_clk); + if (FAIL == ret) { + // recalculate main clock & rewrite main clock data to file + GTP_ERROR("main clock data in %s is wrong, recalculate main clock", GTP_MAIN_CLK_PATH); + } else { + GTP_INFO("main clock data in %s used, main clock freq: %d", GTP_MAIN_CLK_PATH, p_main_clk[0]); + filp_close(clk_filp, NULL); + goto update_main_clk; + } + } + +#if GTP_ESD_PROTECT + gtp_esd_switch(ts->client, SWITCH_OFF); +#endif + ret = gup_clk_calibration(); + gtp_esd_recovery(ts->client); + +#if GTP_ESD_PROTECT + gtp_esd_switch(ts->client, SWITCH_ON); +#endif + + GTP_INFO("calibrate main clock: %d", ret); + if (ret < 50 || ret > 120) { + GTP_ERROR("wrong main clock: %d", ret); + goto exit_main_clk; + } + + // Sum{0x8020~0x8025} = 0 + for (i = 0; i < 5; ++i) { + p_main_clk[i] = ret; + clk_chksum += p_main_clk[i]; + } + p_main_clk[5] = 0 - clk_chksum; + + if (!IS_ERR(clk_filp)) { + GTP_DEBUG("write main clock data into %s", GTP_MAIN_CLK_PATH); + clk_filp->f_op->llseek(clk_filp, 0, SEEK_SET); + clk_filp->f_op->write(clk_filp, (char *)p_main_clk, 6, &clk_filp->f_pos); + filp_close(clk_filp, NULL); + } + +update_main_clk: + ret = i2c_write_bytes(ts->client, GTP_REG_MAIN_CLK, p_main_clk, 6); + if (FAIL == ret) { + GTP_ERROR("update main clock failed!"); + return FAIL; + } + return SUCCESS; + +exit_main_clk: + if (!IS_ERR(clk_filp)) { + filp_close(clk_filp, NULL); + } + return FAIL; +} + +s32 gtp_gt9xxf_init(struct i2c_client *client) +{ + s32 ret = 0; + + ret = gup_fw_download_proc(NULL, GTP_FL_FW_BURN); + if (FAIL == ret) { + return FAIL; + } + + ret = gtp_fw_startup(client); + if (FAIL == ret) { + return FAIL; + } + return SUCCESS; +} + +void gtp_get_chip_type(struct goodix_ts_data *ts) +{ + u8 opr_buf[10] = {0x00}; + s32 ret = 0; + + msleep(10); + + ret = gtp_i2c_read_dbl_check(ts->client, GTP_REG_CHIP_TYPE, opr_buf, 10); + + if (FAIL == ret) { + GTP_ERROR("Failed to get chip-type, set chip type default: GOODIX_GT9"); + ts->chip_type = CHIP_TYPE_GT9; + return; + } + + if (!memcmp(opr_buf, "GOODIX_GT9", 10)) { + ts->chip_type = CHIP_TYPE_GT9; + } else { // GT9XXF + ts->chip_type = CHIP_TYPE_GT9F; + } + GTP_INFO("Chip Type: %s", (ts->chip_type == CHIP_TYPE_GT9) ? "GOODIX_GT9" : "GOODIX_GT9F"); +} + +#endif +//************* For GT9XXF End ************// + +/******************************************************* +Function: + I2c probe. +Input: + client: i2c device struct. + id: device id. +Output: + Executive outcomes. + 0: succeed. +*******************************************************/ +static int goodix_ts_probe(struct i2c_client *client, const struct i2c_device_id *id) +{ + s32 ret = -1; + struct goodix_ts_data *ts; + u16 version_info; + + GTP_DEBUG_FUNC(); + + //do NOT remove these logs + GTP_INFO("GTP Driver Version: %s", GTP_DRIVER_VERSION); + GTP_INFO("GTP Driver Built@%s, %s", __TIME__, __DATE__); + GTP_INFO("GTP I2C Address: 0x%02x", client->addr); + + i2c_connect_client = client; + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) { + GTP_ERROR("I2C check functionality failed."); + return -ENODEV; + } + ts = kzalloc(sizeof(*ts), GFP_KERNEL); + if (ts == NULL) { + GTP_ERROR("Alloc GFP_KERNEL memory failed."); + return -ENOMEM; + } + + memset(ts, 0, sizeof(*ts)); + INIT_WORK(&ts->work, goodix_ts_work_func); + ts->client = client; + spin_lock_init(&ts->irq_lock); // 2.6.39 later + // ts->irq_lock = SPIN_LOCK_UNLOCKED; // 2.6.39 & before +#if GTP_ESD_PROTECT + ts->clk_tick_cnt = 2 * HZ; // HZ: clock ticks in 1 second generated by system + GTP_DEBUG("Clock ticks for an esd cycle: %d", ts->clk_tick_cnt); + spin_lock_init(&ts->esd_lock); + // ts->esd_lock = SPIN_LOCK_UNLOCKED; +#endif + i2c_set_clientdata(client, ts); + + ts->gtp_rawdiff_mode = 0; + + ret = gtp_request_io_port(ts); + if (ret < 0) { + GTP_ERROR("GTP request IO port failed."); + kfree(ts); + return ret; + } + +#if GTP_COMPATIBLE_MODE + gtp_get_chip_type(ts); + + if (CHIP_TYPE_GT9F == ts->chip_type) { + ret = gtp_gt9xxf_init(ts->client); + if (FAIL == ret) { + GTP_INFO("Failed to init GT9XXF."); + } + } +#endif + + ret = gtp_i2c_test(client); + if (ret < 0) { + GTP_ERROR("I2C communication ERROR!"); + } + + ret = gtp_read_version(client, &version_info); + if (ret < 0) { + GTP_ERROR("Read version failed."); + } + + ret = gtp_init_panel(ts); + if (ret < 0) { + GTP_ERROR("GTP init panel failed."); + ts->abs_x_max = GTP_MAX_WIDTH; + ts->abs_y_max = GTP_MAX_HEIGHT; + ts->int_trigger_type = GTP_INT_TRIGGER; + } + +#if GTP_AUTO_UPDATE + ret = gup_init_update_proc(ts); + if (ret < 0) { + GTP_ERROR("Create update thread error."); + } +#endif + + ret = gtp_request_input_dev(ts); + if (ret < 0) { + GTP_ERROR("GTP request input dev failed"); + } + +#ifdef CONFIG_HAS_EARLYSUSPEND + ts->early_suspend.level = EARLY_SUSPEND_LEVEL_BLANK_SCREEN + 1; + ts->early_suspend.suspend = goodix_ts_early_suspend; + ts->early_suspend.resume = goodix_ts_late_resume; + register_early_suspend(&ts->early_suspend); +#endif + + ret = gtp_request_irq(ts); + if (ret < 0) { + GTP_INFO("GTP works in polling mode."); + } else { + GTP_INFO("GTP works in interrupt mode."); + } + + if (ts->use_irq) { + gtp_irq_enable(ts); + } + +#if GTP_CREATE_WR_NODE + init_wr_node(client); +#endif + +#if GTP_ESD_PROTECT + gtp_esd_switch(client, SWITCH_ON); +#endif + return 0; +} + + +/******************************************************* +Function: + Goodix touchscreen driver release function. +Input: + client: i2c device struct. +Output: + Executive outcomes. 0---succeed. +*******************************************************/ +static int goodix_ts_remove(struct i2c_client *client) +{ + struct goodix_ts_data *ts = i2c_get_clientdata(client); + + GTP_DEBUG_FUNC(); + +#ifdef CONFIG_HAS_EARLYSUSPEND + unregister_early_suspend(&ts->early_suspend); +#endif + +#if GTP_CREATE_WR_NODE + uninit_wr_node(); +#endif + +#if GTP_ESD_PROTECT + destroy_workqueue(gtp_esd_check_workqueue); +#endif + + if (ts) { + if (ts->use_irq) { + GTP_GPIO_AS_INPUT(GTP_INT_PORT); + GTP_GPIO_FREE(GTP_INT_PORT); + free_irq(client->irq, ts); + } else { + hrtimer_cancel(&ts->timer); + } + } + + GTP_INFO("GTP driver removing..."); + i2c_set_clientdata(client, NULL); + input_unregister_device(ts->input_dev); + kfree(ts); + + return 0; +} + +#ifdef CONFIG_HAS_EARLYSUSPEND +/******************************************************* +Function: + Early suspend function. +Input: + h: early_suspend struct. +Output: + None. +*******************************************************/ +static void goodix_ts_early_suspend(struct early_suspend *h) +{ + struct goodix_ts_data *ts; + s8 ret = -1; + ts = container_of(h, struct goodix_ts_data, early_suspend); + + GTP_DEBUG_FUNC(); + +#if GTP_ESD_PROTECT + gtp_esd_switch(ts->client, SWITCH_OFF); +#endif + ts->gtp_is_suspend = 1; + +#if GTP_SLIDE_WAKEUP + ret = gtp_enter_doze(ts); +#else + if (ts->use_irq) { + gtp_irq_disable(ts); + } else { + hrtimer_cancel(&ts->timer); + } + ret = gtp_enter_sleep(ts); +#endif + if (ret < 0) { + GTP_ERROR("GTP early suspend failed."); + } + // to avoid waking up while not sleeping + // delay 48 + 10ms to ensure reliability + msleep(58); +} + +/******************************************************* +Function: + Late resume function. +Input: + h: early_suspend struct. +Output: + None. +*******************************************************/ +static void goodix_ts_late_resume(struct early_suspend *h) +{ + struct goodix_ts_data *ts; + s8 ret = -1; + ts = container_of(h, struct goodix_ts_data, early_suspend); + + GTP_DEBUG_FUNC(); + + ret = gtp_wakeup_sleep(ts); + +#if GTP_SLIDE_WAKEUP + doze_status = DOZE_DISABLED; +#endif + + if (ret < 0) { + GTP_ERROR("GTP later resume failed."); + } +#if (GTP_COMPATIBLE_MODE) + if (CHIP_TYPE_GT9F == ts->chip_type) { + // do nothing + } else +#endif + { + gtp_send_cfg(ts->client); + } + + if (ts->use_irq) { + gtp_irq_enable(ts); + } else { + hrtimer_start(&ts->timer, ktime_set(1, 0), HRTIMER_MODE_REL); + } + + ts->gtp_is_suspend = 0; +#if GTP_ESD_PROTECT + gtp_esd_switch(ts->client, SWITCH_ON); +#endif +} +#endif + +#if GTP_ESD_PROTECT +s32 gtp_i2c_read_no_rst(struct i2c_client *client, u8 *buf, s32 len) +{ + struct i2c_msg msgs[2]; + s32 ret=-1; + s32 retries = 0; + + GTP_DEBUG_FUNC(); + + msgs[0].flags = !I2C_M_RD; + msgs[0].addr = client->addr; + msgs[0].len = GTP_ADDR_LENGTH; + msgs[0].buf = &buf[0]; + //msgs[0].scl_rate = 300 * 1000; // for Rockchip, etc. + + msgs[1].flags = I2C_M_RD; + msgs[1].addr = client->addr; + msgs[1].len = len - GTP_ADDR_LENGTH; + msgs[1].buf = &buf[GTP_ADDR_LENGTH]; + //msgs[1].scl_rate = 300 * 1000; + + while(retries < 5) { + ret = i2c_transfer(client->adapter, msgs, 2); + if(ret == 2)break; + retries++; + } + if ((retries >= 5)) { + GTP_ERROR("I2C Read: 0x%04X, %d bytes failed, errcode: %d!", (((u16)(buf[0] << 8)) | buf[1]), len-2, ret); + } + return ret; +} + +s32 gtp_i2c_write_no_rst(struct i2c_client *client,u8 *buf,s32 len) +{ + struct i2c_msg msg; + s32 ret = -1; + s32 retries = 0; + + GTP_DEBUG_FUNC(); + + msg.flags = !I2C_M_RD; + msg.addr = client->addr; + msg.len = len; + msg.buf = buf; + //msg.scl_rate = 300 * 1000; // for Rockchip, etc + + while(retries < 5) { + ret = i2c_transfer(client->adapter, &msg, 1); + if (ret == 1)break; + retries++; + } + if((retries >= 5)) { + GTP_ERROR("I2C Write: 0x%04X, %d bytes failed, errcode: %d!", (((u16)(buf[0] << 8)) | buf[1]), len-2, ret); + } + return ret; +} +/******************************************************* +Function: + switch on & off esd delayed work +Input: + client: i2c device + on: SWITCH_ON / SWITCH_OFF +Output: + void +*********************************************************/ +void gtp_esd_switch(struct i2c_client *client, s32 on) +{ + struct goodix_ts_data *ts; + + ts = i2c_get_clientdata(client); + spin_lock(&ts->esd_lock); + + if (SWITCH_ON == on) { // switch on esd + if (!ts->esd_running) { + ts->esd_running = 1; + spin_unlock(&ts->esd_lock); + GTP_INFO("Esd started"); + queue_delayed_work(gtp_esd_check_workqueue, >p_esd_check_work, ts->clk_tick_cnt); + } else { + spin_unlock(&ts->esd_lock); + } + } else { // switch off esd + if (ts->esd_running) { + ts->esd_running = 0; + spin_unlock(&ts->esd_lock); + GTP_INFO("Esd cancelled"); + cancel_delayed_work_sync(>p_esd_check_work); + } else { + spin_unlock(&ts->esd_lock); + } + } +} + +/******************************************************* +Function: + Initialize external watchdog for esd protect +Input: + client: i2c device. +Output: + result of i2c write operation. + 1: succeed, otherwise: failed +*********************************************************/ +static s32 gtp_init_ext_watchdog(struct i2c_client *client) +{ + u8 opr_buffer[3] = {0x80, 0x41, 0xAA}; + GTP_DEBUG("[Esd]Init external watchdog"); + return gtp_i2c_write_no_rst(client, opr_buffer, 3); +} + +/******************************************************* +Function: + Esd protect function. + External watchdog added by meta, 2013/03/07 +Input: + work: delayed work +Output: + None. +*******************************************************/ +static void gtp_esd_check_func(struct work_struct *work) +{ + s32 i; + s32 ret = -1; + struct goodix_ts_data *ts = NULL; + u8 esd_buf[4] = {0x80, 0x40}; + + GTP_DEBUG_FUNC(); + + ts = i2c_get_clientdata(i2c_connect_client); + + if (ts->gtp_is_suspend) { + GTP_INFO("Esd suspended!"); + return; + } + + for (i = 0; i < 3; i++) { + ret = gtp_i2c_read_no_rst(ts->client, esd_buf, 4); + + GTP_DEBUG("[Esd]0x8040 = 0x%02X, 0x8041 = 0x%02X", esd_buf[2], esd_buf[3]); + if ((ret < 0)) { + // IIC communication problem + continue; + } else { + if ((esd_buf[2] == 0xAA) || (esd_buf[3] != 0xAA)) { + // IC works abnormally.. + u8 chk_buf[4] = {0x80, 0x40}; + + gtp_i2c_read_no_rst(ts->client, chk_buf, 4); + + GTP_DEBUG("[Check]0x8040 = 0x%02X, 0x8041 = 0x%02X", chk_buf[2], chk_buf[3]); + + if ((chk_buf[2] == 0xAA) || (chk_buf[3] != 0xAA)) { + i = 3; + break; + } else { + continue; + } + } else { + // IC works normally, Write 0x8040 0xAA, feed the dog + esd_buf[2] = 0xAA; + gtp_i2c_write_no_rst(ts->client, esd_buf, 3); + break; + } + } + } + if (i >= 3) { +#if GTP_COMPATIBLE_MODE + if (CHIP_TYPE_GT9F == ts->chip_type) { + if (ts->rqst_processing) { + GTP_INFO("Request processing, no esd recovery"); + } else { + GTP_ERROR("IC working abnormally! Process esd recovery."); + gtp_esd_recovery(ts->client); + } + } else +#endif + { + GTP_ERROR("IC working abnormally! Process reset guitar."); + gtp_reset_guitar(ts->client, 50); + } + } + + if(!ts->gtp_is_suspend) { + queue_delayed_work(gtp_esd_check_workqueue, >p_esd_check_work, ts->clk_tick_cnt); + } else { + GTP_INFO("Esd suspended!"); + } + return; +} +#endif + +static const struct i2c_device_id goodix_ts_id[] = { + { GTP_I2C_NAME, 0 }, + { } +}; + +static struct i2c_driver goodix_ts_driver = { + .probe = goodix_ts_probe, + .remove = goodix_ts_remove, +#ifndef CONFIG_HAS_EARLYSUSPEND + .suspend = goodix_ts_early_suspend, + .resume = goodix_ts_late_resume, +#endif + .id_table = goodix_ts_id, + .driver = { + .name = GTP_I2C_NAME, + .owner = THIS_MODULE, + }, +}; + +/******************************************************* +Function: + Driver Install function. +Input: + None. +Output: + Executive Outcomes. 0---succeed. +********************************************************/ +static int /*__devinit*/ goodix_ts_init(void) +{ + s32 ret; + + GTP_DEBUG_FUNC(); + GTP_INFO("GTP driver installing..."); + goodix_wq = create_singlethread_workqueue("goodix_wq"); + if (!goodix_wq) { + GTP_ERROR("Creat workqueue failed."); + return -ENOMEM; + } +#if GTP_ESD_PROTECT + INIT_DELAYED_WORK(>p_esd_check_work, gtp_esd_check_func); + gtp_esd_check_workqueue = create_workqueue("gtp_esd_check"); +#endif + ret = i2c_add_driver(&goodix_ts_driver); + return ret; +} + +/******************************************************* +Function: + Driver uninstall function. +Input: + None. +Output: + Executive Outcomes. 0---succeed. +********************************************************/ +static void __exit goodix_ts_exit(void) +{ + GTP_DEBUG_FUNC(); + GTP_INFO("GTP driver exited."); + i2c_del_driver(&goodix_ts_driver); + if (goodix_wq) { + destroy_workqueue(goodix_wq); + } +} + +late_initcall(goodix_ts_init); +module_exit(goodix_ts_exit); + +MODULE_DESCRIPTION("GTP Series Driver"); +MODULE_LICENSE("GPL"); diff --git a/drivers/input/touchscreen/goodix/gt9xx.h b/drivers/input/touchscreen/goodix/gt9xx.h new file mode 100644 index 00000000..8dac7063 --- /dev/null +++ b/drivers/input/touchscreen/goodix/gt9xx.h @@ -0,0 +1,340 @@ +/* drivers/input/touchscreen/gt9xx.h + * + * 2010 - 2013 Goodix Technology. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be a reference + * to you, when you are integrating the GOODiX's CTP IC into your system, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + */ + +#ifndef _GOODIX_GT9XX_H_ +#define _GOODIX_GT9XX_H_ + +#include <linux/kernel.h> +#include <linux/hrtimer.h> +#include <linux/i2c.h> +#include <linux/input.h> +#include <linux/module.h> +#include <linux/delay.h> +#include <linux/i2c.h> +#include <linux/proc_fs.h> +#include <linux/string.h> +#include <asm/uaccess.h> +#include <linux/vmalloc.h> +#include <linux/interrupt.h> +#include <linux/io.h> +#include <mach/gpio.h> +#include <linux/earlysuspend.h> +#include <mach/board.h> +#include <linux/init.h> +#include <linux/slab.h> +//***************************PART1:ON/OFF define******************************* +#define GTP_CUSTOM_CFG 0 +#define GTP_CHANGE_X2Y 0 +#define GTP_DRIVER_SEND_CFG 1 +#define GTP_HAVE_TOUCH_KEY 0 +#define GTP_POWER_CTRL_SLEEP 0 +#define GTP_ICS_SLOT_REPORT 0 + +#define GTP_AUTO_UPDATE 1 // auto update fw by .bin file as default +#define GTP_HEADER_FW_UPDATE 0 // auto update fw by gtp_default_FW in gt9xx_firmware.h, function together with GTP_AUTO_UPDATE +#define GTP_AUTO_UPDATE_CFG 0 // auto update config by .cfg file, function together with GTP_AUTO_UPDATE + +#define GTP_COMPATIBLE_MODE 0 // compatible with GT9XXF + +#define GTP_CREATE_WR_NODE 1 +#define GTP_ESD_PROTECT 0 // esd protection with a cycle of 2 seconds +#define GTP_WITH_PEN 0 + +#define GTP_SLIDE_WAKEUP 0 +#define GTP_DBL_CLK_WAKEUP 0 // double-click wakeup, function together with GTP_SLIDE_WAKEUP + +#define GTP_DEBUG_ON 0 +#define GTP_DEBUG_ARRAY_ON 0 +#define GTP_DEBUG_FUNC_ON 0 + +#if GTP_COMPATIBLE_MODE +typedef enum { + CHIP_TYPE_GT9 = 0, + CHIP_TYPE_GT9F = 1, +} CHIP_TYPE_T; +#endif + +struct goodix_ts_data { + spinlock_t irq_lock; + struct i2c_client *client; + struct input_dev *input_dev; + struct hrtimer timer; + struct work_struct work; + struct early_suspend early_suspend; + s32 irq_is_disable; + s32 use_irq; + u16 abs_x_max; + u16 abs_y_max; + u8 max_touch_num; + u8 int_trigger_type; + u8 green_wake_mode; + u8 enter_update; + u8 gtp_is_suspend; + u8 gtp_rawdiff_mode; + u8 gtp_cfg_len; + u8 fixed_cfg; + u8 fw_error; + u8 pnl_init_error; + +#if GTP_ESD_PROTECT + spinlock_t esd_lock; + u8 esd_running; + s32 clk_tick_cnt; +#endif + +#if GTP_COMPATIBLE_MODE + u16 bak_ref_len; + s32 ref_chk_fs_times; + s32 clk_chk_fs_times; + CHIP_TYPE_T chip_type; + u8 rqst_processing; + u8 is_950; +#endif + +}; + +extern u16 show_len; +extern u16 total_len; + + +//*************************** PART2:TODO define ********************************** +// STEP_1(REQUIRED): Define Configuration Information Group(s) +// Sensor_ID Map: +/* sensor_opt1 sensor_opt2 Sensor_ID + GND GND 0 + VDDIO GND 1 + NC GND 2 + GND NC/300K 3 + VDDIO NC/300K 4 + NC NC/300K 5 +*/ +// TODO: define your own default or for Sensor_ID == 0 config here. +// unused group7: GT911_Config_20130701_185822_QDTP.cfg +#define CTP_CFG_GROUP7 {\ + 0x42,0xFC,0x03,0x00,0x03,0x05,0x39,0x00,0x01,0x3F,\ + 0x1C,0x0F,0x50,0x32,0x03,0x05,0x00,0x00,0x00,0x00,\ + 0x00,0x00,0x00,0x17,0x19,0x1C,0x14,0x8C,0x2E,0x0E,\ + 0x28,0x2A,0x7C,0x08,0x00,0x00,0x00,0x9B,0x02,0x1D,\ + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\ + 0x00,0x1E,0x46,0x94,0x05,0x02,0x08,0x00,0x00,0xF9,\ + 0x08,0x1C,0xA2,0x09,0x1E,0x22,0x0A,0x23,0xFC,0x0A,\ + 0x26,0xA5,0x0C,0x26,0x00,0x00,0x00,0x00,0x00,0x00,\ + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\ + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\ + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\ + 0x00,0x00,0x1C,0x1A,0x18,0x16,0x14,0x12,0x10,0x0E,\ + 0x0C,0x0A,0x08,0x06,0x04,0x02,0xFF,0xFF,0xFF,0xFF,\ + 0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,\ + 0xFF,0xFF,0x2A,0x29,0x28,0x26,0x24,0x22,0x21,0x20,\ + 0x1F,0x1E,0x1D,0x1C,0x18,0x16,0x14,0x13,0x12,0x10,\ + 0x0F,0x0C,0x0A,0x08,0x06,0x04,0x02,0x00,0xFF,0xFF,\ + 0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,\ + 0xFF,0xFF,0xFF,0xFF,0x92,0x01\ + } + +// TODO: define your config for Sensor_ID == 1 here, if needed +// unused group8: GT911_Config_20130701_185822_QDTP.cfg (mirror_x_y) +#define CTP_CFG_GROUP8 {\ + 0x42,0xFC,0x03,0x00,0x03,0x05,0x39,0x00,0x01,0x3F,\ + 0x1C,0x0F,0x50,0x32,0x03,0x05,0x00,0x00,0x00,0x00,\ + 0x00,0x00,0x00,0x17,0x19,0x1C,0x14,0x8C,0x2E,0x0E,\ + 0x28,0x2A,0x7C,0x08,0x00,0x00,0x00,0x9B,0x02,0x1D,\ + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\ + 0x00,0x1E,0x46,0x94,0x05,0x02,0x08,0x00,0x00,0xF9,\ + 0x08,0x1C,0xA2,0x09,0x1E,0x22,0x0A,0x23,0xFC,0x0A,\ + 0x26,0xA5,0x0C,0x26,0x00,0x00,0x00,0x00,0x00,0x00,\ + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\ + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\ + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\ + 0x00,0x00,0x02,0x04,0x06,0x08,0x0A,0x0C,0x0E,0x10,\ + 0x12,0x14,0x16,0x18,0x1A,0x1C,0x00,0x00,0x00,0x00,\ + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\ + 0x00,0x00,0x00,0x02,0x04,0x06,0x08,0x0A,0x0C,0x0F,\ + 0x10,0x12,0x13,0x14,0x16,0x18,0x1C,0x1D,0x1E,0x1F,\ + 0x20,0x21,0x22,0x24,0x26,0x28,0x29,0x2A,0x00,0x00,\ + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\ + 0x00,0x00,0x00,0x00,0x72,0x01\ + } + +// TODO: define your config for Sensor_ID == 1 here, if needed +// group1 is in use: GT911_Config_20130701_185822_QDTP.cfg (mirror_x_y & x_2_y) +#define CTP_CFG_GROUP1 {\ + 0x42,0xFC,0x03,0x00,0x03,0x05,0x35,0x00,0x01,0x3F,\ + 0x1C,0x0F,0x50,0x32,0x03,0x05,0x00,0x00,0x00,0x00,\ + 0x00,0x00,0x00,0x17,0x19,0x1C,0x14,0x8C,0x2E,0x0E,\ + 0x28,0x2A,0x7C,0x08,0x00,0x00,0x00,0x9B,0x02,0x1D,\ + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\ + 0x00,0x1E,0x46,0x94,0x05,0x02,0x08,0x00,0x00,0xF9,\ + 0x08,0x1C,0xA2,0x09,0x1E,0x22,0x0A,0x23,0xFC,0x0A,\ + 0x26,0xA5,0x0C,0x26,0x00,0x00,0x00,0x00,0x00,0x00,\ + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\ + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\ + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\ + 0x00,0x00,0x02,0x04,0x06,0x08,0x0A,0x0C,0x0E,0x10,\ + 0x12,0x14,0x16,0x18,0x1A,0x1C,0x00,0x00,0x00,0x00,\ + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\ + 0x00,0x00,0x00,0x02,0x04,0x06,0x08,0x0A,0x0C,0x0F,\ + 0x10,0x12,0x13,0x14,0x16,0x18,0x1C,0x1D,0x1E,0x1F,\ + 0x20,0x21,0x22,0x24,0x26,0x28,0x29,0x2A,0x00,0x00,\ + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\ + 0x00,0x00,0x00,0x00,0x76,0x01\ + } + +// TODO: define your config for Sensor_ID == 2 here, if needed +#define CTP_CFG_GROUP2 {\ + } + +// TODO: define your config for Sensor_ID == 2 here, if needed +#define CTP_CFG_GROUP3 {\ + } + +// TODO: define your config for Sensor_ID == 3 here, if needed +#define CTP_CFG_GROUP4 {\ + } + +// TODO: define your config for Sensor_ID == 4 here, if needed +#define CTP_CFG_GROUP5 {\ + } + +// TODO: define your config for Sensor_ID == 5 here, if needed +#define CTP_CFG_GROUP6 {\ + } + +// STEP_2(REQUIRED): Customize your I/O ports & I/O operations +#define GTP_RST_PORT GPIO_TOUCH_RESET +#define GTP_INT_PORT GPIO_TOUCH_IRQ +#define GTP_INT_IRQ gpio_to_irq(GTP_INT_PORT) + +#define GTP_GPIO_AS_INPUT(pin) do{\ + gpio_direction_input(pin);\ + }while(0) +#define GTP_GPIO_AS_INT(pin) do{\ + GTP_GPIO_AS_INPUT(pin);\ + }while(0) +#define GTP_GPIO_GET_VALUE(pin) gpio_get_value(pin) +#define GTP_GPIO_OUTPUT(pin,level) gpio_direction_output(pin,level) +#define GTP_GPIO_REQUEST(pin, label) gpio_request(pin, label) +#define GTP_GPIO_FREE(pin) gpio_free(pin) +#define GTP_IRQ_TAB {IRQ_TYPE_EDGE_RISING, IRQ_TYPE_EDGE_FALLING, IRQ_TYPE_LEVEL_LOW, IRQ_TYPE_LEVEL_HIGH} + +// STEP_3(optional): Specify your special config info if needed +#if GTP_CUSTOM_CFG +#define GTP_MAX_HEIGHT 800 +#define GTP_MAX_WIDTH 480 +#define GTP_INT_TRIGGER 0 // 0: Rising 1: Falling +#else +#define GTP_MAX_HEIGHT 4096 +#define GTP_MAX_WIDTH 4096 +#define GTP_INT_TRIGGER 1 +#endif +#define GTP_MAX_TOUCH 5 + +// STEP_4(optional): If keys are available and reported as keys, config your key info here +#if GTP_HAVE_TOUCH_KEY +#define GTP_KEY_TAB {KEY_MENU, KEY_HOME, KEY_BACK} +#endif + +//***************************PART3:OTHER define********************************* +#define GTP_DRIVER_VERSION "V2.0<2013/08/28>" +#define GTP_I2C_NAME "goodix_ts" +#define GTP_POLL_TIME 10 +#define GTP_ADDR_LENGTH 2 +#define GTP_CONFIG_MIN_LENGTH 186 +#define GTP_CONFIG_MAX_LENGTH 240 +#define FAIL 0 +#define SUCCESS 1 +#define SWITCH_OFF 0 +#define SWITCH_ON 1 + +//******************** For GT9XXF Start **********************// +#define GTP_REG_BAK_REF 0x99D0 +#define GTP_REG_MAIN_CLK 0x8020 +#define GTP_REG_CHIP_TYPE 0x8000 +#define GTP_REG_HAVE_KEY 0x804E +#define GTP_REG_MATRIX_DRVNUM 0x8069 +#define GTP_REG_MATRIX_SENNUM 0x806A + +#define GTP_FL_FW_BURN 0x00 +#define GTP_FL_ESD_RECOVERY 0x01 +#define GTP_FL_READ_REPAIR 0x02 + +#define GTP_BAK_REF_SEND 0 +#define GTP_BAK_REF_STORE 1 +#define CFG_LOC_DRVA_NUM 29 +#define CFG_LOC_DRVB_NUM 30 +#define CFG_LOC_SENS_NUM 31 + +#define GTP_CHK_FW_MAX 40 +#define GTP_CHK_FS_MNT_MAX 300 +#define GTP_BAK_REF_PATH "/data/gtp_ref.bin" +#define GTP_MAIN_CLK_PATH "/data/gtp_clk.bin" +#define GTP_RQST_CONFIG 0x01 +#define GTP_RQST_BAK_REF 0x02 +#define GTP_RQST_RESET 0x03 +#define GTP_RQST_MAIN_CLOCK 0x04 +#define GTP_RQST_RESPONDED 0x00 +#define GTP_RQST_IDLE 0xFF + +//******************** For GT9XXF End **********************// +// Registers define +#define GTP_READ_COOR_ADDR 0x814E +#define GTP_REG_SLEEP 0x8040 +#define GTP_REG_SENSOR_ID 0x814A +#define GTP_REG_CONFIG_DATA 0x8047 +#define GTP_REG_VERSION 0x8140 + +#define RESOLUTION_LOC 3 +#define TRIGGER_LOC 8 + +#define CFG_GROUP_LEN(p_cfg_grp) (sizeof(p_cfg_grp) / sizeof(p_cfg_grp[0])) +// Log define +#define GTP_INFO(fmt,arg...) printk("<<-GTP-INFO->> "fmt"\n",##arg) +#define GTP_ERROR(fmt,arg...) printk("<<-GTP-ERROR->> "fmt"\n",##arg) +#define GTP_DEBUG(fmt,arg...) do{\ + if(GTP_DEBUG_ON)\ + printk("<<-GTP-DEBUG->> [%d]"fmt"\n",__LINE__, ##arg);\ + }while(0) +#define GTP_DEBUG_ARRAY(array, num) do{\ + s32 i;\ + u8* a = array;\ + if(GTP_DEBUG_ARRAY_ON)\ + {\ + printk("<<-GTP-DEBUG-ARRAY->>\n");\ + for (i = 0; i < (num); i++)\ + {\ + printk("%02x ", (a)[i]);\ + if ((i + 1 ) %10 == 0)\ + {\ + printk("\n");\ + }\ + }\ + printk("\n");\ + }\ + }while(0) +#define GTP_DEBUG_FUNC() do{\ + if(GTP_DEBUG_FUNC_ON)\ + printk("<<-GTP-FUNC->> Func:%s@Line:%d\n",__func__,__LINE__);\ + }while(0) +#define GTP_SWAP(x, y) do{\ + typeof(x) z = x;\ + x = y;\ + y = z;\ + }while (0) + +//*****************************End of Part III******************************** + +#endif /* _GOODIX_GT9XX_H_ */ diff --git a/drivers/input/touchscreen/goodix/gt9xx_update.c b/drivers/input/touchscreen/goodix/gt9xx_update.c new file mode 100644 index 00000000..9413fc1b --- /dev/null +++ b/drivers/input/touchscreen/goodix/gt9xx_update.c @@ -0,0 +1,2716 @@ +/* drivers/input/touchscreen/gt9xx_update.c + * + * 2010 - 2012 Goodix Technology. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be a reference + * to you, when you are integrating the GOODiX's CTP IC into your system, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * Latest Version:1.6 + * Author: andrew@goodix.com + * Revision Record: + * V1.0: + * first release. By Andrew, 2012/08/31 + * V1.2: + * add force update,GT9110P pid map. By Andrew, 2012/10/15 + * V1.4: + * 1. add config auto update function; + * 2. modify enter_update_mode; + * 3. add update file cal checksum. + * By Andrew, 2012/12/12 + * V1.6: + * 1. replace guitar_client with i2c_connect_client; + * 2. support firmware header array update. + * By Meta, 2013/03/11 + */ +#include <linux/kthread.h> +#include <linux/slab.h> +#include <linux/namei.h> +#include <linux/mount.h> +#include "gt9xx.h" +#if ((GTP_AUTO_UPDATE && GTP_HEADER_FW_UPDATE) || GTP_COMPATIBLE_MODE) +#include "gt9xx_firmware.h" +#endif + +#define GUP_REG_HW_INFO 0x4220 +#define GUP_REG_FW_MSG 0x41E4 +#define GUP_REG_PID_VID 0x8140 + +#define GUP_SEARCH_FILE_TIMES 50 + +#define UPDATE_FILE_PATH_1 "/data/_goodix_update_.bin" +#define UPDATE_FILE_PATH_2 "/sdcard/_goodix_update_.bin" + +#define CONFIG_FILE_PATH_1 "/data/_goodix_config_.cfg" +#define CONFIG_FILE_PATH_2 "/sdcard/_goodix_config_.cfg" + +#define FW_HEAD_LENGTH 14 +#define FW_SECTION_LENGTH 0x2000 +#define FW_DSP_ISP_LENGTH 0x1000 +#define FW_DSP_LENGTH 0x1000 +#define FW_BOOT_LENGTH 0x800 + +#define PACK_SIZE 256 +#define MAX_FRAME_CHECK_TIME 5 + + +#define _bRW_MISCTL__SRAM_BANK 0x4048 +#define _bRW_MISCTL__MEM_CD_EN 0x4049 +#define _bRW_MISCTL__CACHE_EN 0x404B +#define _bRW_MISCTL__TMR0_EN 0x40B0 +#define _rRW_MISCTL__SWRST_B0_ 0x4180 +#define _bWO_MISCTL__CPU_SWRST_PULSE 0x4184 +#define _rRW_MISCTL__BOOTCTL_B0_ 0x4190 +#define _rRW_MISCTL__BOOT_OPT_B0_ 0x4218 +#define _rRW_MISCTL__BOOT_CTL_ 0x5094 + +#define AUTO_SEARCH_BIN 0x01 +#define AUTO_SEARCH_CFG 0x02 +#define BIN_FILE_READY 0x80 +#define CFG_FILE_READY 0x08 +#define HEADER_FW_READY 0x00 + +#pragma pack(1) +typedef struct { + u8 hw_info[4]; //hardware info// + u8 pid[8]; //product id // + u16 vid; //version id // +} st_fw_head; +#pragma pack() + +typedef struct { + u8 force_update; + u8 fw_flag; + struct file *file; + struct file *cfg_file; + st_fw_head ic_fw_msg; + mm_segment_t old_fs; +} st_update_msg; + +st_update_msg update_msg; +u16 show_len; +u16 total_len; +u8 got_file_flag = 0; +u8 searching_file = 0; + +extern u8 config[GTP_CONFIG_MAX_LENGTH + GTP_ADDR_LENGTH]; +extern void gtp_reset_guitar(struct i2c_client *client, s32 ms); +extern s32 gtp_send_cfg(struct i2c_client *client); +extern s32 gtp_read_version(struct i2c_client *, u16* ); +extern struct i2c_client * i2c_connect_client; +extern void gtp_irq_enable(struct goodix_ts_data *ts); +extern void gtp_irq_disable(struct goodix_ts_data *ts); +extern s32 gtp_i2c_read_dbl_check(struct i2c_client *, u16, u8 *, int); + +#define _CLOSE_FILE(p_file) if (p_file && !IS_ERR(p_file)) \ + { \ + filp_close(p_file, NULL); \ + } + +#if GTP_ESD_PROTECT +extern void gtp_esd_switch(struct i2c_client *, s32); +#endif + +#if GTP_COMPATIBLE_MODE +s32 gup_fw_download_proc(void *dir, u8 dwn_mode); +#endif +/******************************************************* +Function: + Read data from the i2c slave device. +Input: + client: i2c device. + buf[0~1]: read start address. + buf[2~len-1]: read data buffer. + len: GTP_ADDR_LENGTH + read bytes count +Output: + numbers of i2c_msgs to transfer: + 2: succeed, otherwise: failed +*********************************************************/ +s32 gup_i2c_read(struct i2c_client *client, u8 *buf, s32 len) +{ + struct i2c_msg msgs[2]; + s32 ret=-1; + s32 retries = 0; + + GTP_DEBUG_FUNC(); + + msgs[0].flags = !I2C_M_RD; + msgs[0].addr = client->addr; + msgs[0].len = GTP_ADDR_LENGTH; + msgs[0].buf = &buf[0]; + //msgs[0].scl_rate = 300 * 1000; // for Rockchip, etc + + msgs[1].flags = I2C_M_RD; + msgs[1].addr = client->addr; + msgs[1].len = len - GTP_ADDR_LENGTH; + msgs[1].buf = &buf[GTP_ADDR_LENGTH]; + //msgs[1].scl_rate = 300 * 1000; // for Rockchip, etc. + + while(retries < 5) { + ret = i2c_transfer(client->adapter, msgs, 2); + if(ret == 2)break; + retries++; + } + + return ret; +} + +/******************************************************* +Function: + Write data to the i2c slave device. +Input: + client: i2c device. + buf[0~1]: write start address. + buf[2~len-1]: data buffer + len: GTP_ADDR_LENGTH + write bytes count +Output: + numbers of i2c_msgs to transfer: + 1: succeed, otherwise: failed +*********************************************************/ +s32 gup_i2c_write(struct i2c_client *client,u8 *buf,s32 len) +{ + struct i2c_msg msg; + s32 ret=-1; + s32 retries = 0; + + GTP_DEBUG_FUNC(); + + msg.flags = !I2C_M_RD; + msg.addr = client->addr; + msg.len = len; + msg.buf = buf; + //msg.scl_rate = 300 * 1000; // for Rockchip, etc + + while(retries < 5) { + ret = i2c_transfer(client->adapter, &msg, 1); + if (ret == 1)break; + retries++; + } + + return ret; +} + +static s32 gup_init_panel(struct goodix_ts_data *ts) +{ + s32 ret = 0; + s32 i = 0; + u8 check_sum = 0; + u8 opr_buf[16]; + u8 sensor_id = 0; + u16 version = 0; + + u8 cfg_info_group1[] = CTP_CFG_GROUP1; + u8 cfg_info_group2[] = CTP_CFG_GROUP2; + u8 cfg_info_group3[] = CTP_CFG_GROUP3; + u8 cfg_info_group4[] = CTP_CFG_GROUP4; + u8 cfg_info_group5[] = CTP_CFG_GROUP5; + u8 cfg_info_group6[] = CTP_CFG_GROUP6; + u8 *send_cfg_buf[] = {cfg_info_group1, cfg_info_group2, cfg_info_group3, + cfg_info_group4, cfg_info_group5, cfg_info_group6 + }; + u8 cfg_info_len[] = { CFG_GROUP_LEN(cfg_info_group1), + CFG_GROUP_LEN(cfg_info_group2), + CFG_GROUP_LEN(cfg_info_group3), + CFG_GROUP_LEN(cfg_info_group4), + CFG_GROUP_LEN(cfg_info_group5), + CFG_GROUP_LEN(cfg_info_group6) + }; + + if ((!cfg_info_len[1]) && (!cfg_info_len[2]) && + (!cfg_info_len[3]) && (!cfg_info_len[4]) && + (!cfg_info_len[5])) { + sensor_id = 0; + } else { + ret = gtp_i2c_read_dbl_check(ts->client, GTP_REG_SENSOR_ID, &sensor_id, 1); + if (SUCCESS == ret) { + if (sensor_id >= 0x06) { + GTP_ERROR("Invalid sensor_id(0x%02X), No Config Sent!", sensor_id); + return -1; + } + } else { + GTP_ERROR("Failed to get sensor_id, No config sent!"); + return -1; + } + } + + GTP_DEBUG("Sensor_ID: %d", sensor_id); + + ts->gtp_cfg_len = cfg_info_len[sensor_id]; + + if (ts->gtp_cfg_len < GTP_CONFIG_MIN_LENGTH) { + GTP_ERROR("Sensor_ID(%d) matches with NULL or INVALID CONFIG GROUP! NO Config Sent! You need to check you header file CFG_GROUP section!", sensor_id); + return -1; + } + + ret = gtp_i2c_read_dbl_check(ts->client, GTP_REG_CONFIG_DATA, &opr_buf[0], 1); + + if (ret == SUCCESS) { + GTP_DEBUG("CFG_GROUP%d Config Version: %d, IC Config Version: %d", sensor_id+1, + send_cfg_buf[sensor_id][0], opr_buf[0]); + + send_cfg_buf[sensor_id][0] = opr_buf[0]; + ts->fixed_cfg = 0; + } else { + GTP_ERROR("Failed to get ic config version!No config sent!"); + return -1; + } + + memset(&config[GTP_ADDR_LENGTH], 0, GTP_CONFIG_MAX_LENGTH); + memcpy(&config[GTP_ADDR_LENGTH], send_cfg_buf[sensor_id], ts->gtp_cfg_len); + + GTP_DEBUG("X_MAX = %d, Y_MAX = %d, TRIGGER = 0x%02x", + ts->abs_x_max, ts->abs_y_max, ts->int_trigger_type); + + config[RESOLUTION_LOC] = (u8)GTP_MAX_WIDTH; + config[RESOLUTION_LOC + 1] = (u8)(GTP_MAX_WIDTH>>8); + config[RESOLUTION_LOC + 2] = (u8)GTP_MAX_HEIGHT; + config[RESOLUTION_LOC + 3] = (u8)(GTP_MAX_HEIGHT>>8); + + if (GTP_INT_TRIGGER == 0) { //RISING + config[TRIGGER_LOC] &= 0xfe; + } else if (GTP_INT_TRIGGER == 1) { //FALLING + config[TRIGGER_LOC] |= 0x01; + } + + check_sum = 0; + for (i = GTP_ADDR_LENGTH; i < ts->gtp_cfg_len; i++) { + check_sum += config[i]; + } + config[ts->gtp_cfg_len] = (~check_sum) + 1; + + GTP_DEBUG_FUNC(); + ret = gtp_send_cfg(ts->client); + if (ret < 0) { + GTP_ERROR("Send config error."); + } + gtp_read_version(ts->client, &version); + msleep(10); + return 0; +} + + +static u8 gup_get_ic_msg(struct i2c_client *client, u16 addr, u8* msg, s32 len) +{ + s32 i = 0; + + msg[0] = (addr >> 8) & 0xff; + msg[1] = addr & 0xff; + + for (i = 0; i < 5; i++) { + if (gup_i2c_read(client, msg, GTP_ADDR_LENGTH + len) > 0) { + break; + } + } + + if (i >= 5) { + GTP_ERROR("Read data from 0x%02x%02x failed!", msg[0], msg[1]); + return FAIL; + } + + return SUCCESS; +} + +static u8 gup_set_ic_msg(struct i2c_client *client, u16 addr, u8 val) +{ + s32 i = 0; + u8 msg[3]; + + msg[0] = (addr >> 8) & 0xff; + msg[1] = addr & 0xff; + msg[2] = val; + + for (i = 0; i < 5; i++) { + if (gup_i2c_write(client, msg, GTP_ADDR_LENGTH + 1) > 0) { + break; + } + } + + if (i >= 5) { + GTP_ERROR("Set data to 0x%02x%02x failed!", msg[0], msg[1]); + return FAIL; + } + + return SUCCESS; +} + +static u8 gup_get_ic_fw_msg(struct i2c_client *client) +{ + s32 ret = -1; + u8 retry = 0; + u8 buf[16]; + u8 i; + + // step1:get hardware info + ret = gtp_i2c_read_dbl_check(client, GUP_REG_HW_INFO, &buf[GTP_ADDR_LENGTH], 4); + if (FAIL == ret) { + GTP_ERROR("[get_ic_fw_msg]get hw_info failed,exit"); + return FAIL; + } + + // buf[2~5]: 00 06 90 00 + // hw_info: 00 90 06 00 + for(i=0; i<4; i++) { + update_msg.ic_fw_msg.hw_info[i] = buf[GTP_ADDR_LENGTH + 3 - i]; + } + GTP_DEBUG("IC Hardware info:%02x%02x%02x%02x", update_msg.ic_fw_msg.hw_info[0], update_msg.ic_fw_msg.hw_info[1], + update_msg.ic_fw_msg.hw_info[2], update_msg.ic_fw_msg.hw_info[3]); + // step2:get firmware message + for(retry=0; retry<2; retry++) { + ret = gup_get_ic_msg(client, GUP_REG_FW_MSG, buf, 1); + if(FAIL == ret) { + GTP_ERROR("Read firmware message fail."); + return ret; + } + + update_msg.force_update = buf[GTP_ADDR_LENGTH]; + if((0xBE != update_msg.force_update)&&(!retry)) { + GTP_INFO("The check sum in ic is error."); + GTP_INFO("The IC will be updated by force."); + continue; + } + break; + } + GTP_DEBUG("IC force update flag:0x%x", update_msg.force_update); + + // step3:get pid & vid + ret = gtp_i2c_read_dbl_check(client, GUP_REG_PID_VID, &buf[GTP_ADDR_LENGTH], 6); + if (FAIL == ret) { + GTP_ERROR("[get_ic_fw_msg]get pid & vid failed,exit"); + return FAIL; + } + + memset(update_msg.ic_fw_msg.pid, 0, sizeof(update_msg.ic_fw_msg.pid)); + memcpy(update_msg.ic_fw_msg.pid, &buf[GTP_ADDR_LENGTH], 4); + GTP_DEBUG("IC Product id:%s", update_msg.ic_fw_msg.pid); + + //GT9XX PID MAPPING + /*|-----FLASH-----RAM-----| + |------918------918-----| + |------968------968-----| + |------913------913-----| + |------913P-----913P----| + |------927------927-----| + |------927P-----927P----| + |------9110-----9110----| + |------9110P----9111----|*/ + if(update_msg.ic_fw_msg.pid[0] != 0) { + if(!memcmp(update_msg.ic_fw_msg.pid, "9111", 4)) { + GTP_DEBUG("IC Mapping Product id:%s", update_msg.ic_fw_msg.pid); + memcpy(update_msg.ic_fw_msg.pid, "9110P", 5); + } + } + + update_msg.ic_fw_msg.vid = buf[GTP_ADDR_LENGTH+4] + (buf[GTP_ADDR_LENGTH+5]<<8); + GTP_DEBUG("IC version id:%04x", update_msg.ic_fw_msg.vid); + + return SUCCESS; +} + +s32 gup_enter_update_mode(struct i2c_client *client) +{ + s32 ret = -1; + s32 retry = 0; + u8 rd_buf[3]; + + //step1:RST output low last at least 2ms + GTP_GPIO_OUTPUT(GTP_RST_PORT, 0); + msleep(2); + + //step2:select I2C slave addr,INT:0--0xBA;1--0x28. + GTP_GPIO_OUTPUT(GTP_INT_PORT, (client->addr == 0x14)); + msleep(2); + + //step3:RST output high reset guitar + GTP_GPIO_OUTPUT(GTP_RST_PORT, 1); + + //20121211 modify start + msleep(5); + while(retry++ < 200) { + //step4:Hold ss51 & dsp + ret = gup_set_ic_msg(client, _rRW_MISCTL__SWRST_B0_, 0x0C); + if(ret <= 0) { + GTP_DEBUG("Hold ss51 & dsp I2C error,retry:%d", retry); + continue; + } + + //step5:Confirm hold + ret = gup_get_ic_msg(client, _rRW_MISCTL__SWRST_B0_, rd_buf, 1); + if(ret <= 0) { + GTP_DEBUG("Hold ss51 & dsp I2C error,retry:%d", retry); + continue; + } + if(0x0C == rd_buf[GTP_ADDR_LENGTH]) { + GTP_DEBUG("Hold ss51 & dsp confirm SUCCESS"); + break; + } + GTP_DEBUG("Hold ss51 & dsp confirm 0x4180 failed,value:%d", rd_buf[GTP_ADDR_LENGTH]); + } + if(retry >= 200) { + GTP_ERROR("Enter update Hold ss51 failed."); + return FAIL; + } + + //step6:DSP_CK and DSP_ALU_CK PowerOn + ret = gup_set_ic_msg(client, 0x4010, 0x00); + + //20121211 modify end + return ret; +} + +void gup_leave_update_mode(void) +{ + GTP_GPIO_AS_INT(GTP_INT_PORT); + + GTP_DEBUG("[leave_update_mode]reset chip."); + gtp_reset_guitar(i2c_connect_client, 20); +} + +// Get the correct nvram data +// The correct conditions: +// 1. the hardware info is the same +// 2. the product id is the same +// 3. the firmware version in update file is greater than the firmware version in ic +// or the check sum in ic is wrong +/* Update Conditions: + 1. Same hardware info + 2. Same PID + 3. File VID > IC VID + Force Update Conditions: + 1. Wrong ic firmware checksum + 2. INVALID IC PID or VID + 3. (IC PID == 91XX || File PID == 91XX) && (File VID > IC VID) +*/ + +static u8 gup_enter_update_judge(st_fw_head *fw_head) +{ + u16 u16_tmp; + s32 i = 0; + s32 pid_cmp_len = 0; + u16_tmp = fw_head->vid; + fw_head->vid = (u16)(u16_tmp>>8) + (u16)(u16_tmp<<8); + + GTP_DEBUG("FILE HARDWARE INFO:%02x%02x%02x%02x", fw_head->hw_info[0], fw_head->hw_info[1], fw_head->hw_info[2], fw_head->hw_info[3]); + GTP_DEBUG("FILE PID:%s", fw_head->pid); + GTP_DEBUG("FILE VID:%04x", fw_head->vid); + + GTP_DEBUG("IC HARDWARE INFO:%02x%02x%02x%02x", update_msg.ic_fw_msg.hw_info[0], update_msg.ic_fw_msg.hw_info[1], + update_msg.ic_fw_msg.hw_info[2], update_msg.ic_fw_msg.hw_info[3]); + GTP_DEBUG("IC PID:%s", update_msg.ic_fw_msg.pid); + GTP_DEBUG("IC VID:%04x", update_msg.ic_fw_msg.vid); + + //First two conditions + if ( !memcmp(fw_head->hw_info, update_msg.ic_fw_msg.hw_info, sizeof(update_msg.ic_fw_msg.hw_info))) { + GTP_DEBUG("Get the same hardware info."); + if( update_msg.force_update != 0xBE ) { + GTP_INFO("FW chksum error,need enter update."); + return SUCCESS; + } + + // 20130523 start + if (strlen(update_msg.ic_fw_msg.pid) < 3) { + GTP_INFO("Illegal IC pid, need enter update"); + return SUCCESS; + } else { + for (i = 0; i < 3; i++) { + if ((update_msg.ic_fw_msg.pid[i] < 0x30) || (update_msg.ic_fw_msg.pid[i] > 0x39)) { + GTP_INFO("Illegal IC pid, out of bound, need enter update"); + return SUCCESS; + } + } + } + // 20130523 end + + // avoid situations like gt9xx to gt9xxP, gt9xxS etc. + pid_cmp_len = strlen(fw_head->pid); + if (pid_cmp_len < strlen(update_msg.ic_fw_msg.pid)) { + pid_cmp_len = strlen(update_msg.ic_fw_msg.pid); + } + + if (( !memcmp(fw_head->pid, update_msg.ic_fw_msg.pid, pid_cmp_len)) || + (!memcmp(update_msg.ic_fw_msg.pid, "91XX", 4))|| + (!memcmp(fw_head->pid, "91XX", 4))) { + if(!memcmp(fw_head->pid, "91XX", 4)) { + GTP_DEBUG("Force none same pid update mode."); + } else { + GTP_DEBUG("Get the same pid."); + } + //The third condition + if (fw_head->vid > update_msg.ic_fw_msg.vid) { + GTP_INFO("Need enter update."); + return SUCCESS; + } + GTP_ERROR("Don't meet the third condition."); + GTP_ERROR("File VID <= Ic VID, update aborted!"); + } else { + GTP_ERROR("File PID != Ic PID, update aborted!"); + } + } else { + GTP_ERROR("Different Hardware, update aborted!"); + } + return FAIL; +} + + + +#if GTP_AUTO_UPDATE_CFG +static u8 ascii2hex(u8 a) +{ + s8 value = 0; + + if(a >= '0' && a <= '9') { + value = a - '0'; + } else if(a >= 'A' && a <= 'F') { + value = a - 'A' + 0x0A; + } else if(a >= 'a' && a <= 'f') { + value = a - 'a' + 0x0A; + } else { + value = 0xff; + } + + return value; +} + +static s8 gup_update_config(struct i2c_client *client) +{ + s32 file_len = 0; + s32 ret = 0; + s32 i = 0; + s32 file_cfg_len = 0; + s32 chip_cfg_len = 0; + s32 count = 0; + u8 *buf; + u8 *pre_buf; + u8 *file_config; + //u8 checksum = 0; + u8 pid[8]; + + if(NULL == update_msg.cfg_file) { + GTP_ERROR("[update_cfg]No need to upgrade config!"); + return FAIL; + } + file_len = update_msg.cfg_file->f_op->llseek(update_msg.cfg_file, 0, SEEK_END); + + ret = gup_get_ic_msg(client, GUP_REG_PID_VID, pid, 6); + if(FAIL == ret) { + GTP_ERROR("[update_cfg]Read product id & version id fail."); + return FAIL; + } + pid[5] = '\0'; + GTP_DEBUG("update cfg get pid:%s", &pid[GTP_ADDR_LENGTH]); + + chip_cfg_len = 186; + if(!memcmp(&pid[GTP_ADDR_LENGTH], "968", 3) || + !memcmp(&pid[GTP_ADDR_LENGTH], "910", 3) || + !memcmp(&pid[GTP_ADDR_LENGTH], "960", 3)) { + chip_cfg_len = 228; + } + GTP_DEBUG("[update_cfg]config file len:%d", file_len); + GTP_DEBUG("[update_cfg]need config len:%d",chip_cfg_len); + if((file_len+5) < chip_cfg_len*5) { + GTP_ERROR("Config length error"); + return -1; + } + + buf = (u8*)kzalloc(file_len, GFP_KERNEL); + pre_buf = (u8*)kzalloc(file_len, GFP_KERNEL); + file_config = (u8*)kzalloc(chip_cfg_len + GTP_ADDR_LENGTH, GFP_KERNEL); + update_msg.cfg_file->f_op->llseek(update_msg.cfg_file, 0, SEEK_SET); + + GTP_DEBUG("[update_cfg]Read config from file."); + ret = update_msg.cfg_file->f_op->read(update_msg.cfg_file, (char*)pre_buf, file_len, &update_msg.cfg_file->f_pos); + if(ret<0) { + GTP_ERROR("[update_cfg]Read config file failed."); + goto update_cfg_file_failed; + } + + GTP_DEBUG("[update_cfg]Delete illgal charactor."); + for(i=0,count=0; i<file_len; i++) { + if (pre_buf[i] == ' ' || pre_buf[i] == '\r' || pre_buf[i] == '\n') { + continue; + } + buf[count++] = pre_buf[i]; + } + + GTP_DEBUG("[update_cfg]Ascii to hex."); + file_config[0] = GTP_REG_CONFIG_DATA >> 8; + file_config[1] = GTP_REG_CONFIG_DATA & 0xff; + for(i=0,file_cfg_len=GTP_ADDR_LENGTH; i<count; i+=5) { + if((buf[i]=='0') && ((buf[i+1]=='x') || (buf[i+1]=='X'))) { + u8 high,low; + high = ascii2hex(buf[i+2]); + low = ascii2hex(buf[i+3]); + + if((high == 0xFF) || (low == 0xFF)) { + ret = 0; + GTP_ERROR("[update_cfg]Illegal config file."); + goto update_cfg_file_failed; + } + file_config[file_cfg_len++] = (high<<4) + low; + } else { + ret = 0; + GTP_ERROR("[update_cfg]Illegal config file."); + goto update_cfg_file_failed; + } + } + + + GTP_DEBUG("config:"); + GTP_DEBUG_ARRAY(file_config+2, file_cfg_len); + + i = 0; + while(i++ < 5) { + ret = gup_i2c_write(client, file_config, file_cfg_len); + if(ret > 0) { + GTP_INFO("[update_cfg]Send config SUCCESS."); + break; + } + GTP_ERROR("[update_cfg]Send config i2c error."); + } + +update_cfg_file_failed: + kfree(pre_buf); + kfree(buf); + kfree(file_config); + return ret; +} + +#endif + +#if GTP_AUTO_UPDATE +static void gup_search_file(s32 search_type) +{ + s32 i = 0; + struct file *pfile = NULL; + + got_file_flag = 0x00; + + searching_file = 1; + for (i = 0; i < GUP_SEARCH_FILE_TIMES; ++i) { + if (0 == searching_file) { + GTP_INFO("Force exiting file searching"); + got_file_flag = 0x00; + return; + } + + if (search_type & AUTO_SEARCH_BIN) { + + GTP_DEBUG("Search for %s, %s for fw update.(%d/%d)", UPDATE_FILE_PATH_1, UPDATE_FILE_PATH_2, i+1, GUP_SEARCH_FILE_TIMES); + pfile = filp_open(UPDATE_FILE_PATH_1, O_RDONLY, 0); + if (IS_ERR(pfile)) { + pfile = filp_open(UPDATE_FILE_PATH_2, O_RDONLY, 0); + if (!IS_ERR(pfile)) { + GTP_INFO("Bin file: %s for fw update.", UPDATE_FILE_PATH_2); + got_file_flag |= BIN_FILE_READY; + update_msg.file = pfile; + } + } else { + GTP_INFO("Bin file: %s for fw update.", UPDATE_FILE_PATH_1); + got_file_flag |= BIN_FILE_READY; + update_msg.file = pfile; + } + if (got_file_flag & BIN_FILE_READY) { +#if GTP_AUTO_UPDATE_CFG + if (search_type & AUTO_SEARCH_CFG) { + i = GUP_SEARCH_FILE_TIMES; // Bin & Cfg File required to be in the same directory + } else +#endif + { + searching_file = 0; + return; + } + } + } + +#if GTP_AUTO_UPDATE_CFG + if ( (search_type & AUTO_SEARCH_CFG) && !(got_file_flag & CFG_FILE_READY) ) { + GTP_DEBUG("Search for %s, %s for config update.(%d/%d)", CONFIG_FILE_PATH_1, CONFIG_FILE_PATH_2, i+1, GUP_SEARCH_FILE_TIMES); + pfile = filp_open(CONFIG_FILE_PATH_1, O_RDONLY, 0); + if (IS_ERR(pfile)) { + pfile = filp_open(CONFIG_FILE_PATH_2, O_RDONLY, 0); + if (!IS_ERR(pfile)) { + GTP_INFO("Cfg file: %s for config update.", CONFIG_FILE_PATH_2); + got_file_flag |= CFG_FILE_READY; + update_msg.cfg_file = pfile; + } + } else { + GTP_INFO("Cfg file: %s for config update.", CONFIG_FILE_PATH_1); + got_file_flag |= CFG_FILE_READY; + update_msg.cfg_file = pfile; + } + if (got_file_flag & CFG_FILE_READY) { + searching_file = 0; + return; + } + } +#endif + msleep(3000); + } + searching_file = 0; +} +#endif + + +static u8 gup_check_update_file(struct i2c_client *client, st_fw_head* fw_head, u8* path) +{ + s32 ret = 0; + s32 i = 0; + s32 fw_checksum = 0; + u8 buf[FW_HEAD_LENGTH]; + + if (path) { + GTP_DEBUG("Update File path:%s, %d", path, strlen(path)); + update_msg.file = filp_open(path, O_RDONLY, 0); + + if (IS_ERR(update_msg.file)) { + GTP_ERROR("Open update file(%s) error!", path); + return FAIL; + } + got_file_flag = BIN_FILE_READY; + } else { +#if GTP_AUTO_UPDATE +#if GTP_HEADER_FW_UPDATE + if (sizeof(gtp_default_FW) < (FW_HEAD_LENGTH+FW_SECTION_LENGTH*4+FW_DSP_ISP_LENGTH+FW_DSP_LENGTH+FW_BOOT_LENGTH)) { + GTP_ERROR("INVALID header_fw_array, check your gt9xx_firmware.h file!"); + return FAIL; + } + + got_file_flag = HEADER_FW_READY; + + memcpy(fw_head, >p_default_FW[0], FW_HEAD_LENGTH); + + //check firmware legality + fw_checksum = 0; + for(i=0; i<FW_SECTION_LENGTH*4+FW_DSP_ISP_LENGTH+FW_DSP_LENGTH+FW_BOOT_LENGTH; i+=2) { + u16 temp; + memcpy(buf, >p_default_FW[FW_HEAD_LENGTH + i], 2); + //GTP_DEBUG("BUF[0]:%x", buf[0]); + temp = (buf[0]<<8) + buf[1]; + fw_checksum += temp; + } + + GTP_DEBUG("firmware checksum:%x", fw_checksum&0xFFFF); + if(fw_checksum&0xFFFF) { + GTP_ERROR("Illegal firmware file."); + return FAIL; + } + return SUCCESS; +#else + +#if GTP_AUTO_UPDATE_CFG + gup_search_file(AUTO_SEARCH_BIN | AUTO_SEARCH_CFG); + if (got_file_flag & CFG_FILE_READY) { + ret = gup_update_config(i2c_connect_client); + if(ret <= 0) { + GTP_ERROR("Update config failed."); + } + _CLOSE_FILE(update_msg.cfg_file); + msleep(500); //waiting config to be stored in FLASH. + } +#else + gup_search_file(AUTO_SEARCH_BIN); +#endif + + if ( !(got_file_flag & BIN_FILE_READY) ) { + GTP_ERROR("No bin file for fw update"); + return FAIL; + } +#endif + +#else + { + GTP_ERROR("NULL file for firmware update"); + return FAIL; + } +#endif + } + + update_msg.old_fs = get_fs(); + set_fs(KERNEL_DS); + + update_msg.file->f_op->llseek(update_msg.file, 0, SEEK_SET); + + ret = update_msg.file->f_op->read(update_msg.file, (char*)buf, FW_HEAD_LENGTH, &update_msg.file->f_pos); + if (ret < 0) { + GTP_ERROR("Read firmware head in update file error."); + goto load_failed; + } + memcpy(fw_head, buf, FW_HEAD_LENGTH); + + //check firmware legality + fw_checksum = 0; + for(i=0; i<FW_SECTION_LENGTH*4+FW_DSP_ISP_LENGTH+FW_DSP_LENGTH+FW_BOOT_LENGTH; i+=2) { + u16 temp; + ret = update_msg.file->f_op->read(update_msg.file, (char*)buf, 2, &update_msg.file->f_pos); + if (ret < 0) { + GTP_ERROR("Read firmware file error."); + goto load_failed; + } + //GTP_DEBUG("BUF[0]:%x", buf[0]); + temp = (buf[0]<<8) + buf[1]; + fw_checksum += temp; + } + + GTP_DEBUG("firmware checksum:%x", fw_checksum&0xFFFF); + if(fw_checksum&0xFFFF) { + GTP_ERROR("Illegal firmware file."); + goto load_failed; + } + + return SUCCESS; + +load_failed: + set_fs(update_msg.old_fs); + _CLOSE_FILE(update_msg.file); + + return FAIL; +} + + + +static u8 gup_burn_proc(struct i2c_client *client, u8 *burn_buf, u16 start_addr, u16 total_length) +{ + s32 ret = 0; + u16 burn_addr = start_addr; + u16 frame_length = 0; + u16 burn_length = 0; + u8 wr_buf[PACK_SIZE + GTP_ADDR_LENGTH]; + u8 rd_buf[PACK_SIZE + GTP_ADDR_LENGTH]; + u8 retry = 0; + + GTP_DEBUG("Begin burn %dk data to addr 0x%x", (total_length/1024), start_addr); + while(burn_length < total_length) { + GTP_DEBUG("B/T:%04d/%04d", burn_length, total_length); + frame_length = ((total_length - burn_length) > PACK_SIZE) ? PACK_SIZE : (total_length - burn_length); + wr_buf[0] = (u8)(burn_addr>>8); + rd_buf[0] = wr_buf[0]; + wr_buf[1] = (u8)burn_addr; + rd_buf[1] = wr_buf[1]; + memcpy(&wr_buf[GTP_ADDR_LENGTH], &burn_buf[burn_length], frame_length); + + for(retry = 0; retry < MAX_FRAME_CHECK_TIME; retry++) { + ret = gup_i2c_write(client, wr_buf, GTP_ADDR_LENGTH + frame_length); + if(ret <= 0) { + GTP_ERROR("Write frame data i2c error."); + continue; + } + ret = gup_i2c_read(client, rd_buf, GTP_ADDR_LENGTH + frame_length); + if(ret <= 0) { + GTP_ERROR("Read back frame data i2c error."); + continue; + } + + if(memcmp(&wr_buf[GTP_ADDR_LENGTH], &rd_buf[GTP_ADDR_LENGTH], frame_length)) { + GTP_ERROR("Check frame data fail,not equal."); + GTP_DEBUG("write array:"); + GTP_DEBUG_ARRAY(&wr_buf[GTP_ADDR_LENGTH], frame_length); + GTP_DEBUG("read array:"); + GTP_DEBUG_ARRAY(&rd_buf[GTP_ADDR_LENGTH], frame_length); + continue; + } else { + //GTP_DEBUG("Check frame data success."); + break; + } + } + if(retry >= MAX_FRAME_CHECK_TIME) { + GTP_ERROR("Burn frame data time out,exit."); + return FAIL; + } + burn_length += frame_length; + burn_addr += frame_length; + } + return SUCCESS; +} + +static u8 gup_load_section_file(u8* buf, u16 offset, u16 length) +{ + s32 ret = 0; + +#if GTP_HEADER_FW_UPDATE + if (got_file_flag == HEADER_FW_READY) { + memcpy(buf, >p_default_FW[FW_HEAD_LENGTH + offset], length); + return SUCCESS; + } +#endif + if( (update_msg.file == NULL) || IS_ERR(update_msg.file) ) { + GTP_ERROR("cannot find update file,load section file fail."); + return FAIL; + } + update_msg.file->f_pos = FW_HEAD_LENGTH + offset; + + ret = update_msg.file->f_op->read(update_msg.file, (char*)buf, length, &update_msg.file->f_pos); + if(ret < 0) { + GTP_ERROR("Read update file fail."); + return FAIL; + } + + return SUCCESS; +} + +static u8 gup_recall_check(struct i2c_client *client, u8* chk_src, u16 start_rd_addr, u16 chk_length) +{ + u8 rd_buf[PACK_SIZE + GTP_ADDR_LENGTH]; + s32 ret = 0; + u16 recall_addr = start_rd_addr; + u16 recall_length = 0; + u16 frame_length = 0; + + while(recall_length < chk_length) { + frame_length = ((chk_length - recall_length) > PACK_SIZE) ? PACK_SIZE : (chk_length - recall_length); + ret = gup_get_ic_msg(client, recall_addr, rd_buf, frame_length); + if(ret <= 0) { + GTP_ERROR("recall i2c error,exit"); + return FAIL; + } + + if(memcmp(&rd_buf[GTP_ADDR_LENGTH], &chk_src[recall_length], frame_length)) { + GTP_ERROR("Recall frame data fail,not equal."); + GTP_DEBUG("chk_src array:"); + GTP_DEBUG_ARRAY(&chk_src[recall_length], frame_length); + GTP_DEBUG("recall array:"); + GTP_DEBUG_ARRAY(&rd_buf[GTP_ADDR_LENGTH], frame_length); + return FAIL; + } + + recall_length += frame_length; + recall_addr += frame_length; + } + GTP_DEBUG("Recall check %dk firmware success.", (chk_length/1024)); + + return SUCCESS; +} + +static u8 gup_burn_fw_section(struct i2c_client *client, u8 *fw_section, u16 start_addr, u8 bank_cmd ) +{ + s32 ret = 0; + u8 rd_buf[5]; + + //step1:hold ss51 & dsp + ret = gup_set_ic_msg(client, _rRW_MISCTL__SWRST_B0_, 0x0C); + if(ret <= 0) { + GTP_ERROR("[burn_fw_section]hold ss51 & dsp fail."); + return FAIL; + } + + //step2:set scramble + ret = gup_set_ic_msg(client, _rRW_MISCTL__BOOT_OPT_B0_, 0x00); + if(ret <= 0) { + GTP_ERROR("[burn_fw_section]set scramble fail."); + return FAIL; + } + + //step3:select bank + ret = gup_set_ic_msg(client, _bRW_MISCTL__SRAM_BANK, (bank_cmd >> 4)&0x0F); + if(ret <= 0) { + GTP_ERROR("[burn_fw_section]select bank %d fail.", (bank_cmd >> 4)&0x0F); + return FAIL; + } + + //step4:enable accessing code + ret = gup_set_ic_msg(client, _bRW_MISCTL__MEM_CD_EN, 0x01); + if(ret <= 0) { + GTP_ERROR("[burn_fw_section]enable accessing code fail."); + return FAIL; + } + + //step5:burn 8k fw section + ret = gup_burn_proc(client, fw_section, start_addr, FW_SECTION_LENGTH); + if(FAIL == ret) { + GTP_ERROR("[burn_fw_section]burn fw_section fail."); + return FAIL; + } + + //step6:hold ss51 & release dsp + ret = gup_set_ic_msg(client, _rRW_MISCTL__SWRST_B0_, 0x04); + if(ret <= 0) { + GTP_ERROR("[burn_fw_section]hold ss51 & release dsp fail."); + return FAIL; + } + //must delay + msleep(1); + + //step7:send burn cmd to move data to flash from sram + ret = gup_set_ic_msg(client, _rRW_MISCTL__BOOT_CTL_, bank_cmd&0x0f); + if(ret <= 0) { + GTP_ERROR("[burn_fw_section]send burn cmd fail."); + return FAIL; + } + GTP_DEBUG("[burn_fw_section]Wait for the burn is complete......"); + do { + ret = gup_get_ic_msg(client, _rRW_MISCTL__BOOT_CTL_, rd_buf, 1); + if(ret <= 0) { + GTP_ERROR("[burn_fw_section]Get burn state fail"); + return FAIL; + } + msleep(10); + //GTP_DEBUG("[burn_fw_section]Get burn state:%d.", rd_buf[GTP_ADDR_LENGTH]); + } while(rd_buf[GTP_ADDR_LENGTH]); + + //step8:select bank + ret = gup_set_ic_msg(client, _bRW_MISCTL__SRAM_BANK, (bank_cmd >> 4)&0x0F); + if(ret <= 0) { + GTP_ERROR("[burn_fw_section]select bank %d fail.", (bank_cmd >> 4)&0x0F); + return FAIL; + } + + //step9:enable accessing code + ret = gup_set_ic_msg(client, _bRW_MISCTL__MEM_CD_EN, 0x01); + if(ret <= 0) { + GTP_ERROR("[burn_fw_section]enable accessing code fail."); + return FAIL; + } + + //step10:recall 8k fw section + ret = gup_recall_check(client, fw_section, start_addr, FW_SECTION_LENGTH); + if(FAIL == ret) { + GTP_ERROR("[burn_fw_section]recall check 8k firmware fail."); + return FAIL; + } + + //step11:disable accessing code + ret = gup_set_ic_msg(client, _bRW_MISCTL__MEM_CD_EN, 0x00); + if(ret <= 0) { + GTP_ERROR("[burn_fw_section]disable accessing code fail."); + return FAIL; + } + + return SUCCESS; +} + +static u8 gup_burn_dsp_isp(struct i2c_client *client) +{ + s32 ret = 0; + u8* fw_dsp_isp = NULL; + u8 retry = 0; + + GTP_DEBUG("[burn_dsp_isp]Begin burn dsp isp---->>"); + + //step1:alloc memory + GTP_DEBUG("[burn_dsp_isp]step1:alloc memory"); + while(retry++ < 5) { + fw_dsp_isp = (u8*)kzalloc(FW_DSP_ISP_LENGTH, GFP_KERNEL); + if(fw_dsp_isp == NULL) { + continue; + } else { + GTP_INFO("[burn_dsp_isp]Alloc %dk byte memory success.", (FW_DSP_ISP_LENGTH/1024)); + break; + } + } + if(retry >= 5) { + GTP_ERROR("[burn_dsp_isp]Alloc memory fail,exit."); + return FAIL; + } + + //step2:load dsp isp file data + GTP_DEBUG("[burn_dsp_isp]step2:load dsp isp file data"); + ret = gup_load_section_file(fw_dsp_isp, (4*FW_SECTION_LENGTH+FW_DSP_LENGTH+FW_BOOT_LENGTH), FW_DSP_ISP_LENGTH); + if(FAIL == ret) { + GTP_ERROR("[burn_dsp_isp]load firmware dsp_isp fail."); + goto exit_burn_dsp_isp; + } + + //step3:disable wdt,clear cache enable + GTP_DEBUG("[burn_dsp_isp]step3:disable wdt,clear cache enable"); + ret = gup_set_ic_msg(client, _bRW_MISCTL__TMR0_EN, 0x00); + if(ret <= 0) { + GTP_ERROR("[burn_dsp_isp]disable wdt fail."); + ret = FAIL; + goto exit_burn_dsp_isp; + } + ret = gup_set_ic_msg(client, _bRW_MISCTL__CACHE_EN, 0x00); + if(ret <= 0) { + GTP_ERROR("[burn_dsp_isp]clear cache enable fail."); + ret = FAIL; + goto exit_burn_dsp_isp; + } + + //step4:hold ss51 & dsp + GTP_DEBUG("[burn_dsp_isp]step4:hold ss51 & dsp"); + ret = gup_set_ic_msg(client, _rRW_MISCTL__SWRST_B0_, 0x0C); + if(ret <= 0) { + GTP_ERROR("[burn_dsp_isp]hold ss51 & dsp fail."); + ret = FAIL; + goto exit_burn_dsp_isp; + } + + //step5:set boot from sram + GTP_DEBUG("[burn_dsp_isp]step5:set boot from sram"); + ret = gup_set_ic_msg(client, _rRW_MISCTL__BOOTCTL_B0_, 0x02); + if(ret <= 0) { + GTP_ERROR("[burn_dsp_isp]set boot from sram fail."); + ret = FAIL; + goto exit_burn_dsp_isp; + } + + //step6:software reboot + GTP_DEBUG("[burn_dsp_isp]step6:software reboot"); + ret = gup_set_ic_msg(client, _bWO_MISCTL__CPU_SWRST_PULSE, 0x01); + if(ret <= 0) { + GTP_ERROR("[burn_dsp_isp]software reboot fail."); + ret = FAIL; + goto exit_burn_dsp_isp; + } + + //step7:select bank2 + GTP_DEBUG("[burn_dsp_isp]step7:select bank2"); + ret = gup_set_ic_msg(client, _bRW_MISCTL__SRAM_BANK, 0x02); + if(ret <= 0) { + GTP_ERROR("[burn_dsp_isp]select bank2 fail."); + ret = FAIL; + goto exit_burn_dsp_isp; + } + + //step8:enable accessing code + GTP_DEBUG("[burn_dsp_isp]step8:enable accessing code"); + ret = gup_set_ic_msg(client, _bRW_MISCTL__MEM_CD_EN, 0x01); + if(ret <= 0) { + GTP_ERROR("[burn_dsp_isp]enable accessing code fail."); + ret = FAIL; + goto exit_burn_dsp_isp; + } + + //step9:burn 4k dsp_isp + GTP_DEBUG("[burn_dsp_isp]step9:burn 4k dsp_isp"); + ret = gup_burn_proc(client, fw_dsp_isp, 0xC000, FW_DSP_ISP_LENGTH); + if(FAIL == ret) { + GTP_ERROR("[burn_dsp_isp]burn dsp_isp fail."); + goto exit_burn_dsp_isp; + } + + //step10:set scramble + GTP_DEBUG("[burn_dsp_isp]step10:set scramble"); + ret = gup_set_ic_msg(client, _rRW_MISCTL__BOOT_OPT_B0_, 0x00); + if(ret <= 0) { + GTP_ERROR("[burn_dsp_isp]set scramble fail."); + ret = FAIL; + goto exit_burn_dsp_isp; + } + ret = SUCCESS; + +exit_burn_dsp_isp: + kfree(fw_dsp_isp); + return ret; +} + +static u8 gup_burn_fw_ss51(struct i2c_client *client) +{ + u8* fw_ss51 = NULL; + u8 retry = 0; + s32 ret = 0; + + GTP_DEBUG("[burn_fw_ss51]Begin burn ss51 firmware---->>"); + + //step1:alloc memory + GTP_DEBUG("[burn_fw_ss51]step1:alloc memory"); + while(retry++ < 5) { + fw_ss51 = (u8*)kzalloc(FW_SECTION_LENGTH, GFP_KERNEL); + if(fw_ss51 == NULL) { + continue; + } else { + GTP_INFO("[burn_fw_ss51]Alloc %dk byte memory success.", (FW_SECTION_LENGTH/1024)); + break; + } + } + if(retry >= 5) { + GTP_ERROR("[burn_fw_ss51]Alloc memory fail,exit."); + return FAIL; + } + + //step2:load ss51 firmware section 1 file data + GTP_DEBUG("[burn_fw_ss51]step2:load ss51 firmware section 1 file data"); + ret = gup_load_section_file(fw_ss51, 0, FW_SECTION_LENGTH); + if(FAIL == ret) { + GTP_ERROR("[burn_fw_ss51]load ss51 firmware section 1 fail."); + goto exit_burn_fw_ss51; + } + + //step3:clear control flag + GTP_DEBUG("[burn_fw_ss51]step3:clear control flag"); + ret = gup_set_ic_msg(client, _rRW_MISCTL__BOOT_CTL_, 0x00); + if(ret <= 0) { + GTP_ERROR("[burn_fw_ss51]clear control flag fail."); + ret = FAIL; + goto exit_burn_fw_ss51; + } + + //step4:burn ss51 firmware section 1 + GTP_DEBUG("[burn_fw_ss51]step4:burn ss51 firmware section 1"); + ret = gup_burn_fw_section(client, fw_ss51, 0xC000, 0x01); + if(FAIL == ret) { + GTP_ERROR("[burn_fw_ss51]burn ss51 firmware section 1 fail."); + goto exit_burn_fw_ss51; + } + + //step5:load ss51 firmware section 2 file data + GTP_DEBUG("[burn_fw_ss51]step5:load ss51 firmware section 2 file data"); + ret = gup_load_section_file(fw_ss51, FW_SECTION_LENGTH, FW_SECTION_LENGTH); + if(FAIL == ret) { + GTP_ERROR("[burn_fw_ss51]load ss51 firmware section 2 fail."); + goto exit_burn_fw_ss51; + } + + //step6:burn ss51 firmware section 2 + GTP_DEBUG("[burn_fw_ss51]step6:burn ss51 firmware section 2"); + ret = gup_burn_fw_section(client, fw_ss51, 0xE000, 0x02); + if(FAIL == ret) { + GTP_ERROR("[burn_fw_ss51]burn ss51 firmware section 2 fail."); + goto exit_burn_fw_ss51; + } + + //step7:load ss51 firmware section 3 file data + GTP_DEBUG("[burn_fw_ss51]step7:load ss51 firmware section 3 file data"); + ret = gup_load_section_file(fw_ss51, 2*FW_SECTION_LENGTH, FW_SECTION_LENGTH); + if(FAIL == ret) { + GTP_ERROR("[burn_fw_ss51]load ss51 firmware section 3 fail."); + goto exit_burn_fw_ss51; + } + + //step8:burn ss51 firmware section 3 + GTP_DEBUG("[burn_fw_ss51]step8:burn ss51 firmware section 3"); + ret = gup_burn_fw_section(client, fw_ss51, 0xC000, 0x13); + if(FAIL == ret) { + GTP_ERROR("[burn_fw_ss51]burn ss51 firmware section 3 fail."); + goto exit_burn_fw_ss51; + } + + //step9:load ss51 firmware section 4 file data + GTP_DEBUG("[burn_fw_ss51]step9:load ss51 firmware section 4 file data"); + ret = gup_load_section_file(fw_ss51, 3*FW_SECTION_LENGTH, FW_SECTION_LENGTH); + if(FAIL == ret) { + GTP_ERROR("[burn_fw_ss51]load ss51 firmware section 4 fail."); + goto exit_burn_fw_ss51; + } + + //step10:burn ss51 firmware section 4 + GTP_DEBUG("[burn_fw_ss51]step10:burn ss51 firmware section 4"); + ret = gup_burn_fw_section(client, fw_ss51, 0xE000, 0x14); + if(FAIL == ret) { + GTP_ERROR("[burn_fw_ss51]burn ss51 firmware section 4 fail."); + goto exit_burn_fw_ss51; + } + + ret = SUCCESS; + +exit_burn_fw_ss51: + kfree(fw_ss51); + return ret; +} + +static u8 gup_burn_fw_dsp(struct i2c_client *client) +{ + s32 ret = 0; + u8* fw_dsp = NULL; + u8 retry = 0; + u8 rd_buf[5]; + + GTP_DEBUG("[burn_fw_dsp]Begin burn dsp firmware---->>"); + //step1:alloc memory + GTP_DEBUG("[burn_fw_dsp]step1:alloc memory"); + while(retry++ < 5) { + fw_dsp = (u8*)kzalloc(FW_DSP_LENGTH, GFP_KERNEL); + if(fw_dsp == NULL) { + continue; + } else { + GTP_INFO("[burn_fw_dsp]Alloc %dk byte memory success.", (FW_SECTION_LENGTH/1024)); + break; + } + } + if(retry >= 5) { + GTP_ERROR("[burn_fw_dsp]Alloc memory fail,exit."); + return FAIL; + } + + //step2:load firmware dsp + GTP_DEBUG("[burn_fw_dsp]step2:load firmware dsp"); + ret = gup_load_section_file(fw_dsp, 4*FW_SECTION_LENGTH, FW_DSP_LENGTH); + if(FAIL == ret) { + GTP_ERROR("[burn_fw_dsp]load firmware dsp fail."); + goto exit_burn_fw_dsp; + } + + //step3:select bank3 + GTP_DEBUG("[burn_fw_dsp]step3:select bank3"); + ret = gup_set_ic_msg(client, _bRW_MISCTL__SRAM_BANK, 0x03); + if(ret <= 0) { + GTP_ERROR("[burn_fw_dsp]select bank3 fail."); + ret = FAIL; + goto exit_burn_fw_dsp; + } + + //step4:hold ss51 & dsp + GTP_DEBUG("[burn_fw_dsp]step4:hold ss51 & dsp"); + ret = gup_set_ic_msg(client, _rRW_MISCTL__SWRST_B0_, 0x0C); + if(ret <= 0) { + GTP_ERROR("[burn_fw_dsp]hold ss51 & dsp fail."); + ret = FAIL; + goto exit_burn_fw_dsp; + } + + //step5:set scramble + GTP_DEBUG("[burn_fw_dsp]step5:set scramble"); + ret = gup_set_ic_msg(client, _rRW_MISCTL__BOOT_OPT_B0_, 0x00); + if(ret <= 0) { + GTP_ERROR("[burn_fw_dsp]set scramble fail."); + ret = FAIL; + goto exit_burn_fw_dsp; + } + + //step6:release ss51 & dsp + GTP_DEBUG("[burn_fw_dsp]step6:release ss51 & dsp"); + ret = gup_set_ic_msg(client, _rRW_MISCTL__SWRST_B0_, 0x04); //20121211 + if(ret <= 0) { + GTP_ERROR("[burn_fw_dsp]release ss51 & dsp fail."); + ret = FAIL; + goto exit_burn_fw_dsp; + } + //must delay + msleep(1); + + //step7:burn 4k dsp firmware + GTP_DEBUG("[burn_fw_dsp]step7:burn 4k dsp firmware"); + ret = gup_burn_proc(client, fw_dsp, 0x9000, FW_DSP_LENGTH); + if(FAIL == ret) { + GTP_ERROR("[burn_fw_dsp]burn fw_section fail."); + goto exit_burn_fw_dsp; + } + + //step8:send burn cmd to move data to flash from sram + GTP_DEBUG("[burn_fw_dsp]step8:send burn cmd to move data to flash from sram"); + ret = gup_set_ic_msg(client, _rRW_MISCTL__BOOT_CTL_, 0x05); + if(ret <= 0) { + GTP_ERROR("[burn_fw_dsp]send burn cmd fail."); + goto exit_burn_fw_dsp; + } + GTP_DEBUG("[burn_fw_dsp]Wait for the burn is complete......"); + do { + ret = gup_get_ic_msg(client, _rRW_MISCTL__BOOT_CTL_, rd_buf, 1); + if(ret <= 0) { + GTP_ERROR("[burn_fw_dsp]Get burn state fail"); + goto exit_burn_fw_dsp; + } + msleep(10); + //GTP_DEBUG("[burn_fw_dsp]Get burn state:%d.", rd_buf[GTP_ADDR_LENGTH]); + } while(rd_buf[GTP_ADDR_LENGTH]); + + //step9:recall check 4k dsp firmware + GTP_DEBUG("[burn_fw_dsp]step9:recall check 4k dsp firmware"); + ret = gup_recall_check(client, fw_dsp, 0x9000, FW_DSP_LENGTH); + if(FAIL == ret) { + GTP_ERROR("[burn_fw_dsp]recall check 4k dsp firmware fail."); + goto exit_burn_fw_dsp; + } + + ret = SUCCESS; + +exit_burn_fw_dsp: + kfree(fw_dsp); + return ret; +} + +static u8 gup_burn_fw_boot(struct i2c_client *client) +{ + s32 ret = 0; + u8* fw_boot = NULL; + u8 retry = 0; + u8 rd_buf[5]; + + GTP_DEBUG("[burn_fw_boot]Begin burn bootloader firmware---->>"); + + //step1:Alloc memory + GTP_DEBUG("[burn_fw_boot]step1:Alloc memory"); + while(retry++ < 5) { + fw_boot = (u8*)kzalloc(FW_BOOT_LENGTH, GFP_KERNEL); + if(fw_boot == NULL) { + continue; + } else { + GTP_INFO("[burn_fw_boot]Alloc %dk byte memory success.", (FW_BOOT_LENGTH/1024)); + break; + } + } + if(retry >= 5) { + GTP_ERROR("[burn_fw_boot]Alloc memory fail,exit."); + return FAIL; + } + + //step2:load firmware bootloader + GTP_DEBUG("[burn_fw_boot]step2:load firmware bootloader"); + ret = gup_load_section_file(fw_boot, (4*FW_SECTION_LENGTH+FW_DSP_LENGTH), FW_BOOT_LENGTH); + if(FAIL == ret) { + GTP_ERROR("[burn_fw_boot]load firmware dsp fail."); + goto exit_burn_fw_boot; + } + + //step3:hold ss51 & dsp + GTP_DEBUG("[burn_fw_boot]step3:hold ss51 & dsp"); + ret = gup_set_ic_msg(client, _rRW_MISCTL__SWRST_B0_, 0x0C); + if(ret <= 0) { + GTP_ERROR("[burn_fw_boot]hold ss51 & dsp fail."); + ret = FAIL; + goto exit_burn_fw_boot; + } + + //step4:set scramble + GTP_DEBUG("[burn_fw_boot]step4:set scramble"); + ret = gup_set_ic_msg(client, _rRW_MISCTL__BOOT_OPT_B0_, 0x00); + if(ret <= 0) { + GTP_ERROR("[burn_fw_boot]set scramble fail."); + ret = FAIL; + goto exit_burn_fw_boot; + } + + //step5:release ss51 & dsp + GTP_DEBUG("[burn_fw_boot]step5:release ss51 & dsp"); + ret = gup_set_ic_msg(client, _rRW_MISCTL__SWRST_B0_, 0x04); //20121211 + if(ret <= 0) { + GTP_ERROR("[burn_fw_boot]release ss51 & dsp fail."); + ret = FAIL; + goto exit_burn_fw_boot; + } + //must delay + msleep(1); + + //step6:select bank3 + GTP_DEBUG("[burn_fw_boot]step6:select bank3"); + ret = gup_set_ic_msg(client, _bRW_MISCTL__SRAM_BANK, 0x03); + if(ret <= 0) { + GTP_ERROR("[burn_fw_boot]select bank3 fail."); + ret = FAIL; + goto exit_burn_fw_boot; + } + + //step7:burn 2k bootloader firmware + GTP_DEBUG("[burn_fw_boot]step7:burn 2k bootloader firmware"); + ret = gup_burn_proc(client, fw_boot, 0x9000, FW_BOOT_LENGTH); + if(FAIL == ret) { + GTP_ERROR("[burn_fw_boot]burn fw_section fail."); + goto exit_burn_fw_boot; + } + + //step7:send burn cmd to move data to flash from sram + GTP_DEBUG("[burn_fw_boot]step7:send burn cmd to move data to flash from sram"); + ret = gup_set_ic_msg(client, _rRW_MISCTL__BOOT_CTL_, 0x06); + if(ret <= 0) { + GTP_ERROR("[burn_fw_boot]send burn cmd fail."); + goto exit_burn_fw_boot; + } + GTP_DEBUG("[burn_fw_boot]Wait for the burn is complete......"); + do { + ret = gup_get_ic_msg(client, _rRW_MISCTL__BOOT_CTL_, rd_buf, 1); + if(ret <= 0) { + GTP_ERROR("[burn_fw_boot]Get burn state fail"); + goto exit_burn_fw_boot; + } + msleep(10); + //GTP_DEBUG("[burn_fw_boot]Get burn state:%d.", rd_buf[GTP_ADDR_LENGTH]); + } while(rd_buf[GTP_ADDR_LENGTH]); + + //step8:recall check 2k bootloader firmware + GTP_DEBUG("[burn_fw_boot]step8:recall check 2k bootloader firmware"); + ret = gup_recall_check(client, fw_boot, 0x9000, FW_BOOT_LENGTH); + if(FAIL == ret) { + GTP_ERROR("[burn_fw_boot]recall check 4k dsp firmware fail."); + goto exit_burn_fw_boot; + } + + //step9:enable download DSP code + GTP_DEBUG("[burn_fw_boot]step9:enable download DSP code "); + ret = gup_set_ic_msg(client, _rRW_MISCTL__BOOT_CTL_, 0x99); + if(ret <= 0) { + GTP_ERROR("[burn_fw_boot]enable download DSP code fail."); + ret = FAIL; + goto exit_burn_fw_boot; + } + + //step10:release ss51 & hold dsp + GTP_DEBUG("[burn_fw_boot]step10:release ss51 & hold dsp"); + ret = gup_set_ic_msg(client, _rRW_MISCTL__SWRST_B0_, 0x08); + if(ret <= 0) { + GTP_ERROR("[burn_fw_boot]release ss51 & hold dsp fail."); + ret = FAIL; + goto exit_burn_fw_boot; + } + + ret = SUCCESS; + +exit_burn_fw_boot: + kfree(fw_boot); + return ret; +} + +s32 gup_update_proc(void *dir) +{ + s32 ret = 0; + s32 update_ret = FAIL; + u8 retry = 0; + st_fw_head fw_head; + struct goodix_ts_data *ts = NULL; + + GTP_DEBUG("[update_proc]Begin update ......"); + + ts = i2c_get_clientdata(i2c_connect_client); + +#if GTP_AUTO_UPDATE + if (searching_file) { + u8 timeout = 0; + searching_file = 0; // exit .bin update file searching + GTP_INFO("Exiting searching .bin update file..."); + while ((show_len != 200) && (show_len != 100) && (timeout++ < 100)) { // wait for auto update quitted completely + msleep(100); + } + } +#endif + + show_len = 1; + total_len = 100; + +#if GTP_COMPATIBLE_MODE + if (CHIP_TYPE_GT9F == ts->chip_type) { + return gup_fw_download_proc(dir, GTP_FL_FW_BURN); + } +#endif + + update_msg.file = NULL; + ret = gup_check_update_file(i2c_connect_client, &fw_head, (u8*)dir); //20121211 + if(FAIL == ret) { + GTP_ERROR("[update_proc]check update file fail."); + goto file_fail; + } + + ret = gup_get_ic_fw_msg(i2c_connect_client); + if(FAIL == ret) { + GTP_ERROR("[update_proc]get ic message fail."); + goto file_fail; + } + + ret = gup_enter_update_judge(&fw_head); + if(FAIL == ret) { + GTP_ERROR("[update_proc]Check *.bin file fail."); + goto file_fail; + } + + ts->enter_update = 1; + gtp_irq_disable(ts); +#if GTP_ESD_PROTECT + gtp_esd_switch(ts->client, SWITCH_OFF); +#endif + ret = gup_enter_update_mode(i2c_connect_client); + if(FAIL == ret) { + GTP_ERROR("[update_proc]enter update mode fail."); + goto update_fail; + } + + while(retry++ < 5) { + show_len = 10; + total_len = 100; + ret = gup_burn_dsp_isp(i2c_connect_client); + if(FAIL == ret) { + GTP_ERROR("[update_proc]burn dsp isp fail."); + continue; + } + + show_len += 10; + ret = gup_burn_fw_ss51(i2c_connect_client); + if(FAIL == ret) { + GTP_ERROR("[update_proc]burn ss51 firmware fail."); + continue; + } + + show_len += 40; + ret = gup_burn_fw_dsp(i2c_connect_client); + if(FAIL == ret) { + GTP_ERROR("[update_proc]burn dsp firmware fail."); + continue; + } + + show_len += 20; + ret = gup_burn_fw_boot(i2c_connect_client); + if(FAIL == ret) { + GTP_ERROR("[update_proc]burn bootloader firmware fail."); + continue; + } + show_len += 10; + GTP_INFO("[update_proc]UPDATE SUCCESS."); + break; + } + + if (retry >= 5) { + GTP_ERROR("[update_proc]retry timeout,UPDATE FAIL."); + update_ret = FAIL; + } else { + update_ret = SUCCESS; + } + +update_fail: + if (got_file_flag & BIN_FILE_READY) { + if (update_msg.old_fs) { + set_fs(update_msg.old_fs); + } + } + GTP_DEBUG("[update_proc]leave update mode."); + gup_leave_update_mode(); + + if (SUCCESS == update_ret) { + if (ts->fw_error) { + GTP_INFO("firmware error auto update, resent config!"); + gup_init_panel(ts); + } else { + GTP_DEBUG("[update_proc]send config."); + ret = gtp_send_cfg(i2c_connect_client); + if (ret < 0) { + GTP_ERROR("[update_proc]send config fail."); + } else { + msleep(100); + } + } + } + ts->enter_update = 0; + gtp_irq_enable(ts); + +#if GTP_ESD_PROTECT + gtp_esd_switch(ts->client, SWITCH_ON); +#endif + +file_fail: + _CLOSE_FILE(update_msg.file); + +#if (GTP_AUTO_UPDATE && GTP_AUTO_UPDATE_CFG && GTP_HEADER_FW_UPDATE) + if (NULL == dir) { + gup_search_file(AUTO_SEARCH_CFG); + if (got_file_flag & CFG_FILE_READY) { + ret = gup_update_config(i2c_connect_client); + if(ret <= 0) { + GTP_ERROR("Update config failed."); + } + _CLOSE_FILE(update_msg.cfg_file); + msleep(500); //waiting config to be stored in FLASH. + } + } +#endif + + total_len = 100; + if (SUCCESS == update_ret) { + show_len = 100; + return SUCCESS; + } else { + show_len = 200; + return FAIL; + } +} + +#if GTP_AUTO_UPDATE +u8 gup_init_update_proc(struct goodix_ts_data *ts) +{ + struct task_struct *thread = NULL; + + GTP_INFO("Ready to run update thread."); + +#if GTP_COMPATIBLE_MODE + if (CHIP_TYPE_GT9F == ts->chip_type) { + thread = kthread_run(gup_update_proc, "update", "fl update"); + } else +#endif + { + thread = kthread_run(gup_update_proc, (void*)NULL, "guitar_update"); + } + if (IS_ERR(thread)) { + GTP_ERROR("Failed to create update thread.\n"); + return -1; + } + + return 0; +} +#endif + + +//************************** For GT9XXF Start ***********************// +#define FW_DOWNLOAD_LENGTH 0x4000 +#define FW_SS51_SECTION_LEN 0x2000 // 4 section, each 8k +#define FL_PACK_SIZE 1024 +#define GUP_FW_CHK_SIZE FL_PACK_SIZE //FL_PACK_SIZE + +#define FL_UPDATE_PATH "/data/_fl_update_.bin" +#define FL_UPDATE_PATH_SD "/sdcard/_fl_update_.bin" +//for clk cal +#define PULSE_LENGTH (200) +#define INIT_CLK_DAC (50) +#define MAX_CLK_DAC (120) +#define CLK_AVG_TIME (1) +#define MILLION 1000000 + +#define _wRW_MISCTL__RG_DMY 0x4282 +#define _bRW_MISCTL__RG_OSC_CALIB 0x4268 +#define _fRW_MISCTL__GIO0 0x41e9 +#define _fRW_MISCTL__GIO1 0x41ed +#define _fRW_MISCTL__GIO2 0x41f1 +#define _fRW_MISCTL__GIO3 0x41f5 +#define _fRW_MISCTL__GIO4 0x41f9 +#define _fRW_MISCTL__GIO5 0x41fd +#define _fRW_MISCTL__GIO6 0x4201 +#define _fRW_MISCTL__GIO7 0x4205 +#define _fRW_MISCTL__GIO8 0x4209 +#define _fRW_MISCTL__GIO9 0x420d +#define _fRW_MISCTL__MEA 0x41a0 +#define _bRW_MISCTL__MEA_MODE 0x41a1 +#define _wRW_MISCTL__MEA_MAX_NUM 0x41a4 +#define _dRO_MISCTL__MEA_VAL 0x41b0 +#define _bRW_MISCTL__MEA_SRCSEL 0x41a3 +#define _bRO_MISCTL__MEA_RDY 0x41a8 +#define _rRW_MISCTL__ANA_RXADC_B0_ 0x4250 +#define _bRW_MISCTL__RG_LDO_A18_PWD 0x426f +#define _bRW_MISCTL__RG_BG_PWD 0x426a +#define _bRW_MISCTL__RG_CLKGEN_PWD 0x4269 +#define _fRW_MISCTL__RG_RXADC_PWD 0x426a +#define _bRW_MISCTL__OSC_CK_SEL 0x4030 +#define _rRW_MISCTL_RG_DMY83 0x4283 +#define _rRW_MISCTL__GIO1CTL_B2_ 0x41ee +#define _rRW_MISCTL__GIO1CTL_B1_ 0x41ed + + +#if GTP_COMPATIBLE_MODE + +u8 i2c_opr_buf[GTP_ADDR_LENGTH + FL_PACK_SIZE] = {0}; +u8 chk_cmp_buf[FL_PACK_SIZE] = {0}; + +extern s32 gtp_fw_startup(struct i2c_client *client); +static u8 gup_download_fw_dsp(struct i2c_client *client, u8 dwn_mode); +static s32 gup_burn_fw_proc(struct i2c_client *client, u16 start_addr, s32 start_index, s32 burn_len); +static s32 gup_check_and_repair(struct i2c_client *client, u16 start_addr, s32 start_index, s32 chk_len); + + +u8 gup_check_fs_mounted(char *path_name) +{ + struct path root_path; + struct path path; + int err; + err = kern_path("/", LOOKUP_FOLLOW, &root_path); + + if (err) { + GTP_DEBUG("\"/\" NOT Mounted: %d", err); + return FAIL; + } + err = kern_path(path_name, LOOKUP_FOLLOW, &path); + + if (err) { + GTP_DEBUG("%s NOT Mounted: %d", path_name, err); + return FAIL; + } + +#if 1 + return SUCCESS; +#else + if (path.mnt->mnt_sb == root_path.mnt->mnt_sb) { + //-- not mounted + return FAIL; + } else { + return SUCCESS; + } +#endif +} + +s32 i2c_write_bytes(struct i2c_client *client, u16 addr, u8 *buf, s32 len) +{ + s32 ret = 0; + s32 write_bytes = 0; + s32 retry = 0; + u8 *tx_buf = buf; + + while (len > 0) { + i2c_opr_buf[0] = (u8)(addr >> 8); + i2c_opr_buf[1] = (u8)(addr & 0xFF); + if (len > FL_PACK_SIZE) { + write_bytes = FL_PACK_SIZE; + } else { + write_bytes = len; + } + memcpy(i2c_opr_buf + 2, tx_buf, write_bytes); + for (retry = 0; retry < 5; ++retry) { + ret = gup_i2c_write(client, i2c_opr_buf, write_bytes + GTP_ADDR_LENGTH); + if (ret == 1) { + break; + } + } + if (retry >= 5) { + GTP_ERROR("retry timeout, I2C write 0x%04X %d bytes failed!", addr, write_bytes); + return -1; + } + addr += write_bytes; + len -= write_bytes; + tx_buf += write_bytes; + } + + return 1; +} + +s32 i2c_read_bytes(struct i2c_client *client, u16 addr, u8 *buf, s32 len) +{ + s32 ret = 0; + s32 read_bytes = 0; + s32 retry = 0; + u8 *tx_buf = buf; + + while (len > 0) { + i2c_opr_buf[0] = (u8)(addr >> 8); + i2c_opr_buf[1] = (u8)(addr & 0xFF); + if (len > FL_PACK_SIZE) { + read_bytes = FL_PACK_SIZE; + } else { + read_bytes = len; + } + for (retry = 0; retry < 5; ++retry) { + ret = gup_i2c_read(client, i2c_opr_buf, read_bytes + GTP_ADDR_LENGTH); + if (ret == 2) { + break; + } + } + if (retry >= 5) { + GTP_ERROR("retry timeout, I2C read 0x%04X %d bytes failed!", addr, read_bytes); + return -1; + } + memcpy(tx_buf, i2c_opr_buf + 2, read_bytes); + addr += read_bytes; + len -= read_bytes; + tx_buf += read_bytes; + } + return 2; +} + + + +// main clock calibration +// bit: 0~7, val: 0/1 +static void gup_bit_write(s32 addr, s32 bit, s32 val) +{ + u8 buf; + i2c_read_bytes(i2c_connect_client, addr, &buf, 1); + + buf = (buf & (~((u8)1 << bit))) | ((u8)val << bit); + + i2c_write_bytes(i2c_connect_client, addr, &buf, 1); +} + +static void gup_clk_count_init(s32 bCh, s32 bCNT) +{ + u8 buf; + + //_fRW_MISCTL__MEA_EN = 0; //Frequency measure enable + gup_bit_write(_fRW_MISCTL__MEA, 0, 0); + //_fRW_MISCTL__MEA_CLR = 1; //Frequency measure clear + gup_bit_write(_fRW_MISCTL__MEA, 1, 1); + //_bRW_MISCTL__MEA_MODE = 0; //Pulse mode + buf = 0; + i2c_write_bytes(i2c_connect_client, _bRW_MISCTL__MEA_MODE, &buf, 1); + //_bRW_MISCTL__MEA_SRCSEL = 8 + bCh; //From GIO1 + buf = 8 + bCh; + i2c_write_bytes(i2c_connect_client, _bRW_MISCTL__MEA_SRCSEL, &buf, 1); + //_wRW_MISCTL__MEA_MAX_NUM = bCNT; //Set the Measure Counts = 1 + buf = bCNT; + i2c_write_bytes(i2c_connect_client, _wRW_MISCTL__MEA_MAX_NUM, &buf, 1); + //_fRW_MISCTL__MEA_CLR = 0; //Frequency measure not clear + gup_bit_write(_fRW_MISCTL__MEA, 1, 0); + //_fRW_MISCTL__MEA_EN = 1; + gup_bit_write(_fRW_MISCTL__MEA, 0, 1); +} + +static u32 gup_clk_count_get(void) +{ + s32 ready = 0; + s32 temp; + s8 buf[4]; + + while ((ready == 0)) { //Wait for measurement complete + i2c_read_bytes(i2c_connect_client, _bRO_MISCTL__MEA_RDY, buf, 1); + ready = buf[0]; + } + + msleep(50); + + //_fRW_MISCTL__MEA_EN = 0; + gup_bit_write(_fRW_MISCTL__MEA, 0, 0); + i2c_read_bytes(i2c_connect_client, _dRO_MISCTL__MEA_VAL, buf, 4); + GTP_DEBUG("Clk_count 0: %2X", buf[0]); + GTP_DEBUG("Clk_count 1: %2X", buf[1]); + GTP_DEBUG("Clk_count 2: %2X", buf[2]); + GTP_DEBUG("Clk_count 3: %2X", buf[3]); + + temp = (s32)buf[0] + ((s32)buf[1] << 8) + ((s32)buf[2] << 16) + ((s32)buf[3] << 24); + GTP_INFO("Clk_count : %d", temp); + return temp; +} +u8 gup_clk_dac_setting(int dac) +{ + s8 buf1, buf2; + + i2c_read_bytes(i2c_connect_client, _wRW_MISCTL__RG_DMY, &buf1, 1); + i2c_read_bytes(i2c_connect_client, _bRW_MISCTL__RG_OSC_CALIB, &buf2, 1); + + buf1 = (buf1 & 0xFFCF) | ((dac & 0x03) << 4); + buf2 = (dac >> 2) & 0x3f; + + i2c_write_bytes(i2c_connect_client, _wRW_MISCTL__RG_DMY, &buf1, 1); + i2c_write_bytes(i2c_connect_client, _bRW_MISCTL__RG_OSC_CALIB, &buf2, 1); + + return 0; +} + +static u8 gup_clk_calibration_pin_select(s32 bCh) +{ + s32 i2c_addr; + + switch (bCh) { + case 0: + i2c_addr = _fRW_MISCTL__GIO0; + break; + + case 1: + i2c_addr = _fRW_MISCTL__GIO1; + break; + + case 2: + i2c_addr = _fRW_MISCTL__GIO2; + break; + + case 3: + i2c_addr = _fRW_MISCTL__GIO3; + break; + + case 4: + i2c_addr = _fRW_MISCTL__GIO4; + break; + + case 5: + i2c_addr = _fRW_MISCTL__GIO5; + break; + + case 6: + i2c_addr = _fRW_MISCTL__GIO6; + break; + + case 7: + i2c_addr = _fRW_MISCTL__GIO7; + break; + + case 8: + i2c_addr = _fRW_MISCTL__GIO8; + break; + + case 9: + i2c_addr = _fRW_MISCTL__GIO9; + break; + } + + gup_bit_write(i2c_addr, 1, 0); + + return 0; +} + +void gup_output_pulse(int t) +{ + unsigned long flags; + //s32 i; + + GTP_GPIO_OUTPUT(GTP_INT_PORT, 0); + msleep(10); + + local_irq_save(flags); + + GTP_GPIO_OUTPUT(GTP_INT_PORT, 1); + msleep(50); + GTP_GPIO_OUTPUT(GTP_INT_PORT, 0); + msleep(t - 50); + GTP_GPIO_OUTPUT(GTP_INT_PORT, 1); + + local_irq_restore(flags); + + msleep(20); + GTP_GPIO_OUTPUT(GTP_INT_PORT, 0); +} + +static void gup_sys_clk_init(void) +{ + u8 buf; + + //_fRW_MISCTL__RG_RXADC_CKMUX = 0; + gup_bit_write(_rRW_MISCTL__ANA_RXADC_B0_, 5, 0); + //_bRW_MISCTL__RG_LDO_A18_PWD = 0; //DrvMISCTL_A18_PowerON + buf = 0; + i2c_write_bytes(i2c_connect_client, _bRW_MISCTL__RG_LDO_A18_PWD, &buf, 1); + //_bRW_MISCTL__RG_BG_PWD = 0; //DrvMISCTL_BG_PowerON + buf = 0; + i2c_write_bytes(i2c_connect_client, _bRW_MISCTL__RG_BG_PWD, &buf, 1); + //_bRW_MISCTL__RG_CLKGEN_PWD = 0; //DrvMISCTL_CLKGEN_PowerON + buf = 0; + i2c_write_bytes(i2c_connect_client, _bRW_MISCTL__RG_CLKGEN_PWD, &buf, 1); + //_fRW_MISCTL__RG_RXADC_PWD = 0; //DrvMISCTL_RX_ADC_PowerON + gup_bit_write(_rRW_MISCTL__ANA_RXADC_B0_, 0, 0); + //_fRW_MISCTL__RG_RXADC_REF_PWD = 0; //DrvMISCTL_RX_ADCREF_PowerON + gup_bit_write(_rRW_MISCTL__ANA_RXADC_B0_, 1, 0); + //gup_clk_dac_setting(60); + //_bRW_MISCTL__OSC_CK_SEL = 1;; + buf = 1; + i2c_write_bytes(i2c_connect_client, _bRW_MISCTL__OSC_CK_SEL, &buf, 1); +} + +s32 gup_clk_calibration(void) +{ + u8 buf; + //u8 trigger; + s32 i; + struct timeval start, end; + s32 count; + s32 count_ref; + s32 sec; + s32 usec; + //unsigned long flags; + struct goodix_ts_data *ts; + + buf = 0x0C; // hold ss51 and dsp + i2c_write_bytes(i2c_connect_client, _rRW_MISCTL__SWRST_B0_, &buf, 1); + + //_fRW_MISCTL__CLK_BIAS = 0; //disable clock bias + gup_bit_write(_rRW_MISCTL_RG_DMY83, 7, 0); + + //_fRW_MISCTL__GIO1_PU = 0; //set TOUCH INT PIN MODE as input + gup_bit_write(_rRW_MISCTL__GIO1CTL_B2_, 0, 0); + + //_fRW_MISCTL__GIO1_OE = 0; //set TOUCH INT PIN MODE as input + gup_bit_write(_rRW_MISCTL__GIO1CTL_B1_, 1, 0); + + //buf = 0x00; + //i2c_write_bytes(i2c_connect_client, _rRW_MISCTL__SWRST_B0_, &buf, 1); + //msleep(1000); + + GTP_INFO("CLK calibration GO"); + gup_sys_clk_init(); + gup_clk_calibration_pin_select(1);//use GIO1 to do the calibration + + GTP_GPIO_OUTPUT(GTP_INT_PORT, 0); + + ts = i2c_get_clientdata(i2c_connect_client); + + for (i = INIT_CLK_DAC; i < MAX_CLK_DAC; i++) { + GTP_INFO("CLK calibration DAC %d", i); + + if (ts->gtp_is_suspend) { + i = 80; // if sleeping while calibrating main clock, set it default 80 + break; + } + + gup_clk_dac_setting(i); + gup_clk_count_init(1, CLK_AVG_TIME); + +#if 0 + gup_output_pulse(PULSE_LENGTH); + count = gup_clk_count_get(); + + if (count > PULSE_LENGTH * 60) { //60= 60Mhz * 1us + break; + } + +#else + GTP_GPIO_OUTPUT(GTP_INT_PORT, 0); + + //local_irq_save(flags); + do_gettimeofday(&start); + GTP_GPIO_OUTPUT(GTP_INT_PORT, 1); + //local_irq_restore(flags); + + msleep(1); + GTP_GPIO_OUTPUT(GTP_INT_PORT, 0); + msleep(1); + + //local_irq_save(flags); + do_gettimeofday(&end); + GTP_GPIO_OUTPUT(GTP_INT_PORT, 1); + //local_irq_restore(flags); + + count = gup_clk_count_get(); + msleep(20); + GTP_GPIO_OUTPUT(GTP_INT_PORT, 0); + + usec = end.tv_usec - start.tv_usec; + sec = end.tv_sec - start.tv_sec; + count_ref = 60 * (usec+ sec * MILLION);//60= 60Mhz * 1us + + GTP_DEBUG("== time %d, %d, %d", sec, usec, count_ref); + + if (count > count_ref) { + GTP_DEBUG("== count_diff %d", count - count_ref); + break; + } + +#endif + } + + //clk_dac = i; + + gtp_reset_guitar(i2c_connect_client, 20); + +#if 0//for debug + //-- ouput clk to GPIO 4 + buf = 0x00; + i2c_write_bytes(i2c_connect_client, 0x41FA, &buf, 1); + buf = 0x00; + i2c_write_bytes(i2c_connect_client, 0x4104, &buf, 1); + buf = 0x00; + i2c_write_bytes(i2c_connect_client, 0x4105, &buf, 1); + buf = 0x00; + i2c_write_bytes(i2c_connect_client, 0x4106, &buf, 1); + buf = 0x01; + i2c_write_bytes(i2c_connect_client, 0x4107, &buf, 1); + buf = 0x06; + i2c_write_bytes(i2c_connect_client, 0x41F8, &buf, 1); + buf = 0x02; + i2c_write_bytes(i2c_connect_client, 0x41F9, &buf, 1); +#endif + + GTP_GPIO_AS_INT(GTP_INT_PORT); + return i; +} + + + +s32 gup_hold_ss51_dsp(struct i2c_client *client) +{ + s32 ret = -1; + s32 retry = 0; + u8 rd_buf[3]; + + while(retry++ < 200) { + // step4:Hold ss51 & dsp + ret = gup_set_ic_msg(client, _rRW_MISCTL__SWRST_B0_, 0x0C); + if(ret <= 0) { + GTP_DEBUG("Hold ss51 & dsp I2C error,retry:%d", retry); + continue; + } + + // step5:Confirm hold + ret = gup_get_ic_msg(client, _rRW_MISCTL__SWRST_B0_, rd_buf, 1); + if (ret <= 0) { + GTP_DEBUG("Hold ss51 & dsp I2C error,retry:%d", retry); + continue; + } + if (0x0C == rd_buf[GTP_ADDR_LENGTH]) { + GTP_DEBUG("[enter_update_mode]Hold ss51 & dsp confirm SUCCESS"); + break; + } + GTP_DEBUG("Hold ss51 & dsp confirm 0x4180 failed,value:%d", rd_buf[GTP_ADDR_LENGTH]); + } + if(retry >= 200) { + GTP_ERROR("Enter update Hold ss51 failed."); + return FAIL; + } + //DSP_CK and DSP_ALU_CK PowerOn + ret = gup_set_ic_msg(client, 0x4010, 0x00); + if (ret <= 0) { + GTP_ERROR("[enter_update_mode]DSP_CK and DSP_ALU_CK PowerOn fail."); + return FAIL; + } + + //disable wdt + ret = gup_set_ic_msg(client, _bRW_MISCTL__TMR0_EN, 0x00); + + if (ret <= 0) { + GTP_ERROR("[enter_update_mode]disable wdt fail."); + return FAIL; + } + + //clear cache enable + ret = gup_set_ic_msg(client, _bRW_MISCTL__CACHE_EN, 0x00); + + if (ret <= 0) { + GTP_ERROR("[enter_update_mode]clear cache enable fail."); + return FAIL; + } + + //set boot from sram + ret = gup_set_ic_msg(client, _rRW_MISCTL__BOOTCTL_B0_, 0x02); + + if (ret <= 0) { + GTP_ERROR("[enter_update_mode]set boot from sram fail."); + return FAIL; + } + + //software reboot + ret = gup_set_ic_msg(client, _bWO_MISCTL__CPU_SWRST_PULSE, 0x01); + if (ret <= 0) { + GTP_ERROR("[enter_update_mode]software reboot fail."); + return FAIL; + } + + return SUCCESS; +} + +s32 gup_enter_update_mode_fl(struct i2c_client *client) +{ + s32 ret = -1; + //s32 retry = 0; + //u8 rd_buf[3]; + + //step1:RST output low last at least 2ms + GTP_GPIO_OUTPUT(GTP_RST_PORT, 0); + msleep(2); + + //step2:select I2C slave addr,INT:0--0xBA;1--0x28. + GTP_GPIO_OUTPUT(GTP_INT_PORT, (client->addr == 0x14)); + msleep(2); + + //step3:RST output high reset guitar + GTP_GPIO_OUTPUT(GTP_RST_PORT, 1); + + msleep(5); + + //select addr & hold ss51_dsp + ret = gup_hold_ss51_dsp(client); + if (ret <= 0) { + GTP_ERROR("[enter_update_mode]hold ss51 & dsp failed."); + return FAIL; + } + + //clear control flag + ret = gup_set_ic_msg(client, _rRW_MISCTL__BOOT_CTL_, 0x00); + + if (ret <= 0) { + GTP_ERROR("[enter_update_mode]clear control flag fail."); + return FAIL; + } + + //set scramble + ret = gup_set_ic_msg(client, _rRW_MISCTL__BOOT_OPT_B0_, 0x00); + + if (ret <= 0) { + GTP_ERROR("[enter_update_mode]set scramble fail."); + return FAIL; + } + + //enable accessing code + ret = gup_set_ic_msg(client, _bRW_MISCTL__MEM_CD_EN, 0x01); + + if (ret <= 0) { + GTP_ERROR("[enter_update_mode]enable accessing code fail."); + return FAIL; + } + + return SUCCESS; +} + +static u8 gup_download_fw_dsp(struct i2c_client *client, u8 dwn_mode) +{ + s32 ret = 0; + + //step1:select bank2 + GTP_DEBUG("[download_fw_dsp]step1:select bank2"); + ret = gup_set_ic_msg(client, _bRW_MISCTL__SRAM_BANK, 0x02); + if (ret == FAIL) { + GTP_ERROR("select bank 2 fail"); + return FAIL; + } + + if (GTP_FL_FW_BURN == dwn_mode) { + GTP_INFO("[download_fw_dsp]Begin download dsp fw---->>"); + + if (ret <= 0) { + GTP_ERROR("[download_fw_dsp]select bank2 fail."); + return FAIL; + } + GTP_DEBUG("burn fw dsp"); + ret = gup_burn_fw_proc(client, 0xC000, 2 * FW_DOWNLOAD_LENGTH, FW_DSP_LENGTH); // write the second ban + if (FAIL == ret) { + GTP_ERROR("[download_fw_dsp]download FW dsp fail."); + return FAIL; + } + GTP_INFO("check firmware dsp"); + ret = gup_check_and_repair(client, 0xC000, 2 * FW_DOWNLOAD_LENGTH, FW_DSP_LENGTH); + if (FAIL == ret) { + GTP_ERROR("check fw dsp failed!"); + return FAIL; + } + } else if (GTP_FL_ESD_RECOVERY == dwn_mode) { + GTP_INFO("[download_fw_dsp]Begin esd check dsp fw---->>"); + //GTP_INFO("esd recovery: check fw dsp"); + //ret = gup_check_and_repair(client, 0xC000, 2 * FW_DOWNLOAD_LENGTH, FW_DSP_LENGTH); + + //if(FAIL == ret) + { + //GTP_ERROR("[download_fw_dsp]Checked FW dsp fail, redownload fw dsp"); + GTP_INFO("esd recovery redownload firmware dsp code"); + ret = gup_burn_fw_proc(client, 0xC000, 2 * FW_DOWNLOAD_LENGTH, FW_DSP_LENGTH); + if (FAIL == ret) { + GTP_ERROR("redownload fw dsp failed!"); + return FAIL; + } + } + } else { + //msleep(100); + GTP_INFO("check firmware dsp"); + ret = gup_check_and_repair(client, 0xC000, 2 * FW_DOWNLOAD_LENGTH, FW_DSP_LENGTH); + if (FAIL == ret) { + GTP_ERROR("check fw dsp failed!"); + return FAIL; + } + } + return SUCCESS; +} + +static s32 gup_burn_fw_proc(struct i2c_client *client, u16 start_addr, s32 start_index, s32 burn_len) +{ + s32 ret = 0; + + GTP_DEBUG("burn firmware: 0x%04X, %d bytes, start_index: 0x%04X", start_addr, burn_len, start_index); + + ret = i2c_write_bytes(client, start_addr, (u8*)>p_default_FW_fl[FW_HEAD_LENGTH + start_index], burn_len); + if (ret < 0) { + GTP_ERROR("burn 0x%04X, %d bytes failed!", start_addr, burn_len); + return FAIL; + } + return SUCCESS; +} + +static s32 gup_check_and_repair(struct i2c_client *client, u16 start_addr, s32 start_index, s32 chk_len) +{ + s32 ret = 0; + s32 cmp_len = 0; + u16 cmp_addr = start_addr; + s32 i = 0; + s32 chked_times = 0; + u8 chk_fail = 0; + + GTP_DEBUG("check firmware: start 0x%04X, %d bytes", start_addr, chk_len); + while ((chk_len > 0) && (chked_times < GTP_CHK_FW_MAX)) { + if (chk_len >= GUP_FW_CHK_SIZE) { + cmp_len = GUP_FW_CHK_SIZE; + } else { + cmp_len = chk_len; + } + ret = i2c_read_bytes(client, cmp_addr, chk_cmp_buf, cmp_len); + if (ret < 0) { + chk_fail = 1; + break; + } + for (i = 0; i < cmp_len; ++i) { + if (chk_cmp_buf[i] != gtp_default_FW_fl[FW_HEAD_LENGTH + start_index +i]) { + chk_fail = 1; + i2c_write_bytes(client, cmp_addr+i, >p_default_FW_fl[FW_HEAD_LENGTH + start_index + i], cmp_len-i); + GTP_ERROR("Check failed index: %d(%d != %d), redownload chuck", i, chk_cmp_buf[i], + gtp_default_FW_fl[FW_HEAD_LENGTH + start_index +i]); + break; + } + } + if (chk_fail == 1) { + chk_fail = 0; + chked_times++; + } else { + cmp_addr += cmp_len; + start_index += cmp_len; + chk_len -= cmp_len; + } + } + if (chk_len > 0) { + GTP_ERROR("cmp_addr: 0x%04X, start_index: 0x%02X, chk_len: 0x%04X", cmp_addr, + start_index, chk_len); + return FAIL; + } + return SUCCESS; +} + +static u8 gup_download_fw_ss51(struct i2c_client *client, u8 dwn_mode) +{ + s32 section = 0; + s32 ret = 0; + s32 start_index = 0; + u8 bank = 0; + u16 burn_addr = 0xC000; + + if (GTP_FL_FW_BURN == dwn_mode) { + GTP_INFO("download firmware ss51"); + } else { + GTP_INFO("check firmware ss51"); + } + for (section = 1; section <= 4; section += 2) { + switch (section) { + case 1: + bank = 0x00; + burn_addr = (section - 1) * FW_SS51_SECTION_LEN + 0xC000; + break; + case 3: + bank = 0x01; + burn_addr = (section - 3) * FW_SS51_SECTION_LEN + 0xC000; + break; + } + start_index = (section - 1) * FW_SS51_SECTION_LEN; + + GTP_DEBUG("download firmware ss51: select bank%d", bank); + ret = gup_set_ic_msg(client, _bRW_MISCTL__SRAM_BANK, bank); + if (GTP_FL_FW_BURN == dwn_mode) { + GTP_INFO("download firmware ss51 section%d & %d", section, section+1); + ret = gup_burn_fw_proc(client, burn_addr, start_index, 2 * FW_SS51_SECTION_LEN); + if (ret == FAIL) { + GTP_ERROR("download fw ss51 section%d & %d failed!", section, section+1); + return FAIL; + } + GTP_INFO("check firmware ss51 section%d & %d", section, section+1); + ret = gup_check_and_repair(client, burn_addr, start_index, 2 * FW_SS51_SECTION_LEN); + if (ret == FAIL) { + GTP_ERROR("check ss51 section%d & %d failed!", section, section+1); + return FAIL; + } + } else if (GTP_FL_ESD_RECOVERY == dwn_mode) { // esd recovery mode + // GTP_INFO("esd recovery check ss51 section%d & %d", section, section+1); + // ret = gup_check_and_repair(client, burn_addr, start_index, FW_SS51_SECTION_LEN); + // if (ret == FAIL) + { + // GTP_ERROR("check ss51 section%d failed, redownload section%d", section, section); + GTP_INFO("esd recovery redownload ss51 section%d & %d", section, section+1); + ret = gup_burn_fw_proc(client, burn_addr, start_index, 2 * FW_SS51_SECTION_LEN); + if (ret == FAIL) { + GTP_ERROR("download fw ss51 section%d failed!", section); + return FAIL; + } + } + } else { + GTP_INFO("check firmware ss51 section%d & %d", section, section+1); + ret = gup_check_and_repair(client, burn_addr, start_index, 2 * FW_SS51_SECTION_LEN); + if (ret == FAIL) { + GTP_ERROR("check ss51 section%d & %d failed!", section, section+1); + return FAIL; + } + } + } + + return SUCCESS; +} + + +static s32 gup_prepare_fl_fw(char *path, st_fw_head *fw_head) +{ + s32 ret = 0; + s32 i = 0; + s32 timeout = 0; + struct goodix_ts_data *ts = i2c_get_clientdata(i2c_connect_client); + + if (!memcmp(path, "update", 6)) { + GTP_INFO("Search for GT9XXF firmware file to update"); + + searching_file = 1; + for (i = 0; i < GUP_SEARCH_FILE_TIMES; ++i) { + if (0 == searching_file) { + GTP_INFO("Force terminate auto update for GT9XXF..."); + return FAIL; + } + GTP_DEBUG("Search for %s, %s for fw update.(%d/%d)", FL_UPDATE_PATH, FL_UPDATE_PATH_SD, i+1, GUP_SEARCH_FILE_TIMES); + update_msg.file = filp_open(FL_UPDATE_PATH, O_RDONLY, 0); + if (IS_ERR(update_msg.file)) { + update_msg.file = filp_open(FL_UPDATE_PATH_SD, O_RDONLY, 0); + if (IS_ERR(update_msg.file)) { + msleep(3000); + continue; + } else { + path = FL_UPDATE_PATH_SD; + break; + } + } else { + path = FL_UPDATE_PATH; + break; + } + } + searching_file = 0; + if (i == 50) { + GTP_INFO("Search timeout, update aborted"); + return FAIL; + } else { + GTP_INFO("GT9XXF firmware file %s found!", path); + _CLOSE_FILE(update_msg.file); + } + while (ts->rqst_processing && (timeout++ < 5)) { + GTP_DEBUG("request processing, waiting for accomplishment"); + msleep(1000); + } + } + GTP_INFO("Firmware update file path: %s", path); + + update_msg.file = filp_open(path, O_RDONLY, 0); + + if (IS_ERR(update_msg.file)) { + GTP_ERROR("Open update file(%s) error!", path); + return FAIL; + } + ret = gup_get_ic_fw_msg(i2c_connect_client); + if (FAIL == ret) { + GTP_ERROR("failed to get ic firmware info"); + _CLOSE_FILE(update_msg.file); + return FAIL; + } + + update_msg.old_fs = get_fs(); + set_fs(KERNEL_DS); + update_msg.file->f_op->llseek(update_msg.file, 0, SEEK_SET); + update_msg.file->f_op->read(update_msg.file, (char*)fw_head, FW_HEAD_LENGTH, &update_msg.file->f_pos); + + update_msg.force_update = 0xBE; // GT9XXF ignore the 0xBE + + ret = gup_enter_update_judge(fw_head); + if (FAIL == ret) { + set_fs(update_msg.old_fs); + _CLOSE_FILE(update_msg.file); + return FAIL; + } + + update_msg.file->f_op->llseek(update_msg.file, 0, SEEK_SET); + ret = update_msg.file->f_op->read(update_msg.file, (char*)gtp_default_FW_fl, + FW_HEAD_LENGTH+2*FW_DOWNLOAD_LENGTH+FW_DSP_LENGTH, + &update_msg.file->f_pos); + set_fs(update_msg.old_fs); + _CLOSE_FILE(update_msg.file); + + if (ret < 0) { + GTP_ERROR("read %s failed, err-code: %d", path, ret); + return FAIL; + } + return SUCCESS; +} +static u8 gup_check_update_file_fl(struct i2c_client *client, st_fw_head* fw_head, char* path) +{ + s32 ret = 0; + s32 i = 0; + s32 fw_checksum = 0; + + if (NULL != path) { + ret = gup_prepare_fl_fw(path, fw_head); + if (FAIL == ret) { + return FAIL; + } + } else { + memcpy(fw_head, gtp_default_FW_fl, FW_HEAD_LENGTH); + GTP_INFO("FILE HARDWARE INFO: %02x%02x%02x%02x", fw_head->hw_info[0], fw_head->hw_info[1], fw_head->hw_info[2], fw_head->hw_info[3]); + GTP_INFO("FILE PID: %s", fw_head->pid); + fw_head->vid = ((fw_head->vid & 0xFF00) >> 8) + ((fw_head->vid & 0x00FF) << 8); + GTP_INFO("FILE VID: %04x", fw_head->vid); + } + + //check firmware legality + fw_checksum = 0; + for(i = FW_HEAD_LENGTH; i < (FW_HEAD_LENGTH+FW_SECTION_LENGTH*4+FW_DSP_LENGTH); i += 2) { + fw_checksum += (gtp_default_FW_fl[i] << 8) + gtp_default_FW_fl[i+1]; + } + ret = SUCCESS; + + GTP_DEBUG("firmware checksum: %x", fw_checksum&0xFFFF); + if (fw_checksum & 0xFFFF) { + GTP_ERROR("Illegal firmware file."); + ret = FAIL; + } + + return ret; +} + + + +s32 gup_fw_download_proc(void *dir, u8 dwn_mode) +{ + s32 ret = 0; + u8 retry = 0; + st_fw_head fw_head; + struct goodix_ts_data *ts; + + ts = i2c_get_clientdata(i2c_connect_client); + if (NULL == dir) { + if(GTP_FL_FW_BURN == dwn_mode) { // GT9XXF firmware burn mode + GTP_INFO("[fw_download_proc]Begin fw download ......"); + } else if (GTP_FL_ESD_RECOVERY == dwn_mode) { // GTP_FL_ESD_RECOVERY: GT9XXF esd recovery mode + GTP_INFO("[fw_download_proc]Begin fw esd recovery check ......"); + } else { + GTP_INFO("[fw_download_proc]Being fw repair check......"); + } + } else { + GTP_INFO("[fw_download_proc]Begin firmware update by bin file"); + } + + total_len = 100; + show_len = 0; + + ret = gup_check_update_file_fl(i2c_connect_client, &fw_head, (char *)dir); + show_len = 10; + + if (FAIL == ret) { + GTP_ERROR("[fw_download_proc]check update file fail."); + goto file_fail; + } + + if (!memcmp(fw_head.pid, "950", 3)) { + ts->is_950 = 1; + GTP_DEBUG("GT9XXF Ic Type: gt950"); + } else { + ts->is_950 = 0; + } + + gtp_irq_disable(ts); +#if GTP_ESD_PROTECT + if (NULL != dir) { + gtp_esd_switch(ts->client, SWITCH_OFF); + } +#endif + + ret = gup_enter_update_mode_fl(i2c_connect_client); + show_len = 20; + if (FAIL == ret) { + GTP_ERROR("[fw_download_proc]enter update mode fail."); + goto download_fail; + } + + while (retry++ < 5) { + ret = gup_download_fw_ss51(i2c_connect_client, dwn_mode); + show_len = 60; + if (FAIL == ret) { + GTP_ERROR("[fw_download_proc]burn ss51 firmware fail."); + continue; + } + + ret = gup_download_fw_dsp(i2c_connect_client, dwn_mode); + show_len = 80; + if (FAIL == ret) { + GTP_ERROR("[fw_download_proc]burn dsp firmware fail."); + continue; + } + + GTP_INFO("[fw_download_proc]UPDATE SUCCESS."); + break; + } + + if (retry >= 5) { + GTP_ERROR("[fw_download_proc]retry timeout,UPDATE FAIL."); + goto download_fail; + } + + if (NULL != dir) { + gtp_fw_startup(ts->client); +#if GTP_ESD_PROTECT + gtp_esd_switch(ts->client, SWITCH_ON); +#endif + } + gtp_irq_enable(ts); + show_len = 100; + return SUCCESS; + +download_fail: + if (NULL != dir) { + gtp_fw_startup(ts->client); +#if GTP_ESD_PROTECT + gtp_esd_switch(ts->client, SWITCH_ON); +#endif + } + gtp_irq_enable(ts); +file_fail: + show_len = 200; + + //ts->enter_udpate = 0; + return FAIL; +} + +#endif + +//**************** For GT9XXF End ********************//
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