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authorYuval Adam <_@yuv.al>2017-08-30 08:25:59 +0000
committerYuval Adam <_@yuv.al>2017-08-30 08:25:59 +0000
commit8e4bff4cab0ddac6060645b0715210484d02ff40 (patch)
tree3a5c3024371a04692a3a6d9974d001cdff8ebf84 /include/soc/sprd/sci.h
Initial file dump from open source releaseHEADmaster
Diffstat (limited to 'include/soc/sprd/sci.h')
-rw-r--r--include/soc/sprd/sci.h70
1 files changed, 70 insertions, 0 deletions
diff --git a/include/soc/sprd/sci.h b/include/soc/sprd/sci.h
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+/*
+ * Copyright (C) 2012 Spreadtrum Communications Inc.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+#ifndef __SPRD_SCI_H__
+#define __SPRD_SCI_H__
+
+/**
+ * sci_glb_read - read value from d-die global register
+ * @reg: global register address
+ * @msk:
+ *
+ * If read all bits, set msk = -1
+ *
+ * Return read value and mask.
+ */
+u32 sci_glb_read(unsigned long reg, u32 msk);
+
+/**
+ * sci_glb_write - safely write value to d-die global register
+ * @reg: global register address
+ * @val:
+ * @msk:
+ *
+ * If write all bits, set msk = -1
+ *
+ * Returns success (0) or negative errno.
+ */
+int sci_glb_write(unsigned long reg, u32 val, u32 msk);
+
+/**
+ * sci_glb_set - force set bit to d-die global register
+ * @reg: global register address
+ * @bit: commonly, only set one bit
+ *
+ *
+ * tiger use stand-alone xxx_set/xxx_clr address for all global register
+ *
+ * Returns success (0) or negative errno.
+ */
+int sci_glb_set(unsigned long reg, u32 bit);
+
+/**
+ * sci_glb_clr - force clr bit to d-die gglobal register
+ * @reg: global register address
+ * @bit: commonly, only clear one bit
+ *
+ *
+ * tiger use stand-alone xxx_set/xxx_clr address for all d-die global register
+ *
+ * Returns success (0) or negative errno.
+ */
+int sci_glb_clr(unsigned long reg, u32 bit);
+
+#define sci_glb_raw_read(reg) sci_glb_read(reg, -1UL)
+#define sci_glb_raw_write(reg, val) sci_glb_write(reg, val, -1UL)
+
+#define sci_assert(condition) do { WARN_ON(!(condition)); }while(0)
+
+#endif