Initial file dump from open source releaseHEADmaster

42 files changed, 13203 insertions, 0 deletions

diff --git a/arch/arm/mach-sc/Kconfig b/arch/arm/mach-sc/Kconfig
new file mode 100755
index 00000000..b690a3c4
--- /dev/null
+++ b/arch/arm/mach-sc/Kconfig
@@ -0,0 +1,872 @@
+if ARCH_SC
+
+menu "Spreadtrum SoC Type"
+
+config  ARCH_SCX35
+	bool "sc8830 series(shark)"
+	select CPU_V7
+	select HAVE_SMP
+	select ARM_GIC
+	select HAVE_SCHED_CLOCK
+	select LOCAL_TIMERS if SMP
+	select VFP
+	select VFPv3
+	select NEON
+	select GENERIC_TIME
+	select CLKSRC_MMIO
+	select ARCH_HAS_CPUFREQ
+	select NEED_MACH_IO_H
+	select ARM_HAS_SG_CHAIN
+	select HAVE_FUTEX_CMPXCHG if MMU && FUTEX
+
+config ARCH_SCX15
+	bool "scx15 series(dolphin,depend on ARCH_SCX35)"
+	select ARCH_SCX35
+	help
+	  Support for Spreadtrum scx15(dolphin) based systems.
+
+config ARCH_SCX35L
+	bool "shark-l series"
+	select ARCH_SCX35
+	help
+	  Support for Spreadtrum scx35l(shark-l) based systems.
+
+config ARCH_SCX30G
+	bool "scx30g series(t-shark,depend on ARCH_SCX35)"
+	select ARCH_SCX35
+	help
+	  Support for Spreadtrum scx30g(t-shark) based systems.
+
+config ARCH_SCX30G2
+	bool "scx30g2 series(t-shark,depend on ARCH_SCX35)"
+	select ARCH_SCX35
+	select ARCH_SCX30G
+	help
+	  Support for Spreadtrum scx30g2(tshark2) based systems.
+
+config ARCH_SCX35L
+	bool "shark-l series"
+	select ARCH_SCX35
+	help
+	  Support for Spreadtrum scx35l(shark-l) based systems.
+
+config ARCH_SCX20L
+	bool "shark-l series"
+	select ARCH_SCX35
+	help
+	  Support for Spreadtrum scx35l(shark-l) based systems.
+
+config ARCH_SCX20
+	bool "scx20 series(pike,depend on ARCH_SCX30g)"
+	select ARCH_SCX30G
+	select ARCH_SCX35G
+	select HAVE_FUTEX_CMPXCHG if MMU && FUTEX
+	help
+	  Support for Spreadtrum scx20(pike) based systems.
+
+config MACH_SCX35_DT
+	bool "scx35 series DT verison(tshark,pike)"
+	help
+	  Support for Spreadtrum scx35 device tree based systems.
+
+config CPLL_1024M
+	bool "dynamic cpll"
+	default n
+
+endmenu
+config SC_FPGA
+       bool
+       default n
+
+menu "Spreadtrum Board Type"
+
+
+
+config MACH_SP5735EA
+	bool "sp5735ea PAD Board"
+	depends on ARCH_SC
+	depends on ARCH_SCX35
+	default n
+	help
+	  SP5735ea board based on SC8830 serial.
+
+config MACH_SP5735C1EA
+	bool "sp5735c1ea PAD Board"
+	depends on ARCH_SC
+	depends on ARCH_SCX35
+	default n
+	help
+	  SP5735c1ea board based on SC8830 serial.
+
+config MACH_SPX35EB
+	bool "sp8830eb Phone Board"
+	depends on ARCH_SC
+	depends on ARCH_SCX35
+	default n
+	help
+	  SPX35EB board based on SC8830 serial.
+
+config MACH_SP8835EB
+	bool "sp8835eb Phone Board"
+	depends on ARCH_SC
+	depends on ARCH_SCX35
+	default n
+	help
+	  SP8835EB board based on SC8830 serial.
+
+config MACH_SPX15
+	bool "spx15 serial Phone Board"
+	depends on ARCH_SC
+	depends on ARCH_SCX35
+	depends on ARCH_SCX15
+	select CLKSRC_OF if OF
+	select COMMON_CLK
+	default n
+	help
+	  SPX15 serial board based on dolphin serial.
+
+config MACH_SPX35EA
+	bool "sp8830ea Phone Board"
+	depends on ARCH_SC
+	depends on ARCH_SCX35
+	default n
+	help
+	  SPX35EA board based on SC8830 serial.
+
+config MACH_SPX35EC
+	bool "sp8830ec Phone Board"
+	depends on ARCH_SC
+	depends on ARCH_SCX35
+	default n
+	help
+	  SPX35EC board based on SC8830 serial.
+
+config MACH_KANAS_W
+	bool "kanas W Phone Board"
+	depends on ARCH_SC
+	depends on ARCH_SCX35
+	select CLKSRC_OF if OF
+	select COMMON_CLK if OF
+	default n
+	help
+	  Samsung Kanas W board based on SC8830 serial.
+
+config MACH_KANAS_TD
+	bool "Kanas TD Phone Board"
+	depends on ARCH_SC
+	depends on ARCH_SCX35
+	default n
+	help
+	  Samsung Kanass TD board based on SC8830 serial.
+
+config MACH_SC9620OPENPHONE
+	bool "sc9620openphone Board"
+	depends on ARCH_SC
+	depends on ARCH_SCX35
+	default n
+	help
+	  ssc9620openphone board based on SC8830 serial.
+
+config MACH_SC9620OPENPHONE_ZT
+	bool "sc9620openphone_zt Board"
+	depends on ARCH_SC
+	depends on ARCH_SCX35
+	default n
+	help
+	  ssc9620openphone_zt board based on SC8830 serial.
+
+config MACH_SC9620FPGA
+        bool "sc9620fpga Board"
+        depends on ARCH_SC
+        depends on ARCH_SCX35
+        default n
+        help
+          ssc9620fpga board based on SC8830 serial.
+
+config MACH_SP8830GEA
+	bool "sp8830gea Board"
+	depends on ARCH_SC
+	depends on ARCH_SCX35
+	select CLKSRC_OF if OF
+	select COMMON_CLK if OF
+	default n
+	help
+	  SP8830GEA board based on SC8830g serial.
+
+config MACH_SP7730GGA
+	bool "sp7730gga Board"
+	depends on ARCH_SC
+	depends on ARCH_SCX35
+	select CLKSRC_OF if OF
+	select COMMON_CLK if OF
+	default n
+	help
+	  SP7730GGA board based on SC8830g serial.
+
+config MACH_SP7731GGA_LC
+	bool "sp7731gga_lc Board"
+	depends on ARCH_SC
+	depends on ARCH_SCX35
+	select CLKSRC_OF if OF
+	select COMMON_CLK if OF
+	default n
+	help
+	SP7731GGA_LC board based on SC8830g serial.
+
+config MACH_SP7730GGA_LC
+	bool "sp7730gga_lc Board"
+	depends on ARCH_SC
+	depends on ARCH_SCX35
+	select CLKSRC_OF if OF
+	select COMMON_CLK if OF
+	default n
+	help
+	SP7730GGA_LC board based on SC8830g serial.
+
+config MACH_SP7730GGAOPENPHONE
+	bool "sp7730ggaopenphone Board"
+	depends on ARCH_SC
+	depends on ARCH_SCX35
+	select CLKSRC_OF if OF
+	select COMMON_CLK if OF
+	default n
+	help
+	  SP7730GGAOPENPHONE board based on SC8830g serial.
+
+config MACH_SP7731GEA
+	bool "sp7731gea Board"
+	depends on ARCH_SC
+	depends on ARCH_SCX35
+	select CLKSRC_OF if OF
+	select COMMON_CLK if OF
+	default n
+	help
+	SP7731GEA board based on SC8830g serial.
+
+config MACH_SP7731GEA_HD2
+	bool "sp7731gea_hd2 Board"
+	depends on ARCH_SC
+	depends on ARCH_SCX35
+	select CLKSRC_OF if OF
+	select COMMON_CLK if OF
+	default n
+	help
+	SP7731GEA_HD2 board based on SC8830g serial.
+
+config MACH_SP7731GEA_HD
+	bool "sp7731gea_hd Board"
+	depends on ARCH_SC
+	depends on ARCH_SCX35
+	select CLKSRC_OF if OF
+	select COMMON_CLK if OF
+	default n
+	help
+	SP7731GEA_HD board based on SC8830g serial.
+
+config MACH_SP7731GEA_HDR
+	bool "sp7731gea_hdr Board"
+	depends on ARCH_SC
+	depends on ARCH_SCX35
+	select CLKSRC_OF if OF
+	select COMMON_CLK if OF
+	default n
+	help
+	SP7731GEA_HDR board based on SC8830g serial.
+
+config MACH_SP7732AEA
+	bool "sp7732Aea Board"
+	depends on ARCH_SC
+	depends on ARCH_SCX35
+	select CLKSRC_OF if OF
+	select COMMON_CLK if OF
+	default n
+	help
+	SP7732AEA board based on SC8830g serial.
+
+config MACH_SP8730SEEA
+	bool "sp8730seea Board"
+	depends on ARCH_SC
+	depends on ARCH_SCX35
+	select CLKSRC_OF if OF
+	select COMMON_CLK if OF
+	default n
+	help
+	SP8730SEEA board based on SC8830g serial.
+
+config MACH_SP8730SEEA_QHD
+	bool "sp8730seea_qhd Board"
+	depends on ARCH_SC
+	depends on ARCH_SCX35
+	select CLKSRC_OF if OF
+	select COMMON_CLK if OF
+	default n
+	help
+	SP8730SEEA_QHD board based on SC8830g serial.
+
+config MACH_SP8730SEEA_JIG
+	bool "sp8730seea_jig Board"
+	depends on ARCH_SC
+	depends on ARCH_SCX35
+	select CLKSRC_OF if OF
+	select COMMON_CLK if OF
+	default n
+	help
+	SP8730SEEA_JIG board based on SC8830g serial.
+
+config MACH_SP7731GEPIKE
+	bool "sp7731gepike Board"
+	depends on ARCH_SC
+	depends on ARCH_SCX35
+	select CLKSRC_OF if OF
+	select COMMON_CLK if OF
+	default n
+	help
+	SP7731GEPIKE board based on SC8830g serial.
+
+config MACH_SP7731GEA_FWVGA
+	bool "sp7731gea_fwvga Board"
+	depends on ARCH_SC
+	depends on ARCH_SCX35
+	select CLKSRC_OF if OF
+	select COMMON_CLK if OF
+	default n
+	help
+	SP7731GEA_FWVGA board based on SC8830g serial.
+
+config MACH_SP7731GEAOPENPHONE
+	bool "sp7731geaopenphone Board"
+	depends on ARCH_SC
+	depends on ARCH_SCX35
+	select CLKSRC_OF if OF
+	select COMMON_CLK if OF
+	default n
+	help
+	SP7731GEAOPENPHONE board based on SC8830g serial.
+
+config MACH_SP7731GEA_LC
+	bool "sp7731gea_lc Board"
+	depends on ARCH_SC
+	depends on ARCH_SCX35
+	select CLKSRC_OF if OF
+	select COMMON_CLK if OF
+	default n
+	help
+	SP7731GEA_LC board based on SC8830g serial.
+
+config MACH_SP7730EC
+	bool "sp7730ec Phone Board"
+	depends on ARCH_SC
+	depends on ARCH_SCX35
+	default n
+	help
+	  SP7730EC board based on SC8830 serial.
+
+config MACH_SP7730ECTRISIM
+	bool "sp7730ectrisim Phone Board"
+	depends on ARCH_SC
+	depends on ARCH_SCX35
+	default n
+	help
+	  SP7730ECTRISIM board based on SC8830 serial.
+
+config MACH_SPX35FPGA
+	bool "sp8830 FPGA Board"
+	depends on ARCH_SC
+	depends on ARCH_SCX35
+        select  SC_FPGA
+	default n
+	help
+	  SPX35 fpga board based on SC8830 serial.
+
+config MACH_SP7735EC
+	bool "sp7735ec Phone Board"
+	depends on ARCH_SC
+	depends on ARCH_SCX35
+	default n
+	help
+	  SP7735EC board based on SC8830 serial.
+
+
+config MACH_SPX15FPGA
+	bool "spx15 FPGA Board"
+	depends on ARCH_SC
+	depends on ARCH_SCX35
+	depends on ARCH_SCX15
+	default n
+        select  SC_FPGA
+	help
+	  SPX15 fpga board based on dolphin serial.
+
+config MACH_SPX35LFPGA
+        bool "spx35l FPGA Board"
+        depends on ARCH_SC
+        depends on ARCH_SCX35
+        depends on ARCH_SCX35L
+        default n
+        select  SC_FPGA
+        select COMMON_CLK if OF
+        select CLKSRC_OF if OF
+        help
+          SPX35L fpga board based on shark-l serial.
+
+config MACH_SP7720EA
+	bool "sp7720ea Board"
+	depends on ARCH_SC
+	depends on ARCH_SCX35
+	depends on ARCH_SCX20
+	select CLKSRC_OF if OF
+	select COMMON_CLK if OF
+	default n
+	help
+	SP20EA board based on SC8830g serial.
+
+config MACH_PIKELFPGA
+        bool "PIKEL FPGA Board"
+        depends on ARCH_SC
+        depends on ARCH_SCX35
+        depends on ARCH_SCX35L
+        default n
+        select  SC_FPGA
+        help
+          PIKEL fpga board based on shark-l serial.
+
+config MACH_COREPRIMELITE
+	bool "coreprimelite Board"
+	depends on ARCH_SC
+	depends on ARCH_SCX35
+	depends on ARCH_SCX35L
+	default n
+	select COMMON_CLK if OF
+	select CLKSRC_OF if OF
+	help
+	SPX35L board based on shark-l serial.
+
+config MACH_SHARKLS_Z3LTE
+	bool "sharkls_z3lte_Board"
+	depends on ARCH_SC
+	depends on ARCH_SCX35
+	depends on ARCH_SCX35L
+	default n
+	select COMMON_CLK if OF
+	select CLKSRC_OF if OF
+	help
+	SPX35L board based on shark-l serial.
+
+config MACH_SP9630EA3MN
+	bool "sp9630ea3mn Board"
+	depends on ARCH_SC
+	depends on ARCH_SCX35
+	depends on ARCH_SCX35L
+	default n
+	select COMMON_CLK if OF
+	select CLKSRC_OF if OF
+	help
+	SPX35L board based on shark-l serial.
+
+config MACH_SP9630EA4MN
+	bool "sp9630ea4mn Board"
+	depends on ARCH_SC
+	depends on ARCH_SCX35
+	depends on ARCH_SCX35L
+	default n
+	select COMMON_CLK if OF
+	select CLKSRC_OF if OF
+	help
+	  SPX35L board based on shark-l serial.
+
+config MACH_SP9830IEA_4M_H100
+	bool "sp9830iea_4m_h100 Board"
+	depends on ARCH_SC
+	depends on ARCH_SCX35
+	depends on ARCH_SCX35L
+	default n
+	select COMMON_CLK if OF
+	select CLKSRC_OF if OF
+	help
+	SPX35L board based on shark-l serial.
+
+config MACH_SP9830AEA_5M_H100
+	bool "sp9830aea_5m_h100 Board"
+	depends on ARCH_SC
+	depends on ARCH_SCX35
+	depends on ARCH_SCX35L
+	default n
+	select COMMON_CLK if OF
+	select CLKSRC_OF if OF
+	help
+	  SPX35L board based on shark-l serial.
+
+config MACH_SP9830AEA_5M_VOLTE
+	bool "sp9830aea_5m_volte Board"
+	depends on ARCH_SC
+	depends on ARCH_SCX35
+	depends on ARCH_SCX35L
+	default n
+	select COMMON_CLK if OF
+	select CLKSRC_OF if OF
+	help
+	SPX35L board based on shark-l serial.
+
+config MACH_SP9830AEB_5M_H100
+	bool "sp9830aeb_5m_h100 Board"
+	depends on ARCH_SC
+	depends on ARCH_SCX35
+	depends on ARCH_SCX35L
+	default n
+	select COMMON_CLK if OF
+	select CLKSRC_OF if OF
+	help
+	SPX35L board based on shark-l serial.
+
+config MACH_SP9830AEC_4M_H100
+	bool "sp9830aec_4m_h100 Board"
+	depends on ARCH_SC
+	depends on ARCH_SCX35
+	depends on ARCH_SCX35L
+	default n
+	select COMMON_CLK if OF
+	select CLKSRC_OF if OF
+	help
+	SPX35L board based on shark-l serial.
+
+config MACH_SP9830I
+	bool "sp9830i chip"
+	depends on ARCH_SC
+	depends on ARCH_SCX35
+	depends on ARCH_SCX35L
+	default n
+	select COMMON_CLK if OF
+	select CLKSRC_OF if OF
+	help
+          SPX35L board based on shark-l serial.
+
+config MACH_SP9830IEA_5M_H100
+        bool "sp9830iea_5m_h100 Board"
+        depends on ARCH_SC
+        depends on ARCH_SCX35
+        depends on ARCH_SCX35L
+        default n
+        select COMMON_CLK if OF
+        select CLKSRC_OF if OF
+        help
+          SPX35L board based on shark-l serial.
+
+config MACH_SP9830IEB_5M_H100
+        bool "sp9830ieb_5m_h100 Board"
+        depends on ARCH_SC
+        depends on ARCH_SCX35
+        depends on ARCH_SCX35L
+        default n
+        select COMMON_CLK if OF
+        select CLKSRC_OF if OF
+        help
+          SPX35L board based on shark-l serial.
+
+config MACH_SP9830IEC_4M_H100
+        bool "sp9830iec_4m_h100 Board"
+        depends on ARCH_SC
+        depends on ARCH_SCX35
+        depends on ARCH_SCX35L
+        default n
+        select COMMON_CLK if OF
+        select CLKSRC_OF if OF
+        help
+          SPX35L board based on shark-l serial.
+
+config MACH_SP9820EA
+	bool "sp9820ea Board"
+	depends on ARCH_SC
+	depends on ARCH_SCX35
+	depends on ARCH_SCX35L
+	depends on ARCH_SCX20L
+	default n
+	select COMMON_CLK if OF
+	select CLKSRC_OF if OF
+	help
+	SPX35L board based on shark-l serial.
+
+config MACH_SP9820FPGA
+	bool "sp9820fpga Board"
+	depends on ARCH_SC
+	depends on ARCH_SCX35
+	depends on ARCH_SCX35L
+	depends on ARCH_SCX20L
+	default n
+	select  SC_FPGA
+	select COMMON_CLK if OF
+	select CLKSRC_OF if OF
+	help
+	SPX35L board based on shark-l serial.
+
+config MACH_SP6815GA
+	bool "sp6815ga Phone Board"
+	depends on ARCH_SC
+	depends on ARCH_SCX35
+	depends on ARCH_SCX15
+	default n
+	help
+	  SP6815GA board based on dolphin serial.
+
+config MACH_SP7715EA
+	bool "sp7715ea Phone Board"
+	depends on ARCH_SC
+	depends on ARCH_SCX35
+	depends on ARCH_SCX15
+	default n
+	help
+	  SP7715EA board based on dolphin serial.
+
+config MACH_SP7715EATRISIM
+	bool "sp7715eatrisim Phone Board"
+	depends on ARCH_SC
+	depends on ARCH_SCX35
+	depends on ARCH_SCX15
+	default n
+	help
+	SP7715EATRISIM board based on dolphin serial.
+
+config MACH_SP7715EAOPENPHONE
+	bool "sp7715eaopenphone Phone Board"
+	depends on ARCH_SC
+	depends on ARCH_SCX35
+	depends on ARCH_SCX15
+	default n
+	help
+	  SP7715EAOPENPHONE board based on dolphin serial.
+
+config MACH_SP7715GA
+	bool "sp7715ga Phone Board"
+	depends on ARCH_SC
+	depends on ARCH_SCX35
+	depends on ARCH_SCX15
+	default n
+	help
+	  SP7715GA board based on dolphin serial.
+
+config MACH_SP7715GATRISIM
+	bool "sp7715gatrisim Phone Board"
+	depends on ARCH_SC
+	depends on ARCH_SCX35
+	depends on ARCH_SCX15
+	default n
+	help
+	SP7715GATRISIM board based on dolphin serial.
+
+config MACH_SP8815GA
+	bool "sp8815ga Phone Board"
+	depends on ARCH_SC
+	depends on ARCH_SCX35
+	depends on ARCH_SCX15
+	default n
+	help
+	  SP8815GA board based on dolphin serial.
+
+config MACH_SP8815GAOPENPHONE
+	bool "sp8815gaopenphone Phone Board"
+	depends on ARCH_SC
+	depends on ARCH_SCX35
+	depends on ARCH_SCX15
+	default n
+	help
+	  SP8815GAOPENPHONE board based on dolphin serial.
+
+config MACH_SP8730SEA
+	bool "sp8739sea Board"
+	depends on ARCH_SC
+	depends on ARCH_SCX35
+	select CLKSRC_OF if OF
+	select COMMON_CLK if OF
+	default n
+	help
+	SP8730SEA board based on SC8830 serial.
+
+config MACH_POCKET2
+	bool "pocket2 Phone Board"
+	depends on ARCH_SC
+	depends on ARCH_SCX35
+	depends on ARCH_SCX15
+	default n
+	help
+	  POCKET2 board based on dolphin serial.
+
+config MACH_CORSICA_VE
+	bool "corsica_ve Phone Board"
+	depends on ARCH_SC
+	depends on ARCH_SCX35
+	depends on ARCH_SCX15
+	default n
+	help
+	  CORSICA_VE board based on dolphin serial.
+
+config MACH_CORSICA_VE_DT
+	bool "corsica_ve_dt Phone Board"
+	depends on ARCH_SC
+	depends on ARCH_SCX35
+	depends on ARCH_SCX15
+	select CLKSRC_OF if OF
+	select COMMON_CLK
+	default n
+	help
+	  CORSICA_VE board based on dolphin serial.
+
+config MACH_VIVALTO
+	bool "vivalto Phone Board"
+	depends on ARCH_SC
+	depends on ARCH_SCX35
+	depends on ARCH_SCX15
+	default n
+	help
+	  VIVALTO board based on dolphin serial.
+
+config MACH_YOUNG2
+	bool "young2 Phone Board"
+	depends on ARCH_SC
+	depends on ARCH_SCX35
+	depends on ARCH_SCX15
+	default n
+	help
+	  YOUNG2 board based on dolphin serial.
+
+config MACH_HIGGS
+        bool "higgs Phone Board"
+        depends on ARCH_SC
+        depends on ARCH_SCX35
+        depends on ARCH_SCX15
+        default n
+        help
+          HIGGS board based on dolphin serial.
+
+config MACH_SP8830GA
+	bool "sp8830ga Phone Board"
+	depends on ARCH_SC
+	depends on ARCH_SCX35
+	default n
+	help
+	  SP8830GA board based on SC8830 serial.
+
+config MACH_SP7730GA
+	bool "sp7730ga Phone Board"
+	depends on ARCH_SC
+	depends on ARCH_SCX35
+	default n
+	help
+	  SP7730GA board based on SC8830 serial.
+
+config MACH_TSHARKWSAMSUNG
+	bool "Samsung tsharkwsamsung Board"
+	depends on ARCH_SC
+	depends on ARCH_SCX35
+	select MACH_SAMSUNG
+	select MUIC_CABLE_DETECT
+	select CLKSRC_OF if OF
+	select COMMON_CLK if OF
+	default n
+	help
+	  TSHARKWSAMSUNG board based on SC8830g serial.
+
+config MACH_CORE3
+	bool "Samsung Core3 Board"
+	depends on ARCH_SC
+	depends on ARCH_SCX35
+	select MACH_SAMSUNG
+	select MUIC_CABLE_DETECT
+	select FUELGAUGE_SPRD4SAMSUNG27X3
+	select CLKSRC_OF if OF
+	select COMMON_CLK if OF
+	default n
+	help
+	  Core3 board based on SC7730g serial.
+
+config MACH_PIKEAYOUNG2DTV
+	bool "pikeayoung2dtv Board"
+	depends on ARCH_SC
+	depends on ARCH_SCX35
+	select MACH_SAMSUNG
+	select MUIC_CABLE_DETECT
+	select FUELGAUGE_SPRD4SAMSUNG27X3
+	select CLKSRC_OF if OF
+	select COMMON_CLK if OF
+	default n
+	help
+	PIKEAYOUNG2DTV board based on SC8830g serial.
+
+config MACH_TSHARK2TABE
+        bool "tshark2tabe Board"
+        depends on ARCH_SC
+        depends on ARCH_SCX35
+        select MACH_SAMSUNG
+        select MUIC_CABLE_DETECT
+        select FUELGAUGE_SPRD4SAMSUNG27X3
+        select CLKSRC_OF if OF
+        select COMMON_CLK if OF
+        default n
+        help
+        TSHARK2TABE board based on SC8830g serial.
+
+config MACH_GRANDPRIME3G_VE
+	bool "grandprime3g_ve Board"
+	depends on ARCH_SC
+	depends on ARCH_SCX35
+	select MACH_SAMSUNG
+	select MUIC_CABLE_DETECT
+	select FUELGAUGE_SPRD4SAMSUNG27X3
+	select CLKSRC_OF if OF
+	select COMMON_CLK if OF
+	default n
+	help
+	GRANDPRIME3G_VE board based on SC8830g serial.
+
+config MACH_COREPRIME3G_VE
+	bool "coreprime3g_ve Board"
+	depends on ARCH_SC
+	depends on ARCH_SCX35
+	select MACH_SAMSUNG
+	select MUIC_CABLE_DETECT
+	select FUELGAUGE_SPRD4SAMSUNG27X3
+	select CLKSRC_OF if OF
+	select COMMON_CLK if OF
+	default n
+	help
+	COREPRIME3G_VE board based on SC8830g serial.
+
+config MACH_TIZENZ3_3G
+	bool "tizenz3_3g Board"
+	depends on ARCH_SC
+	depends on ARCH_SCX35
+	select MACH_SAMSUNG
+	select MUIC_CABLE_DETECT
+	select FUELGAUGE_SPRD4SAMSUNG27X3
+	select CLKSRC_OF if OF
+	select COMMON_CLK if OF
+	default n
+	help
+	TIZENZ3_3G board based on SC8830g serial.
+
+
+config MACH_GRANDPRIME_DTV
+	bool "grandprime_dtv Board"
+	depends on ARCH_SC
+	depends on ARCH_SCX35
+	select MACH_SAMSUNG
+	select MUIC_CABLE_DETECT
+	select FUELGAUGE_SPRD4SAMSUNG27X3
+	select CLKSRC_OF if OF
+	select COMMON_CLK if OF
+	default n
+	help
+	GRANDPRIME_DTV board based on SC8830g serial.
+
+config MACH_SAMSUNG
+	bool "Samsung Board"
+	default n
+	help
+	  all samsung boards.
+
+endmenu
+
+
+config GPS_BCM47520
+	bool "BROADCOM_GPS_CHIPSET_47520"
+	default n
+
+endif
diff --git a/arch/arm/mach-sc/Makefile b/arch/arm/mach-sc/Makefile
new file mode 100755
index 00000000..118dc491
--- /dev/null
+++ b/arch/arm/mach-sc/Makefile
@@ -0,0 +1,38 @@
+obj-$(CONFIG_MACH_SPX35LFPGA) += board-sp8830fpga.o
+obj-$(CONFIG_MACH_PIKELFPGA) += board-sp8830fpga.o
+obj-$(CONFIG_MACH_SP7731GEA) += board-sp7731gea.o
+obj-$(CONFIG_MACH_SP7732AEA) += board-sp7732Aea.o
+obj-$(CONFIG_MACH_SP8730SEEA) += board-sp8730seea.o
+obj-$(CONFIG_MACH_SP8730SEEA_QHD) += board-sp8730seea_qhd.o
+obj-$(CONFIG_MACH_SP8730SEEA_JIG) += board-sp8730seea_jig.o
+obj-$(CONFIG_MACH_SP7731GEPIKE) += board-sp7731gea.o
+obj-$(CONFIG_MACH_SP7731GEA_HD2) += board-sp7731gea_hd2.o
+obj-$(CONFIG_MACH_SP7731GEA_HD) += board-sp7731gea_hd.o
+obj-$(CONFIG_MACH_SP7731GEA_HDR) += board-sp7731gea_hdr.o
+obj-$(CONFIG_MACH_SP7731GEA_HDR) += board-sp7731gea_hdr.o
+obj-$(CONFIG_MACH_SP7731GEA_QHD) += board-sp7731gea_qhd.o
+obj-$(CONFIG_MACH_SP7731GEPIKE) += board-sp7731gepike.o
+obj-$(CONFIG_MACH_SP9630EA_4MOD) += board-sp9630ea_4mod.o
+obj-$(CONFIG_MACH_COREPRIMELITE) += board-coreprimelite.o
+obj-$(CONFIG_MACH_SHARKLS_Z3LTE) += board-sharkls_z3lte.o
+obj-$(CONFIG_MACH_PIKEAYOUNG2DTV) += board-pikeayoung2dtv.o
+obj-$(CONFIG_MACH_TSHARK2TABE) += board_common_battery.o syssleep.o
+obj-$(CONFIG_MACH_GRANDPRIME3G_VE) += board_common_battery.o syssleep.o
+obj-$(CONFIG_MACH_COREPRIME3G_VE) += board_common_battery.o syssleep.o
+obj-$(CONFIG_MACH_TIZENZ3_3G) += board_common_battery.o syssleep.o
+obj-$(CONFIG_MACH_GRANDPRIME_DTV) += board_common_battery.o syssleep.o
+obj-$(CONFIG_MACH_SP9630EA3MN) += board-sp9630ea3mn.o
+obj-$(CONFIG_MACH_SP9630EA4MN) += board-sp9630ea4mn.o
+obj-$(CONFIG_MACH_SP9830AEA_5M_H100) += board-sp9830aea_5m_h100.o
+obj-$(CONFIG_MACH_SP9830AEA_5M_VOLTE) += board-sp9830aea_5m_volte.o
+obj-$(CONFIG_MACH_SP9830AEB_5M_H100) += board-sp9830aeb_5m_h100.o
+obj-$(CONFIG_MACH_SP9830AEC_4M_H100) += board-sp9830aec_4m_h100.o
+obj-$(CONFIG_MACH_SP9830IEA_5M_H100) += board-sp9830iea_5m_h100.o
+obj-$(CONFIG_MACH_SP9830IEB_5M_H100) += board-sp9830ieb_5m_h100.o
+obj-$(CONFIG_MACH_SP9830IEC_4M_H100) += board-sp9830iec_4m_h100.o
+obj-$(CONFIG_MACH_SP9830IEA_4M_H100) += board-sp9830iea_4m_h100.o
+obj-$(CONFIG_MACH_SP9820EA) += board-sp9820ea.o
+obj-$(CONFIG_MACH_SP7720EA) += board-sp7720ea.o
+obj-$(CONFIG_MACH_SP9820FPGA) += board-sp9820fpga.o
+obj-$(CONFIG_MACH_SCX35_DT) += mach-scx35-dt.o
+obj-$(CONFIG_GPS_BCM47520) += sec_gps_bcm47520.o
diff --git a/arch/arm/mach-sc/Makefile.boot b/arch/arm/mach-sc/Makefile.boot
new file mode 100644
index 00000000..230764c6
--- /dev/null
+++ b/arch/arm/mach-sc/Makefile.boot
@@ -0,0 +1,3 @@
+zreladdr-y		:= 0x80008000
+params_phys-y		:= 0x80000100
+initrd_phys-y		:= 0x80800000
diff --git a/arch/arm/mach-sc/board-coreprimelite.c b/arch/arm/mach-sc/board-coreprimelite.c
new file mode 100644
index 00000000..00921ede
--- /dev/null
+++ b/arch/arm/mach-sc/board-coreprimelite.c
@@ -0,0 +1,370 @@
+/*
+ * Copyright (C) 2014 Spreadtrum Communications Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/delay.h>
+#include <linux/export.h>
+#include <linux/irqchip/arm-gic.h>
+#include <linux/input.h>
+
+#include <asm/io.h>
+#include <asm/setup.h>
+#include <asm/mach/time.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach-types.h>
+#include <asm/hardware/cache-l2x0.h>
+#include <asm/localtimer.h>
+#include <linux/of_platform.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/clocksource.h>
+#include <linux/clk-provider.h>
+#include <soc/sprd/hardware.h>
+#include <linux/i2c.h>
+#if (defined(CONFIG_INPUT_LIS3DH_I2C) || defined(CONFIG_INPUT_LIS3DH_I2C_MODULE))
+#include <linux/i2c/lis3dh.h>
+#endif
+#if (defined(CONFIG_INPUT_LTR558_I2C) || defined(CONFIG_INPUT_LTR558_I2C_MODULE))
+#include <linux/i2c/ltr_558als.h>
+#endif
+#if (defined(CONFIG_TOUCHSCREEN_MSG2138) || defined(CONFIG_TOUCHSCREEN_MSG2138_MODULE))
+#include <linux/i2c/msg2138.h>
+#endif
+#include <linux/spi/spi.h>
+#include <linux/gpio.h>
+#include <soc/sprd/board.h>
+#include <soc/sprd/serial_sprd.h>
+#include <soc/sprd/adi.h>
+#include <soc/sprd/adc.h>
+#include <soc/sprd/pinmap.h>
+#include <linux/irq.h>
+#include <linux/input/matrix_keypad.h>
+
+#include <soc/sprd/sci.h>
+#include <soc/sprd/kpd.h>
+#include <soc/sprd/sci_glb_regs.h>
+
+#if (defined(CONFIG_INV_MPU_IIO) || defined(CONFIG_INV_MPU_IIO_MODULE))
+#include <linux/mpu.h>
+#endif
+#if (defined(CONFIG_SENSORS_AK8975) || defined(CONFIG_SENSORS_AK8975_MODULE))
+#include <linux/akm8975.h>
+#endif
+
+
+/* IRQ's for the multi sensor board */
+#define MPUIRQ_GPIO 212
+#include <linux/regulator/consumer.h>
+#include <soc/sprd/regulator.h>
+#if (defined(CONFIG_TOUCHSCREEN_FOCALTECH) || defined(CONFIG_TOUCHSCREEN_FOCALTECH_MODULE))
+#include <linux/i2c/focaltech.h>
+#endif
+
+#if (defined(CONFIG_KEYBOARD_SC) || defined (CONFIG_KEYBOARD_SC_MODULE))
+#include <linux/input/matrix_keypad.h>
+#include <soc/sprd/kpd.h>
+#endif
+#if (defined(CONFIG_KEYBOARD_GPIO) || defined (CONFIG_KEYBOARD_GPIO_MODULE))
+#include <linux/gpio_keys.h>
+#endif
+#if (defined(CONFIG_KEYBOARD_SPRD_EIC) || defined(CONFIG_KEYBOARD_SPRD_EIC_MODULE))
+#include <linux/sprd_eic_keys.h>
+#endif
+#if (defined(CONFIG_BACKLIGHT_SPRD_PWM) || defined(CONFIG_BACKLIGHT_SPRD_PWM_MODULE))
+#include <linux/sprd_pwm_bl.h>
+#endif
+#if (defined(CONFIG_INPUT_HEADSET_SPRD_SC2723) || defined(CONFIG_INPUT_HEADSET_SPRD_SC2723_MODULE))
+#include <linux/headset_sprd_sc2723.h>
+#endif
+extern void bluesleep_setup_uart_port(struct platform_device *uart_dev);
+extern void __init sci_reserve(void);
+extern void __init sci_map_io(void);
+extern void __init sci_init_irq(void);
+extern void __init sci_timer_init(void);
+extern int __init sci_clock_init(void);
+extern int __init sci_regulator_init(void);
+
+struct class *sec_class;
+EXPORT_SYMBOL(sec_class);
+int __init __clock_init_early(void)
+{
+#if !defined(CONFIG_ARCH_SCX15)
+	pr_info("ahb ctl0 %08x, ctl2 %0x8 glb aon apb0 %08x aon apb1 %08x clk_en %08x\n",
+		sci_glb_raw_read(REG_AP_AHB_AHB_EB),
+		sci_glb_raw_read(REG_AP_AHB_AHB_RST),
+		sci_glb_raw_read(REG_AON_APB_APB_EB0),
+		sci_glb_raw_read(REG_AON_APB_APB_EB1),
+		sci_glb_raw_read(REG_AON_CLK_PUB_AHB_CFG));
+#endif
+
+	sci_glb_clr(REG_AP_AHB_AHB_EB,
+		BIT_BUSMON2_EB		|
+		BIT_BUSMON1_EB		|
+		BIT_BUSMON0_EB		|
+		BIT_SPINLOCK_EB		|
+#if !defined(CONFIG_ARCH_SCX35L)
+		BIT_GPS_EB		|
+#endif
+		BIT_EMMC_EB		|
+		BIT_SDIO2_EB		|
+		BIT_SDIO1_EB		|
+		BIT_SDIO0_EB		|
+		BIT_DRM_EB		|
+		BIT_NFC_EB		|
+		BIT_DMA_EB		|
+		BIT_USB_EB		|
+#if !defined(CONFIG_ARCH_SCX35L)
+		BIT_GSP_EB		|
+		BIT_DISPC1_EB		|
+#endif
+		0);
+	sci_glb_clr(REG_AP_APB_APB_EB,
+		BIT_INTC3_EB		|
+		BIT_INTC2_EB		|
+		BIT_INTC1_EB		|
+		BIT_IIS1_EB		|
+		BIT_UART2_EB		|
+		BIT_UART0_EB		|
+		BIT_SPI1_EB		|
+		BIT_SPI0_EB		|
+		BIT_IIS0_EB		|
+		BIT_I2C0_EB		|
+		BIT_SPI2_EB		|
+		BIT_UART3_EB		|
+		0);
+	sci_glb_clr(REG_AON_APB_APB_RTC_EB,
+		BIT_KPD_RTC_EB		|
+		BIT_KPD_EB		|
+		BIT_EFUSE_EB		|
+		0);
+
+	sci_glb_clr(REG_AON_APB_APB_EB0,
+		BIT_AUDIF_EB			|
+		BIT_VBC_EB			|
+		BIT_PWM3_EB			|
+		BIT_PWM1_EB			|
+		0);
+	sci_glb_clr(REG_AON_APB_APB_EB1,
+		BIT_AUX1_EB			|
+		BIT_AUX0_EB			|
+		0);
+	printk("sc clock module early init ok\n");
+	return 0;
+}
+
+static inline int __sci_get_chip_id(void)
+{
+	return __raw_readl(CHIP_ID_LOW_REG);
+}
+
+const struct of_device_id of_sprd_default_bus_match_table[] = {
+	{ .compatible = "simple-bus", },
+	{ .compatible = "sprd,adi-bus", },
+	{}
+};
+
+static struct of_dev_auxdata of_sprd_default_bus_lookup[] = {
+	 { .compatible = "sprd,sprd_backlight",  .name = "sprd_backlight" },
+#if(defined(CONFIG_BACKLIGHT_SPRD_PWM)||defined(CONFIG_BACKLIGHT_SPRD_PWM_MODULE))
+	{ .compatible = "sprd,sprd_pwm_bl",  .name = "sprd_pwm_bl" },
+#endif
+#if (defined(CONFIG_KEYBOARD_SC) || defined(CONFIG_KEYBOARD_SC_MODULE))
+	{.compatible = "sprd,sci-keypad", .name = "sci-keypad" },
+#endif
+#if (defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE))
+	{.compatible = "gpio-keys", .name = "gpio-keys" },
+#endif
+#if (defined(CONFIG_KEYBOARD_SPRD_EIC) || defined(CONFIG_KEYBOARD_SPRD_EIC_MODULE))
+	{.compatible = "sprd,sprd-eic-keys", .name = "sprd-eic-keys" },
+#endif
+#if (defined(CONFIG_INPUT_HEADSET_SPRD_SC2723) || defined(CONFIG_INPUT_HEADSET_SPRD_SC2723_MODULE))
+	{ .compatible = "sprd,headset_sprd_sc2723",  .name = "headset_sprd_sc2723" },
+#endif
+	{}
+};
+
+struct iotable_sprd io_addr_sprd;
+EXPORT_SYMBOL(io_addr_sprd);
+
+int iotable_build()
+{
+	struct device_node *np;
+	struct resource res;
+
+#define ADD_SPRD_DEVICE(compat, id)			\
+do {							\
+	np = of_find_compatible_node(NULL, NULL, compat);\
+	if (of_can_translate_address(np)) {		\
+		of_address_to_resource(np, 0, &res);	\
+		io_addr_sprd.id.paddr = res.start;	\
+		io_addr_sprd.id.length =		\
+			resource_size(&res);		\
+		io_addr_sprd.id.vaddr =			\
+		ioremap_nocache(res.start, io_addr_sprd.id.length);\
+		pr_debug("sprd io map: phys=%08x virt=%08x size=%08x\n", \
+	io_addr_sprd.id.paddr, io_addr_sprd.id.vaddr, io_addr_sprd.id.length);\
+	}						\
+} while (0)
+#define ADD_SPRD_DEVICE_BY_NAME(name, id)		\
+do {							\
+	np = of_find_node_by_name(NULL, name);		\
+	if (of_can_translate_address(np)) {		\
+		of_address_to_resource(np, 0, &res);	\
+		io_addr_sprd.id.paddr = res.start;	\
+		io_addr_sprd.id.length =		\
+			resource_size(&res);		\
+		io_addr_sprd.id.vaddr =			\
+		ioremap_nocache(res.start, io_addr_sprd.id.length);\
+		pr_debug("sprd io map: phys=%16lx virt=%16lx size=%16lx\n", \
+	io_addr_sprd.id.paddr, io_addr_sprd.id.vaddr, io_addr_sprd.id.length);\
+	}						\
+} while (0)
+	ADD_SPRD_DEVICE("sprd,ahb", AHB);
+	ADD_SPRD_DEVICE("sprd,aonapb", AONAPB);
+	ADD_SPRD_DEVICE("sprd,aonckg", AONCKG);
+	ADD_SPRD_DEVICE("sprd,apbreg", APBREG);
+	ADD_SPRD_DEVICE("sprd,core", CORE);
+	ADD_SPRD_DEVICE("sprd,mmahb", MMAHB);
+	ADD_SPRD_DEVICE("sprd,pmu", PMU);
+	ADD_SPRD_DEVICE("sprd,mmckg", MMCKG);
+	ADD_SPRD_DEVICE("sprd,gpuapb", GPUAPB);
+	ADD_SPRD_DEVICE("sprd,apbckg", APBCKG);
+	ADD_SPRD_DEVICE("sprd,gpuckg", GPUCKG);
+	ADD_SPRD_DEVICE("sprd,int", INT);
+	ADD_SPRD_DEVICE("sprd,intc0", INTC0);
+	ADD_SPRD_DEVICE("sprd,intc1", INTC1);
+	ADD_SPRD_DEVICE("sprd,intc2", INTC2);
+	ADD_SPRD_DEVICE("sprd,intc3", INTC3);
+	ADD_SPRD_DEVICE("sprd,uidefuse", UIDEFUSE);
+	ADD_SPRD_DEVICE("sprd,isp", ISP);
+	ADD_SPRD_DEVICE("sprd,ca7wdg", CA7WDG);
+	ADD_SPRD_DEVICE("sprd,csi2", CSI2);
+	ADD_SPRD_DEVICE("sprd,d-eic-gpio", EIC);
+	ADD_SPRD_DEVICE("sprd,wdg", WDG);
+	ADD_SPRD_DEVICE("sprd,ipi", IPI);
+	ADD_SPRD_DEVICE("sprd,dcam", DCAM);
+	ADD_SPRD_DEVICE("sprd,syscnt", SYSCNT);
+	ADD_SPRD_DEVICE("sprd,dma0", DMA0);
+	ADD_SPRD_DEVICE("sprd,pub", PUB);
+	ADD_SPRD_DEVICE("sprd,pin", PIN);
+	ADD_SPRD_DEVICE("sprd,d-gpio-gpio", GPIO);
+	ADD_SPRD_DEVICE_BY_NAME("hwspinlock0", HWSPINLOCK0);
+	ADD_SPRD_DEVICE_BY_NAME("hwspinlock1", HWSPINLOCK1);
+
+	return 0;
+}
+
+static void __init sc8830_init_machine(void)
+{
+	printk("sci get chip id = 0x%x\n", __sci_get_chip_id());
+
+	sci_adc_init();
+#ifndef CONFIG_MACH_SPX35LFPGA
+	sci_regulator_init();
+#endif
+	of_sprd_default_bus_lookup[0].phys_addr = 0x20300000;
+	of_sprd_default_bus_lookup[1].phys_addr = 0x20400000;
+	of_sprd_default_bus_lookup[2].phys_addr = 0x20500000;
+	of_sprd_default_bus_lookup[3].phys_addr = 0x20600000;
+	of_platform_populate(NULL, of_sprd_default_bus_match_table, of_sprd_default_bus_lookup, NULL);
+	sec_class = class_create(THIS_MODULE, "sec");
+	if (IS_ERR(sec_class)) {
+		pr_err("Failed to create class(sec)!\n");
+		printk("Failed create class \n");
+		return PTR_ERR(sec_class);
+	}
+}
+#ifdef CONFIG_OF
+const struct of_device_id of_sprd_late_bus_match_table[] = {
+	{ .compatible = "sprd,sound", },
+	{}
+};
+#endif
+
+static void __init sc8830_init_late(void)
+{
+	of_platform_populate(of_find_node_by_path("/sprd-audio-devices"),
+				of_sprd_late_bus_match_table, NULL, NULL);
+}
+
+
+extern void __init sci_enable_timer_early(void);
+extern void __init sc_init_chip_id(void);
+
+void __init sprd_init_before_irq(void)
+{
+	iotable_build();
+	sc_init_chip_id();
+	/* earlier init request than irq and timer */
+	__clock_init_early();
+	/*ipi reg init for sipc*/
+	sci_glb_set(REG_AON_APB_APB_EB0, BIT_IPI_EB);
+}
+
+static void __init sc8830_pmu_init(void)
+{
+	__raw_writel(__raw_readl(REG_PMU_APB_PD_MM_TOP_CFG)
+		& ~(BIT_PD_MM_TOP_FORCE_SHUTDOWN),
+		REG_PMU_APB_PD_MM_TOP_CFG);
+
+	while (__raw_readl(REG_PMU_APB_PWR_STATUS0_DBG) & 0xf0000000) {};
+
+	__raw_writel(__raw_readl(REG_PMU_APB_PD_GPU_TOP_CFG)
+		& ~(BIT_PD_GPU_TOP_FORCE_SHUTDOWN),
+		REG_PMU_APB_PD_GPU_TOP_CFG);
+
+	while (__raw_readl(REG_PMU_APB_PWR_STATUS0_DBG) & 0x0f000000) {};
+
+	__raw_writel(__raw_readl(REG_AON_APB_APB_EB0) | BIT_MM_EB |
+		BIT_GPU_EB, REG_AON_APB_APB_EB0);
+	__raw_writel(__raw_readl(REG_MM_AHB_AHB_EB) | BIT_MM_CKG_EB,
+		REG_MM_AHB_AHB_EB);
+	__raw_writel(__raw_readl(REG_MM_AHB_GEN_CKG_CFG)
+		| BIT_MM_MTX_AXI_CKG_EN | BIT_MM_AXI_CKG_EN,
+		REG_MM_AHB_GEN_CKG_CFG);
+	__raw_writel(__raw_readl(REG_MM_CLK_MM_AHB_CFG) | 0x3,
+		REG_MM_CLK_MM_AHB_CFG);
+}
+
+static void sprd_init_time(void)
+{
+	if (of_have_populated_dt()) {
+		sc8830_pmu_init();
+		of_clk_init(NULL);
+		clocksource_of_init();
+	} else {
+		sci_clock_init();
+		sci_enable_timer_early();
+		sci_timer_init();
+	}
+}
+static const char *sprd_boards_compat[] __initdata = {
+	"sprd,sp8835eb",
+	NULL,
+};
+extern struct smp_operations sprd_smp_ops;
+
+MACHINE_START(SCPHONE, "sc8830")
+	.smp		= smp_ops(sprd_smp_ops),
+	.reserve	= sci_reserve,
+	.map_io		= sci_map_io,
+	.init_irq	= sci_init_irq,
+	.init_time	= sprd_init_time,
+	.init_machine	= sc8830_init_machine,
+	.init_late	= sc8830_init_late,
+	.dt_compat	= sprd_boards_compat,
+MACHINE_END
+
diff --git a/arch/arm/mach-sc/board-pikeayoung2dtv.c b/arch/arm/mach-sc/board-pikeayoung2dtv.c
new file mode 100644
index 00000000..283b54fa
--- /dev/null
+++ b/arch/arm/mach-sc/board-pikeayoung2dtv.c
@@ -0,0 +1,342 @@
+/*
+ * Copyright (C) 2012 Spreadtrum Communications Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/delay.h>
+#include <linux/export.h>
+#include <linux/irqchip/arm-gic.h>
+#include <linux/input.h>
+
+#include <asm/io.h>
+#include <asm/setup.h>
+#include <asm/mach/time.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach-types.h>
+#include <linux/irqchip/arm-gic.h>
+#include <asm/hardware/cache-l2x0.h>
+#include <asm/localtimer.h>
+#include <linux/of_platform.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/clocksource.h>
+#include <linux/clk-provider.h>
+#include <soc/sprd/hardware.h>
+#include <linux/i2c.h>
+#if(defined(CONFIG_INPUT_LIS3DH_I2C)||defined(CONFIG_INPUT_LIS3DH_I2C_MODULE))
+#include <linux/i2c/lis3dh.h>
+#endif
+#if(defined(CONFIG_INPUT_LTR558_I2C)||defined(CONFIG_INPUT_LTR558_I2C_MODULE))
+#include <linux/i2c/ltr_558als.h>
+#endif
+#include <linux/spi/spi.h>
+#include <linux/gpio.h>
+#include <soc/sprd/board.h>
+#include <soc/sprd/serial_sprd.h>
+#include <soc/sprd/adi.h>
+#include <soc/sprd/adc.h>
+#include <soc/sprd/pinmap.h>
+#include <linux/irq.h>
+#include <linux/input/matrix_keypad.h>
+
+#include <soc/sprd/sci.h>
+#include <soc/sprd/hardware.h>
+#include <soc/sprd/kpd.h>
+#include <soc/sprd/sci_glb_regs.h>
+
+#if(defined(CONFIG_INV_MPU_IIO)||defined(CONFIG_INV_MPU_IIO_MODULE))
+#include <linux/mpu.h>
+#endif
+#if(defined(CONFIG_SENSORS_AK8975)||defined(CONFIG_SENSORS_AK8975_MODULE))
+#include <linux/akm8975.h>
+#endif
+
+//#include "devices.h"
+
+#include <linux/regulator/consumer.h>
+#include <soc/sprd/regulator.h>
+#if(defined(CONFIG_TOUCHSCREEN_FOCALTECH)||defined(CONFIG_TOUCHSCREEN_FOCALTECH_MODULE))
+#include <linux/i2c/focaltech.h>
+#endif
+#include <soc/sprd/i2s.h>
+#include <linux/sprd_2351.h>
+
+#if(defined(CONFIG_KEYBOARD_SC)||defined(CONFIG_KEYBOARD_SC_MODULE))
+#include <linux/input/matrix_keypad.h>
+#include <soc/sprd/kpd.h>
+#endif
+#if(defined(CONFIG_KEYBOARD_GPIO)||defined(CONFIG_KEYBOARD_GPIO_MODULE))
+#include <linux/gpio_keys.h>
+#endif
+#if(defined(CONFIG_KEYBOARD_SPRD_EIC)||defined(CONFIG_KEYBOARD_SPRD_EIC_MODULE))
+#include <linux/sprd_eic_keys.h>
+#endif
+#if(defined(CONFIG_BACKLIGHT_SPRD_PWM)||defined(CONFIG_BACKLIGHT_SPRD_PWM_MODULE))
+#include <linux/sprd_pwm_bl.h>
+#endif
+#if(defined(CONFIG_INPUT_HEADSET_SPRD_SC2723)||defined(CONFIG_INPUT_HEADSET_SPRD_SC2723_MODULE))
+#include <linux/headset_sprd_sc2723.h>
+#endif
+
+struct class *sec_class;
+EXPORT_SYMBOL(sec_class);
+
+extern void __init sci_reserve(void);
+extern void __init sci_map_io(void);
+extern void __init sci_init_irq(void);
+extern void __init sci_timer_init(void);
+extern int __init sci_clock_init(void);
+extern int __init sci_regulator_init(void);
+
+int __init __clock_init_early(void)
+{
+	pr_info("ahb ctl0 %08x, ctl2 %08x glb aon apb0 %08x aon apb1 %08x clk_en %08x\n",
+		sci_glb_raw_read(REG_AP_AHB_AHB_EB),
+		sci_glb_raw_read(REG_AP_AHB_AHB_RST),
+		sci_glb_raw_read(REG_AON_APB_APB_EB0),
+		sci_glb_raw_read(REG_AON_APB_APB_EB1),
+		sci_glb_raw_read(REG_AON_CLK_PUB_AHB_CFG));
+
+	sci_glb_clr(REG_AP_AHB_AHB_EB,
+		BIT_BUSMON2_EB		|
+		BIT_BUSMON1_EB		|
+		BIT_BUSMON0_EB		|
+		//BIT_SPINLOCK_EB		|
+		BIT_GPS_EB		|
+		//BIT_EMMC_EB		|
+		//BIT_SDIO2_EB		|
+		//BIT_SDIO1_EB		|
+		//BIT_SDIO0_EB		|
+		BIT_DRM_EB		|
+		BIT_NFC_EB		|
+		//BIT_DMA_EB		|
+		//BIT_USB_EB		|
+		//BIT_GSP_EB		|
+		//BIT_DISPC1_EB		|
+		//BIT_DISPC0_EB		|
+		//BIT_DSI_EB		|
+		0);
+	sci_glb_clr(REG_AP_APB_APB_EB,
+		BIT_INTC3_EB		|
+		BIT_INTC2_EB		|
+		BIT_INTC1_EB		|
+		BIT_IIS1_EB		|
+		BIT_UART2_EB		|
+		BIT_UART0_EB		|
+		BIT_SPI1_EB		|
+		BIT_SPI0_EB		|
+		BIT_IIS0_EB		|
+		BIT_I2C0_EB		|
+		BIT_SPI2_EB		|
+		BIT_UART3_EB		|
+		0);
+	sci_glb_clr(REG_AON_APB_APB_RTC_EB,
+		BIT_KPD_RTC_EB		|
+		BIT_KPD_EB		|
+		BIT_EFUSE_EB		|
+		0);
+
+	sci_glb_clr(REG_AON_APB_APB_EB0,
+		BIT_AUDIF_EB			|
+		BIT_VBC_EB			|
+			BIT_PWM3_EB			|
+		BIT_PWM1_EB			|
+		0);
+	sci_glb_clr(REG_AON_APB_APB_EB1,
+		BIT_AUX1_EB			|
+		BIT_AUX0_EB			|
+		0);
+
+	printk("sc clock module early init ok\n");
+	return 0;
+}
+
+static inline int __sci_get_chip_id(void)
+{
+	return __raw_readl(CHIP_ID_LOW_REG);
+}
+const struct of_device_id of_sprd_default_bus_match_table[] = {
+	{ .compatible = "simple-bus", },
+	{ .compatible = "sprd,adi-bus", },
+	{}
+};
+
+static struct of_dev_auxdata of_sprd_default_bus_lookup[] = {
+	{ .compatible = "sprd,sdhci-shark",  .name = "sdio_sd", .phys_addr = 0x20300000, },
+	{ .compatible = "sprd,sdhci-shark",  .name = "sdio_wifi", .phys_addr = 0x20400000, },
+	{ .compatible = "sprd,sdhci-shark",  .name = "sprd-sdhci.2", .phys_addr = 0x20500000, },
+	{ .compatible = "sprd,sdhci-shark",  .name = "sdio_emmc", .phys_addr = 0x20600000, },
+	{ .compatible = "sprd,sprd_backlight",  .name = "sprd_backlight" },
+	{}
+};
+
+struct iotable_sprd io_addr_sprd;
+EXPORT_SYMBOL(io_addr_sprd);
+
+int iotable_build()
+{
+	struct device_node *np;
+	struct resource res;
+
+#define ADD_SPRD_DEVICE(compat, id)			\
+do {							\
+	np = of_find_compatible_node(NULL, NULL, compat);\
+	if (of_can_translate_address(np)) {		\
+		of_address_to_resource(np, 0, &res);	\
+		io_addr_sprd.id.paddr = res.start;	\
+		io_addr_sprd.id.length =		\
+			resource_size(&res);		\
+		io_addr_sprd.id.vaddr =			\
+		ioremap_nocache(res.start, io_addr_sprd.id.length);\
+		pr_debug("sprd io map: phys=%08x virt=%08x size=%08x\n", \
+	io_addr_sprd.id.paddr, io_addr_sprd.id.vaddr, io_addr_sprd.id.length);\
+	}						\
+} while (0)
+#define ADD_SPRD_DEVICE_BY_NAME(name, id)		\
+do {							\
+	np = of_find_node_by_name(NULL, name);		\
+	if (of_can_translate_address(np)) {		\
+		of_address_to_resource(np, 0, &res);	\
+		io_addr_sprd.id.paddr = res.start;	\
+		io_addr_sprd.id.length =		\
+			resource_size(&res);		\
+		io_addr_sprd.id.vaddr =			\
+		ioremap_nocache(res.start, io_addr_sprd.id.length);\
+		pr_debug("sprd io map: phys=%16lx virt=%16lx size=%16lx\n", \
+	io_addr_sprd.id.paddr, io_addr_sprd.id.vaddr, io_addr_sprd.id.length);\
+	}						\
+} while (0)
+	ADD_SPRD_DEVICE("sprd,ahb", AHB);
+	ADD_SPRD_DEVICE("sprd,aonapb", AONAPB);
+	ADD_SPRD_DEVICE("sprd,aonckg", AONCKG);
+	ADD_SPRD_DEVICE("sprd,apbreg", APBREG);
+	ADD_SPRD_DEVICE("sprd,core", CORE);
+	ADD_SPRD_DEVICE("sprd,mmahb", MMAHB);
+	ADD_SPRD_DEVICE("sprd,pmu", PMU);
+	ADD_SPRD_DEVICE("sprd,mmckg", MMCKG);
+	ADD_SPRD_DEVICE("sprd,gpuapb", GPUAPB);
+	ADD_SPRD_DEVICE("sprd,apbckg", APBCKG);
+	ADD_SPRD_DEVICE("sprd,gpuckg", GPUCKG);
+	ADD_SPRD_DEVICE("sprd,int", INT);
+	ADD_SPRD_DEVICE("sprd,intc0", INTC0);
+	ADD_SPRD_DEVICE("sprd,intc1", INTC1);
+	ADD_SPRD_DEVICE("sprd,intc2", INTC2);
+	ADD_SPRD_DEVICE("sprd,intc3", INTC3);
+	ADD_SPRD_DEVICE("sprd,uidefuse", UIDEFUSE);
+	ADD_SPRD_DEVICE("sprd,isp", ISP);
+	ADD_SPRD_DEVICE("sprd,csi2", CSI2);
+	ADD_SPRD_DEVICE("sprd,d-eic-gpio", EIC);
+	ADD_SPRD_DEVICE("sprd,ipi", IPI);
+	ADD_SPRD_DEVICE("sprd,dcam", DCAM);
+	ADD_SPRD_DEVICE("sprd,syscnt", SYSCNT);
+	ADD_SPRD_DEVICE("sprd,dma0", DMA0);
+	ADD_SPRD_DEVICE("sprd,pub", PUB);
+	ADD_SPRD_DEVICE("sprd,pin", PIN);
+	ADD_SPRD_DEVICE("sprd,d-gpio-gpio", GPIO);
+	ADD_SPRD_DEVICE_BY_NAME("hwspinlock0", HWSPINLOCK0);
+	ADD_SPRD_DEVICE_BY_NAME("hwspinlock1", HWSPINLOCK1);
+
+	return 0;
+}
+
+static void __init sc8830_init_machine(void)
+{
+	printk("sci get chip id = 0x%x\n",__sci_get_chip_id());
+
+	sci_adc_init();
+	sci_regulator_init();
+
+	of_platform_populate(NULL, of_sprd_default_bus_match_table, of_sprd_default_bus_lookup, NULL);
+	sec_class = class_create(THIS_MODULE, "sec");
+        if (IS_ERR(sec_class)) {
+		pr_err("Failed to create class(sec)!\n");
+		printk("Failed create class \n");
+		return PTR_ERR(sec_class);
+	}
+}
+
+const struct of_device_id of_sprd_late_bus_match_table[] = {
+	{ .compatible = "sprd,sound", },
+	{}
+};
+
+static void __init sc8830_init_late(void)
+{
+	of_platform_populate(of_find_node_by_path("/sprd-audio-devices"),
+				of_sprd_late_bus_match_table, NULL, NULL);
+}
+
+extern void __init  sci_enable_timer_early(void);
+extern void __init sc_init_chip_id(void);
+
+void __init sprd_init_before_irq(void)
+{
+	iotable_build();
+	sc_init_chip_id();
+	/* earlier init request than irq and timer */
+	__clock_init_early();
+	/*ipi reg init for sipc*/
+	sci_glb_set(REG_AON_APB_APB_EB0, BIT_IPI_EB);
+}
+static void __init sc8830_pmu_init(void)
+{
+	__raw_writel(__raw_readl(REG_PMU_APB_PD_MM_TOP_CFG)
+		& ~(BIT_PD_MM_TOP_FORCE_SHUTDOWN),
+		REG_PMU_APB_PD_MM_TOP_CFG);
+
+	__raw_writel(__raw_readl(REG_PMU_APB_PD_GPU_TOP_CFG)
+		& ~(BIT_PD_GPU_TOP_FORCE_SHUTDOWN),
+		REG_PMU_APB_PD_GPU_TOP_CFG);
+
+	__raw_writel(__raw_readl(REG_AON_APB_APB_EB0) | BIT_MM_EB |
+		BIT_GPU_EB, REG_AON_APB_APB_EB0);
+
+	__raw_writel(__raw_readl(REG_MM_AHB_AHB_EB) | BIT_MM_CKG_EB,
+		REG_MM_AHB_AHB_EB);
+	__raw_writel(__raw_readl(REG_MM_AHB_GEN_CKG_CFG)
+		| BIT_MM_MTX_AXI_CKG_EN | BIT_MM_AXI_CKG_EN,
+		REG_MM_AHB_GEN_CKG_CFG);
+	__raw_writel(__raw_readl(REG_MM_CLK_MM_AHB_CFG) | 0x3,
+		REG_MM_CLK_MM_AHB_CFG);
+}
+
+static void sprd_init_time(void)
+{
+	if(of_have_populated_dt()){
+		sc8830_pmu_init();
+		of_clk_init(NULL);
+		clocksource_of_init();
+	}else{
+		sci_clock_init();
+		sci_enable_timer_early();
+		sci_timer_init();
+	}
+}
+static const char *sprd_boards_compat[] __initdata = {
+	"sprd,scx35",
+	NULL,
+};
+extern struct smp_operations sprd_smp_ops;
+
+MACHINE_START(SCPHONE, "sc8830")
+	.smp		= smp_ops(sprd_smp_ops),
+	.reserve	= sci_reserve,
+	.map_io		= sci_map_io,
+	.init_irq	= sci_init_irq,
+	.init_time	= sprd_init_time,
+	.init_machine	= sc8830_init_machine,
+	.init_late	= sc8830_init_late,
+	.dt_compat	= sprd_boards_compat,
+MACHINE_END
+
diff --git a/arch/arm/mach-sc/board-sharkls_z3lte.c b/arch/arm/mach-sc/board-sharkls_z3lte.c
new file mode 100644
index 00000000..583aa566
--- /dev/null
+++ b/arch/arm/mach-sc/board-sharkls_z3lte.c
@@ -0,0 +1,375 @@
+/*
+ * Copyright (C) 2014 Spreadtrum Communications Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/delay.h>
+#include <linux/export.h>
+#include <linux/irqchip/arm-gic.h>
+#include <linux/input.h>
+
+#include <asm/io.h>
+#include <asm/setup.h>
+#include <asm/mach/time.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach-types.h>
+#include <asm/hardware/cache-l2x0.h>
+#include <asm/localtimer.h>
+#include <linux/of_platform.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/clocksource.h>
+#include <linux/clk-provider.h>
+#include <soc/sprd/hardware.h>
+#include <linux/i2c.h>
+#if (defined(CONFIG_INPUT_LIS3DH_I2C) || defined(CONFIG_INPUT_LIS3DH_I2C_MODULE))
+#include <linux/i2c/lis3dh.h>
+#endif
+#if (defined(CONFIG_INPUT_LTR558_I2C) || defined(CONFIG_INPUT_LTR558_I2C_MODULE))
+#include <linux/i2c/ltr_558als.h>
+#endif
+#if (defined(CONFIG_TOUCHSCREEN_MSG2138) || defined(CONFIG_TOUCHSCREEN_MSG2138_MODULE))
+#include <linux/i2c/msg2138.h>
+#endif
+#include <linux/spi/spi.h>
+#include <linux/gpio.h>
+#include <soc/sprd/board.h>
+#include <soc/sprd/serial_sprd.h>
+#include <soc/sprd/adi.h>
+#include <soc/sprd/adc.h>
+#include <soc/sprd/pinmap.h>
+#include <linux/irq.h>
+#include <linux/input/matrix_keypad.h>
+
+#include <soc/sprd/sci.h>
+#include <soc/sprd/kpd.h>
+#include <soc/sprd/sci_glb_regs.h>
+
+#if (defined(CONFIG_INV_MPU_IIO) || defined(CONFIG_INV_MPU_IIO_MODULE))
+#include <linux/mpu.h>
+#endif
+#if (defined(CONFIG_SENSORS_AK8975) || defined(CONFIG_SENSORS_AK8975_MODULE))
+#include <linux/akm8975.h>
+#endif
+
+
+/* IRQ's for the multi sensor board */
+#define MPUIRQ_GPIO 212
+#include <linux/regulator/consumer.h>
+#include <soc/sprd/regulator.h>
+#if (defined(CONFIG_TOUCHSCREEN_FOCALTECH) || defined(CONFIG_TOUCHSCREEN_FOCALTECH_MODULE))
+#include <linux/i2c/focaltech.h>
+#endif
+
+#if (defined(CONFIG_KEYBOARD_SC) || defined (CONFIG_KEYBOARD_SC_MODULE))
+#include <linux/input/matrix_keypad.h>
+#include <soc/sprd/kpd.h>
+#endif
+#if (defined(CONFIG_KEYBOARD_GPIO) || defined (CONFIG_KEYBOARD_GPIO_MODULE))
+#include <linux/gpio_keys.h>
+#endif
+#if (defined(CONFIG_KEYBOARD_SPRD_EIC) || defined(CONFIG_KEYBOARD_SPRD_EIC_MODULE))
+#include <linux/sprd_eic_keys.h>
+#endif
+#if (defined(CONFIG_BACKLIGHT_SPRD_PWM) || defined(CONFIG_BACKLIGHT_SPRD_PWM_MODULE))
+#include <linux/sprd_pwm_bl.h>
+#endif
+#if (defined(CONFIG_INPUT_HEADSET_SPRD_SC2723) || defined(CONFIG_INPUT_HEADSET_SPRD_SC2723_MODULE))
+#include <linux/headset_sprd_sc2723.h>
+#endif
+extern void bluesleep_setup_uart_port(struct platform_device *uart_dev);
+extern void __init sci_reserve(void);
+extern void __init sci_map_io(void);
+extern void __init sci_init_irq(void);
+extern void __init sci_timer_init(void);
+extern int __init sci_clock_init(void);
+extern int __init sci_regulator_init(void);
+
+struct class *sec_class;
+EXPORT_SYMBOL(sec_class);
+int __init __clock_init_early(void)
+{
+#if !defined(CONFIG_ARCH_SCX15)
+	pr_info("ahb ctl0 %08x, ctl2 %0x8 glb aon apb0 %08x aon apb1 %08x clk_en %08x\n",
+		sci_glb_raw_read(REG_AP_AHB_AHB_EB),
+		sci_glb_raw_read(REG_AP_AHB_AHB_RST),
+		sci_glb_raw_read(REG_AON_APB_APB_EB0),
+		sci_glb_raw_read(REG_AON_APB_APB_EB1),
+		sci_glb_raw_read(REG_AON_CLK_PUB_AHB_CFG));
+#endif
+
+	sci_glb_clr(REG_AP_AHB_AHB_EB,
+		BIT_BUSMON2_EB		|
+		BIT_BUSMON1_EB		|
+		BIT_BUSMON0_EB		|
+		BIT_SPINLOCK_EB		|
+#if !defined(CONFIG_ARCH_SCX35L)
+		BIT_GPS_EB		|
+#endif
+		BIT_EMMC_EB		|
+		BIT_SDIO2_EB		|
+		BIT_SDIO1_EB		|
+		BIT_SDIO0_EB		|
+		BIT_DRM_EB		|
+		BIT_NFC_EB		|
+		BIT_DMA_EB		|
+		BIT_USB_EB		|
+#if !defined(CONFIG_ARCH_SCX35L)
+		BIT_GSP_EB		|
+		BIT_DISPC1_EB		|
+#endif
+		0);
+	sci_glb_clr(REG_AP_APB_APB_EB,
+		BIT_INTC3_EB		|
+		BIT_INTC2_EB		|
+		BIT_INTC1_EB		|
+		BIT_IIS1_EB		|
+		BIT_UART2_EB		|
+		BIT_UART0_EB		|
+		BIT_SPI1_EB		|
+		BIT_SPI0_EB		|
+		BIT_IIS0_EB		|
+		BIT_I2C0_EB		|
+		BIT_SPI2_EB		|
+		BIT_UART3_EB		|
+		0);
+	sci_glb_clr(REG_AON_APB_APB_RTC_EB,
+		BIT_KPD_RTC_EB		|
+		BIT_KPD_EB		|
+		BIT_EFUSE_EB		|
+		0);
+
+	sci_glb_clr(REG_AON_APB_APB_EB0,
+		BIT_AUDIF_EB			|
+		BIT_VBC_EB			|
+		BIT_PWM3_EB			|
+		BIT_PWM1_EB			|
+		0);
+	sci_glb_clr(REG_AON_APB_APB_EB1,
+		BIT_AUX1_EB			|
+		BIT_AUX0_EB			|
+		0);
+#if defined(CONFIG_MACH_SHARKLS_Z3LTE)
+	sci_glb_set(REG_AON_APB_APB_EB1, BIT_CODEC_EB | 0);
+#endif
+	printk("sc clock module early init ok\n");
+	return 0;
+}
+
+static inline int __sci_get_chip_id(void)
+{
+	return __raw_readl(CHIP_ID_LOW_REG);
+}
+
+const struct of_device_id of_sprd_default_bus_match_table[] = {
+	{ .compatible = "simple-bus", },
+	{ .compatible = "sprd,adi-bus", },
+	{}
+};
+
+static struct of_dev_auxdata of_sprd_default_bus_lookup[] = {
+	 { .compatible = "sprd,sprd_backlight",  .name = "sprd_backlight" },
+#if(defined(CONFIG_BACKLIGHT_SPRD_PWM)||defined(CONFIG_BACKLIGHT_SPRD_PWM_MODULE))
+	{ .compatible = "sprd,sprd_pwm_bl",  .name = "sprd_pwm_bl" },
+#endif
+#if (defined(CONFIG_KEYBOARD_SC) || defined(CONFIG_KEYBOARD_SC_MODULE))
+	{.compatible = "sprd,sci-keypad", .name = "sci-keypad" },
+#endif
+#if (defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE))
+	{.compatible = "gpio-keys", .name = "gpio-keys" },
+#endif
+#if (defined(CONFIG_KEYBOARD_SPRD_EIC) || defined(CONFIG_KEYBOARD_SPRD_EIC_MODULE))
+	{.compatible = "sprd,sprd-eic-keys", .name = "sprd-eic-keys" },
+#endif
+#if (defined(CONFIG_INPUT_HEADSET_SPRD_SC2723) || defined(CONFIG_INPUT_HEADSET_SPRD_SC2723_MODULE))
+	{ .compatible = "sprd,headset_sprd_sc2723",  .name = "headset_sprd_sc2723" },
+#endif
+	{}
+};
+
+struct iotable_sprd io_addr_sprd;
+EXPORT_SYMBOL(io_addr_sprd);
+
+int iotable_build()
+{
+	struct device_node *np;
+	struct resource res;
+
+#define ADD_SPRD_DEVICE(compat, id)			\
+do {							\
+	np = of_find_compatible_node(NULL, NULL, compat);\
+	if (of_can_translate_address(np)) {		\
+		of_address_to_resource(np, 0, &res);	\
+		io_addr_sprd.id.paddr = res.start;	\
+		io_addr_sprd.id.length =		\
+			resource_size(&res);		\
+		io_addr_sprd.id.vaddr =			\
+		ioremap_nocache(res.start, io_addr_sprd.id.length);\
+		pr_debug("sprd io map: phys=%08x virt=%08x size=%08x\n", \
+	io_addr_sprd.id.paddr, io_addr_sprd.id.vaddr, io_addr_sprd.id.length);\
+	}						\
+} while (0)
+#define ADD_SPRD_DEVICE_BY_NAME(name, id)		\
+do {							\
+	np = of_find_node_by_name(NULL, name);		\
+	if (of_can_translate_address(np)) {		\
+		of_address_to_resource(np, 0, &res);	\
+		io_addr_sprd.id.paddr = res.start;	\
+		io_addr_sprd.id.length =		\
+			resource_size(&res);		\
+		io_addr_sprd.id.vaddr =			\
+		ioremap_nocache(res.start, io_addr_sprd.id.length);\
+		pr_debug("sprd io map: phys=%16lx virt=%16lx size=%16lx\n", \
+	io_addr_sprd.id.paddr, io_addr_sprd.id.vaddr, io_addr_sprd.id.length);\
+	}						\
+} while (0)
+	ADD_SPRD_DEVICE("sprd,ahb", AHB);
+	ADD_SPRD_DEVICE("sprd,aonapb", AONAPB);
+	ADD_SPRD_DEVICE("sprd,aonckg", AONCKG);
+	ADD_SPRD_DEVICE("sprd,apbreg", APBREG);
+	ADD_SPRD_DEVICE("sprd,core", CORE);
+	ADD_SPRD_DEVICE("sprd,mmahb", MMAHB);
+	ADD_SPRD_DEVICE("sprd,pmu", PMU);
+	ADD_SPRD_DEVICE("sprd,mmckg", MMCKG);
+	ADD_SPRD_DEVICE("sprd,gpuapb", GPUAPB);
+	ADD_SPRD_DEVICE("sprd,apbckg", APBCKG);
+	ADD_SPRD_DEVICE("sprd,gpuckg", GPUCKG);
+	ADD_SPRD_DEVICE("sprd,int", INT);
+	ADD_SPRD_DEVICE("sprd,intc0", INTC0);
+	ADD_SPRD_DEVICE("sprd,intc1", INTC1);
+	ADD_SPRD_DEVICE("sprd,intc2", INTC2);
+	ADD_SPRD_DEVICE("sprd,intc3", INTC3);
+	ADD_SPRD_DEVICE("sprd,uidefuse", UIDEFUSE);
+	ADD_SPRD_DEVICE("sprd,isp", ISP);
+	ADD_SPRD_DEVICE("sprd,ca7wdg", CA7WDG);
+	ADD_SPRD_DEVICE("sprd,csi2", CSI2);
+	ADD_SPRD_DEVICE("sprd,d-eic-gpio", EIC);
+	ADD_SPRD_DEVICE("sprd,wdg", WDG);
+	ADD_SPRD_DEVICE("sprd,ipi", IPI);
+	ADD_SPRD_DEVICE("sprd,dcam", DCAM);
+	ADD_SPRD_DEVICE("sprd,syscnt", SYSCNT);
+	ADD_SPRD_DEVICE("sprd,dma0", DMA0);
+	ADD_SPRD_DEVICE("sprd,pub", PUB);
+	ADD_SPRD_DEVICE("sprd,pin", PIN);
+	ADD_SPRD_DEVICE("sprd,d-gpio-gpio", GPIO);
+	ADD_SPRD_DEVICE("sprd,codecahb", CODECAHB);
+	ADD_SPRD_DEVICE_BY_NAME("hwspinlock0", HWSPINLOCK0);
+	ADD_SPRD_DEVICE_BY_NAME("hwspinlock1", HWSPINLOCK1);
+
+	return 0;
+}
+
+static void __init sc8830_init_machine(void)
+{
+	printk("sci get chip id = 0x%x\n", __sci_get_chip_id());
+
+	sci_adc_init();
+#ifndef CONFIG_MACH_SPX35LFPGA
+	sci_regulator_init();
+#endif
+	of_sprd_default_bus_lookup[0].phys_addr = 0x20300000;
+	of_sprd_default_bus_lookup[1].phys_addr = 0x20400000;
+	of_sprd_default_bus_lookup[2].phys_addr = 0x20500000;
+	of_sprd_default_bus_lookup[3].phys_addr = 0x20600000;
+	of_platform_populate(NULL, of_sprd_default_bus_match_table, of_sprd_default_bus_lookup, NULL);
+	sec_class = class_create(THIS_MODULE, "sec");
+	if (IS_ERR(sec_class)) {
+		pr_err("Failed to create class(sec)!\n");
+		printk("Failed create class \n");
+		return PTR_ERR(sec_class);
+	}
+}
+#ifdef CONFIG_OF
+const struct of_device_id of_sprd_late_bus_match_table[] = {
+	{ .compatible = "sprd,sound", },
+	{}
+};
+#endif
+
+static void __init sc8830_init_late(void)
+{
+	of_platform_populate(of_find_node_by_path("/sprd-audio-devices"),
+				of_sprd_late_bus_match_table, NULL, NULL);
+}
+
+
+extern void __init sci_enable_timer_early(void);
+extern void __init sc_init_chip_id(void);
+
+void __init sprd_init_before_irq(void)
+{
+	iotable_build();
+	sc_init_chip_id();
+	/* earlier init request than irq and timer */
+	__clock_init_early();
+	/*ipi reg init for sipc*/
+	sci_glb_set(REG_AON_APB_APB_EB0, BIT_IPI_EB);
+}
+
+static void __init sc8830_pmu_init(void)
+{
+	__raw_writel(__raw_readl(REG_PMU_APB_PD_MM_TOP_CFG)
+		& ~(BIT_PD_MM_TOP_FORCE_SHUTDOWN),
+		REG_PMU_APB_PD_MM_TOP_CFG);
+
+	while (__raw_readl(REG_PMU_APB_PWR_STATUS0_DBG) & 0xf0000000) {};
+
+	__raw_writel(__raw_readl(REG_PMU_APB_PD_GPU_TOP_CFG)
+		& ~(BIT_PD_GPU_TOP_FORCE_SHUTDOWN),
+		REG_PMU_APB_PD_GPU_TOP_CFG);
+
+	while (__raw_readl(REG_PMU_APB_PWR_STATUS0_DBG) & 0x0f000000) {};
+
+	__raw_writel(__raw_readl(REG_AON_APB_APB_EB0) | BIT_MM_EB |
+		BIT_GPU_EB, REG_AON_APB_APB_EB0);
+	__raw_writel(__raw_readl(REG_MM_AHB_AHB_EB) | BIT_MM_CKG_EB,
+		REG_MM_AHB_AHB_EB);
+	__raw_writel(__raw_readl(REG_MM_AHB_GEN_CKG_CFG)
+		| BIT_MM_MTX_AXI_CKG_EN | BIT_MM_AXI_CKG_EN,
+		REG_MM_AHB_GEN_CKG_CFG);
+	__raw_writel(__raw_readl(REG_MM_CLK_MM_AHB_CFG) | 0x3,
+		REG_MM_CLK_MM_AHB_CFG);
+	__raw_writel(__raw_readl(REG_AON_APB_APB_EB1) | BIT_CODEC_EB, REG_AON_APB_APB_EB1);
+}
+
+static void sprd_init_time(void)
+{
+	if (of_have_populated_dt()) {
+		sc8830_pmu_init();
+		of_clk_init(NULL);
+		clocksource_of_init();
+	} else {
+		sci_clock_init();
+		sci_enable_timer_early();
+		sci_timer_init();
+	}
+}
+static const char *sprd_boards_compat[] __initdata = {
+	"sprd,sp8835eb",
+	NULL,
+};
+extern struct smp_operations sprd_smp_ops;
+
+MACHINE_START(SCPHONE, "sc8830")
+	.smp		= smp_ops(sprd_smp_ops),
+	.reserve	= sci_reserve,
+	.map_io		= sci_map_io,
+	.init_irq	= sci_init_irq,
+	.init_time	= sprd_init_time,
+	.init_machine	= sc8830_init_machine,
+	.init_late	= sc8830_init_late,
+	.dt_compat	= sprd_boards_compat,
+MACHINE_END
+
diff --git a/arch/arm/mach-sc/board-sp7720ea.c b/arch/arm/mach-sc/board-sp7720ea.c
new file mode 100644
index 00000000..04c77470
--- /dev/null
+++ b/arch/arm/mach-sc/board-sp7720ea.c
@@ -0,0 +1,340 @@
+/*
+ * Copyright (C) 2012 Spreadtrum Communications Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/delay.h>
+#include <linux/export.h>
+#include <linux/irqchip/arm-gic.h>
+#include <linux/input.h>
+
+#include <asm/io.h>
+#include <asm/setup.h>
+#include <asm/mach/time.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach-types.h>
+#include <linux/irqchip/arm-gic.h>
+#include <asm/hardware/cache-l2x0.h>
+#include <asm/localtimer.h>
+#include <linux/of_platform.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/clocksource.h>
+#include <linux/clk-provider.h>
+#include <soc/sprd/hardware.h>
+#include <linux/i2c.h>
+#if(defined(CONFIG_INPUT_LIS3DH_I2C)||defined(CONFIG_INPUT_LIS3DH_I2C_MODULE))
+#include <linux/i2c/lis3dh.h>
+#endif
+#if(defined(CONFIG_INPUT_LTR558_I2C)||defined(CONFIG_INPUT_LTR558_I2C_MODULE))
+#include <linux/i2c/ltr_558als.h>
+#endif
+#include <linux/spi/spi.h>
+#include <linux/gpio.h>
+#include <soc/sprd/board.h>
+#include <soc/sprd/serial_sprd.h>
+#include <soc/sprd/adi.h>
+#include <soc/sprd/adc.h>
+#include <soc/sprd/pinmap.h>
+#include <linux/irq.h>
+#include <linux/input/matrix_keypad.h>
+
+#include <soc/sprd/sci.h>
+#include <soc/sprd/hardware.h>
+#include <soc/sprd/kpd.h>
+#include <soc/sprd/sci_glb_regs.h>
+
+#if(defined(CONFIG_INV_MPU_IIO)||defined(CONFIG_INV_MPU_IIO_MODULE))
+#include <linux/mpu.h>
+#endif
+#if(defined(CONFIG_SENSORS_AK8975)||defined(CONFIG_SENSORS_AK8975_MODULE))
+#include <linux/akm8975.h>
+#endif
+
+//#include "devices.h"
+
+#include <linux/regulator/consumer.h>
+#include <soc/sprd/regulator.h>
+#if(defined(CONFIG_TOUCHSCREEN_FOCALTECH)||defined(CONFIG_TOUCHSCREEN_FOCALTECH_MODULE))
+#include <linux/i2c/focaltech.h>
+#endif
+#include <soc/sprd/i2s.h>
+#include <linux/sprd_2351.h>
+
+#if(defined(CONFIG_KEYBOARD_SC)||defined(CONFIG_KEYBOARD_SC_MODULE))
+#include <linux/input/matrix_keypad.h>
+#include <soc/sprd/kpd.h>
+#endif
+#if(defined(CONFIG_KEYBOARD_GPIO)||defined(CONFIG_KEYBOARD_GPIO_MODULE))
+#include <linux/gpio_keys.h>
+#endif
+#if(defined(CONFIG_KEYBOARD_SPRD_EIC)||defined(CONFIG_KEYBOARD_SPRD_EIC_MODULE))
+#include <linux/sprd_eic_keys.h>
+#endif
+#if(defined(CONFIG_BACKLIGHT_SPRD_PWM)||defined(CONFIG_BACKLIGHT_SPRD_PWM_MODULE))
+#include <linux/sprd_pwm_bl.h>
+#endif
+#if(defined(CONFIG_INPUT_HEADSET_SPRD_SC2723)||defined(CONFIG_INPUT_HEADSET_SPRD_SC2723_MODULE))
+#include <linux/headset_sprd_sc2723.h>
+#endif
+
+extern void __init sci_reserve(void);
+extern void __init sci_map_io(void);
+extern void __init sci_init_irq(void);
+extern void __init sci_timer_init(void);
+extern int __init sci_clock_init(void);
+extern int __init sci_regulator_init(void);
+
+int __init __clock_init_early(void)
+{
+	pr_info("ahb ctl0 %08x, ctl2 %08x glb aon apb0 %08x aon apb1 %08x clk_en %08x\n",
+		sci_glb_raw_read(REG_AP_AHB_AHB_EB),
+		sci_glb_raw_read(REG_AP_AHB_AHB_RST),
+		sci_glb_raw_read(REG_AON_APB_APB_EB0),
+		sci_glb_raw_read(REG_AON_APB_APB_EB1),
+		sci_glb_raw_read(REG_AON_CLK_PUB_AHB_CFG));
+
+	sci_glb_clr(REG_AP_AHB_AHB_EB,
+		BIT_BUSMON2_EB		|
+		BIT_BUSMON1_EB		|
+		BIT_BUSMON0_EB		|
+		//BIT_SPINLOCK_EB		|
+		BIT_GPS_EB		|
+		//BIT_EMMC_EB		|
+		//BIT_SDIO2_EB		|
+		//BIT_SDIO1_EB		|
+		//BIT_SDIO0_EB		|
+		BIT_DRM_EB		|
+		BIT_NFC_EB		|
+		//BIT_DMA_EB		|
+		//BIT_USB_EB		|
+		//BIT_GSP_EB		|
+		//BIT_DISPC1_EB		|
+		//BIT_DISPC0_EB		|
+		//BIT_DSI_EB		|
+		0);
+	sci_glb_clr(REG_AP_APB_APB_EB,
+		BIT_INTC3_EB		|
+		BIT_INTC2_EB		|
+		BIT_INTC1_EB		|
+		BIT_IIS1_EB		|
+		BIT_UART2_EB		|
+		BIT_UART0_EB		|
+		BIT_SPI1_EB		|
+		BIT_SPI0_EB		|
+		BIT_IIS0_EB		|
+		BIT_I2C0_EB		|
+		BIT_SPI2_EB		|
+		BIT_UART3_EB		|
+		0);
+	sci_glb_clr(REG_AON_APB_APB_RTC_EB,
+		BIT_KPD_RTC_EB		|
+		BIT_KPD_EB		|
+		BIT_EFUSE_EB		|
+		0);
+
+	sci_glb_clr(REG_AON_APB_APB_EB0,
+		BIT_AUDIF_EB			|
+		BIT_VBC_EB			|
+		//BIT_PWM3_EB			|
+		BIT_PWM1_EB			|
+		0);
+	sci_glb_clr(REG_AON_APB_APB_EB1,
+		BIT_AUX1_EB			|
+		BIT_AUX0_EB			|
+		0);
+
+	printk("sc clock module early init ok\n");
+	return 0;
+}
+
+static inline int __sci_get_chip_id(void)
+{
+	return __raw_readl(CHIP_ID_LOW_REG);
+}
+const struct of_device_id of_sprd_default_bus_match_table[] = {
+	{ .compatible = "simple-bus", },
+	{ .compatible = "sprd,adi-bus", },
+	{}
+};
+
+static struct of_dev_auxdata of_sprd_default_bus_lookup[] = {
+	 { .compatible = "sprd,sdhci-shark",  .name = "sdio_sd",},
+	 { .compatible = "sprd,sdhci-shark",  .name = "sdio_wifi",},
+	 { .compatible = "sprd,sdhci-shark",  .name = "sprd-sdhci.2",},
+	 { .compatible = "sprd,sdhci-shark",  .name = "sdio_emmc",},
+	 { .compatible = "sprd,sprd_backlight",  .name = "sprd_backlight" },
+	 {}
+};
+
+struct iotable_sprd io_addr_sprd;
+EXPORT_SYMBOL(io_addr_sprd);
+
+int iotable_build()
+{
+	struct device_node *np;
+	struct resource res;
+
+#define ADD_SPRD_DEVICE(compat, id)			\
+do {							\
+	np = of_find_compatible_node(NULL, NULL, compat);\
+	if (of_can_translate_address(np)) {		\
+		of_address_to_resource(np, 0, &res);	\
+		io_addr_sprd.id.paddr = res.start;	\
+		io_addr_sprd.id.length =		\
+			resource_size(&res);		\
+		io_addr_sprd.id.vaddr =			\
+		ioremap_nocache(res.start, io_addr_sprd.id.length);\
+		pr_debug("sprd io map: phys=%08x virt=%08x size=%08x\n", \
+	io_addr_sprd.id.paddr, io_addr_sprd.id.vaddr, io_addr_sprd.id.length);\
+	}						\
+} while (0)
+#define ADD_SPRD_DEVICE_BY_NAME(name, id)		\
+do {							\
+	np = of_find_node_by_name(NULL, name);		\
+	if (of_can_translate_address(np)) {		\
+		of_address_to_resource(np, 0, &res);	\
+		io_addr_sprd.id.paddr = res.start;	\
+		io_addr_sprd.id.length =		\
+			resource_size(&res);		\
+		io_addr_sprd.id.vaddr =			\
+		ioremap_nocache(res.start, io_addr_sprd.id.length);\
+		pr_debug("sprd io map: phys=%16lx virt=%16lx size=%16lx\n", \
+	io_addr_sprd.id.paddr, io_addr_sprd.id.vaddr, io_addr_sprd.id.length);\
+	}						\
+} while (0)
+	ADD_SPRD_DEVICE("sprd,ahb", AHB);
+	ADD_SPRD_DEVICE("sprd,aonapb", AONAPB);
+	ADD_SPRD_DEVICE("sprd,aonckg", AONCKG);
+	ADD_SPRD_DEVICE("sprd,apbreg", APBREG);
+	ADD_SPRD_DEVICE("sprd,core", CORE);
+	ADD_SPRD_DEVICE("sprd,mmahb", MMAHB);
+	ADD_SPRD_DEVICE("sprd,pmu", PMU);
+	ADD_SPRD_DEVICE("sprd,mmckg", MMCKG);
+	ADD_SPRD_DEVICE("sprd,gpuapb", GPUAPB);
+	ADD_SPRD_DEVICE("sprd,apbckg", APBCKG);
+	ADD_SPRD_DEVICE("sprd,gpuckg", GPUCKG);
+	ADD_SPRD_DEVICE("sprd,int", INT);
+	ADD_SPRD_DEVICE("sprd,intc0", INTC0);
+	ADD_SPRD_DEVICE("sprd,intc1", INTC1);
+	ADD_SPRD_DEVICE("sprd,intc2", INTC2);
+	ADD_SPRD_DEVICE("sprd,intc3", INTC3);
+	ADD_SPRD_DEVICE("sprd,uidefuse", UIDEFUSE);
+	ADD_SPRD_DEVICE("sprd,isp", ISP);
+	ADD_SPRD_DEVICE("sprd,csi2", CSI2);
+	ADD_SPRD_DEVICE("sprd,d-eic-gpio", EIC);
+	ADD_SPRD_DEVICE("sprd,ipi", IPI);
+	ADD_SPRD_DEVICE("sprd,dcam", DCAM);
+	ADD_SPRD_DEVICE("sprd,syscnt", SYSCNT);
+	ADD_SPRD_DEVICE("sprd,dma0", DMA0);
+	ADD_SPRD_DEVICE("sprd,pub", PUB);
+	ADD_SPRD_DEVICE("sprd,pin", PIN);
+	ADD_SPRD_DEVICE("sprd,d-gpio-gpio", GPIO);
+	ADD_SPRD_DEVICE_BY_NAME("hwspinlock0", HWSPINLOCK0);
+	ADD_SPRD_DEVICE_BY_NAME("hwspinlock1", HWSPINLOCK1);
+
+	return 0;
+}
+
+static void __init sc8830_init_machine(void)
+{
+	printk("sci get chip id = 0x%x\n",__sci_get_chip_id());
+
+	//sci_adc_init((void __iomem *)ADC_BASE);
+	sci_adc_init();
+#ifndef CONFIG_SC_FPGA
+//	sci_regulator_init();
+#endif
+	of_sprd_default_bus_lookup[0].phys_addr = 0x20300000;
+	of_sprd_default_bus_lookup[1].phys_addr = 0x20400000;
+	of_sprd_default_bus_lookup[2].phys_addr = 0x20500000;
+	of_sprd_default_bus_lookup[3].phys_addr = 0x20600000;
+	of_platform_populate(NULL, of_sprd_default_bus_match_table, of_sprd_default_bus_lookup, NULL);
+	sprd_sr2351_vddwpa_ctrl_power_register();
+}
+
+const struct of_device_id of_sprd_late_bus_match_table[] = {
+	{ .compatible = "sprd,sound", },
+	{}
+};
+
+static void __init sc8830_init_late(void)
+{
+	of_platform_populate(of_find_node_by_path("/sprd-audio-devices"),
+				of_sprd_late_bus_match_table, NULL, NULL);
+}
+
+extern void __init  sci_enable_timer_early(void);
+extern void __init sc_init_chip_id(void);
+
+void __init sprd_init_before_irq(void)
+{
+	iotable_build();
+	sc_init_chip_id();
+	/* earlier init request than irq and timer */
+	__clock_init_early();
+	/*ipi reg init for sipc*/
+	sci_glb_set(REG_AON_APB_APB_EB0, BIT_IPI_EB);
+}
+static void __init sc8830_pmu_init(void)
+{
+	__raw_writel(__raw_readl(REG_PMU_APB_PD_MM_TOP_CFG)
+		& ~(BIT_PD_MM_TOP_FORCE_SHUTDOWN),
+		REG_PMU_APB_PD_MM_TOP_CFG);
+
+	__raw_writel(__raw_readl(REG_PMU_APB_PD_GPU_TOP_CFG)
+		& ~(BIT_PD_GPU_TOP_FORCE_SHUTDOWN),
+		REG_PMU_APB_PD_GPU_TOP_CFG);
+
+	__raw_writel(__raw_readl(REG_AON_APB_APB_EB0) | BIT_MM_EB |
+		BIT_GPU_EB, REG_AON_APB_APB_EB0);
+
+	__raw_writel(__raw_readl(REG_MM_AHB_AHB_EB) | BIT_MM_CKG_EB,
+		REG_MM_AHB_AHB_EB);
+	__raw_writel(__raw_readl(REG_MM_AHB_GEN_CKG_CFG)
+		| BIT_MM_MTX_AXI_CKG_EN | BIT_MM_AXI_CKG_EN,
+		REG_MM_AHB_GEN_CKG_CFG);
+	__raw_writel(__raw_readl(REG_MM_CLK_MM_AHB_CFG) | 0x3,
+		REG_MM_CLK_MM_AHB_CFG);
+}
+
+static void sprd_init_time(void)
+{
+	if(of_have_populated_dt()){
+		sc8830_pmu_init();
+		of_clk_init(NULL);
+		clocksource_of_init();
+	}else{
+		sci_clock_init();
+		sci_enable_timer_early();
+		sci_timer_init();
+	}
+}
+static const char *sprd_boards_compat[] __initdata = {
+	"sprd,sp8835eb",
+	NULL,
+};
+extern struct smp_operations sprd_smp_ops;
+
+MACHINE_START(SCPHONE, "sc8830")
+	.smp		= smp_ops(sprd_smp_ops),
+	.reserve	= sci_reserve,
+	.map_io		= sci_map_io,
+	.init_irq	= sci_init_irq,
+	.init_time	= sprd_init_time,
+	.init_machine	= sc8830_init_machine,
+	.init_late	= sc8830_init_late,
+	.dt_compat	= sprd_boards_compat,
+MACHINE_END
+
diff --git a/arch/arm/mach-sc/board-sp7731gea.c b/arch/arm/mach-sc/board-sp7731gea.c
new file mode 100755
index 00000000..9635bbb7
--- /dev/null
+++ b/arch/arm/mach-sc/board-sp7731gea.c
@@ -0,0 +1,338 @@
+/*
+ * Copyright (C) 2012 Spreadtrum Communications Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/delay.h>
+#include <linux/export.h>
+#include <linux/irqchip/arm-gic.h>
+#include <linux/input.h>
+
+#include <asm/io.h>
+#include <asm/setup.h>
+#include <asm/mach/time.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach-types.h>
+#include <linux/irqchip/arm-gic.h>
+#include <asm/hardware/cache-l2x0.h>
+#include <asm/localtimer.h>
+#include <linux/of_platform.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/clocksource.h>
+#include <linux/clk-provider.h>
+#include <soc/sprd/hardware.h>
+#include <linux/i2c.h>
+#if(defined(CONFIG_INPUT_LIS3DH_I2C)||defined(CONFIG_INPUT_LIS3DH_I2C_MODULE))
+#include <linux/i2c/lis3dh.h>
+#endif
+#if(defined(CONFIG_INPUT_LTR558_I2C)||defined(CONFIG_INPUT_LTR558_I2C_MODULE))
+#include <linux/i2c/ltr_558als.h>
+#endif
+#include <linux/spi/spi.h>
+#include <linux/gpio.h>
+#include <soc/sprd/board.h>
+#include <soc/sprd/serial_sprd.h>
+#include <soc/sprd/adi.h>
+#include <soc/sprd/adc.h>
+#include <soc/sprd/pinmap.h>
+#include <linux/irq.h>
+#include <linux/input/matrix_keypad.h>
+
+#include <soc/sprd/sci.h>
+#include <soc/sprd/hardware.h>
+#include <soc/sprd/kpd.h>
+#include <soc/sprd/sci_glb_regs.h>
+
+#if(defined(CONFIG_INV_MPU_IIO)||defined(CONFIG_INV_MPU_IIO_MODULE))
+#include <linux/mpu.h>
+#endif
+#if(defined(CONFIG_SENSORS_AK8975)||defined(CONFIG_SENSORS_AK8975_MODULE))
+#include <linux/akm8975.h>
+#endif
+
+//#include "devices.h"
+
+#include <linux/regulator/consumer.h>
+#include <soc/sprd/regulator.h>
+#if(defined(CONFIG_TOUCHSCREEN_FOCALTECH)||defined(CONFIG_TOUCHSCREEN_FOCALTECH_MODULE))
+#include <linux/i2c/focaltech.h>
+#endif
+#include <soc/sprd/i2s.h>
+#include <linux/sprd_2351.h>
+
+#if(defined(CONFIG_KEYBOARD_SC)||defined(CONFIG_KEYBOARD_SC_MODULE))
+#include <linux/input/matrix_keypad.h>
+#include <soc/sprd/kpd.h>
+#endif
+#if(defined(CONFIG_KEYBOARD_GPIO)||defined(CONFIG_KEYBOARD_GPIO_MODULE))
+#include <linux/gpio_keys.h>
+#endif
+#if(defined(CONFIG_KEYBOARD_SPRD_EIC)||defined(CONFIG_KEYBOARD_SPRD_EIC_MODULE))
+#include <linux/sprd_eic_keys.h>
+#endif
+#if(defined(CONFIG_BACKLIGHT_SPRD_PWM)||defined(CONFIG_BACKLIGHT_SPRD_PWM_MODULE))
+#include <linux/sprd_pwm_bl.h>
+#endif
+#if(defined(CONFIG_INPUT_HEADSET_SPRD_SC2723)||defined(CONFIG_INPUT_HEADSET_SPRD_SC2723_MODULE))
+#include <linux/headset_sprd_sc2723.h>
+#endif
+
+extern void __init sci_reserve(void);
+extern void __init sci_map_io(void);
+extern void __init sci_init_irq(void);
+extern void __init sci_timer_init(void);
+extern int __init sci_clock_init(void);
+extern int __init sci_regulator_init(void);
+
+int __init __clock_init_early(void)
+{
+	pr_info("ahb ctl0 %08x, ctl2 %08x glb aon apb0 %08x aon apb1 %08x clk_en %08x\n",
+		sci_glb_raw_read(REG_AP_AHB_AHB_EB),
+		sci_glb_raw_read(REG_AP_AHB_AHB_RST),
+		sci_glb_raw_read(REG_AON_APB_APB_EB0),
+		sci_glb_raw_read(REG_AON_APB_APB_EB1),
+		sci_glb_raw_read(REG_AON_CLK_PUB_AHB_CFG));
+
+	sci_glb_clr(REG_AP_AHB_AHB_EB,
+		BIT_BUSMON2_EB		|
+		BIT_BUSMON1_EB		|
+		BIT_BUSMON0_EB		|
+		//BIT_SPINLOCK_EB		|
+		BIT_GPS_EB		|
+		//BIT_EMMC_EB		|
+		//BIT_SDIO2_EB		|
+		//BIT_SDIO1_EB		|
+		//BIT_SDIO0_EB		|
+		BIT_DRM_EB		|
+		BIT_NFC_EB		|
+		//BIT_DMA_EB		|
+		//BIT_USB_EB		|
+		//BIT_GSP_EB		|
+		//BIT_DISPC1_EB		|
+		//BIT_DISPC0_EB		|
+		//BIT_DSI_EB		|
+		0);
+	sci_glb_clr(REG_AP_APB_APB_EB,
+		BIT_INTC3_EB		|
+		BIT_INTC2_EB		|
+		BIT_INTC1_EB		|
+		BIT_IIS1_EB		|
+		BIT_UART2_EB		|
+		BIT_UART0_EB		|
+		BIT_SPI1_EB		|
+		BIT_SPI0_EB		|
+		BIT_IIS0_EB		|
+		BIT_I2C0_EB		|
+		BIT_SPI2_EB		|
+		BIT_UART3_EB		|
+		0);
+	sci_glb_clr(REG_AON_APB_APB_RTC_EB,
+		BIT_KPD_RTC_EB		|
+		BIT_KPD_EB		|
+		BIT_EFUSE_EB		|
+		0);
+
+	sci_glb_clr(REG_AON_APB_APB_EB0,
+		BIT_AUDIF_EB			|
+		BIT_VBC_EB			|
+		//BIT_PWM3_EB			|
+		BIT_PWM1_EB			|
+		0);
+	sci_glb_clr(REG_AON_APB_APB_EB1,
+		BIT_AUX1_EB			|
+		BIT_AUX0_EB			|
+		0);
+
+	printk("sc clock module early init ok\n");
+	return 0;
+}
+
+static inline int __sci_get_chip_id(void)
+{
+	return __raw_readl(CHIP_ID_LOW_REG);
+}
+const struct of_device_id of_sprd_default_bus_match_table[] = {
+	{ .compatible = "simple-bus", },
+	{ .compatible = "sprd,adi-bus", },
+	{}
+};
+
+static struct of_dev_auxdata of_sprd_default_bus_lookup[] = {
+	 { .compatible = "sprd,sdhci-shark",  .name = "sdio_sd",},
+	 { .compatible = "sprd,sdhci-shark",  .name = "sdio_wifi",},
+	 { .compatible = "sprd,sdhci-shark",  .name = "sprd-sdhci.2",},
+	 { .compatible = "sprd,sdhci-shark",  .name = "sdio_emmc",},
+	 { .compatible = "sprd,sprd_backlight",  .name = "sprd_backlight" },
+	 {}
+};
+
+struct iotable_sprd io_addr_sprd;
+EXPORT_SYMBOL(io_addr_sprd);
+
+int iotable_build()
+{
+	struct device_node *np;
+	struct resource res;
+
+#define ADD_SPRD_DEVICE(compat, id)			\
+do {							\
+	np = of_find_compatible_node(NULL, NULL, compat);\
+	if (of_can_translate_address(np)) {		\
+		of_address_to_resource(np, 0, &res);	\
+		io_addr_sprd.id.paddr = res.start;	\
+		io_addr_sprd.id.length =		\
+			resource_size(&res);		\
+		io_addr_sprd.id.vaddr =			\
+		ioremap_nocache(res.start, io_addr_sprd.id.length);\
+		pr_debug("sprd io map: phys=%08x virt=%08x size=%08x\n", \
+	io_addr_sprd.id.paddr, io_addr_sprd.id.vaddr, io_addr_sprd.id.length);\
+	}						\
+} while (0)
+#define ADD_SPRD_DEVICE_BY_NAME(name, id)		\
+do {							\
+	np = of_find_node_by_name(NULL, name);		\
+	if (of_can_translate_address(np)) {		\
+		of_address_to_resource(np, 0, &res);	\
+		io_addr_sprd.id.paddr = res.start;	\
+		io_addr_sprd.id.length =		\
+			resource_size(&res);		\
+		io_addr_sprd.id.vaddr =			\
+		ioremap_nocache(res.start, io_addr_sprd.id.length);\
+		pr_debug("sprd io map: phys=%16lx virt=%16lx size=%16lx\n", \
+	io_addr_sprd.id.paddr, io_addr_sprd.id.vaddr, io_addr_sprd.id.length);\
+	}						\
+} while (0)
+	ADD_SPRD_DEVICE("sprd,ahb", AHB);
+	ADD_SPRD_DEVICE("sprd,aonapb", AONAPB);
+	ADD_SPRD_DEVICE("sprd,aonckg", AONCKG);
+	ADD_SPRD_DEVICE("sprd,apbreg", APBREG);
+	ADD_SPRD_DEVICE("sprd,core", CORE);
+	ADD_SPRD_DEVICE("sprd,mmahb", MMAHB);
+	ADD_SPRD_DEVICE("sprd,pmu", PMU);
+	ADD_SPRD_DEVICE("sprd,mmckg", MMCKG);
+	ADD_SPRD_DEVICE("sprd,gpuapb", GPUAPB);
+	ADD_SPRD_DEVICE("sprd,apbckg", APBCKG);
+	ADD_SPRD_DEVICE("sprd,gpuckg", GPUCKG);
+	ADD_SPRD_DEVICE("sprd,int", INT);
+	ADD_SPRD_DEVICE("sprd,intc0", INTC0);
+	ADD_SPRD_DEVICE("sprd,intc1", INTC1);
+	ADD_SPRD_DEVICE("sprd,intc2", INTC2);
+	ADD_SPRD_DEVICE("sprd,intc3", INTC3);
+	ADD_SPRD_DEVICE("sprd,uidefuse", UIDEFUSE);
+	ADD_SPRD_DEVICE("sprd,isp", ISP);
+	ADD_SPRD_DEVICE("sprd,csi2", CSI2);
+	ADD_SPRD_DEVICE("sprd,d-eic-gpio", EIC);
+	ADD_SPRD_DEVICE("sprd,ipi", IPI);
+	ADD_SPRD_DEVICE("sprd,dcam", DCAM);
+	ADD_SPRD_DEVICE("sprd,syscnt", SYSCNT);
+	ADD_SPRD_DEVICE("sprd,dma0", DMA0);
+	ADD_SPRD_DEVICE("sprd,pub", PUB);
+	ADD_SPRD_DEVICE("sprd,pin", PIN);
+	ADD_SPRD_DEVICE("sprd,d-gpio-gpio", GPIO);
+	ADD_SPRD_DEVICE_BY_NAME("hwspinlock0", HWSPINLOCK0);
+	ADD_SPRD_DEVICE_BY_NAME("hwspinlock1", HWSPINLOCK1);
+
+	return 0;
+}
+
+static void __init sc8830_init_machine(void)
+{
+	printk("sci get chip id = 0x%x\n",__sci_get_chip_id());
+
+	//sci_adc_init((void __iomem *)ADC_BASE);
+	sci_adc_init();
+	sci_regulator_init();
+	of_sprd_default_bus_lookup[0].phys_addr = 0x20300000;
+	of_sprd_default_bus_lookup[1].phys_addr = 0x20400000;
+	of_sprd_default_bus_lookup[2].phys_addr = 0x20500000;
+	of_sprd_default_bus_lookup[3].phys_addr = 0x20600000;
+	of_platform_populate(NULL, of_sprd_default_bus_match_table, of_sprd_default_bus_lookup, NULL);
+	sprd_sr2351_vddwpa_ctrl_power_register();
+}
+
+const struct of_device_id of_sprd_late_bus_match_table[] = {
+	{ .compatible = "sprd,sound", },
+	{}
+};
+
+static void __init sc8830_init_late(void)
+{
+	of_platform_populate(of_find_node_by_path("/sprd-audio-devices"),
+				of_sprd_late_bus_match_table, NULL, NULL);
+}
+
+extern void __init  sci_enable_timer_early(void);
+extern void __init sc_init_chip_id(void);
+
+void __init sprd_init_before_irq(void)
+{
+	iotable_build();
+	sc_init_chip_id();
+	/* earlier init request than irq and timer */
+	__clock_init_early();
+	/*ipi reg init for sipc*/
+	sci_glb_set(REG_AON_APB_APB_EB0, BIT_IPI_EB);
+}
+static void __init sc8830_pmu_init(void)
+{
+	__raw_writel(__raw_readl(REG_PMU_APB_PD_MM_TOP_CFG)
+		& ~(BIT_PD_MM_TOP_FORCE_SHUTDOWN),
+		REG_PMU_APB_PD_MM_TOP_CFG);
+
+	__raw_writel(__raw_readl(REG_PMU_APB_PD_GPU_TOP_CFG)
+		& ~(BIT_PD_GPU_TOP_FORCE_SHUTDOWN),
+		REG_PMU_APB_PD_GPU_TOP_CFG);
+
+	__raw_writel(__raw_readl(REG_AON_APB_APB_EB0) | BIT_MM_EB |
+		BIT_GPU_EB, REG_AON_APB_APB_EB0);
+
+	__raw_writel(__raw_readl(REG_MM_AHB_AHB_EB) | BIT_MM_CKG_EB,
+		REG_MM_AHB_AHB_EB);
+	__raw_writel(__raw_readl(REG_MM_AHB_GEN_CKG_CFG)
+		| BIT_MM_MTX_AXI_CKG_EN | BIT_MM_AXI_CKG_EN,
+		REG_MM_AHB_GEN_CKG_CFG);
+	__raw_writel(__raw_readl(REG_MM_CLK_MM_AHB_CFG) | 0x3,
+		REG_MM_CLK_MM_AHB_CFG);
+}
+
+static void sprd_init_time(void)
+{
+	if(of_have_populated_dt()){
+		sc8830_pmu_init();
+		of_clk_init(NULL);
+		clocksource_of_init();
+	}else{
+		sci_clock_init();
+		sci_enable_timer_early();
+		sci_timer_init();
+	}
+}
+static const char *sprd_boards_compat[] __initdata = {
+	"sprd,sp8835eb",
+	NULL,
+};
+extern struct smp_operations sprd_smp_ops;
+
+MACHINE_START(SCPHONE, "sc8830")
+	.smp		= smp_ops(sprd_smp_ops),
+	.reserve	= sci_reserve,
+	.map_io		= sci_map_io,
+	.init_irq	= sci_init_irq,
+	.init_time	= sprd_init_time,
+	.init_machine	= sc8830_init_machine,
+	.init_late	= sc8830_init_late,
+	.dt_compat	= sprd_boards_compat,
+MACHINE_END
+
diff --git a/arch/arm/mach-sc/board-sp7731gea_hd.c b/arch/arm/mach-sc/board-sp7731gea_hd.c
new file mode 100644
index 00000000..af086e64
--- /dev/null
+++ b/arch/arm/mach-sc/board-sp7731gea_hd.c
@@ -0,0 +1,347 @@
+/*
+ * Copyright (C) 2012 Spreadtrum Communications Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/delay.h>
+#include <linux/export.h>
+#include <linux/irqchip/arm-gic.h>
+#include <linux/input.h>
+
+#include <asm/io.h>
+#include <asm/setup.h>
+#include <asm/mach/time.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach-types.h>
+#include <linux/irqchip/arm-gic.h>
+#include <asm/hardware/cache-l2x0.h>
+#include <asm/localtimer.h>
+#include <linux/of_platform.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/clocksource.h>
+#include <linux/clk-provider.h>
+#include <soc/sprd/hardware.h>
+#include <linux/i2c.h>
+#if(defined(CONFIG_INPUT_LIS3DH_I2C)||defined(CONFIG_INPUT_LIS3DH_I2C_MODULE))
+#include <linux/i2c/lis3dh.h>
+#endif
+#if(defined(CONFIG_INPUT_LTR558_I2C)||defined(CONFIG_INPUT_LTR558_I2C_MODULE))
+#include <linux/i2c/ltr_558als.h>
+#endif
+#include <linux/spi/spi.h>
+#include <linux/gpio.h>
+#include <soc/sprd/board.h>
+#include <soc/sprd/serial_sprd.h>
+#include <soc/sprd/adi.h>
+#include <soc/sprd/adc.h>
+#include <soc/sprd/pinmap.h>
+#include <linux/irq.h>
+#include <linux/input/matrix_keypad.h>
+
+#include <soc/sprd/sci.h>
+#include <soc/sprd/hardware.h>
+#include <soc/sprd/kpd.h>
+#include <soc/sprd/sci_glb_regs.h>
+
+#if(defined(CONFIG_INV_MPU_IIO)||defined(CONFIG_INV_MPU_IIO_MODULE))
+#include <linux/mpu.h>
+#endif
+#if(defined(CONFIG_SENSORS_AK8975)||defined(CONFIG_SENSORS_AK8975_MODULE))
+#include <linux/akm8975.h>
+#endif
+
+//#include "devices.h"
+
+#include <linux/regulator/consumer.h>
+#include <soc/sprd/regulator.h>
+#if(defined(CONFIG_TOUCHSCREEN_FOCALTECH)||defined(CONFIG_TOUCHSCREEN_FOCALTECH_MODULE))
+#include <linux/i2c/focaltech.h>
+#endif
+#include <soc/sprd/i2s.h>
+#include <linux/sprd_2351.h>
+
+#if(defined(CONFIG_KEYBOARD_SC)||defined(CONFIG_KEYBOARD_SC_MODULE))
+#include <linux/input/matrix_keypad.h>
+#include <soc/sprd/kpd.h>
+#endif
+#if(defined(CONFIG_KEYBOARD_GPIO)||defined(CONFIG_KEYBOARD_GPIO_MODULE))
+#include <linux/gpio_keys.h>
+#endif
+#if(defined(CONFIG_KEYBOARD_SPRD_EIC)||defined(CONFIG_KEYBOARD_SPRD_EIC_MODULE))
+#include <linux/sprd_eic_keys.h>
+#endif
+#if(defined(CONFIG_BACKLIGHT_SPRD_PWM)||defined(CONFIG_BACKLIGHT_SPRD_PWM_MODULE))
+#include <linux/sprd_pwm_bl.h>
+#endif
+#if(defined(CONFIG_INPUT_HEADSET_SPRD_SC2723)||defined(CONFIG_INPUT_HEADSET_SPRD_SC2723_MODULE))
+#include <linux/headset_sprd_sc2723.h>
+#endif
+
+extern void __init sci_reserve(void);
+extern void __init sci_map_io(void);
+extern void __init sci_init_irq(void);
+extern void __init sci_timer_init(void);
+extern int __init sci_clock_init(void);
+extern int __init sci_regulator_init(void);
+
+#if(defined(CONFIG_BACKLIGHT_SPRD_PWM)||defined(CONFIG_BACKLIGHT_SPRD_PWM_MODULE))
+static struct sprd_pwm_bl_platform_data sprd_pwm_bl_platform_data = {
+	.brightness_max = 255,
+	.brightness_min = 0,
+	.pwm_index = 3,
+	.gpio_ctrl_pin = -1,
+	.gpio_active_level = 0,
+};
+#endif
+int __init __clock_init_early(void)
+{
+	pr_info("ahb ctl0 %08x, ctl2 %08x glb aon apb0 %08x aon apb1 %08x clk_en %08x\n",
+		sci_glb_raw_read(REG_AP_AHB_AHB_EB),
+		sci_glb_raw_read(REG_AP_AHB_AHB_RST),
+		sci_glb_raw_read(REG_AON_APB_APB_EB0),
+		sci_glb_raw_read(REG_AON_APB_APB_EB1),
+		sci_glb_raw_read(REG_AON_CLK_PUB_AHB_CFG));
+
+	sci_glb_clr(REG_AP_AHB_AHB_EB,
+		BIT_BUSMON2_EB		|
+		BIT_BUSMON1_EB		|
+		BIT_BUSMON0_EB		|
+		//BIT_SPINLOCK_EB		|
+		BIT_GPS_EB		|
+		//BIT_EMMC_EB		|
+		//BIT_SDIO2_EB		|
+		//BIT_SDIO1_EB		|
+		//BIT_SDIO0_EB		|
+		BIT_DRM_EB		|
+		BIT_NFC_EB		|
+		//BIT_DMA_EB		|
+		//BIT_USB_EB		|
+		//BIT_GSP_EB		|
+		//BIT_DISPC1_EB		|
+		//BIT_DISPC0_EB		|
+		//BIT_DSI_EB		|
+		0);
+	sci_glb_clr(REG_AP_APB_APB_EB,
+		BIT_INTC3_EB		|
+		BIT_INTC2_EB		|
+		BIT_INTC1_EB		|
+		BIT_IIS1_EB		|
+		BIT_UART2_EB		|
+		BIT_UART0_EB		|
+		BIT_SPI1_EB		|
+		BIT_SPI0_EB		|
+		BIT_IIS0_EB		|
+		BIT_I2C0_EB		|
+		BIT_SPI2_EB		|
+		BIT_UART3_EB		|
+		0);
+	sci_glb_clr(REG_AON_APB_APB_RTC_EB,
+		BIT_KPD_RTC_EB		|
+		BIT_KPD_EB		|
+		BIT_EFUSE_EB		|
+		0);
+
+	sci_glb_clr(REG_AON_APB_APB_EB0,
+		BIT_AUDIF_EB			|
+		BIT_VBC_EB			|
+		//BIT_PWM3_EB			|
+		BIT_PWM1_EB			|
+		0);
+	sci_glb_clr(REG_AON_APB_APB_EB1,
+		BIT_AUX1_EB			|
+		BIT_AUX0_EB			|
+		0);
+
+	printk("sc clock module early init ok\n");
+	return 0;
+}
+
+static inline int __sci_get_chip_id(void)
+{
+	return __raw_readl(CHIP_ID_LOW_REG);
+}
+const struct of_device_id of_sprd_default_bus_match_table[] = {
+	{ .compatible = "simple-bus", },
+	{ .compatible = "sprd,adi-bus", },
+	{}
+};
+
+static struct of_dev_auxdata of_sprd_default_bus_lookup[] = {
+	 { .compatible = "sprd,sdhci-shark",  .name = "sdio_sd",},
+	 { .compatible = "sprd,sdhci-shark",  .name = "sdio_wifi",},
+	 { .compatible = "sprd,sdhci-shark",  .name = "sprd-sdhci.2",},
+	 { .compatible = "sprd,sdhci-shark",  .name = "sdio_emmc",},
+	 { .compatible = "sprd,sprd_backlight",  .name = "sprd_backlight" },
+	 {}
+};
+
+struct iotable_sprd io_addr_sprd;
+EXPORT_SYMBOL(io_addr_sprd);
+
+int iotable_build()
+{
+	struct device_node *np;
+	struct resource res;
+
+#define ADD_SPRD_DEVICE(compat, id)			\
+do {							\
+	np = of_find_compatible_node(NULL, NULL, compat);\
+	if (of_can_translate_address(np)) {		\
+		of_address_to_resource(np, 0, &res);	\
+		io_addr_sprd.id.paddr = res.start;	\
+		io_addr_sprd.id.length =		\
+			resource_size(&res);		\
+		io_addr_sprd.id.vaddr =			\
+		ioremap_nocache(res.start, io_addr_sprd.id.length);\
+		pr_debug("sprd io map: phys=%08x virt=%08x size=%08x\n", \
+	io_addr_sprd.id.paddr, io_addr_sprd.id.vaddr, io_addr_sprd.id.length);\
+	}						\
+} while (0)
+#define ADD_SPRD_DEVICE_BY_NAME(name, id)		\
+do {							\
+	np = of_find_node_by_name(NULL, name);		\
+	if (of_can_translate_address(np)) {		\
+		of_address_to_resource(np, 0, &res);	\
+		io_addr_sprd.id.paddr = res.start;	\
+		io_addr_sprd.id.length =		\
+			resource_size(&res);		\
+		io_addr_sprd.id.vaddr =			\
+		ioremap_nocache(res.start, io_addr_sprd.id.length);\
+		pr_debug("sprd io map: phys=%16lx virt=%16lx size=%16lx\n", \
+	io_addr_sprd.id.paddr, io_addr_sprd.id.vaddr, io_addr_sprd.id.length);\
+	}						\
+} while (0)
+	ADD_SPRD_DEVICE("sprd,ahb", AHB);
+	ADD_SPRD_DEVICE("sprd,aonapb", AONAPB);
+	ADD_SPRD_DEVICE("sprd,aonckg", AONCKG);
+	ADD_SPRD_DEVICE("sprd,apbreg", APBREG);
+	ADD_SPRD_DEVICE("sprd,core", CORE);
+	ADD_SPRD_DEVICE("sprd,mmahb", MMAHB);
+	ADD_SPRD_DEVICE("sprd,pmu", PMU);
+	ADD_SPRD_DEVICE("sprd,mmckg", MMCKG);
+	ADD_SPRD_DEVICE("sprd,gpuapb", GPUAPB);
+	ADD_SPRD_DEVICE("sprd,apbckg", APBCKG);
+	ADD_SPRD_DEVICE("sprd,gpuckg", GPUCKG);
+	ADD_SPRD_DEVICE("sprd,int", INT);
+	ADD_SPRD_DEVICE("sprd,intc0", INTC0);
+	ADD_SPRD_DEVICE("sprd,intc1", INTC1);
+	ADD_SPRD_DEVICE("sprd,intc2", INTC2);
+	ADD_SPRD_DEVICE("sprd,intc3", INTC3);
+	ADD_SPRD_DEVICE("sprd,uidefuse", UIDEFUSE);
+	ADD_SPRD_DEVICE("sprd,isp", ISP);
+	ADD_SPRD_DEVICE("sprd,csi2", CSI2);
+	ADD_SPRD_DEVICE("sprd,d-eic-gpio", EIC);
+	ADD_SPRD_DEVICE("sprd,ipi", IPI);
+	ADD_SPRD_DEVICE("sprd,dcam", DCAM);
+	ADD_SPRD_DEVICE("sprd,syscnt", SYSCNT);
+	ADD_SPRD_DEVICE("sprd,dma0", DMA0);
+	ADD_SPRD_DEVICE("sprd,pub", PUB);
+	ADD_SPRD_DEVICE("sprd,pin", PIN);
+	ADD_SPRD_DEVICE("sprd,d-gpio-gpio", GPIO);
+	ADD_SPRD_DEVICE_BY_NAME("hwspinlock0", HWSPINLOCK0);
+	ADD_SPRD_DEVICE_BY_NAME("hwspinlock1", HWSPINLOCK1);
+
+	return 0;
+}
+
+static void __init sc8830_init_machine(void)
+{
+	printk("sci get chip id = 0x%x\n",__sci_get_chip_id());
+
+	//sci_adc_init((void __iomem *)ADC_BASE);
+	sci_adc_init();
+	sci_regulator_init();
+	of_sprd_default_bus_lookup[0].phys_addr = 0x20300000;
+	of_sprd_default_bus_lookup[1].phys_addr = 0x20400000;
+	of_sprd_default_bus_lookup[2].phys_addr = 0x20500000;
+	of_sprd_default_bus_lookup[3].phys_addr = 0x20600000;
+	of_platform_populate(NULL, of_sprd_default_bus_match_table, of_sprd_default_bus_lookup, NULL);
+	sprd_sr2351_vddwpa_ctrl_power_register();
+}
+
+const struct of_device_id of_sprd_late_bus_match_table[] = {
+	{ .compatible = "sprd,sound", },
+	{}
+};
+
+static void __init sc8830_init_late(void)
+{
+	of_platform_populate(of_find_node_by_path("/sprd-audio-devices"),
+				of_sprd_late_bus_match_table, NULL, NULL);
+}
+
+extern void __init  sci_enable_timer_early(void);
+extern void __init sc_init_chip_id(void);
+
+void __init sprd_init_before_irq(void)
+{
+	iotable_build();
+	sc_init_chip_id();
+	/* earlier init request than irq and timer */
+	__clock_init_early();
+	/*ipi reg init for sipc*/
+	sci_glb_set(REG_AON_APB_APB_EB0, BIT_IPI_EB);
+}
+static void __init sc8830_pmu_init(void)
+{
+	__raw_writel(__raw_readl(REG_PMU_APB_PD_MM_TOP_CFG)
+		& ~(BIT_PD_MM_TOP_FORCE_SHUTDOWN),
+		REG_PMU_APB_PD_MM_TOP_CFG);
+
+	__raw_writel(__raw_readl(REG_PMU_APB_PD_GPU_TOP_CFG)
+		& ~(BIT_PD_GPU_TOP_FORCE_SHUTDOWN),
+		REG_PMU_APB_PD_GPU_TOP_CFG);
+
+	__raw_writel(__raw_readl(REG_AON_APB_APB_EB0) | BIT_MM_EB |
+		BIT_GPU_EB, REG_AON_APB_APB_EB0);
+
+	__raw_writel(__raw_readl(REG_MM_AHB_AHB_EB) | BIT_MM_CKG_EB,
+		REG_MM_AHB_AHB_EB);
+	__raw_writel(__raw_readl(REG_MM_AHB_GEN_CKG_CFG)
+		| BIT_MM_MTX_AXI_CKG_EN | BIT_MM_AXI_CKG_EN,
+		REG_MM_AHB_GEN_CKG_CFG);
+	__raw_writel(__raw_readl(REG_MM_CLK_MM_AHB_CFG) | 0x3,
+		REG_MM_CLK_MM_AHB_CFG);
+}
+
+static void sprd_init_time(void)
+{
+	if(of_have_populated_dt()){
+		sc8830_pmu_init();
+		of_clk_init(NULL);
+		clocksource_of_init();
+	}else{
+		sci_clock_init();
+		sci_enable_timer_early();
+		sci_timer_init();
+	}
+}
+static const char *sprd_boards_compat[] __initdata = {
+	"sprd,sp8835eb",
+	NULL,
+};
+extern struct smp_operations sprd_smp_ops;
+
+MACHINE_START(SCPHONE, "sc8830")
+	.smp		= smp_ops(sprd_smp_ops),
+	.reserve	= sci_reserve,
+	.map_io		= sci_map_io,
+	.init_irq	= sci_init_irq,
+	.init_time	= sprd_init_time,
+	.init_machine	= sc8830_init_machine,
+	.init_late	= sc8830_init_late,
+	.dt_compat	= sprd_boards_compat,
+MACHINE_END
+
diff --git a/arch/arm/mach-sc/board-sp7731gea_hd2.c b/arch/arm/mach-sc/board-sp7731gea_hd2.c
new file mode 100755
index 00000000..9635bbb7
--- /dev/null
+++ b/arch/arm/mach-sc/board-sp7731gea_hd2.c
@@ -0,0 +1,338 @@
+/*
+ * Copyright (C) 2012 Spreadtrum Communications Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/delay.h>
+#include <linux/export.h>
+#include <linux/irqchip/arm-gic.h>
+#include <linux/input.h>
+
+#include <asm/io.h>
+#include <asm/setup.h>
+#include <asm/mach/time.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach-types.h>
+#include <linux/irqchip/arm-gic.h>
+#include <asm/hardware/cache-l2x0.h>
+#include <asm/localtimer.h>
+#include <linux/of_platform.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/clocksource.h>
+#include <linux/clk-provider.h>
+#include <soc/sprd/hardware.h>
+#include <linux/i2c.h>
+#if(defined(CONFIG_INPUT_LIS3DH_I2C)||defined(CONFIG_INPUT_LIS3DH_I2C_MODULE))
+#include <linux/i2c/lis3dh.h>
+#endif
+#if(defined(CONFIG_INPUT_LTR558_I2C)||defined(CONFIG_INPUT_LTR558_I2C_MODULE))
+#include <linux/i2c/ltr_558als.h>
+#endif
+#include <linux/spi/spi.h>
+#include <linux/gpio.h>
+#include <soc/sprd/board.h>
+#include <soc/sprd/serial_sprd.h>
+#include <soc/sprd/adi.h>
+#include <soc/sprd/adc.h>
+#include <soc/sprd/pinmap.h>
+#include <linux/irq.h>
+#include <linux/input/matrix_keypad.h>
+
+#include <soc/sprd/sci.h>
+#include <soc/sprd/hardware.h>
+#include <soc/sprd/kpd.h>
+#include <soc/sprd/sci_glb_regs.h>
+
+#if(defined(CONFIG_INV_MPU_IIO)||defined(CONFIG_INV_MPU_IIO_MODULE))
+#include <linux/mpu.h>
+#endif
+#if(defined(CONFIG_SENSORS_AK8975)||defined(CONFIG_SENSORS_AK8975_MODULE))
+#include <linux/akm8975.h>
+#endif
+
+//#include "devices.h"
+
+#include <linux/regulator/consumer.h>
+#include <soc/sprd/regulator.h>
+#if(defined(CONFIG_TOUCHSCREEN_FOCALTECH)||defined(CONFIG_TOUCHSCREEN_FOCALTECH_MODULE))
+#include <linux/i2c/focaltech.h>
+#endif
+#include <soc/sprd/i2s.h>
+#include <linux/sprd_2351.h>
+
+#if(defined(CONFIG_KEYBOARD_SC)||defined(CONFIG_KEYBOARD_SC_MODULE))
+#include <linux/input/matrix_keypad.h>
+#include <soc/sprd/kpd.h>
+#endif
+#if(defined(CONFIG_KEYBOARD_GPIO)||defined(CONFIG_KEYBOARD_GPIO_MODULE))
+#include <linux/gpio_keys.h>
+#endif
+#if(defined(CONFIG_KEYBOARD_SPRD_EIC)||defined(CONFIG_KEYBOARD_SPRD_EIC_MODULE))
+#include <linux/sprd_eic_keys.h>
+#endif
+#if(defined(CONFIG_BACKLIGHT_SPRD_PWM)||defined(CONFIG_BACKLIGHT_SPRD_PWM_MODULE))
+#include <linux/sprd_pwm_bl.h>
+#endif
+#if(defined(CONFIG_INPUT_HEADSET_SPRD_SC2723)||defined(CONFIG_INPUT_HEADSET_SPRD_SC2723_MODULE))
+#include <linux/headset_sprd_sc2723.h>
+#endif
+
+extern void __init sci_reserve(void);
+extern void __init sci_map_io(void);
+extern void __init sci_init_irq(void);
+extern void __init sci_timer_init(void);
+extern int __init sci_clock_init(void);
+extern int __init sci_regulator_init(void);
+
+int __init __clock_init_early(void)
+{
+	pr_info("ahb ctl0 %08x, ctl2 %08x glb aon apb0 %08x aon apb1 %08x clk_en %08x\n",
+		sci_glb_raw_read(REG_AP_AHB_AHB_EB),
+		sci_glb_raw_read(REG_AP_AHB_AHB_RST),
+		sci_glb_raw_read(REG_AON_APB_APB_EB0),
+		sci_glb_raw_read(REG_AON_APB_APB_EB1),
+		sci_glb_raw_read(REG_AON_CLK_PUB_AHB_CFG));
+
+	sci_glb_clr(REG_AP_AHB_AHB_EB,
+		BIT_BUSMON2_EB		|
+		BIT_BUSMON1_EB		|
+		BIT_BUSMON0_EB		|
+		//BIT_SPINLOCK_EB		|
+		BIT_GPS_EB		|
+		//BIT_EMMC_EB		|
+		//BIT_SDIO2_EB		|
+		//BIT_SDIO1_EB		|
+		//BIT_SDIO0_EB		|
+		BIT_DRM_EB		|
+		BIT_NFC_EB		|
+		//BIT_DMA_EB		|
+		//BIT_USB_EB		|
+		//BIT_GSP_EB		|
+		//BIT_DISPC1_EB		|
+		//BIT_DISPC0_EB		|
+		//BIT_DSI_EB		|
+		0);
+	sci_glb_clr(REG_AP_APB_APB_EB,
+		BIT_INTC3_EB		|
+		BIT_INTC2_EB		|
+		BIT_INTC1_EB		|
+		BIT_IIS1_EB		|
+		BIT_UART2_EB		|
+		BIT_UART0_EB		|
+		BIT_SPI1_EB		|
+		BIT_SPI0_EB		|
+		BIT_IIS0_EB		|
+		BIT_I2C0_EB		|
+		BIT_SPI2_EB		|
+		BIT_UART3_EB		|
+		0);
+	sci_glb_clr(REG_AON_APB_APB_RTC_EB,
+		BIT_KPD_RTC_EB		|
+		BIT_KPD_EB		|
+		BIT_EFUSE_EB		|
+		0);
+
+	sci_glb_clr(REG_AON_APB_APB_EB0,
+		BIT_AUDIF_EB			|
+		BIT_VBC_EB			|
+		//BIT_PWM3_EB			|
+		BIT_PWM1_EB			|
+		0);
+	sci_glb_clr(REG_AON_APB_APB_EB1,
+		BIT_AUX1_EB			|
+		BIT_AUX0_EB			|
+		0);
+
+	printk("sc clock module early init ok\n");
+	return 0;
+}
+
+static inline int __sci_get_chip_id(void)
+{
+	return __raw_readl(CHIP_ID_LOW_REG);
+}
+const struct of_device_id of_sprd_default_bus_match_table[] = {
+	{ .compatible = "simple-bus", },
+	{ .compatible = "sprd,adi-bus", },
+	{}
+};
+
+static struct of_dev_auxdata of_sprd_default_bus_lookup[] = {
+	 { .compatible = "sprd,sdhci-shark",  .name = "sdio_sd",},
+	 { .compatible = "sprd,sdhci-shark",  .name = "sdio_wifi",},
+	 { .compatible = "sprd,sdhci-shark",  .name = "sprd-sdhci.2",},
+	 { .compatible = "sprd,sdhci-shark",  .name = "sdio_emmc",},
+	 { .compatible = "sprd,sprd_backlight",  .name = "sprd_backlight" },
+	 {}
+};
+
+struct iotable_sprd io_addr_sprd;
+EXPORT_SYMBOL(io_addr_sprd);
+
+int iotable_build()
+{
+	struct device_node *np;
+	struct resource res;
+
+#define ADD_SPRD_DEVICE(compat, id)			\
+do {							\
+	np = of_find_compatible_node(NULL, NULL, compat);\
+	if (of_can_translate_address(np)) {		\
+		of_address_to_resource(np, 0, &res);	\
+		io_addr_sprd.id.paddr = res.start;	\
+		io_addr_sprd.id.length =		\
+			resource_size(&res);		\
+		io_addr_sprd.id.vaddr =			\
+		ioremap_nocache(res.start, io_addr_sprd.id.length);\
+		pr_debug("sprd io map: phys=%08x virt=%08x size=%08x\n", \
+	io_addr_sprd.id.paddr, io_addr_sprd.id.vaddr, io_addr_sprd.id.length);\
+	}						\
+} while (0)
+#define ADD_SPRD_DEVICE_BY_NAME(name, id)		\
+do {							\
+	np = of_find_node_by_name(NULL, name);		\
+	if (of_can_translate_address(np)) {		\
+		of_address_to_resource(np, 0, &res);	\
+		io_addr_sprd.id.paddr = res.start;	\
+		io_addr_sprd.id.length =		\
+			resource_size(&res);		\
+		io_addr_sprd.id.vaddr =			\
+		ioremap_nocache(res.start, io_addr_sprd.id.length);\
+		pr_debug("sprd io map: phys=%16lx virt=%16lx size=%16lx\n", \
+	io_addr_sprd.id.paddr, io_addr_sprd.id.vaddr, io_addr_sprd.id.length);\
+	}						\
+} while (0)
+	ADD_SPRD_DEVICE("sprd,ahb", AHB);
+	ADD_SPRD_DEVICE("sprd,aonapb", AONAPB);
+	ADD_SPRD_DEVICE("sprd,aonckg", AONCKG);
+	ADD_SPRD_DEVICE("sprd,apbreg", APBREG);
+	ADD_SPRD_DEVICE("sprd,core", CORE);
+	ADD_SPRD_DEVICE("sprd,mmahb", MMAHB);
+	ADD_SPRD_DEVICE("sprd,pmu", PMU);
+	ADD_SPRD_DEVICE("sprd,mmckg", MMCKG);
+	ADD_SPRD_DEVICE("sprd,gpuapb", GPUAPB);
+	ADD_SPRD_DEVICE("sprd,apbckg", APBCKG);
+	ADD_SPRD_DEVICE("sprd,gpuckg", GPUCKG);
+	ADD_SPRD_DEVICE("sprd,int", INT);
+	ADD_SPRD_DEVICE("sprd,intc0", INTC0);
+	ADD_SPRD_DEVICE("sprd,intc1", INTC1);
+	ADD_SPRD_DEVICE("sprd,intc2", INTC2);
+	ADD_SPRD_DEVICE("sprd,intc3", INTC3);
+	ADD_SPRD_DEVICE("sprd,uidefuse", UIDEFUSE);
+	ADD_SPRD_DEVICE("sprd,isp", ISP);
+	ADD_SPRD_DEVICE("sprd,csi2", CSI2);
+	ADD_SPRD_DEVICE("sprd,d-eic-gpio", EIC);
+	ADD_SPRD_DEVICE("sprd,ipi", IPI);
+	ADD_SPRD_DEVICE("sprd,dcam", DCAM);
+	ADD_SPRD_DEVICE("sprd,syscnt", SYSCNT);
+	ADD_SPRD_DEVICE("sprd,dma0", DMA0);
+	ADD_SPRD_DEVICE("sprd,pub", PUB);
+	ADD_SPRD_DEVICE("sprd,pin", PIN);
+	ADD_SPRD_DEVICE("sprd,d-gpio-gpio", GPIO);
+	ADD_SPRD_DEVICE_BY_NAME("hwspinlock0", HWSPINLOCK0);
+	ADD_SPRD_DEVICE_BY_NAME("hwspinlock1", HWSPINLOCK1);
+
+	return 0;
+}
+
+static void __init sc8830_init_machine(void)
+{
+	printk("sci get chip id = 0x%x\n",__sci_get_chip_id());
+
+	//sci_adc_init((void __iomem *)ADC_BASE);
+	sci_adc_init();
+	sci_regulator_init();
+	of_sprd_default_bus_lookup[0].phys_addr = 0x20300000;
+	of_sprd_default_bus_lookup[1].phys_addr = 0x20400000;
+	of_sprd_default_bus_lookup[2].phys_addr = 0x20500000;
+	of_sprd_default_bus_lookup[3].phys_addr = 0x20600000;
+	of_platform_populate(NULL, of_sprd_default_bus_match_table, of_sprd_default_bus_lookup, NULL);
+	sprd_sr2351_vddwpa_ctrl_power_register();
+}
+
+const struct of_device_id of_sprd_late_bus_match_table[] = {
+	{ .compatible = "sprd,sound", },
+	{}
+};
+
+static void __init sc8830_init_late(void)
+{
+	of_platform_populate(of_find_node_by_path("/sprd-audio-devices"),
+				of_sprd_late_bus_match_table, NULL, NULL);
+}
+
+extern void __init  sci_enable_timer_early(void);
+extern void __init sc_init_chip_id(void);
+
+void __init sprd_init_before_irq(void)
+{
+	iotable_build();
+	sc_init_chip_id();
+	/* earlier init request than irq and timer */
+	__clock_init_early();
+	/*ipi reg init for sipc*/
+	sci_glb_set(REG_AON_APB_APB_EB0, BIT_IPI_EB);
+}
+static void __init sc8830_pmu_init(void)
+{
+	__raw_writel(__raw_readl(REG_PMU_APB_PD_MM_TOP_CFG)
+		& ~(BIT_PD_MM_TOP_FORCE_SHUTDOWN),
+		REG_PMU_APB_PD_MM_TOP_CFG);
+
+	__raw_writel(__raw_readl(REG_PMU_APB_PD_GPU_TOP_CFG)
+		& ~(BIT_PD_GPU_TOP_FORCE_SHUTDOWN),
+		REG_PMU_APB_PD_GPU_TOP_CFG);
+
+	__raw_writel(__raw_readl(REG_AON_APB_APB_EB0) | BIT_MM_EB |
+		BIT_GPU_EB, REG_AON_APB_APB_EB0);
+
+	__raw_writel(__raw_readl(REG_MM_AHB_AHB_EB) | BIT_MM_CKG_EB,
+		REG_MM_AHB_AHB_EB);
+	__raw_writel(__raw_readl(REG_MM_AHB_GEN_CKG_CFG)
+		| BIT_MM_MTX_AXI_CKG_EN | BIT_MM_AXI_CKG_EN,
+		REG_MM_AHB_GEN_CKG_CFG);
+	__raw_writel(__raw_readl(REG_MM_CLK_MM_AHB_CFG) | 0x3,
+		REG_MM_CLK_MM_AHB_CFG);
+}
+
+static void sprd_init_time(void)
+{
+	if(of_have_populated_dt()){
+		sc8830_pmu_init();
+		of_clk_init(NULL);
+		clocksource_of_init();
+	}else{
+		sci_clock_init();
+		sci_enable_timer_early();
+		sci_timer_init();
+	}
+}
+static const char *sprd_boards_compat[] __initdata = {
+	"sprd,sp8835eb",
+	NULL,
+};
+extern struct smp_operations sprd_smp_ops;
+
+MACHINE_START(SCPHONE, "sc8830")
+	.smp		= smp_ops(sprd_smp_ops),
+	.reserve	= sci_reserve,
+	.map_io		= sci_map_io,
+	.init_irq	= sci_init_irq,
+	.init_time	= sprd_init_time,
+	.init_machine	= sc8830_init_machine,
+	.init_late	= sc8830_init_late,
+	.dt_compat	= sprd_boards_compat,
+MACHINE_END
+
diff --git a/arch/arm/mach-sc/board-sp7731gea_hdr.c b/arch/arm/mach-sc/board-sp7731gea_hdr.c
new file mode 100755
index 00000000..af086e64
--- /dev/null
+++ b/arch/arm/mach-sc/board-sp7731gea_hdr.c
@@ -0,0 +1,347 @@
+/*
+ * Copyright (C) 2012 Spreadtrum Communications Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/delay.h>
+#include <linux/export.h>
+#include <linux/irqchip/arm-gic.h>
+#include <linux/input.h>
+
+#include <asm/io.h>
+#include <asm/setup.h>
+#include <asm/mach/time.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach-types.h>
+#include <linux/irqchip/arm-gic.h>
+#include <asm/hardware/cache-l2x0.h>
+#include <asm/localtimer.h>
+#include <linux/of_platform.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/clocksource.h>
+#include <linux/clk-provider.h>
+#include <soc/sprd/hardware.h>
+#include <linux/i2c.h>
+#if(defined(CONFIG_INPUT_LIS3DH_I2C)||defined(CONFIG_INPUT_LIS3DH_I2C_MODULE))
+#include <linux/i2c/lis3dh.h>
+#endif
+#if(defined(CONFIG_INPUT_LTR558_I2C)||defined(CONFIG_INPUT_LTR558_I2C_MODULE))
+#include <linux/i2c/ltr_558als.h>
+#endif
+#include <linux/spi/spi.h>
+#include <linux/gpio.h>
+#include <soc/sprd/board.h>
+#include <soc/sprd/serial_sprd.h>
+#include <soc/sprd/adi.h>
+#include <soc/sprd/adc.h>
+#include <soc/sprd/pinmap.h>
+#include <linux/irq.h>
+#include <linux/input/matrix_keypad.h>
+
+#include <soc/sprd/sci.h>
+#include <soc/sprd/hardware.h>
+#include <soc/sprd/kpd.h>
+#include <soc/sprd/sci_glb_regs.h>
+
+#if(defined(CONFIG_INV_MPU_IIO)||defined(CONFIG_INV_MPU_IIO_MODULE))
+#include <linux/mpu.h>
+#endif
+#if(defined(CONFIG_SENSORS_AK8975)||defined(CONFIG_SENSORS_AK8975_MODULE))
+#include <linux/akm8975.h>
+#endif
+
+//#include "devices.h"
+
+#include <linux/regulator/consumer.h>
+#include <soc/sprd/regulator.h>
+#if(defined(CONFIG_TOUCHSCREEN_FOCALTECH)||defined(CONFIG_TOUCHSCREEN_FOCALTECH_MODULE))
+#include <linux/i2c/focaltech.h>
+#endif
+#include <soc/sprd/i2s.h>
+#include <linux/sprd_2351.h>
+
+#if(defined(CONFIG_KEYBOARD_SC)||defined(CONFIG_KEYBOARD_SC_MODULE))
+#include <linux/input/matrix_keypad.h>
+#include <soc/sprd/kpd.h>
+#endif
+#if(defined(CONFIG_KEYBOARD_GPIO)||defined(CONFIG_KEYBOARD_GPIO_MODULE))
+#include <linux/gpio_keys.h>
+#endif
+#if(defined(CONFIG_KEYBOARD_SPRD_EIC)||defined(CONFIG_KEYBOARD_SPRD_EIC_MODULE))
+#include <linux/sprd_eic_keys.h>
+#endif
+#if(defined(CONFIG_BACKLIGHT_SPRD_PWM)||defined(CONFIG_BACKLIGHT_SPRD_PWM_MODULE))
+#include <linux/sprd_pwm_bl.h>
+#endif
+#if(defined(CONFIG_INPUT_HEADSET_SPRD_SC2723)||defined(CONFIG_INPUT_HEADSET_SPRD_SC2723_MODULE))
+#include <linux/headset_sprd_sc2723.h>
+#endif
+
+extern void __init sci_reserve(void);
+extern void __init sci_map_io(void);
+extern void __init sci_init_irq(void);
+extern void __init sci_timer_init(void);
+extern int __init sci_clock_init(void);
+extern int __init sci_regulator_init(void);
+
+#if(defined(CONFIG_BACKLIGHT_SPRD_PWM)||defined(CONFIG_BACKLIGHT_SPRD_PWM_MODULE))
+static struct sprd_pwm_bl_platform_data sprd_pwm_bl_platform_data = {
+	.brightness_max = 255,
+	.brightness_min = 0,
+	.pwm_index = 3,
+	.gpio_ctrl_pin = -1,
+	.gpio_active_level = 0,
+};
+#endif
+int __init __clock_init_early(void)
+{
+	pr_info("ahb ctl0 %08x, ctl2 %08x glb aon apb0 %08x aon apb1 %08x clk_en %08x\n",
+		sci_glb_raw_read(REG_AP_AHB_AHB_EB),
+		sci_glb_raw_read(REG_AP_AHB_AHB_RST),
+		sci_glb_raw_read(REG_AON_APB_APB_EB0),
+		sci_glb_raw_read(REG_AON_APB_APB_EB1),
+		sci_glb_raw_read(REG_AON_CLK_PUB_AHB_CFG));
+
+	sci_glb_clr(REG_AP_AHB_AHB_EB,
+		BIT_BUSMON2_EB		|
+		BIT_BUSMON1_EB		|
+		BIT_BUSMON0_EB		|
+		//BIT_SPINLOCK_EB		|
+		BIT_GPS_EB		|
+		//BIT_EMMC_EB		|
+		//BIT_SDIO2_EB		|
+		//BIT_SDIO1_EB		|
+		//BIT_SDIO0_EB		|
+		BIT_DRM_EB		|
+		BIT_NFC_EB		|
+		//BIT_DMA_EB		|
+		//BIT_USB_EB		|
+		//BIT_GSP_EB		|
+		//BIT_DISPC1_EB		|
+		//BIT_DISPC0_EB		|
+		//BIT_DSI_EB		|
+		0);
+	sci_glb_clr(REG_AP_APB_APB_EB,
+		BIT_INTC3_EB		|
+		BIT_INTC2_EB		|
+		BIT_INTC1_EB		|
+		BIT_IIS1_EB		|
+		BIT_UART2_EB		|
+		BIT_UART0_EB		|
+		BIT_SPI1_EB		|
+		BIT_SPI0_EB		|
+		BIT_IIS0_EB		|
+		BIT_I2C0_EB		|
+		BIT_SPI2_EB		|
+		BIT_UART3_EB		|
+		0);
+	sci_glb_clr(REG_AON_APB_APB_RTC_EB,
+		BIT_KPD_RTC_EB		|
+		BIT_KPD_EB		|
+		BIT_EFUSE_EB		|
+		0);
+
+	sci_glb_clr(REG_AON_APB_APB_EB0,
+		BIT_AUDIF_EB			|
+		BIT_VBC_EB			|
+		//BIT_PWM3_EB			|
+		BIT_PWM1_EB			|
+		0);
+	sci_glb_clr(REG_AON_APB_APB_EB1,
+		BIT_AUX1_EB			|
+		BIT_AUX0_EB			|
+		0);
+
+	printk("sc clock module early init ok\n");
+	return 0;
+}
+
+static inline int __sci_get_chip_id(void)
+{
+	return __raw_readl(CHIP_ID_LOW_REG);
+}
+const struct of_device_id of_sprd_default_bus_match_table[] = {
+	{ .compatible = "simple-bus", },
+	{ .compatible = "sprd,adi-bus", },
+	{}
+};
+
+static struct of_dev_auxdata of_sprd_default_bus_lookup[] = {
+	 { .compatible = "sprd,sdhci-shark",  .name = "sdio_sd",},
+	 { .compatible = "sprd,sdhci-shark",  .name = "sdio_wifi",},
+	 { .compatible = "sprd,sdhci-shark",  .name = "sprd-sdhci.2",},
+	 { .compatible = "sprd,sdhci-shark",  .name = "sdio_emmc",},
+	 { .compatible = "sprd,sprd_backlight",  .name = "sprd_backlight" },
+	 {}
+};
+
+struct iotable_sprd io_addr_sprd;
+EXPORT_SYMBOL(io_addr_sprd);
+
+int iotable_build()
+{
+	struct device_node *np;
+	struct resource res;
+
+#define ADD_SPRD_DEVICE(compat, id)			\
+do {							\
+	np = of_find_compatible_node(NULL, NULL, compat);\
+	if (of_can_translate_address(np)) {		\
+		of_address_to_resource(np, 0, &res);	\
+		io_addr_sprd.id.paddr = res.start;	\
+		io_addr_sprd.id.length =		\
+			resource_size(&res);		\
+		io_addr_sprd.id.vaddr =			\
+		ioremap_nocache(res.start, io_addr_sprd.id.length);\
+		pr_debug("sprd io map: phys=%08x virt=%08x size=%08x\n", \
+	io_addr_sprd.id.paddr, io_addr_sprd.id.vaddr, io_addr_sprd.id.length);\
+	}						\
+} while (0)
+#define ADD_SPRD_DEVICE_BY_NAME(name, id)		\
+do {							\
+	np = of_find_node_by_name(NULL, name);		\
+	if (of_can_translate_address(np)) {		\
+		of_address_to_resource(np, 0, &res);	\
+		io_addr_sprd.id.paddr = res.start;	\
+		io_addr_sprd.id.length =		\
+			resource_size(&res);		\
+		io_addr_sprd.id.vaddr =			\
+		ioremap_nocache(res.start, io_addr_sprd.id.length);\
+		pr_debug("sprd io map: phys=%16lx virt=%16lx size=%16lx\n", \
+	io_addr_sprd.id.paddr, io_addr_sprd.id.vaddr, io_addr_sprd.id.length);\
+	}						\
+} while (0)
+	ADD_SPRD_DEVICE("sprd,ahb", AHB);
+	ADD_SPRD_DEVICE("sprd,aonapb", AONAPB);
+	ADD_SPRD_DEVICE("sprd,aonckg", AONCKG);
+	ADD_SPRD_DEVICE("sprd,apbreg", APBREG);
+	ADD_SPRD_DEVICE("sprd,core", CORE);
+	ADD_SPRD_DEVICE("sprd,mmahb", MMAHB);
+	ADD_SPRD_DEVICE("sprd,pmu", PMU);
+	ADD_SPRD_DEVICE("sprd,mmckg", MMCKG);
+	ADD_SPRD_DEVICE("sprd,gpuapb", GPUAPB);
+	ADD_SPRD_DEVICE("sprd,apbckg", APBCKG);
+	ADD_SPRD_DEVICE("sprd,gpuckg", GPUCKG);
+	ADD_SPRD_DEVICE("sprd,int", INT);
+	ADD_SPRD_DEVICE("sprd,intc0", INTC0);
+	ADD_SPRD_DEVICE("sprd,intc1", INTC1);
+	ADD_SPRD_DEVICE("sprd,intc2", INTC2);
+	ADD_SPRD_DEVICE("sprd,intc3", INTC3);
+	ADD_SPRD_DEVICE("sprd,uidefuse", UIDEFUSE);
+	ADD_SPRD_DEVICE("sprd,isp", ISP);
+	ADD_SPRD_DEVICE("sprd,csi2", CSI2);
+	ADD_SPRD_DEVICE("sprd,d-eic-gpio", EIC);
+	ADD_SPRD_DEVICE("sprd,ipi", IPI);
+	ADD_SPRD_DEVICE("sprd,dcam", DCAM);
+	ADD_SPRD_DEVICE("sprd,syscnt", SYSCNT);
+	ADD_SPRD_DEVICE("sprd,dma0", DMA0);
+	ADD_SPRD_DEVICE("sprd,pub", PUB);
+	ADD_SPRD_DEVICE("sprd,pin", PIN);
+	ADD_SPRD_DEVICE("sprd,d-gpio-gpio", GPIO);
+	ADD_SPRD_DEVICE_BY_NAME("hwspinlock0", HWSPINLOCK0);
+	ADD_SPRD_DEVICE_BY_NAME("hwspinlock1", HWSPINLOCK1);
+
+	return 0;
+}
+
+static void __init sc8830_init_machine(void)
+{
+	printk("sci get chip id = 0x%x\n",__sci_get_chip_id());
+
+	//sci_adc_init((void __iomem *)ADC_BASE);
+	sci_adc_init();
+	sci_regulator_init();
+	of_sprd_default_bus_lookup[0].phys_addr = 0x20300000;
+	of_sprd_default_bus_lookup[1].phys_addr = 0x20400000;
+	of_sprd_default_bus_lookup[2].phys_addr = 0x20500000;
+	of_sprd_default_bus_lookup[3].phys_addr = 0x20600000;
+	of_platform_populate(NULL, of_sprd_default_bus_match_table, of_sprd_default_bus_lookup, NULL);
+	sprd_sr2351_vddwpa_ctrl_power_register();
+}
+
+const struct of_device_id of_sprd_late_bus_match_table[] = {
+	{ .compatible = "sprd,sound", },
+	{}
+};
+
+static void __init sc8830_init_late(void)
+{
+	of_platform_populate(of_find_node_by_path("/sprd-audio-devices"),
+				of_sprd_late_bus_match_table, NULL, NULL);
+}
+
+extern void __init  sci_enable_timer_early(void);
+extern void __init sc_init_chip_id(void);
+
+void __init sprd_init_before_irq(void)
+{
+	iotable_build();
+	sc_init_chip_id();
+	/* earlier init request than irq and timer */
+	__clock_init_early();
+	/*ipi reg init for sipc*/
+	sci_glb_set(REG_AON_APB_APB_EB0, BIT_IPI_EB);
+}
+static void __init sc8830_pmu_init(void)
+{
+	__raw_writel(__raw_readl(REG_PMU_APB_PD_MM_TOP_CFG)
+		& ~(BIT_PD_MM_TOP_FORCE_SHUTDOWN),
+		REG_PMU_APB_PD_MM_TOP_CFG);
+
+	__raw_writel(__raw_readl(REG_PMU_APB_PD_GPU_TOP_CFG)
+		& ~(BIT_PD_GPU_TOP_FORCE_SHUTDOWN),
+		REG_PMU_APB_PD_GPU_TOP_CFG);
+
+	__raw_writel(__raw_readl(REG_AON_APB_APB_EB0) | BIT_MM_EB |
+		BIT_GPU_EB, REG_AON_APB_APB_EB0);
+
+	__raw_writel(__raw_readl(REG_MM_AHB_AHB_EB) | BIT_MM_CKG_EB,
+		REG_MM_AHB_AHB_EB);
+	__raw_writel(__raw_readl(REG_MM_AHB_GEN_CKG_CFG)
+		| BIT_MM_MTX_AXI_CKG_EN | BIT_MM_AXI_CKG_EN,
+		REG_MM_AHB_GEN_CKG_CFG);
+	__raw_writel(__raw_readl(REG_MM_CLK_MM_AHB_CFG) | 0x3,
+		REG_MM_CLK_MM_AHB_CFG);
+}
+
+static void sprd_init_time(void)
+{
+	if(of_have_populated_dt()){
+		sc8830_pmu_init();
+		of_clk_init(NULL);
+		clocksource_of_init();
+	}else{
+		sci_clock_init();
+		sci_enable_timer_early();
+		sci_timer_init();
+	}
+}
+static const char *sprd_boards_compat[] __initdata = {
+	"sprd,sp8835eb",
+	NULL,
+};
+extern struct smp_operations sprd_smp_ops;
+
+MACHINE_START(SCPHONE, "sc8830")
+	.smp		= smp_ops(sprd_smp_ops),
+	.reserve	= sci_reserve,
+	.map_io		= sci_map_io,
+	.init_irq	= sci_init_irq,
+	.init_time	= sprd_init_time,
+	.init_machine	= sc8830_init_machine,
+	.init_late	= sc8830_init_late,
+	.dt_compat	= sprd_boards_compat,
+MACHINE_END
+
diff --git a/arch/arm/mach-sc/board-sp7731gea_qhd.c b/arch/arm/mach-sc/board-sp7731gea_qhd.c
new file mode 100755
index 00000000..9635bbb7
--- /dev/null
+++ b/arch/arm/mach-sc/board-sp7731gea_qhd.c
@@ -0,0 +1,338 @@
+/*
+ * Copyright (C) 2012 Spreadtrum Communications Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/delay.h>
+#include <linux/export.h>
+#include <linux/irqchip/arm-gic.h>
+#include <linux/input.h>
+
+#include <asm/io.h>
+#include <asm/setup.h>
+#include <asm/mach/time.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach-types.h>
+#include <linux/irqchip/arm-gic.h>
+#include <asm/hardware/cache-l2x0.h>
+#include <asm/localtimer.h>
+#include <linux/of_platform.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/clocksource.h>
+#include <linux/clk-provider.h>
+#include <soc/sprd/hardware.h>
+#include <linux/i2c.h>
+#if(defined(CONFIG_INPUT_LIS3DH_I2C)||defined(CONFIG_INPUT_LIS3DH_I2C_MODULE))
+#include <linux/i2c/lis3dh.h>
+#endif
+#if(defined(CONFIG_INPUT_LTR558_I2C)||defined(CONFIG_INPUT_LTR558_I2C_MODULE))
+#include <linux/i2c/ltr_558als.h>
+#endif
+#include <linux/spi/spi.h>
+#include <linux/gpio.h>
+#include <soc/sprd/board.h>
+#include <soc/sprd/serial_sprd.h>
+#include <soc/sprd/adi.h>
+#include <soc/sprd/adc.h>
+#include <soc/sprd/pinmap.h>
+#include <linux/irq.h>
+#include <linux/input/matrix_keypad.h>
+
+#include <soc/sprd/sci.h>
+#include <soc/sprd/hardware.h>
+#include <soc/sprd/kpd.h>
+#include <soc/sprd/sci_glb_regs.h>
+
+#if(defined(CONFIG_INV_MPU_IIO)||defined(CONFIG_INV_MPU_IIO_MODULE))
+#include <linux/mpu.h>
+#endif
+#if(defined(CONFIG_SENSORS_AK8975)||defined(CONFIG_SENSORS_AK8975_MODULE))
+#include <linux/akm8975.h>
+#endif
+
+//#include "devices.h"
+
+#include <linux/regulator/consumer.h>
+#include <soc/sprd/regulator.h>
+#if(defined(CONFIG_TOUCHSCREEN_FOCALTECH)||defined(CONFIG_TOUCHSCREEN_FOCALTECH_MODULE))
+#include <linux/i2c/focaltech.h>
+#endif
+#include <soc/sprd/i2s.h>
+#include <linux/sprd_2351.h>
+
+#if(defined(CONFIG_KEYBOARD_SC)||defined(CONFIG_KEYBOARD_SC_MODULE))
+#include <linux/input/matrix_keypad.h>
+#include <soc/sprd/kpd.h>
+#endif
+#if(defined(CONFIG_KEYBOARD_GPIO)||defined(CONFIG_KEYBOARD_GPIO_MODULE))
+#include <linux/gpio_keys.h>
+#endif
+#if(defined(CONFIG_KEYBOARD_SPRD_EIC)||defined(CONFIG_KEYBOARD_SPRD_EIC_MODULE))
+#include <linux/sprd_eic_keys.h>
+#endif
+#if(defined(CONFIG_BACKLIGHT_SPRD_PWM)||defined(CONFIG_BACKLIGHT_SPRD_PWM_MODULE))
+#include <linux/sprd_pwm_bl.h>
+#endif
+#if(defined(CONFIG_INPUT_HEADSET_SPRD_SC2723)||defined(CONFIG_INPUT_HEADSET_SPRD_SC2723_MODULE))
+#include <linux/headset_sprd_sc2723.h>
+#endif
+
+extern void __init sci_reserve(void);
+extern void __init sci_map_io(void);
+extern void __init sci_init_irq(void);
+extern void __init sci_timer_init(void);
+extern int __init sci_clock_init(void);
+extern int __init sci_regulator_init(void);
+
+int __init __clock_init_early(void)
+{
+	pr_info("ahb ctl0 %08x, ctl2 %08x glb aon apb0 %08x aon apb1 %08x clk_en %08x\n",
+		sci_glb_raw_read(REG_AP_AHB_AHB_EB),
+		sci_glb_raw_read(REG_AP_AHB_AHB_RST),
+		sci_glb_raw_read(REG_AON_APB_APB_EB0),
+		sci_glb_raw_read(REG_AON_APB_APB_EB1),
+		sci_glb_raw_read(REG_AON_CLK_PUB_AHB_CFG));
+
+	sci_glb_clr(REG_AP_AHB_AHB_EB,
+		BIT_BUSMON2_EB		|
+		BIT_BUSMON1_EB		|
+		BIT_BUSMON0_EB		|
+		//BIT_SPINLOCK_EB		|
+		BIT_GPS_EB		|
+		//BIT_EMMC_EB		|
+		//BIT_SDIO2_EB		|
+		//BIT_SDIO1_EB		|
+		//BIT_SDIO0_EB		|
+		BIT_DRM_EB		|
+		BIT_NFC_EB		|
+		//BIT_DMA_EB		|
+		//BIT_USB_EB		|
+		//BIT_GSP_EB		|
+		//BIT_DISPC1_EB		|
+		//BIT_DISPC0_EB		|
+		//BIT_DSI_EB		|
+		0);
+	sci_glb_clr(REG_AP_APB_APB_EB,
+		BIT_INTC3_EB		|
+		BIT_INTC2_EB		|
+		BIT_INTC1_EB		|
+		BIT_IIS1_EB		|
+		BIT_UART2_EB		|
+		BIT_UART0_EB		|
+		BIT_SPI1_EB		|
+		BIT_SPI0_EB		|
+		BIT_IIS0_EB		|
+		BIT_I2C0_EB		|
+		BIT_SPI2_EB		|
+		BIT_UART3_EB		|
+		0);
+	sci_glb_clr(REG_AON_APB_APB_RTC_EB,
+		BIT_KPD_RTC_EB		|
+		BIT_KPD_EB		|
+		BIT_EFUSE_EB		|
+		0);
+
+	sci_glb_clr(REG_AON_APB_APB_EB0,
+		BIT_AUDIF_EB			|
+		BIT_VBC_EB			|
+		//BIT_PWM3_EB			|
+		BIT_PWM1_EB			|
+		0);
+	sci_glb_clr(REG_AON_APB_APB_EB1,
+		BIT_AUX1_EB			|
+		BIT_AUX0_EB			|
+		0);
+
+	printk("sc clock module early init ok\n");
+	return 0;
+}
+
+static inline int __sci_get_chip_id(void)
+{
+	return __raw_readl(CHIP_ID_LOW_REG);
+}
+const struct of_device_id of_sprd_default_bus_match_table[] = {
+	{ .compatible = "simple-bus", },
+	{ .compatible = "sprd,adi-bus", },
+	{}
+};
+
+static struct of_dev_auxdata of_sprd_default_bus_lookup[] = {
+	 { .compatible = "sprd,sdhci-shark",  .name = "sdio_sd",},
+	 { .compatible = "sprd,sdhci-shark",  .name = "sdio_wifi",},
+	 { .compatible = "sprd,sdhci-shark",  .name = "sprd-sdhci.2",},
+	 { .compatible = "sprd,sdhci-shark",  .name = "sdio_emmc",},
+	 { .compatible = "sprd,sprd_backlight",  .name = "sprd_backlight" },
+	 {}
+};
+
+struct iotable_sprd io_addr_sprd;
+EXPORT_SYMBOL(io_addr_sprd);
+
+int iotable_build()
+{
+	struct device_node *np;
+	struct resource res;
+
+#define ADD_SPRD_DEVICE(compat, id)			\
+do {							\
+	np = of_find_compatible_node(NULL, NULL, compat);\
+	if (of_can_translate_address(np)) {		\
+		of_address_to_resource(np, 0, &res);	\
+		io_addr_sprd.id.paddr = res.start;	\
+		io_addr_sprd.id.length =		\
+			resource_size(&res);		\
+		io_addr_sprd.id.vaddr =			\
+		ioremap_nocache(res.start, io_addr_sprd.id.length);\
+		pr_debug("sprd io map: phys=%08x virt=%08x size=%08x\n", \
+	io_addr_sprd.id.paddr, io_addr_sprd.id.vaddr, io_addr_sprd.id.length);\
+	}						\
+} while (0)
+#define ADD_SPRD_DEVICE_BY_NAME(name, id)		\
+do {							\
+	np = of_find_node_by_name(NULL, name);		\
+	if (of_can_translate_address(np)) {		\
+		of_address_to_resource(np, 0, &res);	\
+		io_addr_sprd.id.paddr = res.start;	\
+		io_addr_sprd.id.length =		\
+			resource_size(&res);		\
+		io_addr_sprd.id.vaddr =			\
+		ioremap_nocache(res.start, io_addr_sprd.id.length);\
+		pr_debug("sprd io map: phys=%16lx virt=%16lx size=%16lx\n", \
+	io_addr_sprd.id.paddr, io_addr_sprd.id.vaddr, io_addr_sprd.id.length);\
+	}						\
+} while (0)
+	ADD_SPRD_DEVICE("sprd,ahb", AHB);
+	ADD_SPRD_DEVICE("sprd,aonapb", AONAPB);
+	ADD_SPRD_DEVICE("sprd,aonckg", AONCKG);
+	ADD_SPRD_DEVICE("sprd,apbreg", APBREG);
+	ADD_SPRD_DEVICE("sprd,core", CORE);
+	ADD_SPRD_DEVICE("sprd,mmahb", MMAHB);
+	ADD_SPRD_DEVICE("sprd,pmu", PMU);
+	ADD_SPRD_DEVICE("sprd,mmckg", MMCKG);
+	ADD_SPRD_DEVICE("sprd,gpuapb", GPUAPB);
+	ADD_SPRD_DEVICE("sprd,apbckg", APBCKG);
+	ADD_SPRD_DEVICE("sprd,gpuckg", GPUCKG);
+	ADD_SPRD_DEVICE("sprd,int", INT);
+	ADD_SPRD_DEVICE("sprd,intc0", INTC0);
+	ADD_SPRD_DEVICE("sprd,intc1", INTC1);
+	ADD_SPRD_DEVICE("sprd,intc2", INTC2);
+	ADD_SPRD_DEVICE("sprd,intc3", INTC3);
+	ADD_SPRD_DEVICE("sprd,uidefuse", UIDEFUSE);
+	ADD_SPRD_DEVICE("sprd,isp", ISP);
+	ADD_SPRD_DEVICE("sprd,csi2", CSI2);
+	ADD_SPRD_DEVICE("sprd,d-eic-gpio", EIC);
+	ADD_SPRD_DEVICE("sprd,ipi", IPI);
+	ADD_SPRD_DEVICE("sprd,dcam", DCAM);
+	ADD_SPRD_DEVICE("sprd,syscnt", SYSCNT);
+	ADD_SPRD_DEVICE("sprd,dma0", DMA0);
+	ADD_SPRD_DEVICE("sprd,pub", PUB);
+	ADD_SPRD_DEVICE("sprd,pin", PIN);
+	ADD_SPRD_DEVICE("sprd,d-gpio-gpio", GPIO);
+	ADD_SPRD_DEVICE_BY_NAME("hwspinlock0", HWSPINLOCK0);
+	ADD_SPRD_DEVICE_BY_NAME("hwspinlock1", HWSPINLOCK1);
+
+	return 0;
+}
+
+static void __init sc8830_init_machine(void)
+{
+	printk("sci get chip id = 0x%x\n",__sci_get_chip_id());
+
+	//sci_adc_init((void __iomem *)ADC_BASE);
+	sci_adc_init();
+	sci_regulator_init();
+	of_sprd_default_bus_lookup[0].phys_addr = 0x20300000;
+	of_sprd_default_bus_lookup[1].phys_addr = 0x20400000;
+	of_sprd_default_bus_lookup[2].phys_addr = 0x20500000;
+	of_sprd_default_bus_lookup[3].phys_addr = 0x20600000;
+	of_platform_populate(NULL, of_sprd_default_bus_match_table, of_sprd_default_bus_lookup, NULL);
+	sprd_sr2351_vddwpa_ctrl_power_register();
+}
+
+const struct of_device_id of_sprd_late_bus_match_table[] = {
+	{ .compatible = "sprd,sound", },
+	{}
+};
+
+static void __init sc8830_init_late(void)
+{
+	of_platform_populate(of_find_node_by_path("/sprd-audio-devices"),
+				of_sprd_late_bus_match_table, NULL, NULL);
+}
+
+extern void __init  sci_enable_timer_early(void);
+extern void __init sc_init_chip_id(void);
+
+void __init sprd_init_before_irq(void)
+{
+	iotable_build();
+	sc_init_chip_id();
+	/* earlier init request than irq and timer */
+	__clock_init_early();
+	/*ipi reg init for sipc*/
+	sci_glb_set(REG_AON_APB_APB_EB0, BIT_IPI_EB);
+}
+static void __init sc8830_pmu_init(void)
+{
+	__raw_writel(__raw_readl(REG_PMU_APB_PD_MM_TOP_CFG)
+		& ~(BIT_PD_MM_TOP_FORCE_SHUTDOWN),
+		REG_PMU_APB_PD_MM_TOP_CFG);
+
+	__raw_writel(__raw_readl(REG_PMU_APB_PD_GPU_TOP_CFG)
+		& ~(BIT_PD_GPU_TOP_FORCE_SHUTDOWN),
+		REG_PMU_APB_PD_GPU_TOP_CFG);
+
+	__raw_writel(__raw_readl(REG_AON_APB_APB_EB0) | BIT_MM_EB |
+		BIT_GPU_EB, REG_AON_APB_APB_EB0);
+
+	__raw_writel(__raw_readl(REG_MM_AHB_AHB_EB) | BIT_MM_CKG_EB,
+		REG_MM_AHB_AHB_EB);
+	__raw_writel(__raw_readl(REG_MM_AHB_GEN_CKG_CFG)
+		| BIT_MM_MTX_AXI_CKG_EN | BIT_MM_AXI_CKG_EN,
+		REG_MM_AHB_GEN_CKG_CFG);
+	__raw_writel(__raw_readl(REG_MM_CLK_MM_AHB_CFG) | 0x3,
+		REG_MM_CLK_MM_AHB_CFG);
+}
+
+static void sprd_init_time(void)
+{
+	if(of_have_populated_dt()){
+		sc8830_pmu_init();
+		of_clk_init(NULL);
+		clocksource_of_init();
+	}else{
+		sci_clock_init();
+		sci_enable_timer_early();
+		sci_timer_init();
+	}
+}
+static const char *sprd_boards_compat[] __initdata = {
+	"sprd,sp8835eb",
+	NULL,
+};
+extern struct smp_operations sprd_smp_ops;
+
+MACHINE_START(SCPHONE, "sc8830")
+	.smp		= smp_ops(sprd_smp_ops),
+	.reserve	= sci_reserve,
+	.map_io		= sci_map_io,
+	.init_irq	= sci_init_irq,
+	.init_time	= sprd_init_time,
+	.init_machine	= sc8830_init_machine,
+	.init_late	= sc8830_init_late,
+	.dt_compat	= sprd_boards_compat,
+MACHINE_END
+
diff --git a/arch/arm/mach-sc/board-sp7731gepike.c b/arch/arm/mach-sc/board-sp7731gepike.c
new file mode 100755
index 00000000..333468dc
--- /dev/null
+++ b/arch/arm/mach-sc/board-sp7731gepike.c
@@ -0,0 +1,339 @@
+/*
+ * Copyright (C) 2012 Spreadtrum Communications Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/delay.h>
+#include <linux/export.h>
+#include <linux/irqchip/arm-gic.h>
+#include <linux/input.h>
+
+#include <asm/io.h>
+#include <asm/setup.h>
+#include <asm/mach/time.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach-types.h>
+#include <linux/irqchip/arm-gic.h>
+#include <asm/hardware/cache-l2x0.h>
+#include <asm/localtimer.h>
+#include <linux/of_platform.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/clocksource.h>
+#include <linux/clk-provider.h>
+#include <soc/sprd/hardware.h>
+#include <linux/i2c.h>
+#if(defined(CONFIG_INPUT_LIS3DH_I2C)||defined(CONFIG_INPUT_LIS3DH_I2C_MODULE))
+#include <linux/i2c/lis3dh.h>
+#endif
+#if(defined(CONFIG_INPUT_LTR558_I2C)||defined(CONFIG_INPUT_LTR558_I2C_MODULE))
+#include <linux/i2c/ltr_558als.h>
+#endif
+#include <linux/spi/spi.h>
+#include <linux/gpio.h>
+#include <soc/sprd/board.h>
+#include <soc/sprd/serial_sprd.h>
+#include <soc/sprd/adi.h>
+#include <soc/sprd/adc.h>
+#include <soc/sprd/pinmap.h>
+#include <linux/irq.h>
+#include <linux/input/matrix_keypad.h>
+
+#include <soc/sprd/sci.h>
+#include <soc/sprd/hardware.h>
+#include <soc/sprd/kpd.h>
+#include <soc/sprd/sci_glb_regs.h>
+
+#if(defined(CONFIG_INV_MPU_IIO)||defined(CONFIG_INV_MPU_IIO_MODULE))
+#include <linux/mpu.h>
+#endif
+#if(defined(CONFIG_SENSORS_AK8975)||defined(CONFIG_SENSORS_AK8975_MODULE))
+#include <linux/akm8975.h>
+#endif
+
+//#include "devices.h"
+
+#include <linux/regulator/consumer.h>
+#include <soc/sprd/regulator.h>
+#if(defined(CONFIG_TOUCHSCREEN_FOCALTECH)||defined(CONFIG_TOUCHSCREEN_FOCALTECH_MODULE))
+#include <linux/i2c/focaltech.h>
+#endif
+#include <soc/sprd/i2s.h>
+#include <linux/sprd_2351.h>
+
+#if(defined(CONFIG_KEYBOARD_SC)||defined(CONFIG_KEYBOARD_SC_MODULE))
+#include <linux/input/matrix_keypad.h>
+#include <soc/sprd/kpd.h>
+#endif
+#if(defined(CONFIG_KEYBOARD_GPIO)||defined(CONFIG_KEYBOARD_GPIO_MODULE))
+#include <linux/gpio_keys.h>
+#endif
+#if(defined(CONFIG_KEYBOARD_SPRD_EIC)||defined(CONFIG_KEYBOARD_SPRD_EIC_MODULE))
+#include <linux/sprd_eic_keys.h>
+#endif
+#if(defined(CONFIG_BACKLIGHT_SPRD_PWM)||defined(CONFIG_BACKLIGHT_SPRD_PWM_MODULE))
+#include <linux/sprd_pwm_bl.h>
+#endif
+#if(defined(CONFIG_INPUT_HEADSET_SPRD_SC2723)||defined(CONFIG_INPUT_HEADSET_SPRD_SC2723_MODULE))
+#include <linux/headset_sprd_sc2723.h>
+#endif
+
+extern void __init sci_reserve(void);
+extern void __init sci_map_io(void);
+extern void __init sci_init_irq(void);
+extern void __init sci_timer_init(void);
+extern int __init sci_clock_init(void);
+extern int __init sci_regulator_init(void);
+
+int __init __clock_init_early(void)
+{
+	pr_info("ahb ctl0 %08x, ctl2 %08x glb aon apb0 %08x aon apb1 %08x clk_en %08x\n",
+		sci_glb_raw_read(REG_AP_AHB_AHB_EB),
+		sci_glb_raw_read(REG_AP_AHB_AHB_RST),
+		sci_glb_raw_read(REG_AON_APB_APB_EB0),
+		sci_glb_raw_read(REG_AON_APB_APB_EB1),
+		sci_glb_raw_read(REG_AON_CLK_PUB_AHB_CFG));
+
+	sci_glb_clr(REG_AP_AHB_AHB_EB,
+		BIT_BUSMON2_EB		|
+		BIT_BUSMON1_EB		|
+		BIT_BUSMON0_EB		|
+		//BIT_SPINLOCK_EB		|
+		BIT_GPS_EB		|
+		//BIT_EMMC_EB		|
+		//BIT_SDIO2_EB		|
+		//BIT_SDIO1_EB		|
+		//BIT_SDIO0_EB		|
+		BIT_DRM_EB		|
+		BIT_NFC_EB		|
+		//BIT_DMA_EB		|
+		//BIT_USB_EB		|
+		//BIT_GSP_EB		|
+		//BIT_DISPC1_EB		|
+		//BIT_DISPC0_EB		|
+		//BIT_DSI_EB		|
+		0);
+	sci_glb_clr(REG_AP_APB_APB_EB,
+		BIT_INTC3_EB		|
+		BIT_INTC2_EB		|
+		BIT_INTC1_EB		|
+		BIT_IIS1_EB		|
+		BIT_UART2_EB		|
+		BIT_UART0_EB		|
+		BIT_SPI1_EB		|
+		BIT_SPI0_EB		|
+		BIT_IIS0_EB		|
+		BIT_I2C0_EB		|
+		BIT_SPI2_EB		|
+		BIT_UART3_EB		|
+		0);
+	sci_glb_clr(REG_AON_APB_APB_RTC_EB,
+		BIT_KPD_RTC_EB		|
+		BIT_KPD_EB		|
+		BIT_EFUSE_EB		|
+		0);
+
+	sci_glb_clr(REG_AON_APB_APB_EB0,
+		BIT_AUDIF_EB			|
+		BIT_VBC_EB			|
+		//BIT_PWM3_EB			|
+		BIT_PWM1_EB			|
+		0);
+	sci_glb_clr(REG_AON_APB_APB_EB1,
+		BIT_AUX1_EB			|
+		BIT_AUX0_EB			|
+		0);
+
+	printk("sc clock module early init ok\n");
+	return 0;
+}
+
+static inline int __sci_get_chip_id(void)
+{
+	return __raw_readl(CHIP_ID_LOW_REG);
+}
+const struct of_device_id of_sprd_default_bus_match_table[] = {
+	{ .compatible = "simple-bus", },
+	{ .compatible = "sprd,adi-bus", },
+	{}
+};
+
+static struct of_dev_auxdata of_sprd_default_bus_lookup[] = {
+	 { .compatible = "sprd,sdhci-shark",  .name = "sdio_sd",},
+	 { .compatible = "sprd,sdhci-shark",  .name = "sdio_wifi",},
+	 { .compatible = "sprd,sdhci-shark",  .name = "sprd-sdhci.2",},
+	 { .compatible = "sprd,sdhci-shark",  .name = "sdio_emmc",},
+	 { .compatible = "sprd,sprd_backlight",  .name = "sprd_backlight" },
+	 {}
+};
+
+struct iotable_sprd io_addr_sprd;
+EXPORT_SYMBOL(io_addr_sprd);
+
+int iotable_build()
+{
+	struct device_node *np;
+	struct resource res;
+
+#define ADD_SPRD_DEVICE(compat, id)			\
+do {							\
+	np = of_find_compatible_node(NULL, NULL, compat);\
+	if (of_can_translate_address(np)) {		\
+		of_address_to_resource(np, 0, &res);	\
+		io_addr_sprd.id.paddr = res.start;	\
+		io_addr_sprd.id.length =		\
+			resource_size(&res);		\
+		io_addr_sprd.id.vaddr =			\
+		ioremap_nocache(res.start, io_addr_sprd.id.length);\
+		pr_debug("sprd io map: phys=%08x virt=%08x size=%08x\n", \
+	io_addr_sprd.id.paddr, io_addr_sprd.id.vaddr, io_addr_sprd.id.length);\
+	}						\
+} while (0)
+#define ADD_SPRD_DEVICE_BY_NAME(name, id)		\
+do {							\
+	np = of_find_node_by_name(NULL, name);		\
+	if (of_can_translate_address(np)) {		\
+		of_address_to_resource(np, 0, &res);	\
+		io_addr_sprd.id.paddr = res.start;	\
+		io_addr_sprd.id.length =		\
+			resource_size(&res);		\
+		io_addr_sprd.id.vaddr =			\
+		ioremap_nocache(res.start, io_addr_sprd.id.length);\
+		pr_debug("sprd io map: phys=%16lx virt=%16lx size=%16lx\n", \
+	io_addr_sprd.id.paddr, io_addr_sprd.id.vaddr, io_addr_sprd.id.length);\
+	}						\
+} while (0)
+	ADD_SPRD_DEVICE("sprd,ahb", AHB);
+	ADD_SPRD_DEVICE("sprd,aonapb", AONAPB);
+	ADD_SPRD_DEVICE("sprd,aonckg", AONCKG);
+	ADD_SPRD_DEVICE("sprd,apbreg", APBREG);
+	ADD_SPRD_DEVICE("sprd,core", CORE);
+	ADD_SPRD_DEVICE("sprd,mmahb", MMAHB);
+	ADD_SPRD_DEVICE("sprd,pmu", PMU);
+	ADD_SPRD_DEVICE("sprd,mmckg", MMCKG);
+	ADD_SPRD_DEVICE("sprd,gpuapb", GPUAPB);
+	ADD_SPRD_DEVICE("sprd,apbckg", APBCKG);
+	ADD_SPRD_DEVICE("sprd,gpuckg", GPUCKG);
+	ADD_SPRD_DEVICE("sprd,int", INT);
+	ADD_SPRD_DEVICE("sprd,intc0", INTC0);
+	ADD_SPRD_DEVICE("sprd,intc1", INTC1);
+	ADD_SPRD_DEVICE("sprd,intc2", INTC2);
+	ADD_SPRD_DEVICE("sprd,intc3", INTC3);
+	ADD_SPRD_DEVICE("sprd,uidefuse", UIDEFUSE);
+	ADD_SPRD_DEVICE("sprd,isp", ISP);
+	ADD_SPRD_DEVICE("sprd,csi2", CSI2);
+	ADD_SPRD_DEVICE("sprd,d-eic-gpio", EIC);
+	ADD_SPRD_DEVICE("sprd,ipi", IPI);
+	ADD_SPRD_DEVICE("sprd,dcam", DCAM);
+	ADD_SPRD_DEVICE("sprd,syscnt", SYSCNT);
+	ADD_SPRD_DEVICE("sprd,dma0", DMA0);
+	ADD_SPRD_DEVICE("sprd,pub", PUB);
+	ADD_SPRD_DEVICE("sprd,pin", PIN);
+	ADD_SPRD_DEVICE("sprd,d-gpio-gpio", GPIO);
+	ADD_SPRD_DEVICE_BY_NAME("hwspinlock0", HWSPINLOCK0);
+	ADD_SPRD_DEVICE_BY_NAME("hwspinlock1", HWSPINLOCK1);
+
+	return 0;
+}
+
+
+static void __init sc8830_init_machine(void)
+{
+	printk("sci get chip id = 0x%x\n",__sci_get_chip_id());
+
+	//sci_adc_init((void __iomem *)ADC_BASE);
+	sci_adc_init();
+	sci_regulator_init();
+	of_sprd_default_bus_lookup[0].phys_addr = 0x20300000;
+	of_sprd_default_bus_lookup[1].phys_addr = 0x20400000;
+	of_sprd_default_bus_lookup[2].phys_addr = 0x20500000;
+	of_sprd_default_bus_lookup[3].phys_addr = 0x20600000;
+	of_platform_populate(NULL, of_sprd_default_bus_match_table, of_sprd_default_bus_lookup, NULL);
+	sprd_sr2351_vddwpa_ctrl_power_register();
+}
+
+const struct of_device_id of_sprd_late_bus_match_table[] = {
+	{ .compatible = "sprd,sound", },
+	{}
+};
+
+static void __init sc8830_init_late(void)
+{
+	of_platform_populate(of_find_node_by_path("/sprd-audio-devices"),
+				of_sprd_late_bus_match_table, NULL, NULL);
+}
+
+extern void __init  sci_enable_timer_early(void);
+extern void __init sc_init_chip_id(void);
+
+void __init sprd_init_before_irq(void)
+{
+	iotable_build();
+	sc_init_chip_id();
+	/* earlier init request than irq and timer */
+	__clock_init_early();
+	/*ipi reg init for sipc*/
+	sci_glb_set(REG_AON_APB_APB_EB0, BIT_IPI_EB);
+}
+static void __init sc8830_pmu_init(void)
+{
+	__raw_writel(__raw_readl(REG_PMU_APB_PD_MM_TOP_CFG)
+		& ~(BIT_PD_MM_TOP_FORCE_SHUTDOWN),
+		REG_PMU_APB_PD_MM_TOP_CFG);
+
+	__raw_writel(__raw_readl(REG_PMU_APB_PD_GPU_TOP_CFG)
+		& ~(BIT_PD_GPU_TOP_FORCE_SHUTDOWN),
+		REG_PMU_APB_PD_GPU_TOP_CFG);
+
+	__raw_writel(__raw_readl(REG_AON_APB_APB_EB0) | BIT_MM_EB |
+		BIT_GPU_EB, REG_AON_APB_APB_EB0);
+
+	__raw_writel(__raw_readl(REG_MM_AHB_AHB_EB) | BIT_MM_CKG_EB,
+		REG_MM_AHB_AHB_EB);
+	__raw_writel(__raw_readl(REG_MM_AHB_GEN_CKG_CFG)
+		| BIT_MM_MTX_AXI_CKG_EN | BIT_MM_AXI_CKG_EN,
+		REG_MM_AHB_GEN_CKG_CFG);
+	__raw_writel(__raw_readl(REG_MM_CLK_MM_AHB_CFG) | 0x3,
+		REG_MM_CLK_MM_AHB_CFG);
+}
+
+static void sprd_init_time(void)
+{
+	if(of_have_populated_dt()){
+		sc8830_pmu_init();
+		of_clk_init(NULL);
+		clocksource_of_init();
+	}else{
+		sci_clock_init();
+		sci_enable_timer_early();
+		sci_timer_init();
+	}
+}
+static const char *sprd_boards_compat[] __initdata = {
+	"sprd,sp8835eb",
+	NULL,
+};
+extern struct smp_operations sprd_smp_ops;
+
+MACHINE_START(SCPHONE, "sc8830")
+	.smp		= smp_ops(sprd_smp_ops),
+	.reserve	= sci_reserve,
+	.map_io		= sci_map_io,
+	.init_irq	= sci_init_irq,
+	.init_time	= sprd_init_time,
+	.init_machine	= sc8830_init_machine,
+	.init_late	= sc8830_init_late,
+	.dt_compat	= sprd_boards_compat,
+MACHINE_END
+
diff --git a/arch/arm/mach-sc/board-sp7732Aea.c b/arch/arm/mach-sc/board-sp7732Aea.c
new file mode 100644
index 00000000..986ed345
--- /dev/null
+++ b/arch/arm/mach-sc/board-sp7732Aea.c
@@ -0,0 +1,410 @@
+/*
+ * Copyright (C) 2012 Spreadtrum Communications Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/delay.h>
+#include <linux/export.h>
+#include <linux/irqchip/arm-gic.h>
+#include <linux/input.h>
+
+#include <asm/io.h>
+#include <asm/setup.h>
+#include <asm/mach/time.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach-types.h>
+#include <linux/irqchip/arm-gic.h>
+#include <asm/hardware/cache-l2x0.h>
+#include <asm/localtimer.h>
+#include <linux/of_platform.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/clocksource.h>
+#include <linux/clk-provider.h>
+#include <soc/sprd/hardware.h>
+#include <linux/i2c.h>
+#if(defined(CONFIG_INPUT_LIS3DH_I2C)||defined(CONFIG_INPUT_LIS3DH_I2C_MODULE))
+#include <linux/i2c/lis3dh.h>
+#endif
+#if(defined(CONFIG_INPUT_LTR558_I2C)||defined(CONFIG_INPUT_LTR558_I2C_MODULE))
+#include <linux/i2c/ltr_558als.h>
+#endif
+#include <linux/spi/spi.h>
+#include <linux/gpio.h>
+#include <soc/sprd/board.h>
+#include <soc/sprd/serial_sprd.h>
+#include <soc/sprd/adi.h>
+#include <soc/sprd/adc.h>
+#include <soc/sprd/pinmap.h>
+#include <linux/irq.h>
+#include <linux/input/matrix_keypad.h>
+
+#include <soc/sprd/sci.h>
+#include <soc/sprd/hardware.h>
+#include <soc/sprd/kpd.h>
+#include <soc/sprd/sci_glb_regs.h>
+
+#if(defined(CONFIG_INV_MPU_IIO)||defined(CONFIG_INV_MPU_IIO_MODULE))
+#include <linux/mpu.h>
+#endif
+#if(defined(CONFIG_SENSORS_AK8975)||defined(CONFIG_SENSORS_AK8975_MODULE))
+#include <linux/akm8975.h>
+#endif
+
+//#include "devices.h"
+
+#include <linux/regulator/consumer.h>
+#include <soc/sprd/regulator.h>
+#if(defined(CONFIG_TOUCHSCREEN_FOCALTECH)||defined(CONFIG_TOUCHSCREEN_FOCALTECH_MODULE))
+#include <linux/i2c/focaltech.h>
+#endif
+#include <soc/sprd/i2s.h>
+#include <linux/sprd_2351.h>
+
+#if(defined(CONFIG_KEYBOARD_SC)||defined(CONFIG_KEYBOARD_SC_MODULE))
+#include <linux/input/matrix_keypad.h>
+#include <soc/sprd/kpd.h>
+#endif
+#if(defined(CONFIG_KEYBOARD_GPIO)||defined(CONFIG_KEYBOARD_GPIO_MODULE))
+#include <linux/gpio_keys.h>
+#endif
+#if(defined(CONFIG_KEYBOARD_SPRD_EIC)||defined(CONFIG_KEYBOARD_SPRD_EIC_MODULE))
+#include <linux/sprd_eic_keys.h>
+#endif
+#if(defined(CONFIG_BACKLIGHT_SPRD_PWM)||defined(CONFIG_BACKLIGHT_SPRD_PWM_MODULE))
+#include <linux/sprd_pwm_bl.h>
+#endif
+#if(defined(CONFIG_INPUT_HEADSET_SPRD_SC2723)||defined(CONFIG_INPUT_HEADSET_SPRD_SC2723_MODULE))
+#include <linux/headset_sprd_sc2723.h>
+#endif
+
+extern void __init sci_reserve(void);
+extern void __init sci_map_io(void);
+extern void __init sci_init_irq(void);
+extern void __init sci_timer_init(void);
+extern int __init sci_clock_init(void);
+extern int __init sci_regulator_init(void);
+
+#if(defined(CONFIG_BACKLIGHT_SPRD_PWM)||defined(CONFIG_BACKLIGHT_SPRD_PWM_MODULE))
+static struct sprd_pwm_bl_platform_data sprd_pwm_bl_platform_data = {
+	.brightness_max = 255,
+	.brightness_min = 0,
+	.pwm_index = 3,
+	.gpio_ctrl_pin = -1,
+	.gpio_active_level = 0,
+};
+#endif
+
+#if(defined(CONFIG_INPUT_HEADSET_SPRD_SC2723)||defined(CONFIG_INPUT_HEADSET_SPRD_SC2723_MODULE))
+static struct headset_buttons headset_sprd_sc2723_buttons[] = {
+	{
+		.adc_min = HEADSET_ADC_MIN_KEY_MEDIA,
+		.adc_max = HEADSET_ADC_MAX_KEY_MEDIA,
+		.code = KEY_MEDIA,
+	},
+#if 0
+	{
+		.adc_min = HEADSET_ADC_MIN_KEY_VOLUMEUP,
+		.adc_max = HEADSET_ADC_MAX_KEY_VOLUMEUP,
+		.code = KEY_VOLUMEUP,
+	},
+	{
+		.adc_min = HEADSET_ADC_MIN_KEY_VOLUMEDOWN,
+		.adc_max = HEADSET_ADC_MAX_KEY_VOLUMEDOWN,
+		.code = KEY_VOLUMEDOWN,
+	},
+#endif
+};
+
+static struct sprd_headset_platform_data headset_sprd_sc2723_pdata = {
+	.gpio_switch = HEADSET_SWITCH_GPIO,
+	.gpio_detect = HEADSET_DETECT_GPIO,
+	.gpio_button = HEADSET_BUTTON_GPIO,
+	.irq_trigger_level_detect = HEADSET_IRQ_TRIGGER_LEVEL_DETECT,
+	.irq_trigger_level_button = HEADSET_IRQ_TRIGGER_LEVEL_BUTTON,
+	.adc_threshold_3pole_detect = HEADSET_ADC_THRESHOLD_3POLE_DETECT,
+	.adc_threshold_4pole_detect = HEADSET_ADC_THRESHOLD_4POLE_DETECT,
+	.irq_threshold_buttont = HEADSET_IRQ_THRESHOLD_BUTTON,
+	.voltage_headmicbias = HEADSET_HEADMICBIAS_VOLTAGE,
+	.headset_buttons = headset_sprd_sc2723_buttons,
+	.nbuttons = ARRAY_SIZE(headset_sprd_sc2723_buttons),
+	.external_headmicbias_power_on = NULL,
+};
+#endif
+
+/*
+#if(defined(CONFIG_SPRD_KPLED_2723) || defined(CONFIG_SPRD_KPLED_2723_MODULE))
+struct sprd_kpled_2723_platform_data sprd_kpled_2723_pdata = {
+	.brightness_max = 255,
+	.brightness_min = 0,
+	.run_mode = 0,
+}
+#endif
+*/
+
+int __init __clock_init_early(void)
+{
+	pr_info("ahb ctl0 %08x, ctl2 %08x glb aon apb0 %08x aon apb1 %08x clk_en %08x\n",
+		sci_glb_raw_read(REG_AP_AHB_AHB_EB),
+		sci_glb_raw_read(REG_AP_AHB_AHB_RST),
+		sci_glb_raw_read(REG_AON_APB_APB_EB0),
+		sci_glb_raw_read(REG_AON_APB_APB_EB1),
+		sci_glb_raw_read(REG_AON_CLK_PUB_AHB_CFG));
+
+	sci_glb_clr(REG_AP_AHB_AHB_EB,
+		BIT_BUSMON2_EB		|
+		BIT_BUSMON1_EB		|
+		BIT_BUSMON0_EB		|
+		//BIT_SPINLOCK_EB		|
+		BIT_GPS_EB		|
+		//BIT_EMMC_EB		|
+		//BIT_SDIO2_EB		|
+		//BIT_SDIO1_EB		|
+		//BIT_SDIO0_EB		|
+		BIT_DRM_EB		|
+		BIT_NFC_EB		|
+		//BIT_DMA_EB		|
+		//BIT_USB_EB		|
+		//BIT_GSP_EB		|
+		//BIT_DISPC1_EB		|
+		//BIT_DISPC0_EB		|
+		//BIT_DSI_EB		|
+		0);
+	sci_glb_clr(REG_AP_APB_APB_EB,
+		BIT_INTC3_EB		|
+		BIT_INTC2_EB		|
+		BIT_INTC1_EB		|
+		BIT_IIS1_EB		|
+		BIT_UART2_EB		|
+		BIT_UART0_EB		|
+		BIT_SPI1_EB		|
+		BIT_SPI0_EB		|
+		BIT_IIS0_EB		|
+		BIT_I2C0_EB		|
+		BIT_SPI2_EB		|
+		BIT_UART3_EB		|
+		0);
+	sci_glb_clr(REG_AON_APB_APB_RTC_EB,
+		BIT_KPD_RTC_EB		|
+		BIT_KPD_EB		|
+		BIT_EFUSE_EB		|
+		0);
+
+	sci_glb_clr(REG_AON_APB_APB_EB0,
+		BIT_AUDIF_EB			|
+		BIT_VBC_EB			|
+		//BIT_PWM3_EB			|
+		BIT_PWM1_EB			|
+		0);
+	sci_glb_clr(REG_AON_APB_APB_EB1,
+		BIT_AUX1_EB			|
+		BIT_AUX0_EB			|
+		0);
+
+	printk("sc clock module early init ok\n");
+	return 0;
+}
+
+static inline int __sci_get_chip_id(void)
+{
+	return __raw_readl(CHIP_ID_LOW_REG);
+}
+const struct of_device_id of_sprd_default_bus_match_table[] = {
+	{ .compatible = "simple-bus", },
+	{ .compatible = "sprd,adi-bus", },
+	{}
+};
+
+static struct of_dev_auxdata of_sprd_default_bus_lookup[] = {
+	{ .compatible = "sprd,sprd_backlight", .name = "sprd_backlight" },
+#if (defined(CONFIG_BACKLIGHT_SPRD_PWM) || defined(CONFIG_BACKLIGHT_SPRD_PWM_MODULE))
+	{ .compatible = "sprd,sprd_pwm_bl",  .name = "sprd_pwm_bl" },
+#endif
+#if (defined(CONFIG_KEYBOARD_SC) || defined(CONFIG_KEYBOARD_SC_MODULE))
+	{.compatible = "sprd,sci-keypad", .name = "sci-keypad" },
+#endif
+#if (defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE))
+	{.compatible = "gpio-keys", .name = "gpio-keys" },
+#endif
+#if (defined(CONFIG_KEYBOARD_SPRD_EIC) || defined(CONFIG_KEYBOARD_SPRD_EIC_MODULE))
+	{.compatible = "sprd,sprd-eic-keys", .name = "sprd-eic-keys" },
+#endif
+#if (defined(CONFIG_INPUT_HEADSET_SPRD_SC2723) || defined(CONFIG_INPUT_HEADSET_SPRD_SC2723_MODULE))
+	{ .compatible = "sprd,headset_sprd_sc2723",  .name = "headset_sprd_sc2723" },
+#endif
+	 {}
+};
+
+struct iotable_sprd io_addr_sprd;
+EXPORT_SYMBOL(io_addr_sprd);
+
+int iotable_build()
+{
+	struct device_node *np;
+	struct resource res;
+
+#define ADD_SPRD_DEVICE(compat, id)			\
+do {							\
+	np = of_find_compatible_node(NULL, NULL, compat);\
+	if (of_can_translate_address(np)) {		\
+		of_address_to_resource(np, 0, &res);	\
+		io_addr_sprd.id.paddr = res.start;	\
+		io_addr_sprd.id.length =		\
+			resource_size(&res);		\
+		io_addr_sprd.id.vaddr =			\
+		ioremap_nocache(res.start, io_addr_sprd.id.length);\
+		pr_debug("sprd io map: phys=%08x virt=%08x size=%08x\n", \
+	io_addr_sprd.id.paddr, io_addr_sprd.id.vaddr, io_addr_sprd.id.length);\
+	}						\
+} while (0)
+#define ADD_SPRD_DEVICE_BY_NAME(name, id)		\
+do {							\
+	np = of_find_node_by_name(NULL, name);		\
+	if (of_can_translate_address(np)) {		\
+		of_address_to_resource(np, 0, &res);	\
+		io_addr_sprd.id.paddr = res.start;	\
+		io_addr_sprd.id.length =		\
+			resource_size(&res);		\
+		io_addr_sprd.id.vaddr =			\
+		ioremap_nocache(res.start, io_addr_sprd.id.length);\
+		pr_debug("sprd io map: phys=%16lx virt=%16lx size=%16lx\n", \
+	io_addr_sprd.id.paddr, io_addr_sprd.id.vaddr, io_addr_sprd.id.length);\
+	}						\
+} while (0)
+	ADD_SPRD_DEVICE("sprd,ahb", AHB);
+	ADD_SPRD_DEVICE("sprd,aonapb", AONAPB);
+	ADD_SPRD_DEVICE("sprd,aonckg", AONCKG);
+	ADD_SPRD_DEVICE("sprd,apbreg", APBREG);
+	ADD_SPRD_DEVICE("sprd,core", CORE);
+	ADD_SPRD_DEVICE("sprd,mmahb", MMAHB);
+	ADD_SPRD_DEVICE("sprd,pmu", PMU);
+	ADD_SPRD_DEVICE("sprd,mmckg", MMCKG);
+	ADD_SPRD_DEVICE("sprd,gpuapb", GPUAPB);
+	ADD_SPRD_DEVICE("sprd,apbckg", APBCKG);
+	ADD_SPRD_DEVICE("sprd,gpuckg", GPUCKG);
+	ADD_SPRD_DEVICE("sprd,int", INT);
+	ADD_SPRD_DEVICE("sprd,intc0", INTC0);
+	ADD_SPRD_DEVICE("sprd,intc1", INTC1);
+	ADD_SPRD_DEVICE("sprd,intc2", INTC2);
+	ADD_SPRD_DEVICE("sprd,intc3", INTC3);
+	ADD_SPRD_DEVICE("sprd,uidefuse", UIDEFUSE);
+	ADD_SPRD_DEVICE("sprd,isp", ISP);
+	ADD_SPRD_DEVICE("sprd,ca7wdg", CA7WDG);
+	ADD_SPRD_DEVICE("sprd,csi2", CSI2);
+	ADD_SPRD_DEVICE("sprd,d-eic-gpio", EIC);
+	ADD_SPRD_DEVICE("sprd,wdg", WDG);
+	ADD_SPRD_DEVICE("sprd,ipi", IPI);
+	ADD_SPRD_DEVICE("sprd,dcam", DCAM);
+	ADD_SPRD_DEVICE("sprd,syscnt", SYSCNT);
+	ADD_SPRD_DEVICE("sprd,dma0", DMA0);
+	ADD_SPRD_DEVICE("sprd,pub", PUB);
+	ADD_SPRD_DEVICE("sprd,pin", PIN);
+	ADD_SPRD_DEVICE("sprd,d-gpio-gpio", GPIO);
+	ADD_SPRD_DEVICE("sprd,codecahb", CODECAHB);
+	ADD_SPRD_DEVICE_BY_NAME("hwspinlock0", HWSPINLOCK0);
+	ADD_SPRD_DEVICE_BY_NAME("hwspinlock1", HWSPINLOCK1);
+
+	return 0;
+}
+
+static void __init sc8830_init_machine(void)
+{
+	printk("sci get chip id = 0x%x\n",__sci_get_chip_id());
+
+	//sci_adc_init((void __iomem *)ADC_BASE);
+	sci_adc_init();
+	sci_regulator_init();
+	of_sprd_default_bus_lookup[0].phys_addr = 0x20300000;
+	of_sprd_default_bus_lookup[1].phys_addr = 0x20400000;
+	of_sprd_default_bus_lookup[2].phys_addr = 0x20500000;
+	of_sprd_default_bus_lookup[3].phys_addr = 0x20600000;
+	of_platform_populate(NULL, of_sprd_default_bus_match_table, of_sprd_default_bus_lookup, NULL);
+	//sprd_sr2351_vddwpa_ctrl_power_register();
+}
+
+const struct of_device_id of_sprd_late_bus_match_table[] = {
+	{ .compatible = "sprd,sound", },
+	{}
+};
+
+static void __init sc8830_init_late(void)
+{
+	of_platform_populate(of_find_node_by_path("/sprd-audio-devices"),
+				of_sprd_late_bus_match_table, NULL, NULL);
+}
+
+extern void __init  sci_enable_timer_early(void);
+extern void __init sc_init_chip_id(void);
+
+void __init sprd_init_before_irq(void)
+{
+	iotable_build();
+	sc_init_chip_id();
+	/* earlier init request than irq and timer */
+	__clock_init_early();
+	/*ipi reg init for sipc*/
+	sci_glb_set(REG_AON_APB_APB_EB0, BIT_IPI_EB);
+}
+static void __init sc8830_pmu_init(void)
+{
+	__raw_writel(__raw_readl(REG_PMU_APB_PD_MM_TOP_CFG)
+		& ~(BIT_PD_MM_TOP_FORCE_SHUTDOWN),
+		REG_PMU_APB_PD_MM_TOP_CFG);
+
+	__raw_writel(__raw_readl(REG_PMU_APB_PD_GPU_TOP_CFG)
+		& ~(BIT_PD_GPU_TOP_FORCE_SHUTDOWN),
+		REG_PMU_APB_PD_GPU_TOP_CFG);
+
+	__raw_writel(__raw_readl(REG_AON_APB_APB_EB0) | BIT_MM_EB |
+		BIT_GPU_EB, REG_AON_APB_APB_EB0);
+
+	__raw_writel(__raw_readl(REG_AON_APB_APB_EB1) | BIT_CODEC_EB,REG_AON_APB_APB_EB1);
+	__raw_writel(__raw_readl(REG_MM_AHB_AHB_EB) | BIT_MM_CKG_EB,
+		REG_MM_AHB_AHB_EB);
+	__raw_writel(__raw_readl(REG_MM_AHB_GEN_CKG_CFG)
+		| BIT_MM_MTX_AXI_CKG_EN | BIT_MM_AXI_CKG_EN,
+		REG_MM_AHB_GEN_CKG_CFG);
+	__raw_writel(__raw_readl(REG_MM_CLK_MM_AHB_CFG) | 0x3,
+		REG_MM_CLK_MM_AHB_CFG);
+}
+
+static void __init sprd_init_time(void)
+{
+	if(of_have_populated_dt()){
+		sc8830_pmu_init();
+		of_clk_init(NULL);
+		clocksource_of_init();
+	}else{
+		sci_clock_init();
+		sci_enable_timer_early();
+		sci_timer_init();
+	}
+}
+static const char *sprd_boards_compat[] __initdata = {
+	"sprd,sp8835eb",
+	NULL,
+};
+extern struct smp_operations sprd_smp_ops;
+
+MACHINE_START(SCPHONE, "sc8830")
+	.smp		= smp_ops(sprd_smp_ops),
+	.reserve	= sci_reserve,
+	.map_io		= sci_map_io,
+	.init_irq	= sci_init_irq,
+	.init_time	= sprd_init_time,
+	.init_machine	= sc8830_init_machine,
+	.init_late	= sc8830_init_late,
+	.dt_compat	= sprd_boards_compat,
+MACHINE_END
+
diff --git a/arch/arm/mach-sc/board-sp8730seea.c b/arch/arm/mach-sc/board-sp8730seea.c
new file mode 100644
index 00000000..986ed345
--- /dev/null
+++ b/arch/arm/mach-sc/board-sp8730seea.c
@@ -0,0 +1,410 @@
+/*
+ * Copyright (C) 2012 Spreadtrum Communications Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/delay.h>
+#include <linux/export.h>
+#include <linux/irqchip/arm-gic.h>
+#include <linux/input.h>
+
+#include <asm/io.h>
+#include <asm/setup.h>
+#include <asm/mach/time.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach-types.h>
+#include <linux/irqchip/arm-gic.h>
+#include <asm/hardware/cache-l2x0.h>
+#include <asm/localtimer.h>
+#include <linux/of_platform.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/clocksource.h>
+#include <linux/clk-provider.h>
+#include <soc/sprd/hardware.h>
+#include <linux/i2c.h>
+#if(defined(CONFIG_INPUT_LIS3DH_I2C)||defined(CONFIG_INPUT_LIS3DH_I2C_MODULE))
+#include <linux/i2c/lis3dh.h>
+#endif
+#if(defined(CONFIG_INPUT_LTR558_I2C)||defined(CONFIG_INPUT_LTR558_I2C_MODULE))
+#include <linux/i2c/ltr_558als.h>
+#endif
+#include <linux/spi/spi.h>
+#include <linux/gpio.h>
+#include <soc/sprd/board.h>
+#include <soc/sprd/serial_sprd.h>
+#include <soc/sprd/adi.h>
+#include <soc/sprd/adc.h>
+#include <soc/sprd/pinmap.h>
+#include <linux/irq.h>
+#include <linux/input/matrix_keypad.h>
+
+#include <soc/sprd/sci.h>
+#include <soc/sprd/hardware.h>
+#include <soc/sprd/kpd.h>
+#include <soc/sprd/sci_glb_regs.h>
+
+#if(defined(CONFIG_INV_MPU_IIO)||defined(CONFIG_INV_MPU_IIO_MODULE))
+#include <linux/mpu.h>
+#endif
+#if(defined(CONFIG_SENSORS_AK8975)||defined(CONFIG_SENSORS_AK8975_MODULE))
+#include <linux/akm8975.h>
+#endif
+
+//#include "devices.h"
+
+#include <linux/regulator/consumer.h>
+#include <soc/sprd/regulator.h>
+#if(defined(CONFIG_TOUCHSCREEN_FOCALTECH)||defined(CONFIG_TOUCHSCREEN_FOCALTECH_MODULE))
+#include <linux/i2c/focaltech.h>
+#endif
+#include <soc/sprd/i2s.h>
+#include <linux/sprd_2351.h>
+
+#if(defined(CONFIG_KEYBOARD_SC)||defined(CONFIG_KEYBOARD_SC_MODULE))
+#include <linux/input/matrix_keypad.h>
+#include <soc/sprd/kpd.h>
+#endif
+#if(defined(CONFIG_KEYBOARD_GPIO)||defined(CONFIG_KEYBOARD_GPIO_MODULE))
+#include <linux/gpio_keys.h>
+#endif
+#if(defined(CONFIG_KEYBOARD_SPRD_EIC)||defined(CONFIG_KEYBOARD_SPRD_EIC_MODULE))
+#include <linux/sprd_eic_keys.h>
+#endif
+#if(defined(CONFIG_BACKLIGHT_SPRD_PWM)||defined(CONFIG_BACKLIGHT_SPRD_PWM_MODULE))
+#include <linux/sprd_pwm_bl.h>
+#endif
+#if(defined(CONFIG_INPUT_HEADSET_SPRD_SC2723)||defined(CONFIG_INPUT_HEADSET_SPRD_SC2723_MODULE))
+#include <linux/headset_sprd_sc2723.h>
+#endif
+
+extern void __init sci_reserve(void);
+extern void __init sci_map_io(void);
+extern void __init sci_init_irq(void);
+extern void __init sci_timer_init(void);
+extern int __init sci_clock_init(void);
+extern int __init sci_regulator_init(void);
+
+#if(defined(CONFIG_BACKLIGHT_SPRD_PWM)||defined(CONFIG_BACKLIGHT_SPRD_PWM_MODULE))
+static struct sprd_pwm_bl_platform_data sprd_pwm_bl_platform_data = {
+	.brightness_max = 255,
+	.brightness_min = 0,
+	.pwm_index = 3,
+	.gpio_ctrl_pin = -1,
+	.gpio_active_level = 0,
+};
+#endif
+
+#if(defined(CONFIG_INPUT_HEADSET_SPRD_SC2723)||defined(CONFIG_INPUT_HEADSET_SPRD_SC2723_MODULE))
+static struct headset_buttons headset_sprd_sc2723_buttons[] = {
+	{
+		.adc_min = HEADSET_ADC_MIN_KEY_MEDIA,
+		.adc_max = HEADSET_ADC_MAX_KEY_MEDIA,
+		.code = KEY_MEDIA,
+	},
+#if 0
+	{
+		.adc_min = HEADSET_ADC_MIN_KEY_VOLUMEUP,
+		.adc_max = HEADSET_ADC_MAX_KEY_VOLUMEUP,
+		.code = KEY_VOLUMEUP,
+	},
+	{
+		.adc_min = HEADSET_ADC_MIN_KEY_VOLUMEDOWN,
+		.adc_max = HEADSET_ADC_MAX_KEY_VOLUMEDOWN,
+		.code = KEY_VOLUMEDOWN,
+	},
+#endif
+};
+
+static struct sprd_headset_platform_data headset_sprd_sc2723_pdata = {
+	.gpio_switch = HEADSET_SWITCH_GPIO,
+	.gpio_detect = HEADSET_DETECT_GPIO,
+	.gpio_button = HEADSET_BUTTON_GPIO,
+	.irq_trigger_level_detect = HEADSET_IRQ_TRIGGER_LEVEL_DETECT,
+	.irq_trigger_level_button = HEADSET_IRQ_TRIGGER_LEVEL_BUTTON,
+	.adc_threshold_3pole_detect = HEADSET_ADC_THRESHOLD_3POLE_DETECT,
+	.adc_threshold_4pole_detect = HEADSET_ADC_THRESHOLD_4POLE_DETECT,
+	.irq_threshold_buttont = HEADSET_IRQ_THRESHOLD_BUTTON,
+	.voltage_headmicbias = HEADSET_HEADMICBIAS_VOLTAGE,
+	.headset_buttons = headset_sprd_sc2723_buttons,
+	.nbuttons = ARRAY_SIZE(headset_sprd_sc2723_buttons),
+	.external_headmicbias_power_on = NULL,
+};
+#endif
+
+/*
+#if(defined(CONFIG_SPRD_KPLED_2723) || defined(CONFIG_SPRD_KPLED_2723_MODULE))
+struct sprd_kpled_2723_platform_data sprd_kpled_2723_pdata = {
+	.brightness_max = 255,
+	.brightness_min = 0,
+	.run_mode = 0,
+}
+#endif
+*/
+
+int __init __clock_init_early(void)
+{
+	pr_info("ahb ctl0 %08x, ctl2 %08x glb aon apb0 %08x aon apb1 %08x clk_en %08x\n",
+		sci_glb_raw_read(REG_AP_AHB_AHB_EB),
+		sci_glb_raw_read(REG_AP_AHB_AHB_RST),
+		sci_glb_raw_read(REG_AON_APB_APB_EB0),
+		sci_glb_raw_read(REG_AON_APB_APB_EB1),
+		sci_glb_raw_read(REG_AON_CLK_PUB_AHB_CFG));
+
+	sci_glb_clr(REG_AP_AHB_AHB_EB,
+		BIT_BUSMON2_EB		|
+		BIT_BUSMON1_EB		|
+		BIT_BUSMON0_EB		|
+		//BIT_SPINLOCK_EB		|
+		BIT_GPS_EB		|
+		//BIT_EMMC_EB		|
+		//BIT_SDIO2_EB		|
+		//BIT_SDIO1_EB		|
+		//BIT_SDIO0_EB		|
+		BIT_DRM_EB		|
+		BIT_NFC_EB		|
+		//BIT_DMA_EB		|
+		//BIT_USB_EB		|
+		//BIT_GSP_EB		|
+		//BIT_DISPC1_EB		|
+		//BIT_DISPC0_EB		|
+		//BIT_DSI_EB		|
+		0);
+	sci_glb_clr(REG_AP_APB_APB_EB,
+		BIT_INTC3_EB		|
+		BIT_INTC2_EB		|
+		BIT_INTC1_EB		|
+		BIT_IIS1_EB		|
+		BIT_UART2_EB		|
+		BIT_UART0_EB		|
+		BIT_SPI1_EB		|
+		BIT_SPI0_EB		|
+		BIT_IIS0_EB		|
+		BIT_I2C0_EB		|
+		BIT_SPI2_EB		|
+		BIT_UART3_EB		|
+		0);
+	sci_glb_clr(REG_AON_APB_APB_RTC_EB,
+		BIT_KPD_RTC_EB		|
+		BIT_KPD_EB		|
+		BIT_EFUSE_EB		|
+		0);
+
+	sci_glb_clr(REG_AON_APB_APB_EB0,
+		BIT_AUDIF_EB			|
+		BIT_VBC_EB			|
+		//BIT_PWM3_EB			|
+		BIT_PWM1_EB			|
+		0);
+	sci_glb_clr(REG_AON_APB_APB_EB1,
+		BIT_AUX1_EB			|
+		BIT_AUX0_EB			|
+		0);
+
+	printk("sc clock module early init ok\n");
+	return 0;
+}
+
+static inline int __sci_get_chip_id(void)
+{
+	return __raw_readl(CHIP_ID_LOW_REG);
+}
+const struct of_device_id of_sprd_default_bus_match_table[] = {
+	{ .compatible = "simple-bus", },
+	{ .compatible = "sprd,adi-bus", },
+	{}
+};
+
+static struct of_dev_auxdata of_sprd_default_bus_lookup[] = {
+	{ .compatible = "sprd,sprd_backlight", .name = "sprd_backlight" },
+#if (defined(CONFIG_BACKLIGHT_SPRD_PWM) || defined(CONFIG_BACKLIGHT_SPRD_PWM_MODULE))
+	{ .compatible = "sprd,sprd_pwm_bl",  .name = "sprd_pwm_bl" },
+#endif
+#if (defined(CONFIG_KEYBOARD_SC) || defined(CONFIG_KEYBOARD_SC_MODULE))
+	{.compatible = "sprd,sci-keypad", .name = "sci-keypad" },
+#endif
+#if (defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE))
+	{.compatible = "gpio-keys", .name = "gpio-keys" },
+#endif
+#if (defined(CONFIG_KEYBOARD_SPRD_EIC) || defined(CONFIG_KEYBOARD_SPRD_EIC_MODULE))
+	{.compatible = "sprd,sprd-eic-keys", .name = "sprd-eic-keys" },
+#endif
+#if (defined(CONFIG_INPUT_HEADSET_SPRD_SC2723) || defined(CONFIG_INPUT_HEADSET_SPRD_SC2723_MODULE))
+	{ .compatible = "sprd,headset_sprd_sc2723",  .name = "headset_sprd_sc2723" },
+#endif
+	 {}
+};
+
+struct iotable_sprd io_addr_sprd;
+EXPORT_SYMBOL(io_addr_sprd);
+
+int iotable_build()
+{
+	struct device_node *np;
+	struct resource res;
+
+#define ADD_SPRD_DEVICE(compat, id)			\
+do {							\
+	np = of_find_compatible_node(NULL, NULL, compat);\
+	if (of_can_translate_address(np)) {		\
+		of_address_to_resource(np, 0, &res);	\
+		io_addr_sprd.id.paddr = res.start;	\
+		io_addr_sprd.id.length =		\
+			resource_size(&res);		\
+		io_addr_sprd.id.vaddr =			\
+		ioremap_nocache(res.start, io_addr_sprd.id.length);\
+		pr_debug("sprd io map: phys=%08x virt=%08x size=%08x\n", \
+	io_addr_sprd.id.paddr, io_addr_sprd.id.vaddr, io_addr_sprd.id.length);\
+	}						\
+} while (0)
+#define ADD_SPRD_DEVICE_BY_NAME(name, id)		\
+do {							\
+	np = of_find_node_by_name(NULL, name);		\
+	if (of_can_translate_address(np)) {		\
+		of_address_to_resource(np, 0, &res);	\
+		io_addr_sprd.id.paddr = res.start;	\
+		io_addr_sprd.id.length =		\
+			resource_size(&res);		\
+		io_addr_sprd.id.vaddr =			\
+		ioremap_nocache(res.start, io_addr_sprd.id.length);\
+		pr_debug("sprd io map: phys=%16lx virt=%16lx size=%16lx\n", \
+	io_addr_sprd.id.paddr, io_addr_sprd.id.vaddr, io_addr_sprd.id.length);\
+	}						\
+} while (0)
+	ADD_SPRD_DEVICE("sprd,ahb", AHB);
+	ADD_SPRD_DEVICE("sprd,aonapb", AONAPB);
+	ADD_SPRD_DEVICE("sprd,aonckg", AONCKG);
+	ADD_SPRD_DEVICE("sprd,apbreg", APBREG);
+	ADD_SPRD_DEVICE("sprd,core", CORE);
+	ADD_SPRD_DEVICE("sprd,mmahb", MMAHB);
+	ADD_SPRD_DEVICE("sprd,pmu", PMU);
+	ADD_SPRD_DEVICE("sprd,mmckg", MMCKG);
+	ADD_SPRD_DEVICE("sprd,gpuapb", GPUAPB);
+	ADD_SPRD_DEVICE("sprd,apbckg", APBCKG);
+	ADD_SPRD_DEVICE("sprd,gpuckg", GPUCKG);
+	ADD_SPRD_DEVICE("sprd,int", INT);
+	ADD_SPRD_DEVICE("sprd,intc0", INTC0);
+	ADD_SPRD_DEVICE("sprd,intc1", INTC1);
+	ADD_SPRD_DEVICE("sprd,intc2", INTC2);
+	ADD_SPRD_DEVICE("sprd,intc3", INTC3);
+	ADD_SPRD_DEVICE("sprd,uidefuse", UIDEFUSE);
+	ADD_SPRD_DEVICE("sprd,isp", ISP);
+	ADD_SPRD_DEVICE("sprd,ca7wdg", CA7WDG);
+	ADD_SPRD_DEVICE("sprd,csi2", CSI2);
+	ADD_SPRD_DEVICE("sprd,d-eic-gpio", EIC);
+	ADD_SPRD_DEVICE("sprd,wdg", WDG);
+	ADD_SPRD_DEVICE("sprd,ipi", IPI);
+	ADD_SPRD_DEVICE("sprd,dcam", DCAM);
+	ADD_SPRD_DEVICE("sprd,syscnt", SYSCNT);
+	ADD_SPRD_DEVICE("sprd,dma0", DMA0);
+	ADD_SPRD_DEVICE("sprd,pub", PUB);
+	ADD_SPRD_DEVICE("sprd,pin", PIN);
+	ADD_SPRD_DEVICE("sprd,d-gpio-gpio", GPIO);
+	ADD_SPRD_DEVICE("sprd,codecahb", CODECAHB);
+	ADD_SPRD_DEVICE_BY_NAME("hwspinlock0", HWSPINLOCK0);
+	ADD_SPRD_DEVICE_BY_NAME("hwspinlock1", HWSPINLOCK1);
+
+	return 0;
+}
+
+static void __init sc8830_init_machine(void)
+{
+	printk("sci get chip id = 0x%x\n",__sci_get_chip_id());
+
+	//sci_adc_init((void __iomem *)ADC_BASE);
+	sci_adc_init();
+	sci_regulator_init();
+	of_sprd_default_bus_lookup[0].phys_addr = 0x20300000;
+	of_sprd_default_bus_lookup[1].phys_addr = 0x20400000;
+	of_sprd_default_bus_lookup[2].phys_addr = 0x20500000;
+	of_sprd_default_bus_lookup[3].phys_addr = 0x20600000;
+	of_platform_populate(NULL, of_sprd_default_bus_match_table, of_sprd_default_bus_lookup, NULL);
+	//sprd_sr2351_vddwpa_ctrl_power_register();
+}
+
+const struct of_device_id of_sprd_late_bus_match_table[] = {
+	{ .compatible = "sprd,sound", },
+	{}
+};
+
+static void __init sc8830_init_late(void)
+{
+	of_platform_populate(of_find_node_by_path("/sprd-audio-devices"),
+				of_sprd_late_bus_match_table, NULL, NULL);
+}
+
+extern void __init  sci_enable_timer_early(void);
+extern void __init sc_init_chip_id(void);
+
+void __init sprd_init_before_irq(void)
+{
+	iotable_build();
+	sc_init_chip_id();
+	/* earlier init request than irq and timer */
+	__clock_init_early();
+	/*ipi reg init for sipc*/
+	sci_glb_set(REG_AON_APB_APB_EB0, BIT_IPI_EB);
+}
+static void __init sc8830_pmu_init(void)
+{
+	__raw_writel(__raw_readl(REG_PMU_APB_PD_MM_TOP_CFG)
+		& ~(BIT_PD_MM_TOP_FORCE_SHUTDOWN),
+		REG_PMU_APB_PD_MM_TOP_CFG);
+
+	__raw_writel(__raw_readl(REG_PMU_APB_PD_GPU_TOP_CFG)
+		& ~(BIT_PD_GPU_TOP_FORCE_SHUTDOWN),
+		REG_PMU_APB_PD_GPU_TOP_CFG);
+
+	__raw_writel(__raw_readl(REG_AON_APB_APB_EB0) | BIT_MM_EB |
+		BIT_GPU_EB, REG_AON_APB_APB_EB0);
+
+	__raw_writel(__raw_readl(REG_AON_APB_APB_EB1) | BIT_CODEC_EB,REG_AON_APB_APB_EB1);
+	__raw_writel(__raw_readl(REG_MM_AHB_AHB_EB) | BIT_MM_CKG_EB,
+		REG_MM_AHB_AHB_EB);
+	__raw_writel(__raw_readl(REG_MM_AHB_GEN_CKG_CFG)
+		| BIT_MM_MTX_AXI_CKG_EN | BIT_MM_AXI_CKG_EN,
+		REG_MM_AHB_GEN_CKG_CFG);
+	__raw_writel(__raw_readl(REG_MM_CLK_MM_AHB_CFG) | 0x3,
+		REG_MM_CLK_MM_AHB_CFG);
+}
+
+static void __init sprd_init_time(void)
+{
+	if(of_have_populated_dt()){
+		sc8830_pmu_init();
+		of_clk_init(NULL);
+		clocksource_of_init();
+	}else{
+		sci_clock_init();
+		sci_enable_timer_early();
+		sci_timer_init();
+	}
+}
+static const char *sprd_boards_compat[] __initdata = {
+	"sprd,sp8835eb",
+	NULL,
+};
+extern struct smp_operations sprd_smp_ops;
+
+MACHINE_START(SCPHONE, "sc8830")
+	.smp		= smp_ops(sprd_smp_ops),
+	.reserve	= sci_reserve,
+	.map_io		= sci_map_io,
+	.init_irq	= sci_init_irq,
+	.init_time	= sprd_init_time,
+	.init_machine	= sc8830_init_machine,
+	.init_late	= sc8830_init_late,
+	.dt_compat	= sprd_boards_compat,
+MACHINE_END
+
diff --git a/arch/arm/mach-sc/board-sp8730seea_hd.c b/arch/arm/mach-sc/board-sp8730seea_hd.c
new file mode 100644
index 00000000..986ed345
--- /dev/null
+++ b/arch/arm/mach-sc/board-sp8730seea_hd.c
@@ -0,0 +1,410 @@
+/*
+ * Copyright (C) 2012 Spreadtrum Communications Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/delay.h>
+#include <linux/export.h>
+#include <linux/irqchip/arm-gic.h>
+#include <linux/input.h>
+
+#include <asm/io.h>
+#include <asm/setup.h>
+#include <asm/mach/time.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach-types.h>
+#include <linux/irqchip/arm-gic.h>
+#include <asm/hardware/cache-l2x0.h>
+#include <asm/localtimer.h>
+#include <linux/of_platform.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/clocksource.h>
+#include <linux/clk-provider.h>
+#include <soc/sprd/hardware.h>
+#include <linux/i2c.h>
+#if(defined(CONFIG_INPUT_LIS3DH_I2C)||defined(CONFIG_INPUT_LIS3DH_I2C_MODULE))
+#include <linux/i2c/lis3dh.h>
+#endif
+#if(defined(CONFIG_INPUT_LTR558_I2C)||defined(CONFIG_INPUT_LTR558_I2C_MODULE))
+#include <linux/i2c/ltr_558als.h>
+#endif
+#include <linux/spi/spi.h>
+#include <linux/gpio.h>
+#include <soc/sprd/board.h>
+#include <soc/sprd/serial_sprd.h>
+#include <soc/sprd/adi.h>
+#include <soc/sprd/adc.h>
+#include <soc/sprd/pinmap.h>
+#include <linux/irq.h>
+#include <linux/input/matrix_keypad.h>
+
+#include <soc/sprd/sci.h>
+#include <soc/sprd/hardware.h>
+#include <soc/sprd/kpd.h>
+#include <soc/sprd/sci_glb_regs.h>
+
+#if(defined(CONFIG_INV_MPU_IIO)||defined(CONFIG_INV_MPU_IIO_MODULE))
+#include <linux/mpu.h>
+#endif
+#if(defined(CONFIG_SENSORS_AK8975)||defined(CONFIG_SENSORS_AK8975_MODULE))
+#include <linux/akm8975.h>
+#endif
+
+//#include "devices.h"
+
+#include <linux/regulator/consumer.h>
+#include <soc/sprd/regulator.h>
+#if(defined(CONFIG_TOUCHSCREEN_FOCALTECH)||defined(CONFIG_TOUCHSCREEN_FOCALTECH_MODULE))
+#include <linux/i2c/focaltech.h>
+#endif
+#include <soc/sprd/i2s.h>
+#include <linux/sprd_2351.h>
+
+#if(defined(CONFIG_KEYBOARD_SC)||defined(CONFIG_KEYBOARD_SC_MODULE))
+#include <linux/input/matrix_keypad.h>
+#include <soc/sprd/kpd.h>
+#endif
+#if(defined(CONFIG_KEYBOARD_GPIO)||defined(CONFIG_KEYBOARD_GPIO_MODULE))
+#include <linux/gpio_keys.h>
+#endif
+#if(defined(CONFIG_KEYBOARD_SPRD_EIC)||defined(CONFIG_KEYBOARD_SPRD_EIC_MODULE))
+#include <linux/sprd_eic_keys.h>
+#endif
+#if(defined(CONFIG_BACKLIGHT_SPRD_PWM)||defined(CONFIG_BACKLIGHT_SPRD_PWM_MODULE))
+#include <linux/sprd_pwm_bl.h>
+#endif
+#if(defined(CONFIG_INPUT_HEADSET_SPRD_SC2723)||defined(CONFIG_INPUT_HEADSET_SPRD_SC2723_MODULE))
+#include <linux/headset_sprd_sc2723.h>
+#endif
+
+extern void __init sci_reserve(void);
+extern void __init sci_map_io(void);
+extern void __init sci_init_irq(void);
+extern void __init sci_timer_init(void);
+extern int __init sci_clock_init(void);
+extern int __init sci_regulator_init(void);
+
+#if(defined(CONFIG_BACKLIGHT_SPRD_PWM)||defined(CONFIG_BACKLIGHT_SPRD_PWM_MODULE))
+static struct sprd_pwm_bl_platform_data sprd_pwm_bl_platform_data = {
+	.brightness_max = 255,
+	.brightness_min = 0,
+	.pwm_index = 3,
+	.gpio_ctrl_pin = -1,
+	.gpio_active_level = 0,
+};
+#endif
+
+#if(defined(CONFIG_INPUT_HEADSET_SPRD_SC2723)||defined(CONFIG_INPUT_HEADSET_SPRD_SC2723_MODULE))
+static struct headset_buttons headset_sprd_sc2723_buttons[] = {
+	{
+		.adc_min = HEADSET_ADC_MIN_KEY_MEDIA,
+		.adc_max = HEADSET_ADC_MAX_KEY_MEDIA,
+		.code = KEY_MEDIA,
+	},
+#if 0
+	{
+		.adc_min = HEADSET_ADC_MIN_KEY_VOLUMEUP,
+		.adc_max = HEADSET_ADC_MAX_KEY_VOLUMEUP,
+		.code = KEY_VOLUMEUP,
+	},
+	{
+		.adc_min = HEADSET_ADC_MIN_KEY_VOLUMEDOWN,
+		.adc_max = HEADSET_ADC_MAX_KEY_VOLUMEDOWN,
+		.code = KEY_VOLUMEDOWN,
+	},
+#endif
+};
+
+static struct sprd_headset_platform_data headset_sprd_sc2723_pdata = {
+	.gpio_switch = HEADSET_SWITCH_GPIO,
+	.gpio_detect = HEADSET_DETECT_GPIO,
+	.gpio_button = HEADSET_BUTTON_GPIO,
+	.irq_trigger_level_detect = HEADSET_IRQ_TRIGGER_LEVEL_DETECT,
+	.irq_trigger_level_button = HEADSET_IRQ_TRIGGER_LEVEL_BUTTON,
+	.adc_threshold_3pole_detect = HEADSET_ADC_THRESHOLD_3POLE_DETECT,
+	.adc_threshold_4pole_detect = HEADSET_ADC_THRESHOLD_4POLE_DETECT,
+	.irq_threshold_buttont = HEADSET_IRQ_THRESHOLD_BUTTON,
+	.voltage_headmicbias = HEADSET_HEADMICBIAS_VOLTAGE,
+	.headset_buttons = headset_sprd_sc2723_buttons,
+	.nbuttons = ARRAY_SIZE(headset_sprd_sc2723_buttons),
+	.external_headmicbias_power_on = NULL,
+};
+#endif
+
+/*
+#if(defined(CONFIG_SPRD_KPLED_2723) || defined(CONFIG_SPRD_KPLED_2723_MODULE))
+struct sprd_kpled_2723_platform_data sprd_kpled_2723_pdata = {
+	.brightness_max = 255,
+	.brightness_min = 0,
+	.run_mode = 0,
+}
+#endif
+*/
+
+int __init __clock_init_early(void)
+{
+	pr_info("ahb ctl0 %08x, ctl2 %08x glb aon apb0 %08x aon apb1 %08x clk_en %08x\n",
+		sci_glb_raw_read(REG_AP_AHB_AHB_EB),
+		sci_glb_raw_read(REG_AP_AHB_AHB_RST),
+		sci_glb_raw_read(REG_AON_APB_APB_EB0),
+		sci_glb_raw_read(REG_AON_APB_APB_EB1),
+		sci_glb_raw_read(REG_AON_CLK_PUB_AHB_CFG));
+
+	sci_glb_clr(REG_AP_AHB_AHB_EB,
+		BIT_BUSMON2_EB		|
+		BIT_BUSMON1_EB		|
+		BIT_BUSMON0_EB		|
+		//BIT_SPINLOCK_EB		|
+		BIT_GPS_EB		|
+		//BIT_EMMC_EB		|
+		//BIT_SDIO2_EB		|
+		//BIT_SDIO1_EB		|
+		//BIT_SDIO0_EB		|
+		BIT_DRM_EB		|
+		BIT_NFC_EB		|
+		//BIT_DMA_EB		|
+		//BIT_USB_EB		|
+		//BIT_GSP_EB		|
+		//BIT_DISPC1_EB		|
+		//BIT_DISPC0_EB		|
+		//BIT_DSI_EB		|
+		0);
+	sci_glb_clr(REG_AP_APB_APB_EB,
+		BIT_INTC3_EB		|
+		BIT_INTC2_EB		|
+		BIT_INTC1_EB		|
+		BIT_IIS1_EB		|
+		BIT_UART2_EB		|
+		BIT_UART0_EB		|
+		BIT_SPI1_EB		|
+		BIT_SPI0_EB		|
+		BIT_IIS0_EB		|
+		BIT_I2C0_EB		|
+		BIT_SPI2_EB		|
+		BIT_UART3_EB		|
+		0);
+	sci_glb_clr(REG_AON_APB_APB_RTC_EB,
+		BIT_KPD_RTC_EB		|
+		BIT_KPD_EB		|
+		BIT_EFUSE_EB		|
+		0);
+
+	sci_glb_clr(REG_AON_APB_APB_EB0,
+		BIT_AUDIF_EB			|
+		BIT_VBC_EB			|
+		//BIT_PWM3_EB			|
+		BIT_PWM1_EB			|
+		0);
+	sci_glb_clr(REG_AON_APB_APB_EB1,
+		BIT_AUX1_EB			|
+		BIT_AUX0_EB			|
+		0);
+
+	printk("sc clock module early init ok\n");
+	return 0;
+}
+
+static inline int __sci_get_chip_id(void)
+{
+	return __raw_readl(CHIP_ID_LOW_REG);
+}
+const struct of_device_id of_sprd_default_bus_match_table[] = {
+	{ .compatible = "simple-bus", },
+	{ .compatible = "sprd,adi-bus", },
+	{}
+};
+
+static struct of_dev_auxdata of_sprd_default_bus_lookup[] = {
+	{ .compatible = "sprd,sprd_backlight", .name = "sprd_backlight" },
+#if (defined(CONFIG_BACKLIGHT_SPRD_PWM) || defined(CONFIG_BACKLIGHT_SPRD_PWM_MODULE))
+	{ .compatible = "sprd,sprd_pwm_bl",  .name = "sprd_pwm_bl" },
+#endif
+#if (defined(CONFIG_KEYBOARD_SC) || defined(CONFIG_KEYBOARD_SC_MODULE))
+	{.compatible = "sprd,sci-keypad", .name = "sci-keypad" },
+#endif
+#if (defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE))
+	{.compatible = "gpio-keys", .name = "gpio-keys" },
+#endif
+#if (defined(CONFIG_KEYBOARD_SPRD_EIC) || defined(CONFIG_KEYBOARD_SPRD_EIC_MODULE))
+	{.compatible = "sprd,sprd-eic-keys", .name = "sprd-eic-keys" },
+#endif
+#if (defined(CONFIG_INPUT_HEADSET_SPRD_SC2723) || defined(CONFIG_INPUT_HEADSET_SPRD_SC2723_MODULE))
+	{ .compatible = "sprd,headset_sprd_sc2723",  .name = "headset_sprd_sc2723" },
+#endif
+	 {}
+};
+
+struct iotable_sprd io_addr_sprd;
+EXPORT_SYMBOL(io_addr_sprd);
+
+int iotable_build()
+{
+	struct device_node *np;
+	struct resource res;
+
+#define ADD_SPRD_DEVICE(compat, id)			\
+do {							\
+	np = of_find_compatible_node(NULL, NULL, compat);\
+	if (of_can_translate_address(np)) {		\
+		of_address_to_resource(np, 0, &res);	\
+		io_addr_sprd.id.paddr = res.start;	\
+		io_addr_sprd.id.length =		\
+			resource_size(&res);		\
+		io_addr_sprd.id.vaddr =			\
+		ioremap_nocache(res.start, io_addr_sprd.id.length);\
+		pr_debug("sprd io map: phys=%08x virt=%08x size=%08x\n", \
+	io_addr_sprd.id.paddr, io_addr_sprd.id.vaddr, io_addr_sprd.id.length);\
+	}						\
+} while (0)
+#define ADD_SPRD_DEVICE_BY_NAME(name, id)		\
+do {							\
+	np = of_find_node_by_name(NULL, name);		\
+	if (of_can_translate_address(np)) {		\
+		of_address_to_resource(np, 0, &res);	\
+		io_addr_sprd.id.paddr = res.start;	\
+		io_addr_sprd.id.length =		\
+			resource_size(&res);		\
+		io_addr_sprd.id.vaddr =			\
+		ioremap_nocache(res.start, io_addr_sprd.id.length);\
+		pr_debug("sprd io map: phys=%16lx virt=%16lx size=%16lx\n", \
+	io_addr_sprd.id.paddr, io_addr_sprd.id.vaddr, io_addr_sprd.id.length);\
+	}						\
+} while (0)
+	ADD_SPRD_DEVICE("sprd,ahb", AHB);
+	ADD_SPRD_DEVICE("sprd,aonapb", AONAPB);
+	ADD_SPRD_DEVICE("sprd,aonckg", AONCKG);
+	ADD_SPRD_DEVICE("sprd,apbreg", APBREG);
+	ADD_SPRD_DEVICE("sprd,core", CORE);
+	ADD_SPRD_DEVICE("sprd,mmahb", MMAHB);
+	ADD_SPRD_DEVICE("sprd,pmu", PMU);
+	ADD_SPRD_DEVICE("sprd,mmckg", MMCKG);
+	ADD_SPRD_DEVICE("sprd,gpuapb", GPUAPB);
+	ADD_SPRD_DEVICE("sprd,apbckg", APBCKG);
+	ADD_SPRD_DEVICE("sprd,gpuckg", GPUCKG);
+	ADD_SPRD_DEVICE("sprd,int", INT);
+	ADD_SPRD_DEVICE("sprd,intc0", INTC0);
+	ADD_SPRD_DEVICE("sprd,intc1", INTC1);
+	ADD_SPRD_DEVICE("sprd,intc2", INTC2);
+	ADD_SPRD_DEVICE("sprd,intc3", INTC3);
+	ADD_SPRD_DEVICE("sprd,uidefuse", UIDEFUSE);
+	ADD_SPRD_DEVICE("sprd,isp", ISP);
+	ADD_SPRD_DEVICE("sprd,ca7wdg", CA7WDG);
+	ADD_SPRD_DEVICE("sprd,csi2", CSI2);
+	ADD_SPRD_DEVICE("sprd,d-eic-gpio", EIC);
+	ADD_SPRD_DEVICE("sprd,wdg", WDG);
+	ADD_SPRD_DEVICE("sprd,ipi", IPI);
+	ADD_SPRD_DEVICE("sprd,dcam", DCAM);
+	ADD_SPRD_DEVICE("sprd,syscnt", SYSCNT);
+	ADD_SPRD_DEVICE("sprd,dma0", DMA0);
+	ADD_SPRD_DEVICE("sprd,pub", PUB);
+	ADD_SPRD_DEVICE("sprd,pin", PIN);
+	ADD_SPRD_DEVICE("sprd,d-gpio-gpio", GPIO);
+	ADD_SPRD_DEVICE("sprd,codecahb", CODECAHB);
+	ADD_SPRD_DEVICE_BY_NAME("hwspinlock0", HWSPINLOCK0);
+	ADD_SPRD_DEVICE_BY_NAME("hwspinlock1", HWSPINLOCK1);
+
+	return 0;
+}
+
+static void __init sc8830_init_machine(void)
+{
+	printk("sci get chip id = 0x%x\n",__sci_get_chip_id());
+
+	//sci_adc_init((void __iomem *)ADC_BASE);
+	sci_adc_init();
+	sci_regulator_init();
+	of_sprd_default_bus_lookup[0].phys_addr = 0x20300000;
+	of_sprd_default_bus_lookup[1].phys_addr = 0x20400000;
+	of_sprd_default_bus_lookup[2].phys_addr = 0x20500000;
+	of_sprd_default_bus_lookup[3].phys_addr = 0x20600000;
+	of_platform_populate(NULL, of_sprd_default_bus_match_table, of_sprd_default_bus_lookup, NULL);
+	//sprd_sr2351_vddwpa_ctrl_power_register();
+}
+
+const struct of_device_id of_sprd_late_bus_match_table[] = {
+	{ .compatible = "sprd,sound", },
+	{}
+};
+
+static void __init sc8830_init_late(void)
+{
+	of_platform_populate(of_find_node_by_path("/sprd-audio-devices"),
+				of_sprd_late_bus_match_table, NULL, NULL);
+}
+
+extern void __init  sci_enable_timer_early(void);
+extern void __init sc_init_chip_id(void);
+
+void __init sprd_init_before_irq(void)
+{
+	iotable_build();
+	sc_init_chip_id();
+	/* earlier init request than irq and timer */
+	__clock_init_early();
+	/*ipi reg init for sipc*/
+	sci_glb_set(REG_AON_APB_APB_EB0, BIT_IPI_EB);
+}
+static void __init sc8830_pmu_init(void)
+{
+	__raw_writel(__raw_readl(REG_PMU_APB_PD_MM_TOP_CFG)
+		& ~(BIT_PD_MM_TOP_FORCE_SHUTDOWN),
+		REG_PMU_APB_PD_MM_TOP_CFG);
+
+	__raw_writel(__raw_readl(REG_PMU_APB_PD_GPU_TOP_CFG)
+		& ~(BIT_PD_GPU_TOP_FORCE_SHUTDOWN),
+		REG_PMU_APB_PD_GPU_TOP_CFG);
+
+	__raw_writel(__raw_readl(REG_AON_APB_APB_EB0) | BIT_MM_EB |
+		BIT_GPU_EB, REG_AON_APB_APB_EB0);
+
+	__raw_writel(__raw_readl(REG_AON_APB_APB_EB1) | BIT_CODEC_EB,REG_AON_APB_APB_EB1);
+	__raw_writel(__raw_readl(REG_MM_AHB_AHB_EB) | BIT_MM_CKG_EB,
+		REG_MM_AHB_AHB_EB);
+	__raw_writel(__raw_readl(REG_MM_AHB_GEN_CKG_CFG)
+		| BIT_MM_MTX_AXI_CKG_EN | BIT_MM_AXI_CKG_EN,
+		REG_MM_AHB_GEN_CKG_CFG);
+	__raw_writel(__raw_readl(REG_MM_CLK_MM_AHB_CFG) | 0x3,
+		REG_MM_CLK_MM_AHB_CFG);
+}
+
+static void __init sprd_init_time(void)
+{
+	if(of_have_populated_dt()){
+		sc8830_pmu_init();
+		of_clk_init(NULL);
+		clocksource_of_init();
+	}else{
+		sci_clock_init();
+		sci_enable_timer_early();
+		sci_timer_init();
+	}
+}
+static const char *sprd_boards_compat[] __initdata = {
+	"sprd,sp8835eb",
+	NULL,
+};
+extern struct smp_operations sprd_smp_ops;
+
+MACHINE_START(SCPHONE, "sc8830")
+	.smp		= smp_ops(sprd_smp_ops),
+	.reserve	= sci_reserve,
+	.map_io		= sci_map_io,
+	.init_irq	= sci_init_irq,
+	.init_time	= sprd_init_time,
+	.init_machine	= sc8830_init_machine,
+	.init_late	= sc8830_init_late,
+	.dt_compat	= sprd_boards_compat,
+MACHINE_END
+
diff --git a/arch/arm/mach-sc/board-sp8730seea_jig.c b/arch/arm/mach-sc/board-sp8730seea_jig.c
new file mode 100644
index 00000000..f9e0f165
--- /dev/null
+++ b/arch/arm/mach-sc/board-sp8730seea_jig.c
@@ -0,0 +1,405 @@
+/*
+ * Copyright (C) 2012 Spreadtrum Communications Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/delay.h>
+#include <linux/export.h>
+#include <linux/irqchip/arm-gic.h>
+#include <linux/input.h>
+
+#include <asm/io.h>
+#include <asm/setup.h>
+#include <asm/mach/time.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach-types.h>
+#include <linux/irqchip/arm-gic.h>
+#include <asm/hardware/cache-l2x0.h>
+#include <asm/localtimer.h>
+#include <linux/of_platform.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/clocksource.h>
+#include <linux/clk-provider.h>
+#include <soc/sprd/hardware.h>
+#include <linux/i2c.h>
+#if (defined(CONFIG_INPUT_LIS3DH_I2C) \
+	|| defined(CONFIG_INPUT_LIS3DH_I2C_MODULE))
+#include <linux/i2c/lis3dh.h>
+#endif
+#if (defined(CONFIG_INPUT_LTR558_I2C) \
+	|| defined(CONFIG_INPUT_LTR558_I2C_MODULE))
+#include <linux/i2c/ltr_558als.h>
+#endif
+#include <linux/spi/spi.h>
+#include <linux/gpio.h>
+#include <soc/sprd/board.h>
+#include <soc/sprd/serial_sprd.h>
+#include <soc/sprd/adi.h>
+#include <soc/sprd/adc.h>
+#include <soc/sprd/pinmap.h>
+#include <linux/irq.h>
+#include <linux/input/matrix_keypad.h>
+
+#include <soc/sprd/sci.h>
+#include <soc/sprd/hardware.h>
+#include <soc/sprd/kpd.h>
+#include <soc/sprd/sci_glb_regs.h>
+
+#if (defined(CONFIG_INV_MPU_IIO) || defined(CONFIG_INV_MPU_IIO_MODULE))
+#include <linux/mpu.h>
+#endif
+#if (defined(CONFIG_SENSORS_AK8975) || defined(CONFIG_SENSORS_AK8975_MODULE))
+#include <linux/akm8975.h>
+#endif
+
+
+
+#include <linux/regulator/consumer.h>
+#include <soc/sprd/regulator.h>
+#if (defined(CONFIG_TOUCHSCREEN_FOCALTECH) \
+	|| defined(CONFIG_TOUCHSCREEN_FOCALTECH_MODULE))
+#include <linux/i2c/focaltech.h>
+#endif
+#include <soc/sprd/i2s.h>
+#include <linux/sprd_2351.h>
+
+#if (defined(CONFIG_KEYBOARD_SC) \
+	|| defined(CONFIG_KEYBOARD_SC_MODULE))
+#include <linux/input/matrix_keypad.h>
+#include <soc/sprd/kpd.h>
+#endif
+#if (defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE))
+#include <linux/gpio_keys.h>
+#endif
+#if (defined(CONFIG_KEYBOARD_SPRD_EIC) \
+	|| defined(CONFIG_KEYBOARD_SPRD_EIC_MODULE))
+#include <linux/sprd_eic_keys.h>
+#endif
+#if (defined(CONFIG_BACKLIGHT_SPRD_PWM) \
+	|| defined(CONFIG_BACKLIGHT_SPRD_PWM_MODULE))
+#include <linux/sprd_pwm_bl.h>
+#endif
+#if (defined(CONFIG_INPUT_HEADSET_SPRD_SC2723) \
+	|| defined(CONFIG_INPUT_HEADSET_SPRD_SC2723_MODULE))
+#include <linux/headset_sprd_sc2723.h>
+#endif
+
+extern void __init sci_reserve(void);
+extern void __init sci_map_io(void);
+extern void __init sci_init_irq(void);
+extern void __init sci_timer_init(void);
+extern int __init sci_clock_init(void);
+extern int __init sci_regulator_init(void);
+
+#if (defined(CONFIG_BACKLIGHT_SPRD_PWM) \
+	|| defined(CONFIG_BACKLIGHT_SPRD_PWM_MODULE))
+static struct sprd_pwm_bl_platform_data sprd_pwm_bl_platform_data = {
+	.brightness_max = 255,
+	.brightness_min = 0,
+	.pwm_index = 3,
+	.gpio_ctrl_pin = -1,
+	.gpio_active_level = 0,
+};
+#endif
+
+#if (defined(CONFIG_INPUT_HEADSET_SPRD_SC2723) \
+	|| defined(CONFIG_INPUT_HEADSET_SPRD_SC2723_MODULE))
+static struct headset_buttons headset_sprd_sc2723_buttons[] = {
+	{
+		.adc_min = HEADSET_ADC_MIN_KEY_MEDIA,
+		.adc_max = HEADSET_ADC_MAX_KEY_MEDIA,
+		.code = KEY_MEDIA,
+	},
+#if 0
+	{
+		.adc_min = HEADSET_ADC_MIN_KEY_VOLUMEUP,
+		.adc_max = HEADSET_ADC_MAX_KEY_VOLUMEUP,
+		.code = KEY_VOLUMEUP,
+	},
+	{
+		.adc_min = HEADSET_ADC_MIN_KEY_VOLUMEDOWN,
+		.adc_max = HEADSET_ADC_MAX_KEY_VOLUMEDOWN,
+		.code = KEY_VOLUMEDOWN,
+	},
+#endif
+};
+
+static struct sprd_headset_platform_data headset_sprd_sc2723_pdata = {
+	.gpio_switch = HEADSET_SWITCH_GPIO,
+	.gpio_detect = HEADSET_DETECT_GPIO,
+	.gpio_button = HEADSET_BUTTON_GPIO,
+	.irq_trigger_level_detect = HEADSET_IRQ_TRIGGER_LEVEL_DETECT,
+	.irq_trigger_level_button = HEADSET_IRQ_TRIGGER_LEVEL_BUTTON,
+	.adc_threshold_3pole_detect = HEADSET_ADC_THRESHOLD_3POLE_DETECT,
+	.adc_threshold_4pole_detect = HEADSET_ADC_THRESHOLD_4POLE_DETECT,
+	.irq_threshold_buttont = HEADSET_IRQ_THRESHOLD_BUTTON,
+	.voltage_headmicbias = HEADSET_HEADMICBIAS_VOLTAGE,
+	.headset_buttons = headset_sprd_sc2723_buttons,
+	.nbuttons = ARRAY_SIZE(headset_sprd_sc2723_buttons),
+	.external_headmicbias_power_on = NULL,
+};
+#endif
+
+
+
+int __init __clock_init_early(void)
+{
+	pr_info("ahb ctl0 %08x, ctl2 %08x glb aon apb0 %08x aon apb1 %08x clk_en %08x\n",
+		sci_glb_raw_read(REG_AP_AHB_AHB_EB),
+		sci_glb_raw_read(REG_AP_AHB_AHB_RST),
+		sci_glb_raw_read(REG_AON_APB_APB_EB0),
+		sci_glb_raw_read(REG_AON_APB_APB_EB1),
+		sci_glb_raw_read(REG_AON_CLK_PUB_AHB_CFG));
+
+	sci_glb_clr(REG_AP_AHB_AHB_EB,
+		BIT_BUSMON2_EB		|
+		BIT_BUSMON1_EB		|
+		BIT_BUSMON0_EB		|
+		BIT_GPS_EB		|
+		BIT_DRM_EB		|
+		BIT_NFC_EB		|
+		0);
+	sci_glb_clr(REG_AP_APB_APB_EB,
+		BIT_INTC3_EB		|
+		BIT_INTC2_EB		|
+		BIT_INTC1_EB		|
+		BIT_IIS1_EB		|
+		BIT_UART2_EB		|
+		BIT_UART0_EB		|
+		BIT_SPI1_EB		|
+		BIT_SPI0_EB		|
+		BIT_IIS0_EB		|
+		BIT_I2C0_EB		|
+		BIT_SPI2_EB		|
+		BIT_UART3_EB		|
+		0);
+	sci_glb_clr(REG_AON_APB_APB_RTC_EB,
+		BIT_KPD_RTC_EB		|
+		BIT_KPD_EB		|
+		BIT_EFUSE_EB		|
+		0);
+
+	sci_glb_clr(REG_AON_APB_APB_EB0,
+		BIT_AUDIF_EB			|
+		BIT_VBC_EB			|
+
+		BIT_PWM1_EB			|
+		0);
+	sci_glb_clr(REG_AON_APB_APB_EB1,
+		BIT_AUX1_EB			|
+		BIT_AUX0_EB			|
+		0);
+
+	printk("sc clock module early init ok\n");
+	return 0;
+}
+
+static inline int __sci_get_chip_id(void)
+{
+	return __raw_readl(CHIP_ID_LOW_REG);
+}
+const struct of_device_id of_sprd_default_bus_match_table[] = {
+	{ .compatible = "simple-bus", },
+	{ .compatible = "sprd,adi-bus", },
+	{}
+};
+
+static struct of_dev_auxdata of_sprd_default_bus_lookup[] = {
+	{ .compatible = "sprd,sprd_backlight", .name = "sprd_backlight" },
+#if (defined(CONFIG_BACKLIGHT_SPRD_PWM) \
+	|| defined(CONFIG_BACKLIGHT_SPRD_PWM_MODULE))
+	{ .compatible = "sprd,sprd_pwm_bl",  .name = "sprd_pwm_bl" },
+#endif
+#if (defined(CONFIG_KEYBOARD_SC) \
+	|| defined(CONFIG_KEYBOARD_SC_MODULE))
+	{.compatible = "sprd,sci-keypad", .name = "sci-keypad" },
+#endif
+#if (defined(CONFIG_KEYBOARD_GPIO) \
+	|| defined(CONFIG_KEYBOARD_GPIO_MODULE))
+	{.compatible = "gpio-keys", .name = "gpio-keys" },
+#endif
+#if (defined(CONFIG_KEYBOARD_SPRD_EIC) \
+	|| defined(CONFIG_KEYBOARD_SPRD_EIC_MODULE))
+	{.compatible = "sprd,sprd-eic-keys", .name = "sprd-eic-keys" },
+#endif
+#if (defined(CONFIG_INPUT_HEADSET_SPRD_SC2723) \
+	|| defined(CONFIG_INPUT_HEADSET_SPRD_SC2723_MODULE))
+	{ .compatible = "sprd,headset_sprd_sc2723",  .name = "headset_sprd_sc2723" },
+#endif
+	 {}
+};
+
+struct iotable_sprd io_addr_sprd;
+EXPORT_SYMBOL(io_addr_sprd);
+
+int iotable_build()
+{
+	struct device_node *np;
+	struct resource res;
+
+#define ADD_SPRD_DEVICE(compat, id)			\
+do {							\
+	np = of_find_compatible_node(NULL, NULL, compat);\
+	if (of_can_translate_address(np)) {		\
+		of_address_to_resource(np, 0, &res);	\
+		io_addr_sprd.id.paddr = res.start;	\
+		io_addr_sprd.id.length =		\
+			resource_size(&res);		\
+		io_addr_sprd.id.vaddr =			\
+		ioremap_nocache(res.start, io_addr_sprd.id.length);\
+		pr_debug("sprd io map: phys=%08x virt=%08x size=%08x\n", \
+	io_addr_sprd.id.paddr, io_addr_sprd.id.vaddr, io_addr_sprd.id.length);\
+	}						\
+} while (0)
+#define ADD_SPRD_DEVICE_BY_NAME(name, id)		\
+do {							\
+	np = of_find_node_by_name(NULL, name);		\
+	if (of_can_translate_address(np)) {		\
+		of_address_to_resource(np, 0, &res);	\
+		io_addr_sprd.id.paddr = res.start;	\
+		io_addr_sprd.id.length =		\
+			resource_size(&res);		\
+		io_addr_sprd.id.vaddr =			\
+		ioremap_nocache(res.start, io_addr_sprd.id.length);\
+		pr_debug("sprd io map: phys=%16lx virt=%16lx size=%16lx\n", \
+	io_addr_sprd.id.paddr, io_addr_sprd.id.vaddr, io_addr_sprd.id.length);\
+	}						\
+} while (0)
+	ADD_SPRD_DEVICE("sprd,ahb", AHB);
+	ADD_SPRD_DEVICE("sprd,aonapb", AONAPB);
+	ADD_SPRD_DEVICE("sprd,aonckg", AONCKG);
+	ADD_SPRD_DEVICE("sprd,apbreg", APBREG);
+	ADD_SPRD_DEVICE("sprd,core", CORE);
+	ADD_SPRD_DEVICE("sprd,mmahb", MMAHB);
+	ADD_SPRD_DEVICE("sprd,pmu", PMU);
+	ADD_SPRD_DEVICE("sprd,mmckg", MMCKG);
+	ADD_SPRD_DEVICE("sprd,gpuapb", GPUAPB);
+	ADD_SPRD_DEVICE("sprd,apbckg", APBCKG);
+	ADD_SPRD_DEVICE("sprd,gpuckg", GPUCKG);
+	ADD_SPRD_DEVICE("sprd,int", INT);
+	ADD_SPRD_DEVICE("sprd,intc0", INTC0);
+	ADD_SPRD_DEVICE("sprd,intc1", INTC1);
+	ADD_SPRD_DEVICE("sprd,intc2", INTC2);
+	ADD_SPRD_DEVICE("sprd,intc3", INTC3);
+	ADD_SPRD_DEVICE("sprd,uidefuse", UIDEFUSE);
+	ADD_SPRD_DEVICE("sprd,isp", ISP);
+	ADD_SPRD_DEVICE("sprd,ca7wdg", CA7WDG);
+	ADD_SPRD_DEVICE("sprd,csi2", CSI2);
+	ADD_SPRD_DEVICE("sprd,d-eic-gpio", EIC);
+	ADD_SPRD_DEVICE("sprd,wdg", WDG);
+	ADD_SPRD_DEVICE("sprd,ipi", IPI);
+	ADD_SPRD_DEVICE("sprd,dcam", DCAM);
+	ADD_SPRD_DEVICE("sprd,syscnt", SYSCNT);
+	ADD_SPRD_DEVICE("sprd,dma0", DMA0);
+	ADD_SPRD_DEVICE("sprd,pub", PUB);
+	ADD_SPRD_DEVICE("sprd,pin", PIN);
+	ADD_SPRD_DEVICE("sprd,d-gpio-gpio", GPIO);
+	ADD_SPRD_DEVICE("sprd,codecahb", CODECAHB);
+	ADD_SPRD_DEVICE_BY_NAME("hwspinlock0", HWSPINLOCK0);
+	ADD_SPRD_DEVICE_BY_NAME("hwspinlock1", HWSPINLOCK1);
+
+	return 0;
+}
+
+static void __init sc8830_init_machine(void)
+{
+	printk("sci get chip id = 0x%x\n", __sci_get_chip_id());
+
+	/* sci_adc_init((void __iomem *)ADC_BASE); */
+	sci_adc_init();
+	sci_regulator_init();
+	of_sprd_default_bus_lookup[0].phys_addr = 0x20300000;
+	of_sprd_default_bus_lookup[1].phys_addr = 0x20400000;
+	of_sprd_default_bus_lookup[2].phys_addr = 0x20500000;
+	of_sprd_default_bus_lookup[3].phys_addr = 0x20600000;
+	of_platform_populate(NULL, of_sprd_default_bus_match_table, of_sprd_default_bus_lookup, NULL);
+	/* sprd_sr2351_vddwpa_ctrl_power_register(); */
+}
+
+const struct of_device_id of_sprd_late_bus_match_table[] = {
+	{ .compatible = "sprd,sound", },
+	{}
+};
+
+static void __init sc8830_init_late(void)
+{
+	of_platform_populate(of_find_node_by_path("/sprd-audio-devices"),
+				of_sprd_late_bus_match_table, NULL, NULL);
+}
+
+extern void __init sci_enable_timer_early(void);
+extern void __init sc_init_chip_id(void);
+
+void __init sprd_init_before_irq(void)
+{
+	iotable_build();
+	sc_init_chip_id();
+	/* earlier init request than irq and timer */
+	__clock_init_early();
+	/*ipi reg init for sipc*/
+	sci_glb_set(REG_AON_APB_APB_EB0, BIT_IPI_EB);
+}
+static void __init sc8830_pmu_init(void)
+{
+	__raw_writel(__raw_readl(REG_PMU_APB_PD_MM_TOP_CFG)
+		& ~(BIT_PD_MM_TOP_FORCE_SHUTDOWN),
+		REG_PMU_APB_PD_MM_TOP_CFG);
+
+	__raw_writel(__raw_readl(REG_PMU_APB_PD_GPU_TOP_CFG)
+		& ~(BIT_PD_GPU_TOP_FORCE_SHUTDOWN),
+		REG_PMU_APB_PD_GPU_TOP_CFG);
+
+	__raw_writel(__raw_readl(REG_AON_APB_APB_EB0) | BIT_MM_EB |
+		BIT_GPU_EB, REG_AON_APB_APB_EB0);
+
+	__raw_writel(__raw_readl(REG_AON_APB_APB_EB1) | BIT_CODEC_EB, REG_AON_APB_APB_EB1);
+	__raw_writel(__raw_readl(REG_MM_AHB_AHB_EB) | BIT_MM_CKG_EB,
+		REG_MM_AHB_AHB_EB);
+	__raw_writel(__raw_readl(REG_MM_AHB_GEN_CKG_CFG)
+		| BIT_MM_MTX_AXI_CKG_EN | BIT_MM_AXI_CKG_EN,
+		REG_MM_AHB_GEN_CKG_CFG);
+	__raw_writel(__raw_readl(REG_MM_CLK_MM_AHB_CFG) | 0x3,
+		REG_MM_CLK_MM_AHB_CFG);
+}
+
+static void sprd_init_time(void)
+{
+	if (of_have_populated_dt()) {
+		sc8830_pmu_init();
+		of_clk_init(NULL);
+		clocksource_of_init();
+	} else{
+		sci_clock_init();
+		sci_enable_timer_early();
+		sci_timer_init();
+	}
+}
+static const char *sprd_boards_compat[] __initdata = {
+	"sprd,sp8835eb",
+	NULL,
+};
+extern struct smp_operations sprd_smp_ops;
+
+MACHINE_START(SCPHONE, "sc8830")
+	.smp		= smp_ops(sprd_smp_ops),
+	.reserve	= sci_reserve,
+	.map_io		= sci_map_io,
+	.init_irq	= sci_init_irq,
+	.init_time	= sprd_init_time,
+	.init_machine	= sc8830_init_machine,
+	.init_late	= sc8830_init_late,
+	.dt_compat	= sprd_boards_compat,
+MACHINE_END
+
diff --git a/arch/arm/mach-sc/board-sp8730seea_qhd.c b/arch/arm/mach-sc/board-sp8730seea_qhd.c
new file mode 100644
index 00000000..986ed345
--- /dev/null
+++ b/arch/arm/mach-sc/board-sp8730seea_qhd.c
@@ -0,0 +1,410 @@
+/*
+ * Copyright (C) 2012 Spreadtrum Communications Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/delay.h>
+#include <linux/export.h>
+#include <linux/irqchip/arm-gic.h>
+#include <linux/input.h>
+
+#include <asm/io.h>
+#include <asm/setup.h>
+#include <asm/mach/time.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach-types.h>
+#include <linux/irqchip/arm-gic.h>
+#include <asm/hardware/cache-l2x0.h>
+#include <asm/localtimer.h>
+#include <linux/of_platform.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/clocksource.h>
+#include <linux/clk-provider.h>
+#include <soc/sprd/hardware.h>
+#include <linux/i2c.h>
+#if(defined(CONFIG_INPUT_LIS3DH_I2C)||defined(CONFIG_INPUT_LIS3DH_I2C_MODULE))
+#include <linux/i2c/lis3dh.h>
+#endif
+#if(defined(CONFIG_INPUT_LTR558_I2C)||defined(CONFIG_INPUT_LTR558_I2C_MODULE))
+#include <linux/i2c/ltr_558als.h>
+#endif
+#include <linux/spi/spi.h>
+#include <linux/gpio.h>
+#include <soc/sprd/board.h>
+#include <soc/sprd/serial_sprd.h>
+#include <soc/sprd/adi.h>
+#include <soc/sprd/adc.h>
+#include <soc/sprd/pinmap.h>
+#include <linux/irq.h>
+#include <linux/input/matrix_keypad.h>
+
+#include <soc/sprd/sci.h>
+#include <soc/sprd/hardware.h>
+#include <soc/sprd/kpd.h>
+#include <soc/sprd/sci_glb_regs.h>
+
+#if(defined(CONFIG_INV_MPU_IIO)||defined(CONFIG_INV_MPU_IIO_MODULE))
+#include <linux/mpu.h>
+#endif
+#if(defined(CONFIG_SENSORS_AK8975)||defined(CONFIG_SENSORS_AK8975_MODULE))
+#include <linux/akm8975.h>
+#endif
+
+//#include "devices.h"
+
+#include <linux/regulator/consumer.h>
+#include <soc/sprd/regulator.h>
+#if(defined(CONFIG_TOUCHSCREEN_FOCALTECH)||defined(CONFIG_TOUCHSCREEN_FOCALTECH_MODULE))
+#include <linux/i2c/focaltech.h>
+#endif
+#include <soc/sprd/i2s.h>
+#include <linux/sprd_2351.h>
+
+#if(defined(CONFIG_KEYBOARD_SC)||defined(CONFIG_KEYBOARD_SC_MODULE))
+#include <linux/input/matrix_keypad.h>
+#include <soc/sprd/kpd.h>
+#endif
+#if(defined(CONFIG_KEYBOARD_GPIO)||defined(CONFIG_KEYBOARD_GPIO_MODULE))
+#include <linux/gpio_keys.h>
+#endif
+#if(defined(CONFIG_KEYBOARD_SPRD_EIC)||defined(CONFIG_KEYBOARD_SPRD_EIC_MODULE))
+#include <linux/sprd_eic_keys.h>
+#endif
+#if(defined(CONFIG_BACKLIGHT_SPRD_PWM)||defined(CONFIG_BACKLIGHT_SPRD_PWM_MODULE))
+#include <linux/sprd_pwm_bl.h>
+#endif
+#if(defined(CONFIG_INPUT_HEADSET_SPRD_SC2723)||defined(CONFIG_INPUT_HEADSET_SPRD_SC2723_MODULE))
+#include <linux/headset_sprd_sc2723.h>
+#endif
+
+extern void __init sci_reserve(void);
+extern void __init sci_map_io(void);
+extern void __init sci_init_irq(void);
+extern void __init sci_timer_init(void);
+extern int __init sci_clock_init(void);
+extern int __init sci_regulator_init(void);
+
+#if(defined(CONFIG_BACKLIGHT_SPRD_PWM)||defined(CONFIG_BACKLIGHT_SPRD_PWM_MODULE))
+static struct sprd_pwm_bl_platform_data sprd_pwm_bl_platform_data = {
+	.brightness_max = 255,
+	.brightness_min = 0,
+	.pwm_index = 3,
+	.gpio_ctrl_pin = -1,
+	.gpio_active_level = 0,
+};
+#endif
+
+#if(defined(CONFIG_INPUT_HEADSET_SPRD_SC2723)||defined(CONFIG_INPUT_HEADSET_SPRD_SC2723_MODULE))
+static struct headset_buttons headset_sprd_sc2723_buttons[] = {
+	{
+		.adc_min = HEADSET_ADC_MIN_KEY_MEDIA,
+		.adc_max = HEADSET_ADC_MAX_KEY_MEDIA,
+		.code = KEY_MEDIA,
+	},
+#if 0
+	{
+		.adc_min = HEADSET_ADC_MIN_KEY_VOLUMEUP,
+		.adc_max = HEADSET_ADC_MAX_KEY_VOLUMEUP,
+		.code = KEY_VOLUMEUP,
+	},
+	{
+		.adc_min = HEADSET_ADC_MIN_KEY_VOLUMEDOWN,
+		.adc_max = HEADSET_ADC_MAX_KEY_VOLUMEDOWN,
+		.code = KEY_VOLUMEDOWN,
+	},
+#endif
+};
+
+static struct sprd_headset_platform_data headset_sprd_sc2723_pdata = {
+	.gpio_switch = HEADSET_SWITCH_GPIO,
+	.gpio_detect = HEADSET_DETECT_GPIO,
+	.gpio_button = HEADSET_BUTTON_GPIO,
+	.irq_trigger_level_detect = HEADSET_IRQ_TRIGGER_LEVEL_DETECT,
+	.irq_trigger_level_button = HEADSET_IRQ_TRIGGER_LEVEL_BUTTON,
+	.adc_threshold_3pole_detect = HEADSET_ADC_THRESHOLD_3POLE_DETECT,
+	.adc_threshold_4pole_detect = HEADSET_ADC_THRESHOLD_4POLE_DETECT,
+	.irq_threshold_buttont = HEADSET_IRQ_THRESHOLD_BUTTON,
+	.voltage_headmicbias = HEADSET_HEADMICBIAS_VOLTAGE,
+	.headset_buttons = headset_sprd_sc2723_buttons,
+	.nbuttons = ARRAY_SIZE(headset_sprd_sc2723_buttons),
+	.external_headmicbias_power_on = NULL,
+};
+#endif
+
+/*
+#if(defined(CONFIG_SPRD_KPLED_2723) || defined(CONFIG_SPRD_KPLED_2723_MODULE))
+struct sprd_kpled_2723_platform_data sprd_kpled_2723_pdata = {
+	.brightness_max = 255,
+	.brightness_min = 0,
+	.run_mode = 0,
+}
+#endif
+*/
+
+int __init __clock_init_early(void)
+{
+	pr_info("ahb ctl0 %08x, ctl2 %08x glb aon apb0 %08x aon apb1 %08x clk_en %08x\n",
+		sci_glb_raw_read(REG_AP_AHB_AHB_EB),
+		sci_glb_raw_read(REG_AP_AHB_AHB_RST),
+		sci_glb_raw_read(REG_AON_APB_APB_EB0),
+		sci_glb_raw_read(REG_AON_APB_APB_EB1),
+		sci_glb_raw_read(REG_AON_CLK_PUB_AHB_CFG));
+
+	sci_glb_clr(REG_AP_AHB_AHB_EB,
+		BIT_BUSMON2_EB		|
+		BIT_BUSMON1_EB		|
+		BIT_BUSMON0_EB		|
+		//BIT_SPINLOCK_EB		|
+		BIT_GPS_EB		|
+		//BIT_EMMC_EB		|
+		//BIT_SDIO2_EB		|
+		//BIT_SDIO1_EB		|
+		//BIT_SDIO0_EB		|
+		BIT_DRM_EB		|
+		BIT_NFC_EB		|
+		//BIT_DMA_EB		|
+		//BIT_USB_EB		|
+		//BIT_GSP_EB		|
+		//BIT_DISPC1_EB		|
+		//BIT_DISPC0_EB		|
+		//BIT_DSI_EB		|
+		0);
+	sci_glb_clr(REG_AP_APB_APB_EB,
+		BIT_INTC3_EB		|
+		BIT_INTC2_EB		|
+		BIT_INTC1_EB		|
+		BIT_IIS1_EB		|
+		BIT_UART2_EB		|
+		BIT_UART0_EB		|
+		BIT_SPI1_EB		|
+		BIT_SPI0_EB		|
+		BIT_IIS0_EB		|
+		BIT_I2C0_EB		|
+		BIT_SPI2_EB		|
+		BIT_UART3_EB		|
+		0);
+	sci_glb_clr(REG_AON_APB_APB_RTC_EB,
+		BIT_KPD_RTC_EB		|
+		BIT_KPD_EB		|
+		BIT_EFUSE_EB		|
+		0);
+
+	sci_glb_clr(REG_AON_APB_APB_EB0,
+		BIT_AUDIF_EB			|
+		BIT_VBC_EB			|
+		//BIT_PWM3_EB			|
+		BIT_PWM1_EB			|
+		0);
+	sci_glb_clr(REG_AON_APB_APB_EB1,
+		BIT_AUX1_EB			|
+		BIT_AUX0_EB			|
+		0);
+
+	printk("sc clock module early init ok\n");
+	return 0;
+}
+
+static inline int __sci_get_chip_id(void)
+{
+	return __raw_readl(CHIP_ID_LOW_REG);
+}
+const struct of_device_id of_sprd_default_bus_match_table[] = {
+	{ .compatible = "simple-bus", },
+	{ .compatible = "sprd,adi-bus", },
+	{}
+};
+
+static struct of_dev_auxdata of_sprd_default_bus_lookup[] = {
+	{ .compatible = "sprd,sprd_backlight", .name = "sprd_backlight" },
+#if (defined(CONFIG_BACKLIGHT_SPRD_PWM) || defined(CONFIG_BACKLIGHT_SPRD_PWM_MODULE))
+	{ .compatible = "sprd,sprd_pwm_bl",  .name = "sprd_pwm_bl" },
+#endif
+#if (defined(CONFIG_KEYBOARD_SC) || defined(CONFIG_KEYBOARD_SC_MODULE))
+	{.compatible = "sprd,sci-keypad", .name = "sci-keypad" },
+#endif
+#if (defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE))
+	{.compatible = "gpio-keys", .name = "gpio-keys" },
+#endif
+#if (defined(CONFIG_KEYBOARD_SPRD_EIC) || defined(CONFIG_KEYBOARD_SPRD_EIC_MODULE))
+	{.compatible = "sprd,sprd-eic-keys", .name = "sprd-eic-keys" },
+#endif
+#if (defined(CONFIG_INPUT_HEADSET_SPRD_SC2723) || defined(CONFIG_INPUT_HEADSET_SPRD_SC2723_MODULE))
+	{ .compatible = "sprd,headset_sprd_sc2723",  .name = "headset_sprd_sc2723" },
+#endif
+	 {}
+};
+
+struct iotable_sprd io_addr_sprd;
+EXPORT_SYMBOL(io_addr_sprd);
+
+int iotable_build()
+{
+	struct device_node *np;
+	struct resource res;
+
+#define ADD_SPRD_DEVICE(compat, id)			\
+do {							\
+	np = of_find_compatible_node(NULL, NULL, compat);\
+	if (of_can_translate_address(np)) {		\
+		of_address_to_resource(np, 0, &res);	\
+		io_addr_sprd.id.paddr = res.start;	\
+		io_addr_sprd.id.length =		\
+			resource_size(&res);		\
+		io_addr_sprd.id.vaddr =			\
+		ioremap_nocache(res.start, io_addr_sprd.id.length);\
+		pr_debug("sprd io map: phys=%08x virt=%08x size=%08x\n", \
+	io_addr_sprd.id.paddr, io_addr_sprd.id.vaddr, io_addr_sprd.id.length);\
+	}						\
+} while (0)
+#define ADD_SPRD_DEVICE_BY_NAME(name, id)		\
+do {							\
+	np = of_find_node_by_name(NULL, name);		\
+	if (of_can_translate_address(np)) {		\
+		of_address_to_resource(np, 0, &res);	\
+		io_addr_sprd.id.paddr = res.start;	\
+		io_addr_sprd.id.length =		\
+			resource_size(&res);		\
+		io_addr_sprd.id.vaddr =			\
+		ioremap_nocache(res.start, io_addr_sprd.id.length);\
+		pr_debug("sprd io map: phys=%16lx virt=%16lx size=%16lx\n", \
+	io_addr_sprd.id.paddr, io_addr_sprd.id.vaddr, io_addr_sprd.id.length);\
+	}						\
+} while (0)
+	ADD_SPRD_DEVICE("sprd,ahb", AHB);
+	ADD_SPRD_DEVICE("sprd,aonapb", AONAPB);
+	ADD_SPRD_DEVICE("sprd,aonckg", AONCKG);
+	ADD_SPRD_DEVICE("sprd,apbreg", APBREG);
+	ADD_SPRD_DEVICE("sprd,core", CORE);
+	ADD_SPRD_DEVICE("sprd,mmahb", MMAHB);
+	ADD_SPRD_DEVICE("sprd,pmu", PMU);
+	ADD_SPRD_DEVICE("sprd,mmckg", MMCKG);
+	ADD_SPRD_DEVICE("sprd,gpuapb", GPUAPB);
+	ADD_SPRD_DEVICE("sprd,apbckg", APBCKG);
+	ADD_SPRD_DEVICE("sprd,gpuckg", GPUCKG);
+	ADD_SPRD_DEVICE("sprd,int", INT);
+	ADD_SPRD_DEVICE("sprd,intc0", INTC0);
+	ADD_SPRD_DEVICE("sprd,intc1", INTC1);
+	ADD_SPRD_DEVICE("sprd,intc2", INTC2);
+	ADD_SPRD_DEVICE("sprd,intc3", INTC3);
+	ADD_SPRD_DEVICE("sprd,uidefuse", UIDEFUSE);
+	ADD_SPRD_DEVICE("sprd,isp", ISP);
+	ADD_SPRD_DEVICE("sprd,ca7wdg", CA7WDG);
+	ADD_SPRD_DEVICE("sprd,csi2", CSI2);
+	ADD_SPRD_DEVICE("sprd,d-eic-gpio", EIC);
+	ADD_SPRD_DEVICE("sprd,wdg", WDG);
+	ADD_SPRD_DEVICE("sprd,ipi", IPI);
+	ADD_SPRD_DEVICE("sprd,dcam", DCAM);
+	ADD_SPRD_DEVICE("sprd,syscnt", SYSCNT);
+	ADD_SPRD_DEVICE("sprd,dma0", DMA0);
+	ADD_SPRD_DEVICE("sprd,pub", PUB);
+	ADD_SPRD_DEVICE("sprd,pin", PIN);
+	ADD_SPRD_DEVICE("sprd,d-gpio-gpio", GPIO);
+	ADD_SPRD_DEVICE("sprd,codecahb", CODECAHB);
+	ADD_SPRD_DEVICE_BY_NAME("hwspinlock0", HWSPINLOCK0);
+	ADD_SPRD_DEVICE_BY_NAME("hwspinlock1", HWSPINLOCK1);
+
+	return 0;
+}
+
+static void __init sc8830_init_machine(void)
+{
+	printk("sci get chip id = 0x%x\n",__sci_get_chip_id());
+
+	//sci_adc_init((void __iomem *)ADC_BASE);
+	sci_adc_init();
+	sci_regulator_init();
+	of_sprd_default_bus_lookup[0].phys_addr = 0x20300000;
+	of_sprd_default_bus_lookup[1].phys_addr = 0x20400000;
+	of_sprd_default_bus_lookup[2].phys_addr = 0x20500000;
+	of_sprd_default_bus_lookup[3].phys_addr = 0x20600000;
+	of_platform_populate(NULL, of_sprd_default_bus_match_table, of_sprd_default_bus_lookup, NULL);
+	//sprd_sr2351_vddwpa_ctrl_power_register();
+}
+
+const struct of_device_id of_sprd_late_bus_match_table[] = {
+	{ .compatible = "sprd,sound", },
+	{}
+};
+
+static void __init sc8830_init_late(void)
+{
+	of_platform_populate(of_find_node_by_path("/sprd-audio-devices"),
+				of_sprd_late_bus_match_table, NULL, NULL);
+}
+
+extern void __init  sci_enable_timer_early(void);
+extern void __init sc_init_chip_id(void);
+
+void __init sprd_init_before_irq(void)
+{
+	iotable_build();
+	sc_init_chip_id();
+	/* earlier init request than irq and timer */
+	__clock_init_early();
+	/*ipi reg init for sipc*/
+	sci_glb_set(REG_AON_APB_APB_EB0, BIT_IPI_EB);
+}
+static void __init sc8830_pmu_init(void)
+{
+	__raw_writel(__raw_readl(REG_PMU_APB_PD_MM_TOP_CFG)
+		& ~(BIT_PD_MM_TOP_FORCE_SHUTDOWN),
+		REG_PMU_APB_PD_MM_TOP_CFG);
+
+	__raw_writel(__raw_readl(REG_PMU_APB_PD_GPU_TOP_CFG)
+		& ~(BIT_PD_GPU_TOP_FORCE_SHUTDOWN),
+		REG_PMU_APB_PD_GPU_TOP_CFG);
+
+	__raw_writel(__raw_readl(REG_AON_APB_APB_EB0) | BIT_MM_EB |
+		BIT_GPU_EB, REG_AON_APB_APB_EB0);
+
+	__raw_writel(__raw_readl(REG_AON_APB_APB_EB1) | BIT_CODEC_EB,REG_AON_APB_APB_EB1);
+	__raw_writel(__raw_readl(REG_MM_AHB_AHB_EB) | BIT_MM_CKG_EB,
+		REG_MM_AHB_AHB_EB);
+	__raw_writel(__raw_readl(REG_MM_AHB_GEN_CKG_CFG)
+		| BIT_MM_MTX_AXI_CKG_EN | BIT_MM_AXI_CKG_EN,
+		REG_MM_AHB_GEN_CKG_CFG);
+	__raw_writel(__raw_readl(REG_MM_CLK_MM_AHB_CFG) | 0x3,
+		REG_MM_CLK_MM_AHB_CFG);
+}
+
+static void __init sprd_init_time(void)
+{
+	if(of_have_populated_dt()){
+		sc8830_pmu_init();
+		of_clk_init(NULL);
+		clocksource_of_init();
+	}else{
+		sci_clock_init();
+		sci_enable_timer_early();
+		sci_timer_init();
+	}
+}
+static const char *sprd_boards_compat[] __initdata = {
+	"sprd,sp8835eb",
+	NULL,
+};
+extern struct smp_operations sprd_smp_ops;
+
+MACHINE_START(SCPHONE, "sc8830")
+	.smp		= smp_ops(sprd_smp_ops),
+	.reserve	= sci_reserve,
+	.map_io		= sci_map_io,
+	.init_irq	= sci_init_irq,
+	.init_time	= sprd_init_time,
+	.init_machine	= sc8830_init_machine,
+	.init_late	= sc8830_init_late,
+	.dt_compat	= sprd_boards_compat,
+MACHINE_END
+
diff --git a/arch/arm/mach-sc/board-sp8830fpga.c b/arch/arm/mach-sc/board-sp8830fpga.c
new file mode 100644
index 00000000..790a3c03
--- /dev/null
+++ b/arch/arm/mach-sc/board-sp8830fpga.c
@@ -0,0 +1,1055 @@
+/*
+ * Copyright (C) 2012 Spreadtrum Communications Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/delay.h>
+#include <linux/export.h>
+#include <linux/irqchip/arm-gic.h>
+#include <linux/input.h>
+
+#include <asm/io.h>
+#include <asm/setup.h>
+#include <asm/mach/time.h>
+#include <asm/mach/arch.h>
+#include <asm/mach-types.h>
+#include <asm/hardware/cache-l2x0.h>
+#include <asm/localtimer.h>
+#ifdef CONFIG_OF
+#include <linux/of_platform.h>
+#include <linux/clocksource.h>
+#include <linux/clk-provider.h>
+#endif
+#include <mach/hardware.h>
+#include <linux/i2c.h>
+#if(defined(CONFIG_INPUT_LIS3DH_I2C)||defined(CONFIG_INPUT_LIS3DH_I2C_MODULE))
+#include <linux/i2c/lis3dh.h>
+#endif
+#if(defined(CONFIG_INPUT_LTR558_I2C)||defined(CONFIG_INPUT_LTR558_I2C_MODULE))
+#include <linux/i2c/ltr_558als.h>
+#endif
+//#include <linux/i2c/ft53x6_ts.h>
+//#include <linux/i2c/lis3dh.h>
+//#include <linux/i2c/ltr_558als.h>
+//#include <linux/akm8975.h>
+#include <linux/spi/spi.h>
+#include <linux/gpio.h>
+#include <mach/board.h>
+#include <mach/serial_sprd.h>
+#include <mach/adi.h>
+#include <mach/adc.h>
+#include <mach/pinmap.h>
+#if(defined(CONFIG_INV_MPU_IIO)||defined(CONFIG_INV_MPU_IIO_MODULE))
+#include <linux/mpu.h>
+#endif
+#if(defined(CONFIG_SENSORS_AK8975)||defined(CONFIG_SENSORS_AK8975_MODULE))
+#include <linux/akm8975.h>
+#endif
+#include <linux/irq.h>
+
+#include <mach/sci.h>
+#include <mach/hardware.h>
+
+#include <mach/sci_glb_regs.h>
+
+
+#include "devices.h"
+
+/* IRQ's for the multi sensor board */
+#define MPUIRQ_GPIO 212
+#include <linux/regulator/consumer.h>
+#include <mach/regulator.h>
+#if(defined(CONFIG_TOUCHSCREEN_FOCALTECH)||defined(CONFIG_TOUCHSCREEN_FOCALTECH_MODULE))
+#include <linux/i2c/focaltech.h>
+#endif
+
+#if(defined(CONFIG_KEYBOARD_SC)||defined(CONFIG_KEYBOARD_SC_MODULE))
+#include <linux/input/matrix_keypad.h>
+#include <mach/kpd.h>
+#endif
+#if(defined(CONFIG_KEYBOARD_GPIO)||defined(CONFIG_KEYBOARD_GPIO_MODULE))
+#include <linux/gpio_keys.h>
+#endif
+#if(defined(CONFIG_KEYBOARD_SPRD_EIC)||defined(CONFIG_KEYBOARD_SPRD_EIC_MODULE))
+#include <linux/sprd_eic_keys.h>
+#endif
+#if(defined(CONFIG_BACKLIGHT_SPRD_PWM)||defined(CONFIG_BACKLIGHT_SPRD_PWM_MODULE))
+#include <linux/sprd_pwm_bl.h>
+#endif
+
+extern void __init sci_reserve(void);
+extern void __init sci_map_io(void);
+extern void __init sci_init_irq(void);
+extern void __init sci_timer_init(void);
+extern int __init sci_clock_init(void);
+extern int __init sci_regulator_init(void);
+#ifdef CONFIG_ANDROID_RAM_CONSOLE
+extern int __init sprd_ramconsole_init(void);
+#endif
+
+#ifndef CONFIG_OF
+#if(defined(CONFIG_KEYBOARD_SC)||defined(CONFIG_KEYBOARD_SC_MODULE))
+#define CUSTOM_KEYPAD_ROWS          (SCI_ROW7 | SCI_ROW6 | SCI_ROW5 | SCI_ROW4 | SCI_ROW3 | SCI_ROW2 | SCI_ROW1 | SCI_ROW0)
+#define CUSTOM_KEYPAD_COLS          (SCI_COL7 | SCI_COL6 | SCI_COL5 | SCI_COL4 | SCI_COL3 | SCI_COL2 | SCI_COL1 | SCI_COL0)
+#define ROWS	(8)
+#define COLS	(8)
+static const unsigned int board_keymap[] = {
+	KEY(0, 0, KEY_F1),
+
+	KEY(0, 3, KEY_COFFEE),
+	KEY(0, 2, KEY_QUESTION),
+	KEY(2, 3, KEY_CONNECT),
+	KEY(1, 2, KEY_SHOP),
+	KEY(1, 1, KEY_PHONE),
+
+	KEY(0, 1, KEY_DELETE),
+	KEY(2, 2, KEY_PLAY),
+	KEY(1, 0, KEY_PAGEUP),
+	KEY(1, 3, KEY_PAGEDOWN),
+	KEY(2, 0, KEY_EMAIL),
+	KEY(2, 1, KEY_STOP),
+
+	KEY(0, 7, KEY_KP1),
+	KEY(0, 6, KEY_KP2),
+	KEY(0, 5, KEY_KP3),
+	KEY(1, 7, KEY_KP4),
+	KEY(1, 6, KEY_KP5),
+	KEY(1, 5, KEY_KP6),
+	KEY(2, 7, KEY_KP7),
+	KEY(2, 6, KEY_KP8),
+	KEY(2, 5, KEY_KP9),
+	KEY(3, 6, KEY_KP0),
+	KEY(3, 7, KEY_KPASTERISK),
+	KEY(3, 5, KEY_KPDOT),
+	KEY(7, 2, KEY_NUMLOCK),
+	KEY(7, 1, KEY_KPMINUS),
+	KEY(6, 1, KEY_KPPLUS),
+	KEY(7, 6, KEY_KPSLASH),
+	KEY(6, 0, KEY_ENTER),
+
+	KEY(7, 4, KEY_CAMERA),
+
+	KEY(0, 4, KEY_F2),
+	KEY(1, 4, KEY_F3),
+	KEY(2, 4, KEY_F4),
+	KEY(7, 7, KEY_F5),
+	KEY(7, 5, KEY_F6),
+
+	KEY(3, 4, KEY_Q),
+	KEY(3, 3, KEY_W),
+	KEY(3, 2, KEY_E),
+	KEY(3, 1, KEY_R),
+	KEY(3, 0, KEY_T),
+	KEY(4, 7, KEY_Y),
+	KEY(4, 6, KEY_U),
+	KEY(4, 5, KEY_I),
+	KEY(4, 4, KEY_O),
+	KEY(4, 3, KEY_P),
+	KEY(4, 2, KEY_A),
+	KEY(4, 1, KEY_S),
+	KEY(4, 0, KEY_D),
+	KEY(5, 7, KEY_F),
+	KEY(5, 6, KEY_G),
+	KEY(5, 5, KEY_H),
+	KEY(5, 4, KEY_J),
+	KEY(5, 3, KEY_K),
+	KEY(5, 2, KEY_L),
+	KEY(5, 1, KEY_Z),
+	KEY(5, 0, KEY_X),
+	KEY(6, 7, KEY_C),
+	KEY(6, 6, KEY_V),
+	KEY(6, 5, KEY_B),
+	KEY(6, 4, KEY_N),
+	KEY(6, 3, KEY_M),
+	KEY(6, 2, KEY_SPACE),
+	KEY(7, 0, KEY_LEFTSHIFT),
+	KEY(7, 3, KEY_LEFTCTRL),
+};
+
+static const struct matrix_keymap_data customize_keymap = {
+	.keymap = board_keymap,
+	.keymap_size = ARRAY_SIZE(board_keymap),
+};
+
+static struct sci_keypad_platform_data sci_keypad_data = {
+	.rows_choose_hw = CUSTOM_KEYPAD_ROWS,
+	.cols_choose_hw = CUSTOM_KEYPAD_COLS,
+	.rows_number = ROWS,
+	.cols_number = COLS,
+	.keymap_data = &customize_keymap,
+	.support_long_key = 1,
+	.repeat = 0,
+	.debounce_time = 5000,
+};
+#endif
+
+#if(defined(CONFIG_KEYBOARD_GPIO)||defined(CONFIG_KEYBOARD_GPIO_MODULE))
+static struct gpio_keys_button gpio_keys_button[] = {
+    {
+        .code = KEY_VOLUMEDOWN,
+        .type = EV_KEY,
+        .gpio = GPIO_KEY_VOLUMEDOWN,
+        .active_low = 1,
+        .wakeup = 1,
+        .debounce_interval = 5, /* ms */
+        .desc = "key_volumedown",
+    },
+    {
+        .code = KEY_VOLUMEUP,
+        .type = EV_KEY,
+        .gpio = GPIO_KEY_VOLUMEUP,
+        .active_low = 1,
+        .wakeup = 1,
+        .debounce_interval = 5, /* ms */
+        .desc = "key_volumeup",
+    },
+#if 0
+    {
+        .code = KEY_CAMERA,
+        .type = EV_KEY,
+        .gpio = GPIO_KEY_CAMERA,
+        .active_low = 1,
+        .wakeup = 1,
+        .debounce_interval = 5, /* ms */
+        .desc = "key_camera",
+    },
+    {
+        .code = KEY_HOME,
+        .type = EV_KEY,
+        .gpio = GPIO_KEY_HOME,
+        .active_low = 1,
+        .wakeup = 1,
+        .debounce_interval = 5, /* ms */
+        .desc = "key_home",
+    },
+#endif
+};
+
+static struct gpio_keys_platform_data gpio_keys_platform_data = {
+    .buttons = gpio_keys_button,
+    .nbuttons = ARRAY_SIZE(gpio_keys_button),
+    .rep = 0,
+};
+#endif
+
+#if(defined(CONFIG_KEYBOARD_SPRD_EIC)||defined(CONFIG_KEYBOARD_SPRD_EIC_MODULE))
+static struct sprd_eic_keys_button sprd_eic_keys_button[] = {
+    {
+        .code = KEY_POWER,
+        .type = EV_KEY,
+        .gpio = EIC_KEY_POWER,
+        .active_low = 0,
+        .wakeup = 1,
+        .debounce_interval = 50, /*Note: Hardware debounce (ms) */
+        .desc = "key_power",
+    },
+#if 0
+    {
+        .code = KEY_VOLUMEDOWN,
+        .type = EV_KEY,
+        .gpio = GPIO_KEY_VOLUMEDOWN,
+        .active_low = 1,
+        .wakeup = 1,
+        .debounce_interval = 5, /* ms */
+        .desc = "key_volumedown",
+    },
+    {
+        .code = KEY_VOLUMEUP,
+        .type = EV_KEY,
+        .gpio = GPIO_KEY_VOLUMEUP,
+        .active_low = 1,
+        .wakeup = 1,
+        .debounce_interval = 5, /* ms */
+        .desc = "key_volumeup",
+    },
+#endif
+};
+
+static struct sprd_eic_keys_platform_data sprd_eic_keys_platform_data = {
+    .buttons = sprd_eic_keys_button,
+    .nbuttons = ARRAY_SIZE(sprd_eic_keys_button),
+    .rep = 0,
+};
+#endif
+
+#if(defined(CONFIG_BACKLIGHT_SPRD_PWM)||defined(CONFIG_BACKLIGHT_SPRD_PWM_MODULE))
+static struct sprd_pwm_bl_platform_data sprd_pwm_bl_platform_data = {
+	.brightness_max = 255,
+	.brightness_min = 0,
+	.pwm_index = 2,
+	.gpio_ctrl_pin = -1,
+	.gpio_active_level = 0,
+};
+#endif
+
+static struct platform_device rfkill_device;
+static struct platform_device brcm_bluesleep_device;
+static struct platform_device kb_backlight_device;
+
+static struct platform_device *devices[] __initdata = {
+	&sprd_serial_device0,
+	&sprd_serial_device1,
+	&sprd_serial_device2,
+	&sprd_device_rtc,
+	&sprd_eic_gpio_device,
+	&sprd_nand_device,
+	&sprd_lcd_device0,
+#ifdef CONFIG_ANDROID_RAM_CONSOLE
+	&sprd_ram_console,
+#endif
+	&sprd_backlight_device,
+#if(defined(CONFIG_BACKLIGHT_SPRD_PWM)||defined(CONFIG_BACKLIGHT_SPRD_PWM_MODULE))
+	&sprd_pwm_bl_device,
+#endif
+	&sprd_i2c_device0,
+	&sprd_i2c_device1,
+	&sprd_i2c_device2,
+	&sprd_i2c_device3,
+	&sprd_spi0_device,
+	&sprd_spi1_device,
+	&sprd_spi2_device,
+#if(defined(CONFIG_KEYBOARD_SC)||defined(CONFIG_KEYBOARD_SC_MODULE))
+	&sprd_keypad_device,
+#endif
+#if(defined(CONFIG_KEYBOARD_GPIO)||defined(CONFIG_KEYBOARD_GPIO_MODULE))
+	&sprd_gpio_keys_device,
+#endif
+#if(defined(CONFIG_KEYBOARD_SPRD_EIC)||defined(CONFIG_KEYBOARD_SPRD_EIC_MODULE))
+	&sprd_eic_keys_device,
+#endif
+	&sprd_audio_platform_pcm_device,
+#ifndef CONFIG_MACH_SPX35LFPGA
+	&sprd_audio_cpu_dai_vaudio_device,
+	&sprd_audio_cpu_dai_vbc_device,
+	&sprd_audio_codec_sprd_codec_device,
+	&sprd_audio_cpu_dai_i2s_device,
+	&sprd_audio_cpu_dai_i2s_device1,
+	&sprd_audio_cpu_dai_i2s_device2,
+	&sprd_audio_cpu_dai_i2s_device3,
+	&sprd_audio_codec_null_codec_device,
+	&sprd_battery_device,
+#endif
+#ifdef CONFIG_ION
+	&sprd_ion_dev,
+#endif
+#if defined(CONFIG_SPRD_IOMMU)
+//	&sprd_iommu_gsp_device,
+	&sprd_iommu_mm_device,
+#endif
+	&sprd_emmc_device,
+	&sprd_sdio0_device,
+#ifndef CONFIG_MACH_SPX35LFPGA
+	&sprd_sdio1_device,
+	&sprd_sdio2_device,
+#endif
+	&sprd_dcam_device,
+	&sprd_scale_device,
+	&sprd_rotation_device,
+	&sprd_sensor_device,
+	&sprd_isp_device,
+	&sprd_vsp_device,
+	&sprd_jpg_device,
+#if 0
+	&sprd_ahb_bm0_device,
+	&sprd_ahb_bm1_device,
+	&sprd_ahb_bm2_device,
+	&sprd_ahb_bm3_device,
+	&sprd_ahb_bm4_device,
+	&sprd_axi_bm0_device,
+	&sprd_axi_bm1_device,
+	&sprd_axi_bm2_device,
+#endif
+#if 0
+	&rfkill_device,
+	&brcm_bluesleep_device,
+#endif
+#ifdef CONFIG_SIPC_TD
+	&sprd_cproc_td_device,
+	&sprd_spipe_td_device,
+	&sprd_slog_td_device,
+	&sprd_stty_td_device,
+	&sprd_seth0_td_device,
+	&sprd_seth1_td_device,
+	&sprd_seth2_td_device,
+#endif
+#ifdef CONFIG_SIPC_WCDMA
+	&sprd_cproc_wcdma_device,
+	&sprd_spipe_wcdma_device,
+	&sprd_slog_wcdma_device,
+	&sprd_stty_wcdma_device,
+	&sprd_seth0_wcdma_device,
+	&sprd_seth1_wcdma_device,
+	&sprd_seth2_wcdma_device,
+#endif
+#ifdef CONFIG_SIPC_GGE
+        &sprd_cproc_cp0_device,
+        &sprd_spipe_gge_device,
+	&sprd_slog_gge_device,
+	&sprd_stty_gge_device,
+	&sprd_seth0_gge_device,
+	&sprd_seth1_gge_device,
+	&sprd_seth2_gge_device,
+#endif
+#ifdef CONFIG_SIPC_LTE
+        &sprd_cproc_cp1_device,
+        &sprd_spipe_lte_device,
+	&sprd_slog_lte_device,
+	&sprd_stty_lte_device,
+	&sprd_seth0_lte_device,
+	&sprd_seth1_lte_device,
+	&sprd_seth2_lte_device,
+#endif
+	&kb_backlight_device,
+	&sprd_a7_pmu_device,
+	&sprd_memnand_system_device,
+	&sprd_memnand_userdata_device,
+	&sprd_memnand_cache_device,
+};
+#if 0
+/* BT suspend/resume */
+static struct resource bluesleep_resources[] = {
+	{
+		.name	= "gpio_host_wake",
+		.start	= GPIO_BT2AP_WAKE,
+		.end	= GPIO_BT2AP_WAKE,
+		.flags	= IORESOURCE_IO,
+	},
+	{
+		.name	= "gpio_ext_wake",
+		.start	= GPIO_AP2BT_WAKE,
+		.end	= GPIO_AP2BT_WAKE,
+		.flags	= IORESOURCE_IO,
+	},
+};
+
+static struct platform_device brcm_bluesleep_device = {
+	.name = "bluesleep",
+	.id		= -1,
+	.num_resources	= ARRAY_SIZE(bluesleep_resources),
+	.resource	= bluesleep_resources,
+};
+
+static struct resource rfkill_resources[] = {
+	{
+		.name   = "bt_power",
+		.start  = GPIO_BT_POWER,
+		.end    = GPIO_BT_POWER,
+		.flags  = IORESOURCE_IO,
+	},
+	{
+		.name   = "bt_reset",
+		.start  = GPIO_BT_RESET,
+		.end    = GPIO_BT_RESET,
+		.flags  = IORESOURCE_IO,
+	},
+};
+static struct platform_device rfkill_device = {
+	.name = "rfkill",
+	.id = -1,
+	.num_resources	= ARRAY_SIZE(rfkill_resources),
+	.resource	= rfkill_resources,
+};
+#endif
+
+/* keypad backlight */
+static struct platform_device kb_backlight_device = {
+	.name           = "keyboard-backlight",
+	.id             =  -1,
+};
+#endif /* CONFIG_OF */
+
+static int calibration_mode = false;
+static int __init calibration_start(char *str)
+{
+	int calibration_device =0;
+	int mode=0,freq=0,device=0;
+	if(str){
+		pr_info("modem calibartion:%s\n", str);
+		sscanf(str, "%d,%d,%d", &mode,&freq,&device);
+	}
+	if(device & 0x80){
+		calibration_device = device & 0xf0;
+		calibration_mode = true;
+		pr_info("calibration device = 0x%x\n",calibration_device);
+	}
+	return 1;
+}
+__setup("calibration=", calibration_start);
+
+int in_calibration(void)
+{
+	return (calibration_mode == true);
+}
+
+EXPORT_SYMBOL(in_calibration);
+
+static void __init sprd_add_otg_device(void)
+{
+	/*
+	 * if in calibrtaion mode, we do nothing, modem will handle everything
+	 */
+	platform_device_register(&sprd_otg_device);
+}
+
+static struct serial_data plat_data0 = {
+	.wakeup_type = BT_RTS_HIGH_WHEN_SLEEP,
+	.clk = 48000000,
+};
+static struct serial_data plat_data1 = {
+	.wakeup_type = BT_RTS_HIGH_WHEN_SLEEP,
+	.clk = 26000000,
+};
+static struct serial_data plat_data2 = {
+	.wakeup_type = BT_RTS_HIGH_WHEN_SLEEP,
+	.clk = 26000000,
+};
+static struct serial_data plat_data3 = {
+	.wakeup_type = BT_RTS_HIGH_WHEN_SLEEP,
+	.clk = 26000000,
+};
+#if(defined(CONFIG_TOUCHSCREEN_FOCALTECH)||defined(CONFIG_TOUCHSCREEN_FOCALTECH_MODULE))
+static struct ft5x0x_ts_platform_data ft5x0x_ts_info = { 
+	.irq_gpio_number    = GPIO_TOUCH_IRQ,
+	.reset_gpio_number  = GPIO_TOUCH_RESET,
+	.vdd_name           = "vdd28",
+};
+#endif
+
+#if(defined(CONFIG_INPUT_LTR558_I2C)||defined(CONFIG_INPUT_LTR558_I2C_MODULE))
+static struct ltr558_pls_platform_data ltr558_pls_info = {
+	.irq_gpio_number	= GPIO_PROX_INT,
+};
+#endif
+
+#if(defined(CONFIG_INPUT_LIS3DH_I2C)||defined(CONFIG_INPUT_LIS3DH_I2C_MODULE))
+static struct lis3dh_acc_platform_data lis3dh_plat_data = {
+	.poll_interval = 10,
+	.min_interval = 10,
+	.g_range = LIS3DH_ACC_G_2G,
+	.axis_map_x = 1,
+	.axis_map_y = 0,
+	.axis_map_z = 2,
+	.negate_x = 0,
+	.negate_y = 0,
+	.negate_z = 1
+};
+#endif
+
+#if(defined(CONFIG_SENSORS_AK8975)||defined(CONFIG_SENSORS_AK8975_MODULE))
+struct akm8975_platform_data akm8975_platform_d = {
+	.mag_low_x = -20480,
+	.mag_high_x = 20479,
+	.mag_low_y = -20480,
+	.mag_high_y = 20479,
+	.mag_low_z = -20480,
+	.mag_high_z = 20479,
+};
+#endif
+
+#if(defined(CONFIG_INV_MPU_IIO)||defined(CONFIG_INV_MPU_IIO_MODULE))
+static struct mpu_platform_data mpu9150_platform_data = {
+	.int_config = 0x00,
+	.level_shifter = 0,
+	.orientation = { -1, 0, 0,
+					  0, +1, 0,
+					  0, 0, -1 },
+	.sec_slave_type = SECONDARY_SLAVE_TYPE_COMPASS,
+	.sec_slave_id = COMPASS_ID_AK8963,
+	.secondary_i2c_addr = 0x0C,
+	.secondary_orientation = { 0, -1, 0,
+					1, 0, 0,
+					0, 0, 1 },
+	.key = {0xec, 0x06, 0x17, 0xdf, 0x77, 0xfc, 0xe6, 0xac,
+			0x7b, 0x6f, 0x12, 0x8a, 0x1d, 0x63, 0x67, 0x37},
+};
+#endif
+
+static struct i2c_board_info i2c2_boardinfo[] = {
+#if(defined(CONFIG_INPUT_LIS3DH_I2C)||defined(CONFIG_INPUT_LIS3DH_I2C_MODULE))
+	{ I2C_BOARD_INFO(LIS3DH_ACC_I2C_NAME, LIS3DH_ACC_I2C_ADDR),
+	  .platform_data = &lis3dh_plat_data,
+	},
+#endif
+#if(defined(CONFIG_INV_MPU_IIO)||defined(CONFIG_INV_MPU_IIO_MODULE))
+	{ I2C_BOARD_INFO("mpu9150", 0x68),
+	  .irq = GPIO_GYRO_INT1,
+	  .platform_data = &mpu9150_platform_data,
+	},
+#endif
+#if(defined(CONFIG_INPUT_LTR558_I2C)||defined(CONFIG_INPUT_LTR558_I2C_MODULE))
+	{ I2C_BOARD_INFO(LTR558_I2C_NAME,  LTR558_I2C_ADDR),
+	  .platform_data = &ltr558_pls_info,
+	},
+#endif
+#if(defined(CONFIG_SENSORS_AK8975)||defined(CONFIG_SENSORS_AK8975_MODULE))
+	{ I2C_BOARD_INFO(AKM8975_I2C_NAME, AKM8975_I2C_ADDR),
+	  .platform_data = &akm8975_platform_d,
+	},
+#endif
+};
+
+static struct i2c_board_info i2c1_boardinfo[] = {
+	{I2C_BOARD_INFO("sensor_main",0x3C),},
+	{I2C_BOARD_INFO("sensor_sub",0x21),},
+};
+
+static struct i2c_board_info i2c0_boardinfo[] = {
+	{
+#if(defined(CONFIG_TOUCHSCREEN_FOCALTECH)||defined(CONFIG_TOUCHSCREEN_FOCALTECH_MODULE))
+		I2C_BOARD_INFO(FOCALTECH_TS_NAME, FOCALTECH_TS_ADDR),
+		.platform_data = &ft5x0x_ts_info,
+#endif
+	},
+};
+
+static int sc8810_add_i2c_devices(void)
+{
+#if 0
+	i2c_register_board_info(2, i2c2_boardinfo, ARRAY_SIZE(i2c2_boardinfo));
+#endif
+	i2c_register_board_info(0, i2c1_boardinfo, ARRAY_SIZE(i2c1_boardinfo));
+	i2c_register_board_info(1, i2c0_boardinfo, ARRAY_SIZE(i2c0_boardinfo));
+	return 0;
+}
+
+struct platform_device audio_pa_amplifier_device = {
+	.name = "speaker-pa",
+	.id = -1,
+};
+
+static int audio_pa_amplifier_l(u32 cmd, void *data)
+{
+	int ret = 0;
+	if (cmd < 0) {
+		/* get speaker amplifier status : enabled or disabled */
+		ret = 0;
+	} else {
+		/* set speaker amplifier */
+	}
+	return ret;
+}
+#if 0
+/* Control ldo for maxscend cmmb chip according to HW design */
+static struct regulator *cmmb_regulator_1v8 = NULL;
+
+#define SPI_PIN_FUNC_MASK  (0x3<<4)
+#define SPI_PIN_FUNC_DEF   (0x0<<4)
+#define SPI_PIN_FUNC_GPIO  (0x3<<4)
+
+struct spi_pin_desc {
+	const char   *name;
+	unsigned int pin_func;
+	unsigned int reg;
+	unsigned int gpio;
+};
+
+static struct spi_pin_desc spi_pin_group[] = {
+	{"SPI_DI",  SPI_PIN_FUNC_DEF,  REG_PIN_SPI0_DI   + CTL_PIN_BASE,  158},
+	{"SPI_CLK", SPI_PIN_FUNC_DEF,  REG_PIN_SPI0_CLK  + CTL_PIN_BASE,  159},
+	{"SPI_DO",  SPI_PIN_FUNC_DEF,  REG_PIN_SPI0_DO   + CTL_PIN_BASE,  157},
+	{"SPI_CS0", SPI_PIN_FUNC_GPIO, REG_PIN_SPI0_CSN  + CTL_PIN_BASE,  156}
+};
+static void sprd_restore_spi_pin_cfg(void)
+{
+	unsigned int reg;
+	unsigned int  gpio;
+	unsigned int  pin_func;
+	unsigned int value;
+	unsigned long flags;
+	int i = 0;
+	int regs_count = sizeof(spi_pin_group)/sizeof(struct spi_pin_desc);
+
+	for (; i < regs_count; i++) {
+	    pin_func = spi_pin_group[i].pin_func;
+	    gpio = spi_pin_group[i].gpio;
+	    if (pin_func == SPI_PIN_FUNC_DEF) {
+		 reg = spi_pin_group[i].reg;
+		 /* free the gpios that have request */
+		 gpio_free(gpio);
+		 local_irq_save(flags);
+		 /* config pin default spi function */
+		 value = ((__raw_readl(reg) & ~SPI_PIN_FUNC_MASK) | SPI_PIN_FUNC_DEF);
+		 __raw_writel(value, reg);
+		 local_irq_restore(flags);
+	    }
+	    else {
+		 /* CS should config output */
+		 gpio_direction_output(gpio, 1);
+	    }
+	}
+
+}
+
+
+static void sprd_set_spi_pin_input(void)
+{
+	unsigned int reg;
+	unsigned int value;
+	unsigned int  gpio;
+	unsigned int  pin_func;
+	const char    *name;
+	unsigned long flags;
+	int i = 0;
+
+	int regs_count = sizeof(spi_pin_group)/sizeof(struct spi_pin_desc);
+
+	for (; i < regs_count; i++) {
+	    pin_func = spi_pin_group[i].pin_func;
+	    gpio = spi_pin_group[i].gpio;
+	    name = spi_pin_group[i].name;
+
+	    /* config pin GPIO function */
+	    if (pin_func == SPI_PIN_FUNC_DEF) {
+		 reg = spi_pin_group[i].reg;
+
+		 local_irq_save(flags);
+		 value = ((__raw_readl(reg) & ~SPI_PIN_FUNC_MASK) | SPI_PIN_FUNC_GPIO);
+		 __raw_writel(value, reg);
+		 local_irq_restore(flags);
+		 if (gpio_request(gpio, name)) {
+		     printk("smsspi: request gpio %d failed, pin %s\n", gpio, name);
+		 }
+
+	    }
+
+	    gpio_direction_input(gpio);
+	}
+
+}
+
+
+static void mxd_cmmb_poweron(void)
+{
+        regulator_set_voltage(cmmb_regulator_1v8, 1700000, 1800000);
+        regulator_disable(cmmb_regulator_1v8);
+        msleep(3);
+        regulator_enable(cmmb_regulator_1v8);
+        msleep(5);
+
+        /* enable 26M external clock */
+        gpio_direction_output(GPIO_CMMB_26M_CLK_EN, 1);
+}
+
+static void mxd_cmmb_poweroff(void)
+{
+        regulator_disable(cmmb_regulator_1v8);
+        gpio_direction_output(GPIO_CMMB_26M_CLK_EN, 0);
+}
+
+static int mxd_cmmb_init(void)
+{
+         int ret=0;
+         ret = gpio_request(GPIO_CMMB_26M_CLK_EN,   "MXD_CMMB_CLKEN");
+         if (ret)
+         {
+                   pr_debug("mxd spi req gpio clk en err!\n");
+                   goto err_gpio_init;
+         }
+         gpio_direction_output(GPIO_CMMB_26M_CLK_EN, 0);
+         cmmb_regulator_1v8 = regulator_get(NULL, "vddcmmb1p8");
+         return 0;
+
+err_gpio_init:
+	 gpio_free(GPIO_CMMB_26M_CLK_EN);
+         return ret;
+}
+
+static struct mxd_cmmb_026x_platform_data mxd_plat_data = {
+	.poweron  = mxd_cmmb_poweron,
+	.poweroff = mxd_cmmb_poweroff,
+	.init     = mxd_cmmb_init,
+	.set_spi_pin_input   = sprd_set_spi_pin_input,
+	.restore_spi_pin_cfg = sprd_restore_spi_pin_cfg,
+};
+
+static int spi_cs_gpio_map[][2] = {
+    {SPI0_CMMB_CS_GPIO,  0},
+    {SPI0_CMMB_CS_GPIO,  0},
+    {SPI0_CMMB_CS_GPIO,  0},
+} ;
+
+static struct spi_board_info spi_boardinfo[] = {
+	{
+	.modalias = "cmmb-dev",
+	.bus_num = 0,
+	.chip_select = 0,
+	.max_speed_hz = 8 * 1000 * 1000,
+	.mode = SPI_CPOL | SPI_CPHA,
+        .platform_data = &mxd_plat_data,
+	},
+	{
+	.modalias = "spidev",
+	.bus_num = 1,
+	.chip_select = 0,
+	.max_speed_hz = 1000 * 1000,
+	.mode = SPI_CPOL | SPI_CPHA,
+	},
+	{
+	.modalias = "spidev",
+	.bus_num = 2,
+	.chip_select = 0,
+	.max_speed_hz = 1000 * 1000,
+	.mode = SPI_CPOL | SPI_CPHA,
+	}
+};
+#endif
+static void sprd_spi_init(void)
+{
+#if 0
+	int busnum, cs, gpio;
+	int i;
+
+	struct spi_board_info *info = spi_boardinfo;
+
+	for (i = 0; i < ARRAY_SIZE(spi_boardinfo); i++) {
+		busnum = info[i].bus_num;
+		cs = info[i].chip_select;
+		gpio   = spi_cs_gpio_map[busnum][cs];
+
+		info[i].controller_data = (void *)gpio;
+	}
+
+        spi_register_board_info(info, ARRAY_SIZE(spi_boardinfo));
+#endif
+}
+
+static int sc8810_add_misc_devices(void)
+{
+	if (0) {
+		platform_set_drvdata(&audio_pa_amplifier_device, audio_pa_amplifier_l);
+		if (platform_device_register(&audio_pa_amplifier_device))
+			pr_err("faile to install audio_pa_amplifier_device\n");
+	}
+	return 0;
+}
+
+int __init sc8825_regulator_init(void)
+{
+	static struct platform_device sc8825_regulator_device = {
+		.name 	= "sprd-regulator",
+		.id	= -1,
+	};
+	return platform_device_register(&sc8825_regulator_device);
+}
+
+int __init __clock_init_early(void)
+{
+#if defined(CONFIG_ARCH_SCX15)
+#else
+	pr_info("ahb ctl0 %08x, ctl2 %0x8 glb aon apb0 %08x aon apb1 %08x clk_en %08x\n",
+		sci_glb_raw_read(REG_AP_AHB_AHB_EB),
+		sci_glb_raw_read(REG_AP_AHB_AHB_RST),
+		sci_glb_raw_read(REG_AON_APB_APB_EB0),
+		sci_glb_raw_read(REG_AON_APB_APB_EB1),
+		sci_glb_raw_read(REG_AON_CLK_PUB_AHB_CFG));
+#endif
+
+	sci_glb_clr(REG_AP_AHB_AHB_EB,
+		BIT_BUSMON2_EB		|
+		BIT_BUSMON1_EB		|
+		BIT_BUSMON0_EB		|
+		BIT_SPINLOCK_EB		|
+#if !defined(CONFIG_ARCH_SCX35L)
+		BIT_GPS_EB		|
+#endif
+		BIT_EMMC_EB		|
+		BIT_SDIO2_EB		|
+		BIT_SDIO1_EB		|
+		BIT_SDIO0_EB		|
+		BIT_DRM_EB		|
+		BIT_NFC_EB		|
+		BIT_DMA_EB		|
+		BIT_USB_EB		|
+#if !defined(CONFIG_ARCH_SCX35L)
+		BIT_GSP_EB		|
+		BIT_DISPC1_EB		|
+#endif
+		BIT_DISPC0_EB		|
+		BIT_DSI_EB		|
+		0);
+	sci_glb_clr(REG_AP_APB_APB_EB,
+		BIT_INTC3_EB		|
+		BIT_INTC2_EB		|
+		BIT_INTC1_EB		|
+		BIT_IIS1_EB		|
+		BIT_UART2_EB		|
+		BIT_UART0_EB		|
+		BIT_SPI1_EB		|
+		BIT_SPI0_EB		|
+		BIT_IIS0_EB		|
+		BIT_I2C0_EB		|
+		BIT_SPI2_EB		|
+		BIT_UART3_EB		|
+		0);
+	sci_glb_clr(REG_AON_APB_APB_RTC_EB,
+		BIT_KPD_RTC_EB		|
+		BIT_KPD_EB		|
+		BIT_EFUSE_EB		|
+		0);
+
+	sci_glb_clr(REG_AON_APB_APB_EB0,
+		BIT_AUDIF_EB			|
+		BIT_VBC_EB			|
+		BIT_PWM3_EB			|
+		BIT_PWM1_EB			|
+		0);
+	sci_glb_clr(REG_AON_APB_APB_EB1,
+		BIT_AUX1_EB			|
+		BIT_AUX0_EB			|
+		0);
+	printk("sc clock module early init ok\n");
+	return 0;
+}
+
+static inline int	__sci_get_chip_id(void)
+{
+	return __raw_readl(CHIP_ID_LOW_REG);
+}
+#ifdef CONFIG_OF
+const struct of_device_id of_sprd_default_bus_match_table[] = {
+	{ .compatible = "simple-bus", },
+	{ .compatible = "sprd,adi-bus", },
+	{}
+};
+#endif
+#ifdef CONFIG_OF
+static const struct of_dev_auxdata of_sprd_default_bus_lookup[] = {
+	 { .compatible = "sprd,sdhci-shark",  .name = "sdio_sd", .phys_addr = SPRD_SDIO0_BASE  },
+	 { .compatible = "sprd,sdhci-shark",  .name = "sdio_wifi", .phys_addr = SPRD_SDIO1_BASE  },
+	 { .compatible = "sprd,sdhci-shark",  .name = "sprd-sdhci.2", .phys_addr = SPRD_SDIO2_BASE  },
+	 { .compatible = "sprd,sdhci-shark",  .name = "sdio_emmc", .phys_addr = SPRD_EMMC_BASE  },
+	 { .compatible = "sprd,sprd_backlight",  .name = "sprd_backlight" },
+#if(defined(CONFIG_BACKLIGHT_SPRD_PWM)||defined(CONFIG_BACKLIGHT_SPRD_PWM_MODULE))
+	{ .compatible = "sprd,sprd_pwm_bl",  .name = "sprd_pwm_bl" },
+#endif
+#if(defined(CONFIG_KEYBOARD_SC)||defined(CONFIG_KEYBOARD_SC_MODULE))
+	{.compatible = "sprd,sci-keypad", .name = "sci-keypad" },
+#endif
+#if(defined(CONFIG_KEYBOARD_GPIO)||defined(CONFIG_KEYBOARD_GPIO_MODULE))
+	{.compatible = "gpio-keys", .name = "gpio-keys" },
+#endif
+#if(defined(CONFIG_KEYBOARD_SPRD_EIC)||defined(CONFIG_KEYBOARD_SPRD_EIC_MODULE))
+	{.compatible = "sprd,sprd-eic-keys", .name = "sprd-eic-keys" },
+#endif
+	{}
+};
+#endif
+
+static void __init sc8830_init_machine(void)
+{
+	printk("sci get chip id = 0x%x\n",__sci_get_chip_id());
+
+	sci_adc_init((void __iomem *)ADC_BASE);
+#ifndef CONFIG_MACH_SPX35LFPGA
+	sci_regulator_init();
+#endif
+#ifndef CONFIG_OF
+	sprd_add_otg_device();
+	platform_device_add_data(&sprd_serial_device0,(const void*)&plat_data0,sizeof(plat_data0));
+	platform_device_add_data(&sprd_serial_device1,(const void*)&plat_data1,sizeof(plat_data1));
+	platform_device_add_data(&sprd_serial_device2,(const void*)&plat_data2,sizeof(plat_data2));
+#if(defined(CONFIG_KEYBOARD_SC)||defined(CONFIG_KEYBOARD_SC_MODULE))
+	platform_device_add_data(&sprd_keypad_device,(const void*)&sci_keypad_data,sizeof(sci_keypad_data));
+#endif
+#if(defined(CONFIG_KEYBOARD_GPIO)||defined(CONFIG_KEYBOARD_GPIO_MODULE))
+	platform_device_add_data(&sprd_gpio_keys_device,(const void*)&gpio_keys_platform_data,sizeof(gpio_keys_platform_data));
+#endif
+#if(defined(CONFIG_KEYBOARD_SPRD_EIC)||defined(CONFIG_KEYBOARD_SPRD_EIC_MODULE))
+	platform_device_add_data(&sprd_eic_keys_device,(const void*)&sprd_eic_keys_platform_data,sizeof(sprd_eic_keys_platform_data));
+#endif
+#if(defined(CONFIG_BACKLIGHT_SPRD_PWM)||defined(CONFIG_BACKLIGHT_SPRD_PWM_MODULE))
+	platform_device_add_data(&sprd_pwm_bl_device, (const void*)&sprd_pwm_bl_platform_data, sizeof(sprd_pwm_bl_platform_data));
+#endif
+	platform_add_devices(devices, ARRAY_SIZE(devices));
+	sc8810_add_i2c_devices();
+	sc8810_add_misc_devices();
+	sprd_spi_init();
+#else
+	of_platform_populate(NULL, of_sprd_default_bus_match_table, of_sprd_default_bus_lookup, NULL);
+#endif
+}
+
+extern void __init  sci_enable_timer_early(void);
+static void __init sc8830_init_early(void)
+{
+	/* earlier init request than irq and timer */
+	__clock_init_early();
+#ifndef CONFIG_OF
+	sci_enable_timer_early();
+#endif
+	sci_adi_init();
+	/*ipi reg init for sipc*/
+	sci_glb_set(REG_AON_APB_APB_EB0, BIT_IPI_EB);
+}
+#ifdef CONFIG_OF
+static void __init sc8830_pmu_init(void)
+{
+	__raw_writel(__raw_readl(REG_PMU_APB_PD_MM_TOP_CFG)
+		     & ~(BIT_PD_MM_TOP_FORCE_SHUTDOWN),
+		     REG_PMU_APB_PD_MM_TOP_CFG);
+
+	__raw_writel(__raw_readl(REG_PMU_APB_PD_GPU_TOP_CFG)
+		     & ~(BIT_PD_GPU_TOP_FORCE_SHUTDOWN),
+		     REG_PMU_APB_PD_GPU_TOP_CFG);
+
+	__raw_writel(__raw_readl(REG_AON_APB_APB_EB0) | BIT_MM_EB |
+		     BIT_GPU_EB, REG_AON_APB_APB_EB0);
+
+	__raw_writel(__raw_readl(REG_MM_AHB_AHB_EB) | BIT_MM_CKG_EB,
+		     REG_MM_AHB_AHB_EB);
+
+	__raw_writel(__raw_readl(REG_MM_AHB_GEN_CKG_CFG)
+		     | BIT_MM_MTX_AXI_CKG_EN | BIT_MM_AXI_CKG_EN,
+		     REG_MM_AHB_GEN_CKG_CFG);
+
+	__raw_writel(__raw_readl(REG_MM_CLK_MM_AHB_CFG) | 0x3,
+		     REG_MM_CLK_MM_AHB_CFG);
+}
+
+static void sprd_init_time(void)
+{
+	if(of_have_populated_dt()){
+		sc8830_pmu_init();
+		of_clk_init(NULL);
+		clocksource_of_init();
+	}else{
+		sci_clock_init();
+		sci_enable_timer_early();
+		sci_timer_init();
+	}
+}
+static const char *sprd_boards_compat[] __initdata = {
+	"sprd,sp8835eb",
+	NULL,
+};
+#endif
+extern struct smp_operations sprd_smp_ops;
+
+MACHINE_START(SCPHONE, "sc8830")
+	.smp		= smp_ops(sprd_smp_ops),
+	.reserve	= sci_reserve,
+	.map_io		= sci_map_io,
+	.init_early	= sc8830_init_early,
+	.init_irq	= sci_init_irq,
+#ifdef CONFIG_OF
+	.init_time		= sprd_init_time,
+#else
+	.init_time		= sci_timer_init,
+#endif
+	.init_machine	= sc8830_init_machine,
+#ifdef CONFIG_OF
+	.dt_compat = sprd_boards_compat,
+#endif
+MACHINE_END
+
diff --git a/arch/arm/mach-sc/board-sp9630ea3mn.c b/arch/arm/mach-sc/board-sp9630ea3mn.c
new file mode 100755
index 00000000..d78c0a77
--- /dev/null
+++ b/arch/arm/mach-sc/board-sp9630ea3mn.c
@@ -0,0 +1,365 @@
+/*
+ * Copyright (C) 2014 Spreadtrum Communications Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/delay.h>
+#include <linux/export.h>
+#include <linux/irqchip/arm-gic.h>
+#include <linux/input.h>
+
+#include <asm/io.h>
+#include <asm/setup.h>
+#include <asm/mach/time.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach-types.h>
+#include <asm/hardware/cache-l2x0.h>
+#include <asm/localtimer.h>
+#include <linux/of_platform.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/clocksource.h>
+#include <linux/clk-provider.h>
+#include <soc/sprd/hardware.h>
+#include <linux/i2c.h>
+#if (defined(CONFIG_INPUT_LIS3DH_I2C) || defined(CONFIG_INPUT_LIS3DH_I2C_MODULE))
+#include <linux/i2c/lis3dh.h>
+#endif
+#if (defined(CONFIG_INPUT_LTR558_I2C) || defined(CONFIG_INPUT_LTR558_I2C_MODULE))
+#include <linux/i2c/ltr_558als.h>
+#endif
+#if (defined(CONFIG_TOUCHSCREEN_MSG2138) || defined(CONFIG_TOUCHSCREEN_MSG2138_MODULE))
+#include <linux/i2c/msg2138.h>
+#endif
+#include <linux/spi/spi.h>
+#include <linux/gpio.h>
+#include <soc/sprd/board.h>
+#include <soc/sprd/serial_sprd.h>
+#include <soc/sprd/adi.h>
+#include <soc/sprd/adc.h>
+#include <soc/sprd/pinmap.h>
+#include <linux/irq.h>
+#include <linux/input/matrix_keypad.h>
+
+#include <soc/sprd/sci.h>
+#include <soc/sprd/kpd.h>
+#include <soc/sprd/sci_glb_regs.h>
+
+#if (defined(CONFIG_INV_MPU_IIO) || defined(CONFIG_INV_MPU_IIO_MODULE))
+#include <linux/mpu.h>
+#endif
+#if (defined(CONFIG_SENSORS_AK8975) || defined(CONFIG_SENSORS_AK8975_MODULE))
+#include <linux/akm8975.h>
+#endif
+
+
+/* IRQ's for the multi sensor board */
+#define MPUIRQ_GPIO 212
+#include <linux/regulator/consumer.h>
+#include <soc/sprd/regulator.h>
+#if (defined(CONFIG_TOUCHSCREEN_FOCALTECH) || defined(CONFIG_TOUCHSCREEN_FOCALTECH_MODULE))
+#include <linux/i2c/focaltech.h>
+#endif
+
+#if (defined(CONFIG_KEYBOARD_SC) || defined (CONFIG_KEYBOARD_SC_MODULE))
+#include <linux/input/matrix_keypad.h>
+#include <soc/sprd/kpd.h>
+#endif
+#if (defined(CONFIG_KEYBOARD_GPIO) || defined (CONFIG_KEYBOARD_GPIO_MODULE))
+#include <linux/gpio_keys.h>
+#endif
+#if (defined(CONFIG_KEYBOARD_SPRD_EIC) || defined(CONFIG_KEYBOARD_SPRD_EIC_MODULE))
+#include <linux/sprd_eic_keys.h>
+#endif
+#if (defined(CONFIG_BACKLIGHT_SPRD_PWM) || defined(CONFIG_BACKLIGHT_SPRD_PWM_MODULE))
+#include <linux/sprd_pwm_bl.h>
+#endif
+#if (defined(CONFIG_INPUT_HEADSET_SPRD_SC2723) || defined(CONFIG_INPUT_HEADSET_SPRD_SC2723_MODULE))
+#include <linux/headset_sprd_sc2723.h>
+#endif
+extern void bluesleep_setup_uart_port(struct platform_device *uart_dev);
+extern void __init sci_reserve(void);
+extern void __init sci_map_io(void);
+extern void __init sci_init_irq(void);
+extern void __init sci_timer_init(void);
+extern int __init sci_clock_init(void);
+extern int __init sci_regulator_init(void);
+
+int __init __clock_init_early(void)
+{
+#if !defined(CONFIG_ARCH_SCX15)
+	pr_info("ahb ctl0 %08x, ctl2 %0x8 glb aon apb0 %08x aon apb1 %08x clk_en %08x\n",
+		sci_glb_raw_read(REG_AP_AHB_AHB_EB),
+		sci_glb_raw_read(REG_AP_AHB_AHB_RST),
+		sci_glb_raw_read(REG_AON_APB_APB_EB0),
+		sci_glb_raw_read(REG_AON_APB_APB_EB1),
+		sci_glb_raw_read(REG_AON_CLK_PUB_AHB_CFG));
+#endif
+
+	sci_glb_clr(REG_AP_AHB_AHB_EB,
+		BIT_BUSMON2_EB		|
+		BIT_BUSMON1_EB		|
+		BIT_BUSMON0_EB		|
+		BIT_SPINLOCK_EB		|
+#if !defined(CONFIG_ARCH_SCX35L)
+		BIT_GPS_EB		|
+#endif
+		BIT_EMMC_EB		|
+		BIT_SDIO2_EB		|
+		BIT_SDIO1_EB		|
+		BIT_SDIO0_EB		|
+		BIT_DRM_EB		|
+		BIT_NFC_EB		|
+		BIT_DMA_EB		|
+		BIT_USB_EB		|
+#if !defined(CONFIG_ARCH_SCX35L)
+		BIT_GSP_EB		|
+		BIT_DISPC1_EB		|
+#endif
+		0);
+	sci_glb_clr(REG_AP_APB_APB_EB,
+		BIT_INTC3_EB		|
+		BIT_INTC2_EB		|
+		BIT_INTC1_EB		|
+		BIT_IIS1_EB		|
+		BIT_UART2_EB		|
+		BIT_UART0_EB		|
+		BIT_SPI1_EB		|
+		BIT_SPI0_EB		|
+		BIT_IIS0_EB		|
+		BIT_I2C0_EB		|
+		BIT_SPI2_EB		|
+		BIT_UART3_EB		|
+		0);
+	sci_glb_clr(REG_AON_APB_APB_RTC_EB,
+		BIT_KPD_RTC_EB		|
+		BIT_KPD_EB		|
+		BIT_EFUSE_EB		|
+		0);
+
+	sci_glb_clr(REG_AON_APB_APB_EB0,
+		BIT_AUDIF_EB			|
+		BIT_VBC_EB			|
+		BIT_PWM3_EB			|
+		BIT_PWM1_EB			|
+		0);
+	sci_glb_clr(REG_AON_APB_APB_EB1,
+		BIT_AUX1_EB			|
+		BIT_AUX0_EB			|
+		0);
+	printk("sc clock module early init ok\n");
+	return 0;
+}
+
+static inline int __sci_get_chip_id(void)
+{
+	return __raw_readl(CHIP_ID_LOW_REG);
+}
+
+const struct of_device_id of_sprd_default_bus_match_table[] = {
+	{ .compatible = "simple-bus", },
+	{ .compatible = "sprd,adi-bus", },
+	{}
+};
+
+static struct of_dev_auxdata of_sprd_default_bus_lookup[] = {
+	{ .compatible = "sprd,sdhci-shark", .name = "sdio_sd", },
+	{ .compatible = "sprd,sdhci-shark", .name = "sdio_wifi", },
+	{ .compatible = "sprd,sdhci-shark", .name = "sprd-sdhci.2", },
+	{ .compatible = "sprd,sdhci-shark", .name = "sdio_emmc", },
+	{ .compatible = "sprd,sprd_backlight", .name = "sprd_backlight" },
+#if (defined(CONFIG_BACKLIGHT_SPRD_PWM) || defined(CONFIG_BACKLIGHT_SPRD_PWM_MODULE))
+	{ .compatible = "sprd,sprd_pwm_bl",  .name = "sprd_pwm_bl" },
+#endif
+#if (defined(CONFIG_KEYBOARD_SC) || defined(CONFIG_KEYBOARD_SC_MODULE))
+	{.compatible = "sprd,sci-keypad", .name = "sci-keypad" },
+#endif
+#if (defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE))
+	{.compatible = "gpio-keys", .name = "gpio-keys" },
+#endif
+#if (defined(CONFIG_KEYBOARD_SPRD_EIC) || defined(CONFIG_KEYBOARD_SPRD_EIC_MODULE))
+	{.compatible = "sprd,sprd-eic-keys", .name = "sprd-eic-keys" },
+#endif
+#if (defined(CONFIG_INPUT_HEADSET_SPRD_SC2723) || defined(CONFIG_INPUT_HEADSET_SPRD_SC2723_MODULE))
+	{ .compatible = "sprd,headset_sprd_sc2723",  .name = "headset_sprd_sc2723" },
+#endif
+	{}
+};
+
+struct iotable_sprd io_addr_sprd;
+EXPORT_SYMBOL(io_addr_sprd);
+
+int iotable_build()
+{
+	struct device_node *np;
+	struct resource res;
+
+#define ADD_SPRD_DEVICE(compat, id)			\
+do {							\
+	np = of_find_compatible_node(NULL, NULL, compat);\
+	if (of_can_translate_address(np)) {		\
+		of_address_to_resource(np, 0, &res);	\
+		io_addr_sprd.id.paddr = res.start;	\
+		io_addr_sprd.id.length =		\
+			resource_size(&res);		\
+		io_addr_sprd.id.vaddr =			\
+		ioremap_nocache(res.start, io_addr_sprd.id.length);\
+		pr_debug("sprd io map: phys=%08x virt=%08x size=%08x\n", \
+	io_addr_sprd.id.paddr, io_addr_sprd.id.vaddr, io_addr_sprd.id.length);\
+	}						\
+} while (0)
+#define ADD_SPRD_DEVICE_BY_NAME(name, id)		\
+do {							\
+	np = of_find_node_by_name(NULL, name);		\
+	if (of_can_translate_address(np)) {		\
+		of_address_to_resource(np, 0, &res);	\
+		io_addr_sprd.id.paddr = res.start;	\
+		io_addr_sprd.id.length =		\
+			resource_size(&res);		\
+		io_addr_sprd.id.vaddr =			\
+		ioremap_nocache(res.start, io_addr_sprd.id.length);\
+		pr_debug("sprd io map: phys=%16lx virt=%16lx size=%16lx\n", \
+	io_addr_sprd.id.paddr, io_addr_sprd.id.vaddr, io_addr_sprd.id.length);\
+	}						\
+} while (0)
+	ADD_SPRD_DEVICE("sprd,ahb", AHB);
+	ADD_SPRD_DEVICE("sprd,aonapb", AONAPB);
+	ADD_SPRD_DEVICE("sprd,aonckg", AONCKG);
+	ADD_SPRD_DEVICE("sprd,apbreg", APBREG);
+	ADD_SPRD_DEVICE("sprd,core", CORE);
+	ADD_SPRD_DEVICE("sprd,mmahb", MMAHB);
+	ADD_SPRD_DEVICE("sprd,pmu", PMU);
+	ADD_SPRD_DEVICE("sprd,mmckg", MMCKG);
+	ADD_SPRD_DEVICE("sprd,gpuapb", GPUAPB);
+	ADD_SPRD_DEVICE("sprd,apbckg", APBCKG);
+	ADD_SPRD_DEVICE("sprd,gpuckg", GPUCKG);
+	ADD_SPRD_DEVICE("sprd,int", INT);
+	ADD_SPRD_DEVICE("sprd,intc0", INTC0);
+	ADD_SPRD_DEVICE("sprd,intc1", INTC1);
+	ADD_SPRD_DEVICE("sprd,intc2", INTC2);
+	ADD_SPRD_DEVICE("sprd,intc3", INTC3);
+	ADD_SPRD_DEVICE("sprd,uidefuse", UIDEFUSE);
+	ADD_SPRD_DEVICE("sprd,isp", ISP);
+	ADD_SPRD_DEVICE("sprd,csi2", CSI2);
+	ADD_SPRD_DEVICE("sprd,d-eic-gpio", EIC);
+	ADD_SPRD_DEVICE("sprd,ipi", IPI);
+	ADD_SPRD_DEVICE("sprd,dcam", DCAM);
+	ADD_SPRD_DEVICE("sprd,syscnt", SYSCNT);
+	ADD_SPRD_DEVICE("sprd,dma0", DMA0);
+	ADD_SPRD_DEVICE("sprd,pub", PUB);
+	ADD_SPRD_DEVICE("sprd,pin", PIN);
+	ADD_SPRD_DEVICE("sprd,d-gpio-gpio", GPIO);
+	ADD_SPRD_DEVICE_BY_NAME("hwspinlock0", HWSPINLOCK0);
+	ADD_SPRD_DEVICE_BY_NAME("hwspinlock1", HWSPINLOCK1);
+
+	return 0;
+}
+
+static void __init sc8830_init_machine(void)
+{
+	printk("sci get chip id = 0x%x\n", __sci_get_chip_id());
+
+	sci_adc_init();
+#ifndef CONFIG_MACH_SPX35LFPGA
+	sci_regulator_init();
+#endif
+	of_sprd_default_bus_lookup[0].phys_addr = 0x20300000;
+	of_sprd_default_bus_lookup[1].phys_addr = 0x20400000;
+	of_sprd_default_bus_lookup[2].phys_addr = 0x20500000;
+	of_sprd_default_bus_lookup[3].phys_addr = 0x20600000;
+	of_platform_populate(NULL, of_sprd_default_bus_match_table, of_sprd_default_bus_lookup, NULL);
+}
+
+#ifdef CONFIG_OF
+const struct of_device_id of_sprd_late_bus_match_table[] = {
+	{ .compatible = "sprd,sound", },
+	{}
+};
+#endif
+
+static void __init sc8830_init_late(void)
+{
+	of_platform_populate(of_find_node_by_path("/sprd-audio-devices"),
+				of_sprd_late_bus_match_table, NULL, NULL);
+}
+
+
+extern void __init sci_enable_timer_early(void);
+extern void __init sc_init_chip_id(void);
+
+void __init sprd_init_before_irq(void)
+{
+	iotable_build();
+	sc_init_chip_id();
+	/* earlier init request than irq and timer */
+	__clock_init_early();
+	/*ipi reg init for sipc*/
+	sci_glb_set(REG_AON_APB_APB_EB0, BIT_IPI_EB);
+}
+
+static void __init sc8830_pmu_init(void)
+{
+	__raw_writel(__raw_readl(REG_PMU_APB_PD_MM_TOP_CFG)
+		& ~(BIT_PD_MM_TOP_FORCE_SHUTDOWN),
+		REG_PMU_APB_PD_MM_TOP_CFG);
+
+	while (__raw_readl(REG_PMU_APB_PWR_STATUS0_DBG) & 0xf0000000) {};
+
+	__raw_writel(__raw_readl(REG_PMU_APB_PD_GPU_TOP_CFG)
+		& ~(BIT_PD_GPU_TOP_FORCE_SHUTDOWN),
+		REG_PMU_APB_PD_GPU_TOP_CFG);
+
+	while (__raw_readl(REG_PMU_APB_PWR_STATUS0_DBG) & 0x0f000000) {};
+
+	__raw_writel(__raw_readl(REG_AON_APB_APB_EB0) | BIT_MM_EB |
+		BIT_GPU_EB, REG_AON_APB_APB_EB0);
+	__raw_writel(__raw_readl(REG_MM_AHB_AHB_EB) | BIT_MM_CKG_EB,
+		REG_MM_AHB_AHB_EB);
+	__raw_writel(__raw_readl(REG_MM_AHB_GEN_CKG_CFG)
+		| BIT_MM_MTX_AXI_CKG_EN | BIT_MM_AXI_CKG_EN,
+		REG_MM_AHB_GEN_CKG_CFG);
+	__raw_writel(__raw_readl(REG_MM_CLK_MM_AHB_CFG) | 0x3,
+		REG_MM_CLK_MM_AHB_CFG);
+}
+
+static void sprd_init_time(void)
+{
+	if (of_have_populated_dt()) {
+		sc8830_pmu_init();
+		of_clk_init(NULL);
+		clocksource_of_init();
+	} else {
+		sci_clock_init();
+		sci_enable_timer_early();
+		sci_timer_init();
+	}
+}
+static const char *sprd_boards_compat[] __initdata = {
+	"sprd,sp8835eb",
+	NULL,
+};
+extern struct smp_operations sprd_smp_ops;
+
+MACHINE_START(SCPHONE, "sc8830")
+	.smp		= smp_ops(sprd_smp_ops),
+	.reserve	= sci_reserve,
+	.map_io		= sci_map_io,
+	.init_irq	= sci_init_irq,
+	.init_time	= sprd_init_time,
+	.init_machine	= sc8830_init_machine,
+	.init_late	= sc8830_init_late,
+	.dt_compat	= sprd_boards_compat,
+MACHINE_END
+
diff --git a/arch/arm/mach-sc/board-sp9630ea4mn.c b/arch/arm/mach-sc/board-sp9630ea4mn.c
new file mode 100644
index 00000000..d78c0a77
--- /dev/null
+++ b/arch/arm/mach-sc/board-sp9630ea4mn.c
@@ -0,0 +1,365 @@
+/*
+ * Copyright (C) 2014 Spreadtrum Communications Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/delay.h>
+#include <linux/export.h>
+#include <linux/irqchip/arm-gic.h>
+#include <linux/input.h>
+
+#include <asm/io.h>
+#include <asm/setup.h>
+#include <asm/mach/time.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach-types.h>
+#include <asm/hardware/cache-l2x0.h>
+#include <asm/localtimer.h>
+#include <linux/of_platform.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/clocksource.h>
+#include <linux/clk-provider.h>
+#include <soc/sprd/hardware.h>
+#include <linux/i2c.h>
+#if (defined(CONFIG_INPUT_LIS3DH_I2C) || defined(CONFIG_INPUT_LIS3DH_I2C_MODULE))
+#include <linux/i2c/lis3dh.h>
+#endif
+#if (defined(CONFIG_INPUT_LTR558_I2C) || defined(CONFIG_INPUT_LTR558_I2C_MODULE))
+#include <linux/i2c/ltr_558als.h>
+#endif
+#if (defined(CONFIG_TOUCHSCREEN_MSG2138) || defined(CONFIG_TOUCHSCREEN_MSG2138_MODULE))
+#include <linux/i2c/msg2138.h>
+#endif
+#include <linux/spi/spi.h>
+#include <linux/gpio.h>
+#include <soc/sprd/board.h>
+#include <soc/sprd/serial_sprd.h>
+#include <soc/sprd/adi.h>
+#include <soc/sprd/adc.h>
+#include <soc/sprd/pinmap.h>
+#include <linux/irq.h>
+#include <linux/input/matrix_keypad.h>
+
+#include <soc/sprd/sci.h>
+#include <soc/sprd/kpd.h>
+#include <soc/sprd/sci_glb_regs.h>
+
+#if (defined(CONFIG_INV_MPU_IIO) || defined(CONFIG_INV_MPU_IIO_MODULE))
+#include <linux/mpu.h>
+#endif
+#if (defined(CONFIG_SENSORS_AK8975) || defined(CONFIG_SENSORS_AK8975_MODULE))
+#include <linux/akm8975.h>
+#endif
+
+
+/* IRQ's for the multi sensor board */
+#define MPUIRQ_GPIO 212
+#include <linux/regulator/consumer.h>
+#include <soc/sprd/regulator.h>
+#if (defined(CONFIG_TOUCHSCREEN_FOCALTECH) || defined(CONFIG_TOUCHSCREEN_FOCALTECH_MODULE))
+#include <linux/i2c/focaltech.h>
+#endif
+
+#if (defined(CONFIG_KEYBOARD_SC) || defined (CONFIG_KEYBOARD_SC_MODULE))
+#include <linux/input/matrix_keypad.h>
+#include <soc/sprd/kpd.h>
+#endif
+#if (defined(CONFIG_KEYBOARD_GPIO) || defined (CONFIG_KEYBOARD_GPIO_MODULE))
+#include <linux/gpio_keys.h>
+#endif
+#if (defined(CONFIG_KEYBOARD_SPRD_EIC) || defined(CONFIG_KEYBOARD_SPRD_EIC_MODULE))
+#include <linux/sprd_eic_keys.h>
+#endif
+#if (defined(CONFIG_BACKLIGHT_SPRD_PWM) || defined(CONFIG_BACKLIGHT_SPRD_PWM_MODULE))
+#include <linux/sprd_pwm_bl.h>
+#endif
+#if (defined(CONFIG_INPUT_HEADSET_SPRD_SC2723) || defined(CONFIG_INPUT_HEADSET_SPRD_SC2723_MODULE))
+#include <linux/headset_sprd_sc2723.h>
+#endif
+extern void bluesleep_setup_uart_port(struct platform_device *uart_dev);
+extern void __init sci_reserve(void);
+extern void __init sci_map_io(void);
+extern void __init sci_init_irq(void);
+extern void __init sci_timer_init(void);
+extern int __init sci_clock_init(void);
+extern int __init sci_regulator_init(void);
+
+int __init __clock_init_early(void)
+{
+#if !defined(CONFIG_ARCH_SCX15)
+	pr_info("ahb ctl0 %08x, ctl2 %0x8 glb aon apb0 %08x aon apb1 %08x clk_en %08x\n",
+		sci_glb_raw_read(REG_AP_AHB_AHB_EB),
+		sci_glb_raw_read(REG_AP_AHB_AHB_RST),
+		sci_glb_raw_read(REG_AON_APB_APB_EB0),
+		sci_glb_raw_read(REG_AON_APB_APB_EB1),
+		sci_glb_raw_read(REG_AON_CLK_PUB_AHB_CFG));
+#endif
+
+	sci_glb_clr(REG_AP_AHB_AHB_EB,
+		BIT_BUSMON2_EB		|
+		BIT_BUSMON1_EB		|
+		BIT_BUSMON0_EB		|
+		BIT_SPINLOCK_EB		|
+#if !defined(CONFIG_ARCH_SCX35L)
+		BIT_GPS_EB		|
+#endif
+		BIT_EMMC_EB		|
+		BIT_SDIO2_EB		|
+		BIT_SDIO1_EB		|
+		BIT_SDIO0_EB		|
+		BIT_DRM_EB		|
+		BIT_NFC_EB		|
+		BIT_DMA_EB		|
+		BIT_USB_EB		|
+#if !defined(CONFIG_ARCH_SCX35L)
+		BIT_GSP_EB		|
+		BIT_DISPC1_EB		|
+#endif
+		0);
+	sci_glb_clr(REG_AP_APB_APB_EB,
+		BIT_INTC3_EB		|
+		BIT_INTC2_EB		|
+		BIT_INTC1_EB		|
+		BIT_IIS1_EB		|
+		BIT_UART2_EB		|
+		BIT_UART0_EB		|
+		BIT_SPI1_EB		|
+		BIT_SPI0_EB		|
+		BIT_IIS0_EB		|
+		BIT_I2C0_EB		|
+		BIT_SPI2_EB		|
+		BIT_UART3_EB		|
+		0);
+	sci_glb_clr(REG_AON_APB_APB_RTC_EB,
+		BIT_KPD_RTC_EB		|
+		BIT_KPD_EB		|
+		BIT_EFUSE_EB		|
+		0);
+
+	sci_glb_clr(REG_AON_APB_APB_EB0,
+		BIT_AUDIF_EB			|
+		BIT_VBC_EB			|
+		BIT_PWM3_EB			|
+		BIT_PWM1_EB			|
+		0);
+	sci_glb_clr(REG_AON_APB_APB_EB1,
+		BIT_AUX1_EB			|
+		BIT_AUX0_EB			|
+		0);
+	printk("sc clock module early init ok\n");
+	return 0;
+}
+
+static inline int __sci_get_chip_id(void)
+{
+	return __raw_readl(CHIP_ID_LOW_REG);
+}
+
+const struct of_device_id of_sprd_default_bus_match_table[] = {
+	{ .compatible = "simple-bus", },
+	{ .compatible = "sprd,adi-bus", },
+	{}
+};
+
+static struct of_dev_auxdata of_sprd_default_bus_lookup[] = {
+	{ .compatible = "sprd,sdhci-shark", .name = "sdio_sd", },
+	{ .compatible = "sprd,sdhci-shark", .name = "sdio_wifi", },
+	{ .compatible = "sprd,sdhci-shark", .name = "sprd-sdhci.2", },
+	{ .compatible = "sprd,sdhci-shark", .name = "sdio_emmc", },
+	{ .compatible = "sprd,sprd_backlight", .name = "sprd_backlight" },
+#if (defined(CONFIG_BACKLIGHT_SPRD_PWM) || defined(CONFIG_BACKLIGHT_SPRD_PWM_MODULE))
+	{ .compatible = "sprd,sprd_pwm_bl",  .name = "sprd_pwm_bl" },
+#endif
+#if (defined(CONFIG_KEYBOARD_SC) || defined(CONFIG_KEYBOARD_SC_MODULE))
+	{.compatible = "sprd,sci-keypad", .name = "sci-keypad" },
+#endif
+#if (defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE))
+	{.compatible = "gpio-keys", .name = "gpio-keys" },
+#endif
+#if (defined(CONFIG_KEYBOARD_SPRD_EIC) || defined(CONFIG_KEYBOARD_SPRD_EIC_MODULE))
+	{.compatible = "sprd,sprd-eic-keys", .name = "sprd-eic-keys" },
+#endif
+#if (defined(CONFIG_INPUT_HEADSET_SPRD_SC2723) || defined(CONFIG_INPUT_HEADSET_SPRD_SC2723_MODULE))
+	{ .compatible = "sprd,headset_sprd_sc2723",  .name = "headset_sprd_sc2723" },
+#endif
+	{}
+};
+
+struct iotable_sprd io_addr_sprd;
+EXPORT_SYMBOL(io_addr_sprd);
+
+int iotable_build()
+{
+	struct device_node *np;
+	struct resource res;
+
+#define ADD_SPRD_DEVICE(compat, id)			\
+do {							\
+	np = of_find_compatible_node(NULL, NULL, compat);\
+	if (of_can_translate_address(np)) {		\
+		of_address_to_resource(np, 0, &res);	\
+		io_addr_sprd.id.paddr = res.start;	\
+		io_addr_sprd.id.length =		\
+			resource_size(&res);		\
+		io_addr_sprd.id.vaddr =			\
+		ioremap_nocache(res.start, io_addr_sprd.id.length);\
+		pr_debug("sprd io map: phys=%08x virt=%08x size=%08x\n", \
+	io_addr_sprd.id.paddr, io_addr_sprd.id.vaddr, io_addr_sprd.id.length);\
+	}						\
+} while (0)
+#define ADD_SPRD_DEVICE_BY_NAME(name, id)		\
+do {							\
+	np = of_find_node_by_name(NULL, name);		\
+	if (of_can_translate_address(np)) {		\
+		of_address_to_resource(np, 0, &res);	\
+		io_addr_sprd.id.paddr = res.start;	\
+		io_addr_sprd.id.length =		\
+			resource_size(&res);		\
+		io_addr_sprd.id.vaddr =			\
+		ioremap_nocache(res.start, io_addr_sprd.id.length);\
+		pr_debug("sprd io map: phys=%16lx virt=%16lx size=%16lx\n", \
+	io_addr_sprd.id.paddr, io_addr_sprd.id.vaddr, io_addr_sprd.id.length);\
+	}						\
+} while (0)
+	ADD_SPRD_DEVICE("sprd,ahb", AHB);
+	ADD_SPRD_DEVICE("sprd,aonapb", AONAPB);
+	ADD_SPRD_DEVICE("sprd,aonckg", AONCKG);
+	ADD_SPRD_DEVICE("sprd,apbreg", APBREG);
+	ADD_SPRD_DEVICE("sprd,core", CORE);
+	ADD_SPRD_DEVICE("sprd,mmahb", MMAHB);
+	ADD_SPRD_DEVICE("sprd,pmu", PMU);
+	ADD_SPRD_DEVICE("sprd,mmckg", MMCKG);
+	ADD_SPRD_DEVICE("sprd,gpuapb", GPUAPB);
+	ADD_SPRD_DEVICE("sprd,apbckg", APBCKG);
+	ADD_SPRD_DEVICE("sprd,gpuckg", GPUCKG);
+	ADD_SPRD_DEVICE("sprd,int", INT);
+	ADD_SPRD_DEVICE("sprd,intc0", INTC0);
+	ADD_SPRD_DEVICE("sprd,intc1", INTC1);
+	ADD_SPRD_DEVICE("sprd,intc2", INTC2);
+	ADD_SPRD_DEVICE("sprd,intc3", INTC3);
+	ADD_SPRD_DEVICE("sprd,uidefuse", UIDEFUSE);
+	ADD_SPRD_DEVICE("sprd,isp", ISP);
+	ADD_SPRD_DEVICE("sprd,csi2", CSI2);
+	ADD_SPRD_DEVICE("sprd,d-eic-gpio", EIC);
+	ADD_SPRD_DEVICE("sprd,ipi", IPI);
+	ADD_SPRD_DEVICE("sprd,dcam", DCAM);
+	ADD_SPRD_DEVICE("sprd,syscnt", SYSCNT);
+	ADD_SPRD_DEVICE("sprd,dma0", DMA0);
+	ADD_SPRD_DEVICE("sprd,pub", PUB);
+	ADD_SPRD_DEVICE("sprd,pin", PIN);
+	ADD_SPRD_DEVICE("sprd,d-gpio-gpio", GPIO);
+	ADD_SPRD_DEVICE_BY_NAME("hwspinlock0", HWSPINLOCK0);
+	ADD_SPRD_DEVICE_BY_NAME("hwspinlock1", HWSPINLOCK1);
+
+	return 0;
+}
+
+static void __init sc8830_init_machine(void)
+{
+	printk("sci get chip id = 0x%x\n", __sci_get_chip_id());
+
+	sci_adc_init();
+#ifndef CONFIG_MACH_SPX35LFPGA
+	sci_regulator_init();
+#endif
+	of_sprd_default_bus_lookup[0].phys_addr = 0x20300000;
+	of_sprd_default_bus_lookup[1].phys_addr = 0x20400000;
+	of_sprd_default_bus_lookup[2].phys_addr = 0x20500000;
+	of_sprd_default_bus_lookup[3].phys_addr = 0x20600000;
+	of_platform_populate(NULL, of_sprd_default_bus_match_table, of_sprd_default_bus_lookup, NULL);
+}
+
+#ifdef CONFIG_OF
+const struct of_device_id of_sprd_late_bus_match_table[] = {
+	{ .compatible = "sprd,sound", },
+	{}
+};
+#endif
+
+static void __init sc8830_init_late(void)
+{
+	of_platform_populate(of_find_node_by_path("/sprd-audio-devices"),
+				of_sprd_late_bus_match_table, NULL, NULL);
+}
+
+
+extern void __init sci_enable_timer_early(void);
+extern void __init sc_init_chip_id(void);
+
+void __init sprd_init_before_irq(void)
+{
+	iotable_build();
+	sc_init_chip_id();
+	/* earlier init request than irq and timer */
+	__clock_init_early();
+	/*ipi reg init for sipc*/
+	sci_glb_set(REG_AON_APB_APB_EB0, BIT_IPI_EB);
+}
+
+static void __init sc8830_pmu_init(void)
+{
+	__raw_writel(__raw_readl(REG_PMU_APB_PD_MM_TOP_CFG)
+		& ~(BIT_PD_MM_TOP_FORCE_SHUTDOWN),
+		REG_PMU_APB_PD_MM_TOP_CFG);
+
+	while (__raw_readl(REG_PMU_APB_PWR_STATUS0_DBG) & 0xf0000000) {};
+
+	__raw_writel(__raw_readl(REG_PMU_APB_PD_GPU_TOP_CFG)
+		& ~(BIT_PD_GPU_TOP_FORCE_SHUTDOWN),
+		REG_PMU_APB_PD_GPU_TOP_CFG);
+
+	while (__raw_readl(REG_PMU_APB_PWR_STATUS0_DBG) & 0x0f000000) {};
+
+	__raw_writel(__raw_readl(REG_AON_APB_APB_EB0) | BIT_MM_EB |
+		BIT_GPU_EB, REG_AON_APB_APB_EB0);
+	__raw_writel(__raw_readl(REG_MM_AHB_AHB_EB) | BIT_MM_CKG_EB,
+		REG_MM_AHB_AHB_EB);
+	__raw_writel(__raw_readl(REG_MM_AHB_GEN_CKG_CFG)
+		| BIT_MM_MTX_AXI_CKG_EN | BIT_MM_AXI_CKG_EN,
+		REG_MM_AHB_GEN_CKG_CFG);
+	__raw_writel(__raw_readl(REG_MM_CLK_MM_AHB_CFG) | 0x3,
+		REG_MM_CLK_MM_AHB_CFG);
+}
+
+static void sprd_init_time(void)
+{
+	if (of_have_populated_dt()) {
+		sc8830_pmu_init();
+		of_clk_init(NULL);
+		clocksource_of_init();
+	} else {
+		sci_clock_init();
+		sci_enable_timer_early();
+		sci_timer_init();
+	}
+}
+static const char *sprd_boards_compat[] __initdata = {
+	"sprd,sp8835eb",
+	NULL,
+};
+extern struct smp_operations sprd_smp_ops;
+
+MACHINE_START(SCPHONE, "sc8830")
+	.smp		= smp_ops(sprd_smp_ops),
+	.reserve	= sci_reserve,
+	.map_io		= sci_map_io,
+	.init_irq	= sci_init_irq,
+	.init_time	= sprd_init_time,
+	.init_machine	= sc8830_init_machine,
+	.init_late	= sc8830_init_late,
+	.dt_compat	= sprd_boards_compat,
+MACHINE_END
+
diff --git a/arch/arm/mach-sc/board-sp9820ea.c b/arch/arm/mach-sc/board-sp9820ea.c
new file mode 100644
index 00000000..3a4cc489
--- /dev/null
+++ b/arch/arm/mach-sc/board-sp9820ea.c
@@ -0,0 +1,363 @@
+/*
+ * Copyright (C) 2014 Spreadtrum Communications Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/delay.h>
+#include <linux/export.h>
+#include <linux/irqchip/arm-gic.h>
+#include <linux/input.h>
+
+#include <asm/io.h>
+#include <asm/setup.h>
+#include <asm/mach/time.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach-types.h>
+#include <asm/hardware/cache-l2x0.h>
+#include <asm/localtimer.h>
+#include <linux/of_platform.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/clocksource.h>
+#include <linux/clk-provider.h>
+#include <soc/sprd/hardware.h>
+#include <linux/i2c.h>
+#if (defined(CONFIG_INPUT_LIS3DH_I2C) || defined(CONFIG_INPUT_LIS3DH_I2C_MODULE))
+#include <linux/i2c/lis3dh.h>
+#endif
+#if (defined(CONFIG_INPUT_LTR558_I2C) || defined(CONFIG_INPUT_LTR558_I2C_MODULE))
+#include <linux/i2c/ltr_558als.h>
+#endif
+#if (defined(CONFIG_TOUCHSCREEN_MSG2138) || defined(CONFIG_TOUCHSCREEN_MSG2138_MODULE))
+#include <linux/i2c/msg2138.h>
+#endif
+#include <linux/spi/spi.h>
+#include <linux/gpio.h>
+#include <soc/sprd/board.h>
+#include <soc/sprd/serial_sprd.h>
+#include <soc/sprd/adi.h>
+#include <soc/sprd/adc.h>
+#include <soc/sprd/pinmap.h>
+#include <linux/irq.h>
+#include <linux/input/matrix_keypad.h>
+
+#include <soc/sprd/sci.h>
+#include <soc/sprd/kpd.h>
+#include <soc/sprd/sci_glb_regs.h>
+
+#if (defined(CONFIG_INV_MPU_IIO) || defined(CONFIG_INV_MPU_IIO_MODULE))
+#include <linux/mpu.h>
+#endif
+#if (defined(CONFIG_SENSORS_AK8975) || defined(CONFIG_SENSORS_AK8975_MODULE))
+#include <linux/akm8975.h>
+#endif
+
+
+/* IRQ's for the multi sensor board */
+#define MPUIRQ_GPIO 212
+#include <linux/regulator/consumer.h>
+#include <soc/sprd/regulator.h>
+#if (defined(CONFIG_TOUCHSCREEN_FOCALTECH) || defined(CONFIG_TOUCHSCREEN_FOCALTECH_MODULE))
+#include <linux/i2c/focaltech.h>
+#endif
+
+#if (defined(CONFIG_KEYBOARD_SC) || defined (CONFIG_KEYBOARD_SC_MODULE))
+#include <linux/input/matrix_keypad.h>
+#include <soc/sprd/kpd.h>
+#endif
+#if (defined(CONFIG_KEYBOARD_GPIO) || defined (CONFIG_KEYBOARD_GPIO_MODULE))
+#include <linux/gpio_keys.h>
+#endif
+#if (defined(CONFIG_KEYBOARD_SPRD_EIC) || defined(CONFIG_KEYBOARD_SPRD_EIC_MODULE))
+#include <linux/sprd_eic_keys.h>
+#endif
+#if (defined(CONFIG_BACKLIGHT_SPRD_PWM) || defined(CONFIG_BACKLIGHT_SPRD_PWM_MODULE))
+#include <linux/sprd_pwm_bl.h>
+#endif
+#if (defined(CONFIG_INPUT_HEADSET_SPRD_SC2723) || defined(CONFIG_INPUT_HEADSET_SPRD_SC2723_MODULE))
+#include <linux/headset_sprd_sc2723.h>
+#endif
+extern void bluesleep_setup_uart_port(struct platform_device *uart_dev);
+extern void __init sci_reserve(void);
+extern void __init sci_map_io(void);
+extern void __init sci_init_irq(void);
+extern void __init sci_timer_init(void);
+extern int __init sci_clock_init(void);
+extern int __init sci_regulator_init(void);
+
+int __init __clock_init_early(void)
+{
+#if !defined(CONFIG_ARCH_SCX15)
+	pr_info("ahb ctl0 %08x, ctl2 %0x8 glb aon apb0 %08x aon apb1 %08x clk_en %08x\n",
+		sci_glb_raw_read(REG_AP_AHB_AHB_EB),
+		sci_glb_raw_read(REG_AP_AHB_AHB_RST),
+		sci_glb_raw_read(REG_AON_APB_APB_EB0),
+		sci_glb_raw_read(REG_AON_APB_APB_EB1),
+		sci_glb_raw_read(REG_AON_CLK_PUB_AHB_CFG));
+#endif
+
+	sci_glb_clr(REG_AP_AHB_AHB_EB,
+		BIT_BUSMON2_EB		|
+		BIT_BUSMON1_EB		|
+		BIT_BUSMON0_EB		|
+		BIT_SPINLOCK_EB		|
+#if !defined(CONFIG_ARCH_SCX35L)
+		BIT_GPS_EB		|
+#endif
+		BIT_EMMC_EB		|
+		BIT_SDIO2_EB		|
+		BIT_SDIO1_EB		|
+		BIT_SDIO0_EB		|
+		BIT_DRM_EB		|
+		BIT_NFC_EB		|
+		BIT_DMA_EB		|
+		BIT_USB_EB		|
+#if !defined(CONFIG_ARCH_SCX35L)
+		BIT_GSP_EB		|
+		BIT_DISPC1_EB		|
+#endif
+		0);
+	sci_glb_clr(REG_AP_APB_APB_EB,
+		BIT_INTC3_EB		|
+		BIT_INTC2_EB		|
+		BIT_INTC1_EB		|
+		BIT_IIS1_EB		|
+		BIT_UART2_EB		|
+		BIT_UART0_EB		|
+		BIT_SPI1_EB		|
+		BIT_SPI0_EB		|
+		BIT_IIS0_EB		|
+		BIT_I2C0_EB		|
+		BIT_SPI2_EB		|
+		BIT_UART3_EB		|
+		0);
+	sci_glb_clr(REG_AON_APB_APB_RTC_EB,
+		BIT_KPD_RTC_EB		|
+		BIT_KPD_EB		|
+		BIT_EFUSE_EB		|
+		0);
+
+	sci_glb_clr(REG_AON_APB_APB_EB0,
+		BIT_AUDIF_EB			|
+		BIT_VBC_EB			|
+		BIT_PWM3_EB			|
+		BIT_PWM1_EB			|
+		0);
+	sci_glb_clr(REG_AON_APB_APB_EB1,
+		BIT_AUX1_EB			|
+		BIT_AUX0_EB			|
+		0);
+	printk("sc clock module early init ok\n");
+	return 0;
+}
+
+static inline int __sci_get_chip_id(void)
+{
+	return __raw_readl(CHIP_ID_LOW_REG);
+}
+
+const struct of_device_id of_sprd_default_bus_match_table[] = {
+	{ .compatible = "simple-bus", },
+	{ .compatible = "sprd,adi-bus", },
+	{}
+};
+
+static struct of_dev_auxdata of_sprd_default_bus_lookup[] = {
+	{ .compatible = "sprd,sprd_backlight", .name = "sprd_backlight" },
+#if (defined(CONFIG_BACKLIGHT_SPRD_PWM) || defined(CONFIG_BACKLIGHT_SPRD_PWM_MODULE))
+	{ .compatible = "sprd,sprd_pwm_bl",  .name = "sprd_pwm_bl" },
+#endif
+#if (defined(CONFIG_KEYBOARD_SC) || defined(CONFIG_KEYBOARD_SC_MODULE))
+	{.compatible = "sprd,sci-keypad", .name = "sci-keypad" },
+#endif
+#if (defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE))
+	{.compatible = "gpio-keys", .name = "gpio-keys" },
+#endif
+#if (defined(CONFIG_KEYBOARD_SPRD_EIC) || defined(CONFIG_KEYBOARD_SPRD_EIC_MODULE))
+	{.compatible = "sprd,sprd-eic-keys", .name = "sprd-eic-keys" },
+#endif
+#if (defined(CONFIG_INPUT_HEADSET_SPRD_SC2723) || defined(CONFIG_INPUT_HEADSET_SPRD_SC2723_MODULE))
+	{ .compatible = "sprd,headset_sprd_sc2723",  .name = "headset_sprd_sc2723" },
+#endif
+	{}
+};
+
+struct iotable_sprd io_addr_sprd;
+EXPORT_SYMBOL(io_addr_sprd);
+
+int iotable_build()
+{
+	struct device_node *np;
+	struct resource res;
+
+#define ADD_SPRD_DEVICE(compat, id)			\
+do {							\
+	np = of_find_compatible_node(NULL, NULL, compat);\
+	if (of_can_translate_address(np)) {		\
+		of_address_to_resource(np, 0, &res);	\
+		io_addr_sprd.id.paddr = res.start;	\
+		io_addr_sprd.id.length =		\
+			resource_size(&res);		\
+		io_addr_sprd.id.vaddr =			\
+		ioremap_nocache(res.start, io_addr_sprd.id.length);\
+		pr_debug("sprd io map: phys=%08x virt=%08x size=%08x\n", \
+	io_addr_sprd.id.paddr, io_addr_sprd.id.vaddr, io_addr_sprd.id.length);\
+	}						\
+} while (0)
+#define ADD_SPRD_DEVICE_BY_NAME(name, id)		\
+do {							\
+	np = of_find_node_by_name(NULL, name);		\
+	if (of_can_translate_address(np)) {		\
+		of_address_to_resource(np, 0, &res);	\
+		io_addr_sprd.id.paddr = res.start;	\
+		io_addr_sprd.id.length =		\
+			resource_size(&res);		\
+		io_addr_sprd.id.vaddr =			\
+		ioremap_nocache(res.start, io_addr_sprd.id.length);\
+		pr_debug("sprd io map: phys=%16lx virt=%16lx size=%16lx\n", \
+	io_addr_sprd.id.paddr, io_addr_sprd.id.vaddr, io_addr_sprd.id.length);\
+	}						\
+} while (0)
+	ADD_SPRD_DEVICE("sprd,ahb", AHB);
+	ADD_SPRD_DEVICE("sprd,aonapb", AONAPB);
+	ADD_SPRD_DEVICE("sprd,aonckg", AONCKG);
+	ADD_SPRD_DEVICE("sprd,apbreg", APBREG);
+	ADD_SPRD_DEVICE("sprd,core", CORE);
+	ADD_SPRD_DEVICE("sprd,mmahb", MMAHB);
+	ADD_SPRD_DEVICE("sprd,pmu", PMU);
+	ADD_SPRD_DEVICE("sprd,mmckg", MMCKG);
+	ADD_SPRD_DEVICE("sprd,gpuapb", GPUAPB);
+	ADD_SPRD_DEVICE("sprd,apbckg", APBCKG);
+	ADD_SPRD_DEVICE("sprd,gpuckg", GPUCKG);
+	ADD_SPRD_DEVICE("sprd,int", INT);
+	ADD_SPRD_DEVICE("sprd,intc0", INTC0);
+	ADD_SPRD_DEVICE("sprd,intc1", INTC1);
+	ADD_SPRD_DEVICE("sprd,intc2", INTC2);
+	ADD_SPRD_DEVICE("sprd,intc3", INTC3);
+	ADD_SPRD_DEVICE("sprd,uidefuse", UIDEFUSE);
+	ADD_SPRD_DEVICE("sprd,isp", ISP);
+	ADD_SPRD_DEVICE("sprd,ca7wdg", CA7WDG);
+	ADD_SPRD_DEVICE("sprd,csi2", CSI2);
+	ADD_SPRD_DEVICE("sprd,d-eic-gpio", EIC);
+	ADD_SPRD_DEVICE("sprd,wdg", WDG);
+	ADD_SPRD_DEVICE("sprd,ipi", IPI);
+	ADD_SPRD_DEVICE("sprd,dcam", DCAM);
+	ADD_SPRD_DEVICE("sprd,syscnt", SYSCNT);
+	ADD_SPRD_DEVICE("sprd,dma0", DMA0);
+	ADD_SPRD_DEVICE("sprd,pub", PUB);
+	ADD_SPRD_DEVICE("sprd,pin", PIN);
+	ADD_SPRD_DEVICE("sprd,d-gpio-gpio", GPIO);
+	ADD_SPRD_DEVICE_BY_NAME("hwspinlock0", HWSPINLOCK0);
+	ADD_SPRD_DEVICE_BY_NAME("hwspinlock1", HWSPINLOCK1);
+
+	return 0;
+}
+
+static void __init sc8830_init_machine(void)
+{
+	printk("sci get chip id = 0x%x\n", __sci_get_chip_id());
+
+	sci_adc_init();
+#ifndef CONFIG_MACH_SPX35LFPGA
+	sci_regulator_init();
+#endif
+	of_sprd_default_bus_lookup[0].phys_addr = 0x20300000;
+	of_sprd_default_bus_lookup[1].phys_addr = 0x20400000;
+	of_sprd_default_bus_lookup[2].phys_addr = 0x20500000;
+	of_sprd_default_bus_lookup[3].phys_addr = 0x20600000;
+	of_platform_populate(NULL, of_sprd_default_bus_match_table, of_sprd_default_bus_lookup, NULL);
+}
+
+#ifdef CONFIG_OF
+const struct of_device_id of_sprd_late_bus_match_table[] = {
+	{ .compatible = "sprd,sound", },
+	{}
+};
+#endif
+
+static void __init sc8830_init_late(void)
+{
+	of_platform_populate(of_find_node_by_path("/sprd-audio-devices"),
+				of_sprd_late_bus_match_table, NULL, NULL);
+}
+
+
+extern void __init sci_enable_timer_early(void);
+extern void __init sc_init_chip_id(void);
+
+void __init sprd_init_before_irq(void)
+{
+	iotable_build();
+	sc_init_chip_id();
+	/* earlier init request than irq and timer */
+	__clock_init_early();
+	/*ipi reg init for sipc*/
+	sci_glb_set(REG_AON_APB_APB_EB0, BIT_IPI_EB);
+}
+
+static void __init sc8830_pmu_init(void)
+{
+	__raw_writel(__raw_readl(REG_PMU_APB_PD_MM_TOP_CFG)
+		& ~(BIT_PD_MM_TOP_FORCE_SHUTDOWN),
+		REG_PMU_APB_PD_MM_TOP_CFG);
+
+	while (__raw_readl(REG_PMU_APB_PWR_STATUS0_DBG) & 0xf0000000) {};
+
+	__raw_writel(__raw_readl(REG_PMU_APB_PD_GPU_TOP_CFG)
+		& ~(BIT_PD_GPU_TOP_FORCE_SHUTDOWN),
+		REG_PMU_APB_PD_GPU_TOP_CFG);
+
+	while (__raw_readl(REG_PMU_APB_PWR_STATUS0_DBG) & 0x0f000000) {};
+
+	__raw_writel(__raw_readl(REG_AON_APB_APB_EB0) | BIT_MM_EB |
+		BIT_GPU_EB, REG_AON_APB_APB_EB0);
+	__raw_writel(__raw_readl(REG_MM_AHB_AHB_EB) | BIT_MM_CKG_EB,
+		REG_MM_AHB_AHB_EB);
+	__raw_writel(__raw_readl(REG_MM_AHB_GEN_CKG_CFG)
+		| BIT_MM_MTX_AXI_CKG_EN | BIT_MM_AXI_CKG_EN,
+		REG_MM_AHB_GEN_CKG_CFG);
+	__raw_writel(__raw_readl(REG_MM_CLK_MM_AHB_CFG) | 0x3,
+		REG_MM_CLK_MM_AHB_CFG);
+}
+
+static void sprd_init_time(void)
+{
+	if (of_have_populated_dt()) {
+		sc8830_pmu_init();
+		of_clk_init(NULL);
+		clocksource_of_init();
+	} else {
+		sci_clock_init();
+		sci_enable_timer_early();
+		sci_timer_init();
+	}
+}
+static const char *sprd_boards_compat[] __initdata = {
+	"sprd,sp8835eb",
+	NULL,
+};
+extern struct smp_operations sprd_smp_ops;
+
+MACHINE_START(SCPHONE, "sc8830")
+	.smp		= smp_ops(sprd_smp_ops),
+	.reserve	= sci_reserve,
+	.map_io		= sci_map_io,
+	.init_irq	= sci_init_irq,
+	.init_time	= sprd_init_time,
+	.init_machine	= sc8830_init_machine,
+	.init_late	= sc8830_init_late,
+	.dt_compat	= sprd_boards_compat,
+MACHINE_END
+
diff --git a/arch/arm/mach-sc/board-sp9820fpga.c b/arch/arm/mach-sc/board-sp9820fpga.c
new file mode 100644
index 00000000..a24fbeaa
--- /dev/null
+++ b/arch/arm/mach-sc/board-sp9820fpga.c
@@ -0,0 +1,369 @@
+/*
+ * Copyright (C) 2014 Spreadtrum Communications Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/delay.h>
+#include <linux/export.h>
+#include <linux/irqchip/arm-gic.h>
+#include <linux/input.h>
+
+#include <asm/io.h>
+#include <asm/setup.h>
+#include <asm/mach/time.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach-types.h>
+#include <asm/hardware/cache-l2x0.h>
+#include <asm/localtimer.h>
+#include <linux/of_platform.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/clocksource.h>
+#include <linux/clk-provider.h>
+#include <soc/sprd/hardware.h>
+#include <linux/i2c.h>
+#if (defined(CONFIG_INPUT_LIS3DH_I2C) || defined(CONFIG_INPUT_LIS3DH_I2C_MODULE))
+#include <linux/i2c/lis3dh.h>
+#endif
+#if (defined(CONFIG_INPUT_LTR558_I2C) || defined(CONFIG_INPUT_LTR558_I2C_MODULE))
+#include <linux/i2c/ltr_558als.h>
+#endif
+#if (defined(CONFIG_TOUCHSCREEN_MSG2138) || defined(CONFIG_TOUCHSCREEN_MSG2138_MODULE))
+#include <linux/i2c/msg2138.h>
+#endif
+#include <linux/spi/spi.h>
+#include <linux/gpio.h>
+#include <soc/sprd/board.h>
+#include <soc/sprd/serial_sprd.h>
+#include <soc/sprd/adi.h>
+#include <soc/sprd/adc.h>
+#include <soc/sprd/pinmap.h>
+#include <linux/irq.h>
+#include <linux/input/matrix_keypad.h>
+
+#include <soc/sprd/sci.h>
+#include <soc/sprd/kpd.h>
+#include <soc/sprd/sci_glb_regs.h>
+
+#if (defined(CONFIG_INV_MPU_IIO) || defined(CONFIG_INV_MPU_IIO_MODULE))
+#include <linux/mpu.h>
+#endif
+#if (defined(CONFIG_SENSORS_AK8975) || defined(CONFIG_SENSORS_AK8975_MODULE))
+#include <linux/akm8975.h>
+#endif
+
+
+/* IRQ's for the multi sensor board */
+#define MPUIRQ_GPIO 212
+#include <linux/regulator/consumer.h>
+#include <soc/sprd/regulator.h>
+#if (defined(CONFIG_TOUCHSCREEN_FOCALTECH) || defined(CONFIG_TOUCHSCREEN_FOCALTECH_MODULE))
+#include <linux/i2c/focaltech.h>
+#endif
+
+#if (defined(CONFIG_KEYBOARD_SC) || defined (CONFIG_KEYBOARD_SC_MODULE))
+#include <linux/input/matrix_keypad.h>
+#include <soc/sprd/kpd.h>
+#endif
+#if (defined(CONFIG_KEYBOARD_GPIO) || defined (CONFIG_KEYBOARD_GPIO_MODULE))
+#include <linux/gpio_keys.h>
+#endif
+#if (defined(CONFIG_KEYBOARD_SPRD_EIC) || defined(CONFIG_KEYBOARD_SPRD_EIC_MODULE))
+#include <linux/sprd_eic_keys.h>
+#endif
+#if (defined(CONFIG_BACKLIGHT_SPRD_PWM) || defined(CONFIG_BACKLIGHT_SPRD_PWM_MODULE))
+#include <linux/sprd_pwm_bl.h>
+#endif
+#if (defined(CONFIG_INPUT_HEADSET_SPRD_SC2723) || defined(CONFIG_INPUT_HEADSET_SPRD_SC2723_MODULE))
+#include <linux/headset_sprd_sc2723.h>
+#endif
+extern void bluesleep_setup_uart_port(struct platform_device *uart_dev);
+extern void __init sci_reserve(void);
+extern void __init sci_map_io(void);
+extern void __init sci_init_irq(void);
+extern void __init sci_timer_init(void);
+extern int __init sci_clock_init(void);
+extern int __init sci_regulator_init(void);
+
+int __init __clock_init_early(void)
+{
+#if !defined(CONFIG_ARCH_SCX15)
+	pr_info("ahb ctl0 %08x, ctl2 %0x8 glb aon apb0 %08x aon apb1 %08x clk_en %08x\n",
+		sci_glb_raw_read(REG_AP_AHB_AHB_EB),
+		sci_glb_raw_read(REG_AP_AHB_AHB_RST),
+		sci_glb_raw_read(REG_AON_APB_APB_EB0),
+		sci_glb_raw_read(REG_AON_APB_APB_EB1),
+		sci_glb_raw_read(REG_AON_CLK_PUB_AHB_CFG));
+#endif
+
+	sci_glb_clr(REG_AP_AHB_AHB_EB,
+		BIT_BUSMON2_EB		|
+		BIT_BUSMON1_EB		|
+		BIT_BUSMON0_EB		|
+		BIT_SPINLOCK_EB		|
+#if !defined(CONFIG_ARCH_SCX35L)
+		BIT_GPS_EB		|
+#endif
+		BIT_EMMC_EB		|
+		BIT_SDIO2_EB		|
+		BIT_SDIO1_EB		|
+		BIT_SDIO0_EB		|
+		BIT_DRM_EB		|
+		BIT_NFC_EB		|
+		BIT_DMA_EB		|
+		BIT_USB_EB		|
+#if !defined(CONFIG_ARCH_SCX35L)
+		BIT_GSP_EB		|
+		BIT_DISPC1_EB		|
+#endif
+		0);
+	sci_glb_clr(REG_AP_APB_APB_EB,
+		BIT_INTC3_EB		|
+		BIT_INTC2_EB		|
+		BIT_INTC1_EB		|
+		BIT_IIS1_EB		|
+		BIT_UART2_EB		|
+		BIT_UART0_EB		|
+		BIT_SPI1_EB		|
+		BIT_SPI0_EB		|
+		BIT_IIS0_EB		|
+		BIT_I2C0_EB		|
+		BIT_SPI2_EB		|
+		BIT_UART3_EB		|
+		0);
+	sci_glb_clr(REG_AON_APB_APB_RTC_EB,
+		BIT_KPD_RTC_EB		|
+		BIT_KPD_EB		|
+		BIT_EFUSE_EB		|
+		0);
+
+	sci_glb_clr(REG_AON_APB_APB_EB0,
+		BIT_AUDIF_EB			|
+		BIT_VBC_EB			|
+		BIT_PWM3_EB			|
+		BIT_PWM1_EB			|
+		0);
+	sci_glb_clr(REG_AON_APB_APB_EB1,
+		BIT_AUX1_EB			|
+		BIT_AUX0_EB			|
+		0);
+	printk("sc clock module early init ok\n");
+	return 0;
+}
+
+static inline int __sci_get_chip_id(void)
+{
+	return __raw_readl(CHIP_ID_LOW_REG);
+}
+
+const struct of_device_id of_sprd_default_bus_match_table[] = {
+	{ .compatible = "simple-bus", },
+	{ .compatible = "sprd,adi-bus", },
+	{}
+};
+
+static struct of_dev_auxdata of_sprd_default_bus_lookup[] = {
+	{ .compatible = "sprd,sdhci-shark", .name = "sdio_sd", },
+	{ .compatible = "sprd,sdhci-shark", .name = "sdio_wifi", },
+	{ .compatible = "sprd,sdhci-shark", .name = "sprd-sdhci.2", },
+	{ .compatible = "sprd,sdhci-shark", .name = "sdio_emmc", },
+	{ .compatible = "sprd,sprd_backlight", .name = "sprd_backlight" },
+#if (defined(CONFIG_BACKLIGHT_SPRD_PWM) || defined(CONFIG_BACKLIGHT_SPRD_PWM_MODULE))
+	{ .compatible = "sprd,sprd_pwm_bl",  .name = "sprd_pwm_bl" },
+#endif
+#if (defined(CONFIG_KEYBOARD_SC) || defined(CONFIG_KEYBOARD_SC_MODULE))
+	{.compatible = "sprd,sci-keypad", .name = "sci-keypad" },
+#endif
+#if (defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE))
+	{.compatible = "gpio-keys", .name = "gpio-keys" },
+#endif
+#if (defined(CONFIG_KEYBOARD_SPRD_EIC) || defined(CONFIG_KEYBOARD_SPRD_EIC_MODULE))
+	{.compatible = "sprd,sprd-eic-keys", .name = "sprd-eic-keys" },
+#endif
+#if (defined(CONFIG_INPUT_HEADSET_SPRD_SC2723) || defined(CONFIG_INPUT_HEADSET_SPRD_SC2723_MODULE))
+	{ .compatible = "sprd,headset_sprd_sc2723",  .name = "headset_sprd_sc2723" },
+#endif
+	{}
+};
+
+struct iotable_sprd io_addr_sprd;
+EXPORT_SYMBOL(io_addr_sprd);
+
+int iotable_build()
+{
+	struct device_node *np;
+	struct resource res;
+
+#define ADD_SPRD_DEVICE(compat, id)			\
+do {							\
+	np = of_find_compatible_node(NULL, NULL, compat);\
+	if (of_can_translate_address(np)) {		\
+		of_address_to_resource(np, 0, &res);	\
+		io_addr_sprd.id.paddr = res.start;	\
+		io_addr_sprd.id.length =		\
+			resource_size(&res);		\
+		io_addr_sprd.id.vaddr =			\
+		ioremap_nocache(res.start, io_addr_sprd.id.length);\
+		pr_debug("sprd io map: phys=%08x virt=%08x size=%08x\n", \
+	io_addr_sprd.id.paddr, io_addr_sprd.id.vaddr, io_addr_sprd.id.length);\
+	}						\
+} while (0)
+#define ADD_SPRD_DEVICE_BY_NAME(name, id)		\
+do {							\
+	np = of_find_node_by_name(NULL, name);		\
+	if (of_can_translate_address(np)) {		\
+		of_address_to_resource(np, 0, &res);	\
+		io_addr_sprd.id.paddr = res.start;	\
+		io_addr_sprd.id.length =		\
+			resource_size(&res);		\
+		io_addr_sprd.id.vaddr =			\
+		ioremap_nocache(res.start, io_addr_sprd.id.length);\
+		pr_debug("sprd io map: phys=%16lx virt=%16lx size=%16lx\n", \
+	io_addr_sprd.id.paddr, io_addr_sprd.id.vaddr, io_addr_sprd.id.length);\
+	}						\
+} while (0)
+	ADD_SPRD_DEVICE("sprd,ahb", AHB);
+	ADD_SPRD_DEVICE("sprd,aonapb", AONAPB);
+	ADD_SPRD_DEVICE("sprd,aonckg", AONCKG);
+	ADD_SPRD_DEVICE("sprd,apbreg", APBREG);
+	ADD_SPRD_DEVICE("sprd,core", CORE);
+	ADD_SPRD_DEVICE("sprd,mmahb", MMAHB);
+	ADD_SPRD_DEVICE("sprd,pmu", PMU);
+	ADD_SPRD_DEVICE("sprd,mmckg", MMCKG);
+	ADD_SPRD_DEVICE("sprd,gpuapb", GPUAPB);
+	ADD_SPRD_DEVICE("sprd,apbckg", APBCKG);
+	ADD_SPRD_DEVICE("sprd,gpuckg", GPUCKG);
+	ADD_SPRD_DEVICE("sprd,int", INT);
+	ADD_SPRD_DEVICE("sprd,intc0", INTC0);
+	ADD_SPRD_DEVICE("sprd,intc1", INTC1);
+	ADD_SPRD_DEVICE("sprd,intc2", INTC2);
+	ADD_SPRD_DEVICE("sprd,intc3", INTC3);
+	ADD_SPRD_DEVICE("sprd,uidefuse", UIDEFUSE);
+	ADD_SPRD_DEVICE("sprd,isp", ISP);
+	ADD_SPRD_DEVICE("sprd,csi2", CSI2);
+	ADD_SPRD_DEVICE("sprd,d-eic-gpio", EIC);
+	ADD_SPRD_DEVICE("sprd,ipi", IPI);
+	ADD_SPRD_DEVICE("sprd,dcam", DCAM);
+	ADD_SPRD_DEVICE("sprd,syscnt", SYSCNT);
+	ADD_SPRD_DEVICE("sprd,dma0", DMA0);
+	ADD_SPRD_DEVICE("sprd,pub", PUB);
+	ADD_SPRD_DEVICE("sprd,pin", PIN);
+	ADD_SPRD_DEVICE("sprd,d-gpio-gpio", GPIO);
+	ADD_SPRD_DEVICE_BY_NAME("hwspinlock0", HWSPINLOCK0);
+	ADD_SPRD_DEVICE_BY_NAME("hwspinlock1", HWSPINLOCK1);
+
+	return 0;
+}
+
+static void __init sc8830_init_machine(void)
+{
+	printk("sci get chip id = 0x%x\n", __sci_get_chip_id());
+
+	sci_adc_init();
+#ifndef CONFIG_SC_FPGA
+	sci_regulator_init();
+#endif
+	of_sprd_default_bus_lookup[0].phys_addr = 0x20300000;
+	of_sprd_default_bus_lookup[1].phys_addr = 0x20400000;
+	of_sprd_default_bus_lookup[2].phys_addr = 0x20500000;
+	of_sprd_default_bus_lookup[3].phys_addr = 0x20600000;
+	of_platform_populate(NULL, of_sprd_default_bus_match_table, of_sprd_default_bus_lookup, NULL);
+}
+
+#ifdef CONFIG_OF
+const struct of_device_id of_sprd_late_bus_match_table[] = {
+	{ .compatible = "sprd,sound", },
+	{}
+};
+#endif
+
+static void __init sc8830_init_late(void)
+{
+	of_platform_populate(of_find_node_by_path("/sprd-audio-devices"),
+				of_sprd_late_bus_match_table, NULL, NULL);
+}
+
+
+extern void __init sci_enable_timer_early(void);
+extern void __init sc_init_chip_id(void);
+
+void __init sprd_init_before_irq(void)
+{
+	iotable_build();
+	sc_init_chip_id();
+	/* earlier init request than irq and timer */
+	__clock_init_early();
+	/*ipi reg init for sipc*/
+	sci_glb_set(REG_AON_APB_APB_EB0, BIT_IPI_EB);
+}
+
+static void __init sc8830_pmu_init(void)
+{
+	__raw_writel(__raw_readl(REG_PMU_APB_PD_MM_TOP_CFG)
+		     & ~(BIT_PD_MM_TOP_FORCE_SHUTDOWN),
+		     REG_PMU_APB_PD_MM_TOP_CFG);
+#ifndef CONFIG_SC_FPGA
+    while (__raw_readl(REG_PMU_APB_PWR_STATUS0_DBG) & 0xf0000000) {};
+#endif
+	__raw_writel(__raw_readl(REG_PMU_APB_PD_GPU_TOP_CFG)
+		     & ~(BIT_PD_GPU_TOP_FORCE_SHUTDOWN),
+		     REG_PMU_APB_PD_GPU_TOP_CFG);
+#ifndef CONFIG_SC_FPGA
+    while (__raw_readl(REG_PMU_APB_PWR_STATUS0_DBG) & 0x0f000000) {};
+#endif
+	__raw_writel(__raw_readl(REG_AON_APB_APB_EB0) | BIT_MM_EB |
+		     BIT_GPU_EB, REG_AON_APB_APB_EB0);
+#ifndef CONFIG_SC_FPGA
+	__raw_writel(__raw_readl(REG_MM_AHB_AHB_EB) | BIT_MM_CKG_EB,
+		REG_MM_AHB_AHB_EB);
+	__raw_writel(__raw_readl(REG_MM_AHB_GEN_CKG_CFG)
+		| BIT_MM_MTX_AXI_CKG_EN | BIT_MM_AXI_CKG_EN,
+		REG_MM_AHB_GEN_CKG_CFG);
+	__raw_writel(__raw_readl(REG_MM_CLK_MM_AHB_CFG) | 0x3,
+		     REG_MM_CLK_MM_AHB_CFG);
+#endif
+}
+
+static void sprd_init_time(void)
+{
+	if (of_have_populated_dt()) {
+		sc8830_pmu_init();
+#ifndef CONFIG_SC_FPGA
+		of_clk_init(NULL);
+#endif
+		clocksource_of_init();
+	} else {
+		sci_clock_init();
+		sci_enable_timer_early();
+		sci_timer_init();
+	}
+}
+static const char *sprd_boards_compat[] __initdata = {
+	"sprd,sp8835eb",
+	NULL,
+};
+extern struct smp_operations sprd_smp_ops;
+
+MACHINE_START(SCPHONE, "sc8830")
+	.smp		= smp_ops(sprd_smp_ops),
+	.reserve	= sci_reserve,
+	.map_io		= sci_map_io,
+	.init_irq	= sci_init_irq,
+	.init_time	= sprd_init_time,
+	.init_machine	= sc8830_init_machine,
+	.init_late	= sc8830_init_late,
+	.dt_compat	= sprd_boards_compat,
+MACHINE_END
+
diff --git a/arch/arm/mach-sc/board-sp9830aea_5m_h100.c b/arch/arm/mach-sc/board-sp9830aea_5m_h100.c
new file mode 100644
index 00000000..3a4cc489
--- /dev/null
+++ b/arch/arm/mach-sc/board-sp9830aea_5m_h100.c
@@ -0,0 +1,363 @@
+/*
+ * Copyright (C) 2014 Spreadtrum Communications Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/delay.h>
+#include <linux/export.h>
+#include <linux/irqchip/arm-gic.h>
+#include <linux/input.h>
+
+#include <asm/io.h>
+#include <asm/setup.h>
+#include <asm/mach/time.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach-types.h>
+#include <asm/hardware/cache-l2x0.h>
+#include <asm/localtimer.h>
+#include <linux/of_platform.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/clocksource.h>
+#include <linux/clk-provider.h>
+#include <soc/sprd/hardware.h>
+#include <linux/i2c.h>
+#if (defined(CONFIG_INPUT_LIS3DH_I2C) || defined(CONFIG_INPUT_LIS3DH_I2C_MODULE))
+#include <linux/i2c/lis3dh.h>
+#endif
+#if (defined(CONFIG_INPUT_LTR558_I2C) || defined(CONFIG_INPUT_LTR558_I2C_MODULE))
+#include <linux/i2c/ltr_558als.h>
+#endif
+#if (defined(CONFIG_TOUCHSCREEN_MSG2138) || defined(CONFIG_TOUCHSCREEN_MSG2138_MODULE))
+#include <linux/i2c/msg2138.h>
+#endif
+#include <linux/spi/spi.h>
+#include <linux/gpio.h>
+#include <soc/sprd/board.h>
+#include <soc/sprd/serial_sprd.h>
+#include <soc/sprd/adi.h>
+#include <soc/sprd/adc.h>
+#include <soc/sprd/pinmap.h>
+#include <linux/irq.h>
+#include <linux/input/matrix_keypad.h>
+
+#include <soc/sprd/sci.h>
+#include <soc/sprd/kpd.h>
+#include <soc/sprd/sci_glb_regs.h>
+
+#if (defined(CONFIG_INV_MPU_IIO) || defined(CONFIG_INV_MPU_IIO_MODULE))
+#include <linux/mpu.h>
+#endif
+#if (defined(CONFIG_SENSORS_AK8975) || defined(CONFIG_SENSORS_AK8975_MODULE))
+#include <linux/akm8975.h>
+#endif
+
+
+/* IRQ's for the multi sensor board */
+#define MPUIRQ_GPIO 212
+#include <linux/regulator/consumer.h>
+#include <soc/sprd/regulator.h>
+#if (defined(CONFIG_TOUCHSCREEN_FOCALTECH) || defined(CONFIG_TOUCHSCREEN_FOCALTECH_MODULE))
+#include <linux/i2c/focaltech.h>
+#endif
+
+#if (defined(CONFIG_KEYBOARD_SC) || defined (CONFIG_KEYBOARD_SC_MODULE))
+#include <linux/input/matrix_keypad.h>
+#include <soc/sprd/kpd.h>
+#endif
+#if (defined(CONFIG_KEYBOARD_GPIO) || defined (CONFIG_KEYBOARD_GPIO_MODULE))
+#include <linux/gpio_keys.h>
+#endif
+#if (defined(CONFIG_KEYBOARD_SPRD_EIC) || defined(CONFIG_KEYBOARD_SPRD_EIC_MODULE))
+#include <linux/sprd_eic_keys.h>
+#endif
+#if (defined(CONFIG_BACKLIGHT_SPRD_PWM) || defined(CONFIG_BACKLIGHT_SPRD_PWM_MODULE))
+#include <linux/sprd_pwm_bl.h>
+#endif
+#if (defined(CONFIG_INPUT_HEADSET_SPRD_SC2723) || defined(CONFIG_INPUT_HEADSET_SPRD_SC2723_MODULE))
+#include <linux/headset_sprd_sc2723.h>
+#endif
+extern void bluesleep_setup_uart_port(struct platform_device *uart_dev);
+extern void __init sci_reserve(void);
+extern void __init sci_map_io(void);
+extern void __init sci_init_irq(void);
+extern void __init sci_timer_init(void);
+extern int __init sci_clock_init(void);
+extern int __init sci_regulator_init(void);
+
+int __init __clock_init_early(void)
+{
+#if !defined(CONFIG_ARCH_SCX15)
+	pr_info("ahb ctl0 %08x, ctl2 %0x8 glb aon apb0 %08x aon apb1 %08x clk_en %08x\n",
+		sci_glb_raw_read(REG_AP_AHB_AHB_EB),
+		sci_glb_raw_read(REG_AP_AHB_AHB_RST),
+		sci_glb_raw_read(REG_AON_APB_APB_EB0),
+		sci_glb_raw_read(REG_AON_APB_APB_EB1),
+		sci_glb_raw_read(REG_AON_CLK_PUB_AHB_CFG));
+#endif
+
+	sci_glb_clr(REG_AP_AHB_AHB_EB,
+		BIT_BUSMON2_EB		|
+		BIT_BUSMON1_EB		|
+		BIT_BUSMON0_EB		|
+		BIT_SPINLOCK_EB		|
+#if !defined(CONFIG_ARCH_SCX35L)
+		BIT_GPS_EB		|
+#endif
+		BIT_EMMC_EB		|
+		BIT_SDIO2_EB		|
+		BIT_SDIO1_EB		|
+		BIT_SDIO0_EB		|
+		BIT_DRM_EB		|
+		BIT_NFC_EB		|
+		BIT_DMA_EB		|
+		BIT_USB_EB		|
+#if !defined(CONFIG_ARCH_SCX35L)
+		BIT_GSP_EB		|
+		BIT_DISPC1_EB		|
+#endif
+		0);
+	sci_glb_clr(REG_AP_APB_APB_EB,
+		BIT_INTC3_EB		|
+		BIT_INTC2_EB		|
+		BIT_INTC1_EB		|
+		BIT_IIS1_EB		|
+		BIT_UART2_EB		|
+		BIT_UART0_EB		|
+		BIT_SPI1_EB		|
+		BIT_SPI0_EB		|
+		BIT_IIS0_EB		|
+		BIT_I2C0_EB		|
+		BIT_SPI2_EB		|
+		BIT_UART3_EB		|
+		0);
+	sci_glb_clr(REG_AON_APB_APB_RTC_EB,
+		BIT_KPD_RTC_EB		|
+		BIT_KPD_EB		|
+		BIT_EFUSE_EB		|
+		0);
+
+	sci_glb_clr(REG_AON_APB_APB_EB0,
+		BIT_AUDIF_EB			|
+		BIT_VBC_EB			|
+		BIT_PWM3_EB			|
+		BIT_PWM1_EB			|
+		0);
+	sci_glb_clr(REG_AON_APB_APB_EB1,
+		BIT_AUX1_EB			|
+		BIT_AUX0_EB			|
+		0);
+	printk("sc clock module early init ok\n");
+	return 0;
+}
+
+static inline int __sci_get_chip_id(void)
+{
+	return __raw_readl(CHIP_ID_LOW_REG);
+}
+
+const struct of_device_id of_sprd_default_bus_match_table[] = {
+	{ .compatible = "simple-bus", },
+	{ .compatible = "sprd,adi-bus", },
+	{}
+};
+
+static struct of_dev_auxdata of_sprd_default_bus_lookup[] = {
+	{ .compatible = "sprd,sprd_backlight", .name = "sprd_backlight" },
+#if (defined(CONFIG_BACKLIGHT_SPRD_PWM) || defined(CONFIG_BACKLIGHT_SPRD_PWM_MODULE))
+	{ .compatible = "sprd,sprd_pwm_bl",  .name = "sprd_pwm_bl" },
+#endif
+#if (defined(CONFIG_KEYBOARD_SC) || defined(CONFIG_KEYBOARD_SC_MODULE))
+	{.compatible = "sprd,sci-keypad", .name = "sci-keypad" },
+#endif
+#if (defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE))
+	{.compatible = "gpio-keys", .name = "gpio-keys" },
+#endif
+#if (defined(CONFIG_KEYBOARD_SPRD_EIC) || defined(CONFIG_KEYBOARD_SPRD_EIC_MODULE))
+	{.compatible = "sprd,sprd-eic-keys", .name = "sprd-eic-keys" },
+#endif
+#if (defined(CONFIG_INPUT_HEADSET_SPRD_SC2723) || defined(CONFIG_INPUT_HEADSET_SPRD_SC2723_MODULE))
+	{ .compatible = "sprd,headset_sprd_sc2723",  .name = "headset_sprd_sc2723" },
+#endif
+	{}
+};
+
+struct iotable_sprd io_addr_sprd;
+EXPORT_SYMBOL(io_addr_sprd);
+
+int iotable_build()
+{
+	struct device_node *np;
+	struct resource res;
+
+#define ADD_SPRD_DEVICE(compat, id)			\
+do {							\
+	np = of_find_compatible_node(NULL, NULL, compat);\
+	if (of_can_translate_address(np)) {		\
+		of_address_to_resource(np, 0, &res);	\
+		io_addr_sprd.id.paddr = res.start;	\
+		io_addr_sprd.id.length =		\
+			resource_size(&res);		\
+		io_addr_sprd.id.vaddr =			\
+		ioremap_nocache(res.start, io_addr_sprd.id.length);\
+		pr_debug("sprd io map: phys=%08x virt=%08x size=%08x\n", \
+	io_addr_sprd.id.paddr, io_addr_sprd.id.vaddr, io_addr_sprd.id.length);\
+	}						\
+} while (0)
+#define ADD_SPRD_DEVICE_BY_NAME(name, id)		\
+do {							\
+	np = of_find_node_by_name(NULL, name);		\
+	if (of_can_translate_address(np)) {		\
+		of_address_to_resource(np, 0, &res);	\
+		io_addr_sprd.id.paddr = res.start;	\
+		io_addr_sprd.id.length =		\
+			resource_size(&res);		\
+		io_addr_sprd.id.vaddr =			\
+		ioremap_nocache(res.start, io_addr_sprd.id.length);\
+		pr_debug("sprd io map: phys=%16lx virt=%16lx size=%16lx\n", \
+	io_addr_sprd.id.paddr, io_addr_sprd.id.vaddr, io_addr_sprd.id.length);\
+	}						\
+} while (0)
+	ADD_SPRD_DEVICE("sprd,ahb", AHB);
+	ADD_SPRD_DEVICE("sprd,aonapb", AONAPB);
+	ADD_SPRD_DEVICE("sprd,aonckg", AONCKG);
+	ADD_SPRD_DEVICE("sprd,apbreg", APBREG);
+	ADD_SPRD_DEVICE("sprd,core", CORE);
+	ADD_SPRD_DEVICE("sprd,mmahb", MMAHB);
+	ADD_SPRD_DEVICE("sprd,pmu", PMU);
+	ADD_SPRD_DEVICE("sprd,mmckg", MMCKG);
+	ADD_SPRD_DEVICE("sprd,gpuapb", GPUAPB);
+	ADD_SPRD_DEVICE("sprd,apbckg", APBCKG);
+	ADD_SPRD_DEVICE("sprd,gpuckg", GPUCKG);
+	ADD_SPRD_DEVICE("sprd,int", INT);
+	ADD_SPRD_DEVICE("sprd,intc0", INTC0);
+	ADD_SPRD_DEVICE("sprd,intc1", INTC1);
+	ADD_SPRD_DEVICE("sprd,intc2", INTC2);
+	ADD_SPRD_DEVICE("sprd,intc3", INTC3);
+	ADD_SPRD_DEVICE("sprd,uidefuse", UIDEFUSE);
+	ADD_SPRD_DEVICE("sprd,isp", ISP);
+	ADD_SPRD_DEVICE("sprd,ca7wdg", CA7WDG);
+	ADD_SPRD_DEVICE("sprd,csi2", CSI2);
+	ADD_SPRD_DEVICE("sprd,d-eic-gpio", EIC);
+	ADD_SPRD_DEVICE("sprd,wdg", WDG);
+	ADD_SPRD_DEVICE("sprd,ipi", IPI);
+	ADD_SPRD_DEVICE("sprd,dcam", DCAM);
+	ADD_SPRD_DEVICE("sprd,syscnt", SYSCNT);
+	ADD_SPRD_DEVICE("sprd,dma0", DMA0);
+	ADD_SPRD_DEVICE("sprd,pub", PUB);
+	ADD_SPRD_DEVICE("sprd,pin", PIN);
+	ADD_SPRD_DEVICE("sprd,d-gpio-gpio", GPIO);
+	ADD_SPRD_DEVICE_BY_NAME("hwspinlock0", HWSPINLOCK0);
+	ADD_SPRD_DEVICE_BY_NAME("hwspinlock1", HWSPINLOCK1);
+
+	return 0;
+}
+
+static void __init sc8830_init_machine(void)
+{
+	printk("sci get chip id = 0x%x\n", __sci_get_chip_id());
+
+	sci_adc_init();
+#ifndef CONFIG_MACH_SPX35LFPGA
+	sci_regulator_init();
+#endif
+	of_sprd_default_bus_lookup[0].phys_addr = 0x20300000;
+	of_sprd_default_bus_lookup[1].phys_addr = 0x20400000;
+	of_sprd_default_bus_lookup[2].phys_addr = 0x20500000;
+	of_sprd_default_bus_lookup[3].phys_addr = 0x20600000;
+	of_platform_populate(NULL, of_sprd_default_bus_match_table, of_sprd_default_bus_lookup, NULL);
+}
+
+#ifdef CONFIG_OF
+const struct of_device_id of_sprd_late_bus_match_table[] = {
+	{ .compatible = "sprd,sound", },
+	{}
+};
+#endif
+
+static void __init sc8830_init_late(void)
+{
+	of_platform_populate(of_find_node_by_path("/sprd-audio-devices"),
+				of_sprd_late_bus_match_table, NULL, NULL);
+}
+
+
+extern void __init sci_enable_timer_early(void);
+extern void __init sc_init_chip_id(void);
+
+void __init sprd_init_before_irq(void)
+{
+	iotable_build();
+	sc_init_chip_id();
+	/* earlier init request than irq and timer */
+	__clock_init_early();
+	/*ipi reg init for sipc*/
+	sci_glb_set(REG_AON_APB_APB_EB0, BIT_IPI_EB);
+}
+
+static void __init sc8830_pmu_init(void)
+{
+	__raw_writel(__raw_readl(REG_PMU_APB_PD_MM_TOP_CFG)
+		& ~(BIT_PD_MM_TOP_FORCE_SHUTDOWN),
+		REG_PMU_APB_PD_MM_TOP_CFG);
+
+	while (__raw_readl(REG_PMU_APB_PWR_STATUS0_DBG) & 0xf0000000) {};
+
+	__raw_writel(__raw_readl(REG_PMU_APB_PD_GPU_TOP_CFG)
+		& ~(BIT_PD_GPU_TOP_FORCE_SHUTDOWN),
+		REG_PMU_APB_PD_GPU_TOP_CFG);
+
+	while (__raw_readl(REG_PMU_APB_PWR_STATUS0_DBG) & 0x0f000000) {};
+
+	__raw_writel(__raw_readl(REG_AON_APB_APB_EB0) | BIT_MM_EB |
+		BIT_GPU_EB, REG_AON_APB_APB_EB0);
+	__raw_writel(__raw_readl(REG_MM_AHB_AHB_EB) | BIT_MM_CKG_EB,
+		REG_MM_AHB_AHB_EB);
+	__raw_writel(__raw_readl(REG_MM_AHB_GEN_CKG_CFG)
+		| BIT_MM_MTX_AXI_CKG_EN | BIT_MM_AXI_CKG_EN,
+		REG_MM_AHB_GEN_CKG_CFG);
+	__raw_writel(__raw_readl(REG_MM_CLK_MM_AHB_CFG) | 0x3,
+		REG_MM_CLK_MM_AHB_CFG);
+}
+
+static void sprd_init_time(void)
+{
+	if (of_have_populated_dt()) {
+		sc8830_pmu_init();
+		of_clk_init(NULL);
+		clocksource_of_init();
+	} else {
+		sci_clock_init();
+		sci_enable_timer_early();
+		sci_timer_init();
+	}
+}
+static const char *sprd_boards_compat[] __initdata = {
+	"sprd,sp8835eb",
+	NULL,
+};
+extern struct smp_operations sprd_smp_ops;
+
+MACHINE_START(SCPHONE, "sc8830")
+	.smp		= smp_ops(sprd_smp_ops),
+	.reserve	= sci_reserve,
+	.map_io		= sci_map_io,
+	.init_irq	= sci_init_irq,
+	.init_time	= sprd_init_time,
+	.init_machine	= sc8830_init_machine,
+	.init_late	= sc8830_init_late,
+	.dt_compat	= sprd_boards_compat,
+MACHINE_END
+
diff --git a/arch/arm/mach-sc/board-sp9830aea_5m_volte.c b/arch/arm/mach-sc/board-sp9830aea_5m_volte.c
new file mode 100644
index 00000000..3a4cc489
--- /dev/null
+++ b/arch/arm/mach-sc/board-sp9830aea_5m_volte.c
@@ -0,0 +1,363 @@
+/*
+ * Copyright (C) 2014 Spreadtrum Communications Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/delay.h>
+#include <linux/export.h>
+#include <linux/irqchip/arm-gic.h>
+#include <linux/input.h>
+
+#include <asm/io.h>
+#include <asm/setup.h>
+#include <asm/mach/time.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach-types.h>
+#include <asm/hardware/cache-l2x0.h>
+#include <asm/localtimer.h>
+#include <linux/of_platform.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/clocksource.h>
+#include <linux/clk-provider.h>
+#include <soc/sprd/hardware.h>
+#include <linux/i2c.h>
+#if (defined(CONFIG_INPUT_LIS3DH_I2C) || defined(CONFIG_INPUT_LIS3DH_I2C_MODULE))
+#include <linux/i2c/lis3dh.h>
+#endif
+#if (defined(CONFIG_INPUT_LTR558_I2C) || defined(CONFIG_INPUT_LTR558_I2C_MODULE))
+#include <linux/i2c/ltr_558als.h>
+#endif
+#if (defined(CONFIG_TOUCHSCREEN_MSG2138) || defined(CONFIG_TOUCHSCREEN_MSG2138_MODULE))
+#include <linux/i2c/msg2138.h>
+#endif
+#include <linux/spi/spi.h>
+#include <linux/gpio.h>
+#include <soc/sprd/board.h>
+#include <soc/sprd/serial_sprd.h>
+#include <soc/sprd/adi.h>
+#include <soc/sprd/adc.h>
+#include <soc/sprd/pinmap.h>
+#include <linux/irq.h>
+#include <linux/input/matrix_keypad.h>
+
+#include <soc/sprd/sci.h>
+#include <soc/sprd/kpd.h>
+#include <soc/sprd/sci_glb_regs.h>
+
+#if (defined(CONFIG_INV_MPU_IIO) || defined(CONFIG_INV_MPU_IIO_MODULE))
+#include <linux/mpu.h>
+#endif
+#if (defined(CONFIG_SENSORS_AK8975) || defined(CONFIG_SENSORS_AK8975_MODULE))
+#include <linux/akm8975.h>
+#endif
+
+
+/* IRQ's for the multi sensor board */
+#define MPUIRQ_GPIO 212
+#include <linux/regulator/consumer.h>
+#include <soc/sprd/regulator.h>
+#if (defined(CONFIG_TOUCHSCREEN_FOCALTECH) || defined(CONFIG_TOUCHSCREEN_FOCALTECH_MODULE))
+#include <linux/i2c/focaltech.h>
+#endif
+
+#if (defined(CONFIG_KEYBOARD_SC) || defined (CONFIG_KEYBOARD_SC_MODULE))
+#include <linux/input/matrix_keypad.h>
+#include <soc/sprd/kpd.h>
+#endif
+#if (defined(CONFIG_KEYBOARD_GPIO) || defined (CONFIG_KEYBOARD_GPIO_MODULE))
+#include <linux/gpio_keys.h>
+#endif
+#if (defined(CONFIG_KEYBOARD_SPRD_EIC) || defined(CONFIG_KEYBOARD_SPRD_EIC_MODULE))
+#include <linux/sprd_eic_keys.h>
+#endif
+#if (defined(CONFIG_BACKLIGHT_SPRD_PWM) || defined(CONFIG_BACKLIGHT_SPRD_PWM_MODULE))
+#include <linux/sprd_pwm_bl.h>
+#endif
+#if (defined(CONFIG_INPUT_HEADSET_SPRD_SC2723) || defined(CONFIG_INPUT_HEADSET_SPRD_SC2723_MODULE))
+#include <linux/headset_sprd_sc2723.h>
+#endif
+extern void bluesleep_setup_uart_port(struct platform_device *uart_dev);
+extern void __init sci_reserve(void);
+extern void __init sci_map_io(void);
+extern void __init sci_init_irq(void);
+extern void __init sci_timer_init(void);
+extern int __init sci_clock_init(void);
+extern int __init sci_regulator_init(void);
+
+int __init __clock_init_early(void)
+{
+#if !defined(CONFIG_ARCH_SCX15)
+	pr_info("ahb ctl0 %08x, ctl2 %0x8 glb aon apb0 %08x aon apb1 %08x clk_en %08x\n",
+		sci_glb_raw_read(REG_AP_AHB_AHB_EB),
+		sci_glb_raw_read(REG_AP_AHB_AHB_RST),
+		sci_glb_raw_read(REG_AON_APB_APB_EB0),
+		sci_glb_raw_read(REG_AON_APB_APB_EB1),
+		sci_glb_raw_read(REG_AON_CLK_PUB_AHB_CFG));
+#endif
+
+	sci_glb_clr(REG_AP_AHB_AHB_EB,
+		BIT_BUSMON2_EB		|
+		BIT_BUSMON1_EB		|
+		BIT_BUSMON0_EB		|
+		BIT_SPINLOCK_EB		|
+#if !defined(CONFIG_ARCH_SCX35L)
+		BIT_GPS_EB		|
+#endif
+		BIT_EMMC_EB		|
+		BIT_SDIO2_EB		|
+		BIT_SDIO1_EB		|
+		BIT_SDIO0_EB		|
+		BIT_DRM_EB		|
+		BIT_NFC_EB		|
+		BIT_DMA_EB		|
+		BIT_USB_EB		|
+#if !defined(CONFIG_ARCH_SCX35L)
+		BIT_GSP_EB		|
+		BIT_DISPC1_EB		|
+#endif
+		0);
+	sci_glb_clr(REG_AP_APB_APB_EB,
+		BIT_INTC3_EB		|
+		BIT_INTC2_EB		|
+		BIT_INTC1_EB		|
+		BIT_IIS1_EB		|
+		BIT_UART2_EB		|
+		BIT_UART0_EB		|
+		BIT_SPI1_EB		|
+		BIT_SPI0_EB		|
+		BIT_IIS0_EB		|
+		BIT_I2C0_EB		|
+		BIT_SPI2_EB		|
+		BIT_UART3_EB		|
+		0);
+	sci_glb_clr(REG_AON_APB_APB_RTC_EB,
+		BIT_KPD_RTC_EB		|
+		BIT_KPD_EB		|
+		BIT_EFUSE_EB		|
+		0);
+
+	sci_glb_clr(REG_AON_APB_APB_EB0,
+		BIT_AUDIF_EB			|
+		BIT_VBC_EB			|
+		BIT_PWM3_EB			|
+		BIT_PWM1_EB			|
+		0);
+	sci_glb_clr(REG_AON_APB_APB_EB1,
+		BIT_AUX1_EB			|
+		BIT_AUX0_EB			|
+		0);
+	printk("sc clock module early init ok\n");
+	return 0;
+}
+
+static inline int __sci_get_chip_id(void)
+{
+	return __raw_readl(CHIP_ID_LOW_REG);
+}
+
+const struct of_device_id of_sprd_default_bus_match_table[] = {
+	{ .compatible = "simple-bus", },
+	{ .compatible = "sprd,adi-bus", },
+	{}
+};
+
+static struct of_dev_auxdata of_sprd_default_bus_lookup[] = {
+	{ .compatible = "sprd,sprd_backlight", .name = "sprd_backlight" },
+#if (defined(CONFIG_BACKLIGHT_SPRD_PWM) || defined(CONFIG_BACKLIGHT_SPRD_PWM_MODULE))
+	{ .compatible = "sprd,sprd_pwm_bl",  .name = "sprd_pwm_bl" },
+#endif
+#if (defined(CONFIG_KEYBOARD_SC) || defined(CONFIG_KEYBOARD_SC_MODULE))
+	{.compatible = "sprd,sci-keypad", .name = "sci-keypad" },
+#endif
+#if (defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE))
+	{.compatible = "gpio-keys", .name = "gpio-keys" },
+#endif
+#if (defined(CONFIG_KEYBOARD_SPRD_EIC) || defined(CONFIG_KEYBOARD_SPRD_EIC_MODULE))
+	{.compatible = "sprd,sprd-eic-keys", .name = "sprd-eic-keys" },
+#endif
+#if (defined(CONFIG_INPUT_HEADSET_SPRD_SC2723) || defined(CONFIG_INPUT_HEADSET_SPRD_SC2723_MODULE))
+	{ .compatible = "sprd,headset_sprd_sc2723",  .name = "headset_sprd_sc2723" },
+#endif
+	{}
+};
+
+struct iotable_sprd io_addr_sprd;
+EXPORT_SYMBOL(io_addr_sprd);
+
+int iotable_build()
+{
+	struct device_node *np;
+	struct resource res;
+
+#define ADD_SPRD_DEVICE(compat, id)			\
+do {							\
+	np = of_find_compatible_node(NULL, NULL, compat);\
+	if (of_can_translate_address(np)) {		\
+		of_address_to_resource(np, 0, &res);	\
+		io_addr_sprd.id.paddr = res.start;	\
+		io_addr_sprd.id.length =		\
+			resource_size(&res);		\
+		io_addr_sprd.id.vaddr =			\
+		ioremap_nocache(res.start, io_addr_sprd.id.length);\
+		pr_debug("sprd io map: phys=%08x virt=%08x size=%08x\n", \
+	io_addr_sprd.id.paddr, io_addr_sprd.id.vaddr, io_addr_sprd.id.length);\
+	}						\
+} while (0)
+#define ADD_SPRD_DEVICE_BY_NAME(name, id)		\
+do {							\
+	np = of_find_node_by_name(NULL, name);		\
+	if (of_can_translate_address(np)) {		\
+		of_address_to_resource(np, 0, &res);	\
+		io_addr_sprd.id.paddr = res.start;	\
+		io_addr_sprd.id.length =		\
+			resource_size(&res);		\
+		io_addr_sprd.id.vaddr =			\
+		ioremap_nocache(res.start, io_addr_sprd.id.length);\
+		pr_debug("sprd io map: phys=%16lx virt=%16lx size=%16lx\n", \
+	io_addr_sprd.id.paddr, io_addr_sprd.id.vaddr, io_addr_sprd.id.length);\
+	}						\
+} while (0)
+	ADD_SPRD_DEVICE("sprd,ahb", AHB);
+	ADD_SPRD_DEVICE("sprd,aonapb", AONAPB);
+	ADD_SPRD_DEVICE("sprd,aonckg", AONCKG);
+	ADD_SPRD_DEVICE("sprd,apbreg", APBREG);
+	ADD_SPRD_DEVICE("sprd,core", CORE);
+	ADD_SPRD_DEVICE("sprd,mmahb", MMAHB);
+	ADD_SPRD_DEVICE("sprd,pmu", PMU);
+	ADD_SPRD_DEVICE("sprd,mmckg", MMCKG);
+	ADD_SPRD_DEVICE("sprd,gpuapb", GPUAPB);
+	ADD_SPRD_DEVICE("sprd,apbckg", APBCKG);
+	ADD_SPRD_DEVICE("sprd,gpuckg", GPUCKG);
+	ADD_SPRD_DEVICE("sprd,int", INT);
+	ADD_SPRD_DEVICE("sprd,intc0", INTC0);
+	ADD_SPRD_DEVICE("sprd,intc1", INTC1);
+	ADD_SPRD_DEVICE("sprd,intc2", INTC2);
+	ADD_SPRD_DEVICE("sprd,intc3", INTC3);
+	ADD_SPRD_DEVICE("sprd,uidefuse", UIDEFUSE);
+	ADD_SPRD_DEVICE("sprd,isp", ISP);
+	ADD_SPRD_DEVICE("sprd,ca7wdg", CA7WDG);
+	ADD_SPRD_DEVICE("sprd,csi2", CSI2);
+	ADD_SPRD_DEVICE("sprd,d-eic-gpio", EIC);
+	ADD_SPRD_DEVICE("sprd,wdg", WDG);
+	ADD_SPRD_DEVICE("sprd,ipi", IPI);
+	ADD_SPRD_DEVICE("sprd,dcam", DCAM);
+	ADD_SPRD_DEVICE("sprd,syscnt", SYSCNT);
+	ADD_SPRD_DEVICE("sprd,dma0", DMA0);
+	ADD_SPRD_DEVICE("sprd,pub", PUB);
+	ADD_SPRD_DEVICE("sprd,pin", PIN);
+	ADD_SPRD_DEVICE("sprd,d-gpio-gpio", GPIO);
+	ADD_SPRD_DEVICE_BY_NAME("hwspinlock0", HWSPINLOCK0);
+	ADD_SPRD_DEVICE_BY_NAME("hwspinlock1", HWSPINLOCK1);
+
+	return 0;
+}
+
+static void __init sc8830_init_machine(void)
+{
+	printk("sci get chip id = 0x%x\n", __sci_get_chip_id());
+
+	sci_adc_init();
+#ifndef CONFIG_MACH_SPX35LFPGA
+	sci_regulator_init();
+#endif
+	of_sprd_default_bus_lookup[0].phys_addr = 0x20300000;
+	of_sprd_default_bus_lookup[1].phys_addr = 0x20400000;
+	of_sprd_default_bus_lookup[2].phys_addr = 0x20500000;
+	of_sprd_default_bus_lookup[3].phys_addr = 0x20600000;
+	of_platform_populate(NULL, of_sprd_default_bus_match_table, of_sprd_default_bus_lookup, NULL);
+}
+
+#ifdef CONFIG_OF
+const struct of_device_id of_sprd_late_bus_match_table[] = {
+	{ .compatible = "sprd,sound", },
+	{}
+};
+#endif
+
+static void __init sc8830_init_late(void)
+{
+	of_platform_populate(of_find_node_by_path("/sprd-audio-devices"),
+				of_sprd_late_bus_match_table, NULL, NULL);
+}
+
+
+extern void __init sci_enable_timer_early(void);
+extern void __init sc_init_chip_id(void);
+
+void __init sprd_init_before_irq(void)
+{
+	iotable_build();
+	sc_init_chip_id();
+	/* earlier init request than irq and timer */
+	__clock_init_early();
+	/*ipi reg init for sipc*/
+	sci_glb_set(REG_AON_APB_APB_EB0, BIT_IPI_EB);
+}
+
+static void __init sc8830_pmu_init(void)
+{
+	__raw_writel(__raw_readl(REG_PMU_APB_PD_MM_TOP_CFG)
+		& ~(BIT_PD_MM_TOP_FORCE_SHUTDOWN),
+		REG_PMU_APB_PD_MM_TOP_CFG);
+
+	while (__raw_readl(REG_PMU_APB_PWR_STATUS0_DBG) & 0xf0000000) {};
+
+	__raw_writel(__raw_readl(REG_PMU_APB_PD_GPU_TOP_CFG)
+		& ~(BIT_PD_GPU_TOP_FORCE_SHUTDOWN),
+		REG_PMU_APB_PD_GPU_TOP_CFG);
+
+	while (__raw_readl(REG_PMU_APB_PWR_STATUS0_DBG) & 0x0f000000) {};
+
+	__raw_writel(__raw_readl(REG_AON_APB_APB_EB0) | BIT_MM_EB |
+		BIT_GPU_EB, REG_AON_APB_APB_EB0);
+	__raw_writel(__raw_readl(REG_MM_AHB_AHB_EB) | BIT_MM_CKG_EB,
+		REG_MM_AHB_AHB_EB);
+	__raw_writel(__raw_readl(REG_MM_AHB_GEN_CKG_CFG)
+		| BIT_MM_MTX_AXI_CKG_EN | BIT_MM_AXI_CKG_EN,
+		REG_MM_AHB_GEN_CKG_CFG);
+	__raw_writel(__raw_readl(REG_MM_CLK_MM_AHB_CFG) | 0x3,
+		REG_MM_CLK_MM_AHB_CFG);
+}
+
+static void sprd_init_time(void)
+{
+	if (of_have_populated_dt()) {
+		sc8830_pmu_init();
+		of_clk_init(NULL);
+		clocksource_of_init();
+	} else {
+		sci_clock_init();
+		sci_enable_timer_early();
+		sci_timer_init();
+	}
+}
+static const char *sprd_boards_compat[] __initdata = {
+	"sprd,sp8835eb",
+	NULL,
+};
+extern struct smp_operations sprd_smp_ops;
+
+MACHINE_START(SCPHONE, "sc8830")
+	.smp		= smp_ops(sprd_smp_ops),
+	.reserve	= sci_reserve,
+	.map_io		= sci_map_io,
+	.init_irq	= sci_init_irq,
+	.init_time	= sprd_init_time,
+	.init_machine	= sc8830_init_machine,
+	.init_late	= sc8830_init_late,
+	.dt_compat	= sprd_boards_compat,
+MACHINE_END
+
diff --git a/arch/arm/mach-sc/board-sp9830aeb_5m_h100.c b/arch/arm/mach-sc/board-sp9830aeb_5m_h100.c
new file mode 100644
index 00000000..3a4cc489
--- /dev/null
+++ b/arch/arm/mach-sc/board-sp9830aeb_5m_h100.c
@@ -0,0 +1,363 @@
+/*
+ * Copyright (C) 2014 Spreadtrum Communications Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/delay.h>
+#include <linux/export.h>
+#include <linux/irqchip/arm-gic.h>
+#include <linux/input.h>
+
+#include <asm/io.h>
+#include <asm/setup.h>
+#include <asm/mach/time.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach-types.h>
+#include <asm/hardware/cache-l2x0.h>
+#include <asm/localtimer.h>
+#include <linux/of_platform.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/clocksource.h>
+#include <linux/clk-provider.h>
+#include <soc/sprd/hardware.h>
+#include <linux/i2c.h>
+#if (defined(CONFIG_INPUT_LIS3DH_I2C) || defined(CONFIG_INPUT_LIS3DH_I2C_MODULE))
+#include <linux/i2c/lis3dh.h>
+#endif
+#if (defined(CONFIG_INPUT_LTR558_I2C) || defined(CONFIG_INPUT_LTR558_I2C_MODULE))
+#include <linux/i2c/ltr_558als.h>
+#endif
+#if (defined(CONFIG_TOUCHSCREEN_MSG2138) || defined(CONFIG_TOUCHSCREEN_MSG2138_MODULE))
+#include <linux/i2c/msg2138.h>
+#endif
+#include <linux/spi/spi.h>
+#include <linux/gpio.h>
+#include <soc/sprd/board.h>
+#include <soc/sprd/serial_sprd.h>
+#include <soc/sprd/adi.h>
+#include <soc/sprd/adc.h>
+#include <soc/sprd/pinmap.h>
+#include <linux/irq.h>
+#include <linux/input/matrix_keypad.h>
+
+#include <soc/sprd/sci.h>
+#include <soc/sprd/kpd.h>
+#include <soc/sprd/sci_glb_regs.h>
+
+#if (defined(CONFIG_INV_MPU_IIO) || defined(CONFIG_INV_MPU_IIO_MODULE))
+#include <linux/mpu.h>
+#endif
+#if (defined(CONFIG_SENSORS_AK8975) || defined(CONFIG_SENSORS_AK8975_MODULE))
+#include <linux/akm8975.h>
+#endif
+
+
+/* IRQ's for the multi sensor board */
+#define MPUIRQ_GPIO 212
+#include <linux/regulator/consumer.h>
+#include <soc/sprd/regulator.h>
+#if (defined(CONFIG_TOUCHSCREEN_FOCALTECH) || defined(CONFIG_TOUCHSCREEN_FOCALTECH_MODULE))
+#include <linux/i2c/focaltech.h>
+#endif
+
+#if (defined(CONFIG_KEYBOARD_SC) || defined (CONFIG_KEYBOARD_SC_MODULE))
+#include <linux/input/matrix_keypad.h>
+#include <soc/sprd/kpd.h>
+#endif
+#if (defined(CONFIG_KEYBOARD_GPIO) || defined (CONFIG_KEYBOARD_GPIO_MODULE))
+#include <linux/gpio_keys.h>
+#endif
+#if (defined(CONFIG_KEYBOARD_SPRD_EIC) || defined(CONFIG_KEYBOARD_SPRD_EIC_MODULE))
+#include <linux/sprd_eic_keys.h>
+#endif
+#if (defined(CONFIG_BACKLIGHT_SPRD_PWM) || defined(CONFIG_BACKLIGHT_SPRD_PWM_MODULE))
+#include <linux/sprd_pwm_bl.h>
+#endif
+#if (defined(CONFIG_INPUT_HEADSET_SPRD_SC2723) || defined(CONFIG_INPUT_HEADSET_SPRD_SC2723_MODULE))
+#include <linux/headset_sprd_sc2723.h>
+#endif
+extern void bluesleep_setup_uart_port(struct platform_device *uart_dev);
+extern void __init sci_reserve(void);
+extern void __init sci_map_io(void);
+extern void __init sci_init_irq(void);
+extern void __init sci_timer_init(void);
+extern int __init sci_clock_init(void);
+extern int __init sci_regulator_init(void);
+
+int __init __clock_init_early(void)
+{
+#if !defined(CONFIG_ARCH_SCX15)
+	pr_info("ahb ctl0 %08x, ctl2 %0x8 glb aon apb0 %08x aon apb1 %08x clk_en %08x\n",
+		sci_glb_raw_read(REG_AP_AHB_AHB_EB),
+		sci_glb_raw_read(REG_AP_AHB_AHB_RST),
+		sci_glb_raw_read(REG_AON_APB_APB_EB0),
+		sci_glb_raw_read(REG_AON_APB_APB_EB1),
+		sci_glb_raw_read(REG_AON_CLK_PUB_AHB_CFG));
+#endif
+
+	sci_glb_clr(REG_AP_AHB_AHB_EB,
+		BIT_BUSMON2_EB		|
+		BIT_BUSMON1_EB		|
+		BIT_BUSMON0_EB		|
+		BIT_SPINLOCK_EB		|
+#if !defined(CONFIG_ARCH_SCX35L)
+		BIT_GPS_EB		|
+#endif
+		BIT_EMMC_EB		|
+		BIT_SDIO2_EB		|
+		BIT_SDIO1_EB		|
+		BIT_SDIO0_EB		|
+		BIT_DRM_EB		|
+		BIT_NFC_EB		|
+		BIT_DMA_EB		|
+		BIT_USB_EB		|
+#if !defined(CONFIG_ARCH_SCX35L)
+		BIT_GSP_EB		|
+		BIT_DISPC1_EB		|
+#endif
+		0);
+	sci_glb_clr(REG_AP_APB_APB_EB,
+		BIT_INTC3_EB		|
+		BIT_INTC2_EB		|
+		BIT_INTC1_EB		|
+		BIT_IIS1_EB		|
+		BIT_UART2_EB		|
+		BIT_UART0_EB		|
+		BIT_SPI1_EB		|
+		BIT_SPI0_EB		|
+		BIT_IIS0_EB		|
+		BIT_I2C0_EB		|
+		BIT_SPI2_EB		|
+		BIT_UART3_EB		|
+		0);
+	sci_glb_clr(REG_AON_APB_APB_RTC_EB,
+		BIT_KPD_RTC_EB		|
+		BIT_KPD_EB		|
+		BIT_EFUSE_EB		|
+		0);
+
+	sci_glb_clr(REG_AON_APB_APB_EB0,
+		BIT_AUDIF_EB			|
+		BIT_VBC_EB			|
+		BIT_PWM3_EB			|
+		BIT_PWM1_EB			|
+		0);
+	sci_glb_clr(REG_AON_APB_APB_EB1,
+		BIT_AUX1_EB			|
+		BIT_AUX0_EB			|
+		0);
+	printk("sc clock module early init ok\n");
+	return 0;
+}
+
+static inline int __sci_get_chip_id(void)
+{
+	return __raw_readl(CHIP_ID_LOW_REG);
+}
+
+const struct of_device_id of_sprd_default_bus_match_table[] = {
+	{ .compatible = "simple-bus", },
+	{ .compatible = "sprd,adi-bus", },
+	{}
+};
+
+static struct of_dev_auxdata of_sprd_default_bus_lookup[] = {
+	{ .compatible = "sprd,sprd_backlight", .name = "sprd_backlight" },
+#if (defined(CONFIG_BACKLIGHT_SPRD_PWM) || defined(CONFIG_BACKLIGHT_SPRD_PWM_MODULE))
+	{ .compatible = "sprd,sprd_pwm_bl",  .name = "sprd_pwm_bl" },
+#endif
+#if (defined(CONFIG_KEYBOARD_SC) || defined(CONFIG_KEYBOARD_SC_MODULE))
+	{.compatible = "sprd,sci-keypad", .name = "sci-keypad" },
+#endif
+#if (defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE))
+	{.compatible = "gpio-keys", .name = "gpio-keys" },
+#endif
+#if (defined(CONFIG_KEYBOARD_SPRD_EIC) || defined(CONFIG_KEYBOARD_SPRD_EIC_MODULE))
+	{.compatible = "sprd,sprd-eic-keys", .name = "sprd-eic-keys" },
+#endif
+#if (defined(CONFIG_INPUT_HEADSET_SPRD_SC2723) || defined(CONFIG_INPUT_HEADSET_SPRD_SC2723_MODULE))
+	{ .compatible = "sprd,headset_sprd_sc2723",  .name = "headset_sprd_sc2723" },
+#endif
+	{}
+};
+
+struct iotable_sprd io_addr_sprd;
+EXPORT_SYMBOL(io_addr_sprd);
+
+int iotable_build()
+{
+	struct device_node *np;
+	struct resource res;
+
+#define ADD_SPRD_DEVICE(compat, id)			\
+do {							\
+	np = of_find_compatible_node(NULL, NULL, compat);\
+	if (of_can_translate_address(np)) {		\
+		of_address_to_resource(np, 0, &res);	\
+		io_addr_sprd.id.paddr = res.start;	\
+		io_addr_sprd.id.length =		\
+			resource_size(&res);		\
+		io_addr_sprd.id.vaddr =			\
+		ioremap_nocache(res.start, io_addr_sprd.id.length);\
+		pr_debug("sprd io map: phys=%08x virt=%08x size=%08x\n", \
+	io_addr_sprd.id.paddr, io_addr_sprd.id.vaddr, io_addr_sprd.id.length);\
+	}						\
+} while (0)
+#define ADD_SPRD_DEVICE_BY_NAME(name, id)		\
+do {							\
+	np = of_find_node_by_name(NULL, name);		\
+	if (of_can_translate_address(np)) {		\
+		of_address_to_resource(np, 0, &res);	\
+		io_addr_sprd.id.paddr = res.start;	\
+		io_addr_sprd.id.length =		\
+			resource_size(&res);		\
+		io_addr_sprd.id.vaddr =			\
+		ioremap_nocache(res.start, io_addr_sprd.id.length);\
+		pr_debug("sprd io map: phys=%16lx virt=%16lx size=%16lx\n", \
+	io_addr_sprd.id.paddr, io_addr_sprd.id.vaddr, io_addr_sprd.id.length);\
+	}						\
+} while (0)
+	ADD_SPRD_DEVICE("sprd,ahb", AHB);
+	ADD_SPRD_DEVICE("sprd,aonapb", AONAPB);
+	ADD_SPRD_DEVICE("sprd,aonckg", AONCKG);
+	ADD_SPRD_DEVICE("sprd,apbreg", APBREG);
+	ADD_SPRD_DEVICE("sprd,core", CORE);
+	ADD_SPRD_DEVICE("sprd,mmahb", MMAHB);
+	ADD_SPRD_DEVICE("sprd,pmu", PMU);
+	ADD_SPRD_DEVICE("sprd,mmckg", MMCKG);
+	ADD_SPRD_DEVICE("sprd,gpuapb", GPUAPB);
+	ADD_SPRD_DEVICE("sprd,apbckg", APBCKG);
+	ADD_SPRD_DEVICE("sprd,gpuckg", GPUCKG);
+	ADD_SPRD_DEVICE("sprd,int", INT);
+	ADD_SPRD_DEVICE("sprd,intc0", INTC0);
+	ADD_SPRD_DEVICE("sprd,intc1", INTC1);
+	ADD_SPRD_DEVICE("sprd,intc2", INTC2);
+	ADD_SPRD_DEVICE("sprd,intc3", INTC3);
+	ADD_SPRD_DEVICE("sprd,uidefuse", UIDEFUSE);
+	ADD_SPRD_DEVICE("sprd,isp", ISP);
+	ADD_SPRD_DEVICE("sprd,ca7wdg", CA7WDG);
+	ADD_SPRD_DEVICE("sprd,csi2", CSI2);
+	ADD_SPRD_DEVICE("sprd,d-eic-gpio", EIC);
+	ADD_SPRD_DEVICE("sprd,wdg", WDG);
+	ADD_SPRD_DEVICE("sprd,ipi", IPI);
+	ADD_SPRD_DEVICE("sprd,dcam", DCAM);
+	ADD_SPRD_DEVICE("sprd,syscnt", SYSCNT);
+	ADD_SPRD_DEVICE("sprd,dma0", DMA0);
+	ADD_SPRD_DEVICE("sprd,pub", PUB);
+	ADD_SPRD_DEVICE("sprd,pin", PIN);
+	ADD_SPRD_DEVICE("sprd,d-gpio-gpio", GPIO);
+	ADD_SPRD_DEVICE_BY_NAME("hwspinlock0", HWSPINLOCK0);
+	ADD_SPRD_DEVICE_BY_NAME("hwspinlock1", HWSPINLOCK1);
+
+	return 0;
+}
+
+static void __init sc8830_init_machine(void)
+{
+	printk("sci get chip id = 0x%x\n", __sci_get_chip_id());
+
+	sci_adc_init();
+#ifndef CONFIG_MACH_SPX35LFPGA
+	sci_regulator_init();
+#endif
+	of_sprd_default_bus_lookup[0].phys_addr = 0x20300000;
+	of_sprd_default_bus_lookup[1].phys_addr = 0x20400000;
+	of_sprd_default_bus_lookup[2].phys_addr = 0x20500000;
+	of_sprd_default_bus_lookup[3].phys_addr = 0x20600000;
+	of_platform_populate(NULL, of_sprd_default_bus_match_table, of_sprd_default_bus_lookup, NULL);
+}
+
+#ifdef CONFIG_OF
+const struct of_device_id of_sprd_late_bus_match_table[] = {
+	{ .compatible = "sprd,sound", },
+	{}
+};
+#endif
+
+static void __init sc8830_init_late(void)
+{
+	of_platform_populate(of_find_node_by_path("/sprd-audio-devices"),
+				of_sprd_late_bus_match_table, NULL, NULL);
+}
+
+
+extern void __init sci_enable_timer_early(void);
+extern void __init sc_init_chip_id(void);
+
+void __init sprd_init_before_irq(void)
+{
+	iotable_build();
+	sc_init_chip_id();
+	/* earlier init request than irq and timer */
+	__clock_init_early();
+	/*ipi reg init for sipc*/
+	sci_glb_set(REG_AON_APB_APB_EB0, BIT_IPI_EB);
+}
+
+static void __init sc8830_pmu_init(void)
+{
+	__raw_writel(__raw_readl(REG_PMU_APB_PD_MM_TOP_CFG)
+		& ~(BIT_PD_MM_TOP_FORCE_SHUTDOWN),
+		REG_PMU_APB_PD_MM_TOP_CFG);
+
+	while (__raw_readl(REG_PMU_APB_PWR_STATUS0_DBG) & 0xf0000000) {};
+
+	__raw_writel(__raw_readl(REG_PMU_APB_PD_GPU_TOP_CFG)
+		& ~(BIT_PD_GPU_TOP_FORCE_SHUTDOWN),
+		REG_PMU_APB_PD_GPU_TOP_CFG);
+
+	while (__raw_readl(REG_PMU_APB_PWR_STATUS0_DBG) & 0x0f000000) {};
+
+	__raw_writel(__raw_readl(REG_AON_APB_APB_EB0) | BIT_MM_EB |
+		BIT_GPU_EB, REG_AON_APB_APB_EB0);
+	__raw_writel(__raw_readl(REG_MM_AHB_AHB_EB) | BIT_MM_CKG_EB,
+		REG_MM_AHB_AHB_EB);
+	__raw_writel(__raw_readl(REG_MM_AHB_GEN_CKG_CFG)
+		| BIT_MM_MTX_AXI_CKG_EN | BIT_MM_AXI_CKG_EN,
+		REG_MM_AHB_GEN_CKG_CFG);
+	__raw_writel(__raw_readl(REG_MM_CLK_MM_AHB_CFG) | 0x3,
+		REG_MM_CLK_MM_AHB_CFG);
+}
+
+static void sprd_init_time(void)
+{
+	if (of_have_populated_dt()) {
+		sc8830_pmu_init();
+		of_clk_init(NULL);
+		clocksource_of_init();
+	} else {
+		sci_clock_init();
+		sci_enable_timer_early();
+		sci_timer_init();
+	}
+}
+static const char *sprd_boards_compat[] __initdata = {
+	"sprd,sp8835eb",
+	NULL,
+};
+extern struct smp_operations sprd_smp_ops;
+
+MACHINE_START(SCPHONE, "sc8830")
+	.smp		= smp_ops(sprd_smp_ops),
+	.reserve	= sci_reserve,
+	.map_io		= sci_map_io,
+	.init_irq	= sci_init_irq,
+	.init_time	= sprd_init_time,
+	.init_machine	= sc8830_init_machine,
+	.init_late	= sc8830_init_late,
+	.dt_compat	= sprd_boards_compat,
+MACHINE_END
+
diff --git a/arch/arm/mach-sc/board-sp9830aec_4m_h100.c b/arch/arm/mach-sc/board-sp9830aec_4m_h100.c
new file mode 100644
index 00000000..3a4cc489
--- /dev/null
+++ b/arch/arm/mach-sc/board-sp9830aec_4m_h100.c
@@ -0,0 +1,363 @@
+/*
+ * Copyright (C) 2014 Spreadtrum Communications Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/delay.h>
+#include <linux/export.h>
+#include <linux/irqchip/arm-gic.h>
+#include <linux/input.h>
+
+#include <asm/io.h>
+#include <asm/setup.h>
+#include <asm/mach/time.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach-types.h>
+#include <asm/hardware/cache-l2x0.h>
+#include <asm/localtimer.h>
+#include <linux/of_platform.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/clocksource.h>
+#include <linux/clk-provider.h>
+#include <soc/sprd/hardware.h>
+#include <linux/i2c.h>
+#if (defined(CONFIG_INPUT_LIS3DH_I2C) || defined(CONFIG_INPUT_LIS3DH_I2C_MODULE))
+#include <linux/i2c/lis3dh.h>
+#endif
+#if (defined(CONFIG_INPUT_LTR558_I2C) || defined(CONFIG_INPUT_LTR558_I2C_MODULE))
+#include <linux/i2c/ltr_558als.h>
+#endif
+#if (defined(CONFIG_TOUCHSCREEN_MSG2138) || defined(CONFIG_TOUCHSCREEN_MSG2138_MODULE))
+#include <linux/i2c/msg2138.h>
+#endif
+#include <linux/spi/spi.h>
+#include <linux/gpio.h>
+#include <soc/sprd/board.h>
+#include <soc/sprd/serial_sprd.h>
+#include <soc/sprd/adi.h>
+#include <soc/sprd/adc.h>
+#include <soc/sprd/pinmap.h>
+#include <linux/irq.h>
+#include <linux/input/matrix_keypad.h>
+
+#include <soc/sprd/sci.h>
+#include <soc/sprd/kpd.h>
+#include <soc/sprd/sci_glb_regs.h>
+
+#if (defined(CONFIG_INV_MPU_IIO) || defined(CONFIG_INV_MPU_IIO_MODULE))
+#include <linux/mpu.h>
+#endif
+#if (defined(CONFIG_SENSORS_AK8975) || defined(CONFIG_SENSORS_AK8975_MODULE))
+#include <linux/akm8975.h>
+#endif
+
+
+/* IRQ's for the multi sensor board */
+#define MPUIRQ_GPIO 212
+#include <linux/regulator/consumer.h>
+#include <soc/sprd/regulator.h>
+#if (defined(CONFIG_TOUCHSCREEN_FOCALTECH) || defined(CONFIG_TOUCHSCREEN_FOCALTECH_MODULE))
+#include <linux/i2c/focaltech.h>
+#endif
+
+#if (defined(CONFIG_KEYBOARD_SC) || defined (CONFIG_KEYBOARD_SC_MODULE))
+#include <linux/input/matrix_keypad.h>
+#include <soc/sprd/kpd.h>
+#endif
+#if (defined(CONFIG_KEYBOARD_GPIO) || defined (CONFIG_KEYBOARD_GPIO_MODULE))
+#include <linux/gpio_keys.h>
+#endif
+#if (defined(CONFIG_KEYBOARD_SPRD_EIC) || defined(CONFIG_KEYBOARD_SPRD_EIC_MODULE))
+#include <linux/sprd_eic_keys.h>
+#endif
+#if (defined(CONFIG_BACKLIGHT_SPRD_PWM) || defined(CONFIG_BACKLIGHT_SPRD_PWM_MODULE))
+#include <linux/sprd_pwm_bl.h>
+#endif
+#if (defined(CONFIG_INPUT_HEADSET_SPRD_SC2723) || defined(CONFIG_INPUT_HEADSET_SPRD_SC2723_MODULE))
+#include <linux/headset_sprd_sc2723.h>
+#endif
+extern void bluesleep_setup_uart_port(struct platform_device *uart_dev);
+extern void __init sci_reserve(void);
+extern void __init sci_map_io(void);
+extern void __init sci_init_irq(void);
+extern void __init sci_timer_init(void);
+extern int __init sci_clock_init(void);
+extern int __init sci_regulator_init(void);
+
+int __init __clock_init_early(void)
+{
+#if !defined(CONFIG_ARCH_SCX15)
+	pr_info("ahb ctl0 %08x, ctl2 %0x8 glb aon apb0 %08x aon apb1 %08x clk_en %08x\n",
+		sci_glb_raw_read(REG_AP_AHB_AHB_EB),
+		sci_glb_raw_read(REG_AP_AHB_AHB_RST),
+		sci_glb_raw_read(REG_AON_APB_APB_EB0),
+		sci_glb_raw_read(REG_AON_APB_APB_EB1),
+		sci_glb_raw_read(REG_AON_CLK_PUB_AHB_CFG));
+#endif
+
+	sci_glb_clr(REG_AP_AHB_AHB_EB,
+		BIT_BUSMON2_EB		|
+		BIT_BUSMON1_EB		|
+		BIT_BUSMON0_EB		|
+		BIT_SPINLOCK_EB		|
+#if !defined(CONFIG_ARCH_SCX35L)
+		BIT_GPS_EB		|
+#endif
+		BIT_EMMC_EB		|
+		BIT_SDIO2_EB		|
+		BIT_SDIO1_EB		|
+		BIT_SDIO0_EB		|
+		BIT_DRM_EB		|
+		BIT_NFC_EB		|
+		BIT_DMA_EB		|
+		BIT_USB_EB		|
+#if !defined(CONFIG_ARCH_SCX35L)
+		BIT_GSP_EB		|
+		BIT_DISPC1_EB		|
+#endif
+		0);
+	sci_glb_clr(REG_AP_APB_APB_EB,
+		BIT_INTC3_EB		|
+		BIT_INTC2_EB		|
+		BIT_INTC1_EB		|
+		BIT_IIS1_EB		|
+		BIT_UART2_EB		|
+		BIT_UART0_EB		|
+		BIT_SPI1_EB		|
+		BIT_SPI0_EB		|
+		BIT_IIS0_EB		|
+		BIT_I2C0_EB		|
+		BIT_SPI2_EB		|
+		BIT_UART3_EB		|
+		0);
+	sci_glb_clr(REG_AON_APB_APB_RTC_EB,
+		BIT_KPD_RTC_EB		|
+		BIT_KPD_EB		|
+		BIT_EFUSE_EB		|
+		0);
+
+	sci_glb_clr(REG_AON_APB_APB_EB0,
+		BIT_AUDIF_EB			|
+		BIT_VBC_EB			|
+		BIT_PWM3_EB			|
+		BIT_PWM1_EB			|
+		0);
+	sci_glb_clr(REG_AON_APB_APB_EB1,
+		BIT_AUX1_EB			|
+		BIT_AUX0_EB			|
+		0);
+	printk("sc clock module early init ok\n");
+	return 0;
+}
+
+static inline int __sci_get_chip_id(void)
+{
+	return __raw_readl(CHIP_ID_LOW_REG);
+}
+
+const struct of_device_id of_sprd_default_bus_match_table[] = {
+	{ .compatible = "simple-bus", },
+	{ .compatible = "sprd,adi-bus", },
+	{}
+};
+
+static struct of_dev_auxdata of_sprd_default_bus_lookup[] = {
+	{ .compatible = "sprd,sprd_backlight", .name = "sprd_backlight" },
+#if (defined(CONFIG_BACKLIGHT_SPRD_PWM) || defined(CONFIG_BACKLIGHT_SPRD_PWM_MODULE))
+	{ .compatible = "sprd,sprd_pwm_bl",  .name = "sprd_pwm_bl" },
+#endif
+#if (defined(CONFIG_KEYBOARD_SC) || defined(CONFIG_KEYBOARD_SC_MODULE))
+	{.compatible = "sprd,sci-keypad", .name = "sci-keypad" },
+#endif
+#if (defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE))
+	{.compatible = "gpio-keys", .name = "gpio-keys" },
+#endif
+#if (defined(CONFIG_KEYBOARD_SPRD_EIC) || defined(CONFIG_KEYBOARD_SPRD_EIC_MODULE))
+	{.compatible = "sprd,sprd-eic-keys", .name = "sprd-eic-keys" },
+#endif
+#if (defined(CONFIG_INPUT_HEADSET_SPRD_SC2723) || defined(CONFIG_INPUT_HEADSET_SPRD_SC2723_MODULE))
+	{ .compatible = "sprd,headset_sprd_sc2723",  .name = "headset_sprd_sc2723" },
+#endif
+	{}
+};
+
+struct iotable_sprd io_addr_sprd;
+EXPORT_SYMBOL(io_addr_sprd);
+
+int iotable_build()
+{
+	struct device_node *np;
+	struct resource res;
+
+#define ADD_SPRD_DEVICE(compat, id)			\
+do {							\
+	np = of_find_compatible_node(NULL, NULL, compat);\
+	if (of_can_translate_address(np)) {		\
+		of_address_to_resource(np, 0, &res);	\
+		io_addr_sprd.id.paddr = res.start;	\
+		io_addr_sprd.id.length =		\
+			resource_size(&res);		\
+		io_addr_sprd.id.vaddr =			\
+		ioremap_nocache(res.start, io_addr_sprd.id.length);\
+		pr_debug("sprd io map: phys=%08x virt=%08x size=%08x\n", \
+	io_addr_sprd.id.paddr, io_addr_sprd.id.vaddr, io_addr_sprd.id.length);\
+	}						\
+} while (0)
+#define ADD_SPRD_DEVICE_BY_NAME(name, id)		\
+do {							\
+	np = of_find_node_by_name(NULL, name);		\
+	if (of_can_translate_address(np)) {		\
+		of_address_to_resource(np, 0, &res);	\
+		io_addr_sprd.id.paddr = res.start;	\
+		io_addr_sprd.id.length =		\
+			resource_size(&res);		\
+		io_addr_sprd.id.vaddr =			\
+		ioremap_nocache(res.start, io_addr_sprd.id.length);\
+		pr_debug("sprd io map: phys=%16lx virt=%16lx size=%16lx\n", \
+	io_addr_sprd.id.paddr, io_addr_sprd.id.vaddr, io_addr_sprd.id.length);\
+	}						\
+} while (0)
+	ADD_SPRD_DEVICE("sprd,ahb", AHB);
+	ADD_SPRD_DEVICE("sprd,aonapb", AONAPB);
+	ADD_SPRD_DEVICE("sprd,aonckg", AONCKG);
+	ADD_SPRD_DEVICE("sprd,apbreg", APBREG);
+	ADD_SPRD_DEVICE("sprd,core", CORE);
+	ADD_SPRD_DEVICE("sprd,mmahb", MMAHB);
+	ADD_SPRD_DEVICE("sprd,pmu", PMU);
+	ADD_SPRD_DEVICE("sprd,mmckg", MMCKG);
+	ADD_SPRD_DEVICE("sprd,gpuapb", GPUAPB);
+	ADD_SPRD_DEVICE("sprd,apbckg", APBCKG);
+	ADD_SPRD_DEVICE("sprd,gpuckg", GPUCKG);
+	ADD_SPRD_DEVICE("sprd,int", INT);
+	ADD_SPRD_DEVICE("sprd,intc0", INTC0);
+	ADD_SPRD_DEVICE("sprd,intc1", INTC1);
+	ADD_SPRD_DEVICE("sprd,intc2", INTC2);
+	ADD_SPRD_DEVICE("sprd,intc3", INTC3);
+	ADD_SPRD_DEVICE("sprd,uidefuse", UIDEFUSE);
+	ADD_SPRD_DEVICE("sprd,isp", ISP);
+	ADD_SPRD_DEVICE("sprd,ca7wdg", CA7WDG);
+	ADD_SPRD_DEVICE("sprd,csi2", CSI2);
+	ADD_SPRD_DEVICE("sprd,d-eic-gpio", EIC);
+	ADD_SPRD_DEVICE("sprd,wdg", WDG);
+	ADD_SPRD_DEVICE("sprd,ipi", IPI);
+	ADD_SPRD_DEVICE("sprd,dcam", DCAM);
+	ADD_SPRD_DEVICE("sprd,syscnt", SYSCNT);
+	ADD_SPRD_DEVICE("sprd,dma0", DMA0);
+	ADD_SPRD_DEVICE("sprd,pub", PUB);
+	ADD_SPRD_DEVICE("sprd,pin", PIN);
+	ADD_SPRD_DEVICE("sprd,d-gpio-gpio", GPIO);
+	ADD_SPRD_DEVICE_BY_NAME("hwspinlock0", HWSPINLOCK0);
+	ADD_SPRD_DEVICE_BY_NAME("hwspinlock1", HWSPINLOCK1);
+
+	return 0;
+}
+
+static void __init sc8830_init_machine(void)
+{
+	printk("sci get chip id = 0x%x\n", __sci_get_chip_id());
+
+	sci_adc_init();
+#ifndef CONFIG_MACH_SPX35LFPGA
+	sci_regulator_init();
+#endif
+	of_sprd_default_bus_lookup[0].phys_addr = 0x20300000;
+	of_sprd_default_bus_lookup[1].phys_addr = 0x20400000;
+	of_sprd_default_bus_lookup[2].phys_addr = 0x20500000;
+	of_sprd_default_bus_lookup[3].phys_addr = 0x20600000;
+	of_platform_populate(NULL, of_sprd_default_bus_match_table, of_sprd_default_bus_lookup, NULL);
+}
+
+#ifdef CONFIG_OF
+const struct of_device_id of_sprd_late_bus_match_table[] = {
+	{ .compatible = "sprd,sound", },
+	{}
+};
+#endif
+
+static void __init sc8830_init_late(void)
+{
+	of_platform_populate(of_find_node_by_path("/sprd-audio-devices"),
+				of_sprd_late_bus_match_table, NULL, NULL);
+}
+
+
+extern void __init sci_enable_timer_early(void);
+extern void __init sc_init_chip_id(void);
+
+void __init sprd_init_before_irq(void)
+{
+	iotable_build();
+	sc_init_chip_id();
+	/* earlier init request than irq and timer */
+	__clock_init_early();
+	/*ipi reg init for sipc*/
+	sci_glb_set(REG_AON_APB_APB_EB0, BIT_IPI_EB);
+}
+
+static void __init sc8830_pmu_init(void)
+{
+	__raw_writel(__raw_readl(REG_PMU_APB_PD_MM_TOP_CFG)
+		& ~(BIT_PD_MM_TOP_FORCE_SHUTDOWN),
+		REG_PMU_APB_PD_MM_TOP_CFG);
+
+	while (__raw_readl(REG_PMU_APB_PWR_STATUS0_DBG) & 0xf0000000) {};
+
+	__raw_writel(__raw_readl(REG_PMU_APB_PD_GPU_TOP_CFG)
+		& ~(BIT_PD_GPU_TOP_FORCE_SHUTDOWN),
+		REG_PMU_APB_PD_GPU_TOP_CFG);
+
+	while (__raw_readl(REG_PMU_APB_PWR_STATUS0_DBG) & 0x0f000000) {};
+
+	__raw_writel(__raw_readl(REG_AON_APB_APB_EB0) | BIT_MM_EB |
+		BIT_GPU_EB, REG_AON_APB_APB_EB0);
+	__raw_writel(__raw_readl(REG_MM_AHB_AHB_EB) | BIT_MM_CKG_EB,
+		REG_MM_AHB_AHB_EB);
+	__raw_writel(__raw_readl(REG_MM_AHB_GEN_CKG_CFG)
+		| BIT_MM_MTX_AXI_CKG_EN | BIT_MM_AXI_CKG_EN,
+		REG_MM_AHB_GEN_CKG_CFG);
+	__raw_writel(__raw_readl(REG_MM_CLK_MM_AHB_CFG) | 0x3,
+		REG_MM_CLK_MM_AHB_CFG);
+}
+
+static void sprd_init_time(void)
+{
+	if (of_have_populated_dt()) {
+		sc8830_pmu_init();
+		of_clk_init(NULL);
+		clocksource_of_init();
+	} else {
+		sci_clock_init();
+		sci_enable_timer_early();
+		sci_timer_init();
+	}
+}
+static const char *sprd_boards_compat[] __initdata = {
+	"sprd,sp8835eb",
+	NULL,
+};
+extern struct smp_operations sprd_smp_ops;
+
+MACHINE_START(SCPHONE, "sc8830")
+	.smp		= smp_ops(sprd_smp_ops),
+	.reserve	= sci_reserve,
+	.map_io		= sci_map_io,
+	.init_irq	= sci_init_irq,
+	.init_time	= sprd_init_time,
+	.init_machine	= sc8830_init_machine,
+	.init_late	= sc8830_init_late,
+	.dt_compat	= sprd_boards_compat,
+MACHINE_END
+
diff --git a/arch/arm/mach-sc/board-sp9830iea_4m_h100.c b/arch/arm/mach-sc/board-sp9830iea_4m_h100.c
new file mode 100644
index 00000000..3a4cc489
--- /dev/null
+++ b/arch/arm/mach-sc/board-sp9830iea_4m_h100.c
@@ -0,0 +1,363 @@
+/*
+ * Copyright (C) 2014 Spreadtrum Communications Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/delay.h>
+#include <linux/export.h>
+#include <linux/irqchip/arm-gic.h>
+#include <linux/input.h>
+
+#include <asm/io.h>
+#include <asm/setup.h>
+#include <asm/mach/time.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach-types.h>
+#include <asm/hardware/cache-l2x0.h>
+#include <asm/localtimer.h>
+#include <linux/of_platform.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/clocksource.h>
+#include <linux/clk-provider.h>
+#include <soc/sprd/hardware.h>
+#include <linux/i2c.h>
+#if (defined(CONFIG_INPUT_LIS3DH_I2C) || defined(CONFIG_INPUT_LIS3DH_I2C_MODULE))
+#include <linux/i2c/lis3dh.h>
+#endif
+#if (defined(CONFIG_INPUT_LTR558_I2C) || defined(CONFIG_INPUT_LTR558_I2C_MODULE))
+#include <linux/i2c/ltr_558als.h>
+#endif
+#if (defined(CONFIG_TOUCHSCREEN_MSG2138) || defined(CONFIG_TOUCHSCREEN_MSG2138_MODULE))
+#include <linux/i2c/msg2138.h>
+#endif
+#include <linux/spi/spi.h>
+#include <linux/gpio.h>
+#include <soc/sprd/board.h>
+#include <soc/sprd/serial_sprd.h>
+#include <soc/sprd/adi.h>
+#include <soc/sprd/adc.h>
+#include <soc/sprd/pinmap.h>
+#include <linux/irq.h>
+#include <linux/input/matrix_keypad.h>
+
+#include <soc/sprd/sci.h>
+#include <soc/sprd/kpd.h>
+#include <soc/sprd/sci_glb_regs.h>
+
+#if (defined(CONFIG_INV_MPU_IIO) || defined(CONFIG_INV_MPU_IIO_MODULE))
+#include <linux/mpu.h>
+#endif
+#if (defined(CONFIG_SENSORS_AK8975) || defined(CONFIG_SENSORS_AK8975_MODULE))
+#include <linux/akm8975.h>
+#endif
+
+
+/* IRQ's for the multi sensor board */
+#define MPUIRQ_GPIO 212
+#include <linux/regulator/consumer.h>
+#include <soc/sprd/regulator.h>
+#if (defined(CONFIG_TOUCHSCREEN_FOCALTECH) || defined(CONFIG_TOUCHSCREEN_FOCALTECH_MODULE))
+#include <linux/i2c/focaltech.h>
+#endif
+
+#if (defined(CONFIG_KEYBOARD_SC) || defined (CONFIG_KEYBOARD_SC_MODULE))
+#include <linux/input/matrix_keypad.h>
+#include <soc/sprd/kpd.h>
+#endif
+#if (defined(CONFIG_KEYBOARD_GPIO) || defined (CONFIG_KEYBOARD_GPIO_MODULE))
+#include <linux/gpio_keys.h>
+#endif
+#if (defined(CONFIG_KEYBOARD_SPRD_EIC) || defined(CONFIG_KEYBOARD_SPRD_EIC_MODULE))
+#include <linux/sprd_eic_keys.h>
+#endif
+#if (defined(CONFIG_BACKLIGHT_SPRD_PWM) || defined(CONFIG_BACKLIGHT_SPRD_PWM_MODULE))
+#include <linux/sprd_pwm_bl.h>
+#endif
+#if (defined(CONFIG_INPUT_HEADSET_SPRD_SC2723) || defined(CONFIG_INPUT_HEADSET_SPRD_SC2723_MODULE))
+#include <linux/headset_sprd_sc2723.h>
+#endif
+extern void bluesleep_setup_uart_port(struct platform_device *uart_dev);
+extern void __init sci_reserve(void);
+extern void __init sci_map_io(void);
+extern void __init sci_init_irq(void);
+extern void __init sci_timer_init(void);
+extern int __init sci_clock_init(void);
+extern int __init sci_regulator_init(void);
+
+int __init __clock_init_early(void)
+{
+#if !defined(CONFIG_ARCH_SCX15)
+	pr_info("ahb ctl0 %08x, ctl2 %0x8 glb aon apb0 %08x aon apb1 %08x clk_en %08x\n",
+		sci_glb_raw_read(REG_AP_AHB_AHB_EB),
+		sci_glb_raw_read(REG_AP_AHB_AHB_RST),
+		sci_glb_raw_read(REG_AON_APB_APB_EB0),
+		sci_glb_raw_read(REG_AON_APB_APB_EB1),
+		sci_glb_raw_read(REG_AON_CLK_PUB_AHB_CFG));
+#endif
+
+	sci_glb_clr(REG_AP_AHB_AHB_EB,
+		BIT_BUSMON2_EB		|
+		BIT_BUSMON1_EB		|
+		BIT_BUSMON0_EB		|
+		BIT_SPINLOCK_EB		|
+#if !defined(CONFIG_ARCH_SCX35L)
+		BIT_GPS_EB		|
+#endif
+		BIT_EMMC_EB		|
+		BIT_SDIO2_EB		|
+		BIT_SDIO1_EB		|
+		BIT_SDIO0_EB		|
+		BIT_DRM_EB		|
+		BIT_NFC_EB		|
+		BIT_DMA_EB		|
+		BIT_USB_EB		|
+#if !defined(CONFIG_ARCH_SCX35L)
+		BIT_GSP_EB		|
+		BIT_DISPC1_EB		|
+#endif
+		0);
+	sci_glb_clr(REG_AP_APB_APB_EB,
+		BIT_INTC3_EB		|
+		BIT_INTC2_EB		|
+		BIT_INTC1_EB		|
+		BIT_IIS1_EB		|
+		BIT_UART2_EB		|
+		BIT_UART0_EB		|
+		BIT_SPI1_EB		|
+		BIT_SPI0_EB		|
+		BIT_IIS0_EB		|
+		BIT_I2C0_EB		|
+		BIT_SPI2_EB		|
+		BIT_UART3_EB		|
+		0);
+	sci_glb_clr(REG_AON_APB_APB_RTC_EB,
+		BIT_KPD_RTC_EB		|
+		BIT_KPD_EB		|
+		BIT_EFUSE_EB		|
+		0);
+
+	sci_glb_clr(REG_AON_APB_APB_EB0,
+		BIT_AUDIF_EB			|
+		BIT_VBC_EB			|
+		BIT_PWM3_EB			|
+		BIT_PWM1_EB			|
+		0);
+	sci_glb_clr(REG_AON_APB_APB_EB1,
+		BIT_AUX1_EB			|
+		BIT_AUX0_EB			|
+		0);
+	printk("sc clock module early init ok\n");
+	return 0;
+}
+
+static inline int __sci_get_chip_id(void)
+{
+	return __raw_readl(CHIP_ID_LOW_REG);
+}
+
+const struct of_device_id of_sprd_default_bus_match_table[] = {
+	{ .compatible = "simple-bus", },
+	{ .compatible = "sprd,adi-bus", },
+	{}
+};
+
+static struct of_dev_auxdata of_sprd_default_bus_lookup[] = {
+	{ .compatible = "sprd,sprd_backlight", .name = "sprd_backlight" },
+#if (defined(CONFIG_BACKLIGHT_SPRD_PWM) || defined(CONFIG_BACKLIGHT_SPRD_PWM_MODULE))
+	{ .compatible = "sprd,sprd_pwm_bl",  .name = "sprd_pwm_bl" },
+#endif
+#if (defined(CONFIG_KEYBOARD_SC) || defined(CONFIG_KEYBOARD_SC_MODULE))
+	{.compatible = "sprd,sci-keypad", .name = "sci-keypad" },
+#endif
+#if (defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE))
+	{.compatible = "gpio-keys", .name = "gpio-keys" },
+#endif
+#if (defined(CONFIG_KEYBOARD_SPRD_EIC) || defined(CONFIG_KEYBOARD_SPRD_EIC_MODULE))
+	{.compatible = "sprd,sprd-eic-keys", .name = "sprd-eic-keys" },
+#endif
+#if (defined(CONFIG_INPUT_HEADSET_SPRD_SC2723) || defined(CONFIG_INPUT_HEADSET_SPRD_SC2723_MODULE))
+	{ .compatible = "sprd,headset_sprd_sc2723",  .name = "headset_sprd_sc2723" },
+#endif
+	{}
+};
+
+struct iotable_sprd io_addr_sprd;
+EXPORT_SYMBOL(io_addr_sprd);
+
+int iotable_build()
+{
+	struct device_node *np;
+	struct resource res;
+
+#define ADD_SPRD_DEVICE(compat, id)			\
+do {							\
+	np = of_find_compatible_node(NULL, NULL, compat);\
+	if (of_can_translate_address(np)) {		\
+		of_address_to_resource(np, 0, &res);	\
+		io_addr_sprd.id.paddr = res.start;	\
+		io_addr_sprd.id.length =		\
+			resource_size(&res);		\
+		io_addr_sprd.id.vaddr =			\
+		ioremap_nocache(res.start, io_addr_sprd.id.length);\
+		pr_debug("sprd io map: phys=%08x virt=%08x size=%08x\n", \
+	io_addr_sprd.id.paddr, io_addr_sprd.id.vaddr, io_addr_sprd.id.length);\
+	}						\
+} while (0)
+#define ADD_SPRD_DEVICE_BY_NAME(name, id)		\
+do {							\
+	np = of_find_node_by_name(NULL, name);		\
+	if (of_can_translate_address(np)) {		\
+		of_address_to_resource(np, 0, &res);	\
+		io_addr_sprd.id.paddr = res.start;	\
+		io_addr_sprd.id.length =		\
+			resource_size(&res);		\
+		io_addr_sprd.id.vaddr =			\
+		ioremap_nocache(res.start, io_addr_sprd.id.length);\
+		pr_debug("sprd io map: phys=%16lx virt=%16lx size=%16lx\n", \
+	io_addr_sprd.id.paddr, io_addr_sprd.id.vaddr, io_addr_sprd.id.length);\
+	}						\
+} while (0)
+	ADD_SPRD_DEVICE("sprd,ahb", AHB);
+	ADD_SPRD_DEVICE("sprd,aonapb", AONAPB);
+	ADD_SPRD_DEVICE("sprd,aonckg", AONCKG);
+	ADD_SPRD_DEVICE("sprd,apbreg", APBREG);
+	ADD_SPRD_DEVICE("sprd,core", CORE);
+	ADD_SPRD_DEVICE("sprd,mmahb", MMAHB);
+	ADD_SPRD_DEVICE("sprd,pmu", PMU);
+	ADD_SPRD_DEVICE("sprd,mmckg", MMCKG);
+	ADD_SPRD_DEVICE("sprd,gpuapb", GPUAPB);
+	ADD_SPRD_DEVICE("sprd,apbckg", APBCKG);
+	ADD_SPRD_DEVICE("sprd,gpuckg", GPUCKG);
+	ADD_SPRD_DEVICE("sprd,int", INT);
+	ADD_SPRD_DEVICE("sprd,intc0", INTC0);
+	ADD_SPRD_DEVICE("sprd,intc1", INTC1);
+	ADD_SPRD_DEVICE("sprd,intc2", INTC2);
+	ADD_SPRD_DEVICE("sprd,intc3", INTC3);
+	ADD_SPRD_DEVICE("sprd,uidefuse", UIDEFUSE);
+	ADD_SPRD_DEVICE("sprd,isp", ISP);
+	ADD_SPRD_DEVICE("sprd,ca7wdg", CA7WDG);
+	ADD_SPRD_DEVICE("sprd,csi2", CSI2);
+	ADD_SPRD_DEVICE("sprd,d-eic-gpio", EIC);
+	ADD_SPRD_DEVICE("sprd,wdg", WDG);
+	ADD_SPRD_DEVICE("sprd,ipi", IPI);
+	ADD_SPRD_DEVICE("sprd,dcam", DCAM);
+	ADD_SPRD_DEVICE("sprd,syscnt", SYSCNT);
+	ADD_SPRD_DEVICE("sprd,dma0", DMA0);
+	ADD_SPRD_DEVICE("sprd,pub", PUB);
+	ADD_SPRD_DEVICE("sprd,pin", PIN);
+	ADD_SPRD_DEVICE("sprd,d-gpio-gpio", GPIO);
+	ADD_SPRD_DEVICE_BY_NAME("hwspinlock0", HWSPINLOCK0);
+	ADD_SPRD_DEVICE_BY_NAME("hwspinlock1", HWSPINLOCK1);
+
+	return 0;
+}
+
+static void __init sc8830_init_machine(void)
+{
+	printk("sci get chip id = 0x%x\n", __sci_get_chip_id());
+
+	sci_adc_init();
+#ifndef CONFIG_MACH_SPX35LFPGA
+	sci_regulator_init();
+#endif
+	of_sprd_default_bus_lookup[0].phys_addr = 0x20300000;
+	of_sprd_default_bus_lookup[1].phys_addr = 0x20400000;
+	of_sprd_default_bus_lookup[2].phys_addr = 0x20500000;
+	of_sprd_default_bus_lookup[3].phys_addr = 0x20600000;
+	of_platform_populate(NULL, of_sprd_default_bus_match_table, of_sprd_default_bus_lookup, NULL);
+}
+
+#ifdef CONFIG_OF
+const struct of_device_id of_sprd_late_bus_match_table[] = {
+	{ .compatible = "sprd,sound", },
+	{}
+};
+#endif
+
+static void __init sc8830_init_late(void)
+{
+	of_platform_populate(of_find_node_by_path("/sprd-audio-devices"),
+				of_sprd_late_bus_match_table, NULL, NULL);
+}
+
+
+extern void __init sci_enable_timer_early(void);
+extern void __init sc_init_chip_id(void);
+
+void __init sprd_init_before_irq(void)
+{
+	iotable_build();
+	sc_init_chip_id();
+	/* earlier init request than irq and timer */
+	__clock_init_early();
+	/*ipi reg init for sipc*/
+	sci_glb_set(REG_AON_APB_APB_EB0, BIT_IPI_EB);
+}
+
+static void __init sc8830_pmu_init(void)
+{
+	__raw_writel(__raw_readl(REG_PMU_APB_PD_MM_TOP_CFG)
+		& ~(BIT_PD_MM_TOP_FORCE_SHUTDOWN),
+		REG_PMU_APB_PD_MM_TOP_CFG);
+
+	while (__raw_readl(REG_PMU_APB_PWR_STATUS0_DBG) & 0xf0000000) {};
+
+	__raw_writel(__raw_readl(REG_PMU_APB_PD_GPU_TOP_CFG)
+		& ~(BIT_PD_GPU_TOP_FORCE_SHUTDOWN),
+		REG_PMU_APB_PD_GPU_TOP_CFG);
+
+	while (__raw_readl(REG_PMU_APB_PWR_STATUS0_DBG) & 0x0f000000) {};
+
+	__raw_writel(__raw_readl(REG_AON_APB_APB_EB0) | BIT_MM_EB |
+		BIT_GPU_EB, REG_AON_APB_APB_EB0);
+	__raw_writel(__raw_readl(REG_MM_AHB_AHB_EB) | BIT_MM_CKG_EB,
+		REG_MM_AHB_AHB_EB);
+	__raw_writel(__raw_readl(REG_MM_AHB_GEN_CKG_CFG)
+		| BIT_MM_MTX_AXI_CKG_EN | BIT_MM_AXI_CKG_EN,
+		REG_MM_AHB_GEN_CKG_CFG);
+	__raw_writel(__raw_readl(REG_MM_CLK_MM_AHB_CFG) | 0x3,
+		REG_MM_CLK_MM_AHB_CFG);
+}
+
+static void sprd_init_time(void)
+{
+	if (of_have_populated_dt()) {
+		sc8830_pmu_init();
+		of_clk_init(NULL);
+		clocksource_of_init();
+	} else {
+		sci_clock_init();
+		sci_enable_timer_early();
+		sci_timer_init();
+	}
+}
+static const char *sprd_boards_compat[] __initdata = {
+	"sprd,sp8835eb",
+	NULL,
+};
+extern struct smp_operations sprd_smp_ops;
+
+MACHINE_START(SCPHONE, "sc8830")
+	.smp		= smp_ops(sprd_smp_ops),
+	.reserve	= sci_reserve,
+	.map_io		= sci_map_io,
+	.init_irq	= sci_init_irq,
+	.init_time	= sprd_init_time,
+	.init_machine	= sc8830_init_machine,
+	.init_late	= sc8830_init_late,
+	.dt_compat	= sprd_boards_compat,
+MACHINE_END
+
diff --git a/arch/arm/mach-sc/board-sp9830iea_5m_h100.c b/arch/arm/mach-sc/board-sp9830iea_5m_h100.c
new file mode 100644
index 00000000..d3fe46f9
--- /dev/null
+++ b/arch/arm/mach-sc/board-sp9830iea_5m_h100.c
@@ -0,0 +1,368 @@
+/*
+ * Copyright (C) 2014 Spreadtrum Communications Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/delay.h>
+#include <linux/export.h>
+#include <linux/irqchip/arm-gic.h>
+#include <linux/input.h>
+
+#include <asm/io.h>
+#include <asm/setup.h>
+#include <asm/mach/time.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach-types.h>
+#include <asm/hardware/cache-l2x0.h>
+#include <asm/localtimer.h>
+#include <linux/of_platform.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/clocksource.h>
+#include <linux/clk-provider.h>
+#include <soc/sprd/hardware.h>
+#include <linux/i2c.h>
+#if (defined(CONFIG_INPUT_LIS3DH_I2C) || defined(CONFIG_INPUT_LIS3DH_I2C_MODULE))
+#include <linux/i2c/lis3dh.h>
+#endif
+#if (defined(CONFIG_INPUT_LTR558_I2C) || defined(CONFIG_INPUT_LTR558_I2C_MODULE))
+#include <linux/i2c/ltr_558als.h>
+#endif
+#if (defined(CONFIG_TOUCHSCREEN_MSG2138) || defined(CONFIG_TOUCHSCREEN_MSG2138_MODULE))
+#include <linux/i2c/msg2138.h>
+#endif
+#include <linux/spi/spi.h>
+#include <linux/gpio.h>
+#include <soc/sprd/board.h>
+#include <soc/sprd/serial_sprd.h>
+#include <soc/sprd/adi.h>
+#include <soc/sprd/adc.h>
+#include <soc/sprd/pinmap.h>
+#include <linux/irq.h>
+#include <linux/input/matrix_keypad.h>
+
+#include <soc/sprd/sci.h>
+#include <soc/sprd/kpd.h>
+#include <soc/sprd/sci_glb_regs.h>
+
+#if (defined(CONFIG_INV_MPU_IIO) || defined(CONFIG_INV_MPU_IIO_MODULE))
+#include <linux/mpu.h>
+#endif
+#if (defined(CONFIG_SENSORS_AK8975) || defined(CONFIG_SENSORS_AK8975_MODULE))
+#include <linux/akm8975.h>
+#endif
+
+
+/* IRQ's for the multi sensor board */
+#define MPUIRQ_GPIO 212
+#include <linux/regulator/consumer.h>
+#include <soc/sprd/regulator.h>
+#if (defined(CONFIG_TOUCHSCREEN_FOCALTECH) || defined(CONFIG_TOUCHSCREEN_FOCALTECH_MODULE))
+#include <linux/i2c/focaltech.h>
+#endif
+
+#if (defined(CONFIG_KEYBOARD_SC) || defined (CONFIG_KEYBOARD_SC_MODULE))
+#include <linux/input/matrix_keypad.h>
+#include <soc/sprd/kpd.h>
+#endif
+#if (defined(CONFIG_KEYBOARD_GPIO) || defined (CONFIG_KEYBOARD_GPIO_MODULE))
+#include <linux/gpio_keys.h>
+#endif
+#if (defined(CONFIG_KEYBOARD_SPRD_EIC) || defined(CONFIG_KEYBOARD_SPRD_EIC_MODULE))
+#include <linux/sprd_eic_keys.h>
+#endif
+#if (defined(CONFIG_BACKLIGHT_SPRD_PWM) || defined(CONFIG_BACKLIGHT_SPRD_PWM_MODULE))
+#include <linux/sprd_pwm_bl.h>
+#endif
+#if (defined(CONFIG_INPUT_HEADSET_SPRD_SC2723) || defined(CONFIG_INPUT_HEADSET_SPRD_SC2723_MODULE))
+#include <linux/headset_sprd_sc2723.h>
+#endif
+extern void bluesleep_setup_uart_port(struct platform_device *uart_dev);
+extern void __init sci_reserve(void);
+extern void __init sci_map_io(void);
+extern void __init sci_init_irq(void);
+extern void __init sci_timer_init(void);
+extern int __init sci_clock_init(void);
+extern int __init sci_regulator_init(void);
+
+int __init __clock_init_early(void)
+{
+#if !defined(CONFIG_ARCH_SCX15)
+	pr_info("ahb ctl0 %08x, ctl2 %0x8 glb aon apb0 %08x aon apb1 %08x clk_en %08x\n",
+		sci_glb_raw_read(REG_AP_AHB_AHB_EB),
+		sci_glb_raw_read(REG_AP_AHB_AHB_RST),
+		sci_glb_raw_read(REG_AON_APB_APB_EB0),
+		sci_glb_raw_read(REG_AON_APB_APB_EB1),
+		sci_glb_raw_read(REG_AON_CLK_PUB_AHB_CFG));
+#endif
+
+	sci_glb_clr(REG_AP_AHB_AHB_EB,
+		BIT_BUSMON2_EB		|
+		BIT_BUSMON1_EB		|
+		BIT_BUSMON0_EB		|
+		BIT_SPINLOCK_EB		|
+#if !defined(CONFIG_ARCH_SCX35L)
+		BIT_GPS_EB		|
+#endif
+		BIT_EMMC_EB		|
+		BIT_SDIO2_EB		|
+		BIT_SDIO1_EB		|
+		BIT_SDIO0_EB		|
+		BIT_DRM_EB		|
+		BIT_NFC_EB		|
+		BIT_DMA_EB		|
+		BIT_USB_EB		|
+#if !defined(CONFIG_ARCH_SCX35L)
+		BIT_GSP_EB		|
+		BIT_DISPC1_EB		|
+#endif
+		0);
+	sci_glb_clr(REG_AP_APB_APB_EB,
+		BIT_INTC3_EB		|
+		BIT_INTC2_EB		|
+		BIT_INTC1_EB		|
+		BIT_IIS1_EB		|
+		BIT_UART2_EB		|
+		BIT_UART0_EB		|
+		BIT_SPI1_EB		|
+		BIT_SPI0_EB		|
+		BIT_IIS0_EB		|
+		BIT_I2C0_EB		|
+		BIT_SPI2_EB		|
+		BIT_UART3_EB		|
+		0);
+	sci_glb_clr(REG_AON_APB_APB_RTC_EB,
+		BIT_KPD_RTC_EB		|
+		BIT_KPD_EB		|
+		BIT_EFUSE_EB		|
+		0);
+
+	sci_glb_clr(REG_AON_APB_APB_EB0,
+		BIT_AUDIF_EB			|
+		BIT_VBC_EB			|
+		BIT_PWM3_EB			|
+		BIT_PWM1_EB			|
+		0);
+	sci_glb_clr(REG_AON_APB_APB_EB1,
+		BIT_AUX1_EB			|
+		BIT_AUX0_EB			|
+		0);
+#if defined(CONFIG_MACH_SP9830IEA_5M_H100)
+	sci_glb_set(REG_AON_APB_APB_EB1, BIT_CODEC_EB | 0);
+#endif
+	printk("sc clock module early init ok\n");
+	return 0;
+}
+
+static inline int __sci_get_chip_id(void)
+{
+	return __raw_readl(CHIP_ID_LOW_REG);
+}
+
+const struct of_device_id of_sprd_default_bus_match_table[] = {
+	{ .compatible = "simple-bus", },
+	{ .compatible = "sprd,adi-bus", },
+	{}
+};
+
+static struct of_dev_auxdata of_sprd_default_bus_lookup[] = {
+	{ .compatible = "sprd,sprd_backlight", .name = "sprd_backlight" },
+#if (defined(CONFIG_BACKLIGHT_SPRD_PWM) || defined(CONFIG_BACKLIGHT_SPRD_PWM_MODULE))
+	{ .compatible = "sprd,sprd_pwm_bl",  .name = "sprd_pwm_bl" },
+#endif
+#if (defined(CONFIG_KEYBOARD_SC) || defined(CONFIG_KEYBOARD_SC_MODULE))
+	{.compatible = "sprd,sci-keypad", .name = "sci-keypad" },
+#endif
+#if (defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE))
+	{.compatible = "gpio-keys", .name = "gpio-keys" },
+#endif
+#if (defined(CONFIG_KEYBOARD_SPRD_EIC) || defined(CONFIG_KEYBOARD_SPRD_EIC_MODULE))
+	{.compatible = "sprd,sprd-eic-keys", .name = "sprd-eic-keys" },
+#endif
+#if (defined(CONFIG_INPUT_HEADSET_SPRD_SC2723) || defined(CONFIG_INPUT_HEADSET_SPRD_SC2723_MODULE))
+	{ .compatible = "sprd,headset_sprd_sc2723",  .name = "headset_sprd_sc2723" },
+#endif
+	{}
+};
+
+struct iotable_sprd io_addr_sprd;
+EXPORT_SYMBOL(io_addr_sprd);
+
+int iotable_build()
+{
+	struct device_node *np;
+	struct resource res;
+
+#define ADD_SPRD_DEVICE(compat, id)			\
+do {							\
+	np = of_find_compatible_node(NULL, NULL, compat);\
+	if (of_can_translate_address(np)) {		\
+		of_address_to_resource(np, 0, &res);	\
+		io_addr_sprd.id.paddr = res.start;	\
+		io_addr_sprd.id.length =		\
+			resource_size(&res);		\
+		io_addr_sprd.id.vaddr =			\
+		ioremap_nocache(res.start, io_addr_sprd.id.length);\
+		pr_debug("sprd io map: phys=%08x virt=%08x size=%08x\n", \
+	io_addr_sprd.id.paddr, io_addr_sprd.id.vaddr, io_addr_sprd.id.length);\
+	}						\
+} while (0)
+#define ADD_SPRD_DEVICE_BY_NAME(name, id)		\
+do {							\
+	np = of_find_node_by_name(NULL, name);		\
+	if (of_can_translate_address(np)) {		\
+		of_address_to_resource(np, 0, &res);	\
+		io_addr_sprd.id.paddr = res.start;	\
+		io_addr_sprd.id.length =		\
+			resource_size(&res);		\
+		io_addr_sprd.id.vaddr =			\
+		ioremap_nocache(res.start, io_addr_sprd.id.length);\
+		pr_debug("sprd io map: phys=%16lx virt=%16lx size=%16lx\n", \
+	io_addr_sprd.id.paddr, io_addr_sprd.id.vaddr, io_addr_sprd.id.length);\
+	}						\
+} while (0)
+	ADD_SPRD_DEVICE("sprd,ahb", AHB);
+	ADD_SPRD_DEVICE("sprd,aonapb", AONAPB);
+	ADD_SPRD_DEVICE("sprd,aonckg", AONCKG);
+	ADD_SPRD_DEVICE("sprd,apbreg", APBREG);
+	ADD_SPRD_DEVICE("sprd,core", CORE);
+	ADD_SPRD_DEVICE("sprd,mmahb", MMAHB);
+	ADD_SPRD_DEVICE("sprd,pmu", PMU);
+	ADD_SPRD_DEVICE("sprd,mmckg", MMCKG);
+	ADD_SPRD_DEVICE("sprd,gpuapb", GPUAPB);
+	ADD_SPRD_DEVICE("sprd,apbckg", APBCKG);
+	ADD_SPRD_DEVICE("sprd,gpuckg", GPUCKG);
+	ADD_SPRD_DEVICE("sprd,int", INT);
+	ADD_SPRD_DEVICE("sprd,intc0", INTC0);
+	ADD_SPRD_DEVICE("sprd,intc1", INTC1);
+	ADD_SPRD_DEVICE("sprd,intc2", INTC2);
+	ADD_SPRD_DEVICE("sprd,intc3", INTC3);
+	ADD_SPRD_DEVICE("sprd,uidefuse", UIDEFUSE);
+	ADD_SPRD_DEVICE("sprd,isp", ISP);
+	ADD_SPRD_DEVICE("sprd,ca7wdg", CA7WDG);
+	ADD_SPRD_DEVICE("sprd,csi2", CSI2);
+	ADD_SPRD_DEVICE("sprd,d-eic-gpio", EIC);
+	ADD_SPRD_DEVICE("sprd,wdg", WDG);
+	ADD_SPRD_DEVICE("sprd,ipi", IPI);
+	ADD_SPRD_DEVICE("sprd,dcam", DCAM);
+	ADD_SPRD_DEVICE("sprd,syscnt", SYSCNT);
+	ADD_SPRD_DEVICE("sprd,dma0", DMA0);
+	ADD_SPRD_DEVICE("sprd,pub", PUB);
+	ADD_SPRD_DEVICE("sprd,pin", PIN);
+	ADD_SPRD_DEVICE("sprd,d-gpio-gpio", GPIO);
+	ADD_SPRD_DEVICE("sprd,codecahb", CODECAHB);
+	ADD_SPRD_DEVICE_BY_NAME("hwspinlock0", HWSPINLOCK0);
+	ADD_SPRD_DEVICE_BY_NAME("hwspinlock1", HWSPINLOCK1);
+
+	return 0;
+}
+
+static void __init sc8830_init_machine(void)
+{
+	printk("sci get chip id = 0x%x\n", __sci_get_chip_id());
+
+	sci_adc_init();
+#ifndef CONFIG_MACH_SPX35LFPGA
+	sci_regulator_init();
+#endif
+	of_sprd_default_bus_lookup[0].phys_addr = 0x20300000;
+	of_sprd_default_bus_lookup[1].phys_addr = 0x20400000;
+	of_sprd_default_bus_lookup[2].phys_addr = 0x20500000;
+	of_sprd_default_bus_lookup[3].phys_addr = 0x20600000;
+	of_platform_populate(NULL, of_sprd_default_bus_match_table, of_sprd_default_bus_lookup, NULL);
+}
+
+#ifdef CONFIG_OF
+const struct of_device_id of_sprd_late_bus_match_table[] = {
+	{ .compatible = "sprd,sound", },
+	{}
+};
+#endif
+
+static void __init sc8830_init_late(void)
+{
+	of_platform_populate(of_find_node_by_path("/sprd-audio-devices"),
+				of_sprd_late_bus_match_table, NULL, NULL);
+}
+
+
+extern void __init sci_enable_timer_early(void);
+extern void __init sc_init_chip_id(void);
+
+void __init sprd_init_before_irq(void)
+{
+	iotable_build();
+	sc_init_chip_id();
+	/* earlier init request than irq and timer */
+	__clock_init_early();
+	/*ipi reg init for sipc*/
+	sci_glb_set(REG_AON_APB_APB_EB0, BIT_IPI_EB);
+}
+
+static void __init sc8830_pmu_init(void)
+{
+	__raw_writel(__raw_readl(REG_PMU_APB_PD_MM_TOP_CFG)
+		& ~(BIT_PD_MM_TOP_FORCE_SHUTDOWN),
+		REG_PMU_APB_PD_MM_TOP_CFG);
+
+	while (__raw_readl(REG_PMU_APB_PWR_STATUS0_DBG) & 0xf0000000) {};
+
+	__raw_writel(__raw_readl(REG_PMU_APB_PD_GPU_TOP_CFG)
+		& ~(BIT_PD_GPU_TOP_FORCE_SHUTDOWN),
+		REG_PMU_APB_PD_GPU_TOP_CFG);
+
+	while (__raw_readl(REG_PMU_APB_PWR_STATUS0_DBG) & 0x0f000000) {};
+
+	__raw_writel(__raw_readl(REG_AON_APB_APB_EB0) | BIT_MM_EB |
+		BIT_GPU_EB, REG_AON_APB_APB_EB0);
+	__raw_writel(__raw_readl(REG_MM_AHB_AHB_EB) | BIT_MM_CKG_EB,
+		REG_MM_AHB_AHB_EB);
+	__raw_writel(__raw_readl(REG_MM_AHB_GEN_CKG_CFG)
+		| BIT_MM_MTX_AXI_CKG_EN | BIT_MM_AXI_CKG_EN,
+		REG_MM_AHB_GEN_CKG_CFG);
+	__raw_writel(__raw_readl(REG_MM_CLK_MM_AHB_CFG) | 0x3,
+		REG_MM_CLK_MM_AHB_CFG);
+	__raw_writel(__raw_readl(REG_AON_APB_APB_EB1) | BIT_CODEC_EB, REG_AON_APB_APB_EB1);
+}
+
+static void sprd_init_time(void)
+{
+	if (of_have_populated_dt()) {
+		sc8830_pmu_init();
+		of_clk_init(NULL);
+		clocksource_of_init();
+	} else {
+		sci_clock_init();
+		sci_enable_timer_early();
+		sci_timer_init();
+	}
+}
+static const char *sprd_boards_compat[] __initdata = {
+	"sprd,sp8835eb",
+	NULL,
+};
+extern struct smp_operations sprd_smp_ops;
+
+MACHINE_START(SCPHONE, "sc8830")
+	.smp		= smp_ops(sprd_smp_ops),
+	.reserve	= sci_reserve,
+	.map_io		= sci_map_io,
+	.init_irq	= sci_init_irq,
+	.init_time	= sprd_init_time,
+	.init_machine	= sc8830_init_machine,
+	.init_late	= sc8830_init_late,
+	.dt_compat	= sprd_boards_compat,
+MACHINE_END
+
diff --git a/arch/arm/mach-sc/board-sp9830ieb_5m_h100.c b/arch/arm/mach-sc/board-sp9830ieb_5m_h100.c
new file mode 100644
index 00000000..2142a224
--- /dev/null
+++ b/arch/arm/mach-sc/board-sp9830ieb_5m_h100.c
@@ -0,0 +1,368 @@
+/*
+ * Copyright (C) 2014 Spreadtrum Communications Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/delay.h>
+#include <linux/export.h>
+#include <linux/irqchip/arm-gic.h>
+#include <linux/input.h>
+
+#include <asm/io.h>
+#include <asm/setup.h>
+#include <asm/mach/time.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach-types.h>
+#include <asm/hardware/cache-l2x0.h>
+#include <asm/localtimer.h>
+#include <linux/of_platform.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/clocksource.h>
+#include <linux/clk-provider.h>
+#include <soc/sprd/hardware.h>
+#include <linux/i2c.h>
+#if (defined(CONFIG_INPUT_LIS3DH_I2C) || defined(CONFIG_INPUT_LIS3DH_I2C_MODULE))
+#include <linux/i2c/lis3dh.h>
+#endif
+#if (defined(CONFIG_INPUT_LTR558_I2C) || defined(CONFIG_INPUT_LTR558_I2C_MODULE))
+#include <linux/i2c/ltr_558als.h>
+#endif
+#if (defined(CONFIG_TOUCHSCREEN_MSG2138) || defined(CONFIG_TOUCHSCREEN_MSG2138_MODULE))
+#include <linux/i2c/msg2138.h>
+#endif
+#include <linux/spi/spi.h>
+#include <linux/gpio.h>
+#include <soc/sprd/board.h>
+#include <soc/sprd/serial_sprd.h>
+#include <soc/sprd/adi.h>
+#include <soc/sprd/adc.h>
+#include <soc/sprd/pinmap.h>
+#include <linux/irq.h>
+#include <linux/input/matrix_keypad.h>
+
+#include <soc/sprd/sci.h>
+#include <soc/sprd/kpd.h>
+#include <soc/sprd/sci_glb_regs.h>
+
+#if (defined(CONFIG_INV_MPU_IIO) || defined(CONFIG_INV_MPU_IIO_MODULE))
+#include <linux/mpu.h>
+#endif
+#if (defined(CONFIG_SENSORS_AK8975) || defined(CONFIG_SENSORS_AK8975_MODULE))
+#include <linux/akm8975.h>
+#endif
+
+
+/* IRQ's for the multi sensor board */
+#define MPUIRQ_GPIO 212
+#include <linux/regulator/consumer.h>
+#include <soc/sprd/regulator.h>
+#if (defined(CONFIG_TOUCHSCREEN_FOCALTECH) || defined(CONFIG_TOUCHSCREEN_FOCALTECH_MODULE))
+#include <linux/i2c/focaltech.h>
+#endif
+
+#if (defined(CONFIG_KEYBOARD_SC) || defined (CONFIG_KEYBOARD_SC_MODULE))
+#include <linux/input/matrix_keypad.h>
+#include <soc/sprd/kpd.h>
+#endif
+#if (defined(CONFIG_KEYBOARD_GPIO) || defined (CONFIG_KEYBOARD_GPIO_MODULE))
+#include <linux/gpio_keys.h>
+#endif
+#if (defined(CONFIG_KEYBOARD_SPRD_EIC) || defined(CONFIG_KEYBOARD_SPRD_EIC_MODULE))
+#include <linux/sprd_eic_keys.h>
+#endif
+#if (defined(CONFIG_BACKLIGHT_SPRD_PWM) || defined(CONFIG_BACKLIGHT_SPRD_PWM_MODULE))
+#include <linux/sprd_pwm_bl.h>
+#endif
+#if (defined(CONFIG_INPUT_HEADSET_SPRD_SC2723) || defined(CONFIG_INPUT_HEADSET_SPRD_SC2723_MODULE))
+#include <linux/headset_sprd_sc2723.h>
+#endif
+extern void bluesleep_setup_uart_port(struct platform_device *uart_dev);
+extern void __init sci_reserve(void);
+extern void __init sci_map_io(void);
+extern void __init sci_init_irq(void);
+extern void __init sci_timer_init(void);
+extern int __init sci_clock_init(void);
+extern int __init sci_regulator_init(void);
+
+int __init __clock_init_early(void)
+{
+#if !defined(CONFIG_ARCH_SCX15)
+	pr_info("ahb ctl0 %08x, ctl2 %0x8 glb aon apb0 %08x aon apb1 %08x clk_en %08x\n",
+		sci_glb_raw_read(REG_AP_AHB_AHB_EB),
+		sci_glb_raw_read(REG_AP_AHB_AHB_RST),
+		sci_glb_raw_read(REG_AON_APB_APB_EB0),
+		sci_glb_raw_read(REG_AON_APB_APB_EB1),
+		sci_glb_raw_read(REG_AON_CLK_PUB_AHB_CFG));
+#endif
+
+	sci_glb_clr(REG_AP_AHB_AHB_EB,
+		BIT_BUSMON2_EB		|
+		BIT_BUSMON1_EB		|
+		BIT_BUSMON0_EB		|
+		BIT_SPINLOCK_EB		|
+#if !defined(CONFIG_ARCH_SCX35L)
+		BIT_GPS_EB		|
+#endif
+		BIT_EMMC_EB		|
+		BIT_SDIO2_EB		|
+		BIT_SDIO1_EB		|
+		BIT_SDIO0_EB		|
+		BIT_DRM_EB		|
+		BIT_NFC_EB		|
+		BIT_DMA_EB		|
+		BIT_USB_EB		|
+#if !defined(CONFIG_ARCH_SCX35L)
+		BIT_GSP_EB		|
+		BIT_DISPC1_EB		|
+#endif
+		0);
+	sci_glb_clr(REG_AP_APB_APB_EB,
+		BIT_INTC3_EB		|
+		BIT_INTC2_EB		|
+		BIT_INTC1_EB		|
+		BIT_IIS1_EB		|
+		BIT_UART2_EB		|
+		BIT_UART0_EB		|
+		BIT_SPI1_EB		|
+		BIT_SPI0_EB		|
+		BIT_IIS0_EB		|
+		BIT_I2C0_EB		|
+		BIT_SPI2_EB		|
+		BIT_UART3_EB		|
+		0);
+	sci_glb_clr(REG_AON_APB_APB_RTC_EB,
+		BIT_KPD_RTC_EB		|
+		BIT_KPD_EB		|
+		BIT_EFUSE_EB		|
+		0);
+
+	sci_glb_clr(REG_AON_APB_APB_EB0,
+		BIT_AUDIF_EB			|
+		BIT_VBC_EB			|
+		BIT_PWM3_EB			|
+		BIT_PWM1_EB			|
+		0);
+	sci_glb_clr(REG_AON_APB_APB_EB1,
+		BIT_AUX1_EB			|
+		BIT_AUX0_EB			|
+		0);
+#if defined(CONFIG_MACH_SP9830IEB_5M_H100)
+	sci_glb_set(REG_AON_APB_APB_EB1, BIT_CODEC_EB | 0);
+#endif
+	printk("sc clock module early init ok\n");
+	return 0;
+}
+
+static inline int __sci_get_chip_id(void)
+{
+	return __raw_readl(CHIP_ID_LOW_REG);
+}
+
+const struct of_device_id of_sprd_default_bus_match_table[] = {
+	{ .compatible = "simple-bus", },
+	{ .compatible = "sprd,adi-bus", },
+	{}
+};
+
+static struct of_dev_auxdata of_sprd_default_bus_lookup[] = {
+	{ .compatible = "sprd,sprd_backlight", .name = "sprd_backlight" },
+#if (defined(CONFIG_BACKLIGHT_SPRD_PWM) || defined(CONFIG_BACKLIGHT_SPRD_PWM_MODULE))
+	{ .compatible = "sprd,sprd_pwm_bl",  .name = "sprd_pwm_bl" },
+#endif
+#if (defined(CONFIG_KEYBOARD_SC) || defined(CONFIG_KEYBOARD_SC_MODULE))
+	{.compatible = "sprd,sci-keypad", .name = "sci-keypad" },
+#endif
+#if (defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE))
+	{.compatible = "gpio-keys", .name = "gpio-keys" },
+#endif
+#if (defined(CONFIG_KEYBOARD_SPRD_EIC) || defined(CONFIG_KEYBOARD_SPRD_EIC_MODULE))
+	{.compatible = "sprd,sprd-eic-keys", .name = "sprd-eic-keys" },
+#endif
+#if (defined(CONFIG_INPUT_HEADSET_SPRD_SC2723) || defined(CONFIG_INPUT_HEADSET_SPRD_SC2723_MODULE))
+	{ .compatible = "sprd,headset_sprd_sc2723",  .name = "headset_sprd_sc2723" },
+#endif
+	{}
+};
+
+struct iotable_sprd io_addr_sprd;
+EXPORT_SYMBOL(io_addr_sprd);
+
+int iotable_build()
+{
+	struct device_node *np;
+	struct resource res;
+
+#define ADD_SPRD_DEVICE(compat, id)			\
+do {							\
+	np = of_find_compatible_node(NULL, NULL, compat);\
+	if (of_can_translate_address(np)) {		\
+		of_address_to_resource(np, 0, &res);	\
+		io_addr_sprd.id.paddr = res.start;	\
+		io_addr_sprd.id.length =		\
+			resource_size(&res);		\
+		io_addr_sprd.id.vaddr =			\
+		ioremap_nocache(res.start, io_addr_sprd.id.length);\
+		pr_debug("sprd io map: phys=%08x virt=%08x size=%08x\n", \
+	io_addr_sprd.id.paddr, io_addr_sprd.id.vaddr, io_addr_sprd.id.length);\
+	}						\
+} while (0)
+#define ADD_SPRD_DEVICE_BY_NAME(name, id)		\
+do {							\
+	np = of_find_node_by_name(NULL, name);		\
+	if (of_can_translate_address(np)) {		\
+		of_address_to_resource(np, 0, &res);	\
+		io_addr_sprd.id.paddr = res.start;	\
+		io_addr_sprd.id.length =		\
+			resource_size(&res);		\
+		io_addr_sprd.id.vaddr =			\
+		ioremap_nocache(res.start, io_addr_sprd.id.length);\
+		pr_debug("sprd io map: phys=%16lx virt=%16lx size=%16lx\n", \
+	io_addr_sprd.id.paddr, io_addr_sprd.id.vaddr, io_addr_sprd.id.length);\
+	}						\
+} while (0)
+	ADD_SPRD_DEVICE("sprd,ahb", AHB);
+	ADD_SPRD_DEVICE("sprd,aonapb", AONAPB);
+	ADD_SPRD_DEVICE("sprd,aonckg", AONCKG);
+	ADD_SPRD_DEVICE("sprd,apbreg", APBREG);
+	ADD_SPRD_DEVICE("sprd,core", CORE);
+	ADD_SPRD_DEVICE("sprd,mmahb", MMAHB);
+	ADD_SPRD_DEVICE("sprd,pmu", PMU);
+	ADD_SPRD_DEVICE("sprd,mmckg", MMCKG);
+	ADD_SPRD_DEVICE("sprd,gpuapb", GPUAPB);
+	ADD_SPRD_DEVICE("sprd,apbckg", APBCKG);
+	ADD_SPRD_DEVICE("sprd,gpuckg", GPUCKG);
+	ADD_SPRD_DEVICE("sprd,int", INT);
+	ADD_SPRD_DEVICE("sprd,intc0", INTC0);
+	ADD_SPRD_DEVICE("sprd,intc1", INTC1);
+	ADD_SPRD_DEVICE("sprd,intc2", INTC2);
+	ADD_SPRD_DEVICE("sprd,intc3", INTC3);
+	ADD_SPRD_DEVICE("sprd,uidefuse", UIDEFUSE);
+	ADD_SPRD_DEVICE("sprd,isp", ISP);
+	ADD_SPRD_DEVICE("sprd,ca7wdg", CA7WDG);
+	ADD_SPRD_DEVICE("sprd,csi2", CSI2);
+	ADD_SPRD_DEVICE("sprd,d-eic-gpio", EIC);
+	ADD_SPRD_DEVICE("sprd,wdg", WDG);
+	ADD_SPRD_DEVICE("sprd,ipi", IPI);
+	ADD_SPRD_DEVICE("sprd,dcam", DCAM);
+	ADD_SPRD_DEVICE("sprd,syscnt", SYSCNT);
+	ADD_SPRD_DEVICE("sprd,dma0", DMA0);
+	ADD_SPRD_DEVICE("sprd,pub", PUB);
+	ADD_SPRD_DEVICE("sprd,pin", PIN);
+	ADD_SPRD_DEVICE("sprd,d-gpio-gpio", GPIO);
+	ADD_SPRD_DEVICE("sprd,codecahb", CODECAHB);
+	ADD_SPRD_DEVICE_BY_NAME("hwspinlock0", HWSPINLOCK0);
+	ADD_SPRD_DEVICE_BY_NAME("hwspinlock1", HWSPINLOCK1);
+
+	return 0;
+}
+
+static void __init sc8830_init_machine(void)
+{
+	printk("sci get chip id = 0x%x\n", __sci_get_chip_id());
+
+	sci_adc_init();
+#ifndef CONFIG_MACH_SPX35LFPGA
+	sci_regulator_init();
+#endif
+	of_sprd_default_bus_lookup[0].phys_addr = 0x20300000;
+	of_sprd_default_bus_lookup[1].phys_addr = 0x20400000;
+	of_sprd_default_bus_lookup[2].phys_addr = 0x20500000;
+	of_sprd_default_bus_lookup[3].phys_addr = 0x20600000;
+	of_platform_populate(NULL, of_sprd_default_bus_match_table, of_sprd_default_bus_lookup, NULL);
+}
+
+#ifdef CONFIG_OF
+const struct of_device_id of_sprd_late_bus_match_table[] = {
+	{ .compatible = "sprd,sound", },
+	{}
+};
+#endif
+
+static void __init sc8830_init_late(void)
+{
+	of_platform_populate(of_find_node_by_path("/sprd-audio-devices"),
+				of_sprd_late_bus_match_table, NULL, NULL);
+}
+
+
+extern void __init sci_enable_timer_early(void);
+extern void __init sc_init_chip_id(void);
+
+void __init sprd_init_before_irq(void)
+{
+	iotable_build();
+	sc_init_chip_id();
+	/* earlier init request than irq and timer */
+	__clock_init_early();
+	/*ipi reg init for sipc*/
+	sci_glb_set(REG_AON_APB_APB_EB0, BIT_IPI_EB);
+}
+
+static void __init sc8830_pmu_init(void)
+{
+	__raw_writel(__raw_readl(REG_PMU_APB_PD_MM_TOP_CFG)
+		& ~(BIT_PD_MM_TOP_FORCE_SHUTDOWN),
+		REG_PMU_APB_PD_MM_TOP_CFG);
+
+	while (__raw_readl(REG_PMU_APB_PWR_STATUS0_DBG) & 0xf0000000) {};
+
+	__raw_writel(__raw_readl(REG_PMU_APB_PD_GPU_TOP_CFG)
+		& ~(BIT_PD_GPU_TOP_FORCE_SHUTDOWN),
+		REG_PMU_APB_PD_GPU_TOP_CFG);
+
+	while (__raw_readl(REG_PMU_APB_PWR_STATUS0_DBG) & 0x0f000000) {};
+
+	__raw_writel(__raw_readl(REG_AON_APB_APB_EB0) | BIT_MM_EB |
+		BIT_GPU_EB, REG_AON_APB_APB_EB0);
+	__raw_writel(__raw_readl(REG_MM_AHB_AHB_EB) | BIT_MM_CKG_EB,
+		REG_MM_AHB_AHB_EB);
+	__raw_writel(__raw_readl(REG_MM_AHB_GEN_CKG_CFG)
+		| BIT_MM_MTX_AXI_CKG_EN | BIT_MM_AXI_CKG_EN,
+		REG_MM_AHB_GEN_CKG_CFG);
+	__raw_writel(__raw_readl(REG_MM_CLK_MM_AHB_CFG) | 0x3,
+		REG_MM_CLK_MM_AHB_CFG);
+	__raw_writel(__raw_readl(REG_AON_APB_APB_EB1) | BIT_CODEC_EB, REG_AON_APB_APB_EB1);
+}
+
+static void sprd_init_time(void)
+{
+	if (of_have_populated_dt()) {
+		sc8830_pmu_init();
+		of_clk_init(NULL);
+		clocksource_of_init();
+	} else {
+		sci_clock_init();
+		sci_enable_timer_early();
+		sci_timer_init();
+	}
+}
+static const char *sprd_boards_compat[] __initdata = {
+	"sprd,sp8835eb",
+	NULL,
+};
+extern struct smp_operations sprd_smp_ops;
+
+MACHINE_START(SCPHONE, "sc8830")
+	.smp		= smp_ops(sprd_smp_ops),
+	.reserve	= sci_reserve,
+	.map_io		= sci_map_io,
+	.init_irq	= sci_init_irq,
+	.init_time	= sprd_init_time,
+	.init_machine	= sc8830_init_machine,
+	.init_late	= sc8830_init_late,
+	.dt_compat	= sprd_boards_compat,
+MACHINE_END
+
diff --git a/arch/arm/mach-sc/board-sp9830iec_4m_h100.c b/arch/arm/mach-sc/board-sp9830iec_4m_h100.c
new file mode 100644
index 00000000..bfcd1c06
--- /dev/null
+++ b/arch/arm/mach-sc/board-sp9830iec_4m_h100.c
@@ -0,0 +1,368 @@
+/*
+ * Copyright (C) 2014 Spreadtrum Communications Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/delay.h>
+#include <linux/export.h>
+#include <linux/irqchip/arm-gic.h>
+#include <linux/input.h>
+
+#include <asm/io.h>
+#include <asm/setup.h>
+#include <asm/mach/time.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach-types.h>
+#include <asm/hardware/cache-l2x0.h>
+#include <asm/localtimer.h>
+#include <linux/of_platform.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/clocksource.h>
+#include <linux/clk-provider.h>
+#include <soc/sprd/hardware.h>
+#include <linux/i2c.h>
+#if (defined(CONFIG_INPUT_LIS3DH_I2C) || defined(CONFIG_INPUT_LIS3DH_I2C_MODULE))
+#include <linux/i2c/lis3dh.h>
+#endif
+#if (defined(CONFIG_INPUT_LTR558_I2C) || defined(CONFIG_INPUT_LTR558_I2C_MODULE))
+#include <linux/i2c/ltr_558als.h>
+#endif
+#if (defined(CONFIG_TOUCHSCREEN_MSG2138) || defined(CONFIG_TOUCHSCREEN_MSG2138_MODULE))
+#include <linux/i2c/msg2138.h>
+#endif
+#include <linux/spi/spi.h>
+#include <linux/gpio.h>
+#include <soc/sprd/board.h>
+#include <soc/sprd/serial_sprd.h>
+#include <soc/sprd/adi.h>
+#include <soc/sprd/adc.h>
+#include <soc/sprd/pinmap.h>
+#include <linux/irq.h>
+#include <linux/input/matrix_keypad.h>
+
+#include <soc/sprd/sci.h>
+#include <soc/sprd/kpd.h>
+#include <soc/sprd/sci_glb_regs.h>
+
+#if (defined(CONFIG_INV_MPU_IIO) || defined(CONFIG_INV_MPU_IIO_MODULE))
+#include <linux/mpu.h>
+#endif
+#if (defined(CONFIG_SENSORS_AK8975) || defined(CONFIG_SENSORS_AK8975_MODULE))
+#include <linux/akm8975.h>
+#endif
+
+
+/* IRQ's for the multi sensor board */
+#define MPUIRQ_GPIO 212
+#include <linux/regulator/consumer.h>
+#include <soc/sprd/regulator.h>
+#if (defined(CONFIG_TOUCHSCREEN_FOCALTECH) || defined(CONFIG_TOUCHSCREEN_FOCALTECH_MODULE))
+#include <linux/i2c/focaltech.h>
+#endif
+
+#if (defined(CONFIG_KEYBOARD_SC) || defined (CONFIG_KEYBOARD_SC_MODULE))
+#include <linux/input/matrix_keypad.h>
+#include <soc/sprd/kpd.h>
+#endif
+#if (defined(CONFIG_KEYBOARD_GPIO) || defined (CONFIG_KEYBOARD_GPIO_MODULE))
+#include <linux/gpio_keys.h>
+#endif
+#if (defined(CONFIG_KEYBOARD_SPRD_EIC) || defined(CONFIG_KEYBOARD_SPRD_EIC_MODULE))
+#include <linux/sprd_eic_keys.h>
+#endif
+#if (defined(CONFIG_BACKLIGHT_SPRD_PWM) || defined(CONFIG_BACKLIGHT_SPRD_PWM_MODULE))
+#include <linux/sprd_pwm_bl.h>
+#endif
+#if (defined(CONFIG_INPUT_HEADSET_SPRD_SC2723) || defined(CONFIG_INPUT_HEADSET_SPRD_SC2723_MODULE))
+#include <linux/headset_sprd_sc2723.h>
+#endif
+extern void bluesleep_setup_uart_port(struct platform_device *uart_dev);
+extern void __init sci_reserve(void);
+extern void __init sci_map_io(void);
+extern void __init sci_init_irq(void);
+extern void __init sci_timer_init(void);
+extern int __init sci_clock_init(void);
+extern int __init sci_regulator_init(void);
+
+int __init __clock_init_early(void)
+{
+#if !defined(CONFIG_ARCH_SCX15)
+	pr_info("ahb ctl0 %08x, ctl2 %0x8 glb aon apb0 %08x aon apb1 %08x clk_en %08x\n",
+		sci_glb_raw_read(REG_AP_AHB_AHB_EB),
+		sci_glb_raw_read(REG_AP_AHB_AHB_RST),
+		sci_glb_raw_read(REG_AON_APB_APB_EB0),
+		sci_glb_raw_read(REG_AON_APB_APB_EB1),
+		sci_glb_raw_read(REG_AON_CLK_PUB_AHB_CFG));
+#endif
+
+	sci_glb_clr(REG_AP_AHB_AHB_EB,
+		BIT_BUSMON2_EB		|
+		BIT_BUSMON1_EB		|
+		BIT_BUSMON0_EB		|
+		BIT_SPINLOCK_EB		|
+#if !defined(CONFIG_ARCH_SCX35L)
+		BIT_GPS_EB		|
+#endif
+		BIT_EMMC_EB		|
+		BIT_SDIO2_EB		|
+		BIT_SDIO1_EB		|
+		BIT_SDIO0_EB		|
+		BIT_DRM_EB		|
+		BIT_NFC_EB		|
+		BIT_DMA_EB		|
+		BIT_USB_EB		|
+#if !defined(CONFIG_ARCH_SCX35L)
+		BIT_GSP_EB		|
+		BIT_DISPC1_EB		|
+#endif
+		0);
+	sci_glb_clr(REG_AP_APB_APB_EB,
+		BIT_INTC3_EB		|
+		BIT_INTC2_EB		|
+		BIT_INTC1_EB		|
+		BIT_IIS1_EB		|
+		BIT_UART2_EB		|
+		BIT_UART0_EB		|
+		BIT_SPI1_EB		|
+		BIT_SPI0_EB		|
+		BIT_IIS0_EB		|
+		BIT_I2C0_EB		|
+		BIT_SPI2_EB		|
+		BIT_UART3_EB		|
+		0);
+	sci_glb_clr(REG_AON_APB_APB_RTC_EB,
+		BIT_KPD_RTC_EB		|
+		BIT_KPD_EB		|
+		BIT_EFUSE_EB		|
+		0);
+
+	sci_glb_clr(REG_AON_APB_APB_EB0,
+		BIT_AUDIF_EB			|
+		BIT_VBC_EB			|
+		BIT_PWM3_EB			|
+		BIT_PWM1_EB			|
+		0);
+	sci_glb_clr(REG_AON_APB_APB_EB1,
+		BIT_AUX1_EB			|
+		BIT_AUX0_EB			|
+		0);
+#if defined(CONFIG_MACH_SP9830IEC_4M_H100)
+	sci_glb_set(REG_AON_APB_APB_EB1, BIT_CODEC_EB | 0);
+#endif
+	printk("sc clock module early init ok\n");
+	return 0;
+}
+
+static inline int __sci_get_chip_id(void)
+{
+	return __raw_readl(CHIP_ID_LOW_REG);
+}
+
+const struct of_device_id of_sprd_default_bus_match_table[] = {
+	{ .compatible = "simple-bus", },
+	{ .compatible = "sprd,adi-bus", },
+	{}
+};
+
+static struct of_dev_auxdata of_sprd_default_bus_lookup[] = {
+	{ .compatible = "sprd,sprd_backlight", .name = "sprd_backlight" },
+#if (defined(CONFIG_BACKLIGHT_SPRD_PWM) || defined(CONFIG_BACKLIGHT_SPRD_PWM_MODULE))
+	{ .compatible = "sprd,sprd_pwm_bl",  .name = "sprd_pwm_bl" },
+#endif
+#if (defined(CONFIG_KEYBOARD_SC) || defined(CONFIG_KEYBOARD_SC_MODULE))
+	{.compatible = "sprd,sci-keypad", .name = "sci-keypad" },
+#endif
+#if (defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE))
+	{.compatible = "gpio-keys", .name = "gpio-keys" },
+#endif
+#if (defined(CONFIG_KEYBOARD_SPRD_EIC) || defined(CONFIG_KEYBOARD_SPRD_EIC_MODULE))
+	{.compatible = "sprd,sprd-eic-keys", .name = "sprd-eic-keys" },
+#endif
+#if (defined(CONFIG_INPUT_HEADSET_SPRD_SC2723) || defined(CONFIG_INPUT_HEADSET_SPRD_SC2723_MODULE))
+	{ .compatible = "sprd,headset_sprd_sc2723",  .name = "headset_sprd_sc2723" },
+#endif
+	{}
+};
+
+struct iotable_sprd io_addr_sprd;
+EXPORT_SYMBOL(io_addr_sprd);
+
+int iotable_build()
+{
+	struct device_node *np;
+	struct resource res;
+
+#define ADD_SPRD_DEVICE(compat, id)			\
+do {							\
+	np = of_find_compatible_node(NULL, NULL, compat);\
+	if (of_can_translate_address(np)) {		\
+		of_address_to_resource(np, 0, &res);	\
+		io_addr_sprd.id.paddr = res.start;	\
+		io_addr_sprd.id.length =		\
+			resource_size(&res);		\
+		io_addr_sprd.id.vaddr =			\
+		ioremap_nocache(res.start, io_addr_sprd.id.length);\
+		pr_debug("sprd io map: phys=%08x virt=%08x size=%08x\n", \
+	io_addr_sprd.id.paddr, io_addr_sprd.id.vaddr, io_addr_sprd.id.length);\
+	}						\
+} while (0)
+#define ADD_SPRD_DEVICE_BY_NAME(name, id)		\
+do {							\
+	np = of_find_node_by_name(NULL, name);		\
+	if (of_can_translate_address(np)) {		\
+		of_address_to_resource(np, 0, &res);	\
+		io_addr_sprd.id.paddr = res.start;	\
+		io_addr_sprd.id.length =		\
+			resource_size(&res);		\
+		io_addr_sprd.id.vaddr =			\
+		ioremap_nocache(res.start, io_addr_sprd.id.length);\
+		pr_debug("sprd io map: phys=%16lx virt=%16lx size=%16lx\n", \
+	io_addr_sprd.id.paddr, io_addr_sprd.id.vaddr, io_addr_sprd.id.length);\
+	}						\
+} while (0)
+	ADD_SPRD_DEVICE("sprd,ahb", AHB);
+	ADD_SPRD_DEVICE("sprd,aonapb", AONAPB);
+	ADD_SPRD_DEVICE("sprd,aonckg", AONCKG);
+	ADD_SPRD_DEVICE("sprd,apbreg", APBREG);
+	ADD_SPRD_DEVICE("sprd,core", CORE);
+	ADD_SPRD_DEVICE("sprd,mmahb", MMAHB);
+	ADD_SPRD_DEVICE("sprd,pmu", PMU);
+	ADD_SPRD_DEVICE("sprd,mmckg", MMCKG);
+	ADD_SPRD_DEVICE("sprd,gpuapb", GPUAPB);
+	ADD_SPRD_DEVICE("sprd,apbckg", APBCKG);
+	ADD_SPRD_DEVICE("sprd,gpuckg", GPUCKG);
+	ADD_SPRD_DEVICE("sprd,int", INT);
+	ADD_SPRD_DEVICE("sprd,intc0", INTC0);
+	ADD_SPRD_DEVICE("sprd,intc1", INTC1);
+	ADD_SPRD_DEVICE("sprd,intc2", INTC2);
+	ADD_SPRD_DEVICE("sprd,intc3", INTC3);
+	ADD_SPRD_DEVICE("sprd,uidefuse", UIDEFUSE);
+	ADD_SPRD_DEVICE("sprd,isp", ISP);
+	ADD_SPRD_DEVICE("sprd,ca7wdg", CA7WDG);
+	ADD_SPRD_DEVICE("sprd,csi2", CSI2);
+	ADD_SPRD_DEVICE("sprd,d-eic-gpio", EIC);
+	ADD_SPRD_DEVICE("sprd,wdg", WDG);
+	ADD_SPRD_DEVICE("sprd,ipi", IPI);
+	ADD_SPRD_DEVICE("sprd,dcam", DCAM);
+	ADD_SPRD_DEVICE("sprd,syscnt", SYSCNT);
+	ADD_SPRD_DEVICE("sprd,dma0", DMA0);
+	ADD_SPRD_DEVICE("sprd,pub", PUB);
+	ADD_SPRD_DEVICE("sprd,pin", PIN);
+	ADD_SPRD_DEVICE("sprd,d-gpio-gpio", GPIO);
+	ADD_SPRD_DEVICE("sprd,codecahb", CODECAHB);
+	ADD_SPRD_DEVICE_BY_NAME("hwspinlock0", HWSPINLOCK0);
+	ADD_SPRD_DEVICE_BY_NAME("hwspinlock1", HWSPINLOCK1);
+
+	return 0;
+}
+
+static void __init sc8830_init_machine(void)
+{
+	printk("sci get chip id = 0x%x\n", __sci_get_chip_id());
+
+	sci_adc_init();
+#ifndef CONFIG_MACH_SPX35LFPGA
+	sci_regulator_init();
+#endif
+	of_sprd_default_bus_lookup[0].phys_addr = 0x20300000;
+	of_sprd_default_bus_lookup[1].phys_addr = 0x20400000;
+	of_sprd_default_bus_lookup[2].phys_addr = 0x20500000;
+	of_sprd_default_bus_lookup[3].phys_addr = 0x20600000;
+	of_platform_populate(NULL, of_sprd_default_bus_match_table, of_sprd_default_bus_lookup, NULL);
+}
+
+#ifdef CONFIG_OF
+const struct of_device_id of_sprd_late_bus_match_table[] = {
+	{ .compatible = "sprd,sound", },
+	{}
+};
+#endif
+
+static void __init sc8830_init_late(void)
+{
+	of_platform_populate(of_find_node_by_path("/sprd-audio-devices"),
+				of_sprd_late_bus_match_table, NULL, NULL);
+}
+
+
+extern void __init sci_enable_timer_early(void);
+extern void __init sc_init_chip_id(void);
+
+void __init sprd_init_before_irq(void)
+{
+	iotable_build();
+	sc_init_chip_id();
+	/* earlier init request than irq and timer */
+	__clock_init_early();
+	/*ipi reg init for sipc*/
+	sci_glb_set(REG_AON_APB_APB_EB0, BIT_IPI_EB);
+}
+
+static void __init sc8830_pmu_init(void)
+{
+	__raw_writel(__raw_readl(REG_PMU_APB_PD_MM_TOP_CFG)
+		& ~(BIT_PD_MM_TOP_FORCE_SHUTDOWN),
+		REG_PMU_APB_PD_MM_TOP_CFG);
+
+	while (__raw_readl(REG_PMU_APB_PWR_STATUS0_DBG) & 0xf0000000) {};
+
+	__raw_writel(__raw_readl(REG_PMU_APB_PD_GPU_TOP_CFG)
+		& ~(BIT_PD_GPU_TOP_FORCE_SHUTDOWN),
+		REG_PMU_APB_PD_GPU_TOP_CFG);
+
+	while (__raw_readl(REG_PMU_APB_PWR_STATUS0_DBG) & 0x0f000000) {};
+
+	__raw_writel(__raw_readl(REG_AON_APB_APB_EB0) | BIT_MM_EB |
+		BIT_GPU_EB, REG_AON_APB_APB_EB0);
+	__raw_writel(__raw_readl(REG_MM_AHB_AHB_EB) | BIT_MM_CKG_EB,
+		REG_MM_AHB_AHB_EB);
+	__raw_writel(__raw_readl(REG_MM_AHB_GEN_CKG_CFG)
+		| BIT_MM_MTX_AXI_CKG_EN | BIT_MM_AXI_CKG_EN,
+		REG_MM_AHB_GEN_CKG_CFG);
+	__raw_writel(__raw_readl(REG_MM_CLK_MM_AHB_CFG) | 0x3,
+		REG_MM_CLK_MM_AHB_CFG);
+	__raw_writel(__raw_readl(REG_AON_APB_APB_EB1) | BIT_CODEC_EB, REG_AON_APB_APB_EB1);
+}
+
+static void sprd_init_time(void)
+{
+	if (of_have_populated_dt()) {
+		sc8830_pmu_init();
+		of_clk_init(NULL);
+		clocksource_of_init();
+	} else {
+		sci_clock_init();
+		sci_enable_timer_early();
+		sci_timer_init();
+	}
+}
+static const char *sprd_boards_compat[] __initdata = {
+	"sprd,sp8835eb",
+	NULL,
+};
+extern struct smp_operations sprd_smp_ops;
+
+MACHINE_START(SCPHONE, "sc8830")
+	.smp		= smp_ops(sprd_smp_ops),
+	.reserve	= sci_reserve,
+	.map_io		= sci_map_io,
+	.init_irq	= sci_init_irq,
+	.init_time	= sprd_init_time,
+	.init_machine	= sc8830_init_machine,
+	.init_late	= sc8830_init_late,
+	.dt_compat	= sprd_boards_compat,
+MACHINE_END
+
diff --git a/arch/arm/mach-sc/board_common_battery.c b/arch/arm/mach-sc/board_common_battery.c
new file mode 100755
index 00000000..dffb27af
--- /dev/null
+++ b/arch/arm/mach-sc/board_common_battery.c
@@ -0,0 +1,293 @@
+/*
+ * Copyright (C) 2012 Spreadtrum Communications Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/kernel.h>
+#include <linux/platform_device.h>
+#include <linux/ion.h>
+#include <linux/sprd_battery_common.h>
+#include <soc/sprd/gpio.h>
+#include <soc/sprd/hardware.h>
+#include <soc/sprd/sci_glb_regs.h>
+#include <soc/sprd/board.h>
+#include <soc/sprd/irqs.h>
+
+//this is default config file of battery, you can make a special file for a new board.
+#ifndef CONFIG_OF
+
+struct sprdbat_table_data bat_temp_table[] = {
+	{1084, -250},
+	{1072, -200},
+	{1055, -150},
+	{1033, -100},
+	{1008, -50},
+	{977, 0},
+	{938, 50},
+	{897, 100},
+	{850, 150},
+	{798, 200},
+	{742, 250},
+	{686, 300},
+	{628, 350},
+	{571, 400},
+	{513, 450},
+	{459, 500},
+	{410, 550},
+	{362, 600},
+	{318, 650},
+};
+
+struct sprdbat_table_data bat_ocv_table[] = {
+#ifdef CONFIG_SPRD_NOFGUCURRENT_CHG
+	{4160, 100}
+#else
+	{4180, 100}
+#endif
+	,
+	{4100, 95}
+	,
+	{4000, 80}
+	,
+	{3950, 70}
+	,
+	{3900, 60}
+	,
+	{3850, 50}
+	,
+	{3810, 40}
+	,
+	{3775, 30}
+	,
+	{3740, 20}
+	,
+	{3720, 15}
+	,
+	{3680, 5}
+	,
+	{3400, 0}
+	,
+};
+
+#if 0				//this is a demo,Be used when .fgu_mode = 0, the table must be according to battery characteristic.
+struct sprdbat_table_data scx35_ref_phone_soc_table[] = {
+	{4175, 100}
+	,
+	{4130, 95}
+	,
+	{4087, 90}
+	,
+	{4052, 85}
+	,
+	{3990, 80}
+	,
+	{3970, 75}
+	,
+	{3943, 70}
+	,
+	{3915, 65}
+	,
+	{3883, 60}
+	,
+	{3843, 55}
+	,
+	{3820, 50}
+	,
+	{3804, 45}
+	,
+	{3792, 40}
+	,
+	{3783, 35}
+	,
+	{3776, 30}
+	,
+	{3770, 25}
+	,
+	{3754, 20}
+	,
+	{3736, 15}
+	,
+	{3708, 10}
+	,
+	{3691, 5}
+	,
+	{3400, 0}
+	,
+};
+
+struct sprdbat_table_data scx15_ref_phone_soc_table[] = {
+
+	{4175, 100}
+	,
+	{4130, 95}
+	,
+	{4086, 90}
+	,
+	{4045, 85}
+	,
+	{4007, 80}
+	,
+	{3974, 75}
+	,
+	{3943, 70}
+	,
+	{3916, 65}
+	,
+	{3886, 60}
+	,
+	{3850, 55}
+	,
+	{3824, 50}
+	,
+	{3806, 45}
+	,
+	{3793, 40}
+	,
+	{3783, 35}
+	,
+	{3775, 30}
+	,
+	{3766, 25}
+	,
+	{3749, 20}
+	,
+	{3733, 15}
+	,
+	{3712, 10}
+	,
+	{3683, 5}
+	,
+	{3400, 0}
+	,
+};
+
+#endif
+
+struct sprd_battery_platform_data sprdbat_pdata = {
+	.chg_end_vol_h = 4225,
+	.chg_end_vol_pure = 4200,
+	.chg_end_vol_l = 4190,
+	.chg_bat_safety_vol = 4280,
+#ifdef CONFIG_SPRD_NOFGUCURRENT_CHG
+	.rechg_vol = 4110,
+#else
+	.rechg_vol = 4131,
+#endif
+	.adp_cdp_cur = 700,
+	.adp_dcp_cur = 700,
+	.adp_sdp_cur = 500,
+	.ovp_stop = 6500,
+	.ovp_restart = 5800,
+	.chg_timeout = (6 * 60 * 60),
+	.chgtimeout_show_full = 0,
+	.chg_rechg_timeout = (90 * 60),
+	.chg_cv_timeout = (60 * 60),	//Be used in pulse charging
+	.chg_eoc_level = 3,	//Be used in pulse charging
+	.cccv_default = 0,
+	.chg_end_cur = 80,
+	.otp_high_stop = 600,	//60C
+	.otp_high_restart = 550,	//55C
+	.otp_low_stop = -50,	//-5C
+	.otp_low_restart = 0,
+#ifdef CONFIG_SPRD_NOFGUCURRENT_CHG
+	.chg_polling_time = 30,
+#else
+	.chg_polling_time = 60,
+#endif
+	.chg_polling_time_fast = 1,
+	.bat_polling_time = (15),
+	.bat_polling_time_fast = (15),
+	.cap_one_per_time = 30,
+	.cap_valid_range_poweron = 50,
+
+	.temp_support = 0,
+	.temp_adc_ch = 3,
+	.temp_adc_scale = 1,
+	.temp_adc_sample_cnt = 15,
+	.temp_table_mode = 1,
+	.temp_tab = bat_temp_table,
+	.temp_tab_size =
+	    sizeof(bat_temp_table) / sizeof(struct sprdbat_table_data),
+
+	.gpio_vchg_detect = EIC_CHARGER_DETECT,
+	.gpio_cv_state = EIC_CHG_CV_STATE,
+	.gpio_vchg_ovi = EIC_VCHG_OVI,
+	.irq_chg_timer = IRQ_APTMR3_INT,
+	.irq_fgu = IRQ_ANA_FGU_INT,
+	.chg_reg_base = (ANA_REG_GLB_CHGR_CTRL0),
+	.fgu_reg_base = (ANA_FPU_INT_BASE),
+
+	.fgu_mode = 1,
+	.alm_soc = 5,
+	.alm_vol = 3600,
+	.soft_vbat_uvlo = 3100,
+	.rint = 250,
+	.cnom = 1500,		//1500mAH
+	.rsense_real = 215,	//21.5mOHM
+	.rsense_spec = 200,
+	.relax_current = 50,
+	.fgu_cal_ajust = 0,
+	.ocv_tab = bat_ocv_table,
+	.ocv_tab_size =
+	    sizeof(bat_ocv_table) / sizeof(struct sprdbat_table_data),
+};
+
+static struct resource sprd_battery_resources[] = {
+	[0] = {
+	       .start = EIC_CHARGER_DETECT,
+	       .end = EIC_CHARGER_DETECT,
+	       .name = "charger_detect",
+	       .flags = IORESOURCE_IO,
+	       },
+	[1] = {
+	       .start = EIC_CHG_CV_STATE,
+	       .end = EIC_CHG_CV_STATE,
+	       .name = "chg_cv_state",
+	       .flags = IORESOURCE_IO,
+	       },
+	[2] = {
+	       .start = EIC_VCHG_OVI,
+	       .end = EIC_VCHG_OVI,
+	       .name = "vchg_ovi",
+	       .flags = IORESOURCE_IO,
+	       },
+#ifdef CONFIG_SHARK_PAD_HW_V102
+	[3] = {
+	       .start = GPIO_EXT_CHG_DONE,
+	       .end = GPIO_EXT_CHG_DONE,
+	       .name = "ext_charge_done",
+	       .flags = IORESOURCE_IO,
+	       },
+	[4] = {
+	       .start = GPIO_EXT_CHG_EN,
+	       .end = GPIO_EXT_CHG_EN,
+	       .name = "ext_chg_en",
+	       .flags = IORESOURCE_IO,
+	       },
+	[5] = {
+	       .start = GPIO_EXT_CHG_OVI,
+	       .end = GPIO_EXT_CHG_OVI,
+	       .name = "ext_vchg_ovi",
+	       .flags = IORESOURCE_IO,
+	       }
+#endif
+};
+
+struct platform_device sprd_battery_device = {
+	.name = "sprd-battery",
+	.id = 0,
+	.num_resources = ARRAY_SIZE(sprd_battery_resources),
+	.resource = sprd_battery_resources,
+	.dev = {
+		.platform_data = &sprdbat_pdata,
+		},
+};
+#endif
diff --git a/arch/arm/mach-sc/include/mach/__irqs-sc8830.h b/arch/arm/mach-sc/include/mach/__irqs-sc8830.h
new file mode 100644
index 00000000..58609d8a
--- /dev/null
+++ b/arch/arm/mach-sc/include/mach/__irqs-sc8830.h
@@ -0,0 +1,229 @@
+/*
+ * Copyright (C) 2012 Spreadtrum Communications Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __ASM_ARCH_SPRD_IRQS_SCX35_H
+#define __ASM_ARCH_SPRD_IRQS_SCX35_H
+
+#ifndef __ASM_ARCH_SCI_IRQS_H
+#error  "Don't include this file directly, include <mach/irqs.h>"
+#endif
+
+#define IRQ_GIC_START			(32)
+#if defined(CONFIG_ARCH_SCX15) || defined(CONFIG_ARCH_SCX30G)
+#define NR_SCI_PHY_IRQS			(IRQ_GIC_START + 127)
+#else
+#define NR_SCI_PHY_IRQS			(IRQ_GIC_START + 125)
+#endif
+
+#define SCI_IRQ(_X_)			(IRQ_GIC_START + (_X_))
+#define SCI_EXT_IRQ(_X_)		(NR_SCI_PHY_IRQS + (_X_))
+
+#define IRQ_SPECIAL_LATCH		SCI_IRQ(0)
+#define IRQ_SOFT_TRIGGED0_INT		SCI_IRQ(1)
+#define IRQ_SER0_INT			SCI_IRQ(2)
+#define IRQ_SER1_INT			SCI_IRQ(3)
+#define IRQ_SER2_INT			SCI_IRQ(4)
+#define IRQ_SER3_INT			SCI_IRQ(5)
+#define IRQ_SER4_INT			SCI_IRQ(6)
+#define IRQ_SPI0_INT			SCI_IRQ(7)
+#define IRQ_SPI1_INT			SCI_IRQ(8)
+#define IRQ_SPI2_INT			SCI_IRQ(9)
+#define IRQ_SIM0_INT 			SCI_IRQ(10)
+#define IRQ_I2C0_INT 			SCI_IRQ(11)
+#define IRQ_I2C1_INT 			SCI_IRQ(12)
+#define IRQ_I2C2_INT 			SCI_IRQ(13)
+#define IRQ_I2C3_INT 			SCI_IRQ(14)
+#define IRQ_I2C4_INT 			SCI_IRQ(15)
+#define IRQ_IIS0_INT			SCI_IRQ(16)
+#define IRQ_IIS1_INT			SCI_IRQ(17)
+#define IRQ_IIS2_INT			SCI_IRQ(18)
+#define IRQ_IIS3_INT			SCI_IRQ(19)
+#define IRQ_REQ_AUD_INT			SCI_IRQ(20)
+#define IRQ_REQ_AUD_VBC_AFIFO_INT			SCI_IRQ(21)
+#define IRQ_REQ_AUD_VBC_DA_INT			SCI_IRQ(22)
+#define IRQ_REQ_AUD_VBC_AD01_INT			SCI_IRQ(23)
+#define IRQ_REQ_AUD_VBC_AD23_INT			SCI_IRQ(24)
+#define IRQ_ADI_INT			SCI_IRQ(25)
+#define IRQ_THM_INT			SCI_IRQ(26)
+#define IRQ_FM_INT			SCI_IRQ(27)
+#define IRQ_AONTMR0_INT			SCI_IRQ(28)
+#define IRQ_APTMR0_INT			SCI_IRQ(29)
+#define IRQ_AONSYST_INT			SCI_IRQ(30)
+#define IRQ_APSYST_INT			SCI_IRQ(31)
+
+#define IRQ_AONI2C_INT			SCI_IRQ(34)
+#define IRQ_GPIO_INT			SCI_IRQ(35)
+#define IRQ_KPD_INT			SCI_IRQ(36)
+#define IRQ_EIC_INT			SCI_IRQ(37)
+#define IRQ_ANA_INT			SCI_IRQ(38)
+#define IRQ_GPU_INT			SCI_IRQ(39)
+#define IRQ_CSI_INT0			SCI_IRQ(40)
+#define IRQ_CSI_INT1			SCI_IRQ(41)
+#define IRQ_JPG_INT			SCI_IRQ(42)
+#define IRQ_VSP_INT			SCI_IRQ(43)
+#define IRQ_ISP_INT			SCI_IRQ(44)
+#define IRQ_DCAM_INT			SCI_IRQ(45)
+#define IRQ_DISPC0_INT			SCI_IRQ(46)
+#define IRQ_DISPC1_INT			SCI_IRQ(47)
+#define IRQ_DSI0_INT			SCI_IRQ(48)
+#define IRQ_DSI1_INT			SCI_IRQ(49)
+#define IRQ_DSI2_INT			SCI_IRQ(47)
+//#define IRQ_DMA_INT			SCI_IRQ(50)
+#define IRQ_GSP_INT			SCI_IRQ(51)
+#define IRQ_GPS_INT			SCI_IRQ(52)
+#define IRQ_GPS_RTCEXP_INT			SCI_IRQ(53)
+#define IRQ_GPS_WAKEUP_INT			SCI_IRQ(54)
+#define IRQ_USBD_INT			SCI_IRQ(55)
+#define IRQ_NFC_INT			SCI_IRQ(56)
+#define IRQ_SDIO0_INT			SCI_IRQ(57)
+#define IRQ_SDIO1_INT			SCI_IRQ(58)
+#define IRQ_SDIO2_INT			SCI_IRQ(59)
+#define IRQ_EMMC_INT			SCI_IRQ(60)
+#define IRQ_BM0_INT			SCI_IRQ(61)
+#define IRQ_BM1_INT			SCI_IRQ(62)
+#define IRQ_BM2_INT			SCI_IRQ(63)
+#define IRQ_DRM_INT			SCI_IRQ(66)
+#define IRQ_CP0_DSP_INT			SCI_IRQ(67)
+#define IRQ_CP0_MCU0_INT			SCI_IRQ(68)
+#define IRQ_CP0_MCU1_INT			SCI_IRQ(69)
+#define IRQ_CP1_DSP_INT			SCI_IRQ(70)
+#define IRQ_CP1_MCU0_INT			SCI_IRQ(71)
+#define IRQ_CP1_MCU1_INT			SCI_IRQ(72)
+#define IRQ_CP2_INT0_INT			SCI_IRQ(73)
+#define IRQ_CP2_INT1_INT			SCI_IRQ(74)
+#define IRQ_CP0_DSP_FIQ_INT			SCI_IRQ(75)
+#define IRQ_CP0_MCU_FIQ0_INT			SCI_IRQ(76)
+#define IRQ_CP0_MCU_FIQ1_INT			SCI_IRQ(77)
+#define IRQ_CP1_MCU_FIQ_INT			SCI_IRQ(78)
+#if 0
+#define IRQ_NFC_INT			SCI_IRQ(79)
+#define IRQ_NFC_INT			SCI_IRQ(80)
+#define IRQ_NFC_INT			SCI_IRQ(81)
+#define IRQ_NFC_INT			SCI_IRQ(82)
+#endif
+#define IRQ_CP0_WDG_INT			SCI_IRQ(83)
+#define IRQ_CP1_WDG_INT			SCI_IRQ(84)
+#define IRQ_CP2_WDG_INT			SCI_IRQ(85)
+#define IRQ_AXI_BM_PUB_INT		SCI_IRQ(86)
+#if 0
+#define IRQ_NFC_INT			SCI_IRQ(86)
+#define IRQ_NFC_INT			SCI_IRQ(87)
+#define IRQ_NFC_INT			SCI_IRQ(88)
+#define IRQ_NFC_INT			SCI_IRQ(89)
+#define IRQ_NFC_INT			SCI_IRQ(90)
+#define IRQ_NFC_INT			SCI_IRQ(91)
+#endif
+#define IRQ_NPMUIRQ0_INT			SCI_IRQ(92)
+#define IRQ_NPMUIRQ1_INT			SCI_IRQ(93)
+#define IRQ_NPMUIRQ2_INT			SCI_IRQ(94)
+#define IRQ_NPMUIRQ3_INT			SCI_IRQ(95)
+#define IRQ_CA7COM0_INT			SCI_IRQ(98)
+#define IRQ_CA7COM1_INT			SCI_IRQ(99)
+#define IRQ_CA7COM2_INT			SCI_IRQ(100)
+#define IRQ_CA7COM3_INT			SCI_IRQ(101)
+#define IRQ_NCNTV0_INT			SCI_IRQ(102)
+#define IRQ_NCNTV1_INT			SCI_IRQ(103)
+#define IRQ_NCNTV2_INT			SCI_IRQ(104)
+#define IRQ_NCNTV3_INT			SCI_IRQ(105)
+#define IRQ_NCNTHP0_INT			SCI_IRQ(106)
+#define IRQ_NCNTHP1_INT			SCI_IRQ(107)
+#define IRQ_NCNTHP2_INT			SCI_IRQ(108)
+#define IRQ_NCNTHP3_INT			SCI_IRQ(109)
+#define IRQ_NCNTPN0_INT			SCI_IRQ(110)
+#define IRQ_NCNTPN1_INT			SCI_IRQ(111)
+#define IRQ_NCNTPN2_INT			SCI_IRQ(112)
+#define IRQ_NCNTPN3_INT			SCI_IRQ(113)
+#define IRQ_NCNTPS0_INT			SCI_IRQ(114)
+#define IRQ_NCNTPS1_INT			SCI_IRQ(115)
+#define IRQ_NCNTPS2_INT			SCI_IRQ(116)
+#define IRQ_NCNTPS3_INT			SCI_IRQ(117)
+#define IRQ_APTMR1_INT			SCI_IRQ(118)
+#define IRQ_APTMR2_INT			SCI_IRQ(119)
+#define IRQ_APTMR3_INT			SCI_IRQ(120)
+#define IRQ_APTMR4_INT			SCI_IRQ(121)
+#define IRQ_AVS_INT				SCI_IRQ(122)
+#define IRQ_APWDG_INT			SCI_IRQ(123)
+#define IRQ_CA7WDG_INT			SCI_IRQ(124)
+#if defined(CONFIG_ARCH_SCX15) || defined(CONFIG_ARCH_SCX30G)
+#define IRQ_ZIPDEC_INT			SCI_IRQ(125)
+#define IRQ_ZIPENC_INT			SCI_IRQ(126)
+#endif
+
+#define IRQ_SIPC_CPW			IRQ_CP0_MCU0_INT
+#ifdef CONFIG_ARCH_SCX30G
+#define IRQ_SIPC_CPT 			IRQ_CP0_MCU0_INT
+#else
+#define IRQ_SIPC_CPT			IRQ_CP1_MCU0_INT
+#endif
+#define IRQ_SIPC_WCN			IRQ_CP2_INT0_INT
+
+
+/* translate gic irq number(user using ) to intc number */
+#define SCI_GET_INTC_IRQ(_IRQ_NUM_)	((_IRQ_NUM_) - IRQ_GIC_START)
+#define SCI_INTC_IRQ_BIT(_IRQ_NUM_)	((SCI_GET_INTC_IRQ(_IRQ_NUM_)<IRQ_GIC_START)	? \
+					(1<<SCI_GET_INTC_IRQ(_IRQ_NUM_))		: \
+					(1<<(SCI_GET_INTC_IRQ(_IRQ_NUM_)-IRQ_GIC_START)))
+
+/* analog die interrupt number */
+#define IRQ_ANA_ADC_INT			SCI_EXT_IRQ(0)
+#if defined(CONFIG_ARCH_SCX15)
+#define IRQ_ANA_GPIO_INT		-1
+#else
+#define IRQ_ANA_GPIO_INT		SCI_EXT_IRQ(1)
+#endif
+#define IRQ_ANA_RTC_INT			SCI_EXT_IRQ(2)
+#define IRQ_ANA_WDG_INT			SCI_EXT_IRQ(3)
+#define IRQ_ANA_FGU_INT			SCI_EXT_IRQ(4)
+#define IRQ_ANA_EIC_INT			SCI_EXT_IRQ(5)
+#define IRQ_ANA_AUD_HEAD_BUTTON_INT		SCI_EXT_IRQ(6)
+#define IRQ_ANA_AUD_PROTECT_INT			SCI_EXT_IRQ(7)
+#if defined(CONFIG_ARCH_SCX15)
+#define IRQ_ANA_CAL_INT			SCI_EXT_IRQ(8)
+#define IRQ_ANA_TPC_INT			SCI_EXT_IRQ(9)
+#define NR_ANA_IRQS			(10)
+#else
+#define IRQ_ANA_THM_OTP_INT			SCI_EXT_IRQ(9)
+#define IRQ_ANA_DCD_OTP_INT			SCI_EXT_IRQ(10)/*bit9 is reserved in adie intc*/
+#define NR_ANA_IRQS			(11)
+#endif
+
+#define IRQ_ANA_INT_START		IRQ_ANA_ADC_INT
+
+#if defined(CONFIG_ARCH_SCX15)
+#define GPIO_IRQ_START			SCI_EXT_IRQ(10)
+#define NR_GPIO_IRQS	( 320 )
+#else
+/* sc8830 gpio&eic pin interrupt number, total is 320, which is bigger than 256 */
+#define GPIO_IRQ_START			SCI_EXT_IRQ(11)
+#define NR_GPIO_IRQS	( 320 )
+#endif
+
+#if (defined(CONFIG_EIRQ_NUM) && CONFIG_EIRQ_NUM)
+#ifndef CONFIG_SPARSE_IRQ
+/* For external irq region desc request */
+#define __NR_IRQS			(NR_SCI_PHY_IRQS + NR_ANA_IRQS + NR_GPIO_IRQS)
+#define NR_IRQS				(__NR_IRQS + CONFIG_EIRQ_NUM)
+#else
+#error 'Dont support CONFIG_EIRQ_NUM & CONFIG_SPARSE_IRQ coexist'
+#endif /* CONFIG_SPARSE_IRQ */
+#else
+#define NR_IRQS				(NR_SCI_PHY_IRQS + NR_ANA_IRQS + NR_GPIO_IRQS)
+#endif /* CONFIG_EIRQ_NUM */
+#define FIQ_START	(0)
+#define NR_FIQS		(NR_SCI_PHY_IRQS)
+
+
+/* redefined some MACROS for module code*/
+#define IRQ_TIMER1_INT			IRQ_AONTMR0_INT
+#define IRQ_ANA_AUD_INT			IRQ_ANA_AUD_PROTECT_INT
+#endif
diff --git a/arch/arm/mach-sc/include/mach/debug-macro.S b/arch/arm/mach-sc/include/mach/debug-macro.S
new file mode 100644
index 00000000..d7394ea9
--- /dev/null
+++ b/arch/arm/mach-sc/include/mach/debug-macro.S
@@ -0,0 +1,42 @@
+/*
+ * Copyright (C) 2012 Spreadtrum Communications Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include "hardware.h"
+
+	.macro  addruart,rp, rv, tmp
+	ldr \rp, =LL_DEBUG_UART_PHYS
+	ldr \rv, =LL_DEBUG_UART_BASE
+	.endm
+
+	.macro	senduart,rd,rx
+	and	\rd,\rd,#0xFF
+	str	\rd, [\rx, #0x00]
+	.endm
+
+	.macro	waituart,rd,rx
+	@ wait for TX_READY
+1:	ldr	\rd, [\rx, #0x0C]
+	mov	\rd,\rd,lsr #8
+	and	\rd,\rd,#0xFF
+	teq	\rd, #0x00
+	bne	1b
+	.endm
+
+	.macro	busyuart,rd,rx
+	@ wait for TX_READY
+2:	ldr	\rd, [\rx, #0x0C]
+	mov	\rd,\rd,lsr #8
+	and	\rd,\rd,#0xFF
+	teq	\rd, #0x00
+	bne	2b
+	.endm
diff --git a/arch/arm/mach-sc/include/mach/gpio.h b/arch/arm/mach-sc/include/mach/gpio.h
new file mode 100755
index 00000000..6a85491c
--- /dev/null
+++ b/arch/arm/mach-sc/include/mach/gpio.h
@@ -0,0 +1,109 @@
+/*
+ * Copyright (C) 2012 Spreadtrum Communications Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __ASM_ARM_ARCH_GPIO_H
+#define __ASM_ARM_ARCH_GPIO_H
+
+/*
+ * SC8825 GPIO&EIC bank and number summary:
+ *
+ * Bank	  From	  To	NR	Type
+ * 1	  0   ~	  15		16	EIC
+ * 2	  16  ~	  271	256	GPIO
+ * 3	  272 ~	  287	16	ANA EIC
+ * 4	  288 ~	  319	32	ANA GPIO
+ */
+
+#ifdef CONFIG_ARCH_SCX35
+#define	D_GPIO_START	0
+#define	D_GPIO_NR		256
+
+#define	A_GPIO_START	( D_GPIO_START + D_GPIO_NR )
+#if defined(CONFIG_ARCH_SCX15)
+#define	A_GPIO_NR		0
+#else
+#define	A_GPIO_NR		32
+#endif
+
+#define	D_EIC_START		( A_GPIO_START + A_GPIO_NR)
+#define	D_EIC_NR		16
+
+#define	A_EIC_START		( D_EIC_START + D_EIC_NR )
+#define	A_EIC_NR		16
+#else
+#define	D_EIC_START		0
+#define	D_EIC_NR		16
+
+#define	D_GPIO_START	( D_EIC_START + D_EIC_NR )
+#define	D_GPIO_NR		256
+
+#define	A_EIC_START		( D_GPIO_START + D_GPIO_NR )
+#define	A_EIC_NR		16
+
+#define	A_GPIO_START	( A_EIC_START + A_EIC_NR )
+#define	A_GPIO_NR		32
+#endif
+
+#define ARCH_NR_GPIOS	( D_EIC_NR + D_GPIO_NR + A_EIC_NR + A_GPIO_NR )
+
+#ifdef CONFIG_64BIT
+#include <asm-generic/gpio.h>
+#include <soc/sprd/irqs.h>
+#else
+#include <asm-generic/gpio.h>
+#include <mach/irqs.h>
+#endif
+
+#define gpio_get_value  __gpio_get_value
+#define gpio_set_value  __gpio_set_value
+#define gpio_cansleep   __gpio_cansleep
+#define gpio_to_irq     __gpio_to_irq
+
+
+/* Digital GPIO/EIC base address */
+#define CTL_GPIO_BASE          (SPRD_GPIO_BASE)
+#define CTL_EIC_BASE           (SPRD_EIC_BASE)
+
+/* Analog GPIO/EIC base address */
+
+#if defined(CONFIG_ARCH_SCX35)
+#define ANA_CTL_EIC_BASE	   (ANA_EIC_BASE)
+#define ANA_CTL_GPIO_BASE      (ANA_GPIO_INT_BASE)
+#else
+#define ANA_CTL_EIC_BASE       (SPRD_MISC_BASE + 0x0100)
+#define ANA_CTL_GPIO_BASE      (SPRD_MISC_BASE + 0x0480)
+#endif
+
+
+enum {
+       ENUM_ID_D_GPIO = 0,
+       ENUM_ID_D_EIC,
+       ENUM_ID_A_GPIO,
+       ENUM_ID_A_EIC,
+
+       ENUM_ID_END_NR,
+};
+
+struct eic_gpio_resource {
+       int irq;
+       int base_addr;
+       int chip_base;
+       int chip_ngpio;
+};
+
+static inline int irq_to_gpio(int irq)
+{
+	return irq - GPIO_IRQ_START;
+}
+
+#endif
diff --git a/arch/arm/mach-sc/include/mach/io.h b/arch/arm/mach-sc/include/mach/io.h
new file mode 100644
index 00000000..a023948b
--- /dev/null
+++ b/arch/arm/mach-sc/include/mach/io.h
@@ -0,0 +1,25 @@
+/*
+ * Copyright (C) 2012 Spreadtrum Communications Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __ASM_ARM_ARCH_IO_H
+#define __ASM_ARM_ARCH_IO_H
+
+#include <asm/system.h>
+#include <asm/io.h>
+
+#define IO_SPACE_LIMIT		0xffffffff
+
+#define __io(a)			((void __iomem *)(a))
+#define __mem_pci(a)		(a)
+
+#endif
diff --git a/arch/arm/mach-sc/include/mach/irqs.h b/arch/arm/mach-sc/include/mach/irqs.h
new file mode 100755
index 00000000..54ce8732
--- /dev/null
+++ b/arch/arm/mach-sc/include/mach/irqs.h
@@ -0,0 +1,34 @@
+/*
+ * Copyright (C) 2012 Spreadtrum Communications Inc.
+ * 
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __ASM_ARCH_SCI_IRQS_H
+#define __ASM_ARCH_SCI_IRQS_H
+
+#if defined(CONFIG_ARCH_SCX35)
+#include "__irqs-sc8830.h"
+#elif defined(CONFIG_ARCH_SC8825)
+#include "__irqs-sc8825.h"
+#else
+#error "Unknown architecture specification"
+#endif
+
+#ifndef __ASSEMBLY__
+
+//	/*raw interrupt intc interrupt enable */
+//	void sci_intc_unmask(u32 irq);
+//	/*raw interrupt intc interrupt disable */
+//	void sci_intc_mask(u32 irq);
+
+#endif
+
+#endif
diff --git a/arch/arm/mach-sc/include/mach/timex.h b/arch/arm/mach-sc/include/mach/timex.h
new file mode 100644
index 00000000..26298250
--- /dev/null
+++ b/arch/arm/mach-sc/include/mach/timex.h
@@ -0,0 +1,20 @@
+/*
+ * Copyright (C) 2012 Spreadtrum Communications Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+
+#ifndef __ASM_ARCH_TIMEX_H
+#define __ASM_ARCH_TIMEX_H __FILE__
+
+#define CLOCK_TICK_RATE		32768
+
+#endif
diff --git a/arch/arm/mach-sc/include/mach/uncompress.h b/arch/arm/mach-sc/include/mach/uncompress.h
new file mode 100644
index 00000000..89d7a9d4
--- /dev/null
+++ b/arch/arm/mach-sc/include/mach/uncompress.h
@@ -0,0 +1,33 @@
+/*
+ * Copyright (C) 2012 Spreadtrum Communications Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __ASM_ARCH_UNCOMPRESS_H
+
+#include <soc/sprd/hardware.h>
+
+static inline void putc(int c)
+{
+}
+
+static inline void flush(void)
+{
+}
+
+static inline void arch_decomp_setup(void)
+{
+}
+
+static inline void arch_decomp_wdog(void)
+{
+}
+#endif
diff --git a/arch/arm/mach-sc/mach-scx35-dt.c b/arch/arm/mach-sc/mach-scx35-dt.c
new file mode 100644
index 00000000..4334bd50
--- /dev/null
+++ b/arch/arm/mach-sc/mach-scx35-dt.c
@@ -0,0 +1,334 @@
+/*
+ * Copyright (C) 2012 Spreadtrum Communications Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/export.h>
+#include <asm/io.h>
+#include <asm/setup.h>
+#include <asm/mach/time.h>
+#include <asm/mach/arch.h>
+#include <asm/mach-types.h>
+#include <linux/irqchip/arm-gic.h>
+#include <asm/hardware/cache-l2x0.h>
+#include <asm/localtimer.h>
+#include <linux/of_platform.h>
+#include <linux/of_address.h>
+#include <linux/clocksource.h>
+#include <linux/clk-provider.h>
+#include <soc/sprd/hardware.h>
+#include <soc/sprd/adi.h>
+#include <soc/sprd/adc.h>
+#include <soc/sprd/board.h>
+#include <soc/sprd/sci.h>
+#include <soc/sprd/sci_glb_regs.h>
+#include <soc/sprd/hardware.h>
+
+extern void __init sci_reserve(void);
+extern void __init sci_map_io(void);
+extern void __init sci_init_irq(void);
+extern void __init sci_timer_init(void);
+extern int __init sci_clock_init(void);
+extern int __init sci_regulator_init(void);
+#ifdef CONFIG_ANDROID_RAM_CONSOLE
+extern int __init sprd_ramconsole_init(void);
+#endif
+
+struct class *sec_class;
+EXPORT_SYMBOL(sec_class);
+
+static int calibration_mode = false;
+static int __init calibration_start(char *str)
+{
+	int calibration_device =0;
+	int mode=0,freq=0,device=0;
+	if(str){
+		pr_info("modem calibartion:%s\n", str);
+		sscanf(str, "%d,%d,%d", &mode,&freq,&device);
+	}
+	if(device & 0x80){
+		calibration_device = device & 0xf0;
+		calibration_mode = true;
+		pr_info("calibration device = 0x%x\n",calibration_device);
+	}
+	return 1;
+}
+__setup("calibration=", calibration_start);
+
+//int in_calibration(void)
+//{
+//	return (int)(calibration_mode == true);
+//}
+
+//EXPORT_SYMBOL(in_calibration);
+
+//int in_autotest(void)
+//{
+//	return 0;
+//}
+
+//EXPORT_SYMBOL(in_autotest);
+
+int __init __clock_init_early(void)
+{
+	pr_info("ahb ctl0 %08x, ctl2 %08x glb aon apb0 %08x aon apb1 %08x clk_en %08x\n",
+			sci_glb_raw_read(REG_AP_AHB_AHB_EB),
+			sci_glb_raw_read(REG_AP_AHB_AHB_RST),
+			sci_glb_raw_read(REG_AON_APB_APB_EB0),
+			sci_glb_raw_read(REG_AON_APB_APB_EB1),
+			sci_glb_raw_read(REG_AON_CLK_PUB_AHB_CFG));
+
+	sci_glb_clr(REG_AP_AHB_AHB_EB,
+			BIT_BUSMON2_EB		|
+			BIT_BUSMON1_EB		|
+			BIT_BUSMON0_EB		|
+			//BIT_SPINLOCK_EB		|
+			BIT_GPS_EB		|
+			//BIT_EMMC_EB		|
+			//BIT_SDIO2_EB		|
+			//BIT_SDIO1_EB		|
+			//BIT_SDIO0_EB		|
+			BIT_DRM_EB		|
+			BIT_NFC_EB		|
+			//BIT_DMA_EB		|
+			//BIT_USB_EB		|
+			//BIT_GSP_EB		|
+			//BIT_DISPC1_EB		|
+			//BIT_DISPC0_EB		|
+			//BIT_DSI_EB		|
+			0);
+	sci_glb_clr(REG_AP_APB_APB_EB,
+			BIT_INTC3_EB		|
+			BIT_INTC2_EB		|
+			BIT_INTC1_EB		|
+			BIT_IIS1_EB		|
+			BIT_UART2_EB		|
+			BIT_UART0_EB		|
+			BIT_SPI1_EB		|
+			BIT_SPI0_EB		|
+			BIT_IIS0_EB		|
+			BIT_I2C0_EB		|
+			BIT_SPI2_EB		|
+			BIT_UART3_EB		|
+			0);
+	sci_glb_clr(REG_AON_APB_APB_RTC_EB,
+			BIT_KPD_RTC_EB		|
+			BIT_KPD_EB		|
+			BIT_EFUSE_EB		|
+			0);
+
+	sci_glb_clr(REG_AON_APB_APB_EB0,
+			BIT_AUDIF_EB			|
+			BIT_VBC_EB			|
+			BIT_PWM3_EB			|
+			BIT_PWM1_EB			|
+			0);
+	sci_glb_clr(REG_AON_APB_APB_EB1,
+			BIT_AUX1_EB			|
+			BIT_AUX0_EB			|
+			0);
+
+	printk("sc clock module early init ok\n");
+	return 0;
+}
+
+static inline int	__sci_get_chip_id(void)
+{
+	return __raw_readl(CHIP_ID_LOW_REG);
+}
+const struct of_device_id of_sprd_default_bus_match_table[] = {
+	{ .compatible = "simple-bus", },
+	{ .compatible = "sprd,adi-bus", },
+	{}
+};
+
+static struct of_dev_auxdata of_sprd_default_bus_lookup[] = {
+	{ .compatible = "sprd,sprd_backlight",  .name = "sprd_backlight" },
+	{}
+};
+
+struct iotable_sprd io_addr_sprd;
+EXPORT_SYMBOL(io_addr_sprd);
+
+int iotable_build()
+{
+	struct device_node *np;
+	struct resource res;
+
+#define ADD_SPRD_DEVICE(compat, id)			\
+do {							\
+	np = of_find_compatible_node(NULL, NULL, compat);\
+	if (of_can_translate_address(np)) {		\
+		of_address_to_resource(np, 0, &res);	\
+		io_addr_sprd.id.paddr = res.start;	\
+		io_addr_sprd.id.length =		\
+			resource_size(&res);		\
+		io_addr_sprd.id.vaddr =			\
+		ioremap_nocache(res.start, io_addr_sprd.id.length);\
+		pr_debug("sprd io map: phys=%08x virt=%08x size=%08x\n", \
+	io_addr_sprd.id.paddr, io_addr_sprd.id.vaddr, io_addr_sprd.id.length);\
+	}						\
+} while (0)
+#define ADD_SPRD_DEVICE_BY_NAME(name, id)		\
+do {							\
+	np = of_find_node_by_name(NULL, name);		\
+	if (of_can_translate_address(np)) {		\
+		of_address_to_resource(np, 0, &res);	\
+		io_addr_sprd.id.paddr = res.start;	\
+		io_addr_sprd.id.length =		\
+			resource_size(&res);		\
+		io_addr_sprd.id.vaddr =			\
+		ioremap_nocache(res.start, io_addr_sprd.id.length);\
+		pr_debug("sprd io map: phys=%16lx virt=%16lx size=%16lx\n", \
+	io_addr_sprd.id.paddr, io_addr_sprd.id.vaddr, io_addr_sprd.id.length);\
+	}						\
+} while (0)
+	ADD_SPRD_DEVICE("sprd,ahb", AHB);
+	ADD_SPRD_DEVICE("sprd,aonapb", AONAPB);
+	ADD_SPRD_DEVICE("sprd,aonckg", AONCKG);
+	ADD_SPRD_DEVICE("sprd,apbreg", APBREG);
+	ADD_SPRD_DEVICE("sprd,core", CORE);
+	ADD_SPRD_DEVICE("sprd,mmahb", MMAHB);
+	ADD_SPRD_DEVICE("sprd,pmu", PMU);
+	ADD_SPRD_DEVICE("sprd,mmckg", MMCKG);
+	ADD_SPRD_DEVICE("sprd,gpuapb", GPUAPB);
+	ADD_SPRD_DEVICE("sprd,apbckg", APBCKG);
+	ADD_SPRD_DEVICE("sprd,gpuckg", GPUCKG);
+	ADD_SPRD_DEVICE("sprd,int", INT);
+	ADD_SPRD_DEVICE("sprd,intc0", INTC0);
+	ADD_SPRD_DEVICE("sprd,intc1", INTC1);
+	ADD_SPRD_DEVICE("sprd,intc2", INTC2);
+	ADD_SPRD_DEVICE("sprd,intc3", INTC3);
+	ADD_SPRD_DEVICE("sprd,uidefuse", UIDEFUSE);
+	ADD_SPRD_DEVICE("sprd,isp", ISP);
+	ADD_SPRD_DEVICE("sprd,ca7wdg", CA7WDG);
+	ADD_SPRD_DEVICE("sprd,csi2", CSI2);
+	ADD_SPRD_DEVICE("sprd,d-eic-gpio", EIC);
+	ADD_SPRD_DEVICE("sprd,wdg", WDG);
+	ADD_SPRD_DEVICE("sprd,ipi", IPI);
+	ADD_SPRD_DEVICE("sprd,dcam", DCAM);
+	ADD_SPRD_DEVICE("sprd,syscnt", SYSCNT);
+	ADD_SPRD_DEVICE("sprd,dma0", DMA0);
+	ADD_SPRD_DEVICE("sprd,pub", PUB);
+	ADD_SPRD_DEVICE("sprd,pin", PIN);
+	ADD_SPRD_DEVICE("sprd,d-gpio-gpio", GPIO);
+	ADD_SPRD_DEVICE("sprd,codecahb", CODECAHB);
+	ADD_SPRD_DEVICE_BY_NAME("hwspinlock0", HWSPINLOCK0);
+	ADD_SPRD_DEVICE_BY_NAME("hwspinlock1", HWSPINLOCK1);
+
+	return 0;
+}
+
+static void __init sc8830_init_machine(void)
+{
+	printk("sci get chip id = 0x%x\n",__sci_get_chip_id());
+
+	sci_adc_init();
+	sci_regulator_init();
+#if defined(CONFIG_PSTORE_RAM) && defined(SPRD_ION_BASE_USE_VARIABLE)
+	{
+		extern void init_pstore_addr_param(void);
+		init_pstore_addr_param();
+	}
+#endif
+	of_platform_populate(NULL, of_sprd_default_bus_match_table, of_sprd_default_bus_lookup, NULL);
+	sec_class = class_create(THIS_MODULE, "sec");
+        if (IS_ERR(sec_class)) {
+		pr_err("Failed to create class(sec)!\n");
+		printk("Failed create class \n");
+		return PTR_ERR(sec_class);
+	}
+}
+
+const struct of_device_id of_sprd_late_bus_match_table[] = {
+	{ .compatible = "sprd,sound", },
+	{}
+};
+
+static void __init sc8830_init_late(void)
+{
+	of_platform_populate(of_find_node_by_path("/sprd-audio-devices"),
+			of_sprd_late_bus_match_table, NULL, NULL);
+}
+
+extern void __init sc_init_chip_id(void);
+void __init sprd_init_before_irq(void)
+{
+	iotable_build();
+	sc_init_chip_id();
+	/* earlier init request than irq and timer */
+	__clock_init_early();
+	/*ipi reg init for sipc*/
+	sci_glb_set(REG_AON_APB_APB_EB0, BIT_IPI_EB);
+}
+static void __init sc8830_pmu_init(void)
+{
+	__raw_writel(__raw_readl(REG_PMU_APB_PD_MM_TOP_CFG)
+			& ~(BIT_PD_MM_TOP_FORCE_SHUTDOWN),
+			REG_PMU_APB_PD_MM_TOP_CFG);
+
+	__raw_writel(__raw_readl(REG_PMU_APB_PD_GPU_TOP_CFG)
+			& ~(BIT_PD_GPU_TOP_FORCE_SHUTDOWN),
+			REG_PMU_APB_PD_GPU_TOP_CFG);
+
+	__raw_writel(__raw_readl(REG_AON_APB_APB_EB0) | BIT_MM_EB | BIT_GPU_EB, 
+		REG_AON_APB_APB_EB0);
+
+	/* only need open this power init in Tshark2 */
+#if defined(CONFIG_ARCH_SCX30G2)
+	__raw_writel(__raw_readl(REG_AON_APB_APB_EB1) | BIT_CODEC_EB, 
+		 REG_AON_APB_APB_EB1);
+#endif
+
+	__raw_writel(__raw_readl(REG_MM_AHB_AHB_EB) | BIT_MM_CKG_EB,
+			REG_MM_AHB_AHB_EB);
+
+	__raw_writel(__raw_readl(REG_MM_AHB_GEN_CKG_CFG)
+			| BIT_MM_MTX_AXI_CKG_EN | BIT_MM_AXI_CKG_EN,
+			REG_MM_AHB_GEN_CKG_CFG);
+
+	__raw_writel(__raw_readl(REG_MM_CLK_MM_AHB_CFG) | 0x3,
+			REG_MM_CLK_MM_AHB_CFG);
+}
+
+extern void __init  sci_enable_timer_early(void);
+static void __init sprd_init_time(void)
+{
+	if(of_have_populated_dt()){
+		sc8830_pmu_init();
+		of_clk_init(NULL);
+		clocksource_of_init();
+	}else{
+		sci_clock_init();
+		sci_enable_timer_early();
+		sci_timer_init();
+	}
+}
+static const char *sprd_boards_compat[] __initdata = {
+	"sprd,scx35",
+	NULL,
+};
+extern struct smp_operations sprd_smp_ops;
+
+DT_MACHINE_START(SCPHONE, "sc8830")
+	.smp		= smp_ops(sprd_smp_ops),
+	.reserve	= sci_reserve,
+	.map_io		= sci_map_io,
+	.init_irq	= sci_init_irq,
+	.init_time	= sprd_init_time,
+	.init_machine	= sc8830_init_machine,
+	.init_late	= sc8830_init_late,
+	.dt_compat = sprd_boards_compat,
+MACHINE_END
+
diff --git a/arch/arm/mach-sc/sec_gps_bcm47520.c b/arch/arm/mach-sc/sec_gps_bcm47520.c
new file mode 100644
index 00000000..4431fda6
--- /dev/null
+++ b/arch/arm/mach-sc/sec_gps_bcm47520.c
@@ -0,0 +1,147 @@
+#include <linux/platform_device.h>

+#include <linux/io.h>

+#include <linux/gpio.h>

+#include <linux/of.h>

+#include <linux/of_gpio.h>

+#include <asm/uaccess.h>

+//#include "devices.h"

+#include <soc/sprd/board.h>

+#include <linux/regulator/consumer.h>

+#include <soc/sprd/regulator.h>

+#include <linux/errno.h>

+#include <linux/err.h>

+#include <linux/types.h>

+#include <linux/clk.h>

+#include <soc/sprd/pinmap.h>

+#include <linux/proc_fs.h>

+#include <linux/irq.h>

+

+static struct device *gps_dev;

+extern struct class *sec_class;

+

+static int gps_clk_init(void)

+{

+    struct clk *gps_clk;

+    struct clk *clk_parent;

+    const char *clk_32k= "clk_aux0";

+

+    gps_clk = clk_get(NULL, clk_32k);

+    if (IS_ERR(gps_clk)) {

+        printk("%s: failed to get clk_aux0.\n", __func__);

+        return -1;

+    }

+    clk_parent = clk_get(NULL, "ext_32k");

+    if (IS_ERR(clk_parent)) {

+        printk("%s: failed to get parent ext_32k.\n", __func__);

+        return -1;

+    } else {

+        clk_set_parent(gps_clk, clk_parent);

+        clk_set_rate(gps_clk, 32000);

+        if(!clk_prepare_enable(gps_clk))

+            pr_info("%s: %s enabled!!\n", __func__, clk_32k);

+        //clk_enable(gps_clk);

+    }

+    return 0;

+}

+

+static int gps_regulator_on(struct device_node *root_node)

+{

+    static struct regulator *gps_regulator = NULL;

+    static struct regulator *tcxo_regulator = NULL;

+    static unsigned int gps_regulator_volt = 1800000;

+    static unsigned int tcxo_regulator_volt = 0;

+    const char *reg = NULL;

+    const char *reg_tcxo = NULL;

+

+    /* regulator enable from dts */

+    if(of_property_read_string(root_node, "gps-regulator", &reg)) {

+        printk("%s: Failed to get main-regulator from dts.\n", __func__);

+        return -1;

+    }

+    if(of_property_read_string(root_node, "tcxo-regulator", &reg_tcxo))

+        printk("%s: tcxo-regulator field is empty from dts.\n", __func__);

+

+    if(gps_regulator == NULL) {

+        gps_regulator = regulator_get(NULL, reg);

+        if (IS_ERR(gps_regulator)) {

+            gps_regulator = NULL;

+            return -1;

+        }

+    }

+    if(tcxo_regulator == NULL) {

+        tcxo_regulator = regulator_get(NULL, reg_tcxo);

+        if(IS_ERR(tcxo_regulator)) {

+            tcxo_regulator = NULL;

+        }

+    }

+    regulator_set_voltage(gps_regulator, gps_regulator_volt, gps_regulator_volt);

+    if(!regulator_enable(gps_regulator))

+        pr_info("%s: (%s) main(%d uV) regulator turned ON!!\n", __func__, reg, gps_regulator_volt);

+    if(of_property_read_u32(root_node, "tcxo-regulator-volt", &tcxo_regulator_volt)) {

+        printk("%s: tcxo-requlator-volt field is empty from dts.\n", __func__);

+        return 0;

+    }

+    regulator_set_voltage(tcxo_regulator, tcxo_regulator_volt, tcxo_regulator_volt);

+    if(!regulator_enable(tcxo_regulator))

+        pr_info("%s: (%s) tcxo(%d uV) regulator turned ON!!\n", __func__, reg_tcxo, tcxo_regulator_volt);

+

+    return 0;

+}

+

+static unsigned int gps_pwr_on = 0;

+

+static int __init gps_bcm47520_init(void)

+{

+    const char *gps_node = "broadcom,bcm47520";

+    const char *gps_pwr_en = "gps-pwr-en";

+    struct device_node *root_node = NULL;

+    int ret = 0;

+

+    pr_info("%s\n", __func__);

+

+    BUG_ON(!sec_class);

+    gps_dev = device_create(sec_class, NULL, 0, NULL, "gps");

+    BUG_ON(!gps_dev);

+

+    root_node = of_find_compatible_node(NULL, NULL, gps_node);

+    if(!root_node) {

+        printk("failed to get device node of %s\n", gps_node);

+        ret = -ENODEV;

+        goto err_sec_device_create;

+    }

+    if(gps_regulator_on(root_node)) {

+        printk("gps_regualtor_on() failed\n");

+        ret = -ENODEV;

+        goto err_find_node;

+    }

+    if(gps_clk_init()) {

+        printk("gps_clk_init() failed\n");

+        ret = -ENODEV;

+        goto err_find_node;

+    }

+    gps_pwr_on = of_get_named_gpio(root_node, gps_pwr_en, 0);

+    if(!gpio_is_valid(gps_pwr_on)) {

+        printk("%s: Invalid gpio pin : %d\n", __func__, gps_pwr_on);

+        ret = -ENODEV;

+        goto err_find_node;

+    }

+    if (gpio_request(gps_pwr_on, "GPS_PWR_EN")) {

+        printk("fail to request gpio(GPS_PWR_EN)\n");

+        ret = -ENODEV;

+        goto err_find_node;

+    }

+    gpio_direction_output(gps_pwr_on, 0);

+    gpio_export(gps_pwr_on, 1);

+    gpio_export_link(gps_dev, "GPS_PWR_EN", gps_pwr_on);

+

+    return 0;

+

+err_find_node:

+    of_node_put(root_node);

+err_sec_device_create:

+    device_destroy(sec_class, gps_dev->devt);

+    return ret;

+}

+

+device_initcall(gps_bcm47520_init);

+

diff --git a/arch/arm/mach-sc/syssleep.c b/arch/arm/mach-sc/syssleep.c
new file mode 100755
index 00000000..cd86275f
--- /dev/null
+++ b/arch/arm/mach-sc/syssleep.c
@@ -0,0 +1,69 @@
+/*
+ * Copyright (C) 2013 Spreadtrum Communications Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/proc_fs.h>
+#include <soc/sprd/hardware.h>
+#include <asm/uaccess.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/io.h>
+#include <linux/delay.h>
+#include <soc/sprd/sci.h>
+#include <soc/sprd/sci_glb_regs.h>
+
+static int syssleep_read_proc(char *page, char **start, off_t off,
+			  int count, int *eof, void *data)
+{
+	return 0;
+}
+
+static int syssleep_write_proc(struct file *file, const char __user *buffer,
+			   unsigned long count, void *data)
+{
+#if 0
+    sci_glb_write(REG_PMU_APB_PD_CP0_ARM9_0_CFG, BIT(24) | BIT(25), -1UL);
+    sci_glb_write(REG_PMU_APB_PD_CP0_HU3GE_CFG, BIT(24) | BIT(25), -1UL);
+    sci_glb_write(REG_PMU_APB_PD_CP0_GSM_CFG, BIT(24) | BIT(25), -1UL);
+    sci_glb_write(REG_PMU_APB_PD_CP0_L1RAM_CFG, BIT(24) | BIT(25), -1UL);
+    sci_glb_write(REG_PMU_APB_PD_CP0_SYS_CFG, BIT(25) | BIT(28), -1UL);
+#else
+    sci_glb_write(REG_PMU_APB_PD_CP0_ARM9_0_CFG, BIT(24) | BIT(25), -1UL);
+    sci_glb_write(REG_PMU_APB_PD_CP0_HU3GE_CFG, BIT(24) | BIT(25), -1UL);
+    sci_glb_write(REG_PMU_APB_PD_CP0_GSM_CFG, BIT(24) | BIT(25), -1UL);
+    sci_glb_write(REG_PMU_APB_PD_CP0_TD_CFG, BIT(24) | BIT(25), -1UL);
+    sci_glb_write(REG_PMU_APB_PD_CP0_CEVA_CFG, BIT(24) | BIT(25), -1UL);
+    sci_glb_write(REG_PMU_APB_PD_CP0_SYS_CFG, BIT(25) | BIT(28), -1UL);
+    sci_glb_write(REG_PMU_APB_SLEEP_CTRL,BIT(12),BIT(12));
+#endif
+    //sci_glb_write(REG_PMU_APB_CP_SOFT_RST,0x7,-1UL);
+    //msleep(1000);
+    //sci_glb_write(REG_PMU_APB_CP_SOFT_RST,0x6,-1UL);
+    return count;
+}
+
+static const struct file_operations syssleep_proc_fops = {
+    .owner      = THIS_MODULE,
+    .read       = syssleep_read_proc,
+    .write      = syssleep_write_proc,
+};
+
+static int __init syssleep_init(void)
+{
+    printk("syssleep_init \n");
+    proc_create("syssleep", 0777, NULL, &syssleep_proc_fops);
+	return 0;
+}
+
+module_init(syssleep_init);