Initial file dump from open source releaseHEADmaster

1 files changed, 556 insertions, 0 deletions

diff --git a/arch/arm/boot/dts/sprd-scx35.dtsi b/arch/arm/boot/dts/sprd-scx35.dtsi
new file mode 100644
index 00000000..713f0595
--- /dev/null
+++ b/arch/arm/boot/dts/sprd-scx35.dtsi
@@ -0,0 +1,556 @@
+/*
+ * Copyright (C) 2013 Spreadtrum Communication Incorporated
+ *		http://www.spreadtrum.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+/include/ "skeleton.dtsi"
+/include/ "scx30g-clocks.dtsi"
+/include/ "sc2723-regulators.dtsi"
+/include/ "sprd-sound.dtsi"
+
+/ {
+	compatible = "sprd,scx35";
+	sprd,sc-id = <8830 1 0x20000>;
+	#address-cells = <1>;
+	#size-cells = <1>;
+	interrupt-parent = <&gic>;
+
+	aliases {
+		serial0 = &uart0;
+		serial1 = &uart1;
+		serial2 = &uart2;
+		serial3 = &uart3;
+		i2c0 = &i2c0;
+		i2c1 = &i2c1;
+		i2c2 = &i2c2;
+		i2c3 = &i2c3;
+		lcd0 = &fb0;
+		spi0 = &spi0;
+		spi1 = &spi1;
+		spi2 = &spi2;
+		hwspinlock0 = &hwspinlock0;
+		hwspinlock1 = &hwspinlock1;
+	};
+
+	gic: interrupt-controller@12001000 {
+		compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
+		#interrupt-cells = <3>;
+		#address-cells = <0>;
+		interrupt-controller;
+		reg = <0x12001000 0x1000>,
+			<0x12002000 0x1000>;
+	};
+
+	uart0: uart@f5360000 {
+		compatible  = "sprd,serial";
+		interrupts = <0 2 0x0>;
+		reg = <0xf5360000 0x1000>;
+		clock-names = "clk_uart0";
+		clocks = <&clock 60>;
+		sprdclk = <48000000>;
+		sprdwaketype = "BT_RTS_HIGH_WHEN_SLEEP";
+	};
+
+	uart1: uart@f5362000 {
+		compatible  = "sprd,serial";
+		interrupts = <0 3 0x0>;
+		reg = <0xf5362000 0x1000>;
+		clock-names = "clk_uart1";
+		clocks = <&clock 61>;
+		sprdclk = <26000000>;
+		sprdwaketype = "BT_RTS_HIGH_WHEN_SLEEP";
+	};
+
+	uart2: uart@f5364000 {
+		compatible  = "sprd,serial";
+		interrupts = <0 4 0x0>;
+		reg = <0xf5364000 0x1000>;
+		clock-names = "clk_uart2";
+		clocks = <&clock 62>;
+		sprdclk = <26000000>;
+		sprdwaketype = "BT_RTS_HIGH_WHEN_SLEEP";
+	};
+
+	uart3: uart@f5366000 {
+		compatible  = "sprd,serial";
+		interrupts = <0 5 0x0>;
+		reg = <0xf5366000 0x1000>;
+		clock-names = "clk_uart3";
+		clocks = <&clock 63>;
+		sprdclk = <26000000>;
+		sprdwaketype = "BT_RTS_HIGH_WHEN_SLEEP";
+	};
+
+	timer {
+		compatible  = "sprd,scx35-timer";
+		reg = <0xf5204000 0x1000>,
+			<0xf51f4000 0x1000>,
+			<0xf5202000 0x1000>,
+			<0xf5292000 0x1000>,
+			<0xf5294000 0x1000>;
+		interrupts = <0 118 0x0>,
+					<0 28 0x0>,
+					<0 29 0x0>,
+					<0 119 0x0>,
+					<0 121 0x0>;
+	};
+
+	clock: clockdevice {
+		compatible = "sprd,scx35-clock";
+		#clock-cells = <1>;
+	};
+
+	d_eic_gpio: gpio@f5200000 {
+		compatible = "sprd,d-eic-gpio";
+		reg = <0Xf5200000 0x1000>;
+		gpio-controller;
+		interrupt-controller;
+		#interrupt-cells = <2>;
+		#gpio-cells = <2>;
+		gpiobase = <288>;
+		ngpios = <16>;
+		interrupts = <0 37 0x0>;
+	};
+
+	d_gpio_gpio: gpio@f5220000 {
+		compatible = "sprd,d-gpio-gpio";
+		reg = <0Xf5220000 0x1000>;
+		gpio-controller;
+		interrupt-controller;
+		#interrupt-cells = <2>;
+		#gpio-cells = <2>;
+		gpiobase = <0>;
+		ngpios = <256>;
+		interrupts = <0 35 0x0>;
+	};
+
+	adic: adic {
+		compatible = "sprd,adic";
+		reg = <0Xf53f0000 0x1000>;
+	};
+
+	pinctrl {
+		compatible = "sprd,pinctrl";
+		reg = <0xf5224000 0x1000>;
+		pwr_domain = "vdd28",
+					"vdd28",
+					"vddsim0",
+					"vddsim1",
+					"vddsim2",
+					"vddsdcore",
+					"vdd18";
+		 ctrl_desc = <0x10 0 1
+					0x10 1 1
+					0x10 2 1
+					0x10 3 1
+					0x10 4 1
+					0x10 5 1
+					0x10 6 1>;
+	};
+
+	adi: adi_bus {
+		compatible = "sprd,adi-bus";
+		interrupts = <0 38 0x0>;
+		reg = <0Xf53f8000 0x1000>;
+		interrupt-controller;
+		sprd,irqnums = <11>;
+		#interrupt-cells = <2>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges = <0X40 0Xf53f8040 0x40>,
+				<0X80 0Xf53f8080 0x80>,
+				<0X100 0Xf53f8100 0x80>,
+				<0X480 0Xf53f8480 0x80>;
+
+		watchdog@40 {
+			compatible = "sprd,watchdog";
+			reg = <0X40 0x40>;
+			interrupts = <3 0x0>;
+		};
+
+		rtc@80 {
+			compatible = "sprd,rtc";
+			reg = <0X80 0x80>;
+			interrupts = <2 0x0>;
+		};
+
+		a_eic_gpio: gpio@100 {
+				compatible = "sprd,a-eic-gpio";
+				reg = <0X100 0x80>; /* adi reg */
+				gpio-controller;
+				interrupt-controller;
+				#interrupt-cells = <2>;
+				#gpio-cells = <2>;
+				gpiobase = <304>;
+				ngpios = <16>;
+				interrupt-parent = <&adi>;
+				interrupts = <5 0x0>; /* ext irq 5 */
+		};
+
+		a_gpio_gpio: gpio@480 {
+				compatible = "sprd,a-gpio-gpio";
+				reg = <0X480 0x80>; /* adi reg */
+				gpio-controller;
+				interrupt-controller;
+				#interrupt-cells = <2>;
+				#gpio-cells = <2>;
+				gpiobase = <256>;
+				ngpios = <32>;
+				interrupt-parent = <&adi>;
+				interrupts = <1 0x0>; /* ext irq 1 */
+		};
+	};
+
+	keypad@f5208000 {
+		compatible = "sprd,sci-keypad";
+		reg = <0Xf5208000 0x1000>;
+		gpios = <&a_eic_gpio 2 0>;
+		interrupts = <0 36 0x0>;
+		sprd,keypad-num-rows = <2>;
+		sprd,keypad-num-columns = <2>;
+		sprd,keypad-rows-choose-hw = <0x30000>;
+		sprd,keypad-cols-choose-hw = <0x300>;
+		sprd,debounce_time = <5000>;
+		linux,keypad-no-autorepeat;
+		sprd,support_long_key;
+
+		key_volume_down {
+			keypad,row = <1>;
+			keypad,column = <0>;
+			linux,code = <114>;
+		};
+
+		key_volume_up {
+			keypad,row = <0>;
+			keypad,column = <0>;
+			linux,code = <115>;
+		};
+
+		key_home {
+			keypad,row = <0>;
+			keypad,column = <1>;
+			linux,code = <102>;
+		};
+	};
+
+	i2c0: i2c@f536a000 {
+		compatible  = "sprd,i2c";
+		interrupts = <0 11 0x0>;
+		reg = <0xf536a000 0x1000>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+	};
+
+	i2c1: i2c@f536c000 {
+		compatible  = "sprd,i2c";
+		interrupts = <0 12 0x0>;
+		reg = <0xf536c000 0x1000>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+	};
+
+	i2c2: i2c@f5370000 {
+		compatible  = "sprd,i2c";
+		interrupts = <0 13 0x0>;
+		reg = <0xf5370000 0x1000>;
+		#address-cells = <1>;
+	};
+
+	i2c3: i2c@f5372000 {
+		compatible  = "sprd,i2c";
+		interrupts = <0 14 0x0>;
+		reg = <0xf5372000 0x1000>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+	};
+
+	gsp:gsp@20a00000 {
+		compatible = "sprd,gsp";
+		reg = <0xf5126000 0x1000>;
+		interrupts = <0 51 0x0>;
+		clock-names = "clk_gsp", "clk_gsp_emc", "clk_gsp_parent", "clk_aon_apb";
+		clocks = <&clk_gsp>, <&clk_gsp_emc>, <&clk_256m>, <&clk_aon_apb>;
+		gsp_mmu_ctrl_base = <0xf5418000>;
+	};
+
+	usb: usb@f5116000 {
+		compatible  = "sprd,usb";
+		interrupts = <0 55 0x0>;
+		ngpios = <3>;
+		gpios = <&a_eic_gpio 0 0>,<&d_gpio_gpio 72 0>,<&d_gpio_gpio 152 0>;
+		reg = <0xf5116000 0x1000>;
+		usb-supply = <&vddusb>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+	};
+
+	sprd_thermal {
+		compatible = "sprd,sprd-thermal";
+		id = <0>;
+		interrupts = <0 26 0x0>;
+		reg = <0xf5260000 0x1000>;
+		trip_points_active = <105>;
+		trip_points_critical = <114>;
+		trip_num = <5>;
+	};
+
+	spi0: spi@70a00000 {
+		compatible  = "sprd,sprd-spi";
+		interrupts = <0 7 0x0>;
+		reg = <0xf5376000 0x1000>;
+		clock-names = "clk_spi0";
+		#address-cells = <1>;
+		#size-cells = <0>;
+	};
+
+	spi1: spi@70b00000 {
+		compatible  = "sprd,sprd-spi";
+		interrupts = <0 8 0x0>;
+		reg = <0xf5378000 0x1000>;
+		clock-names = "clk_spi1";
+		#address-cells = <1>;
+		#size-cells = <0>;
+	};
+
+	spi2: spi@70c00000 {
+		compatible  = "sprd,sprd-spi";
+		interrupts = <0 9 0x0>;
+		reg = <0xf537a000 0x1000>;
+		clock-names = "clk_spi2";
+		#address-cells = <1>;
+		#size-cells = <0>;
+	};
+
+	dmac: dmac@20100000 {
+		compatible  = "sprd,sprd-dma";
+		interrupts = <0 50 0x0>;
+		reg = <0xf5112000 0x4000>;
+	};
+
+	adc: adc@40038300 {
+		compatible  = "sprd,sprd-adc";
+		reg = <0xf53f8300 0x400>;
+	};
+
+	hwspinlock0: hwspinlock0@20c00000 {
+		compatible  = "sprd,sprd-hwspinlock";
+		reg = <0xf512a000 0x1000>;
+	};
+
+	hwspinlock1: hwspinlock1@40060000 {
+		compatible  = "sprd,sprd-hwspinlock";
+		reg = <0xf51f6000 0x1000>;
+	};
+
+	sprd_vsp@f5300000 {
+		compatible = "sprd,sprd_vsp";
+		reg = <0Xf5300000 0xc000>;
+		interrupts = <0 43 0x0>;
+		clock-names = "clk_mm_i", "clk_vsp","clk_mm_axi";
+		clocks = <&clk_mm>, <&clk_vsp>, <&clk_mm_axi>;
+		version = <0>;
+	};
+
+	sprd_jpg {
+		compatible  = "sprd,sprd_jpg";
+		reg = <0Xf5320000 0x8000>;
+		interrupts = <0 42 0x0>;
+		clock-names = "clk_mm_i","clk_jpg";
+		clocks = <&clk_mm>, <&clk_jpg>;
+	};
+
+	sprd_dcam {
+		compatible  = "sprd,sprd_dcam";
+		interrupts = <0 45 0>;
+		reg = <0xf52f0000 0x100000>;
+		clock-names = "clk_mm_i","clk_dcam";
+		clocks = <&clk_mm>, <&clk_dcam>;
+	};
+
+	sprd_scale {
+		compatible  = "sprd,sprd_scale";
+	};
+
+	sprd_rotation {
+		compatible  = "sprd,sprd_rotation";
+	};
+
+	sprd_isp {
+		compatible  = "sprd,sprd_isp";
+		clock-names = "clk_mm_i","clk_isp";
+		clocks = <&clk_mm>, <&clk_isp>;
+	};
+
+	sprd_dma_copy {
+		compatible  = "sprd,sprd_dma_copy";
+	};
+
+	sdhci3: sdhci@f511c000 {
+		compatible  = "sprd,sdhci-shark";
+		interrupts = <0 60 0x0>;
+		reg = <0xf511c000 0x1000>;
+		id = <3>;
+		bus-width = <8>;
+		max-frequency = <384000000>;
+		keep-power-in-suspend = <1>;
+		non-removable = <1>;
+		caps = <0x80000800>;
+		caps2 = <0x202>;
+		host-caps-mask = <0x03000000>;
+		vdd-vmmc = "vddemmccore";
+		vdd-vqmmc = "vddgen1";
+		emmc-signal-supply = <&vddemmccore>;
+		vdd-level = <1200000 1300000 1500000 1800000>;
+		clock-names = "clk_emmc";
+		clocks = <&clk_emmc>, <&clk_384m>;
+		enb-bit = <0x800>;
+		rst-bit = <0x4000>;
+		write-delay = <0x04>;
+		read-pos-delay = <0x04>;
+		read-neg-delay = <0x04>;
+		keep-power = <0>;
+		runtime = <1>;
+	};
+
+	sdhci1: sdhci@f5118000 {
+		compatible  = "sprd,sdhci-shark";
+		interrupts = <0 58 0x0>;
+		reg = <0xf5118000 0x1000>;
+		id = <1>;
+		bus-width = <4>;
+		max-frequency = <96000000>;
+		keep-power-in-suspend = <1>;
+		cap-power-off-card = <1>;
+		caps = <0x80000000>;
+		clock-names = "clk_sdio1";
+		clocks = <&clk_sdio1>, <&clk_96m>;
+		enb-bit = <0x200>;
+		rst-bit = <0x1000>;
+		keep-power = <0>;
+		runtime = <1>;
+	};
+
+	sprd_iommu0:sprd_iommu@F5410000 {
+		compatible  = "sprd,sprd_iommu";//gsp
+		func-name = "sprd_iommu_gsp";
+		reg = <0x10000000 0x2000000>, //iova
+			<0xF5410000 0x8000>,  //pgt
+			<0xF5418000 0x8000>;  //ctrl_reg
+		reg_name = "iova","pgt","ctrl_reg";
+		clock-names = "clk_gsp_emc","clk_153m6","clk_gsp";
+		clocks = <&clk_gsp_emc>, <&clk_153m6>,<&clk_gsp>;
+		status = "ok";
+	};
+
+	sprd_iommu1:sprd_iommu@F5430000 {
+		compatible  = "sprd,sprd_iommu";//mm
+		func-name = "sprd_iommu_mm";
+		reg = <0x20000000 0x8000000>,   //iova
+			<0xF5430000 0x20000>,     //pgt
+			<0xF5450000 0x2000>;      //ctrl_reg
+		reg_name = "iova","pgt","ctrl_reg";
+		clock-names = "clk_mmu","clk_mm_i";
+		clocks = <&clk_mmu>,<&clk_mm>;
+		status = "ok";
+	};
+	/* cpw virtual devices */
+	spipe-cpw {
+		compatible = "sprd,spipe";
+		sprd,name = "spipe_w";
+		sprd,dst = <2>;
+		sprd,channel = <4>;
+		sprd,ringnr = <9>;
+		sprd,size-rxbuf = <0x1000>; /* 4*1024 */
+		sprd,size-txbuf = <0x1000>; /* 4*1024 */
+	};
+
+	slog-cpw {
+		compatible = "sprd,spipe";
+		sprd,name = "slog_w";
+		sprd,dst = <2>;
+		sprd,channel = <5>;
+		sprd,ringnr = <1>;
+		sprd,size-rxbuf = <0x40000>; /* 256*1024*/
+		sprd,size-txbuf = <0x8000>; /* 32*1024 */
+	};
+
+	stty-cpw {
+		compatible = "sprd,spipe";
+		sprd,name = "stty_w";
+		sprd,dst = <2>;
+		sprd,channel = <6>;
+		sprd,ringnr = <32>;
+		sprd,size-rxbuf = <0x0800>; /* 2*1024*/
+		sprd,size-txbuf = <0x0800>; /* 2*1024 */
+	};
+
+	seth0-cpw {
+		compatible = "sprd,seth";
+		sprd,name = "seth_w0";
+		sprd,dst = <2>;
+		sprd,channel = <7>;
+		sprd,blknum = <128>;
+	};
+
+	seth1-cpw {
+		compatible = "sprd,seth";
+		sprd,name = "seth_w1";
+		sprd,dst = <2>;
+		sprd,channel = <8>;
+		sprd,blknum = <64>;
+	};
+
+	seth2-cpw {
+		compatible = "sprd,seth";
+		sprd,name = "seth_w2";
+		sprd,dst = <2>;
+		sprd,channel = <9>;
+		sprd,blknum = <64>;
+	};
+
+	saudio_w {
+		compatible = "sprd,saudio";
+		sprd,saudio-dst-id = <2>;
+		sprd,saudio-names = "saudio_w";
+	};
+
+	saudio_voip {
+		compatible = "sprd,saudio";
+		sprd,saudio-dst-id = <2>;
+		sprd,saudio-names = "saudio_voip";
+	};
+};
+
+&vbc_r2p0 {
+	status = "okay";
+};
+
+&sprd_codec {
+	status = "okay";
+	sprd,audio_power_ver = <4>;
+};
+
+&i2s0 {
+	sprd,config = <&pcm_def_config>;
+	status = "okay";
+};
+
+&i2s1 {
+	status = "okay";
+};
+
+&i2s2 {
+	status = "okay";
+};
+
+&i2s3 {
+	status = "okay";
+};
+
+&i2s_sound {
+	sprd,i2s = <&i2s0>, <&i2s1>, <&i2s2>, <&i2s3>;
+};
+