diff options
Diffstat (limited to 'boards/ek-tm4c1294xl/interrupts')
30 files changed, 4694 insertions, 0 deletions
diff --git a/boards/ek-tm4c1294xl/interrupts/Makefile b/boards/ek-tm4c1294xl/interrupts/Makefile new file mode 100644 index 0000000..b29ffd9 --- /dev/null +++ b/boards/ek-tm4c1294xl/interrupts/Makefile @@ -0,0 +1,89 @@ +#******************************************************************************
+#
+# Makefile - Rules for building the interrupts example.
+#
+# Copyright (c) 2013-2014 Texas Instruments Incorporated. All rights reserved.
+# Software License Agreement
+#
+# Texas Instruments (TI) is supplying this software for use solely and
+# exclusively on TI's microcontroller products. The software is owned by
+# TI and/or its suppliers, and is protected under applicable copyright
+# laws. You may not combine this software with "viral" open-source
+# software in order to form a larger program.
+#
+# THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
+# NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
+# NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+# A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
+# CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
+# DAMAGES, FOR ANY REASON WHATSOEVER.
+#
+# This is part of revision 2.1.0.12573 of the EK-TM4C1294XL Firmware Package.
+#
+#******************************************************************************
+
+#
+# Defines the part type that this project uses.
+#
+PART=TM4C1294NCPDT
+
+#
+# The base directory for TivaWare.
+#
+ROOT=../../../..
+
+#
+# Include the common make definitions.
+#
+include ${ROOT}/makedefs
+
+#
+# Where to find source files that do not live in this directory.
+#
+VPATH=../drivers
+VPATH+=../../../../utils
+
+#
+# Where to find header files that do not live in the source directory.
+#
+IPATH=.
+IPATH+=..
+IPATH+=../../../..
+
+#
+# The default rule, which causes the interrupts example to be built.
+#
+all: ${COMPILER}
+all: ${COMPILER}/interrupts.axf
+
+#
+# The rule to clean out all the build products.
+#
+clean:
+ @rm -rf ${COMPILER} ${wildcard *~}
+
+#
+# The rule to create the target directory.
+#
+${COMPILER}:
+ @mkdir -p ${COMPILER}
+
+#
+# Rules for building the interrupts example.
+#
+${COMPILER}/interrupts.axf: ${COMPILER}/interrupts.o
+${COMPILER}/interrupts.axf: ${COMPILER}/pinout.o
+${COMPILER}/interrupts.axf: ${COMPILER}/startup_${COMPILER}.o
+${COMPILER}/interrupts.axf: ${COMPILER}/uartstdio.o
+${COMPILER}/interrupts.axf: ${ROOT}/driverlib/${COMPILER}/libdriver.a
+${COMPILER}/interrupts.axf: interrupts.ld
+SCATTERgcc_interrupts=interrupts.ld
+ENTRY_interrupts=ResetISR
+CFLAGSgcc=-DTARGET_IS_TM4C129_RA0
+
+#
+# Include the automatically generated dependency files.
+#
+ifneq (${MAKECMDGOALS},clean)
+-include ${wildcard ${COMPILER}/*.d} __dummy__
+endif
diff --git a/boards/ek-tm4c1294xl/interrupts/ccs/.ccsimportspec b/boards/ek-tm4c1294xl/interrupts/ccs/.ccsimportspec new file mode 100644 index 0000000..9033256 --- /dev/null +++ b/boards/ek-tm4c1294xl/interrupts/ccs/.ccsimportspec @@ -0,0 +1,8 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<importSpec>
+ <source root="..">
+ <file name="interrupts.c"/>
+ <file regex=".*_ccs\.cmd"/>
+ <file name="startup_ccs.c"/>
+ </source>
+</importSpec>
diff --git a/boards/ek-tm4c1294xl/interrupts/ccs/.ccsproject b/boards/ek-tm4c1294xl/interrupts/ccs/.ccsproject new file mode 100644 index 0000000..ac3158a --- /dev/null +++ b/boards/ek-tm4c1294xl/interrupts/ccs/.ccsproject @@ -0,0 +1,10 @@ +<?xml version="1.0" encoding="UTF-8" ?>
+<?ccsproject version="1.0"?>
+<projectOptions>
+ <deviceVariant value="Cortex M.TM4C1294NCPDT"/>
+ <deviceFamily value="TMS470"/>
+ <deviceEndianness value="little"/>
+ <codegenToolVersion value="5.0.4"/>
+ <isElfFormat value="true"/>
+ <rts value="libc.a"/>
+</projectOptions>
diff --git a/boards/ek-tm4c1294xl/interrupts/ccs/.cproject b/boards/ek-tm4c1294xl/interrupts/ccs/.cproject new file mode 100644 index 0000000..96b92a8 --- /dev/null +++ b/boards/ek-tm4c1294xl/interrupts/ccs/.cproject @@ -0,0 +1,191 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?>
+
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+ <name>interrupts</name>
+ <comment></comment>
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+ <link>
+ <name>interrupts.c</name>
+ <type>1</type>
+ <locationURI>SW_ROOT/examples/boards/ek-tm4c1294xl/interrupts/interrupts.c</locationURI>
+ </link>
+ <link>
+ <name>interrupts_ccs.cmd</name>
+ <type>1</type>
+ <locationURI>SW_ROOT/examples/boards/ek-tm4c1294xl/interrupts/interrupts_ccs.cmd</locationURI>
+ </link>
+ <link>
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+ <type>1</type>
+ <locationURI>SW_ROOT/examples/boards/ek-tm4c1294xl/interrupts/startup_ccs.c</locationURI>
+ </link>
+ <link>
+ <name>drivers/pinout.c</name>
+ <type>1</type>
+ <locationURI>SW_ROOT/examples/boards/ek-tm4c1294xl/drivers/pinout.c</locationURI>
+ </link>
+ <link>
+ <name>utils/uartstdio.c</name>
+ <type>1</type>
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diff --git a/boards/ek-tm4c1294xl/interrupts/ccs/.settings/org.eclipse.cdt.codan.core.prefs b/boards/ek-tm4c1294xl/interrupts/ccs/.settings/org.eclipse.cdt.codan.core.prefs new file mode 100644 index 0000000..98b6350 --- /dev/null +++ b/boards/ek-tm4c1294xl/interrupts/ccs/.settings/org.eclipse.cdt.codan.core.prefs @@ -0,0 +1,3 @@ +eclipse.preferences.version=1
+inEditor=false
+onBuild=false
diff --git a/boards/ek-tm4c1294xl/interrupts/ccs/Debug/interrupts.bin b/boards/ek-tm4c1294xl/interrupts/ccs/Debug/interrupts.bin Binary files differnew file mode 100644 index 0000000..54df0cf --- /dev/null +++ b/boards/ek-tm4c1294xl/interrupts/ccs/Debug/interrupts.bin diff --git a/boards/ek-tm4c1294xl/interrupts/ccs/Debug/interrupts.out b/boards/ek-tm4c1294xl/interrupts/ccs/Debug/interrupts.out Binary files differnew file mode 100644 index 0000000..905b572 --- /dev/null +++ b/boards/ek-tm4c1294xl/interrupts/ccs/Debug/interrupts.out diff --git a/boards/ek-tm4c1294xl/interrupts/ccs/macros.ini_initial b/boards/ek-tm4c1294xl/interrupts/ccs/macros.ini_initial new file mode 100644 index 0000000..31214b5 --- /dev/null +++ b/boards/ek-tm4c1294xl/interrupts/ccs/macros.ini_initial @@ -0,0 +1 @@ +SW_ROOT = ../../../../..
diff --git a/boards/ek-tm4c1294xl/interrupts/ccs/target_config.ccxml b/boards/ek-tm4c1294xl/interrupts/ccs/target_config.ccxml new file mode 100644 index 0000000..7a583d5 --- /dev/null +++ b/boards/ek-tm4c1294xl/interrupts/ccs/target_config.ccxml @@ -0,0 +1,13 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<configurations XML_version="1.2" id="configurations_0">
+ <configuration XML_version="1.2" id="Stellaris In-Circuit Debug Interface_0">
+ <instance XML_version="1.2" desc="Stellaris In-Circuit Debug Interface_0" href="connections/Stellaris_ICDI_Connection.xml" id="Stellaris In-Circuit Debug Interface_0" xml="Stellaris_ICDI_Connection.xml" xmlpath="connections"/>
+ <connection XML_version="1.2" id="Stellaris In-Circuit Debug Interface_0">
+ <instance XML_version="1.2" href="drivers/stellaris_cs_dap.xml" id="drivers" xml="stellaris_cs_dap.xml" xmlpath="drivers"/>
+ <instance XML_version="1.2" href="drivers/stellaris_cortex_m4.xml" id="drivers" xml="stellaris_cortex_m4.xml" xmlpath="drivers"/>
+ <platform XML_version="1.2" id="platform_0">
+ <instance XML_version="1.2" desc="Stellaris TM4C1294NCPDT_0" href="devices/tm4c1294ncpdt.xml" id="Stellaris TM4C1294NCPDT_0" xml="tm4c1294ncpdt.xml" xmlpath="devices"/>
+ </platform>
+ </connection>
+ </configuration>
+</configurations>
diff --git a/boards/ek-tm4c1294xl/interrupts/ewarm/Exe/interrupts.bin b/boards/ek-tm4c1294xl/interrupts/ewarm/Exe/interrupts.bin Binary files differnew file mode 100644 index 0000000..ae882d0 --- /dev/null +++ b/boards/ek-tm4c1294xl/interrupts/ewarm/Exe/interrupts.bin diff --git a/boards/ek-tm4c1294xl/interrupts/ewarm/Exe/interrupts.out b/boards/ek-tm4c1294xl/interrupts/ewarm/Exe/interrupts.out Binary files differnew file mode 100644 index 0000000..7877cc2 --- /dev/null +++ b/boards/ek-tm4c1294xl/interrupts/ewarm/Exe/interrupts.out diff --git a/boards/ek-tm4c1294xl/interrupts/gcc/interrupts.axf b/boards/ek-tm4c1294xl/interrupts/gcc/interrupts.axf Binary files differnew file mode 100644 index 0000000..4a0fe85 --- /dev/null +++ b/boards/ek-tm4c1294xl/interrupts/gcc/interrupts.axf diff --git a/boards/ek-tm4c1294xl/interrupts/gcc/interrupts.bin b/boards/ek-tm4c1294xl/interrupts/gcc/interrupts.bin Binary files differnew file mode 100644 index 0000000..07d18cf --- /dev/null +++ b/boards/ek-tm4c1294xl/interrupts/gcc/interrupts.bin diff --git a/boards/ek-tm4c1294xl/interrupts/interrupts.c b/boards/ek-tm4c1294xl/interrupts/interrupts.c new file mode 100644 index 0000000..a85148c --- /dev/null +++ b/boards/ek-tm4c1294xl/interrupts/interrupts.c @@ -0,0 +1,632 @@ +//*****************************************************************************
+//
+// interrupts.c - Interrupt preemption and tail-chaining example.
+//
+// Copyright (c) 2013-2014 Texas Instruments Incorporated. All rights reserved.
+// Software License Agreement
+//
+// Texas Instruments (TI) is supplying this software for use solely and
+// exclusively on TI's microcontroller products. The software is owned by
+// TI and/or its suppliers, and is protected under applicable copyright
+// laws. You may not combine this software with "viral" open-source
+// software in order to form a larger program.
+//
+// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
+// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
+// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
+// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
+// DAMAGES, FOR ANY REASON WHATSOEVER.
+//
+// This is part of revision 2.1.0.12573 of the EK-TM4C1294XL Firmware Package.
+//
+//*****************************************************************************
+
+#include <stdint.h>
+#include <stdbool.h>
+#include "inc/hw_ints.h"
+#include "inc/hw_memmap.h"
+#include "inc/hw_nvic.h"
+#include "inc/hw_types.h"
+#include "driverlib/gpio.h"
+#include "driverlib/interrupt.h"
+#include "driverlib/pin_map.h"
+#include "driverlib/systick.h"
+#include "driverlib/sysctl.h"
+#include "driverlib/rom.h"
+#include "driverlib/rom_map.h"
+#include "drivers/pinout.h"
+#include "utils/uartstdio.h"
+
+//*****************************************************************************
+//
+//! \addtogroup example_list
+//! <h1>Interrupts (interrupts)</h1>
+//!
+//! This example application demonstrates the interrupt preemption and
+//! tail-chaining capabilities of Cortex-M4 microprocessor and NVIC. Nested
+//! interrupts are synthesized when the interrupts have the same priority,
+//! increasing priorities, and decreasing priorities. With increasing
+//! priorities, preemption will occur; in the other two cases tail-chaining
+//! will occur. The currently pending interrupts and the currently executing
+//! interrupt will be displayed on the UART; GPIO pins B3, L1 and L0 (the
+//! GPIO on jumper J27 on the left edge of the board) will be asserted upon
+//! interrupt handler entry and de-asserted before interrupt handler exit so
+//! that the off-to-on time can be observed with a scope or logic analyzer to
+//! see the speed of tail-chaining (for the two cases where tail-chaining is
+//! occurring).
+//
+//*****************************************************************************
+
+
+//****************************************************************************
+//
+// Defines for Interrupt Priority.
+//
+//****************************************************************************
+#define EQUAL_PRIORITY 0
+#define DECREASING_PRIORITY 1
+#define INCREASING_PRIORITY 2
+
+//****************************************************************************
+//
+// System clock rate in Hz.
+//
+//****************************************************************************
+uint32_t g_ui32SysClock;
+
+//****************************************************************************
+//
+// Interrupt Mode.
+//
+//****************************************************************************
+uint32_t g_ui32IntMode;
+
+//*****************************************************************************
+//
+// The count of interrupts received. This is incremented as each interrupt
+// handler runs, and its value saved into interrupt handler specific values to
+// determine the order in which the interrupt handlers were executed.
+//
+//*****************************************************************************
+volatile uint32_t g_ui32Index;
+
+//*****************************************************************************
+//
+// The value of g_ui32Index when the INT_GPIOA interrupt was processed.
+//
+//*****************************************************************************
+volatile uint32_t g_ui32GPIOa;
+
+//*****************************************************************************
+//
+// The value of g_ui32Index when the INT_GPIOB interrupt was processed.
+//
+//*****************************************************************************
+volatile uint32_t g_ui32GPIOb;
+
+//*****************************************************************************
+//
+// The value of g_ui32Index when the INT_GPIOC interrupt was processed.
+//
+//*****************************************************************************
+volatile uint32_t g_ui32GPIOc;
+
+//*****************************************************************************
+//
+// GPIOs that are used for this example.
+//
+//*****************************************************************************
+#define GPIO_A_BASE GPIO_PORTB_BASE
+#define GPIO_A_PIN GPIO_PIN_3
+#define GPIO_B_BASE GPIO_PORTL_BASE
+#define GPIO_B_PIN GPIO_PIN_1
+#define GPIO_C_BASE GPIO_PORTL_BASE
+#define GPIO_C_PIN GPIO_PIN_0
+
+//*****************************************************************************
+//
+// The error routine that is called if the driver library encounters an error.
+//
+//*****************************************************************************
+#ifdef DEBUG
+void
+__error__(char *pcFilename, uint32_t ui32Line)
+{
+}
+#endif
+
+//*****************************************************************************
+//
+// Delay for the specified number of seconds. Depending upon the current
+// SysTick value, the delay will be between N-1 and N seconds (i.e. N-1 full
+// seconds are guaranteed, along with the remainder of the current second).
+//
+//*****************************************************************************
+void
+Delay(uint32_t ui32Seconds)
+{
+ uint8_t ui8Loop;
+
+ //
+ // Loop while there are more seconds to wait.
+ //
+ while(ui32Seconds--)
+ {
+ for(ui8Loop = 0; ui8Loop < 100; ui8Loop++)
+ {
+ //
+ // Wait until the SysTick value is less than 1000.
+ //
+ while(ROM_SysTickValueGet() > 1000)
+ {
+ }
+
+ //
+ // Wait until the SysTick value is greater than 1000.
+ //
+ while(ROM_SysTickValueGet() < 1000)
+ {
+ }
+ }
+ }
+}
+
+//*****************************************************************************
+//
+// Display the interrupt state on the UART. The currently active and pending
+// interrupts are displayed.
+//
+//*****************************************************************************
+void
+DisplayIntStatus(void)
+{
+ uint32_t ui32Temp;
+ char pcBuffer[6];
+
+ //
+ // Put the status header text on the UART.
+ //
+ UARTprintf("\033[2J\033[H");
+ UARTprintf("Interrupts example\n\n");
+ switch (g_ui32IntMode)
+ {
+ case 0:
+ UARTprintf("Equal Priority\n\n");
+ break;
+
+ case 1:
+ UARTprintf("Decreasing Priority\n\n");
+ break;
+
+ case 2:
+ UARTprintf("Increasing Priority\n\n");
+ break;
+ default:
+ break;
+ }
+
+ UARTprintf("Active: ");
+
+ //
+ // Display the currently active interrupts.
+ //
+ ui32Temp = HWREG(NVIC_ACTIVE0);
+ pcBuffer[0] = ' ';
+ pcBuffer[1] = (ui32Temp & 1) ? '1' : ' ';
+ pcBuffer[2] = (ui32Temp & 2) ? '2' : ' ';
+ pcBuffer[3] = (ui32Temp & 4) ? '3' : ' ';
+ pcBuffer[4] = ' ';
+ pcBuffer[5] = '\0';
+ UARTprintf(pcBuffer);
+
+ //
+ // Display the currently pending interrupts.
+ //
+ ui32Temp = HWREG(NVIC_PEND0);
+ pcBuffer[1] = (ui32Temp & 1) ? '1' : ' ';
+ pcBuffer[2] = (ui32Temp & 2) ? '2' : ' ';
+ pcBuffer[3] = (ui32Temp & 4) ? '3' : ' ';
+ UARTprintf("Pending: ");
+ UARTprintf(pcBuffer);
+}
+
+//*****************************************************************************
+//
+// This is the handler for INT_GPIOA. It simply saves the interrupt sequence
+// number.
+//
+//*****************************************************************************
+void
+IntGPIOa(void)
+{
+ //
+ // Set GPIO high to indicate entry to this interrupt handler.
+ //
+ ROM_GPIOPinWrite(GPIO_A_BASE, GPIO_A_PIN, GPIO_A_PIN);
+
+ //
+ // Put the current interrupt state on the UART.
+ //
+ DisplayIntStatus();
+
+ //
+ // Wait two seconds.
+ //
+ Delay(2);
+
+ //
+ // Save and increment the interrupt sequence number.
+ //
+ g_ui32GPIOa = g_ui32Index++;
+
+ //
+ // Set GPIO low to indicate exit from this interrupt handler.
+ //
+ ROM_GPIOPinWrite(GPIO_A_BASE, GPIO_A_PIN, 0);
+}
+
+//*****************************************************************************
+//
+// This is the handler for INT_GPIOB. It triggers INT_GPIOA and saves the
+// interrupt sequence number.
+//
+//*****************************************************************************
+void
+IntGPIOb(void)
+{
+ //
+ // Set GPIO high to indicate entry to this interrupt handler.
+ //
+ ROM_GPIOPinWrite(GPIO_B_BASE, GPIO_B_PIN, GPIO_B_PIN);
+
+ //
+ // Put the current interrupt state on the UART.
+ //
+ DisplayIntStatus();
+
+ //
+ // Trigger the INT_GPIOA interrupt.
+ //
+ HWREG(NVIC_SW_TRIG) = INT_GPIOA - 16;
+
+ //
+ // Put the current interrupt state on the UART.
+ //
+ DisplayIntStatus();
+
+ //
+ // Wait two seconds.
+ //
+ Delay(2);
+
+ //
+ // Save and increment the interrupt sequence number.
+ //
+ g_ui32GPIOb = g_ui32Index++;
+
+ //
+ // Set GPIO low to indicate exit from this interrupt handler.
+ //
+ ROM_GPIOPinWrite(GPIO_B_BASE, GPIO_B_PIN, 0);
+}
+
+//*****************************************************************************
+//
+// This is the handler for INT_GPIOC. It triggers INT_GPIOB and saves the
+// interrupt sequence number.
+//
+//*****************************************************************************
+void
+IntGPIOc(void)
+{
+ //
+ // Set GPIO high to indicate entry to this interrupt handler.
+ //
+ ROM_GPIOPinWrite(GPIO_C_BASE, GPIO_C_PIN, GPIO_C_PIN);
+
+ //
+ // Put the current interrupt state on the UART.
+ //
+ DisplayIntStatus();
+
+ //
+ // Trigger the INT_GPIOB interrupt.
+ //
+ HWREG(NVIC_SW_TRIG) = INT_GPIOB - 16;
+
+ //
+ // Put the current interrupt state on the UART.
+ //
+ DisplayIntStatus();
+
+ //
+ // Wait two seconds.
+ //
+ Delay(2);
+
+ //
+ // Save and increment the interrupt sequence number.
+ //
+ g_ui32GPIOc = g_ui32Index++;
+
+ //
+ // Set GPIO low to indicate exit from this interrupt handler.
+ //
+ ROM_GPIOPinWrite(GPIO_C_BASE, GPIO_C_PIN, 0);
+}
+
+//*****************************************************************************
+//
+// Configure the UART and its pins. This must be called before UARTprintf().
+//
+//*****************************************************************************
+void
+ConfigureUART(void)
+{
+ //
+ // Enable the GPIO Peripheral used by the UART.
+ //
+ ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);
+ ROM_SysCtlPeripheralSleepEnable(SYSCTL_PERIPH_GPIOA);
+
+ //
+ // Enable UART0.
+ //
+ ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_UART0);
+ ROM_SysCtlPeripheralSleepEnable(SYSCTL_PERIPH_UART0);
+
+ //
+ // Configure GPIO Pins for UART mode.
+ //
+ ROM_GPIOPinConfigure(GPIO_PA0_U0RX);
+ ROM_GPIOPinConfigure(GPIO_PA1_U0TX);
+ ROM_GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_1);
+
+ //
+ // Initialize the UART for console I/O.
+ //
+ UARTStdioConfig(0, 115200, g_ui32SysClock);
+}
+
+//*****************************************************************************
+//
+// This is the main example program. It checks to see that the interrupts are
+// processed in the correct order when they have identical priorities,
+// increasing priorities, and decreasing priorities. This exercises interrupt
+// preemption and tail chaining.
+//
+//*****************************************************************************
+int
+main(void)
+{
+ uint_fast8_t ui8Error;
+
+ //
+ // Run from the PLL at 120 MHz.
+ //
+ g_ui32SysClock = MAP_SysCtlClockFreqSet((SYSCTL_XTAL_25MHZ |
+ SYSCTL_OSC_MAIN | SYSCTL_USE_PLL |
+ SYSCTL_CFG_VCO_480), 120000000);
+
+ //
+ // Configure the device pins.
+ //
+ PinoutSet(false, false);
+
+ //
+ // Configure the UART.
+ //
+ ConfigureUART();
+
+ //
+ // Configure the B3, L1 and L0 to be outputs to indicate entry/exit of one
+ // of the interrupt handlers.
+ //
+ GPIOPinTypeGPIOOutput(GPIO_A_BASE, GPIO_A_PIN);
+ GPIOPinTypeGPIOOutput(GPIO_B_BASE, GPIO_B_PIN);
+ GPIOPinTypeGPIOOutput(GPIO_C_BASE, GPIO_C_PIN);
+ GPIOPinWrite(GPIO_A_BASE, GPIO_A_PIN, 0);
+ GPIOPinWrite(GPIO_B_BASE, GPIO_B_PIN, 0);
+ GPIOPinWrite(GPIO_C_BASE, GPIO_C_PIN, 0);
+
+ //
+ // Set up and enable the SysTick timer. It will be used as a reference
+ // for delay loops in the interrupt handlers. The SysTick timer period
+ // will be set up for 100 times per second.
+ //
+ ROM_SysTickPeriodSet(g_ui32SysClock / 100);
+ ROM_SysTickEnable();
+
+ //
+ // Reset the error indicator.
+ //
+ ui8Error = 0;
+
+ //
+ // Enable interrupts to the processor.
+ //
+ ROM_IntMasterEnable();
+
+ //
+ // Enable the interrupts.
+ //
+ ROM_IntEnable(INT_GPIOA);
+ ROM_IntEnable(INT_GPIOB);
+ ROM_IntEnable(INT_GPIOC);
+
+ //
+ // Indicate that the equal interrupt priority test is beginning.
+ //
+ g_ui32IntMode = EQUAL_PRIORITY;
+
+ //
+ // Set the interrupt priorities so they are all equal.
+ //
+ ROM_IntPrioritySet(INT_GPIOA, 0x00);
+ ROM_IntPrioritySet(INT_GPIOB, 0x00);
+ ROM_IntPrioritySet(INT_GPIOC, 0x00);
+
+ //
+ // Reset the interrupt flags.
+ //
+ g_ui32GPIOa = 0;
+ g_ui32GPIOb = 0;
+ g_ui32GPIOc = 0;
+ g_ui32Index = 1;
+
+ //
+ // Trigger the interrupt for GPIO C.
+ //
+ HWREG(NVIC_SW_TRIG) = INT_GPIOC - 16;
+
+ //
+ // Put the current interrupt state on the LCD.
+ //
+ DisplayIntStatus();
+
+ //
+ // Verify that the interrupts were processed in the correct order.
+ //
+ if((g_ui32GPIOa != 3) || (g_ui32GPIOb != 2) || (g_ui32GPIOc != 1))
+ {
+ ui8Error |= 1;
+ }
+
+ //
+ // Wait two seconds.
+ //
+ Delay(2);
+
+ //
+ // Indicate that the decreasing interrupt priority test is beginning.
+ //
+ g_ui32IntMode = DECREASING_PRIORITY;
+
+ //
+ // Set the interrupt priorities so that they are decreasing (i.e. C > B >
+ // A).
+ //
+ ROM_IntPrioritySet(INT_GPIOA, 0x80);
+ ROM_IntPrioritySet(INT_GPIOB, 0x40);
+ ROM_IntPrioritySet(INT_GPIOC, 0x00);
+
+ //
+ // Reset the interrupt flags.
+ //
+ g_ui32GPIOa = 0;
+ g_ui32GPIOb = 0;
+ g_ui32GPIOc = 0;
+ g_ui32Index = 1;
+
+ //
+ // Trigger the interrupt for GPIO C.
+ //
+ HWREG(NVIC_SW_TRIG) = INT_GPIOC - 16;
+
+ //
+ // Put the current interrupt state on the UART.
+ //
+ DisplayIntStatus();
+
+ //
+ // Verify that the interrupts were processed in the correct order.
+ //
+ if((g_ui32GPIOa != 3) || (g_ui32GPIOb != 2) || (g_ui32GPIOc != 1))
+ {
+ ui8Error |= 2;
+ }
+
+ //
+ // Wait two seconds.
+ //
+ Delay(2);
+
+ //
+ // Indicate that the increasing interrupt priority test is beginning.
+ //
+ g_ui32IntMode = INCREASING_PRIORITY;
+
+ //
+ // Set the interrupt priorities so that they are increasing (i.e. C < B <
+ // A).
+ //
+ ROM_IntPrioritySet(INT_GPIOA, 0x00);
+ ROM_IntPrioritySet(INT_GPIOB, 0x40);
+ ROM_IntPrioritySet(INT_GPIOC, 0x80);
+
+ //
+ // Reset the interrupt flags.
+ //
+ g_ui32GPIOa = 0;
+ g_ui32GPIOb = 0;
+ g_ui32GPIOc = 0;
+ g_ui32Index = 1;
+
+ //
+ // Trigger the interrupt for GPIO C.
+ //
+ HWREG(NVIC_SW_TRIG) = INT_GPIOC - 16;
+
+ //
+ // Put the current interrupt state on the UART.
+ //
+ DisplayIntStatus();
+
+ //
+ // Verify that the interrupts were processed in the correct order.
+ //
+ if((g_ui32GPIOa != 1) || (g_ui32GPIOb != 2) || (g_ui32GPIOc != 3))
+ {
+ ui8Error |= 4;
+ }
+
+ //
+ // Wait two seconds.
+ //
+ Delay(2);
+
+ //
+ // Disable the interrupts.
+ //
+ ROM_IntDisable(INT_GPIOA);
+ ROM_IntDisable(INT_GPIOB);
+ ROM_IntDisable(INT_GPIOC);
+
+ //
+ // Disable interrupts to the processor.
+ //
+ ROM_IntMasterDisable();
+
+ //
+ // Print out the test results.
+ //
+ UARTprintf("\033[2J\033[H");
+ UARTprintf("Interrupts example\n\n");
+ if(ui8Error)
+ {
+ if(ui8Error & 1)
+ {
+ UARTprintf("Equal Priority Fail!\n");
+ }
+ if(ui8Error & 2)
+ {
+ UARTprintf("Decreasing Priority Fail!\n");
+ }
+ if(ui8Error & 4)
+ {
+ UARTprintf("Increasing Priority Fail!\n");
+ }
+ }
+ else
+ {
+ UARTprintf("Success!");
+ }
+
+ //
+ // Loop forever.
+ //
+ while(1)
+ {
+ }
+}
diff --git a/boards/ek-tm4c1294xl/interrupts/interrupts.ewd b/boards/ek-tm4c1294xl/interrupts/interrupts.ewd new file mode 100644 index 0000000..9c3f3df --- /dev/null +++ b/boards/ek-tm4c1294xl/interrupts/interrupts.ewd @@ -0,0 +1,614 @@ +<?xml version="1.0" encoding="iso-8859-1"?>
+
+<project>
+ <fileVersion>1</fileVersion>
+ <configuration>
+ <name>Debug</name>
+ <toolchain>
+ <name>ARM</name>
+ </toolchain>
+ <debug>1</debug>
+ <settings>
+ <name>C-SPY</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>15</version>
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+ <debug>1</debug>
+ <option>
+ <name>CInput</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CEndian</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CProcessor</name>
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+ </option>
+ <option>
+ <name>OCVariant</name>
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+ <option>
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+ <state></state>
+ </option>
+ <option>
+ <name>MemOverride</name>
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+ </option>
+ <option>
+ <name>MemFile</name>
+ <state>$TOOLKIT_DIR$\CONFIG\debugger\TexasInstruments\tm4c1294ncpdt</state>
+ </option>
+ <option>
+ <name>RunToEnable</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>RunToName</name>
+ <state>main</state>
+ </option>
+ <option>
+ <name>CExtraOptionsCheck</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CExtraOptions</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CFpuProcessor</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OCDDFArgumentProducer</name>
+ <state></state>
+ </option>
+ <option>
+ <name>OCDownloadSuppressDownload</name>
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+ <option>
+ <name>OCDownloadVerifyAll</name>
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+ <option>
+ <name>OCProductVersion</name>
+ <state>5.11.0.50579</state>
+ </option>
+ <option>
+ <name>OCDynDriverList</name>
+ <state>LMIFTDI_ID</state>
+ </option>
+ <option>
+ <name>OCLastSavedByProductVersion</name>
+ <state>5.11.0.50579</state>
+ </option>
+ <option>
+ <name>OCDownloadAttachToProgram</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>FlashLoaders</name>
+ <state>,,,,(default),</state>
+ </option>
+ <option>
+ <name>UseFlashLoader</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CLowLevel</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OCBE8Slave</name>
+ <state>1</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>ARMSIM_ID</name>
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+ <data>
+ <version>1</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>OCSimDriverInfo</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OCSimEnablePSP</name>
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+ </option>
+ <option>
+ <name>OCSimPspOverrideConfig</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OCSimPspConfigFile</name>
+ <state></state>
+ </option>
+ </data>
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+ <debug>1</debug>
+ <option>
+ <name>CCAngelHeartbeat</name>
+ <state>1</state>
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+ <name>CAngelCommunication</name>
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+ <name>CAngelCommBaud</name>
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+ <name>CAngelCommPort</name>
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+ </option>
+ <option>
+ <name>ANGELTCPIP</name>
+ <state>aaa.bbb.ccc.ddd</state>
+ </option>
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+ <name>DoAngelLogfile</name>
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+ </option>
+ <option>
+ <name>AngelLogFile</name>
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+ </option>
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+ </option>
+ </data>
+ </settings>
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+ <name>DoLogfile</name>
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+ <name>LogFile</name>
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+ </option>
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+ <state>0</state>
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+ <state>main</state>
+ </option>
+ </data>
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+ <name>CRomLogFileEditB</name>
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+ <name>OCDriverInfo</name>
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+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>JLINK_ID</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>9</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>JLinkSpeed</name>
+ <state>32</state>
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+ <name>CCJLinkDoLogfile</name>
+ <state>0</state>
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+ <option>
+ <name>CCJLinkLogFile</name>
+ <state>$TOOLKIT_DIR$\cspycomm.log</state>
+ </option>
+ <option>
+ <name>CCJLinkHWResetDelay</name>
+ <state>0</state>
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+ <option>
+ <name>OCDriverInfo</name>
+ <state>1</state>
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+ <option>
+ <name>JLinkInitialSpeed</name>
+ <state>32</state>
+ </option>
+ <option>
+ <name>CCDoJlinkMultiTarget</name>
+ <state>0</state>
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+ <option>
+ <name>CCScanChainNonARMDevices</name>
+ <state>0</state>
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+ <option>
+ <name>CCJLinkIRLength</name>
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+ <name>CCJLinkCommRadio</name>
+ <state>0</state>
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+ <name>CCJLinkTCPIP</name>
+ <state>aaa.bbb.ccc.ddd</state>
+ </option>
+ <option>
+ <name>CCJLinkSpeedRadioV2</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCUSBDevice</name>
+ <version>0</version>
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+ <option>
+ <name>CCRDICatchReset</name>
+ <state>0</state>
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+ <state>0</state>
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+ <name>CCRDICatchSWI</name>
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+ <name>CCRDICatchData</name>
+ <state>0</state>
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+ <name>CCRDICatchPrefetch</name>
+ <state>0</state>
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+ <name>CCRDICatchIRQ</name>
+ <state>0</state>
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+ <state>0</state>
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+ <state>main</state>
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+ <name>OCJLinkAttachSlave</name>
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+ </settings>
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+ <wantNonLocal>1</wantNonLocal>
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+ <option>
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+ <name>LmiftdiSpeed</name>
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+ <name>CCLmiftdiDoLogfile</name>
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+ <name>CCLmiftdiLogFile</name>
+ <state>$TOOLKIT_DIR$\cspycomm.log</state>
+ </option>
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+ </settings>
+ <settings>
+ <name>MACRAIGOR_ID</name>
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+ <name>EmuHWReset</name>
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+ <option>
+ <name>OCDriverInfo</name>
+ <state>1</state>
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+ <option>
+ <name>UnusedAddr</name>
+ <state>0x00800000</state>
+ </option>
+ <option>
+ <name>CCMacraigorHWResetDelay</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CCJTagBreakpointRadio</name>
+ <state>0</state>
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+ <state>0</state>
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+ <state>main</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
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+ <version>1</version>
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+ <option>
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+ <state>Browse to your RDI driver</state>
+ </option>
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+ <name>CRDILogFileEdit</name>
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+ <name>CCRDICatchData</name>
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+ <name>CCRDICatchPrefetch</name>
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+ <name>CCRDICatchFIQ</name>
+ <state>0</state>
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+ <name>CCRDIUseETM</name>
+ <state>0</state>
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+ <option>
+ <name>OCDriverInfo</name>
+ <state>1</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>THIRDPARTY_ID</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>0</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>CThirdPartyDriverDll</name>
+ <state>Browse to your third-party driver</state>
+ </option>
+ <option>
+ <name>CThirdPartyLogFileCheck</name>
+ <state>0</state>
+ </option>
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+ <name>CThirdPartyLogFileEditB</name>
+ <state>$TOOLKIT_DIR$\cspycomm.log</state>
+ </option>
+ <option>
+ <name>OCDriverInfo</name>
+ <state>1</state>
+ </option>
+ </data>
+ </settings>
+ <debuggerPlugins>
+ <plugin>
+ <file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ewplugin</file>
+ <loadFlag>0</loadFlag>
+ </plugin>
+ <plugin>
+ <file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ewplugin</file>
+ <loadFlag>0</loadFlag>
+ </plugin>
+ <plugin>
+ <file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>
+ <loadFlag>0</loadFlag>
+ </plugin>
+ <plugin>
+ <file>$TOOLKIT_DIR$\plugins\rtos\OSE\OseEpsilonPlugin.ewplugin</file>
+ <loadFlag>0</loadFlag>
+ </plugin>
+ <plugin>
+ <file>$TOOLKIT_DIR$\plugins\rtos\PowerPac\PowerPacRTOS.ewplugin</file>
+ <loadFlag>0</loadFlag>
+ </plugin>
+ <plugin>
+ <file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ewplugin</file>
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+ </plugin>
+ <plugin>
+ <file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>
+ <loadFlag>0</loadFlag>
+ </plugin>
+ <plugin>
+ <file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file>
+ <loadFlag>1</loadFlag>
+ </plugin>
+ <plugin>
+ <file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>
+ <loadFlag>0</loadFlag>
+ </plugin>
+ <plugin>
+ <file>$EW_DIR$\common\plugins\Profiling\Profiling.ENU.ewplugin</file>
+ <loadFlag>1</loadFlag>
+ </plugin>
+ <plugin>
+ <file>$EW_DIR$\common\plugins\Stack\Stack.ENU.ewplugin</file>
+ <loadFlag>1</loadFlag>
+ </plugin>
+ </debuggerPlugins>
+ </configuration>
+</project>
diff --git a/boards/ek-tm4c1294xl/interrupts/interrupts.ewp b/boards/ek-tm4c1294xl/interrupts/interrupts.ewp new file mode 100644 index 0000000..bb5503b --- /dev/null +++ b/boards/ek-tm4c1294xl/interrupts/interrupts.ewp @@ -0,0 +1,794 @@ +<?xml version="1.0" encoding="iso-8859-1"?>
+
+<project>
+ <fileVersion>1</fileVersion>
+ <configuration>
+ <name>Debug</name>
+ <toolchain>
+ <name>ARM</name>
+ </toolchain>
+ <debug>1</debug>
+ <settings>
+ <name>General</name>
+ <archiveVersion>3</archiveVersion>
+ <data>
+ <version>14</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>ExePath</name>
+ <state>ewarm\Exe</state>
+ </option>
+ <option>
+ <name>ObjPath</name>
+ <state>ewarm\Obj</state>
+ </option>
+ <option>
+ <name>ListPath</name>
+ <state>ewarm\List</state>
+ </option>
+ <option>
+ <name>Variant</name>
+ <version>19</version>
+ <state>39</state>
+ </option>
+ <option>
+ <name>GEndianMode</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>Input variant</name>
+ <version>1</version>
+ <state>3</state>
+ </option>
+ <option>
+ <name>Input description</name>
+ <state>No specifier n, no float nor long long, no scan set, no assignment suppressing.</state>
+ </option>
+ <option>
+ <name>Output variant</name>
+ <version>0</version>
+ <state>3</state>
+ </option>
+ <option>
+ <name>Output description</name>
+ <state>No specifier a, A, no specifier n, no float nor long long, no flags.</state>
+ </option>
+ <option>
+ <name>GOutputBinary</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>FPU</name>
+ <version>2</version>
+ <state>5</state>
+ </option>
+ <option>
+ <name>OGCoreOrChip</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>GRuntimeLibSelect</name>
+ <version>0</version>
+ <state>1</state>
+ </option>
+ <option>
+ <name>GRuntimeLibSelectSlave</name>
+ <version>0</version>
+ <state>1</state>
+ </option>
+ <option>
+ <name>RTDescription</name>
+ <state>Use the normal configuration of the C/C++ runtime library. No locale interface, C locale, no file descriptor support, no multibytes in printf and scanf, and no hex floats in strtod.</state>
+ </option>
+ <option>
+ <name>RTConfigPath</name>
+ <state>$TOOLKIT_DIR$\INC\DLib_Config_Normal.h</state>
+ </option>
+ <option>
+ <name>OGProductVersion</name>
+ <state>5.11.0.50579</state>
+ </option>
+ <option>
+ <name>OGLastSavedByProductVersion</name>
+ <state>5.11.0.50579</state>
+ </option>
+ <option>
+ <name>GeneralMisraRules</name>
+ <version>0</version>
+ <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+ </option>
+ <option>
+ <name>GeneralEnableMisra</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GeneralMisraVerbose</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGChipSelectEditMenu</name>
+ <state>TM4C1294NCPDT TexasInstruments TM4C1294NCPDT</state>
+ </option>
+ <option>
+ <name>GenLowLevelInterface</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>GEndianModeBE</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OGBufferedTerminalOutput</name>
+ <state>0</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>ICCARM</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>19</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>CCDefines</name>
+ <state>ewarm</state>
+ <state>PART_TM4C1294NCPDT</state>
+ <state>TARGET_IS_TM4C129_RA0</state>
+ </option>
+ <option>
+ <name>CCPreprocFile</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCPreprocComments</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCPreprocLine</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCListCFile</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCListCMnemonics</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCListCMessages</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCListAssFile</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCListAssSource</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCEnableRemarks</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCDiagSuppress</name>
+ <state>Pa050</state>
+ </option>
+ <option>
+ <name>CCDiagRemark</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CCDiagWarning</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CCDiagError</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CCObjPrefix</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CCAllowList</name>
+ <version>1</version>
+ <state>1111111</state>
+ </option>
+ <option>
+ <name>CCDebugInfo</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IEndianMode</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IProcessor</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IExtraOptionsCheck</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IExtraOptions</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CCLangConformance</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCSignedPlainChar</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CCRequirePrototypes</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCMultibyteSupport</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCDiagWarnAreErr</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCCompilerRuntimeInfo</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IFpuProcessor</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OutputFile</name>
+ <state>$FILE_BNAME$.o</state>
+ </option>
+ <option>
+ <name>CCLangSelect</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCLibConfigHeader</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>PreInclude</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CompilerMisraRules</name>
+ <version>0</version>
+ <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+ </option>
+ <option>
+ <name>CompilerMisraOverride</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCIncludePath2</name>
+ <state>$PROJ_DIR$\.</state>
+ <state>$PROJ_DIR$\..</state>
+ <state>$PROJ_DIR$\..\..\..\..</state>
+ </option>
+ <option>
+ <name>CCStdIncCheck</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCStdIncludePath</name>
+ <state>$TOOLKIT_DIR$\INC\</state>
+ </option>
+ <option>
+ <name>CCCodeSection</name>
+ <state>.text</state>
+ </option>
+ <option>
+ <name>IInterwork2</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IProcessorMode2</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CCOptLevel</name>
+ <state>3</state>
+ </option>
+ <option>
+ <name>CCOptStrategy</name>
+ <version>0</version>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CCOptLevelSlave</name>
+ <state>3</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>AARM</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>7</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>AObjPrefix</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>AEndian</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>ACaseSensitivity</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>MacroChars</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AWarnEnable</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AWarnWhat</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AWarnOne</name>
+ <state></state>
+ </option>
+ <option>
+ <name>AWarnRange1</name>
+ <state></state>
+ </option>
+ <option>
+ <name>AWarnRange2</name>
+ <state></state>
+ </option>
+ <option>
+ <name>ADebug</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>AltRegisterNames</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>ADefines</name>
+ <state>ewarm</state>
+ </option>
+ <option>
+ <name>AList</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AListHeader</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>AListing</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>Includes</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>MacDefs</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>MacExps</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>MacExec</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OnlyAssed</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>MultiLine</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>PageLengthCheck</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>PageLength</name>
+ <state>80</state>
+ </option>
+ <option>
+ <name>TabSpacing</name>
+ <state>8</state>
+ </option>
+ <option>
+ <name>AXRef</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AXRefDefines</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AXRefInternal</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AXRefDual</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AProcessor</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>AFpuProcessor</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>AOutputFile</name>
+ <state>$FILE_BNAME$.o</state>
+ </option>
+ <option>
+ <name>AMultibyteSupport</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>ALimitErrorsCheck</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>ALimitErrorsEdit</name>
+ <state>100</state>
+ </option>
+ <option>
+ <name>AIgnoreStdInclude</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AStdIncludes</name>
+ <state>$TOOLKIT_DIR$\INC\</state>
+ </option>
+ <option>
+ <name>AUserIncludes</name>
+ <state>$PROJ_DIR$\.</state>
+ <state>$PROJ_DIR$\..</state>
+ <state>$PROJ_DIR$\..\..\..\..</state>
+ </option>
+ <option>
+ <name>AExtraOptionsCheckV2</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AExtraOptionsV2</name>
+ <state></state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>OBJCOPY</name>
+ <archiveVersion>0</archiveVersion>
+ <data>
+ <version>1</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>OOCOutputFormat</name>
+ <version>1</version>
+ <state>2</state>
+ </option>
+ <option>
+ <name>OCOutputOverride</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OOCOutputFile</name>
+ <state>interrupts.bin</state>
+ </option>
+ <option>
+ <name>OOCCommandLineProducer</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OOCObjCopyEnable</name>
+ <state>1</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>CUSTOM</name>
+ <archiveVersion>3</archiveVersion>
+ <data>
+ <extensions></extensions>
+ <cmdline></cmdline>
+ </data>
+ </settings>
+ <settings>
+ <name>BICOMP</name>
+ <archiveVersion>0</archiveVersion>
+ <data/>
+ </settings>
+ <settings>
+ <name>BUILDACTION</name>
+ <archiveVersion>1</archiveVersion>
+ <data>
+ <prebuild></prebuild>
+ <postbuild></postbuild>
+ </data>
+ </settings>
+ <settings>
+ <name>ILINK</name>
+ <archiveVersion>0</archiveVersion>
+ <data>
+ <version>5</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>IlinkLibIOConfig</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>XLinkMisraHandler</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkInputFileSlave</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkOutputFile</name>
+ <state>interrupts.out</state>
+ </option>
+ <option>
+ <name>IlinkDebugInfoEnable</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkKeepSymbols</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkRawBinaryFile</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkRawBinarySymbol</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkRawBinarySegment</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkRawBinaryAlign</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkDefines</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkConfigDefines</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkMapFile</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkLogFile</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkLogInitialization</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkLogModule</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkLogSection</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkLogVeneer</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkIcfOverride</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkIcfFile</name>
+ <state>$PROJ_DIR$\interrupts.icf</state>
+ </option>
+ <option>
+ <name>IlinkIcfFileSlave</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkEnableRemarks</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkSuppressDiags</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkTreatAsRem</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkTreatAsWarn</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkTreatAsErr</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkWarningsAreErrors</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkUseExtraOptions</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkExtraOptions</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkLowLevelInterfaceSlave</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkAutoLibEnable</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkAdditionalLibs</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkOverrideProgramEntryLabel</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkProgramEntryLabelSelect</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkProgramEntryLabel</name>
+ <state>__iar_program_start</state>
+ </option>
+ <option>
+ <name>IlinkNXPLPCChecksum</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>DoFill</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>FillerByte</name>
+ <state>0xFF</state>
+ </option>
+ <option>
+ <name>FillerStart</name>
+ <state>0x0</state>
+ </option>
+ <option>
+ <name>FillerEnd</name>
+ <state>0x0</state>
+ </option>
+ <option>
+ <name>CrcSize</name>
+ <version>0</version>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CrcAlign</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CrcAlgo</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CrcPoly</name>
+ <state>0x11021</state>
+ </option>
+ <option>
+ <name>CrcCompl</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CrcBitOrder</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CrcInitialValue</name>
+ <state>0x0</state>
+ </option>
+ <option>
+ <name>DoCrc</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkBE8Slave</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkBufferedTerminalOutput</name>
+ <state>1</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>IARCHIVE</name>
+ <archiveVersion>0</archiveVersion>
+ <data>
+ <version>0</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>IarchiveInputs</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IarchiveOverride</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IarchiveOutput</name>
+ <state>###Unitialized###</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>BILINK</name>
+ <archiveVersion>0</archiveVersion>
+ <data/>
+ </settings>
+ </configuration>
+ <group>
+ <name>Libraries</name>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\..\driverlib\ewarm\Exe\driverlib.a</name>
+ </file>
+ </group>
+ <group>
+ <name>Source</name>
+ <file>
+ <name>$PROJ_DIR$\interrupts.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\drivers\pinout.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\startup_ewarm.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\..\utils\uartstdio.c</name>
+ </file>
+ </group>
+</project>
diff --git a/boards/ek-tm4c1294xl/interrupts/interrupts.icf b/boards/ek-tm4c1294xl/interrupts/interrupts.icf new file mode 100644 index 0000000..989b66d --- /dev/null +++ b/boards/ek-tm4c1294xl/interrupts/interrupts.icf @@ -0,0 +1,78 @@ +//*****************************************************************************
+//
+// interrupts.icf - Linker configuration file for interrupts.
+//
+// Copyright (c) 2013-2014 Texas Instruments Incorporated. All rights reserved.
+// Software License Agreement
+//
+// Texas Instruments (TI) is supplying this software for use solely and
+// exclusively on TI's microcontroller products. The software is owned by
+// TI and/or its suppliers, and is protected under applicable copyright
+// laws. You may not combine this software with "viral" open-source
+// software in order to form a larger program.
+//
+// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
+// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
+// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
+// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
+// DAMAGES, FOR ANY REASON WHATSOEVER.
+//
+// This is part of revision 2.1.0.12573 of the EK-TM4C1294XL Firmware Package.
+//
+//*****************************************************************************
+
+//
+// Define a memory region that covers the entire 4 GB addressible space of the
+// processor.
+//
+define memory mem with size = 4G;
+
+//
+// Define a region for the on-chip flash.
+//
+define region FLASH = mem:[from 0x00000000 to 0x000fffff];
+
+//
+// Define a region for the on-chip SRAM.
+//
+define region SRAM = mem:[from 0x20000000 to 0x2003ffff];
+
+//
+// Define a block for the heap. The size should be set to something other
+// than zero if things in the C library that require the heap are used.
+//
+define block HEAP with alignment = 8, size = 0x00000000 { };
+
+//
+// Indicate that the read/write values should be initialized by copying from
+// flash.
+//
+initialize by copy { readwrite };
+
+//
+// Indicate that the noinit values should be left alone. This includes the
+// stack, which if initialized will destroy the return address from the
+// initialization code, causing the processor to branch to zero and fault.
+//
+do not initialize { section .noinit };
+
+//
+// Place the interrupt vectors at the start of flash.
+//
+place at start of FLASH { readonly section .intvec };
+
+//
+// Place the remainder of the read-only items into flash.
+//
+place in FLASH { readonly };
+
+//
+// Place the RAM vector table at the start of SRAM.
+//
+place at start of SRAM { section VTABLE };
+
+//
+// Place all read/write items into SRAM.
+//
+place in SRAM { readwrite, block HEAP };
diff --git a/boards/ek-tm4c1294xl/interrupts/interrupts.ld b/boards/ek-tm4c1294xl/interrupts/interrupts.ld new file mode 100644 index 0000000..e5c8e54 --- /dev/null +++ b/boards/ek-tm4c1294xl/interrupts/interrupts.ld @@ -0,0 +1,57 @@ +/******************************************************************************
+ *
+ * interrupts.ld - Linker configuration file for interrupts.
+ *
+ * Copyright (c) 2013-2014 Texas Instruments Incorporated. All rights reserved.
+ * Software License Agreement
+ *
+ * Texas Instruments (TI) is supplying this software for use solely and
+ * exclusively on TI's microcontroller products. The software is owned by
+ * TI and/or its suppliers, and is protected under applicable copyright
+ * laws. You may not combine this software with "viral" open-source
+ * software in order to form a larger program.
+ *
+ * THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
+ * NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
+ * NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
+ * CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
+ * DAMAGES, FOR ANY REASON WHATSOEVER.
+ *
+ * This is part of revision 2.1.0.12573 of the EK-TM4C1294XL Firmware Package.
+ *
+ *****************************************************************************/
+
+MEMORY
+{
+ FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x00100000
+ SRAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00040000
+}
+
+SECTIONS
+{
+ .text :
+ {
+ _text = .;
+ KEEP(*(.isr_vector))
+ *(.text*)
+ *(.rodata*)
+ _etext = .;
+ } > FLASH
+
+ .data : AT(ADDR(.text) + SIZEOF(.text))
+ {
+ _data = .;
+ *(vtable)
+ *(.data*)
+ _edata = .;
+ } > SRAM
+
+ .bss :
+ {
+ _bss = .;
+ *(.bss*)
+ *(COMMON)
+ _ebss = .;
+ } > SRAM
+}
diff --git a/boards/ek-tm4c1294xl/interrupts/interrupts.sct b/boards/ek-tm4c1294xl/interrupts/interrupts.sct new file mode 100644 index 0000000..90278f1 --- /dev/null +++ b/boards/ek-tm4c1294xl/interrupts/interrupts.sct @@ -0,0 +1,47 @@ +;******************************************************************************
+;
+; interrupts.sct - Linker configuration file for interrupts.
+;
+; Copyright (c) 2013-2014 Texas Instruments Incorporated. All rights reserved.
+; Software License Agreement
+;
+; Texas Instruments (TI) is supplying this software for use solely and
+; exclusively on TI's microcontroller products. The software is owned by
+; TI and/or its suppliers, and is protected under applicable copyright
+; laws. You may not combine this software with "viral" open-source
+; software in order to form a larger program.
+;
+; THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
+; NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
+; NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+; A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
+; CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
+; DAMAGES, FOR ANY REASON WHATSOEVER.
+;
+; This is part of revision 2.1.0.12573 of the EK-TM4C1294XL Firmware Package.
+;
+;******************************************************************************
+
+LR_IROM 0x00000000 0x00100000
+{
+ ;
+ ; Specify the Execution Address of the code and the size.
+ ;
+ ER_IROM 0x00000000 0x00100000
+ {
+ *.o (RESET, +First)
+ * (InRoot$$Sections, +RO)
+ }
+
+ ;
+ ; Specify the Execution Address of the data area.
+ ;
+ RW_IRAM 0x20000000 0x00040000
+ {
+ ;
+ ; Uncomment the following line in order to use IntRegister().
+ ;
+ ;* (vtable, +First)
+ * (+RW, +ZI)
+ }
+}
diff --git a/boards/ek-tm4c1294xl/interrupts/interrupts.uvopt b/boards/ek-tm4c1294xl/interrupts/interrupts.uvopt new file mode 100644 index 0000000..3d921df --- /dev/null +++ b/boards/ek-tm4c1294xl/interrupts/interrupts.uvopt @@ -0,0 +1,317 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_opt.xsd">
+
+ <SchemaVersion>1.0</SchemaVersion>
+
+ <Header>### uVision Project, (C) Keil Software</Header>
+
+ <Extensions>
+ <cExt>*.c</cExt>
+ <aExt>*.s*; *.src; *.a*</aExt>
+ <oExt>*.obj</oExt>
+ <lExt>*.lib</lExt>
+ <tExt>*.txt; *.h; *.inc</tExt>
+ <pExt>*.plm</pExt>
+ <CppX>*.cpp</CppX>
+ </Extensions>
+
+ <DaveTm>
+ <dwLowDateTime>0</dwLowDateTime>
+ <dwHighDateTime>0</dwHighDateTime>
+ </DaveTm>
+
+ <Target>
+ <TargetName>interrupts</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <TargetOption>
+ <CLKADS>8000000</CLKADS>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>1</RunSim>
+ <RunTarget>0</RunTarget>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>79</PageWidth>
+ <PageLength>66</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\rvmdk\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
+ <CreateIListing>0</CreateIListing>
+ <AsmCond>1</AsmCond>
+ <AsmSymb>1</AsmSymb>
+ <AsmXref>0</AsmXref>
+ <CCond>1</CCond>
+ <CCode>0</CCode>
+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
+ <LinkerCodeListing>0</LinkerCodeListing>
+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
+ <LGenerateSymbols>1</LGenerateSymbols>
+ <LLibSym>1</LLibSym>
+ <LLines>1</LLines>
+ <LLocSym>1</LLocSym>
+ <LPubSym>1</LPubSym>
+ <LXref>0</LXref>
+ <LExpSel>0</LExpSel>
+ </OPTXL>
+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>1</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>255</CpuCode>
+ <Books>
+ <Book>
+ <Number>0</Number>
+ <Title>Data Sheet</Title>
+ <Path>DATASHTS\Luminary\TM4C1294NCPDT.PDF</Path>
+ </Book>
+ </Books>
+ <DllOpt>
+ <SimDllName>SARMCM3.DLL</SimDllName>
+ <SimDllArguments>-MPU</SimDllArguments>
+ <SimDlgDllName>DCM.DLL</SimDlgDllName>
+ <SimDlgDllArguments>-pCM4</SimDlgDllArguments>
+ <TargetDllName>SARMCM3.DLL</TargetDllName>
+ <TargetDllArguments>-MPU</TargetDllArguments>
+ <TargetDlgDllName>TCM.DLL</TargetDlgDllName>
+ <TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
+ </DllOpt>
+ <DebugOpt>
+ <uSim>0</uSim>
+ <uTrg>1</uTrg>
+ <sLdApp>1</sLdApp>
+ <sGomain>1</sGomain>
+ <sRbreak>1</sRbreak>
+ <sRwatch>1</sRwatch>
+ <sRmem>1</sRmem>
+ <sRfunc>1</sRfunc>
+ <sRbox>1</sRbox>
+ <tLdApp>1</tLdApp>
+ <tGomain>0</tGomain>
+ <tRbreak>1</tRbreak>
+ <tRwatch>1</tRwatch>
+ <tRmem>1</tRmem>
+ <tRfunc>0</tRfunc>
+ <tRbox>1</tRbox>
+ <sRunDeb>0</sRunDeb>
+ <sLrtime>0</sLrtime>
+ <nTsel>4</nTsel>
+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile></sIfile>
+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile></tIfile>
+ <pMon>BIN\lmidk-agdi.dll</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>lmidk-agdi</Key>
+ <Name>-O4614 -S3 -FO29</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGTARM</Key>
+ <Name></Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMDBGFLAGS</Key>
+ <Name></Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
+ <DebugFlag>
+ <trace>0</trace>
+ <periodic>1</periodic>
+ <aLwin>0</aLwin>
+ <aCover>0</aCover>
+ <aSer1>0</aSer1>
+ <aSer2>0</aSer2>
+ <aPa>0</aPa>
+ <viewmode>1</viewmode>
+ <vrSel>0</vrSel>
+ <aSym>0</aSym>
+ <aTbox>0</aTbox>
+ <AscS1>0</AscS1>
+ <AscS2>0</AscS2>
+ <AscS3>0</AscS3>
+ <aSer3>0</aSer3>
+ <eProf>0</eProf>
+ <aLa>0</aLa>
+ <aPa1>0</aPa1>
+ <AscS4>0</AscS4>
+ <aSer4>0</aSer4>
+ <StkLoc>0</StkLoc>
+ <TrcWin>0</TrcWin>
+ <newCpu>0</newCpu>
+ <uProt>0</uProt>
+ </DebugFlag>
+ <LintExecutable></LintExecutable>
+ <LintConfigFile></LintConfigFile>
+ </TargetOption>
+ </Target>
+
+ <Group>
+ <GroupName>Source</GroupName>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <cbSel>0</cbSel>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>1</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <Focus>0</Focus>
+ <ColumnNumber>0</ColumnNumber>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <TopLine>0</TopLine>
+ <CurrentLine>0</CurrentLine>
+ <bDave2>0</bDave2>
+ <PathWithFileName>.\interrupts.c</PathWithFileName>
+ <FilenameWithoutPath>interrupts.c</FilenameWithoutPath>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>2</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <Focus>0</Focus>
+ <ColumnNumber>0</ColumnNumber>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <TopLine>0</TopLine>
+ <CurrentLine>0</CurrentLine>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\drivers\pinout.c</PathWithFileName>
+ <FilenameWithoutPath>pinout.c</FilenameWithoutPath>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>3</FileNumber>
+ <FileType>2</FileType>
+ <tvExp>0</tvExp>
+ <Focus>0</Focus>
+ <ColumnNumber>0</ColumnNumber>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <TopLine>0</TopLine>
+ <CurrentLine>0</CurrentLine>
+ <bDave2>0</bDave2>
+ <PathWithFileName>.\startup_rvmdk.S</PathWithFileName>
+ <FilenameWithoutPath>startup_rvmdk.S</FilenameWithoutPath>
+ </File>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>4</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <Focus>0</Focus>
+ <ColumnNumber>0</ColumnNumber>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <TopLine>0</TopLine>
+ <CurrentLine>0</CurrentLine>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\..\..\utils\uartstdio.c</PathWithFileName>
+ <FilenameWithoutPath>uartstdio.c</FilenameWithoutPath>
+ </File>
+ </Group>
+
+ <Group>
+ <GroupName>Libraries</GroupName>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <cbSel>0</cbSel>
+ <File>
+ <GroupNumber>2</GroupNumber>
+ <FileNumber>5</FileNumber>
+ <FileType>4</FileType>
+ <tvExp>0</tvExp>
+ <Focus>0</Focus>
+ <ColumnNumber>0</ColumnNumber>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <TopLine>0</TopLine>
+ <CurrentLine>0</CurrentLine>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\..\..\driverlib\rvmdk\driverlib.lib</PathWithFileName>
+ <FilenameWithoutPath>driverlib.lib</FilenameWithoutPath>
+ </File>
+ </Group>
+
+ <Group>
+ <GroupName>Documentation</GroupName>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <cbSel>0</cbSel>
+ <File>
+ <GroupNumber>3</GroupNumber>
+ <FileNumber>6</FileNumber>
+ <FileType>5</FileType>
+ <tvExp>0</tvExp>
+ <Focus>1</Focus>
+ <ColumnNumber>0</ColumnNumber>
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+ <TopLine>1</TopLine>
+ <CurrentLine>1</CurrentLine>
+ <bDave2>0</bDave2>
+ <PathWithFileName>.\readme.txt</PathWithFileName>
+ <FilenameWithoutPath>readme.txt</FilenameWithoutPath>
+ <WindowPosition>
+ <length>44</length>
+ <flags>0</flags>
+ <showCmd>1</showCmd>
+ <MinPosition>
+ <xPos>-1</xPos>
+ <yPos>-1</yPos>
+ </MinPosition>
+ <MaxPosition>
+ <xPos>-1</xPos>
+ <yPos>-1</yPos>
+ </MaxPosition>
+ <NormalPosition>
+ <Top>0</Top>
+ <Left>0</Left>
+ <Right>729</Right>
+ <Bottom>300</Bottom>
+ </NormalPosition>
+ </WindowPosition>
+ </File>
+ </Group>
+
+ <MDIGroups>
+ <Orientation>1</Orientation>
+ <ActiveMDIGroup>0</ActiveMDIGroup>
+ <MDIGroup>
+ <Size>100</Size>
+ <ActiveTab>0</ActiveTab>
+ <Documents>
+ <Doc>
+ <Name>.\readme.txt</Name>
+ <ColumnNumber>0</ColumnNumber>
+ <TopLine>1</TopLine>
+ <CurrentLine>1</CurrentLine>
+ </Doc>
+ </Documents>
+ </MDIGroup>
+ </MDIGroups>
+
+</ProjectOpt>
diff --git a/boards/ek-tm4c1294xl/interrupts/interrupts.uvproj b/boards/ek-tm4c1294xl/interrupts/interrupts.uvproj new file mode 100644 index 0000000..5d1d162 --- /dev/null +++ b/boards/ek-tm4c1294xl/interrupts/interrupts.uvproj @@ -0,0 +1,434 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_proj.xsd">
+
+ <SchemaVersion>1.1</SchemaVersion>
+
+ <Header>### uVision Project, (C) Keil Software</Header>
+
+ <Targets>
+ <Target>
+ <TargetName>interrupts</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <TargetOption>
+ <TargetCommonOption>
+ <Device>TM4C1294NCPDT</Device>
+ <Vendor>Texas Instruments</Vendor>
+ <Cpu>IRAM(0x20000000-0x2003FFFF) IROM(0-0xFFFFF) CLOCK(8000000) CPUTYPE("Cortex-M4") FPU2</Cpu>
+ <FlashUtilSpec></FlashUtilSpec>
+ <StartupFile>"STARTUP\Luminary\Startup.s" ("Luminary Startup Code")</StartupFile>
+ <FlashDriverDll>UL2CM3(-O207 -S0 -C0 -FO7 -FD20000000 -FC800 -FN1 -FF0LM4F_1024 -FS00 -FL0100000)</FlashDriverDll>
+ <DeviceId>5919</DeviceId>
+ <RegisterFile>LM4Fxxxx.H</RegisterFile>
+ <MemoryEnv></MemoryEnv>
+ <Cmp></Cmp>
+ <Asm></Asm>
+ <Linker></Linker>
+ <OHString></OHString>
+ <InfinionOptionDll></InfinionOptionDll>
+ <SLE66CMisc></SLE66CMisc>
+ <SLE66AMisc></SLE66AMisc>
+ <SLE66LinkerMisc></SLE66LinkerMisc>
+ <UseEnv>0</UseEnv>
+ <BinPath></BinPath>
+ <IncludePath></IncludePath>
+ <LibPath></LibPath>
+ <RegisterFilePath>Luminary\</RegisterFilePath>
+ <DBRegisterFilePath>Luminary\</DBRegisterFilePath>
+ <TargetStatus>
+ <Error>0</Error>
+ <ExitCodeStop>0</ExitCodeStop>
+ <ButtonStop>0</ButtonStop>
+ <NotGenerated>0</NotGenerated>
+ <InvalidFlash>1</InvalidFlash>
+ </TargetStatus>
+ <OutputDirectory>.\rvmdk\</OutputDirectory>
+ <OutputName>interrupts</OutputName>
+ <CreateExecutable>1</CreateExecutable>
+ <CreateLib>0</CreateLib>
+ <CreateHexFile>0</CreateHexFile>
+ <DebugInformation>1</DebugInformation>
+ <BrowseInformation>1</BrowseInformation>
+ <ListingPath>.\rvmdk\</ListingPath>
+ <HexFormatSelection>1</HexFormatSelection>
+ <Merge32K>0</Merge32K>
+ <CreateBatchFile>0</CreateBatchFile>
+ <BeforeCompile>
+ <RunUserProg1>0</RunUserProg1>
+ <RunUserProg2>0</RunUserProg2>
+ <UserProg1Name></UserProg1Name>
+ <UserProg2Name></UserProg2Name>
+ <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+ <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+ </BeforeCompile>
+ <BeforeMake>
+ <RunUserProg1>0</RunUserProg1>
+ <RunUserProg2>0</RunUserProg2>
+ <UserProg1Name></UserProg1Name>
+ <UserProg2Name></UserProg2Name>
+ <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+ <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+ </BeforeMake>
+ <AfterMake>
+ <RunUserProg1>1</RunUserProg1>
+ <RunUserProg2>0</RunUserProg2>
+ <UserProg1Name>fromelf --bin --output .\rvmdk\interrupts.bin .\rvmdk\interrupts.axf</UserProg1Name>
+ <UserProg2Name></UserProg2Name>
+ <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+ <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+ </AfterMake>
+ <SelectedForBatchBuild>0</SelectedForBatchBuild>
+ <SVCSIdString></SVCSIdString>
+ </TargetCommonOption>
+ <CommonProperty>
+ <UseCPPCompiler>0</UseCPPCompiler>
+ <RVCTCodeConst>0</RVCTCodeConst>
+ <RVCTZI>0</RVCTZI>
+ <RVCTOtherData>0</RVCTOtherData>
+ <ModuleSelection>0</ModuleSelection>
+ <IncludeInBuild>1</IncludeInBuild>
+ <AlwaysBuild>0</AlwaysBuild>
+ <GenerateAssemblyFile>0</GenerateAssemblyFile>
+ <AssembleAssemblyFile>0</AssembleAssemblyFile>
+ <PublicsOnly>0</PublicsOnly>
+ <StopOnExitCode>3</StopOnExitCode>
+ <CustomArgument></CustomArgument>
+ <IncludeLibraryModules></IncludeLibraryModules>
+ </CommonProperty>
+ <DllOption>
+ <SimDllName>SARMCM3.DLL</SimDllName>
+ <SimDllArguments>-MPU</SimDllArguments>
+ <SimDlgDll>DCM.DLL</SimDlgDll>
+ <SimDlgDllArguments>-pCM4</SimDlgDllArguments>
+ <TargetDllName>SARMCM3.DLL</TargetDllName>
+ <TargetDllArguments>-MPU</TargetDllArguments>
+ <TargetDlgDll>TCM.DLL</TargetDlgDll>
+ <TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
+ </DllOption>
+ <DebugOption>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ <Oh166RecLen>16</Oh166RecLen>
+ </OPTHX>
+ <Simulator>
+ <UseSimulator>0</UseSimulator>
+ <LoadApplicationAtStartup>1</LoadApplicationAtStartup>
+ <RunToMain>1</RunToMain>
+ <RestoreBreakpoints>1</RestoreBreakpoints>
+ <RestoreWatchpoints>1</RestoreWatchpoints>
+ <RestoreMemoryDisplay>1</RestoreMemoryDisplay>
+ <RestoreFunctions>1</RestoreFunctions>
+ <RestoreToolbox>1</RestoreToolbox>
+ <LimitSpeedToRealTime>0</LimitSpeedToRealTime>
+ </Simulator>
+ <Target>
+ <UseTarget>1</UseTarget>
+ <LoadApplicationAtStartup>1</LoadApplicationAtStartup>
+ <RunToMain>0</RunToMain>
+ <RestoreBreakpoints>1</RestoreBreakpoints>
+ <RestoreWatchpoints>1</RestoreWatchpoints>
+ <RestoreMemoryDisplay>1</RestoreMemoryDisplay>
+ <RestoreFunctions>0</RestoreFunctions>
+ <RestoreToolbox>1</RestoreToolbox>
+ </Target>
+ <RunDebugAfterBuild>0</RunDebugAfterBuild>
+ <TargetSelection>4</TargetSelection>
+ <SimDlls>
+ <CpuDll></CpuDll>
+ <CpuDllArguments></CpuDllArguments>
+ <PeripheralDll></PeripheralDll>
+ <PeripheralDllArguments></PeripheralDllArguments>
+ <InitializationFile></InitializationFile>
+ </SimDlls>
+ <TargetDlls>
+ <CpuDll></CpuDll>
+ <CpuDllArguments></CpuDllArguments>
+ <PeripheralDll></PeripheralDll>
+ <PeripheralDllArguments></PeripheralDllArguments>
+ <InitializationFile></InitializationFile>
+ <Driver>BIN\lmidk-agdi.dll</Driver>
+ </TargetDlls>
+ </DebugOption>
+ <Utilities>
+ <Flash1>
+ <UseTargetDll>1</UseTargetDll>
+ <UseExternalTool>0</UseExternalTool>
+ <RunIndependent>0</RunIndependent>
+ <UpdateFlashBeforeDebugging>0</UpdateFlashBeforeDebugging>
+ <Capability>1</Capability>
+ <DriverSelection>4099</DriverSelection>
+ </Flash1>
+ <Flash2>BIN\lmidk-agdi.dll</Flash2>
+ <Flash3></Flash3>
+ <Flash4></Flash4>
+ </Utilities>
+ <TargetArmAds>
+ <ArmAdsMisc>
+ <GenerateListings>0</GenerateListings>
+ <asHll>1</asHll>
+ <asAsm>1</asAsm>
+ <asMacX>1</asMacX>
+ <asSyms>1</asSyms>
+ <asFals>1</asFals>
+ <asDbgD>1</asDbgD>
+ <asForm>1</asForm>
+ <ldLst>0</ldLst>
+ <ldmm>1</ldmm>
+ <ldXref>1</ldXref>
+ <BigEnd>0</BigEnd>
+ <AdsALst>0</AdsALst>
+ <AdsACrf>0</AdsACrf>
+ <AdsANop>0</AdsANop>
+ <AdsANot>0</AdsANot>
+ <AdsLLst>1</AdsLLst>
+ <AdsLmap>1</AdsLmap>
+ <AdsLcgr>1</AdsLcgr>
+ <AdsLsym>1</AdsLsym>
+ <AdsLszi>1</AdsLszi>
+ <AdsLtoi>1</AdsLtoi>
+ <AdsLsun>1</AdsLsun>
+ <AdsLven>1</AdsLven>
+ <AdsLsxf>1</AdsLsxf>
+ <RvctClst>0</RvctClst>
+ <GenPPlst>0</GenPPlst>
+ <AdsCpuType>"Cortex-M4"</AdsCpuType>
+ <RvctDeviceName></RvctDeviceName>
+ <mOS>0</mOS>
+ <uocRom>0</uocRom>
+ <uocRam>0</uocRam>
+ <hadIROM>1</hadIROM>
+ <hadIRAM>1</hadIRAM>
+ <hadXRAM>0</hadXRAM>
+ <uocXRam>0</uocXRam>
+ <RvdsVP>2</RvdsVP>
+ <hadIRAM2>0</hadIRAM2>
+ <hadIROM2>0</hadIROM2>
+ <StupSel>8</StupSel>
+ <useUlib>1</useUlib>
+ <EndSel>0</EndSel>
+ <uLtcg>0</uLtcg>
+ <RoSelD>3</RoSelD>
+ <RwSelD>3</RwSelD>
+ <CodeSel>0</CodeSel>
+ <OptFeed>0</OptFeed>
+ <NoZi1>0</NoZi1>
+ <NoZi2>0</NoZi2>
+ <NoZi3>0</NoZi3>
+ <NoZi4>0</NoZi4>
+ <NoZi5>0</NoZi5>
+ <Ro1Chk>0</Ro1Chk>
+ <Ro2Chk>0</Ro2Chk>
+ <Ro3Chk>0</Ro3Chk>
+ <Ir1Chk>1</Ir1Chk>
+ <Ir2Chk>0</Ir2Chk>
+ <Ra1Chk>0</Ra1Chk>
+ <Ra2Chk>0</Ra2Chk>
+ <Ra3Chk>0</Ra3Chk>
+ <Im1Chk>1</Im1Chk>
+ <Im2Chk>0</Im2Chk>
+ <OnChipMemories>
+ <Ocm1>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm1>
+ <Ocm2>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm2>
+ <Ocm3>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm3>
+ <Ocm4>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm4>
+ <Ocm5>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm5>
+ <Ocm6>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm6>
+ <IRAM>
+ <Type>0</Type>
+ <StartAddress>0x20000000</StartAddress>
+ <Size>0x40000</Size>
+ </IRAM>
+ <IROM>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x100000</Size>
+ </IROM>
+ <XRAM>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </XRAM>
+ <OCR_RVCT1>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT1>
+ <OCR_RVCT2>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT2>
+ <OCR_RVCT3>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT3>
+ <OCR_RVCT4>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x100000</Size>
+ </OCR_RVCT4>
+ <OCR_RVCT5>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT5>
+ <OCR_RVCT6>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT6>
+ <OCR_RVCT7>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT7>
+ <OCR_RVCT8>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT8>
+ <OCR_RVCT9>
+ <Type>0</Type>
+ <StartAddress>0x20000000</StartAddress>
+ <Size>0x40000</Size>
+ </OCR_RVCT9>
+ <OCR_RVCT10>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT10>
+ </OnChipMemories>
+ <RvctStartVector></RvctStartVector>
+ </ArmAdsMisc>
+ <Cads>
+ <interw>0</interw>
+ <Optim>3</Optim>
+ <oTime>0</oTime>
+ <SplitLS>0</SplitLS>
+ <OneElfS>1</OneElfS>
+ <Strict>0</Strict>
+ <EnumInt>0</EnumInt>
+ <PlainCh>0</PlainCh>
+ <Ropi>0</Ropi>
+ <Rwpi>0</Rwpi>
+ <wLevel>2</wLevel>
+ <uThumb>0</uThumb>
+ <VariousControls>
+ <MiscControls>--c99</MiscControls>
+ <Define>rvmdk PART_TM4C1294NCPDT TARGET_IS_TM4C129_RA0</Define>
+ <Undefine></Undefine>
+ <IncludePath>.;..;..\..\..\..;</IncludePath>
+ </VariousControls>
+ </Cads>
+ <Aads>
+ <interw>1</interw>
+ <Ropi>0</Ropi>
+ <Rwpi>0</Rwpi>
+ <thumb>0</thumb>
+ <SplitLS>0</SplitLS>
+ <SwStkChk>0</SwStkChk>
+ <NoWarn>0</NoWarn>
+ <VariousControls>
+ <MiscControls></MiscControls>
+ <Define></Define>
+ <Undefine></Undefine>
+ <IncludePath></IncludePath>
+ </VariousControls>
+ </Aads>
+ <LDads>
+ <umfTarg>0</umfTarg>
+ <Ropi>0</Ropi>
+ <Rwpi>0</Rwpi>
+ <noStLib>0</noStLib>
+ <RepFail>1</RepFail>
+ <useFile>0</useFile>
+ <TextAddressRange>0x00000000</TextAddressRange>
+ <DataAddressRange>0x20000000</DataAddressRange>
+ <ScatterFile>interrupts.sct</ScatterFile>
+ <IncludeLibs></IncludeLibs>
+ <IncludeLibsPath></IncludeLibsPath>
+ <Misc>--entry Reset_Handler</Misc>
+ <LinkerInputFile></LinkerInputFile>
+ <DisabledWarnings></DisabledWarnings>
+ </LDads>
+ </TargetArmAds>
+ </TargetOption>
+ <Groups>
+ <Group>
+ <GroupName>Source</GroupName>
+ <Files>
+ <File>
+ <FileName>interrupts.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>.\interrupts.c</FilePath>
+ </File>
+ <File>
+ <FileName>pinout.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\drivers\pinout.c</FilePath>
+ </File>
+ <File>
+ <FileName>startup_rvmdk.S</FileName>
+ <FileType>2</FileType>
+ <FilePath>.\startup_rvmdk.S</FilePath>
+ </File>
+ <File>
+ <FileName>uartstdio.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\utils\uartstdio.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>Libraries</GroupName>
+ <Files>
+ <File>
+ <FileName>driverlib.lib</FileName>
+ <FileType>4</FileType>
+ <FilePath>..\..\..\..\driverlib\rvmdk\driverlib.lib</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>Documentation</GroupName>
+ <Files>
+ <File>
+ <FileName>readme.txt</FileName>
+ <FileType>5</FileType>
+ <FilePath>.\readme.txt</FilePath>
+ </File>
+ </Files>
+ </Group>
+ </Groups>
+ </Target>
+ </Targets>
+
+</Project>
diff --git a/boards/ek-tm4c1294xl/interrupts/interrupts_ccs.cmd b/boards/ek-tm4c1294xl/interrupts/interrupts_ccs.cmd new file mode 100644 index 0000000..2799513 --- /dev/null +++ b/boards/ek-tm4c1294xl/interrupts/interrupts_ccs.cmd @@ -0,0 +1,70 @@ +/******************************************************************************
+ *
+ * interrupts_ccs.cmd - CCS linker configuration file for interrupts.
+ *
+ * Copyright (c) 2013-2014 Texas Instruments Incorporated. All rights reserved.
+ * Software License Agreement
+ *
+ * Texas Instruments (TI) is supplying this software for use solely and
+ * exclusively on TI's microcontroller products. The software is owned by
+ * TI and/or its suppliers, and is protected under applicable copyright
+ * laws. You may not combine this software with "viral" open-source
+ * software in order to form a larger program.
+ *
+ * THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
+ * NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
+ * NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
+ * CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
+ * DAMAGES, FOR ANY REASON WHATSOEVER.
+ *
+ * This is part of revision 2.1.0.12573 of the EK-TM4C1294XL Firmware Package.
+ *
+ *****************************************************************************/
+
+--retain=g_pfnVectors
+
+/* The following command line options are set as part of the CCS project. */
+/* If you are building using the command line, or for some reason want to */
+/* define them here, you can uncomment and modify these lines as needed. */
+/* If you are using CCS for building, it is probably better to make any such */
+/* modifications in your CCS project and leave this file alone. */
+/* */
+/* --heap_size=0 */
+/* --stack_size=256 */
+/* --library=rtsv7M3_T_le_eabi.lib */
+
+/* The starting address of the application. Normally the interrupt vectors */
+/* must be located at the beginning of the application. */
+#define APP_BASE 0x00000000
+#define RAM_BASE 0x20000000
+
+/* System memory map */
+
+MEMORY
+{
+ /* Application stored in and executes from internal flash */
+ FLASH (RX) : origin = APP_BASE, length = 0x00100000
+ /* Application uses internal RAM for data */
+ SRAM (RWX) : origin = 0x20000000, length = 0x00040000
+}
+
+/* Section allocation in memory */
+
+SECTIONS
+{
+ .intvecs: > APP_BASE
+ .text : > FLASH
+ .const : > FLASH
+ .cinit : > FLASH
+ .pinit : > FLASH
+ .init_array : > FLASH
+
+ .vtable : > RAM_BASE
+ .data : > SRAM
+ .bss : > SRAM
+ .sysmem : > SRAM
+ .stack : > SRAM
+}
+
+__STACK_TOP = __stack + 512;
diff --git a/boards/ek-tm4c1294xl/interrupts/readme.txt b/boards/ek-tm4c1294xl/interrupts/readme.txt new file mode 100644 index 0000000..2268380 --- /dev/null +++ b/boards/ek-tm4c1294xl/interrupts/readme.txt @@ -0,0 +1,34 @@ +Interrupts
+
+This example application demonstrates the interrupt preemption and
+tail-chaining capabilities of Cortex-M4 microprocessor and NVIC. Nested
+interrupts are synthesized when the interrupts have the same priority,
+increasing priorities, and decreasing priorities. With increasing
+priorities, preemption will occur; in the other two cases tail-chaining
+will occur. The currently pending interrupts and the currently executing
+interrupt will be displayed on the UART; GPIO pins B3, L1 and L0 (the
+GPIO on jumper J27 on the left edge of the board) will be asserted upon
+interrupt handler entry and de-asserted before interrupt handler exit so
+that the off-to-on time can be observed with a scope or logic analyzer to
+see the speed of tail-chaining (for the two cases where tail-chaining is
+occurring).
+
+-------------------------------------------------------------------------------
+
+Copyright (c) 2013-2014 Texas Instruments Incorporated. All rights reserved.
+Software License Agreement
+
+Texas Instruments (TI) is supplying this software for use solely and
+exclusively on TI's microcontroller products. The software is owned by
+TI and/or its suppliers, and is protected under applicable copyright
+laws. You may not combine this software with "viral" open-source
+software in order to form a larger program.
+
+THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
+NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
+NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
+CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
+DAMAGES, FOR ANY REASON WHATSOEVER.
+
+This is part of revision 2.1.0.12573 of the EK-TM4C1294XL Firmware Package.
diff --git a/boards/ek-tm4c1294xl/interrupts/rvmdk/interrupts.axf b/boards/ek-tm4c1294xl/interrupts/rvmdk/interrupts.axf Binary files differnew file mode 100644 index 0000000..aebd584 --- /dev/null +++ b/boards/ek-tm4c1294xl/interrupts/rvmdk/interrupts.axf diff --git a/boards/ek-tm4c1294xl/interrupts/rvmdk/interrupts.bin b/boards/ek-tm4c1294xl/interrupts/rvmdk/interrupts.bin Binary files differnew file mode 100644 index 0000000..94a017b --- /dev/null +++ b/boards/ek-tm4c1294xl/interrupts/rvmdk/interrupts.bin diff --git a/boards/ek-tm4c1294xl/interrupts/startup_ccs.c b/boards/ek-tm4c1294xl/interrupts/startup_ccs.c new file mode 100644 index 0000000..e7ea7bb --- /dev/null +++ b/boards/ek-tm4c1294xl/interrupts/startup_ccs.c @@ -0,0 +1,277 @@ +//*****************************************************************************
+//
+// startup_ccs.c - Startup code for use with TI's Code Composer Studio.
+//
+// Copyright (c) 2013-2014 Texas Instruments Incorporated. All rights reserved.
+// Software License Agreement
+//
+// Texas Instruments (TI) is supplying this software for use solely and
+// exclusively on TI's microcontroller products. The software is owned by
+// TI and/or its suppliers, and is protected under applicable copyright
+// laws. You may not combine this software with "viral" open-source
+// software in order to form a larger program.
+//
+// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
+// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
+// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
+// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
+// DAMAGES, FOR ANY REASON WHATSOEVER.
+//
+// This is part of revision 2.1.0.12573 of the EK-TM4C1294XL Firmware Package.
+//
+//*****************************************************************************
+
+#include <stdint.h>
+#include "inc/hw_nvic.h"
+#include "inc/hw_types.h"
+
+//*****************************************************************************
+//
+// Forward declaration of the default fault handlers.
+//
+//*****************************************************************************
+void ResetISR(void);
+static void NmiSR(void);
+static void FaultISR(void);
+static void IntDefaultHandler(void);
+
+//*****************************************************************************
+//
+// External declaration for the reset handler that is to be called when the
+// processor is started
+//
+//*****************************************************************************
+extern void _c_int00(void);
+
+//*****************************************************************************
+//
+// Linker variable that marks the top of the stack.
+//
+//*****************************************************************************
+extern uint32_t __STACK_TOP;
+
+//*****************************************************************************
+//
+// External declarations for the interrupt handlers used by the application.
+//
+//*****************************************************************************
+extern void IntGPIOa(void);
+extern void IntGPIOb(void);
+extern void IntGPIOc(void);
+
+//*****************************************************************************
+//
+// The vector table. Note that the proper constructs must be placed on this to
+// ensure that it ends up at physical address 0x0000.0000 or at the start of
+// the program if located at a start address other than 0.
+//
+//*****************************************************************************
+#pragma DATA_SECTION(g_pfnVectors, ".intvecs")
+void (* const g_pfnVectors[])(void) =
+{
+ (void (*)(void))((uint32_t)&__STACK_TOP),
+ // The initial stack pointer
+ ResetISR, // The reset handler
+ NmiSR, // The NMI handler
+ FaultISR, // The hard fault handler
+ IntDefaultHandler, // The MPU fault handler
+ IntDefaultHandler, // The bus fault handler
+ IntDefaultHandler, // The usage fault handler
+ 0, // Reserved
+ 0, // Reserved
+ 0, // Reserved
+ 0, // Reserved
+ IntDefaultHandler, // SVCall handler
+ IntDefaultHandler, // Debug monitor handler
+ 0, // Reserved
+ IntDefaultHandler, // The PendSV handler
+ IntDefaultHandler, // The SysTick handler
+ IntGPIOa, // GPIO Port A
+ IntGPIOb, // GPIO Port B
+ IntGPIOc, // GPIO Port C
+ IntDefaultHandler, // GPIO Port D
+ IntDefaultHandler, // GPIO Port E
+ IntDefaultHandler, // UART0 Rx and Tx
+ IntDefaultHandler, // UART1 Rx and Tx
+ IntDefaultHandler, // SSI0 Rx and Tx
+ IntDefaultHandler, // I2C0 Master and Slave
+ IntDefaultHandler, // PWM Fault
+ IntDefaultHandler, // PWM Generator 0
+ IntDefaultHandler, // PWM Generator 1
+ IntDefaultHandler, // PWM Generator 2
+ IntDefaultHandler, // Quadrature Encoder 0
+ IntDefaultHandler, // ADC Sequence 0
+ IntDefaultHandler, // ADC Sequence 1
+ IntDefaultHandler, // ADC Sequence 2
+ IntDefaultHandler, // ADC Sequence 3
+ IntDefaultHandler, // Watchdog timer
+ IntDefaultHandler, // Timer 0 subtimer A
+ IntDefaultHandler, // Timer 0 subtimer B
+ IntDefaultHandler, // Timer 1 subtimer A
+ IntDefaultHandler, // Timer 1 subtimer B
+ IntDefaultHandler, // Timer 2 subtimer A
+ IntDefaultHandler, // Timer 2 subtimer B
+ IntDefaultHandler, // Analog Comparator 0
+ IntDefaultHandler, // Analog Comparator 1
+ IntDefaultHandler, // Analog Comparator 2
+ IntDefaultHandler, // System Control (PLL, OSC, BO)
+ IntDefaultHandler, // FLASH Control
+ IntDefaultHandler, // GPIO Port F
+ IntDefaultHandler, // GPIO Port G
+ IntDefaultHandler, // GPIO Port H
+ IntDefaultHandler, // UART2 Rx and Tx
+ IntDefaultHandler, // SSI1 Rx and Tx
+ IntDefaultHandler, // Timer 3 subtimer A
+ IntDefaultHandler, // Timer 3 subtimer B
+ IntDefaultHandler, // I2C1 Master and Slave
+ IntDefaultHandler, // CAN0
+ IntDefaultHandler, // CAN1
+ IntDefaultHandler, // Ethernet
+ IntDefaultHandler, // Hibernate
+ IntDefaultHandler, // USB0
+ IntDefaultHandler, // PWM Generator 3
+ IntDefaultHandler, // uDMA Software Transfer
+ IntDefaultHandler, // uDMA Error
+ IntDefaultHandler, // ADC1 Sequence 0
+ IntDefaultHandler, // ADC1 Sequence 1
+ IntDefaultHandler, // ADC1 Sequence 2
+ IntDefaultHandler, // ADC1 Sequence 3
+ IntDefaultHandler, // External Bus Interface 0
+ IntDefaultHandler, // GPIO Port J
+ IntDefaultHandler, // GPIO Port K
+ IntDefaultHandler, // GPIO Port L
+ IntDefaultHandler, // SSI2 Rx and Tx
+ IntDefaultHandler, // SSI3 Rx and Tx
+ IntDefaultHandler, // UART3 Rx and Tx
+ IntDefaultHandler, // UART4 Rx and Tx
+ IntDefaultHandler, // UART5 Rx and Tx
+ IntDefaultHandler, // UART6 Rx and Tx
+ IntDefaultHandler, // UART7 Rx and Tx
+ IntDefaultHandler, // I2C2 Master and Slave
+ IntDefaultHandler, // I2C3 Master and Slave
+ IntDefaultHandler, // Timer 4 subtimer A
+ IntDefaultHandler, // Timer 4 subtimer B
+ IntDefaultHandler, // Timer 5 subtimer A
+ IntDefaultHandler, // Timer 5 subtimer B
+ IntDefaultHandler, // FPU
+ 0, // Reserved
+ 0, // Reserved
+ IntDefaultHandler, // I2C4 Master and Slave
+ IntDefaultHandler, // I2C5 Master and Slave
+ IntDefaultHandler, // GPIO Port M
+ IntDefaultHandler, // GPIO Port N
+ 0, // Reserved
+ IntDefaultHandler, // Tamper
+ IntDefaultHandler, // GPIO Port P (Summary or P0)
+ IntDefaultHandler, // GPIO Port P1
+ IntDefaultHandler, // GPIO Port P2
+ IntDefaultHandler, // GPIO Port P3
+ IntDefaultHandler, // GPIO Port P4
+ IntDefaultHandler, // GPIO Port P5
+ IntDefaultHandler, // GPIO Port P6
+ IntDefaultHandler, // GPIO Port P7
+ IntDefaultHandler, // GPIO Port Q (Summary or Q0)
+ IntDefaultHandler, // GPIO Port Q1
+ IntDefaultHandler, // GPIO Port Q2
+ IntDefaultHandler, // GPIO Port Q3
+ IntDefaultHandler, // GPIO Port Q4
+ IntDefaultHandler, // GPIO Port Q5
+ IntDefaultHandler, // GPIO Port Q6
+ IntDefaultHandler, // GPIO Port Q7
+ IntDefaultHandler, // GPIO Port R
+ IntDefaultHandler, // GPIO Port S
+ IntDefaultHandler, // SHA/MD5 0
+ IntDefaultHandler, // AES 0
+ IntDefaultHandler, // DES3DES 0
+ IntDefaultHandler, // LCD Controller 0
+ IntDefaultHandler, // Timer 6 subtimer A
+ IntDefaultHandler, // Timer 6 subtimer B
+ IntDefaultHandler, // Timer 7 subtimer A
+ IntDefaultHandler, // Timer 7 subtimer B
+ IntDefaultHandler, // I2C6 Master and Slave
+ IntDefaultHandler, // I2C7 Master and Slave
+ IntDefaultHandler, // HIM Scan Matrix Keyboard 0
+ IntDefaultHandler, // One Wire 0
+ IntDefaultHandler, // HIM PS/2 0
+ IntDefaultHandler, // HIM LED Sequencer 0
+ IntDefaultHandler, // HIM Consumer IR 0
+ IntDefaultHandler, // I2C8 Master and Slave
+ IntDefaultHandler, // I2C9 Master and Slave
+ IntDefaultHandler // GPIO Port T
+};
+
+//*****************************************************************************
+//
+// This is the code that gets called when the processor first starts execution
+// following a reset event. Only the absolutely necessary set is performed,
+// after which the application supplied entry() routine is called. Any fancy
+// actions (such as making decisions based on the reset cause register, and
+// resetting the bits in that register) are left solely in the hands of the
+// application.
+//
+//*****************************************************************************
+void
+ResetISR(void)
+{
+ //
+ // Jump to the CCS C initialization routine. This will enable the
+ // floating-point unit as well, so that does not need to be done here.
+ //
+ __asm(" .global _c_int00\n"
+ " b.w _c_int00");
+}
+
+//*****************************************************************************
+//
+// This is the code that gets called when the processor receives a NMI. This
+// simply enters an infinite loop, preserving the system state for examination
+// by a debugger.
+//
+//*****************************************************************************
+static void
+NmiSR(void)
+{
+ //
+ // Enter an infinite loop.
+ //
+ while(1)
+ {
+ }
+}
+
+//*****************************************************************************
+//
+// This is the code that gets called when the processor receives a fault
+// interrupt. This simply enters an infinite loop, preserving the system state
+// for examination by a debugger.
+//
+//*****************************************************************************
+static void
+FaultISR(void)
+{
+ //
+ // Enter an infinite loop.
+ //
+ while(1)
+ {
+ }
+}
+
+//*****************************************************************************
+//
+// This is the code that gets called when the processor receives an unexpected
+// interrupt. This simply enters an infinite loop, preserving the system state
+// for examination by a debugger.
+//
+//*****************************************************************************
+static void
+IntDefaultHandler(void)
+{
+ //
+ // Go into an infinite loop.
+ //
+ while(1)
+ {
+ }
+}
diff --git a/boards/ek-tm4c1294xl/interrupts/startup_ewarm.c b/boards/ek-tm4c1294xl/interrupts/startup_ewarm.c new file mode 100644 index 0000000..7b2d748 --- /dev/null +++ b/boards/ek-tm4c1294xl/interrupts/startup_ewarm.c @@ -0,0 +1,308 @@ +//*****************************************************************************
+//
+// startup_ewarm.c - Startup code for use with IAR's Embedded Workbench,
+// version 5.
+//
+// Copyright (c) 2013-2014 Texas Instruments Incorporated. All rights reserved.
+// Software License Agreement
+//
+// Texas Instruments (TI) is supplying this software for use solely and
+// exclusively on TI's microcontroller products. The software is owned by
+// TI and/or its suppliers, and is protected under applicable copyright
+// laws. You may not combine this software with "viral" open-source
+// software in order to form a larger program.
+//
+// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
+// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
+// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
+// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
+// DAMAGES, FOR ANY REASON WHATSOEVER.
+//
+// This is part of revision 2.1.0.12573 of the EK-TM4C1294XL Firmware Package.
+//
+//*****************************************************************************
+
+#include <stdint.h>
+#include "inc/hw_nvic.h"
+#include "inc/hw_types.h"
+
+//*****************************************************************************
+//
+// Enable the IAR extensions for this source file.
+//
+//*****************************************************************************
+#pragma language=extended
+
+//*****************************************************************************
+//
+// Forward declaration of the default fault handlers.
+//
+//*****************************************************************************
+void ResetISR(void);
+static void NmiSR(void);
+static void FaultISR(void);
+static void IntDefaultHandler(void);
+
+//*****************************************************************************
+//
+// External declarations for the interrupt handlers used by the application.
+//
+//*****************************************************************************
+extern void IntGPIOa(void);
+extern void IntGPIOb(void);
+extern void IntGPIOc(void);
+
+//*****************************************************************************
+//
+// The entry point for the application startup code.
+//
+//*****************************************************************************
+extern void __iar_program_start(void);
+
+//*****************************************************************************
+//
+// Reserve space for the system stack.
+//
+//*****************************************************************************
+static uint32_t pui32Stack[128] @ ".noinit";
+
+//*****************************************************************************
+//
+// A union that describes the entries of the vector table. The union is needed
+// since the first entry is the stack pointer and the remainder are function
+// pointers.
+//
+//*****************************************************************************
+typedef union
+{
+ void (*pfnHandler)(void);
+ uint32_t ui32Ptr;
+}
+uVectorEntry;
+
+//*****************************************************************************
+//
+// The vector table. Note that the proper constructs must be placed on this to
+// ensure that it ends up at physical address 0x0000.0000.
+//
+//*****************************************************************************
+__root const uVectorEntry __vector_table[] @ ".intvec" =
+{
+ { .ui32Ptr = (uint32_t)pui32Stack + sizeof(pui32Stack) },
+ // The initial stack pointer
+ ResetISR, // The reset handler
+ NmiSR, // The NMI handler
+ FaultISR, // The hard fault handler
+ IntDefaultHandler, // The MPU fault handler
+ IntDefaultHandler, // The bus fault handler
+ IntDefaultHandler, // The usage fault handler
+ 0, // Reserved
+ 0, // Reserved
+ 0, // Reserved
+ 0, // Reserved
+ IntDefaultHandler, // SVCall handler
+ IntDefaultHandler, // Debug monitor handler
+ 0, // Reserved
+ IntDefaultHandler, // The PendSV handler
+ IntDefaultHandler, // The SysTick handler
+ IntGPIOa, // GPIO Port A
+ IntGPIOb, // GPIO Port B
+ IntGPIOc, // GPIO Port C
+ IntDefaultHandler, // GPIO Port D
+ IntDefaultHandler, // GPIO Port E
+ IntDefaultHandler, // UART0 Rx and Tx
+ IntDefaultHandler, // UART1 Rx and Tx
+ IntDefaultHandler, // SSI0 Rx and Tx
+ IntDefaultHandler, // I2C0 Master and Slave
+ IntDefaultHandler, // PWM Fault
+ IntDefaultHandler, // PWM Generator 0
+ IntDefaultHandler, // PWM Generator 1
+ IntDefaultHandler, // PWM Generator 2
+ IntDefaultHandler, // Quadrature Encoder 0
+ IntDefaultHandler, // ADC Sequence 0
+ IntDefaultHandler, // ADC Sequence 1
+ IntDefaultHandler, // ADC Sequence 2
+ IntDefaultHandler, // ADC Sequence 3
+ IntDefaultHandler, // Watchdog timer
+ IntDefaultHandler, // Timer 0 subtimer A
+ IntDefaultHandler, // Timer 0 subtimer B
+ IntDefaultHandler, // Timer 1 subtimer A
+ IntDefaultHandler, // Timer 1 subtimer B
+ IntDefaultHandler, // Timer 2 subtimer A
+ IntDefaultHandler, // Timer 2 subtimer B
+ IntDefaultHandler, // Analog Comparator 0
+ IntDefaultHandler, // Analog Comparator 1
+ IntDefaultHandler, // Analog Comparator 2
+ IntDefaultHandler, // System Control (PLL, OSC, BO)
+ IntDefaultHandler, // FLASH Control
+ IntDefaultHandler, // GPIO Port F
+ IntDefaultHandler, // GPIO Port G
+ IntDefaultHandler, // GPIO Port H
+ IntDefaultHandler, // UART2 Rx and Tx
+ IntDefaultHandler, // SSI1 Rx and Tx
+ IntDefaultHandler, // Timer 3 subtimer A
+ IntDefaultHandler, // Timer 3 subtimer B
+ IntDefaultHandler, // I2C1 Master and Slave
+ IntDefaultHandler, // CAN0
+ IntDefaultHandler, // CAN1
+ IntDefaultHandler, // Ethernet
+ IntDefaultHandler, // Hibernate
+ IntDefaultHandler, // USB0
+ IntDefaultHandler, // PWM Generator 3
+ IntDefaultHandler, // uDMA Software Transfer
+ IntDefaultHandler, // uDMA Error
+ IntDefaultHandler, // ADC1 Sequence 0
+ IntDefaultHandler, // ADC1 Sequence 1
+ IntDefaultHandler, // ADC1 Sequence 2
+ IntDefaultHandler, // ADC1 Sequence 3
+ IntDefaultHandler, // External Bus Interface 0
+ IntDefaultHandler, // GPIO Port J
+ IntDefaultHandler, // GPIO Port K
+ IntDefaultHandler, // GPIO Port L
+ IntDefaultHandler, // SSI2 Rx and Tx
+ IntDefaultHandler, // SSI3 Rx and Tx
+ IntDefaultHandler, // UART3 Rx and Tx
+ IntDefaultHandler, // UART4 Rx and Tx
+ IntDefaultHandler, // UART5 Rx and Tx
+ IntDefaultHandler, // UART6 Rx and Tx
+ IntDefaultHandler, // UART7 Rx and Tx
+ IntDefaultHandler, // I2C2 Master and Slave
+ IntDefaultHandler, // I2C3 Master and Slave
+ IntDefaultHandler, // Timer 4 subtimer A
+ IntDefaultHandler, // Timer 4 subtimer B
+ IntDefaultHandler, // Timer 5 subtimer A
+ IntDefaultHandler, // Timer 5 subtimer B
+ IntDefaultHandler, // FPU
+ 0, // Reserved
+ 0, // Reserved
+ IntDefaultHandler, // I2C4 Master and Slave
+ IntDefaultHandler, // I2C5 Master and Slave
+ IntDefaultHandler, // GPIO Port M
+ IntDefaultHandler, // GPIO Port N
+ 0, // Reserved
+ IntDefaultHandler, // Tamper
+ IntDefaultHandler, // GPIO Port P (Summary or P0)
+ IntDefaultHandler, // GPIO Port P1
+ IntDefaultHandler, // GPIO Port P2
+ IntDefaultHandler, // GPIO Port P3
+ IntDefaultHandler, // GPIO Port P4
+ IntDefaultHandler, // GPIO Port P5
+ IntDefaultHandler, // GPIO Port P6
+ IntDefaultHandler, // GPIO Port P7
+ IntDefaultHandler, // GPIO Port Q (Summary or Q0)
+ IntDefaultHandler, // GPIO Port Q1
+ IntDefaultHandler, // GPIO Port Q2
+ IntDefaultHandler, // GPIO Port Q3
+ IntDefaultHandler, // GPIO Port Q4
+ IntDefaultHandler, // GPIO Port Q5
+ IntDefaultHandler, // GPIO Port Q6
+ IntDefaultHandler, // GPIO Port Q7
+ IntDefaultHandler, // GPIO Port R
+ IntDefaultHandler, // GPIO Port S
+ IntDefaultHandler, // SHA/MD5 0
+ IntDefaultHandler, // AES 0
+ IntDefaultHandler, // DES3DES 0
+ IntDefaultHandler, // LCD Controller 0
+ IntDefaultHandler, // Timer 6 subtimer A
+ IntDefaultHandler, // Timer 6 subtimer B
+ IntDefaultHandler, // Timer 7 subtimer A
+ IntDefaultHandler, // Timer 7 subtimer B
+ IntDefaultHandler, // I2C6 Master and Slave
+ IntDefaultHandler, // I2C7 Master and Slave
+ IntDefaultHandler, // HIM Scan Matrix Keyboard 0
+ IntDefaultHandler, // One Wire 0
+ IntDefaultHandler, // HIM PS/2 0
+ IntDefaultHandler, // HIM LED Sequencer 0
+ IntDefaultHandler, // HIM Consumer IR 0
+ IntDefaultHandler, // I2C8 Master and Slave
+ IntDefaultHandler, // I2C9 Master and Slave
+ IntDefaultHandler // GPIO Port T
+};
+
+//*****************************************************************************
+//
+// This is the code that gets called when the processor first starts execution
+// following a reset event. Only the absolutely necessary set is performed,
+// after which the application supplied entry() routine is called. Any fancy
+// actions (such as making decisions based on the reset cause register, and
+// resetting the bits in that register) are left solely in the hands of the
+// application.
+//
+//*****************************************************************************
+void
+ResetISR(void)
+{
+ //
+ // Enable the floating-point unit. This must be done here to handle the
+ // case where main() uses floating-point and the function prologue saves
+ // floating-point registers (which will fault if floating-point is not
+ // enabled). Any configuration of the floating-point unit using DriverLib
+ // APIs must be done here prior to the floating-point unit being enabled.
+ //
+ // Note that this does not use DriverLib since it might not be included in
+ // this project.
+ //
+ HWREG(NVIC_CPAC) = ((HWREG(NVIC_CPAC) &
+ ~(NVIC_CPAC_CP10_M | NVIC_CPAC_CP11_M)) |
+ NVIC_CPAC_CP10_FULL | NVIC_CPAC_CP11_FULL);
+
+ //
+ // Call the application's entry point.
+ //
+ __iar_program_start();
+}
+
+//*****************************************************************************
+//
+// This is the code that gets called when the processor receives a NMI. This
+// simply enters an infinite loop, preserving the system state for examination
+// by a debugger.
+//
+//*****************************************************************************
+static void
+NmiSR(void)
+{
+ //
+ // Enter an infinite loop.
+ //
+ while(1)
+ {
+ }
+}
+
+//*****************************************************************************
+//
+// This is the code that gets called when the processor receives a fault
+// interrupt. This simply enters an infinite loop, preserving the system state
+// for examination by a debugger.
+//
+//*****************************************************************************
+static void
+FaultISR(void)
+{
+ //
+ // Enter an infinite loop.
+ //
+ while(1)
+ {
+ }
+}
+
+//*****************************************************************************
+//
+// This is the code that gets called when the processor receives an unexpected
+// interrupt. This simply enters an infinite loop, preserving the system state
+// for examination by a debugger.
+//
+//*****************************************************************************
+static void
+IntDefaultHandler(void)
+{
+ //
+ // Go into an infinite loop.
+ //
+ while(1)
+ {
+ }
+}
diff --git a/boards/ek-tm4c1294xl/interrupts/startup_gcc.c b/boards/ek-tm4c1294xl/interrupts/startup_gcc.c new file mode 100644 index 0000000..cd21be0 --- /dev/null +++ b/boards/ek-tm4c1294xl/interrupts/startup_gcc.c @@ -0,0 +1,324 @@ +//*****************************************************************************
+//
+// startup_gcc.c - Startup code for use with GNU tools.
+//
+// Copyright (c) 2013-2014 Texas Instruments Incorporated. All rights reserved.
+// Software License Agreement
+//
+// Texas Instruments (TI) is supplying this software for use solely and
+// exclusively on TI's microcontroller products. The software is owned by
+// TI and/or its suppliers, and is protected under applicable copyright
+// laws. You may not combine this software with "viral" open-source
+// software in order to form a larger program.
+//
+// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
+// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
+// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
+// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
+// DAMAGES, FOR ANY REASON WHATSOEVER.
+//
+// This is part of revision 2.1.0.12573 of the EK-TM4C1294XL Firmware Package.
+//
+//*****************************************************************************
+
+#include <stdint.h>
+#include "inc/hw_nvic.h"
+#include "inc/hw_types.h"
+
+//*****************************************************************************
+//
+// Forward declaration of the default fault handlers.
+//
+//*****************************************************************************
+void ResetISR(void);
+static void NmiSR(void);
+static void FaultISR(void);
+static void IntDefaultHandler(void);
+
+//*****************************************************************************
+//
+// External declarations for the interrupt handlers used by the application.
+//
+//*****************************************************************************
+extern void IntGPIOa(void);
+extern void IntGPIOb(void);
+extern void IntGPIOc(void);
+
+//*****************************************************************************
+//
+// The entry point for the application.
+//
+//*****************************************************************************
+extern int main(void);
+
+//*****************************************************************************
+//
+// Reserve space for the system stack.
+//
+//*****************************************************************************
+static uint32_t pui32Stack[128];
+
+//*****************************************************************************
+//
+// The vector table. Note that the proper constructs must be placed on this to
+// ensure that it ends up at physical address 0x0000.0000.
+//
+//*****************************************************************************
+__attribute__ ((section(".isr_vector")))
+void (* const g_pfnVectors[])(void) =
+{
+ (void (*)(void))((uint32_t)pui32Stack + sizeof(pui32Stack)),
+ // The initial stack pointer
+ ResetISR, // The reset handler
+ NmiSR, // The NMI handler
+ FaultISR, // The hard fault handler
+ IntDefaultHandler, // The MPU fault handler
+ IntDefaultHandler, // The bus fault handler
+ IntDefaultHandler, // The usage fault handler
+ 0, // Reserved
+ 0, // Reserved
+ 0, // Reserved
+ 0, // Reserved
+ IntDefaultHandler, // SVCall handler
+ IntDefaultHandler, // Debug monitor handler
+ 0, // Reserved
+ IntDefaultHandler, // The PendSV handler
+ IntDefaultHandler, // The SysTick handler
+ IntGPIOa, // GPIO Port A
+ IntGPIOb, // GPIO Port B
+ IntGPIOc, // GPIO Port C
+ IntDefaultHandler, // GPIO Port D
+ IntDefaultHandler, // GPIO Port E
+ IntDefaultHandler, // UART0 Rx and Tx
+ IntDefaultHandler, // UART1 Rx and Tx
+ IntDefaultHandler, // SSI0 Rx and Tx
+ IntDefaultHandler, // I2C0 Master and Slave
+ IntDefaultHandler, // PWM Fault
+ IntDefaultHandler, // PWM Generator 0
+ IntDefaultHandler, // PWM Generator 1
+ IntDefaultHandler, // PWM Generator 2
+ IntDefaultHandler, // Quadrature Encoder 0
+ IntDefaultHandler, // ADC Sequence 0
+ IntDefaultHandler, // ADC Sequence 1
+ IntDefaultHandler, // ADC Sequence 2
+ IntDefaultHandler, // ADC Sequence 3
+ IntDefaultHandler, // Watchdog timer
+ IntDefaultHandler, // Timer 0 subtimer A
+ IntDefaultHandler, // Timer 0 subtimer B
+ IntDefaultHandler, // Timer 1 subtimer A
+ IntDefaultHandler, // Timer 1 subtimer B
+ IntDefaultHandler, // Timer 2 subtimer A
+ IntDefaultHandler, // Timer 2 subtimer B
+ IntDefaultHandler, // Analog Comparator 0
+ IntDefaultHandler, // Analog Comparator 1
+ IntDefaultHandler, // Analog Comparator 2
+ IntDefaultHandler, // System Control (PLL, OSC, BO)
+ IntDefaultHandler, // FLASH Control
+ IntDefaultHandler, // GPIO Port F
+ IntDefaultHandler, // GPIO Port G
+ IntDefaultHandler, // GPIO Port H
+ IntDefaultHandler, // UART2 Rx and Tx
+ IntDefaultHandler, // SSI1 Rx and Tx
+ IntDefaultHandler, // Timer 3 subtimer A
+ IntDefaultHandler, // Timer 3 subtimer B
+ IntDefaultHandler, // I2C1 Master and Slave
+ IntDefaultHandler, // CAN0
+ IntDefaultHandler, // CAN1
+ IntDefaultHandler, // Ethernet
+ IntDefaultHandler, // Hibernate
+ IntDefaultHandler, // USB0
+ IntDefaultHandler, // PWM Generator 3
+ IntDefaultHandler, // uDMA Software Transfer
+ IntDefaultHandler, // uDMA Error
+ IntDefaultHandler, // ADC1 Sequence 0
+ IntDefaultHandler, // ADC1 Sequence 1
+ IntDefaultHandler, // ADC1 Sequence 2
+ IntDefaultHandler, // ADC1 Sequence 3
+ IntDefaultHandler, // External Bus Interface 0
+ IntDefaultHandler, // GPIO Port J
+ IntDefaultHandler, // GPIO Port K
+ IntDefaultHandler, // GPIO Port L
+ IntDefaultHandler, // SSI2 Rx and Tx
+ IntDefaultHandler, // SSI3 Rx and Tx
+ IntDefaultHandler, // UART3 Rx and Tx
+ IntDefaultHandler, // UART4 Rx and Tx
+ IntDefaultHandler, // UART5 Rx and Tx
+ IntDefaultHandler, // UART6 Rx and Tx
+ IntDefaultHandler, // UART7 Rx and Tx
+ IntDefaultHandler, // I2C2 Master and Slave
+ IntDefaultHandler, // I2C3 Master and Slave
+ IntDefaultHandler, // Timer 4 subtimer A
+ IntDefaultHandler, // Timer 4 subtimer B
+ IntDefaultHandler, // Timer 5 subtimer A
+ IntDefaultHandler, // Timer 5 subtimer B
+ IntDefaultHandler, // FPU
+ 0, // Reserved
+ 0, // Reserved
+ IntDefaultHandler, // I2C4 Master and Slave
+ IntDefaultHandler, // I2C5 Master and Slave
+ IntDefaultHandler, // GPIO Port M
+ IntDefaultHandler, // GPIO Port N
+ 0, // Reserved
+ IntDefaultHandler, // Tamper
+ IntDefaultHandler, // GPIO Port P (Summary or P0)
+ IntDefaultHandler, // GPIO Port P1
+ IntDefaultHandler, // GPIO Port P2
+ IntDefaultHandler, // GPIO Port P3
+ IntDefaultHandler, // GPIO Port P4
+ IntDefaultHandler, // GPIO Port P5
+ IntDefaultHandler, // GPIO Port P6
+ IntDefaultHandler, // GPIO Port P7
+ IntDefaultHandler, // GPIO Port Q (Summary or Q0)
+ IntDefaultHandler, // GPIO Port Q1
+ IntDefaultHandler, // GPIO Port Q2
+ IntDefaultHandler, // GPIO Port Q3
+ IntDefaultHandler, // GPIO Port Q4
+ IntDefaultHandler, // GPIO Port Q5
+ IntDefaultHandler, // GPIO Port Q6
+ IntDefaultHandler, // GPIO Port Q7
+ IntDefaultHandler, // GPIO Port R
+ IntDefaultHandler, // GPIO Port S
+ IntDefaultHandler, // SHA/MD5 0
+ IntDefaultHandler, // AES 0
+ IntDefaultHandler, // DES3DES 0
+ IntDefaultHandler, // LCD Controller 0
+ IntDefaultHandler, // Timer 6 subtimer A
+ IntDefaultHandler, // Timer 6 subtimer B
+ IntDefaultHandler, // Timer 7 subtimer A
+ IntDefaultHandler, // Timer 7 subtimer B
+ IntDefaultHandler, // I2C6 Master and Slave
+ IntDefaultHandler, // I2C7 Master and Slave
+ IntDefaultHandler, // HIM Scan Matrix Keyboard 0
+ IntDefaultHandler, // One Wire 0
+ IntDefaultHandler, // HIM PS/2 0
+ IntDefaultHandler, // HIM LED Sequencer 0
+ IntDefaultHandler, // HIM Consumer IR 0
+ IntDefaultHandler, // I2C8 Master and Slave
+ IntDefaultHandler, // I2C9 Master and Slave
+ IntDefaultHandler // GPIO Port T
+};
+
+//*****************************************************************************
+//
+// The following are constructs created by the linker, indicating where the
+// the "data" and "bss" segments reside in memory. The initializers for the
+// for the "data" segment resides immediately following the "text" segment.
+//
+//*****************************************************************************
+extern uint32_t _etext;
+extern uint32_t _data;
+extern uint32_t _edata;
+extern uint32_t _bss;
+extern uint32_t _ebss;
+
+//*****************************************************************************
+//
+// This is the code that gets called when the processor first starts execution
+// following a reset event. Only the absolutely necessary set is performed,
+// after which the application supplied entry() routine is called. Any fancy
+// actions (such as making decisions based on the reset cause register, and
+// resetting the bits in that register) are left solely in the hands of the
+// application.
+//
+//*****************************************************************************
+void
+ResetISR(void)
+{
+ uint32_t *pui32Src, *pui32Dest;
+
+ //
+ // Copy the data segment initializers from flash to SRAM.
+ //
+ pui32Src = &_etext;
+ for(pui32Dest = &_data; pui32Dest < &_edata; )
+ {
+ *pui32Dest++ = *pui32Src++;
+ }
+
+ //
+ // Zero fill the bss segment.
+ //
+ __asm(" ldr r0, =_bss\n"
+ " ldr r1, =_ebss\n"
+ " mov r2, #0\n"
+ " .thumb_func\n"
+ "zero_loop:\n"
+ " cmp r0, r1\n"
+ " it lt\n"
+ " strlt r2, [r0], #4\n"
+ " blt zero_loop");
+
+ //
+ // Enable the floating-point unit. This must be done here to handle the
+ // case where main() uses floating-point and the function prologue saves
+ // floating-point registers (which will fault if floating-point is not
+ // enabled). Any configuration of the floating-point unit using DriverLib
+ // APIs must be done here prior to the floating-point unit being enabled.
+ //
+ // Note that this does not use DriverLib since it might not be included in
+ // this project.
+ //
+ HWREG(NVIC_CPAC) = ((HWREG(NVIC_CPAC) &
+ ~(NVIC_CPAC_CP10_M | NVIC_CPAC_CP11_M)) |
+ NVIC_CPAC_CP10_FULL | NVIC_CPAC_CP11_FULL);
+
+ //
+ // Call the application's entry point.
+ //
+ main();
+}
+
+//*****************************************************************************
+//
+// This is the code that gets called when the processor receives a NMI. This
+// simply enters an infinite loop, preserving the system state for examination
+// by a debugger.
+//
+//*****************************************************************************
+static void
+NmiSR(void)
+{
+ //
+ // Enter an infinite loop.
+ //
+ while(1)
+ {
+ }
+}
+
+//*****************************************************************************
+//
+// This is the code that gets called when the processor receives a fault
+// interrupt. This simply enters an infinite loop, preserving the system state
+// for examination by a debugger.
+//
+//*****************************************************************************
+static void
+FaultISR(void)
+{
+ //
+ // Enter an infinite loop.
+ //
+ while(1)
+ {
+ }
+}
+
+//*****************************************************************************
+//
+// This is the code that gets called when the processor receives an unexpected
+// interrupt. This simply enters an infinite loop, preserving the system state
+// for examination by a debugger.
+//
+//*****************************************************************************
+static void
+IntDefaultHandler(void)
+{
+ //
+ // Go into an infinite loop.
+ //
+ while(1)
+ {
+ }
+}
diff --git a/boards/ek-tm4c1294xl/interrupts/startup_rvmdk.S b/boards/ek-tm4c1294xl/interrupts/startup_rvmdk.S new file mode 100644 index 0000000..c8466b3 --- /dev/null +++ b/boards/ek-tm4c1294xl/interrupts/startup_rvmdk.S @@ -0,0 +1,333 @@ +; <<< Use Configuration Wizard in Context Menu >>>
+;******************************************************************************
+;
+; startup_rvmdk.S - Startup code for use with Keil's uVision.
+;
+; Copyright (c) 2013-2014 Texas Instruments Incorporated. All rights reserved.
+; Software License Agreement
+;
+; Texas Instruments (TI) is supplying this software for use solely and
+; exclusively on TI's microcontroller products. The software is owned by
+; TI and/or its suppliers, and is protected under applicable copyright
+; laws. You may not combine this software with "viral" open-source
+; software in order to form a larger program.
+;
+; THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
+; NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
+; NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+; A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
+; CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
+; DAMAGES, FOR ANY REASON WHATSOEVER.
+;
+; This is part of revision 2.1.0.12573 of the EK-TM4C1294XL Firmware Package.
+;
+;******************************************************************************
+
+;******************************************************************************
+;
+; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;
+;******************************************************************************
+Stack EQU 0x00000200
+
+;******************************************************************************
+;
+; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;
+;******************************************************************************
+Heap EQU 0x00000000
+
+;******************************************************************************
+;
+; Allocate space for the stack.
+;
+;******************************************************************************
+ AREA STACK, NOINIT, READWRITE, ALIGN=3
+StackMem
+ SPACE Stack
+__initial_sp
+
+;******************************************************************************
+;
+; Allocate space for the heap.
+;
+;******************************************************************************
+ AREA HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+HeapMem
+ SPACE Heap
+__heap_limit
+
+;******************************************************************************
+;
+; Indicate that the code in this file preserves 8-byte alignment of the stack.
+;
+;******************************************************************************
+ PRESERVE8
+
+;******************************************************************************
+;
+; Place code into the reset code section.
+;
+;******************************************************************************
+ AREA RESET, CODE, READONLY
+ THUMB
+
+;******************************************************************************
+;
+; External declarations for the interrupt handlers used by the application.
+;
+;******************************************************************************
+ EXTERN IntGPIOa
+ EXTERN IntGPIOb
+ EXTERN IntGPIOc
+
+;******************************************************************************
+;
+; The vector table.
+;
+;******************************************************************************
+ EXPORT __Vectors
+__Vectors
+ DCD StackMem + Stack ; Top of Stack
+ DCD Reset_Handler ; Reset Handler
+ DCD NmiSR ; NMI Handler
+ DCD FaultISR ; Hard Fault Handler
+ DCD IntDefaultHandler ; The MPU fault handler
+ DCD IntDefaultHandler ; The bus fault handler
+ DCD IntDefaultHandler ; The usage fault handler
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD IntDefaultHandler ; SVCall handler
+ DCD IntDefaultHandler ; Debug monitor handler
+ DCD 0 ; Reserved
+ DCD IntDefaultHandler ; The PendSV handler
+ DCD IntDefaultHandler ; The SysTick handler
+ DCD IntGPIOa ; GPIO Port A
+ DCD IntGPIOb ; GPIO Port B
+ DCD IntGPIOc ; GPIO Port C
+ DCD IntDefaultHandler ; GPIO Port D
+ DCD IntDefaultHandler ; GPIO Port E
+ DCD IntDefaultHandler ; UART0 Rx and Tx
+ DCD IntDefaultHandler ; UART1 Rx and Tx
+ DCD IntDefaultHandler ; SSI0 Rx and Tx
+ DCD IntDefaultHandler ; I2C0 Master and Slave
+ DCD IntDefaultHandler ; PWM Fault
+ DCD IntDefaultHandler ; PWM Generator 0
+ DCD IntDefaultHandler ; PWM Generator 1
+ DCD IntDefaultHandler ; PWM Generator 2
+ DCD IntDefaultHandler ; Quadrature Encoder 0
+ DCD IntDefaultHandler ; ADC Sequence 0
+ DCD IntDefaultHandler ; ADC Sequence 1
+ DCD IntDefaultHandler ; ADC Sequence 2
+ DCD IntDefaultHandler ; ADC Sequence 3
+ DCD IntDefaultHandler ; Watchdog timer
+ DCD IntDefaultHandler ; Timer 0 subtimer A
+ DCD IntDefaultHandler ; Timer 0 subtimer B
+ DCD IntDefaultHandler ; Timer 1 subtimer A
+ DCD IntDefaultHandler ; Timer 1 subtimer B
+ DCD IntDefaultHandler ; Timer 2 subtimer A
+ DCD IntDefaultHandler ; Timer 2 subtimer B
+ DCD IntDefaultHandler ; Analog Comparator 0
+ DCD IntDefaultHandler ; Analog Comparator 1
+ DCD IntDefaultHandler ; Analog Comparator 2
+ DCD IntDefaultHandler ; System Control (PLL, OSC, BO)
+ DCD IntDefaultHandler ; FLASH Control
+ DCD IntDefaultHandler ; GPIO Port F
+ DCD IntDefaultHandler ; GPIO Port G
+ DCD IntDefaultHandler ; GPIO Port H
+ DCD IntDefaultHandler ; UART2 Rx and Tx
+ DCD IntDefaultHandler ; SSI1 Rx and Tx
+ DCD IntDefaultHandler ; Timer 3 subtimer A
+ DCD IntDefaultHandler ; Timer 3 subtimer B
+ DCD IntDefaultHandler ; I2C1 Master and Slave
+ DCD IntDefaultHandler ; CAN0
+ DCD IntDefaultHandler ; CAN1
+ DCD IntDefaultHandler ; Ethernet
+ DCD IntDefaultHandler ; Hibernate
+ DCD IntDefaultHandler ; USB0
+ DCD IntDefaultHandler ; PWM Generator 3
+ DCD IntDefaultHandler ; uDMA Software Transfer
+ DCD IntDefaultHandler ; uDMA Error
+ DCD IntDefaultHandler ; ADC1 Sequence 0
+ DCD IntDefaultHandler ; ADC1 Sequence 1
+ DCD IntDefaultHandler ; ADC1 Sequence 2
+ DCD IntDefaultHandler ; ADC1 Sequence 3
+ DCD IntDefaultHandler ; External Bus Interface 0
+ DCD IntDefaultHandler ; GPIO Port J
+ DCD IntDefaultHandler ; GPIO Port K
+ DCD IntDefaultHandler ; GPIO Port L
+ DCD IntDefaultHandler ; SSI2 Rx and Tx
+ DCD IntDefaultHandler ; SSI3 Rx and Tx
+ DCD IntDefaultHandler ; UART3 Rx and Tx
+ DCD IntDefaultHandler ; UART4 Rx and Tx
+ DCD IntDefaultHandler ; UART5 Rx and Tx
+ DCD IntDefaultHandler ; UART6 Rx and Tx
+ DCD IntDefaultHandler ; UART7 Rx and Tx
+ DCD IntDefaultHandler ; I2C2 Master and Slave
+ DCD IntDefaultHandler ; I2C3 Master and Slave
+ DCD IntDefaultHandler ; Timer 4 subtimer A
+ DCD IntDefaultHandler ; Timer 4 subtimer B
+ DCD IntDefaultHandler ; Timer 5 subtimer A
+ DCD IntDefaultHandler ; Timer 5 subtimer B
+ DCD IntDefaultHandler ; FPU
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD IntDefaultHandler ; I2C4 Master and Slave
+ DCD IntDefaultHandler ; I2C5 Master and Slave
+ DCD IntDefaultHandler ; GPIO Port M
+ DCD IntDefaultHandler ; GPIO Port N
+ DCD 0 ; Reserved
+ DCD IntDefaultHandler ; Tamper
+ DCD IntDefaultHandler ; GPIO Port P (Summary or P0)
+ DCD IntDefaultHandler ; GPIO Port P1
+ DCD IntDefaultHandler ; GPIO Port P2
+ DCD IntDefaultHandler ; GPIO Port P3
+ DCD IntDefaultHandler ; GPIO Port P4
+ DCD IntDefaultHandler ; GPIO Port P5
+ DCD IntDefaultHandler ; GPIO Port P6
+ DCD IntDefaultHandler ; GPIO Port P7
+ DCD IntDefaultHandler ; GPIO Port Q (Summary or Q0)
+ DCD IntDefaultHandler ; GPIO Port Q1
+ DCD IntDefaultHandler ; GPIO Port Q2
+ DCD IntDefaultHandler ; GPIO Port Q3
+ DCD IntDefaultHandler ; GPIO Port Q4
+ DCD IntDefaultHandler ; GPIO Port Q5
+ DCD IntDefaultHandler ; GPIO Port Q6
+ DCD IntDefaultHandler ; GPIO Port Q7
+ DCD IntDefaultHandler ; GPIO Port R
+ DCD IntDefaultHandler ; GPIO Port S
+ DCD IntDefaultHandler ; SHA/MD5 0
+ DCD IntDefaultHandler ; AES 0
+ DCD IntDefaultHandler ; DES3DES 0
+ DCD IntDefaultHandler ; LCD Controller 0
+ DCD IntDefaultHandler ; Timer 6 subtimer A
+ DCD IntDefaultHandler ; Timer 6 subtimer B
+ DCD IntDefaultHandler ; Timer 7 subtimer A
+ DCD IntDefaultHandler ; Timer 7 subtimer B
+ DCD IntDefaultHandler ; I2C6 Master and Slave
+ DCD IntDefaultHandler ; I2C7 Master and Slave
+ DCD IntDefaultHandler ; HIM Scan Matrix Keyboard 0
+ DCD IntDefaultHandler ; One Wire 0
+ DCD IntDefaultHandler ; HIM PS/2 0
+ DCD IntDefaultHandler ; HIM LED Sequencer 0
+ DCD IntDefaultHandler ; HIM Consumer IR 0
+ DCD IntDefaultHandler ; I2C8 Master and Slave
+ DCD IntDefaultHandler ; I2C9 Master and Slave
+ DCD IntDefaultHandler ; GPIO Port T
+
+;******************************************************************************
+;
+; This is the code that gets called when the processor first starts execution
+; following a reset event.
+;
+;******************************************************************************
+ EXPORT Reset_Handler
+Reset_Handler
+ ;
+ ; Enable the floating-point unit. This must be done here to handle the
+ ; case where main() uses floating-point and the function prologue saves
+ ; floating-point registers (which will fault if floating-point is not
+ ; enabled). Any configuration of the floating-point unit using
+ ; DriverLib APIs must be done here prior to the floating-point unit
+ ; being enabled.
+ ;
+ ; Note that this does not use DriverLib since it might not be included
+ ; in this project.
+ ;
+ MOVW R0, #0xED88
+ MOVT R0, #0xE000
+ LDR R1, [R0]
+ ORR R1, #0x00F00000
+ STR R1, [R0]
+
+ ;
+ ; Call the C library enty point that handles startup. This will copy
+ ; the .data section initializers from flash to SRAM and zero fill the
+ ; .bss section.
+ ;
+ IMPORT __main
+ B __main
+
+;******************************************************************************
+;
+; This is the code that gets called when the processor receives a NMI. This
+; simply enters an infinite loop, preserving the system state for examination
+; by a debugger.
+;
+;******************************************************************************
+NmiSR
+ B NmiSR
+
+;******************************************************************************
+;
+; This is the code that gets called when the processor receives a fault
+; interrupt. This simply enters an infinite loop, preserving the system state
+; for examination by a debugger.
+;
+;******************************************************************************
+FaultISR
+ B FaultISR
+
+;******************************************************************************
+;
+; This is the code that gets called when the processor receives an unexpected
+; interrupt. This simply enters an infinite loop, preserving the system state
+; for examination by a debugger.
+;
+;******************************************************************************
+IntDefaultHandler
+ B IntDefaultHandler
+
+;******************************************************************************
+;
+; Make sure the end of this section is aligned.
+;
+;******************************************************************************
+ ALIGN
+
+;******************************************************************************
+;
+; Some code in the normal code section for initializing the heap and stack.
+;
+;******************************************************************************
+ AREA |.text|, CODE, READONLY
+
+;******************************************************************************
+;
+; The function expected of the C library startup code for defining the stack
+; and heap memory locations. For the C library version of the startup code,
+; provide this function so that the C library initialization code can find out
+; the location of the stack and heap.
+;
+;******************************************************************************
+ IF :DEF: __MICROLIB
+ EXPORT __initial_sp
+ EXPORT __heap_base
+ EXPORT __heap_limit
+ ELSE
+ IMPORT __use_two_region_memory
+ EXPORT __user_initial_stackheap
+__user_initial_stackheap
+ LDR R0, =HeapMem
+ LDR R1, =(StackMem + Stack)
+ LDR R2, =(HeapMem + Heap)
+ LDR R3, =StackMem
+ BX LR
+ ENDIF
+
+;******************************************************************************
+;
+; Make sure the end of this section is aligned.
+;
+;******************************************************************************
+ ALIGN
+
+;******************************************************************************
+;
+; Tell the assembler that we're done.
+;
+;******************************************************************************
+ END
|