diff options
| author | Yuval Adam <yuv.adm@gmail.com> | 2014-08-08 14:42:07 +0300 |
|---|---|---|
| committer | Yuval Adam <yuv.adm@gmail.com> | 2014-08-08 14:42:07 +0300 |
| commit | a6163888f3c56123b1db313743c6147ba498732c (patch) | |
| tree | ff7d15d991d1d09ba6cbc0cec80924f57445bfdd /third_party/FreeRTOS/Demo/CORTEX_LM3S811_IAR/LM3S811.icf | |
| parent | c3e4c9a25c2910d2d66d52215b3406b13d5b23d5 (diff) | |
Add third_party libs
Diffstat (limited to 'third_party/FreeRTOS/Demo/CORTEX_LM3S811_IAR/LM3S811.icf')
| -rw-r--r-- | third_party/FreeRTOS/Demo/CORTEX_LM3S811_IAR/LM3S811.icf | 58 |
1 files changed, 58 insertions, 0 deletions
diff --git a/third_party/FreeRTOS/Demo/CORTEX_LM3S811_IAR/LM3S811.icf b/third_party/FreeRTOS/Demo/CORTEX_LM3S811_IAR/LM3S811.icf new file mode 100644 index 0000000..5131af0 --- /dev/null +++ b/third_party/FreeRTOS/Demo/CORTEX_LM3S811_IAR/LM3S811.icf @@ -0,0 +1,58 @@ +//*****************************************************************************
+//
+// boot_demo1.icf - Linker configuration file for boot_demo1.
+//
+// Copyright (c) 2007 Luminary Micro, Inc. All rights reserved.
+// Luminary Micro Confidential - For Use Under NDA Only
+//
+//*****************************************************************************
+
+//
+// Define a memory region that covers the entire 4 GB addressible space of the
+// processor.
+//
+define memory mem with size = 4G;
+
+//
+// Define a region for the on-chip flash.
+//
+define region FLASH = mem:[from 0x00000000 to 0x0000ffff];
+
+//
+// Define a region for the on-chip SRAM.
+//
+define region SRAM = mem:[from 0x20000000 to 0x20001fff];
+
+//
+// Define a block for the heap. The size should be set to something other
+// than zero if things in the C library that require the heap are used.
+//
+define block HEAP with alignment = 8, size = 0x00000000 { };
+
+//
+// Indicate that the read/write values should be initialized by copying from
+// flash.
+//
+initialize by copy { readwrite };
+
+//
+// Initicate that the noinit values should be left alone. This includes the
+// stack, which if initialized will destroy the return address from the
+// initialization code, causing the processor to branch to zero and fault.
+//
+do not initialize { section .noinit };
+
+//
+// Place the interrupt vectors at the start of flash.
+//
+place at start of FLASH { readonly section .intvec };
+
+//
+// Place the remainder of the read-only items into flash.
+//
+place in FLASH { readonly };
+
+//
+// Place all read/write items into SRAM.
+//
+place in SRAM { readwrite, block HEAP };
|