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authorYuval Adam <yuv.adm@gmail.com>2014-08-08 14:42:07 +0300
committerYuval Adam <yuv.adm@gmail.com>2014-08-08 14:42:07 +0300
commita6163888f3c56123b1db313743c6147ba498732c (patch)
treeff7d15d991d1d09ba6cbc0cec80924f57445bfdd /third_party/FreeRTOS/Demo/CORTEX_LM3S102_KEIL/include
parentc3e4c9a25c2910d2d66d52215b3406b13d5b23d5 (diff)
Add third_party libs
Diffstat (limited to 'third_party/FreeRTOS/Demo/CORTEX_LM3S102_KEIL/include')
-rw-r--r--third_party/FreeRTOS/Demo/CORTEX_LM3S102_KEIL/include/pdc.c118
-rw-r--r--third_party/FreeRTOS/Demo/CORTEX_LM3S102_KEIL/include/pdc.h122
2 files changed, 240 insertions, 0 deletions
diff --git a/third_party/FreeRTOS/Demo/CORTEX_LM3S102_KEIL/include/pdc.c b/third_party/FreeRTOS/Demo/CORTEX_LM3S102_KEIL/include/pdc.c
new file mode 100644
index 0000000..d1c5444
--- /dev/null
+++ b/third_party/FreeRTOS/Demo/CORTEX_LM3S102_KEIL/include/pdc.c
@@ -0,0 +1,118 @@
+//*****************************************************************************
+//
+// pdc.c - Driver for the Peripheral Device Controller (PDC) on the Stellaris
+// development board.
+//
+// Copyright (c) 2005,2006 Luminary Micro, Inc. All rights reserved.
+//
+// Software License Agreement
+//
+// Luminary Micro, Inc. (LMI) is supplying this software for use solely and
+// exclusively on LMI's Stellaris Family of microcontroller products.
+//
+// The software is owned by LMI and/or its suppliers, and is protected under
+// applicable copyright laws. All rights are reserved. Any use in violation
+// of the foregoing restrictions may subject the user to criminal sanctions
+// under applicable laws, as well as to civil liability for the breach of the
+// terms and conditions of this license.
+//
+// THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
+// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
+// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
+// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
+// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
+//
+//*****************************************************************************
+
+#include "LM3Sxxx.h"
+#include "pdc.h"
+
+//*****************************************************************************
+//
+//! Initializes the connection to the PDC.
+//!
+//! This function will enable clocking to the SSI and GPIO A modules, configure
+//! the GPIO pins to be used for an SSI interface, and it will configure the
+//! SSI as a 1Mb master device, operating in MOTO mode. It will also enable
+//! the SSI module, and will enable the chip select for the PDC on the
+//! Stellaris development board.
+//!
+//! This function is contained in <tt>utils/pdc.c</tt>, with
+//! <tt>utils/pdc.h</tt> containing the API definition for use by applications.
+//!
+//! \return None.
+//
+//*****************************************************************************
+void
+PDCInit(void)
+{
+ //
+ // Enable the peripherals used to drive the PDC.
+ //
+ SysCtlPeripheralEnable(SYSCTL_PERIPH_SSI);
+ SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);
+
+ //
+ // Configure the appropriate pins to be SSI instead of GPIO.
+ //
+ GPIODirModeSet(GPIO_PORTA_BASE, SSI_CLK | SSI_TX | SSI_RX,
+ GPIO_DIR_MODE_HW);
+ GPIODirModeSet(GPIO_PORTA_BASE, SSI_CS, GPIO_DIR_MODE_OUT);
+ GPIOPadConfigSet(GPIO_PORTA_BASE, SSI_CLK, GPIO_STRENGTH_4MA,
+ GPIO_PIN_TYPE_STD_WPU);
+
+ //
+ // Configure the SSI port.
+ //
+ SSIConfig(SSI_BASE, SSI_FRF_MOTO_MODE_0, SSI_MODE_MASTER, 1000000, 8);
+ SSIEnable(SSI_BASE);
+
+ //
+ // Reset the PDC SSI state machine. The chip select needs to be held low
+ // for 100ns; the procedure call overhead more than accounts for this time.
+ //
+ GPIOPinWrite(GPIO_PORTA_BASE, PDC_CS, 0);
+ GPIOPinWrite(GPIO_PORTA_BASE, PDC_CS, PDC_CS);
+}
+
+//*****************************************************************************
+//
+//! Write a PDC register.
+//!
+//! \param ucAddr specifies the PDC register to write.
+//! \param ucData specifies the data to write.
+//!
+//! This function will perform the SSI transfers required to write a register
+//! in the PDC on the Stellaris development board.
+//!
+//! This function is contained in <tt>utils/pdc.c</tt>, with
+//! <tt>utils/pdc.h</tt> containing the API definition for use by applications.
+//!
+//! \return None.
+//
+//*****************************************************************************
+void
+PDCWrite(unsigned char ucAddr, unsigned char ucData)
+{
+ unsigned long ulTemp;
+
+ //
+ // Send address and write command.
+ //
+ SSIDataPut(SSI_BASE, (ucAddr & 0x0F) | PDC_WR);
+
+ //
+ // Write the data.
+ //
+ SSIDataPut(SSI_BASE, ucData);
+
+ //
+ // Flush data read during address write.
+ //
+ SSIDataGet(SSI_BASE, &ulTemp);
+
+ //
+ // Flush data read during data write.
+ //
+ SSIDataGet(SSI_BASE, &ulTemp);
+}
diff --git a/third_party/FreeRTOS/Demo/CORTEX_LM3S102_KEIL/include/pdc.h b/third_party/FreeRTOS/Demo/CORTEX_LM3S102_KEIL/include/pdc.h
new file mode 100644
index 0000000..6380806
--- /dev/null
+++ b/third_party/FreeRTOS/Demo/CORTEX_LM3S102_KEIL/include/pdc.h
@@ -0,0 +1,122 @@
+//*****************************************************************************
+//
+// pdc.h - Stellaris development board Peripheral Device Controller definitions
+// and prototypes.
+//
+// Copyright (c) 2005,2006 Luminary Micro, Inc. All rights reserved.
+//
+// Software License Agreement
+//
+// Luminary Micro, Inc. (LMI) is supplying this software for use solely and
+// exclusively on LMI's Stellaris Family of microcontroller products.
+//
+// The software is owned by LMI and/or its suppliers, and is protected under
+// applicable copyright laws. All rights are reserved. Any use in violation
+// of the foregoing restrictions may subject the user to criminal sanctions
+// under applicable laws, as well as to civil liability for the breach of the
+// terms and conditions of this license.
+//
+// THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
+// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
+// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
+// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
+// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
+//
+//*****************************************************************************
+
+#ifndef __PDC_H__
+#define __PDC_H__
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+//*****************************************************************************
+//
+// The registers within the peripheral device controller.
+//
+//*****************************************************************************
+#define PDC_VER 0x0 // Version register
+#define PDC_CSR 0x1 // Command/Status register
+#define PDC_DSW 0x4 // DIP Switch register
+#define PDC_LED 0x5 // LED register
+#define PDC_LCD_CSR 0x6 // LCD Command/Status register
+#define PDC_LCD_RAM 0x7 // LCD RAM register
+#define PDC_GPXDAT 0x8 // GPIO X Data register
+#define PDC_GPXDIR 0x9 // GPIO X Direction register
+#define PDC_GPYDAT 0xA // GPIO Y Data register
+#define PDC_GPYDIR 0xB // GPIO Y Direction register
+#define PDC_GPZDAT 0xC // GPIO Z Data register
+#define PDC_GPZDIR 0xD // GPIO Z Direction register
+
+//*****************************************************************************
+//
+// Flags indicating a read or write to the peripheral device controller.
+//
+//*****************************************************************************
+#define PDC_RD 0x80 // PDC read command
+#define PDC_WR 0x00 // PDC write command
+
+//*****************************************************************************
+//
+// LCD panel (Crystalfontz CFAH1602B) commands, RS = 0
+//
+//*****************************************************************************
+#define LCD_CLEAR 0x01 // Clear display (0 fill DDRAM).
+#define LCD_HOME 0x02 // Cursor home.
+#define LCD_MODE 0x04 // Set entry mode (cursor dir)
+#define LCD_ON 0x08 // Set display, cursor, blinking
+ // on/off
+#define LCD_CUR 0x10 // Cursor, display shift
+#define LCD_IF 0x20 // Set interface data length,
+ // lines, font
+#define LCD_CGADDR 0x40 // Set CGRAM AC address
+#define LCD_DDADDR 0x80 // Set DDRAM AC address
+
+//*****************************************************************************
+//
+// LCD Status bit
+//
+//*****************************************************************************
+#define LCD_B_BUSY 0x80 // Busy flag.
+
+//*****************************************************************************
+//
+// The GPIO port A pin numbers for the various SSI signals.
+//
+//*****************************************************************************
+#define SSI_CS GPIO_PIN_3
+#define PDC_CS GPIO_PIN_3
+#define SSI_CLK GPIO_PIN_2
+#define SSI_TX GPIO_PIN_5
+#define SSI_RX GPIO_PIN_4
+
+//*****************************************************************************
+//
+// Function Prototypes
+//
+//*****************************************************************************
+extern void PDCInit(void);
+extern unsigned char PDCRead(unsigned char ucAddr);
+extern void PDCWrite(unsigned char ucAddr, unsigned char ucData);
+extern unsigned char PDCDIPRead(void);
+extern void PDCLEDWrite(unsigned char ucLED);
+extern unsigned char PDCLEDRead(void);
+extern void PDCLCDInit(void);
+extern void PDCLCDBacklightOn(void);
+extern void PDCLCDBacklightOff(void);
+extern void PDCLCDClear(void);
+extern void PDCLCDCreateChar(unsigned char ucChar, unsigned char *pucData);
+extern void PDCLCDSetPos(unsigned char ucX, unsigned char ucY);
+extern void PDCLCDWrite(const char *pcStr, unsigned long ulCount);
+extern unsigned char PDCGPIODirRead(unsigned char ucIdx);
+extern void PDCGPIODirWrite(unsigned char ucIdx, unsigned char ucValue);
+extern unsigned char PDCGPIORead(unsigned char ucIdx);
+extern void PDCGPIOWrite(unsigned char ucIdx, unsigned char ucValue);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // __PDC_H__