diff options
| author | Steve Markgraf <steve@steve-m.de> | 2012-06-22 15:52:35 +0200 |
|---|---|---|
| committer | Steve Markgraf <steve@steve-m.de> | 2012-06-22 15:52:35 +0200 |
| commit | fc736ae67faa07a0d665a4aea8b44c24bda1bda5 (patch) | |
| tree | bd2e366d9bee73b8227a880bac80e816a40f59fd /src/librtlsdr.c | |
| parent | b09628b3e890bc24ddaf987788070d69acfabbc3 (diff) | |
init: disable 4 MHz clock output
The pin where this clock is outputted is quite close to the
ADC inputs, so better disable it.
Signed-off-by: Steve Markgraf <steve@steve-m.de>
Diffstat (limited to 'src/librtlsdr.c')
| -rw-r--r-- | src/librtlsdr.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/librtlsdr.c b/src/librtlsdr.c index 94687f3..ec5a70d 100644 --- a/src/librtlsdr.c +++ b/src/librtlsdr.c @@ -496,6 +496,9 @@ void rtlsdr_init_baseband(rtlsdr_dev_t *dev) /* Enable Zero-IF mode (en_bbin bit), DC cancellation (en_dc_est), * IQ estimation/compensation (en_iq_comp, en_iq_est) */ rtlsdr_demod_write_reg(dev, 1, 0xb1, 0x1b, 1); + + /* disable 4.096 MHz clock output on pin TP_CK0 */ + rtlsdr_demod_write_reg(dev, 0, 0x0d, 0x83, 1); } int rtlsdr_deinit_baseband(rtlsdr_dev_t *dev) |