Initial project files

7 files changed, 315 insertions, 7 deletions

diff --git a/.gitignore b/.gitignore
new file mode 100644
index 0000000..0cafc1c
--- /dev/null
+++ b/.gitignore
@@ -0,0 +1 @@
+.venv/
\ No newline at end of file
diff --git a/.python-version b/.python-version
new file mode 100644
index 0000000..24ee5b1
--- /dev/null
+++ b/.python-version
@@ -0,0 +1 @@
+3.13
diff --git a/README.md b/README.md
index bfa5098..a7dc54d 100644
--- a/README.md
+++ b/README.md
@@ -1,9 +1,73 @@
-# Alchrity Pt V2 Hello World
+# Hello Alchitry Pt v2
 
-## Prerequisites
+A basic Amaranth HDL blinky example for the Alchitry Pt v2 development board with XC7A100T-2FGG484I FPGA.
 
-- Install AMDs bloated [Vivado](https://www.xilinx.com/support/download/index.html/content/xilinx/en/downloadNav/vivado-design-tools.html) software
-  - You only need support for **Vivado** and **7 Series devices**
-  - Remove checkbox for licenses
-  - Install to some non-root directory to avoid system bloat
-- On Arch: `yay -S ncurses5-compat-libs`
+## Requirements
+
+- Python 3.12+
+- uv package manager
+- Xilinx Vivado 2025.1 (installed at `~/Xilinx/2025.1/Vivado/`)
+- Alchitry Pt v2 board connected via USB
+
+## Setup
+
+1. Install dependencies:
+```bash
+uv sync
+```
+
+2. Set up Vivado environment (add to your shell profile):
+```bash
+export PATH="$HOME/Xilinx/2025.1/Vivado/bin:$PATH"
+```
+
+## Usage
+
+### Build and Program FPGA
+
+Run the blinky example:
+```bash
+uv run python blinky.py
+```
+
+This will:
+1. Synthesize the design using Vivado
+2. Generate a bitstream
+3. Program the FPGA automatically
+4. LED 0 should start blinking at ~12Hz
+
+### Build Only (No Programming)
+
+To build without programming:
+```bash
+uv run python -c "
+from platform_alchitry_pt import AlchitryPtPlatform
+from blinky import Blinky
+platform = AlchitryPtPlatform()
+platform.build(Blinky(), do_program=False)
+"
+```
+
+### Manual Programming
+
+If you need to program manually after building:
+```bash
+cd build
+vivado -mode batch -source program_fpga.tcl
+```
+
+## Files
+
+- `blinky.py` - Main blinky example that blinks LED 0
+- `platform_alchitry_pt.py` - Alchitry Pt v2 platform definition with pin mappings
+- `pyproject.toml` - Project dependencies (Amaranth HDL)
+
+## Hardware Details
+
+- **FPGA**: XC7A100T-2FGG484I (Artix-7, 484-pin BGA, speed grade -2)
+- **Clock**: 100 MHz oscillator on pin N14
+- **LEDs**: 8 LEDs (pins K13, K16, L15, L14, M16, M14, M12, N16)
+- **Reset**: Active-low reset button on pin P6
+- **IO**: 48 general purpose IO pins available
+
+The example uses a 24-bit counter clocked at 100 MHz, with the MSB driving LED 0 for a blink rate of approximately 12 Hz.
diff --git a/blinky.py b/blinky.py
new file mode 100644
index 0000000..424bf5f
--- /dev/null
+++ b/blinky.py
@@ -0,0 +1,29 @@
+#!/usr/bin/env python3
+
+from amaranth import *
+from amaranth.build import Platform
+from platform_alchitry_pt import AlchitryPtPlatform
+
+
+class Blinky(Elaboratable):
+    def elaborate(self, platform: Platform) -> Module:
+        m = Module()
+        
+        # Get the LED pins
+        led = platform.request("led", 0)
+        
+        # Create a counter for timing
+        counter = Signal(24)
+        
+        # Increment counter every clock cycle
+        m.d.sync += counter.eq(counter + 1)
+        
+        # Connect the MSB of counter to LED (blinks at ~12Hz at 100MHz)
+        m.d.comb += led.o.eq(counter[-1])
+        
+        return m
+
+
+if __name__ == "__main__":
+    platform = AlchitryPtPlatform()
+    platform.build(Blinky(), do_program=True)
\ No newline at end of file
diff --git a/platform_alchitry_pt.py b/platform_alchitry_pt.py
new file mode 100644
index 0000000..9964ecc
--- /dev/null
+++ b/platform_alchitry_pt.py
@@ -0,0 +1,106 @@
+from amaranth.build import *
+from amaranth.vendor import XilinxPlatform
+
+
+__all__ = ["AlchitryPtPlatform"]
+
+
+class AlchitryPtPlatform(XilinxPlatform):
+    device      = "xc7a100t"
+    package     = "fgg484"
+    speed       = "2"
+    default_clk = "clk100"
+
+    resources = [
+        Resource("clk100", 0, Pins("N14", dir="i"),
+                 Clock(100e6), Attrs(IOSTANDARD="LVCMOS33")),
+
+        # LEDs
+        Resource("led", 0, Pins("K13", dir="o"), Attrs(IOSTANDARD="LVCMOS33")),
+        Resource("led", 1, Pins("K16", dir="o"), Attrs(IOSTANDARD="LVCMOS33")),
+        Resource("led", 2, Pins("L15", dir="o"), Attrs(IOSTANDARD="LVCMOS33")),
+        Resource("led", 3, Pins("L14", dir="o"), Attrs(IOSTANDARD="LVCMOS33")),
+        Resource("led", 4, Pins("M16", dir="o"), Attrs(IOSTANDARD="LVCMOS33")),
+        Resource("led", 5, Pins("M14", dir="o"), Attrs(IOSTANDARD="LVCMOS33")),
+        Resource("led", 6, Pins("M12", dir="o"), Attrs(IOSTANDARD="LVCMOS33")),
+        Resource("led", 7, Pins("N16", dir="o"), Attrs(IOSTANDARD="LVCMOS33")),
+
+        # Reset button
+        Resource("rst_n", 0, Pins("P6", dir="i"), Attrs(IOSTANDARD="LVCMOS33")),
+
+        # IO pins
+        Resource("io", 0, Pins("A1", dir="io"), Attrs(IOSTANDARD="LVCMOS33")),
+        Resource("io", 1, Pins("A2", dir="io"), Attrs(IOSTANDARD="LVCMOS33")),
+        Resource("io", 2, Pins("A3", dir="io"), Attrs(IOSTANDARD="LVCMOS33")),
+        Resource("io", 3, Pins("A4", dir="io"), Attrs(IOSTANDARD="LVCMOS33")),
+        Resource("io", 4, Pins("A5", dir="io"), Attrs(IOSTANDARD="LVCMOS33")),
+        Resource("io", 5, Pins("A7", dir="io"), Attrs(IOSTANDARD="LVCMOS33")),
+        Resource("io", 6, Pins("A8", dir="io"), Attrs(IOSTANDARD="LVCMOS33")),
+        Resource("io", 7, Pins("A9", dir="io"), Attrs(IOSTANDARD="LVCMOS33")),
+        Resource("io", 8, Pins("A10", dir="io"), Attrs(IOSTANDARD="LVCMOS33")),
+        Resource("io", 9, Pins("A11", dir="io"), Attrs(IOSTANDARD="LVCMOS33")),
+        Resource("io", 10, Pins("A13", dir="io"), Attrs(IOSTANDARD="LVCMOS33")),
+        Resource("io", 11, Pins("A14", dir="io"), Attrs(IOSTANDARD="LVCMOS33")),
+        Resource("io", 12, Pins("A15", dir="io"), Attrs(IOSTANDARD="LVCMOS33")),
+        Resource("io", 13, Pins("A16", dir="io"), Attrs(IOSTANDARD="LVCMOS33")),
+        Resource("io", 14, Pins("A17", dir="io"), Attrs(IOSTANDARD="LVCMOS33")),
+        Resource("io", 15, Pins("A18", dir="io"), Attrs(IOSTANDARD="LVCMOS33")),
+        Resource("io", 16, Pins("B1", dir="io"), Attrs(IOSTANDARD="LVCMOS33")),
+        Resource("io", 17, Pins("B2", dir="io"), Attrs(IOSTANDARD="LVCMOS33")),
+        Resource("io", 18, Pins("B4", dir="io"), Attrs(IOSTANDARD="LVCMOS33")),
+        Resource("io", 19, Pins("B5", dir="io"), Attrs(IOSTANDARD="LVCMOS33")),
+        Resource("io", 20, Pins("B6", dir="io"), Attrs(IOSTANDARD="LVCMOS33")),
+        Resource("io", 21, Pins("B7", dir="io"), Attrs(IOSTANDARD="LVCMOS33")),
+        Resource("io", 22, Pins("B8", dir="io"), Attrs(IOSTANDARD="LVCMOS33")),
+        Resource("io", 23, Pins("B10", dir="io"), Attrs(IOSTANDARD="LVCMOS33")),
+        Resource("io", 24, Pins("B11", dir="io"), Attrs(IOSTANDARD="LVCMOS33")),
+        Resource("io", 25, Pins("B12", dir="io"), Attrs(IOSTANDARD="LVCMOS33")),
+        Resource("io", 26, Pins("B14", dir="io"), Attrs(IOSTANDARD="LVCMOS33")),
+        Resource("io", 27, Pins("B15", dir="io"), Attrs(IOSTANDARD="LVCMOS33")),
+        Resource("io", 28, Pins("B16", dir="io"), Attrs(IOSTANDARD="LVCMOS33")),
+        Resource("io", 29, Pins("B17", dir="io"), Attrs(IOSTANDARD="LVCMOS33")),
+        Resource("io", 30, Pins("B18", dir="io"), Attrs(IOSTANDARD="LVCMOS33")),
+        Resource("io", 31, Pins("C1", dir="io"), Attrs(IOSTANDARD="LVCMOS33")),
+        Resource("io", 32, Pins("C2", dir="io"), Attrs(IOSTANDARD="LVCMOS33")),
+        Resource("io", 33, Pins("C4", dir="io"), Attrs(IOSTANDARD="LVCMOS33")),
+        Resource("io", 34, Pins("C5", dir="io"), Attrs(IOSTANDARD="LVCMOS33")),
+        Resource("io", 35, Pins("C6", dir="io"), Attrs(IOSTANDARD="LVCMOS33")),
+        Resource("io", 36, Pins("C7", dir="io"), Attrs(IOSTANDARD="LVCMOS33")),
+        Resource("io", 37, Pins("C8", dir="io"), Attrs(IOSTANDARD="LVCMOS33")),
+        Resource("io", 38, Pins("C9", dir="io"), Attrs(IOSTANDARD="LVCMOS33")),
+        Resource("io", 39, Pins("C10", dir="io"), Attrs(IOSTANDARD="LVCMOS33")),
+        Resource("io", 40, Pins("C11", dir="io"), Attrs(IOSTANDARD="LVCMOS33")),
+        Resource("io", 41, Pins("C13", dir="io"), Attrs(IOSTANDARD="LVCMOS33")),
+        Resource("io", 42, Pins("C14", dir="io"), Attrs(IOSTANDARD="LVCMOS33")),
+        Resource("io", 43, Pins("C16", dir="io"), Attrs(IOSTANDARD="LVCMOS33")),
+        Resource("io", 44, Pins("C17", dir="io"), Attrs(IOSTANDARD="LVCMOS33")),
+        Resource("io", 45, Pins("C18", dir="io"), Attrs(IOSTANDARD="LVCMOS33")),
+        Resource("io", 46, Pins("D3", dir="io"), Attrs(IOSTANDARD="LVCMOS33")),
+        Resource("io", 47, Pins("D4", dir="io"), Attrs(IOSTANDARD="LVCMOS33")),
+    ]
+
+    connectors = []
+
+    def toolchain_program(self, products, name, **kwargs):
+        vivado = self.toolchain.sh_command("vivado")
+        with products.extract("{}.bit".format(name)) as bitstream_filename:
+            self.toolchain.run([
+                vivado, "-mode", "batch", "-source", self._create_tcl_script(bitstream_filename)
+            ], root="build")
+
+    def _create_tcl_script(self, bitstream_filename):
+        tcl_script = "program_fpga.tcl"
+        with open(tcl_script, "w") as f:
+            f.write(f"""
+open_hw_manager
+connect_hw_server
+open_hw_target
+set_property PROGRAM.FILE {{{bitstream_filename}}} [get_hw_devices xc7a100t_0]
+set_property PROBES.FILE {{}} [get_hw_devices xc7a100t_0]
+set_property FULL_PROBES.FILE {{}} [get_hw_devices xc7a100t_0]
+current_hw_device [get_hw_devices xc7a100t_0]
+program_hw_devices [get_hw_devices xc7a100t_0]
+close_hw_manager
+exit
+""")
+        return tcl_script
\ No newline at end of file
diff --git a/pyproject.toml b/pyproject.toml
new file mode 100644
index 0000000..474a726
--- /dev/null
+++ b/pyproject.toml
@@ -0,0 +1,9 @@
+[project]
+name = "hello-alchitry-pt-v2"
+version = "0.1.0"
+description = "Add your description here"
+readme = "README.md"
+requires-python = ">=3.13"
+dependencies = [
+    "amaranth>=0.5.7",
+]
diff --git a/uv.lock b/uv.lock
new file mode 100644
index 0000000..8446418
--- /dev/null
+++ b/uv.lock
@@ -0,0 +1,98 @@
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+
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