/* * Copyright (C) 2014 Spreadtrum Communications Inc. * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License * as published by the Free Software Foundation; either version 2 * of the License, or (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * ************************************************* * Automatically generated C header: do not edit * ************************************************* */ #ifndef __SCI_GLB_REGS_H__ #error "Don't include this file directly, Pls include sci_glb_regs.h" #endif #ifndef __H_REGS_APB_RF_CP2_HEADFILE_H__ #define __H_REGS_APB_RF_CP2_HEADFILE_H__ __FILE__ #define REGS_APB_RF_CP2 /* registers definitions for APB_RF_CP2 */ #define REG_APB_RF_CP2_APB_RST SCI_ADDR(REGS_APB_RF_CP2_BASE, 0x0000) #define REG_APB_RF_CP2_MCU_SOFT_RST SCI_ADDR(REGS_APB_RF_CP2_BASE, 0x0004) #define REG_APB_RF_CP2_APB_EB SCI_ADDR(REGS_APB_RF_CP2_BASE, 0x0018) #define REG_APB_RF_CP2_APB_EB1 SCI_ADDR(REGS_APB_RF_CP2_BASE, 0x001C) #define REG_APB_RF_CP2_APB_CLK_CTL0 SCI_ADDR(REGS_APB_RF_CP2_BASE, 0x0020) #define REG_APB_RF_CP2_APB_CLK_CTL1 SCI_ADDR(REGS_APB_RF_CP2_BASE, 0x0024) #define REG_APB_RF_CP2_APB_SLP_CTL0 SCI_ADDR(REGS_APB_RF_CP2_BASE, 0x0030) #define REG_APB_RF_CP2_APB_INT_STS0 SCI_ADDR(REGS_APB_RF_CP2_BASE, 0x0034) #define REG_APB_RF_CP2_APB_INT_SET_CLR0 SCI_ADDR(REGS_APB_RF_CP2_BASE, 0x0038) #define REG_APB_RF_CP2_WIFI_BUF_BASE SCI_ADDR(REGS_APB_RF_CP2_BASE, 0x003C) #define REG_APB_RF_CP2_CLK_TOP_CTRL0 SCI_ADDR(REGS_APB_RF_CP2_BASE, 0x0040) #define REG_APB_RF_CP2_CLK_TOP_CTRL1 SCI_ADDR(REGS_APB_RF_CP2_BASE, 0x0044) #define REG_APB_RF_CP2_FPGADEBUG SCI_ADDR(REGS_APB_RF_CP2_BASE, 0x0048) #define REG_APB_RF_CP2_APB_BT_DAC_CTR0 SCI_ADDR(REGS_APB_RF_CP2_BASE, 0x0050) #define REG_APB_RF_CP2_APB_BT_DAC_CTR1 SCI_ADDR(REGS_APB_RF_CP2_BASE, 0x0054) #define REG_APB_RF_CP2_APB_BT_DAC_CTR2 SCI_ADDR(REGS_APB_RF_CP2_BASE, 0x0058) #define REG_APB_RF_CP2_APB_BT_DAC_STS0 SCI_ADDR(REGS_APB_RF_CP2_BASE, 0x005C) #define REG_APB_RF_CP2_APB_BT_DAC_STS1 SCI_ADDR(REGS_APB_RF_CP2_BASE, 0x0060) #define REG_APB_RF_CP2_APB_BT_ADC_CTR0 SCI_ADDR(REGS_APB_RF_CP2_BASE, 0x0064) #define REG_APB_RF_CP2_APB_BT_ADC_CTR1 SCI_ADDR(REGS_APB_RF_CP2_BASE, 0x0068) #define REG_APB_RF_CP2_APB_BT_ADC_CTR2 SCI_ADDR(REGS_APB_RF_CP2_BASE, 0x006C) #define REG_APB_RF_CP2_WIFI_SYS0 SCI_ADDR(REGS_APB_RF_CP2_BASE, 0x0070) #define REG_APB_RF_CP2_WIFI_SYS1 SCI_ADDR(REGS_APB_RF_CP2_BASE, 0x0074) #define REG_APB_RF_CP2_APB_WIFI_ADC_CTR0 SCI_ADDR(REGS_APB_RF_CP2_BASE, 0x0078) #define REG_APB_RF_CP2_APB_WIFI_ADC_CTR1 SCI_ADDR(REGS_APB_RF_CP2_BASE, 0x007C) #define REG_APB_RF_CP2_ARM7_RDATA_FROM_ARM9 SCI_ADDR(REGS_APB_RF_CP2_BASE, 0x0080) #define REG_APB_RF_CP2_ARM7_WDATA_TO_ARM9 SCI_ADDR(REGS_APB_RF_CP2_BASE, 0x0084) #define REG_APB_RF_CP2_CP2_BB_CTRL SCI_ADDR(REGS_APB_RF_CP2_BASE, 0x0088) #define REG_APB_RF_CP2_WIFI_BT_CFG0 SCI_ADDR(REGS_APB_RF_CP2_BASE, 0x0090) #define REG_APB_RF_CP2_WIFI_BT_CFG1 SCI_ADDR(REGS_APB_RF_CP2_BASE, 0x0094) #define REG_APB_RF_CP2_WIFI_BT_CFG2 SCI_ADDR(REGS_APB_RF_CP2_BASE, 0x0098) #define REG_APB_RF_CP2_WIFI_BT_CFG3 SCI_ADDR(REGS_APB_RF_CP2_BASE, 0x009C) #define REG_APB_RF_CP2_WIFI_DFT_CTRTL0 SCI_ADDR(REGS_APB_RF_CP2_BASE, 0x00A0) #define REG_APB_RF_CP2_WIFI_DFT_CTRTL1 SCI_ADDR(REGS_APB_RF_CP2_BASE, 0x00A4) #define REG_APB_RF_CP2_WIFI_DFT_CTRTL2 SCI_ADDR(REGS_APB_RF_CP2_BASE, 0x00A8) #define REG_APB_RF_CP2_WB_ADA_CTRTL0 SCI_ADDR(REGS_APB_RF_CP2_BASE, 0x00B0) #define REG_APB_RF_CP2_WB_ADA_CTRTL1 SCI_ADDR(REGS_APB_RF_CP2_BASE, 0x00B4) #define REG_APB_RF_CP2_WB_ADA_CTRTL2 SCI_ADDR(REGS_APB_RF_CP2_BASE, 0x00B8) #define REG_APB_RF_CP2_WB_ADA_CTRTL3 SCI_ADDR(REGS_APB_RF_CP2_BASE, 0x00BC) #define REG_APB_RF_CP2_WB_ADA_RESULT0 SCI_ADDR(REGS_APB_RF_CP2_BASE, 0x00C0) #define REG_APB_RF_CP2_WB_ADA_RESULT1 SCI_ADDR(REGS_APB_RF_CP2_BASE, 0x00C4) #define REG_APB_RF_CP2_WB_ADA_RESULT2 SCI_ADDR(REGS_APB_RF_CP2_BASE, 0x00C8) #define REG_APB_RF_CP2_WB_ADA_RESULT3 SCI_ADDR(REGS_APB_RF_CP2_BASE, 0x00CC) #define REG_APB_RF_CP2_WB_DBG_RESULT0 SCI_ADDR(REGS_APB_RF_CP2_BASE, 0x00D0) #define REG_APB_RF_CP2_WB_DBG_RESULT1 SCI_ADDR(REGS_APB_RF_CP2_BASE, 0x00D4) #define REG_APB_RF_CP2_WB_DAC_DBG_DAT SCI_ADDR(REGS_APB_RF_CP2_BASE, 0x00D8) #define REG_APB_RF_CP2_BT_FUNC_DBG SCI_ADDR(REGS_APB_RF_CP2_BASE, 0x00DC) #define REG_APB_RF_CP2_APB_ARCH_PORT SCI_ADDR(REGS_APB_RF_CP2_BASE, 0x0100) #define REG_APB_RF_CP2_IN_AXI_ADDR SCI_ADDR(REGS_APB_RF_CP2_BASE, 0x0104) #define REG_APB_RF_CP2_IN_CFG_SIZE SCI_ADDR(REGS_APB_RF_CP2_BASE, 0x0108) #define REG_APB_RF_CP2_APB_MISC_CTL SCI_ADDR(REGS_APB_RF_CP2_BASE, 0x0200) #define REG_APB_RF_CP2_APB_MISC_CTL1 SCI_ADDR(REGS_APB_RF_CP2_BASE, 0x0204) #define REG_APB_RF_CP2_WIFI_SARADC_CTRL0 SCI_ADDR(REGS_APB_RF_CP2_BASE, 0x0208) #define REG_APB_RF_CP2_WIFI_SARADC_CTRL1 SCI_ADDR(REGS_APB_RF_CP2_BASE, 0x020C) #define REG_APB_RF_CP2_BT_SARADC_CTRL1 SCI_ADDR(REGS_APB_RF_CP2_BASE, 0x0210) #define REG_APB_RF_CP2_BT_SARADC_CTRL2 SCI_ADDR(REGS_APB_RF_CP2_BASE, 0x0214) #define REG_APB_RF_CP2_WBT_DAC_CTRL0 SCI_ADDR(REGS_APB_RF_CP2_BASE, 0x0218) #define REG_APB_RF_CP2_WBT_ANA_STS0 SCI_ADDR(REGS_APB_RF_CP2_BASE, 0x022C) #define REG_APB_RF_CP2_WBT_ANA_STS1 SCI_ADDR(REGS_APB_RF_CP2_BASE, 0x0230) #define REG_APB_RF_CP2_WIFI_CTRL0 SCI_ADDR(REGS_APB_RF_CP2_BASE, 0x0234) #define REG_APB_RF_CP2_WIFI_DAC_DFT SCI_ADDR(REGS_APB_RF_CP2_BASE, 0x0238) #define REG_APB_RF_CP2_WIFI_ADC_DFT SCI_ADDR(REGS_APB_RF_CP2_BASE, 0x023C) /* bits definitions for register REG_APB_RF_CP2_APB_RST */ #define BIT_PHY_SOFT_RST ( BIT(20) ) #define BIT_MAC_SOFT_RST ( BIT(19) ) #define BIT_GPIO_SOFT_RST ( BIT(18) ) #define BIT_ADI_SOFT_RST ( BIT(17) ) #define BIT_VBC_SOFT_RST ( BIT(16) ) #define BIT_AUD_SOFT_RST ( BIT(15) ) #define BIT_VPU_SOFT_RST ( BIT(14) ) #define BIT_FM_SOFT_RST ( BIT(13) ) #define BIT_IPI_SOFT_RST ( BIT(12) ) #define BIT_WIFI_SOFT_RST ( BIT(11) ) #define BIT_IIS_SOFT_RST ( BIT(10) ) #define BIT_EIC_SOFT_RST ( BIT(9) ) #define BIT_BT_SOFT_RST ( BIT(8) ) #define BIT_WDG_SOFT_RST ( BIT(7) ) #define BIT_TMR1_SOFT_RST ( BIT(6) ) #define BIT_TMR0_SOFT_RST ( BIT(5) ) #define BIT_SYST_SOFT_RST ( BIT(4) ) #define BIT_UART1_SOFT_RST ( BIT(3) ) #define BIT_UART0_SOFT_RST ( BIT(2) ) /* bits definitions for register REG_APB_RF_CP2_MCU_SOFT_RST */ #define BIT_MCU_SOFT_RST_SET ( BIT(0) ) /* bits definitions for register REG_APB_RF_CP2_APB_EB */ #define BIT_GPIO_EB ( BIT(24) ) #define BIT_ADI_EB ( BIT(23) ) #define BIT_VBC_EB ( BIT(22) ) #define BIT_AUD_EB ( BIT(21) ) #define BIT_VPU_EB ( BIT(20) ) #define BIT_FM_EB ( BIT(19) ) #define BIT_IPI_EB ( BIT(18) ) #define BIT_WIFI_EB ( BIT(17) ) #define BIT_IIS_EB ( BIT(16) ) #define BIT_EIC_RTCDV5_EB ( BIT(15) ) #define BIT_EIC_EB ( BIT(14) ) #define BIT_BT_RTC_EB ( BIT(13) ) #define BIT_TMR1_RTC_EB ( BIT(12) ) #define BIT_TMR0_RTC_EB ( BIT(11) ) #define BIT_SYST_RTC_EB ( BIT(10) ) #define BIT_WDG_RTC_EB ( BIT(9) ) #define BIT_BT_EB ( BIT(8) ) #define BIT_WDG_EB ( BIT(7) ) #define BIT_TMR1_EB ( BIT(6) ) #define BIT_TMR0_EB ( BIT(5) ) #define BIT_SYST_EB ( BIT(4) ) #define BIT_UART1_EB ( BIT(3) ) #define BIT_UART0_EB ( BIT(2) ) /* bits definitions for register REG_APB_RF_CP2_APB_EB1 */ #define BIT_APB_ARCH_RTC_EB ( BIT(1) ) #define BIT_APB_ARCH_EB ( BIT(0) ) /* bits definitions for register REG_APB_RF_CP2_APB_CLK_CTL0 */ #define BITS_CLK_WTDAC_CTRL(_X_) ( (_X_) << 20 & (BIT(20)|BIT(21)|BIT(22)|BIT(23)|BIT(24)|BIT(25)|BIT(26)|BIT(27)|BIT(28)|BIT(29)|BIT(30)|BIT(31)) ) #define BIT_CLK_BT_26M_SRC_SEL ( BIT(19) ) #define BITS_CLK_BT_DA_SEL(_X_) ( (_X_) << 17 & (BIT(17)|BIT(18)) ) #define BITS_CLK_BT_AD_SEL(_X_) ( (_X_) << 15 & (BIT(15)|BIT(16)) ) #define BITS_CLK_UART0_SEL(_X_) ( (_X_) << 13 & (BIT(13)|BIT(14)) ) #define BIT_CLK_BT_26M_SEL ( BIT(12) ) #define BIT_CLK_BT_24M_SEL ( BIT(11) ) #define BITS_CLK_IIS_SEL(_X_) ( (_X_) << 9 & (BIT(9)|BIT(10)) ) #define BITS_CLK_VPU_SEL(_X_) ( (_X_) << 7 & (BIT(7)|BIT(8)) ) #define BITS_CLK_UART1_SEL(_X_) ( (_X_) << 5 & (BIT(5)|BIT(6)) ) #define BIT_CLK_WIFI_120M_EN ( BIT(4) ) #define BIT_CLK_WIFI_26M_EN ( BIT(3) ) #define BIT_CLK_WIFI_80M_EN ( BIT(2) ) #define BIT_CLK_WIFI_44M_EN ( BIT(1) ) #define BIT_CLK_WIFI_40M_EN ( BIT(0) ) /* bits definitions for register REG_APB_RF_CP2_APB_CLK_CTL1 */ #define BITS_CLK_IIS_DIV(_X_) ( (_X_) & (BIT(0)|BIT(1)|BIT(2)) ) /* bits definitions for register REG_APB_RF_CP2_APB_SLP_CTL0 */ #define BIT_APB_FORCE_ON ( BIT(2) ) #define BIT_APB_FORCE_SLEEP ( BIT(1) ) /* bits definitions for register REG_APB_RF_CP2_APB_INT_STS0 */ #define BIT_ARM9_FRQ ( BIT(3) ) #define BIT_ARM9_IRQ ( BIT(2) ) #define BIT_ARM7_MCU_FRQ ( BIT(1) ) #define BIT_ARM7_MCU_IRQ ( BIT(0) ) /* bits definitions for register REG_APB_RF_CP2_APB_INT_SET_CLR0 */ #define BIT_ARM9_FRQ_CLR ( BIT(3) ) #define BIT_ARM9_IRQ_CLR ( BIT(2) ) #define BIT_ARM7_MCU_FRQ_SET ( BIT(1) ) #define BIT_ARM7_MCU_IRQ_SET ( BIT(0) ) /* bits definitions for register REG_APB_RF_CP2_WIFI_BUF_BASE */ #define BITS_WIFI_BUF_BASE(_X_) (_X_) /* bits definitions for register REG_APB_RF_CP2_CLK_TOP_CTRL0 */ #define BITS_CLK_TOP_CTRL0(_X_) (_X_) /* bits definitions for register REG_APB_RF_CP2_CLK_TOP_CTRL1 */ #define BITS_CLK_TOP_CTRL1(_X_) (_X_) /* bits definitions for register REG_APB_RF_CP2_FPGADEBUG */ #define BITS_FPGADEBUG(_X_) (_X_) /* bits definitions for register REG_APB_RF_CP2_APB_BT_DAC_CTR0 */ #define BITS_BT_DAC_BG_CTR(_X_) ( (_X_) << 30 & (BIT(30)|BIT(31)) ) #define BIT_BT_DAC_EN_ADC ( BIT(26) ) #define BIT_BT_DAC_CLK_SEL ( BIT(25) ) #define BIT_BT_DAC_EN_MIDRANGE ( BIT(24) ) #define BITS_BT_DAC_Q_DC(_X_) ( (_X_) << 12 & (BIT(12)|BIT(13)|BIT(14)|BIT(15)|BIT(16)|BIT(17)|BIT(18)|BIT(19)|BIT(20)|BIT(21)|BIT(22)|BIT(23)) ) #define BITS_BT_DAC_I_DC(_X_) ( (_X_) & (BIT(0)|BIT(1)|BIT(2)|BIT(3)|BIT(4)|BIT(5)|BIT(6)|BIT(7)|BIT(8)|BIT(9)|BIT(10)|BIT(11)) ) /* bits definitions for register REG_APB_RF_CP2_APB_BT_DAC_CTR1 */ #define BITS_BT_DAC_SEL(_X_) ( (_X_) << 29 & (BIT(29)|BIT(30)) ) #define BIT_BT_DAC_BOOSTI_EN ( BIT(28) ) #define BITS_BT_DAC_CFG(_X_) ( (_X_) << 25 & (BIT(25)|BIT(26)|BIT(27)) ) #define BIT_BT_DAC_CAL_CLK_SEL ( BIT(24) ) #define BIT_BT_DAC_PD ( BIT(23) ) #define BITS_BT_DAC_WADDR_OVR(_X_) ( (_X_) << 19 & (BIT(19)|BIT(20)|BIT(21)|BIT(22)) ) #define BIT_BT_DAC_WLE_OVR ( BIT(18) ) #define BITS_BT_DAC_WD_OVR(_X_) ( (_X_) << 2 & (BIT(2)|BIT(3)|BIT(4)|BIT(5)|BIT(6)|BIT(7)|BIT(8)|BIT(9)|BIT(10)|BIT(11)|BIT(12)|BIT(13)|BIT(14)|BIT(15)|BIT(16)|BIT(17)) ) #define BIT_BT_DAC_W_OVR_I_QN ( BIT(1) ) #define BIT_BT_DAC_W_OVR_EN ( BIT(0) ) /* bits definitions for register REG_APB_RF_CP2_APB_BT_DAC_CTR2 */ #define BIT_BB_BG_EN ( BIT(21) ) #define BIT_BB_LDO_EN ( BIT(20) ) #define BIT_BT_DAC_OVR_EN_CAL ( BIT(19) ) #define BIT_BT_DAC_EN_OOSCAL ( BIT(18) ) #define BIT_BT_DAC_IQ_SWAP ( BIT(17) ) #define BIT_BT_DAC_CAL_START ( BIT(16) ) #define BITS_BT_DAC_OFFSETI(_X_) ( (_X_) << 8 & (BIT(8)|BIT(9)|BIT(10)|BIT(11)|BIT(12)|BIT(13)|BIT(14)|BIT(15)) ) #define BITS_BT_DAC_OFFSETQ(_X_) ( (_X_) & (BIT(0)|BIT(1)|BIT(2)|BIT(3)|BIT(4)|BIT(5)|BIT(6)|BIT(7)) ) /* bits definitions for register REG_APB_RF_CP2_APB_BT_DAC_STS0 */ #define BITS_BT_DAC_WTI(_X_) ( (_X_) << 16 & (BIT(16)|BIT(17)|BIT(18)|BIT(19)|BIT(20)|BIT(21)|BIT(22)|BIT(23)|BIT(24)|BIT(25)|BIT(26)|BIT(27)|BIT(28)|BIT(29)|BIT(30)|BIT(31)) ) #define BITS_BT_DAC_WTQ(_X_) ( (_X_) & (BIT(0)|BIT(1)|BIT(2)|BIT(3)|BIT(4)|BIT(5)|BIT(6)|BIT(7)|BIT(8)|BIT(9)|BIT(10)|BIT(11)|BIT(12)|BIT(13)|BIT(14)|BIT(15)) ) /* bits definitions for register REG_APB_RF_CP2_APB_BT_DAC_STS1 */ #define BITS_BT_DAC_DA_STATE(_X_) ( (_X_) << 17 & (BIT(17)|BIT(18)) ) #define BIT_BT_DAC_DONE ( BIT(16) ) #define BITS_BT_DAC_WQ_OVR(_X_) ( (_X_) & (BIT(0)|BIT(1)|BIT(2)|BIT(3)|BIT(4)|BIT(5)|BIT(6)|BIT(7)|BIT(8)|BIT(9)|BIT(10)|BIT(11)|BIT(12)|BIT(13)|BIT(14)|BIT(15)) ) /* bits definitions for register REG_APB_RF_CP2_APB_BT_ADC_CTR0 */ #define BITS_BT_ADC_SARSPD(_X_) ( (_X_) << 25 & (BIT(25)|BIT(26)) ) #define BITS_BT_ADC_CMPSPD(_X_) ( (_X_) << 23 & (BIT(23)|BIT(24)) ) #define BITS_BT_ADC_ADJ(_X_) ( (_X_) << 7 & (BIT(7)|BIT(8)|BIT(9)|BIT(10)|BIT(11)|BIT(12)|BIT(13)|BIT(14)|BIT(15)|BIT(16)|BIT(17)|BIT(18)|BIT(19)|BIT(20)|BIT(21)|BIT(22)) ) #define BITS_BT_ADC_REFBIAS(_X_) ( (_X_) << 4 & (BIT(4)|BIT(5)|BIT(6)) ) #define BITS_BT_ADC_CMPBIAS(_X_) ( (_X_) << 2 & (BIT(2)|BIT(3)) ) #define BIT_BT_ADC_MODE ( BIT(1) ) #define BIT_BT_ADC_EN ( BIT(0) ) /* bits definitions for register REG_APB_RF_CP2_APB_BT_ADC_CTR1 */ #define BIT_BT_ADC_CAL ( BIT(18) ) #define BITS_BT_ADC_DUTY(_X_) ( (_X_) << 15 & (BIT(15)|BIT(16)|BIT(17)) ) #define BITS_BT_ADC_DLL_D(_X_) ( (_X_) << 9 & (BIT(9)|BIT(10)|BIT(11)|BIT(12)|BIT(13)|BIT(14)) ) #define BIT_BT_ADC_DLL_RD ( BIT(8) ) #define BIT_BT_ADC_DLL_SUG ( BIT(7) ) #define BITS_BT_ADC_DLL_SET(_X_) ( (_X_) << 1 & (BIT(1)|BIT(2)|BIT(3)|BIT(4)|BIT(5)|BIT(6)) ) #define BIT_BT_ADC_DLL_OVR ( BIT(0) ) /* bits definitions for register REG_APB_RF_CP2_APB_BT_ADC_CTR2 */ #define BITS_BT_PTA_SL(_X_) ( (_X_) << 5 & (BIT(5)|BIT(6)|BIT(7)|BIT(8)|BIT(9)) ) #define BIT_BT_CTRL ( BIT(0) ) /* bits definitions for register REG_APB_RF_CP2_WIFI_SYS0 */ #define BITS_WIFIMAB_CTRL(_X_) ( (_X_) << 10 & (BIT(10)|BIT(11)|BIT(12)|BIT(13)|BIT(14)|BIT(15)|BIT(16)|BIT(17)|BIT(18)|BIT(19)) ) #define BITS_WIFISAB_CTRL(_X_) ( (_X_) & (BIT(0)|BIT(1)|BIT(2)|BIT(3)|BIT(4)|BIT(5)|BIT(6)|BIT(7)|BIT(8)|BIT(9)) ) /* bits definitions for register REG_APB_RF_CP2_WIFI_SYS1 */ #define BITS_WIFIMAB_STS(_X_) ( (_X_) << 14 & (BIT(14)|BIT(15)|BIT(16)|BIT(17)|BIT(18)|BIT(19)|BIT(20)|BIT(21)|BIT(22)|BIT(23)|BIT(24)|BIT(25)|BIT(26)|BIT(27)) ) #define BITS_WIFISAB_STS(_X_) ( (_X_) & (BIT(0)|BIT(1)|BIT(2)|BIT(3)|BIT(4)|BIT(5)|BIT(6)|BIT(7)|BIT(8)|BIT(9)|BIT(10)|BIT(11)|BIT(12)|BIT(13)) ) /* bits definitions for register REG_APB_RF_CP2_APB_WIFI_ADC_CTR0 */ #define BITS_WIFI_ADC_SARSPD(_X_) ( (_X_) << 25 & (BIT(25)|BIT(26)) ) #define BITS_WIFI_ADC_CMPSPD(_X_) ( (_X_) << 23 & (BIT(23)|BIT(24)) ) #define BITS_WIFI_ADC_ADJ(_X_) ( (_X_) << 7 & (BIT(7)|BIT(8)|BIT(9)|BIT(10)|BIT(11)|BIT(12)|BIT(13)|BIT(14)|BIT(15)|BIT(16)|BIT(17)|BIT(18)|BIT(19)|BIT(20)|BIT(21)|BIT(22)) ) #define BITS_WIFI_ADC_REFBIAS(_X_) ( (_X_) << 4 & (BIT(4)|BIT(5)|BIT(6)) ) #define BITS_WIFI_ADC_CMPBIAS(_X_) ( (_X_) << 2 & (BIT(2)|BIT(3)) ) #define BIT_WIFI_ADC_MODE ( BIT(1) ) #define BIT_WIFI_ADC_EN ( BIT(0) ) /* bits definitions for register REG_APB_RF_CP2_APB_WIFI_ADC_CTR1 */ #define BIT_WIFI_ADC_CAL ( BIT(18) ) #define BITS_WIFI_ADC_DUTY(_X_) ( (_X_) << 15 & (BIT(15)|BIT(16)|BIT(17)) ) #define BITS_WIFI_ADC_DLL_D(_X_) ( (_X_) << 9 & (BIT(9)|BIT(10)|BIT(11)|BIT(12)|BIT(13)|BIT(14)) ) #define BIT_WIFI_ADC_DLL_RD ( BIT(8) ) #define BIT_WIFI_ADC_DLL_SUG ( BIT(7) ) #define BITS_WIFI_ADC_DLL_SET(_X_) ( (_X_) << 1 & (BIT(1)|BIT(2)|BIT(3)|BIT(4)|BIT(5)|BIT(6)) ) #define BIT_WIFI_ADC_DLL_OVR ( BIT(0) ) /* bits definitions for register REG_APB_RF_CP2_ARM7_RDATA_FROM_ARM9 */ #define BITS_ARM7_RDATA_FROM_ARM9(_X_) (_X_) /* bits definitions for register REG_APB_RF_CP2_ARM7_WDATA_TO_ARM9 */ #define BITS_ARM7_WDATA_TO_ARM9(_X_) (_X_) /* bits definitions for register REG_APB_RF_CP2_CP2_BB_CTRL */ #define BITS_BB_LOCAL_CTRL(_X_) ( (_X_) & (BIT(0)|BIT(1)|BIT(2)|BIT(3)|BIT(4)|BIT(5)|BIT(6)|BIT(7)|BIT(8)|BIT(9)|BIT(10)|BIT(11)|BIT(12)|BIT(13)|BIT(14)|BIT(15)) ) /* bits definitions for register REG_APB_RF_CP2_WIFI_BT_CFG0 */ #define BITS_WIFI_BT_CFG0(_X_) (_X_) /* bits definitions for register REG_APB_RF_CP2_WIFI_BT_CFG1 */ #define BITS_WIFI_BT_CFG1(_X_) (_X_) /* bits definitions for register REG_APB_RF_CP2_WIFI_BT_CFG2 */ #define BITS_WIFI_BT_CFG2(_X_) (_X_) /* bits definitions for register REG_APB_RF_CP2_WIFI_BT_CFG3 */ #define BITS_WIFI_BT_CFG3(_X_) (_X_) /* bits definitions for register REG_APB_RF_CP2_WIFI_DFT_CTRTL0 */ #define BITS_WIFI_DFT_CTRTL0(_X_) (_X_) /* bits definitions for register REG_APB_RF_CP2_WIFI_DFT_CTRTL1 */ #define BITS_WIFI_DFT_CTRTL1(_X_) (_X_) /* bits definitions for register REG_APB_RF_CP2_WIFI_DFT_CTRTL2 */ #define BITS_WIFI_DFT_CTRTL2(_X_) (_X_) /* bits definitions for register REG_APB_RF_CP2_WB_ADA_CTRTL0 */ #define BITS_WB_ADA_CTRTL0(_X_) (_X_) /* bits definitions for register REG_APB_RF_CP2_WB_ADA_CTRTL1 */ #define BITS_WB_ADA_CTRTL1(_X_) (_X_) /* bits definitions for register REG_APB_RF_CP2_WB_ADA_CTRTL2 */ #define BITS_WB_ADA_CTRTL2(_X_) (_X_) /* bits definitions for register REG_APB_RF_CP2_WB_ADA_CTRTL3 */ #define BITS_WB_ADA_CTRTL3(_X_) (_X_) /* bits definitions for register REG_APB_RF_CP2_WB_ADA_RESULT0 */ #define BITS_WB_ADA_RESULT0(_X_) (_X_) /* bits definitions for register REG_APB_RF_CP2_WB_ADA_RESULT1 */ #define BITS_WB_ADA_RESULT1(_X_) (_X_) /* bits definitions for register REG_APB_RF_CP2_WB_ADA_RESULT2 */ #define BITS_WB_ADA_RESULT2(_X_) (_X_) /* bits definitions for register REG_APB_RF_CP2_WB_ADA_RESULT3 */ #define BITS_WB_ADA_RESULT3(_X_) (_X_) /* bits definitions for register REG_APB_RF_CP2_WB_DBG_RESULT0 */ #define BITS_WB_DBG_RESULT0(_X_) (_X_) /* bits definitions for register REG_APB_RF_CP2_WB_DBG_RESULT1 */ #define BITS_WB_DBG_RESULT1(_X_) (_X_) /* bits definitions for register REG_APB_RF_CP2_WB_DAC_DBG_DAT */ #define BITS_WBDAC_IQ_TEST_DAT(_X_) (_X_) /* bits definitions for register REG_APB_RF_CP2_BT_FUNC_DBG */ #define BITS_BT_FUNC_DBG(_X_) (_X_) /* bits definitions for register REG_APB_RF_CP2_APB_ARCH_PORT */ #define BIT_MCU_PROT_GLB ( BIT(16) ) #define BITS_MCU_PROT_CHECK(_X_) ( (_X_) & (BIT(0)|BIT(1)|BIT(2)|BIT(3)|BIT(4)|BIT(5)|BIT(6)|BIT(7)|BIT(8)|BIT(9)|BIT(10)|BIT(11)|BIT(12)|BIT(13)|BIT(14)|BIT(15)) ) /* bits definitions for register REG_APB_RF_CP2_IN_AXI_ADDR */ #define BITS_IN_AXI_ADDR(_X_) (_X_) /* bits definitions for register REG_APB_RF_CP2_IN_CFG_SIZE */ #define BITS_IN_CFG_SIZE(_X_) (_X_) /* bits definitions for register REG_APB_RF_CP2_APB_MISC_CTL */ #define BIT_FPGA_SPI_SEL ( BIT(16) ) #define BIT_TEST_DBG_MODE3 ( BIT(10) ) #define BIT_TEST_DBG_MODE2 ( BIT(9) ) #define BIT_TEST_DBG_MODE1 ( BIT(8) ) #define BIT_TEST_DBG_MODE0 ( BIT(7) ) #define BIT_BT_MAHB_SLEEP_EN ( BIT(6) ) #define BIT_DSP2BT_IND ( BIT(5) ) #define BIT_ROM_CLK_FORCE_EN ( BIT(4) ) #define BIT_ARM7_JTAG_EN ( BIT(3) ) #define BITS_ARM7_CACHE_SIZE(_X_) ( (_X_) << 1 & (BIT(1)|BIT(2)) ) #define BIT_ARM7_CACHE_EN ( BIT(0) ) /* bits definitions for register REG_APB_RF_CP2_APB_MISC_CTL1 */ #define BITS_ARM7_HWRST1_REG(_X_) ( (_X_) & (BIT(0)|BIT(1)|BIT(2)|BIT(3)|BIT(4)|BIT(5)|BIT(6)|BIT(7)) ) /* bits definitions for register REG_APB_RF_CP2_WIFI_SARADC_CTRL0 */ #define BIT_WIFI_SARAD_CLK_SEL ( BIT(26) ) #define BIT_WIFI_SARAD_DEBUG_EN ( BIT(25) ) #define BITS_WIFI_SARAD_CALADDR(_X_) ( (_X_) << 19 & (BIT(19)|BIT(20)|BIT(21)|BIT(22)|BIT(23)|BIT(24)) ) #define BIT_WIFI_SARAD_CALEN ( BIT(18) ) #define BIT_WIFI_SARAD_CALRD ( BIT(17) ) #define BIT_WIFI_SARAD_CAL_RSTN ( BIT(16) ) #define BIT_WIFI_SARAD_DLLEN ( BIT(15) ) #define BITS_WIFI_SARAD_DLLIN(_X_) ( (_X_) << 9 & (BIT(9)|BIT(10)|BIT(11)|BIT(12)|BIT(13)|BIT(14)) ) #define BITS_WIFI_SARAD_DLLOOF(_X_) ( (_X_) << 3 & (BIT(3)|BIT(4)|BIT(5)|BIT(6)|BIT(7)|BIT(8)) ) #define BIT_WIFI_SARAD_DLLRD ( BIT(2) ) #define BIT_WIFI_SARAD_DLLWR ( BIT(1) ) #define BIT_WIFI_SARAD_DLL_RSTN ( BIT(0) ) /* bits definitions for register REG_APB_RF_CP2_WIFI_SARADC_CTRL1 */ #define BITS_WIFI_SARAD_QUANT_BOOST(_X_) ( (_X_) << 27 & (BIT(27)|BIT(28)) ) #define BITS_WIFI_SARAD_VREF_BOOST(_X_) ( (_X_) << 25 & (BIT(25)|BIT(26)) ) #define BITS_WIFI_SARAD_VREF_SEL(_X_) ( (_X_) << 23 & (BIT(23)|BIT(24)) ) #define BITS_WIFI_SARAD_BIT_SEL(_X_) ( (_X_) << 21 & (BIT(21)|BIT(22)) ) #define BITS_WIFI_SARAD_DELAY_CAP(_X_) ( (_X_) << 19 & (BIT(19)|BIT(20)) ) #define BIT_WIFI_SARAD_VCM_SEL ( BIT(18) ) #define BIT_WIFI_SARAD_DIG_CLK_SEL ( BIT(17) ) #define BIT_WIFI_SARAD_CAL ( BIT(16) ) #define BITS_WIFI_SARAD_RESERVE(_X_) ( (_X_) & (BIT(0)|BIT(1)|BIT(2)|BIT(3)|BIT(4)|BIT(5)|BIT(6)|BIT(7)|BIT(8)|BIT(9)|BIT(10)|BIT(11)|BIT(12)|BIT(13)|BIT(14)|BIT(15)) ) /* bits definitions for register REG_APB_RF_CP2_BT_SARADC_CTRL1 */ #define BIT_BT_SARAD_PD ( BIT(27) ) #define BIT_BT_SARAD_ADCS_EN ( BIT(26) ) #define BIT_BT_SARAD_DEBUG_EN ( BIT(25) ) #define BITS_BT_SARAD_CALADDR(_X_) ( (_X_) << 19 & (BIT(19)|BIT(20)|BIT(21)|BIT(22)|BIT(23)|BIT(24)) ) #define BIT_BT_SARAD_CALEN ( BIT(18) ) #define BIT_BT_SARAD_CALRD ( BIT(17) ) #define BIT_BT_SARAD_CAL_RSTN ( BIT(16) ) #define BIT_BT_SARAD_DLLEN ( BIT(15) ) #define BITS_BT_SARAD_DLLIN(_X_) ( (_X_) << 9 & (BIT(9)|BIT(10)|BIT(11)|BIT(12)|BIT(13)|BIT(14)) ) #define BITS_BT_SARAD_DLLOOF(_X_) ( (_X_) << 3 & (BIT(3)|BIT(4)|BIT(5)|BIT(6)|BIT(7)|BIT(8)) ) #define BIT_BT_SARAD_DLLRD ( BIT(2) ) #define BIT_BT_SARAD_DLLWR ( BIT(1) ) #define BIT_BT_SARAD_DLL_RSTN ( BIT(0) ) /* bits definitions for register REG_APB_RF_CP2_BT_SARADC_CTRL2 */ #define BITS_BT_SARAD_QUANT_BOOST(_X_) ( (_X_) << 27 & (BIT(27)|BIT(28)) ) #define BITS_BT_SARAD_VREF_BOOST(_X_) ( (_X_) << 25 & (BIT(25)|BIT(26)) ) #define BITS_BT_SARAD_VREF_SEL(_X_) ( (_X_) << 23 & (BIT(23)|BIT(24)) ) #define BITS_BT_SARAD_BIT_SEL(_X_) ( (_X_) << 21 & (BIT(21)|BIT(22)) ) #define BITS_BT_SARAD_DELAY_CAP(_X_) ( (_X_) << 19 & (BIT(19)|BIT(20)) ) #define BIT_BT_SARAD_VCM_SEL ( BIT(18) ) #define BIT_BT_SARAD_DIG_CLK_SEL ( BIT(17) ) #define BIT_BT_SARAD_CAL ( BIT(16) ) #define BITS_BT_SARAD_RESERVE(_X_) ( (_X_) & (BIT(0)|BIT(1)|BIT(2)|BIT(3)|BIT(4)|BIT(5)|BIT(6)|BIT(7)|BIT(8)|BIT(9)|BIT(10)|BIT(11)|BIT(12)|BIT(13)|BIT(14)|BIT(15)) ) /* bits definitions for register REG_APB_RF_CP2_WBT_DAC_CTRL0 */ #define BIT_WBT_DAC_SOFT_RST ( BIT(8) ) #define BITS_WBT_DAC_PCTRL(_X_) ( (_X_) << 4 & (BIT(4)|BIT(5)|BIT(6)) ) #define BITS_WBT_DAC_RESERVE(_X_) ( (_X_) & (BIT(0)|BIT(1)|BIT(2)|BIT(3)) ) /* bits definitions for register REG_APB_RF_CP2_WBT_ANA_STS0 */ #define BITS_WIFI_SARAD_CALRDOUT(_X_) ( (_X_) << 6 & (BIT(6)|BIT(7)|BIT(8)|BIT(9)|BIT(10)|BIT(11)|BIT(12)|BIT(13)|BIT(14)|BIT(15)|BIT(16)|BIT(17)|BIT(18)|BIT(19)) ) #define BITS_WIFI_SARAD_DLL_OUT(_X_) ( (_X_) & (BIT(0)|BIT(1)|BIT(2)|BIT(3)|BIT(4)|BIT(5)) ) /* bits definitions for register REG_APB_RF_CP2_WBT_ANA_STS1 */ #define BIT_WIFIPLL2_LOCK_DONE ( BIT(21) ) #define BIT_WIFIPLL1_LOCK_DONE ( BIT(20) ) #define BITS_BT_SARAD_CALRDOUT(_X_) ( (_X_) << 6 & (BIT(6)|BIT(7)|BIT(8)|BIT(9)|BIT(10)|BIT(11)|BIT(12)|BIT(13)|BIT(14)|BIT(15)|BIT(16)|BIT(17)|BIT(18)|BIT(19)) ) #define BITS_BT_SARAD_DLL_OUT(_X_) ( (_X_) & (BIT(0)|BIT(1)|BIT(2)|BIT(3)|BIT(4)|BIT(5)) ) /* bits definitions for register REG_APB_RF_CP2_WIFI_CTRL0 */ #define BITS_WIFI_IN_CAP_SWT(_X_) ( (_X_) << 14 & (BIT(14)|BIT(15)) ) #define BITS_WIFI_SLEEP_CFG(_X_) ( (_X_) << 4 & (BIT(4)|BIT(5)|BIT(6)|BIT(7)|BIT(8)|BIT(9)|BIT(10)|BIT(11)|BIT(12)|BIT(13)) ) #define BIT_WB_EN_B_RG ( BIT(2) ) #define BIT_WB_EN_A_RG ( BIT(1) ) #define BIT_WB_EN_SEL ( BIT(0) ) /* bits definitions for register REG_APB_RF_CP2_WIFI_DAC_DFT */ #define BITS_WIFI_DAC_DFT(_X_) (_X_) /* bits definitions for register REG_APB_RF_CP2_WIFI_ADC_DFT */ #define BITS_WIFI_ADC_DFT(_X_) (_X_) #endif