/* * Copyright (C) 2013 Spreadtrum Communication Incorporated * http://www.spreadtrum.com/ * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ /dts-v1/; /* memory reserved for SMEM */ /memreserve/ 0x87800000 0x200000; /* 2MK */ /* memory reserved for CPW modem */ /memreserve/ 0x88000000 0x1c00000; /* 27M */ /* memory reserved for CPWCN modem */ /memreserve/ 0x8a800000 0x201000;/*Offset:168M, SIZE:2M+4k*/ /* memory reserved for fb */ /memreserve/ 0x9EE6C000 0xA8C000; /* 1280*720*4*3, 4K alignment */ /* memory reserved for ION */ /memreserve/ 0x9F8F8000 0x708000; /* 1280*720*4*2, 8K alignment */ /include/ "skeleton.dtsi" /include/ "scx30g2-clocks.dtsi" /include/ "sc2723-regulators.dtsi" /include/ "sprd-sound.dtsi" /include/ "sprd-battery.dtsi" / { model = "Spreadtrum SP8835EB board"; compatible = "sprd,sp8835eb"; sprd,sc-id = <8830 1 0x20000>; #address-cells = <1>; #size-cells = <1>; interrupt-parent = <&gic>; chosen { bootargs = "loglevel=1 console=ttyS1,115200n8 init=/init root=/dev/ram0 rw"; linux,initrd-start = <0x85500000>; linux,initrd-end = <0x855a3212>; }; memory { device_type = "memory"; reg = <0x80000000 0x40000000>; }; aliases { serial0 = &uart0; serial1 = &uart1; serial2 = &uart2; serial3 = &uart3; i2c0 = &i2c0; i2c1 = &i2c1; i2c2 = &i2c2; i2c3 = &i2c3; lcd0 = &fb0; spi0 = &spi0; spi1 = &spi1; spi2 = &spi2; hwspinlock0 = &hwspinlock0; hwspinlock1 = &hwspinlock1; }; cpus { #address-cells = <1>; #size-cells = <0>; cpu@f00 { device_type = "cpu"; compatible = "arm,cortex-a7"; reg = <0xf00>; }; cpu@f01 { device_type = "cpu"; compatible = "arm,cortex-a7"; reg = <0xf01>; }; cpu@f02 { device_type = "cpu"; compatible = "arm,cortex-a7"; reg = <0xf02>; }; cpu@f03 { device_type = "cpu"; compatible = "arm,cortex-a7"; reg = <0xf03>; }; }; gic: interrupt-controller@12001000 { compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic"; #interrupt-cells = <3>; #address-cells = <0>; interrupt-controller; reg = <0x12001000 0x1000>, <0x12002000 0x1000>; }; uart0: uart@70000000 { compatible = "sprd,serial"; interrupts = <0 2 0x0>; reg = <0x70000000 0x1000>; clock-names = "clk_uart0"; clocks = <&clock 60>; sprdclk = <48000000>; sprdwaketype = "BT_RTS_HIGH_WHEN_SLEEP"; }; uart1: uart@70100000 { compatible = "sprd,serial"; interrupts = <0 3 0x0>; reg = <0x70100000 0x1000>; clock-names = "clk_uart1"; clocks = <&clock 61>; sprdclk = <26000000>; sprdwaketype = "BT_RTS_HIGH_WHEN_SLEEP"; }; uart2: uart@70200000 { compatible = "sprd,serial"; interrupts = <0 4 0x0>; reg = <0x70200000 0x1000>; clock-names = "clk_uart2"; clocks = <&clock 62>; sprdclk = <26000000>; sprdwaketype = "BT_RTS_HIGH_WHEN_SLEEP"; }; uart3: uart@70300000 { compatible = "sprd,serial"; interrupts = <0 5 0x0>; reg = <0x70300000 0x1000>; clock-names = "clk_uart3"; clocks = <&clock 63>; sprdclk = <26000000>; sprdwaketype = "BT_RTS_HIGH_WHEN_SLEEP"; }; timer { compatible = "sprd,scx35-timer"; reg = <0x40230000 0x1000>, /* SYSCNT */ <0x40050000 0x1000>, /* GPTIMER0 */ <0x40220000 0x1000>, /* APTIMER0 */ <0x40330000 0x1000>, /* APTIMER1 */ <0x40340000 0x1000>; /* APTIMER2 */ interrupts = <0 118 0x0>, <0 28 0x0>, <0 29 0x0>, <0 119 0x0>, <0 121 0x0>, <0 31 0x0>;/*ap system timer*/ }; clock: clockdevice { compatible = "sprd,scx35-clock"; #clock-cells = <1>; }; d_eic_gpio: gpio@40210000{ compatible = "sprd,d-eic-gpio"; reg = <0x40210000 0x1000>; gpio-controller; interrupt-controller; #interrupt-cells = <2>; #gpio-cells = <2>; gpiobase = <288>; ngpios = <16>; interrupts = <0 37 0x0>; }; d_gpio_gpio: gpio@40280000{ compatible = "sprd,d-gpio-gpio"; reg = <0x40280000 0x1000>; gpio-controller; interrupt-controller; #interrupt-cells = <2>; #gpio-cells = <2>; gpiobase = <0>; ngpios = <256>; interrupts = <0 35 0x0>; }; pinctrl{ compatible = "sprd,pinctrl"; reg = <0x402a0000 0x1000>; pwr_domain = "vdd18", "vdd18", "vddsim0", "vddsim1", "vddsim2", "vddsdio", "vdd18"; ctrl_desc = <0x10 0 1 0x10 1 1 0x10 2 1 0x10 3 1 0x10 4 1 0x10 5 1 0x10 6 1>; }; sdios{ #address-cells = <2>; #size-cells = <2>; ranges; sdio3: sdio@20600000{ compatible = "sprd,sdhost-3.0"; reg = <0 0x20600000 0 0x1000>; interrupts = <0 60 0x0>; sprd,name = "sdio_emmc"; /*detect_gpio = <-1>; */ SD_Pwr_Name = "vddemmccore"; _1_8V_signal_Name = "vddgen0"; signal_default_Voltage = <1800000>; ocr_avail = <0x00040000>; clocks = <&clk_emmc>, <&clk_384m>; base_clk = <384000000>; caps = <0xC00F8D47>; caps2 = <0x202>; pm_caps = <0x4>; writeDelay = <0x4>; readPosDelay = <0x4>; readNegDelay = <0x4>; }; sdio0: sdio@20300000{ compatible = "sprd,sdhost-3.0"; reg = <0 0x20300000 0 0x1000>; interrupts = <0 57 0x0>; sprd,name = "sdio_sd"; /* detect_gpio = <71>; */ SD_Pwr_Name = "vddsdcore"; _1_8V_signal_Name = "vddsdio"; signal_default_Voltage = <3000000>; ocr_avail = <0x00040000>; clocks = <&clk_sdio0>, <&clk_384m>; base_clk = <384000000>; caps = <0xC0038507>; caps2 = <0x200>; pm_caps = <0x4>; writeDelay = <0x3>; readPosDelay = <0x3>; readNegDelay = <0x3>; }; sdio1: sdio@20400000{ compatible = "sprd,sdhost-3.0"; reg = <0 0x20400000 0 0x1000>; interrupts = <0 58 0x0>; sprd,name = "sdio_wifi"; /* detect_gpio = <-1>; */ /* SD_Pwr_Name = "vddsdcore"; */ /* _1_8V_signal_Name = "vddsdio";*/ /* signal_default_Voltage = <3000000>; */ ocr_avail = <0x00360080>; clocks = <&clk_sdio1>, <&clk_76m8>; base_clk = <96000000>; caps = <0xC00FA407>; caps2 = <0x0>; pm_caps = <0x5>; writeDelay = <0x03>; readPosDelay = <0x03>; readNegDelay = <0x03>; }; }; adic:adic{ compatible = "sprd,adi"; reg = <0x40030000 0x10000>; }; adi: adi_bus{ compatible = "sprd,adi-bus"; interrupts = <0 38 0x0>; reg = <0x40038000 0x1000>; interrupt-controller; sprd,irqnums = <11>; #interrupt-cells = <2>; #address-cells = <1>; #size-cells = <1>; ranges = <0X40 0x40038040 0x40>, <0x80 0x40038080 0x80>, <0x100 0x40038100 0x80>; sprd_backlight { compatible = "sprd,sprd_backlight"; start = <3>; end = <3>; flags = <0x100>; }; headset_sprd_sc2723 { compatible = "sprd,headset_sprd_sc2723"; gpio_switch = <0>; gpio_detect = <312>; gpio_detect_mic = <309>; gpio_button = <307>; irq_trigger_level_detect = <1>; irq_trigger_level_button = <1>; irq_trigger_level_detect_mic = <0>; adc_threshold_3pole_detect = <100>; adc_threshold_4pole_detect = <3100>; irq_threshold_buttont = <1>; voltage_headmicbias = <3000000>; nbuttons = <1>; jack_type= <1>; //0:open-jack 1:close-jack headset_buttons { adc_min = <0>; adc_max = <170>; code = <226>; type = <0>; }; }; keyboard_backlight { compatible = "sprd,keyboard-backlight"; }; sprd_kpled_2723 { compatible = "sprd,sprd-kpled-2723"; brightness_max = <255>; brightness_min = <0>; run_mode = <0>; }; watchdog@40{ compatible = "sprd,watchdog"; reg = <0X40 0x40>; interrupts = <3 0x0>; }; rtc@80{ compatible = "sprd,rtc"; reg = <0X80 0x80>; interrupts = <2 0x0>; }; a_eic_gpio: gpio@100{ compatible = "sprd,a-eic-gpio"; reg = <0X100 0x80>; /* adi reg */ gpio-controller; interrupt-controller; #interrupt-cells = <2>; #gpio-cells = <2>; gpiobase = <304>; ngpios = <16>; interrupt-parent = <&adi>; interrupts = <5 0x0>; /* ext irq 5 */ }; sprd_eic_keys { compatible = "sprd,sprd-eic-keys"; input-name = "sprd-eic-keys"; /* key_power { label = "Power Key"; linux,code = <116>; gpios = <&a_eic_gpio 2 0>; debounce-interval = <2>; gpio-key,wakeup; }; */ key_volumeup { label = "Volumeup Key"; linux,code = <115>; gpios = <&a_eic_gpio 10 0>; debounce-interval = <2>; gpio-key,wakeup; }; }; }; sprd_pwm_bl { compatible = "sprd,sprd_pwm_bl"; reg = <0x40260000 0xf>; brightness_max = <255>; brightness_min = <0>; pwm_index = <3>; gpio_ctrl_pin = <0>; gpio_active_level = <0>; }; /* gpio_keys { compatible = "gpio-keys"; input-name = "sprd-gpio-keys"; key_volumedown { label = "Volumedown Key"; linux,code = <114>; gpios = <&d_gpio_gpio 124 1>; debounce-interval = <2>; gpio-key,wakeup; }; key_volumeup { label = "Volumeup Key"; linux,code = <115>; gpios = <&d_gpio_gpio 125 1>; debounce-interval = <2>; gpio-key,wakeup; }; }; */ keypad@40250000{ compatible = "sprd,sci-keypad"; reg = <0x40250000 0x1000>; gpios = <&a_eic_gpio 2 0>; interrupts = <0 36 0x0>; sprd,keypad-num-rows = <2>; sprd,keypad-num-columns = <2>; sprd,keypad-rows-choose-hw = <0x30000>; sprd,keypad-cols-choose-hw = <0x300>; sprd,debounce_time = <5000>; linux,keypad-no-autorepeat; sprd,support_long_key; key_volume_down { keypad,row = <0>; keypad,column = <0>; linux,code = <114>; }; /* key_volume_up { keypad,row = <1>; keypad,column = <0>; linux,code = <115>; }; */ key_home { keypad,row = <0>; keypad,column = <1>; linux,code = <102>; }; }; sprd_vsp@60900000{ compatible = "sprd,sprd_vsp"; reg = <0x60900000 0xc000>; interrupts = <0 43 0x0>; clock-names = "clk_mm_i", "clk_vsp", "clk_mm_axi"; clocks = <&clk_mm>, <&clk_vsp>, <&clk_mm_axi>; version = <2>; }; sprd_jpg { compatible = "sprd,sprd_jpg"; reg = <0x60b00000 0x8000>; interrupts = <0 42 0x0>; clock-names = "clk_mm_i","clk_jpg"; clocks = <&clk_mm>, <&clk_jpg>; }; sprd_vpp@61000000{ compatible = "sprd,sprd_vpp"; reg = <0x61000000 0x4000>; interrupts = <0 43 0x0>; clock-names = "clk_mm_i","clk_vpp","clk_256m","clk_192m","clk_128m","clk_76m8"; clocks = <&clk_mm>, <&clk_vpp>, <&clk_256m>, <&clk_192m>, <&clk_128m>, <&clk_76m8>; clock-parent-info = <2 4>; }; sprd_coda7l@62100000{ compatible = "sprd,sprd_coda7l"; reg = <0x62100000 0x4000>; interrupts = <0 43 0x0>; clock-names = "clk_mm_i","clk_coda7_axi","clk_coda7_cc","clk_coda7_apb", "clk_192m","clk_153m6","clk_128m","clk_76m8", "clk_128m","clk_96m","clk_76m8","ext_26m"; clocks = <&clk_mm>, <&clk_coda7_axi>, <&clk_coda7_cc>, <&clk_coda7_apb>, <&clk_192m>, <&clk_153m6>, <&clk_128m>, <&clk_76m8>, <&clk_128m>, <&clk_96m>, <&clk_76m8>, <&ext_26m>; clock-parent-info = <4 4>; power-regs-info = <0x402b0154 0 0x402b00bc 0x00f00000>; }; i2c0: i2c@70500000 { compatible = "sprd,i2c"; interrupts = <0 11 0x0>; reg = <0x70500000 0x1000>; #address-cells = <1>; #size-cells = <0>; sensor_main@0x3c{ compatible = "sprd,sensor_main"; reg = <0x3c>; }; sensor_sub@0x21{ compatible = "sprd,sensor_sub"; reg = <0x21>; }; }; i2c1: i2c@70600000 { compatible = "sprd,i2c"; interrupts = <0 12 0x0>; reg = <0x70600000 0x1000>; #address-cells = <1>; #size-cells = <0>; focaltech_ts@38{ compatible = "focaltech,focaltech_ts"; reg = <0x38>; gpios = <&d_gpio_gpio 28 0 &d_gpio_gpio 29 0>; vdd_name = "vdd28"; virtualkeys = <130 1360 80 60 373 1360 80 60 630 1360 80 60>; TP_MAX_X = <720>; TP_MAX_Y = <1280>; }; }; i2c2: i2c@70700000{ compatible = "sprd,i2c"; interrupts = <0 13 0x0>; reg = <0x70700000 0x1000>; #address-cells = <1>; #size-cells = <0>; lis3dh_acc@18{ compatible = "ST,lis3dh_acc"; reg = <0x18>; poll_interval = <10>; min_interval = <10>; g_range = <0>; axis_map_x = <1>; axis_map_y = <0>; axis_map_z = <2>; negate_x = <0>; negate_y = <1>; negate_z = <0>; }; ltr_558als@23{ compatible = "LITEON,ltr_558als"; reg = <0x23>; gpios = <&d_gpio_gpio 216 0>; }; }; i2c3: i2c@70800000{ compatible = "sprd,i2c"; interrupts = <0 14 0x0>; reg = <0x70800000 0x1000>; #address-cells = <1>; #size-cells = <0>; fairchild_fan5405@6a{ compatible = "fairchild,fairchild_fan5405"; reg = <0x6a>; }; }; sprd_dcam{ compatible = "sprd,sprd_dcam"; interrupts = <0 45 0>; reg = <0x60800000 0x100000>; clock-names = "clk_mm_i","clk_dcam"; clocks = <&clk_mm>, <&clk_dcam>; }; sprd_scale { compatible = "sprd,sprd_scale"; }; sprd_rotation { compatible = "sprd,sprd_rotation"; }; sprd_sensor { compatible = "sprd,sprd_sensor"; reg = <0x60c00000 0x100000>; gpios = <&d_gpio_gpio 186 0 /*main reset*/ &d_gpio_gpio 187 0 /*main power down*/ &d_gpio_gpio 186 0 /*sub reset*/ &d_gpio_gpio 188 0 /*sub power down*/ &d_gpio_gpio 0 0 /*none*/ &d_gpio_gpio 0 0 /*none*/ &d_gpio_gpio 0 0 /*none*/ &d_gpio_gpio 0 0>; /*none*/ clock-names ="clk_mm_i","clk_sensor","clk_ccir","clk_dcam","clk_dcam_mipi"; clocks = <&clk_mm>, <&clk_sensor>,<&clk_ccir>, <&clk_dcam>, <&clk_dcam_mipi>; }; sprd_isp { compatible = "sprd,sprd_isp"; reg = <0x60a00000 0x100000>; clock-names = "clk_mm_i","clk_isp"; clocks = <&clk_mm>, <&clk_isp>; }; sprd_dma_copy { compatible = "sprd,sprd_dma_copy"; }; fb0: fb@20800000 { compatible = "sprd,sprdfb"; reg = <0x20800000 0x1000>,<0x21800000 0x1000>; interrupts = <0 46 0x0>,<0 48 0x0>, <0 49 0x0>; clock-names = "dispc_clk_parent", "dispc_dbi_clk_parent", "dispc_dpi_clk_parent", "dispc_emc_clk_parent", "dispc_clk", "dispc_dbi_clk", "dispc_dpi_clk", "dispc_emc_clk", "fb_spi_clock", "fb_spi_clock_parent"; clocks = <&clk_256m>, <&clk_256m>, <&clk_384m>, <&clk_aon_apb>, <&clk_dispc0>, <&clk_dispc0_dbi>, <&clk_dispc0_dpi>, <&clk_disp_emc>, <&clk_spi2>, <&ext_26m>; clock-src = <256000000 256000000 384000000>; dpi_clk_div = <7>; sprd,fb_use_reservemem; sprd,fb_mem = <0x9EE6C000 0xA8C000>; /* 1280*720*4*3, 4K alignment */ sprd,fb_display_size = <480 854>; }; gsp:gsp@20a00000 { compatible = "sprd,gsp"; reg = <0x20a00000 0x1000>; interrupts = <0 51 0x0>; clock-names = "clk_gsp", "clk_gsp_emc", "clk_gsp_parent", "clk_aon_apb"; clocks = <&clk_gsp>, <&clk_gsp_emc>, <&clk_256m>, <&clk_aon_apb>; gsp_mmu_ctrl_base = <0x21408000>; }; sprd_fm: sprd_fm@40270000{ compatible = "sprd,sprd_fm"; reg = <0x40270000 0x1000>; }; /* sipc initializer */ sipc: sipc@0x87800000 { compatible = "sprd,sipc"; reg = <0x87800000 0x200000>; /* */ //#interrupt-cells = <2>; #address-cells = <1>; #size-cells = <1>; ranges = <0x8000000 0x88000000 0x1c00000>, <0x07800000 0x87800000 0x140000>, <0x9bff000 0x89bff000 0x1000>, <0x0a800000 0x8a800000 0x201000>,/*WCN MEMORY:OFFSET ADDRESS SIZE*/ <0x07940000 0x87940000 0xc0000>, <0x0aa00000 0x8aa00000 0x1000>;/*WCN SIPC-RING:OFFSET ADDRESS SIZE*/ sipc_cpw@0x8000000 { sprd,name = "sipc-w"; sprd,dst = <2>; sprd,ap2cp = <0x402c0000>; /* base on ipi reggister */ sprd,cp2ap = <0x402c0004>; sprd,trig = <0x01>; /* trigger bit */ sprd,clr = <0x01>; /* clear bit */ interrupts = <0 68 0x0>; reg = <0x8000000 0x1c00000> , /* */ <0x07800000 0x140000>, /* */ <0x9bff000 0x1000>; /* smsg ring buffer */ }; sipc_wcn@0x0a800000 { sprd,name = "sipc-wcn"; sprd,dst = <3>; sprd,ap2cp = <0x402c0000>; /* base on ipi reggister */ sprd,cp2ap = <0x402c0004>; sprd,trig = <0x100>; /* trigger bit */ sprd,clr = <0x100>; /* clear bit */ interrupts = <0 73 0x0>; reg = <0x0a800000 0x201000> , /* */ <0x07940000 0xc0000>, /* */ <0x0aa00000 0x1000>; /* smsg ring buffer */ }; }; /* cpw virtual devices */ spipe-cpw { compatible = "sprd,spipe"; sprd,name = "spipe_w"; sprd,dst = <2>; sprd,channel = <4>; sprd,ringnr = <9>; sprd,size-rxbuf = <0x1000>; /* 4*1024 */ sprd,size-txbuf = <0x1000>; /* 4*1024 */ }; slog-cpw { compatible = "sprd,spipe"; sprd,name = "slog_w"; sprd,dst = <2>; sprd,channel = <5>; sprd,ringnr = <1>; sprd,size-rxbuf = <0x40000>; /* 256*1024*/ sprd,size-txbuf = <0x8000>; /* 32*1024 */ }; stty-cpw { compatible = "sprd,spipe"; sprd,name = "stty_w"; sprd,dst = <2>; sprd,channel = <6>; sprd,ringnr = <32>; sprd,size-rxbuf = <0x0800>; /* 2*1024*/ sprd,size-txbuf = <0x0800>; /* 2*1024 */ }; seth0-cpw { compatible = "sprd,seth"; sprd,name = "seth_w0"; sprd,dst = <2>; sprd,channel = <7>; sprd,blknum = <64>; }; seth1-cpw { compatible = "sprd,seth"; sprd,name = "seth_w1"; sprd,dst = <2>; sprd,channel = <8>; sprd,blknum = <64>; }; seth2-cpw { compatible = "sprd,seth"; sprd,name = "seth_w2"; sprd,dst = <2>; sprd,channel = <9>; sprd,blknum = <64>; }; scproc_cpw: scproc@0x88000000 { compatible = "sprd,scproc"; sprd,name = "cpw"; sprd,ctrl-reg = <0x44 0x44 0xb0 0xff>; /* */ sprd,ctrl-mask = <0x02000000 0x10000000 0x01 0xf0000>; /* masks <> */ sprd,iram-data = <0xe59f0000 0xe12fff10 0x88300000>; /* 3rd param equals modem_addr*/ reg = <0x88000000 0x1c00000>, /* = <+128M 26M> */ <0x50000000 0x0c>, /* */ <0x402b0000 0x10000>, /* */ <0x402b0000 0x10000>, /* */ <0x402b0000 0x10000>, /* */ <0x402b0000 0x10000>; /* */ interrupts = <0 84 0x0>; /* cp1_wdg_int */ #address-cells = <1>; #size-cells = <1>; /* segnr=2 */ ranges = <0x300000 0x88300000 0x00800000>, <0x20000 0x88020000 0x00220000>; modem@0x300000 { cproc,name = "modem"; reg = <0x300000 0x00800000>; /* */ }; dsp@0x20000 { cproc,name = "dsp"; reg = <0x20000 0x00220000>; /* */ }; }; saudio_w{ compatible = "sprd,saudio"; sprd,saudio-dst-id = <2>; sprd,ctrl_channel = <10>; /* SMSG_CH_VBC */ sprd,playback_channel = <11>; /* SMSG_CH_PLAYBACK */ sprd,capture_channel = <12>; /* SMSG_CH_CAPTURE */ sprd,monitor_channel = <13>; /*SMSG_CH_MONITOR_AUDIO */ sprd,saudio-names = "VIRTUAL AUDIO W"; }; saudio_voip{ compatible = "sprd,saudio"; sprd,saudio-dst-id = <2>; sprd,ctrl_channel = <14>; /* SMSG_CH_CTRL_VOIP */ sprd,playback_channel = <15>; /* SMSG_CH_PLAYBACK_VOIP */ sprd,capture_channel = <16>; /* SMSG_CH_CAPTURE_VOIP */ sprd,monitor_channel = <17>; /*SMSG_CH_MONITOR_VOIP */ sprd,saudio-names = "saudiovoip"; }; /* cpwcn virtual devices */ spipe_cpwcn { compatible = "sprd,spipe"; sprd,name = "spipe_wcn"; sprd,dst = <3>; sprd,channel = <4>; sprd,ringnr = <13>; sprd,size-rxbuf = <0x1000>; /* 4*1024 */ sprd,size-txbuf = <0x1000>; /* 4*1024 */ }; slog_cpwcn { compatible = "sprd,spipe"; sprd,name = "slog_wcn"; sprd,dst = <3>; sprd,channel = <5>; sprd,ringnr = <1>; sprd,size-rxbuf = <0x40000>; /* 256*1024*/ sprd,size-txbuf = <0x8000>; /* 32*1024 */ }; stty4bt_cpwcn { compatible = "sprd,stty4bt"; sprd,name = "sttybt"; sprd,dst = <3>; sprd,channel = <4>; sprd,bufid = <10>; }; scproc_cpwcn: scproc@0x8a800000 { compatible = "sprd,scproc"; sprd,name = "cpwcn"; sprd,ctrl-reg = <0x68 0x68 0xb0 0xb0>; /* */ sprd,ctrl-mask = <0x02000000 0x10000000 0x04 0x04>; /* masks <> */ sprd,iram-data = <0xe59f0000 0xe12fff10 0x8a808000>; /* 3rd param equals modem_addr*/ reg = <0x8a800000 0x201000>, /* = <+168M 2M+4k> */ <0x50003000 0x1000>, /* use iram1 phys because of cp2 iram not maped */ <0x402b0000 0x10000>, /* */ <0x402b0000 0x10000>, /* */ <0x402b0000 0x10000>, /* */ <0x402b0000 0x10000>; /* */ interrupts = <0 85 0x0>; /* cp2_wdg_int */ #address-cells = <1>; #size-cells = <1>; /* segnr=1 */ ranges = <0x8000 0x8a808000 0x201000>; modem@0x8000 { cproc,name = "modem"; reg = <0x8000 0x201000>; /* */ }; }; sprd_wlan{ compatible = "sprd,sprd_wlan"; }; usb: usb@20200000{ compatible = "sprd,usb"; interrupts = <0 55 0x0>; ngpios = <2>; gpios = <&a_eic_gpio 0 0>,<&d_gpio_gpio 72 0>; reg = <0x20200000 0x1000>; tune_value = <0x44073e33>; usb-supply = <&vddusb>; #address-cells = <1>; #size-cells = <0>; }; sprd_thermal: thermal@402F0000{ compatible = "sprd,ddie-thermal"; interrupts = <0 26 0x0>; reg = <0x402f0000 0x1000>; sensor_arm { id = <0>; temp-inteval=<0>; thermal-name = "sprd_arm_thm"; trip0-temp-active = <65000>; trip0-type = "active"; trip0-temp-lowoff = <0>; trip0-cdev-num = <1>; trip0-cdev-name0 = "thermal-cpufreq-0"; trip1-temp-active = <69000>; trip1-type = "active"; trip1-temp-lowoff = <57000>; trip1-cdev-num = <1>; trip1-cdev-name0 = "thermal-cpufreq-0"; trip2-temp-active = <95000>; trip2-type = "active"; trip2-temp-lowoff = <61000>; trip2-cdev-num = <1>; trip2-cdev-name0 = "thermal-cpufreq-0"; trip3-temp-active = <110000>; trip3-type = "critical"; trip3-temp-lowoff = <80000>; trip3-cdev-num = <1>; trip3-cdev-name0 = "thermal-cpufreq-0"; trip-points-critical = <119000>; trip-num = <5>; }; sensor_gpu { id = <1>; thermal-name = "sprd_gpu_thm"; temp-inteval=<0>; trip0-temp-active = <110000>; trip0-type = "active"; trip0-temp-lowoff = <90000>; trip0-cdev-num = <1>; trip0-cdev-name0 = "thermal-cpufreq-0"; trip-points-critical = <110000>; trip-num = <2>; }; }; sprd_cpu_cooling{ compatible = "sprd,sprd-cpu-cooling"; id = <0>; max_freq = <1300000 1200000 1000000 768000>; max_core = <4 4 4 1>; state_num = <4>; }; spi0: spi@70a00000{ compatible = "sprd,sprd-spi"; interrupts = <0 7 0x0>; reg = <0x70a00000 0x1000>; clock-names = "clk_spi0"; #address-cells = <1>; #size-cells = <0>; }; spi1: spi@70b00000{ compatible = "sprd,sprd-spi"; interrupts = <0 8 0x0>; reg = <0x70b00000 0x1000>; clock-names = "clk_spi1"; #address-cells = <1>; #size-cells = <0>; }; spi2: spi@70c00000{ compatible = "sprd,sprd-spi"; interrupts = <0 9 0x0>; reg = <0x70c00000 0x1000>; clock-names = "clk_spi2"; #address-cells = <1>; #size-cells = <0>; }; dmac: dmac@20100000{ compatible = "sprd,sprd-dma"; interrupts = <0 50 0x0>; reg = <0x20100000 0x4000>; }; adc: adc@40038300{ compatible = "sprd,sprd-adc"; reg = <0x40038300 0x400>; }; hwspinlock0: hwspinlock0@20c00000{ compatible = "sprd,sprd-hwspinlock"; reg = <0x20c00000 0x1000>; }; hwspinlock1: hwspinlock1@40060000{ compatible = "sprd,sprd-hwspinlock"; reg = <0x40060000 0x1000>; }; gpu@60000000 { compatible = "arm,mali-400", "arm,mali-utgard"; reg = <0x60000000 0x10000>; interrupts = <0 39 0>, <0 39 0>, <0 39 0>, <0 39 0>, <0 39 0>, <0 39 0>, <0 39 0>; interrupt-names = "IRQGP", "IRQGPMMU", "IRQPP0", "IRQPPMMU0", "IRQPP1", "IRQPPMMU1", "IRQPMU"; pmu_domain_config = <0x1000 0x1000 0x1000 0x0 0x0 0x0 0x0 0x0 0x0 0x1000 0x0 0x0>; pmu_switch_delay = <0xffff>; clocks = <&clk_gpu_axi>,<&clk_gpu>,<&clk_153m6>,<&clk_208m>,<&clk_256m>,<&clk_312m>,<&clk_384m>,<&clk_460m8>; clock-names = "clk_gpu_axi","clk_gpu","clk_153m6","clk_208m","clk_256m","clk_312m","clk_384m","clk_460m8"; freq-list-len = <4>; freq-lists = <153600 2 1>, <256000 4 1>, <384000 6 1>, <460800 7 1>; freq-default = <1>; freq-9 = <3>; freq-8 = <3>; freq-7 = <1>; freq-5 = <0>; freq-range-max = <3>; freq-range-min = <0>; freq-list-len-overclk = <5>; freq-lists-overclk = <153600 2 1>, <256000 4 1>, <384000 6 1>, <460800 7 1>, <512000 5 1>; freq-default-overclk = <1>; freq-9-overclk = <4>; freq-8-overclk = <4>; freq-7-overclk = <1>; freq-5-overclk = <0>; freq-range-max-overclk = <4>; freq-range-min-overclk = <0>; freq-clk-nb = <4>; freq-clk-nb-prev = <3>; }; ion { compatible = "sprd,ion-sprd"; #address-cells = <1>; #size-cells = <0>; sprd,ion-heap@1 { reg = <1>; /* SYSTEM */ reg-names = "ion_heap_system"; sprd,ion-heap-type = <0>; /* SYSTEM */ sprd,ion-heap-mem = <0x0 0x0>; }; sprd,ion-heap@2 { reg = <2>; /* MM */ reg-names = "ion_heap_carveout_mm"; sprd,ion-heap-type = <0>; /* carveout mm */ sprd,ion-heap-mem = <0x97D6C000 0x7100000>; }; sprd,ion-heap@3 { reg = <3>; /* OVERLAY */ reg-names = "ion_heap_carveout_overlay"; sprd,ion-heap-type = <2>; /* CARVEOUT */ sprd,ion-heap-mem = <0x9F8F8000 0x708000>; /* 1280*720*4*2, 8K alignment*/ }; }; sprd_iommu0:sprd_iommu@21400000 { compatible = "sprd,sprd_iommu";//gsp func-name = "sprd_iommu_gsp"; reg = <0x10000000 0x2000000>, //iova <0x21400000 0x8000>, //pgt <0x21408000 0x8000>; //ctrl_reg reg_name = "iova","pgt","ctrl_reg"; clock-names = "clk_gsp_emc","clk_153m6","clk_gsp"; clocks = <&clk_gsp_emc>, <&clk_153m6>,<&clk_gsp>; status = "ok"; }; sprd_iommu1:sprd_iommu@60f00000 { compatible = "sprd,sprd_iommu";//mm func-name = "sprd_iommu_mm"; reg = <0x20000000 0x8000000>, //iova <0x60f00000 0x20000>, //pgt <0x60f20000 0x2000>; //ctrl_reg reg_name = "iova","pgt","ctrl_reg"; clock-names = "clk_mmu","clk_mm_i","clk_mm_axi"; clocks = <&clk_mmu>,<&clk_mm>,<&clk_mm_axi>; status = "ok"; }; sprd_rf2351: sprd_rf2351@40070000{ compatible = "sprd,sprd_rf2351"; reg = <0X40070000 0x1000>, /*RFSPI*/ <0X402E0000 0x10000>; /*APB_EB0*/ clock-names = "clk_cpll"; clocks = <&clk_cpll>; }; gps_2351: gps_2351@21c00000{ compatible = "sprd,gps_2351"; interrupts = <0 52 0x0>; gpios = <&d_gpio_gpio 50 0>; reg = <0X21C00000 0x1000>, /*GPS CORE BASE*/ <0X20D00000 0x10000>, /*AHB_ADDR*/ <0X402B0000 0x10000>; /*PMU BASE*/ }; sprd-io-base { #address-cells = <1>; #size-cells = <1>; ranges = <0 0 0x80000000>; ahb { compatible = "sprd,ahb"; reg = <0x20d00000 0x10000>; }; aonapb { compatible = "sprd,aonapb"; reg = <0x402e0000 0x10000>; }; apbreg { compatible = "sprd,apbreg"; reg = <0x71300000 0x10000>; }; pmu { compatible = "sprd,pmu"; reg = <0x402b0000 0x10000>; }; mmahb { compatible = "sprd,mmahb"; reg = <0x60d00000 0x4000>; }; mmckg { compatible = "sprd,mmckg"; reg = <0x60e00000 0x1000>; }; codecahb { compatible = "sprd,codecahb"; reg = <0x62000000 0x1000>; }; adislave { compatible = "sprd,adislave"; reg = <0x40038000 0x1000>; }; gpuapb { compatible = "sprd,gpuapb"; reg = <0x60100000 0x1000>; }; aonckg { compatible = "sprd,aonckg"; reg = <0x402d0000 0x1000>; }; apbckg { compatible = "sprd,apbckg"; reg = <0x71200000 0x10000>; }; gpuckg { compatible = "sprd,gpuckg"; reg = <0x60200000 0x1000>; }; core { compatible = "sprd,core"; reg = <0x12000000 0x10000>; }; int { compatible = "sprd,int"; reg = <0x40200000 0x1000>; }; intc0 { compatible = "sprd,intc0"; reg = <0x71400000 0x1000>; }; intc1 { compatible = "sprd,intc1"; reg = <0x71500000 0x1000>; }; intc2 { compatible = "sprd,intc2"; reg = <0x71600000 0x1000>; }; intc3 { compatible = "sprd,intc3"; reg = <0x71700000 0x1000>; }; uidefuse { compatible = "sprd,uidefuse"; reg = <0x40240000 0x1000>; }; isp { compatible = "sprd,isp"; reg = <0x60a00000 0x8000>; }; csi2 { compatible = "sprd,csi2"; reg = <0x60c00000 0x1000>; }; ipi { compatible = "sprd,ipi"; reg = <0x402c0000 0x1000>; }; dcam { compatible = "sprd,dcam"; reg = <0x60800000 0x10000>; }; syscnt { compatible = "sprd,syscnt"; reg = <0x40230000 0x1000>; }; dma0 { compatible = "sprd,dma0"; reg = <0x20100000 0x4000>; }; pub { compatible = "sprd,pub"; reg = <0x30020000 0x10000>; }; pin { compatible = "sprd,pin"; reg = <0x402a0000 0x1000>; }; axibm0 { compatible = "sprd,axibm0"; reg = <0 0x30040000 0 0x20000>; interrupts = <0 86 0x0>; }; }; sprd-marlin { compatible = "sprd,marlin"; gpios = <&d_gpio_gpio 48 0 /*marlin gpio0 */ &d_gpio_gpio 49 0 /*marlin gpio1 */ &d_gpio_gpio 50 0 /*marlin gpio2 */ &d_gpio_gpio 0 0 /*marlin gpio3, not used */ &d_gpio_gpio 47 0 /*marlin reset*/ &d_gpio_gpio 217 0>; /*gpio 1.6v*/ clk-name = "clk_aux0"; /*clk 32k*/ sdhci-name = "sdio_wifi"; }; sprd_bm{ compatible = "sprd,sprd_bm"; reg = <0x30040000 0xA0000>, <0x20E00000 0x300000>; interrupts = <0 86 0x0>; sprd,bm_status = <1>; sprd,bm_count = <10 10>; sprd,mm_chn = <0 1>; sprd,gpu_chn = <1 1>; sprd,disp_chn = <2 1>; sprd,cpu_chn = <3 1>; sprd,cp0_dsp_chn = <4 1>; sprd,cp0_arm1_chn = <5 1>; sprd,cp0_arm0_chn = <6 1>; sprd,ap_chn = <7 1>; sprd,zip_chn = <8 1>; sprd,cp2_chn = <9 1>; sprd,ap_cpu_chn = <0 0>; sprd,ap_dap_chn = <0 1>; sprd,ap_dma_w_chn = <1 0>; sprd,ap_dma_r_chn = <1 1>; sprd,ap_sdio_0_chn = <1 2>; sprd,ap_sdio_1_chn = <1 3>; sprd,ap_emmc_chn = <2 0>; sprd,ap_sdio_2_chn = <2 1>; sprd,ap_nfc_chn = <2 2>; sprd,ap_usb_chn = <2 3>; }; wdt@40290000 { compatible = "sprd,sprd-wdt"; reg = <0x40290000 0x1000>, <0x40320000 0x1000>; interrupts = <0 124 0x0>; }; }; &vbc_r2p0 { status = "okay"; }; &sprd_codec { status = "okay"; sprd,audio_power_ver = <4>; }; &i2s0 { status = "okay"; }; &i2s1 { status = "okay"; }; &i2s2 { status = "okay"; }; &i2s3 { status = "okay"; }; &i2s_sound { sprd,i2s = <&i2s0>, <&i2s1>, <&i2s2>, <&i2s3>; }; &sprd_battery { cap-valid-range-poweron = <0>; fgu-mode = <0>; rsense-real = <229>; ocv-tab-size = <21>; ocv-tab-vol = <4172 4122 4081 4039 3989 3968 3939 3912 3872 3838 3818 3803 3792 3783 3776 3767 3750 3728 3697 3689 3400>; ocv-tab-cap = <100 95 90 85 80 75 70 65 60 55 50 45 40 35 30 25 20 15 10 5 0>; };