/*
 * Copyright (C) 2013 Spreadtrum Communication Incorporated
 *		http://www.spreadtrum.com/
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

/ {
	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu@f00 {
			device_type = "cpu";
			compatible = "arm,cortex-a7";
			reg = <0xf00>;
		};

		cpu@f01 {
			device_type = "cpu";
			compatible = "arm,cortex-a7";
			reg = <0xf01>;
		};

		cpu@f02 {
			device_type = "cpu";
			compatible = "arm,cortex-a7";
			reg = <0xf02>;
		};

		cpu@f03 {
			device_type = "cpu";
			compatible = "arm,cortex-a7";
			reg = <0xf03>;
		};
	};

	gpu@60000000 {
		compatible = "arm,mali-400", "arm,mali-utgard";
		reg = <0x60000000 0x10000>;
		interrupts = <0 39 0>, <0 39 0>, <0 39 0>, <0 39 0>, <0 39 0>, <0 39 0>, <0 39 0>;
		interrupt-names = "IRQGP", "IRQGPMMU", "IRQPP0", "IRQPPMMU0", "IRQPP1", "IRQPPMMU1", "IRQPMU";

		pmu_domain_config = <0x1000 0x1000 0x1000 0x0 0x0 0x0 0x0 0x0 0x0 0x1000 0x0 0x0>;
		pmu_switch_delay = <0xffff>;

		clocks = <&clk_gpu_axi>,<&clk_gpu>,<&clk_153m6>,<&clk_208m>,<&clk_256m>,<&clk_312m>,<&clk_384m>,<&clk_460m8>;
		clock-names = "clk_gpu_axi","clk_gpu","clk_153m6","clk_208m","clk_256m","clk_312m","clk_384m","clk_460m8";

		freq-list-len = <4>;
		freq-lists = <153600 2 1>, <256000 4 1>, <384000 6 1>, <460800 7 1>;
		freq-default = <1>;
		freq-9 = <2>;
		freq-8 = <1>;
		freq-7 = <0>;
		freq-5 = <0>;
		freq-range-max = <3>;
		freq-range-min = <0>;
	};
};