/* * Copyright (C) 2013 Spreadtrum Communication Incorporated * http://www.spreadtrum.com/ * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ /dts-v1/; /* memory reserved for SMEM */ /memreserve/ 0x87800000 0x240000; /* 2MK+256K */ /* memory reserved for CPW modem */ /memreserve/ 0x88000000 0x1c00000; /* 28M */ /* memory reserved for fb */ /memreserve/ 0x9f73e000 0x1c2000; /* 2MK */ /* memory reserved for ION */ /memreserve/ 0x9f900000 0x200000; /* 2MK */ /include/ "skeleton.dtsi" /include/ "scx30g-clocks.dtsi" /include/ "sc2723-regulators.dtsi" /include/ "sprd-sound.dtsi" / { model = "Spreadtrum SP7727s board"; compatible = "sprd,scx35"; sprd,sc-id = <8830 1 0x20000>; #address-cells = <1>; #size-cells = <1>; interrupt-parent = <&gic>; chosen { bootargs = "loglevel=0 init=/init root=/dev/ram0 rw"; linux,initrd-start = <0x85500000>; linux,initrd-end = <0x855a3212>; }; aliases { serial0 = &uart0; serial1 = &uart1; serial2 = &uart2; serial3 = &uart3; i2c0 = &i2c0; i2c1 = &i2c1; i2c2 = &i2c2; i2c3 = &i2c3; lcd0 = &fb0; spi0 = &spi0; spi1 = &spi1; spi2 = &spi2; hwspinlock0 = &hwspinlock0; hwspinlock1 = &hwspinlock1; i2c_gpio7 = &i2c_gpio7; }; memory { device_type = "memory"; reg = <0x80000000 0x20000000>; }; gpio_keys { compatible = "gpio-keys"; home { label = "Home Key"; linux,code = <102>; gpio = <&d_gpio_gpio 113 1>; debounce-interval = <2>; gpio-key,wakeup; }; }; rfkill { compatible = "broadcom,rfkill"; gpios = <&d_gpio_gpio 231 0 /* power */ &d_gpio_gpio 233 0>; /* reset */ }; i2c_gpio7: i2c_gpio@2 { compatible = "i2c-gpio"; #address-cells = <1>; #size-cells = <0>; gpios = <&d_gpio_gpio 150 0 /* sda */ &d_gpio_gpio 151 0 >; /* scl */ i2c-gpio,delay-us = <10>; /* ~100 kHz */ i2c-gpio,timeout-ms = <0>; sm5504@14 { compatible = "SiliconMitus,sm5504"; reg = <0x14>; interrupt-parent = <&d_gpio_gpio>; sm5504,irq-gpio = <&d_gpio_gpio 149 0>; }; }; sec-fuelgauge { compatible = "samsung,sec-fuelgauge"; capacity-max = <1000>; capacity-max-margin = <1000>; capacity-min = <10>; fg-irq-attr = <0>; fuel-alert-soc = <1000>; temp_adc_channel = <0>; chg_bat_safety_vol = <4600>; soft_vbat_uvlo = <3050>; vmode = <0>; /* 1=Voltage mode, 0=mixed mode */ alm_soc = <5>; /* SOC alm level %*/ alm_vbat = <3500>; /* Vbat alm level mV*/ rint = <250>; /*battery internal impedance*/ cnom = <1300>; /* nominal capacity in mAh */ rsense_real = <208>; /* sense resistor 0.1mOhm from real environment*/ rsense_spec = <200>; /* sense resistor 0.1mOhm from specification*/ relax_current = <50>; /* current for relaxation in mA (< C/20) */ cal_ajust = <0>; /* ajust calibration data */ ocv_table = <4386 100 4332 95 4277 90 4221 85 4166 80 4113 75 4063 70 4018 65 3977 60 3933 55 3881 50 3850 45 3826 40 3807 35 3791 30 3778 25 3762 20 3742 15 3711 10 3683 5 3400 0>; sprd_fgu: sprd_fgu{ compatible = "sprd,sprd_fgu"; interrupt-parent = <&adi>; interrupts = <4 0x0>; }; }; sec-battery { compatible = "samsung,sec-battery"; battery,vendor = "SDI SDI"; battery,charger_name = "sec-charger"; battery,fuelgauge_name = "sec-fuelgauge"; battery,technology = <2>; /* POWER_SUPPLY_TECHNOLOGY_LION */ battery,chip_vendor = "SPRD"; battery,temp_adc_type = <1>; /* SEC_BATTERY_ADC_TYPE_AP */ battery,polling_time = <10 30 30 30 3600>; battery,adc_check_count = <5>; battery,cable_check_type = <5>; /* SEC_BATTERY_CABLE_CHECK_PSY */ battery,cable_source_type = <3>; /* SEC_BATTERY_CABLE_SOURCE_EXTERNAL */ battery,event_waiting_time = <600>; battery,polling_type = <1>; /* SEC_BATTERY_MONITOR_ALARM */ battery,monitor_initial_count = <3>; battery,battery_check_type = <0>; /* SEC_BATTERY_CHECK_NONE */ battery,check_count = <0>; battery,check_adc_max = <1440>; battery,check_adc_min = <0>; battery,ovp_uvlo_check_type = <3>; /* SEC_BATTERY_OVP_UVLO_CHGPOLLING */ battery,thermal_source = <2>; /* SEC_BATTERY_THERMAL_SOURCE_ADC */ battery,temp_table_adc = <602 702 766 920 1064 1183 1320 1456 1600 1736 1889 1983 2082 2175 2222 2273>; battery,temp_table_data = <650 600 570 500 450 400 350 300 250 200 150 100 50 0 (-30) (-50)>; battery,temp_check_type = <2>; /* SEC_BATTERY_TEMP_CHECK_TEMP */ battery,temp_check_count = <1>; battery,temp_high_threshold_event = <600>; battery,temp_high_recovery_event = <460>; battery,temp_low_threshold_event = <(-50)>; battery,temp_low_recovery_event = <0>; battery,temp_high_threshold_normal = <600>; battery,temp_high_recovery_normal = <460>; battery,temp_low_threshold_normal = <(-50)>; battery,temp_low_recovery_normal = <0>; battery,temp_high_threshold_lpm = <600>; battery,temp_high_recovery_lpm = <460>; battery,temp_low_threshold_lpm = <(-50)>; battery,temp_low_recovery_lpm = <0>; battery,full_check_type = <7>; /* SEC_BATTERY_FULLCHARGED_CHGPSY */ battery,full_check_type_2nd = <3>; /* SEC_BATTERY_FULLCHARGED_TIME */ battery,full_check_count = <1>; battery,chg_gpio_full_check = <0>; battery,chg_polarity_full_check = <1>; battery,full_condition_type = <13>; battery,full_condition_soc = <95>; battery,full_condition_vcell = <4300>; battery,recharge_check_count = <1>; battery,recharge_condition_type = <2>; /* SEC_BATTERY_RECHARGE_CONDITION_VCELL */ battery,recharge_condition_soc = <98>; battery,recharge_condition_vcell = <4150>; battery,charging_total_time = <36000>; battery,recharging_total_time = <5400>; battery,charging_reset_time = <0>; /* Charger */ charger,vbus_ctrl_gpio = <&d_gpio_gpio 64 0x00>; battery,input_current_limit = <700 460 460 700 460 700 700 460 460 700 650 700 700 460 600 300 600 600 300 600 600 460 460>; battery,fast_charging_current = <600 0 460 600 460 600 600 460 0 600 600 600 600 (-1) 600 300 700 600 300 600 600 0 0>; battery,full_check_current_1st = <100 0 100 100 100 100 100 100 0 100 100 100 100 0 100 100 100 100 100 100 100 0 0>; battery,full_check_current_2nd = <1200 0 1200 1200 1200 1200 1200 1200 0 1200 1200 1200 1200 0 1200 1200 1200 1200 1200 1200 1200 0 0>; }; gpu@60000000 { compatible = "arm,mali-400", "arm,mali-utgard"; reg = <0x60000000 0x10000>; interrupts = <0 39 0>, <0 39 0>, <0 39 0>, <0 39 0>, <0 39 0>; interrupt-names = "IRQGP", "IRQGPMMU", "IRQPP0", "IRQPPMMU0", "IRQPMU"; pmu_domain_config = <0x1000 0x1000 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x1000 0x0 0x0>; pmu_switch_delay = <0xffff>; clocks = <&clk_gpu_axi>,<&clk_gpu>,<&clk_153m6>,<&clk_208m>,<&clk_256m>,<&clk_312m>,<&clk_384m>,<&clk_460m8>; clock-names = "clk_gpu_axi","clk_gpu","clk_153m6","clk_208m","clk_256m","clk_312m","clk_384m","clk_460m8"; freq-list-len = <4>; freq-lists = <153600 2 1>, <256000 4 1>, <384000 6 1>, <460800 7 1>; freq-default = <1>; freq-9 = <2>; freq-8 = <1>; freq-7 = <1>; freq-5 = <0>; freq-range-max = <3>; freq-range-min = <0>; }; cpus { #address-cells = <1>; #size-cells = <0>; cpu@f00 { device_type = "cpu"; compatible = "arm,cortex-a7"; reg = <0xf00>; }; cpu@f01 { device_type = "cpu"; compatible = "arm,cortex-a7"; reg = <0xf01>; }; }; gic: interrupt-controller@12001000 { compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic"; #interrupt-cells = <3>; #address-cells = <0>; interrupt-controller; reg = <0x12001000 0x1000>, <0x12002000 0x1000>; }; uart0: uart@70000000 { compatible = "sprd,serial"; interrupts = <0 2 0x0>; reg = <0x70000000 0x1000>; clock-names = "clk_uart0"; clocks = <&clock 60>; sprdclk = <48000000>; sprdwaketype = "BT_RTS_HIGH_WHEN_SLEEP"; }; uart1: uart@70100000 { compatible = "sprd,serial"; interrupts = <0 3 0x0>; reg = <0x70100000 0x1000>; clock-names = "clk_uart1"; clocks = <&clock 61>; sprdclk = <26000000>; sprdwaketype = "BT_RTS_HIGH_WHEN_SLEEP"; }; uart2: uart@70200000 { compatible = "sprd,serial"; interrupts = <0 4 0x0>; reg = <0x70200000 0x1000>; clock-names = "clk_uart2"; clocks = <&clock 62>; sprdclk = <26000000>; sprdwaketype = "BT_RTS_HIGH_WHEN_SLEEP"; }; uart3: uart@70300000 { compatible = "sprd,serial"; interrupts = <0 5 0x0>; reg = <0x70300000 0x1000>; clock-names = "clk_uart3"; clocks = <&clock 63>; sprdclk = <26000000>; sprdwaketype = "BT_RTS_HIGH_WHEN_SLEEP"; }; timer { compatible = "sprd,scx35-timer"; reg = <0x40230000 0x1000>, /* SYSCNT */ <0x40050000 0x1000>, /* GPTIMER0 */ <0x40220000 0x1000>, /* APTIMER0 */ <0x40330000 0x1000>, /* APTIMER1 */ <0x40340000 0x1000>; /* APTIMER2 */ interrupts = <0 118 0x0>, <0 28 0x0>, <0 29 0x0>, <0 119 0x0>, <0 121 0x0>; }; clock: clockdevice { compatible = "sprd,scx35-clock"; #clock-cells = <1>; }; d_eic_gpio: gpio@40210000 { compatible = "sprd,d-eic-gpio"; reg = <0X40210000 0x1000>; gpio-controller; interrupt-controller; #interrupt-cells = <2>; #gpio-cells = <2>; gpiobase = <288>; ngpios = <16>; interrupts = <0 37 0x0>; }; d_gpio_gpio: gpio@40280000 { compatible = "sprd,d-gpio-gpio"; reg = <0X40280000 0x1000>; gpio-controller; interrupt-controller; #interrupt-cells = <2>; #gpio-cells = <2>; gpiobase = <0>; ngpios = <256>; interrupts = <0 35 0x0>; }; pinctrl{ compatible = "sprd,pinctrl"; reg = <0x402a0000 0x1000>; pwr_domain ="vdd18", /* "vdd28" */ /* VIO_2_0_ms */ "vdd18", /* "vdd28" */ /* VIO_2_1_ms */ "vddsim0", "vddsim1", "vdd18", /* "vddsim2" */ "vddsdcore", "vdd18"; ctrl_desc = <0x10 0 1 0x10 1 1 0x10 2 1 0x10 3 1 0x10 4 1 0x10 5 1 0x10 6 1>; }; adic: adic { compatible = "sprd,adi"; reg = <0X40030000 0x10000>; }; adi: adi_bus { compatible = "sprd,adi-bus"; interrupts = <0 38 0x0>; reg = <0x40038000 0x1000>; interrupt-controller; sprd,irqnums = <11>; #interrupt-cells = <2>; #address-cells = <1>; #size-cells = <1>; ranges = <0X40 0x40038040 0x40>, <0x80 0x40038080 0x80>, <0x100 0x40038100 0x80>, <0x480 0x40038480 0x80>; sprd_backlight { compatible = "sprd,sprd_backlight"; max_brightness = <255>; dft_brightness = <160>; ctrl_pin = <234>; }; headset_detect { compatible = "sprd,headset-detect"; gpio_switch = <0>; gpio_detect = <237>; gpio_button = <239>; irq_trigger_level_detect = <0>; irq_trigger_level_button = <0>; adc_threshold_3pole_detect = <1700>; adc_threshold_4pole_detect = <2700>; irq_threshold_buttont = <1>; voltage_headmicbias = <3000000>; nbuttons = <3>; headset_buttons_media { adc_min = <0>; adc_max = <190>; code = <226>; type = <0>; }; headset_buttons_up { adc_min = <191>; adc_max = <347>; code = <115>; type = <0>; }; headset_buttons_down { adc_min = <348>; adc_max =<760>; code = <114>; type = <0>; }; }; headset_sprd_sc2723 { compatible = "sprd,headset_sprd_sc2723"; gpio_switch = <0>; gpio_detect = <237>; gpio_button = <239>; irq_trigger_level_detect = <0>; irq_trigger_level_button = <0>; adc_threshold_3pole_detect = <1070>; adc_threshold_4pole_detect = <3100>; irq_threshold_buttont = <1>; voltage_headmicbias = <3000000>; nbuttons = <3>; headset_buttons_media { adc_min = <0>; adc_max = <180>; code = <226>; type = <0>; }; headset_buttons_up { adc_min = <181>; adc_max = <365>; code = <115>; type = <0>; }; headset_buttons_down { adc_min = <366>; adc_max =<3100>; code = <114>; type = <0>; }; }; keyboard_backlight { compatible = "sprd,keyboard-backlight"; }; watchdog@40{ compatible = "sprd,watchdog"; reg = <0X40 0x40>; interrupts = <3 0x0>; }; rtc@80{ compatible = "sprd,rtc"; reg = <0X80 0x80>; interrupts = <2 0x0>; }; a_eic_gpio: gpio@100 { compatible = "sprd,a-eic-gpio"; reg = <0X100 0x80>; /* adi reg */ gpio-controller; interrupt-controller; #interrupt-cells = <2>; #gpio-cells = <2>; gpiobase = <304>; ngpios = <16>; interrupt-parent = <&adi>; interrupts = <5 0x0>; /* ext irq 5 */ }; a_gpio_gpio: gpio@480 { compatible = "sprd,a-gpio-gpio"; reg = <0X480 0x80>; /* adi reg */ gpio-controller; interrupt-controller; #interrupt-cells = <2>; #gpio-cells = <2>; gpiobase = <256>; ngpios = <32>; interrupt-parent = <&adi>; interrupts = <1 0x0>; /* ext irq 1 */ }; }; keypad0: keypad@40250000 { compatible = "sprd,sci-keypad"; reg = <0X40250000 0x1000>; gpios = <&a_eic_gpio 2 0>; interrupts = <0 36 0x0>; sprd,keypad-num-rows = <2>; sprd,keypad-num-columns = <2>; sprd,keypad-rows-choose-hw = <0x30000>; sprd,keypad-cols-choose-hw = <0x300>; sprd,debounce_time = <5000>; linux,keypad-no-autorepeat; sprd,support_long_key; key_volume_down { keypad,row = <1>; keypad,column = <0>; linux,code = <114>; }; key_volume_up { keypad,row = <0>; keypad,column = <0>; linux,code = <115>; }; key_home { keypad,row = <0>; keypad,column = <1>; linux,code = <102>; }; }; sprd_vsp@60900000 { compatible = "sprd,sprd_vsp"; reg = <0X60900000 0xc000>; interrupts = <0 43 0x0>; clock-names = "clk_mm_i","clk_vsp", "clk_parent_0", "clk_parent_1", "clk_parent_2", "clk_parent_3"; clocks = <&clk_mm>, <&clk_vsp>, <&clk_256m>, <&clk_192m>, <&clk_128m>, <&clk_76m8>; clock-parent-info = <2 4>; version = <2>; }; sprd_jpg { compatible = "sprd,sprd_jpg"; reg = <0X60b00000 0x8000>; interrupts = <0 42 0x0>; clock-names = "clk_mm_i","clk_jpg"; clocks = <&clk_mm>, <&clk_jpg>; }; i2c0: i2c@70500000 { compatible = "sprd,i2c"; interrupts = <0 11 0x0>; reg = <0x70500000 0x1000>; #address-cells = <1>; #size-cells = <0>; sensor_main@0x3c { compatible = "sprd,sensor_main"; reg = <0x3c>; }; sensor_sub@0x21 { compatible = "sprd,sensor_sub"; reg = <0x21>; }; }; i2c1: i2c@70600000 { compatible = "sprd,i2c"; interrupts = <0 12 0x0>; reg = <0x70600000 0x1000>; #address-cells = <1>; #size-cells = <0>; focaltech_ts@38{ compatible = "focaltech,focaltech_ts"; reg = <0x38>; gpios = <&d_gpio_gpio 81 0 &d_gpio_gpio 82 0>; vdd_name = "vdd28"; virtualkeys = <100 1020 80 65 280 1020 80 65 470 1020 80 65>; TP_MAX_X = <720>; TP_MAX_Y = <1280>; }; ist30xx_ts@50 { compatible = "Imagis,IST30XXB"; reg = <0x50>; gpios = <&d_gpio_gpio 82 0>; }; }; i2c2: i2c@70700000 { compatible = "sprd,i2c"; interrupts = <0 13 0x0>; reg = <0x70700000 0x1000>; #address-cells = <1>; #size-cells = <0>; lis3dh_acc@18{ compatible = "ST,lis3dh_acc"; reg = <0x18>; poll_interval = <10>; min_interval = <10>; g_range = <0>; axis_map_x = <1>; axis_map_y = <0>; axis_map_z = <2>; negate_x = <0>; negate_y = <1>; negate_z = <0>; }; ltr_558als@23{ compatible = "LITEON,ltr_558als"; reg = <0x23>; gpios = <&d_gpio_gpio 216 0>; }; }; i2c3: i2c@70800000 { compatible = "sprd,i2c"; interrupts = <0 14 0x0>; reg = <0x70800000 0x1000>; #address-cells = <1>; #size-cells = <0>; sm5414-i2c@49 { compatible = "samsung,sec-charger"; reg = <0x49>; chgirq-gpio = <&d_gpio_gpio 153 0>; chgen-gpio = <&d_gpio_gpio 215 0>; chg-float-voltage = <4200>; chg-irq-attr = <0x00000002>; }; }; sprd_dcam { compatible = "sprd,sprd_dcam"; interrupts = <0 45 0>; reg = <0x60800000 0x100000>; clock-names = "clk_mm_i","clk_dcam"; clocks = <&clk_mm>, <&clk_dcam>; }; sprd_scale { compatible = "sprd,sprd_scale"; }; sprd_rotation { compatible = "sprd,sprd_rotation"; }; sprd_sensor { compatible = "sprd,sprd_sensor"; gpios = <&d_gpio_gpio 186 0 /*main reset*/ &d_gpio_gpio 188 0 /*main power down*/ &d_gpio_gpio 186 0 /*sub reset*/ &d_gpio_gpio 187 0 /*sub power down*/ &d_gpio_gpio 0 0 /*main core voltage*/ &d_gpio_gpio 0 0 &d_gpio_gpio 0 0 &d_gpio_gpio 0 0>; clock-names ="clk_mm_i","clk_sensor","clk_ccir","clk_dcam","clk_dcam_mipi"; clocks = <&clk_mm>, <&clk_sensor>,<&clk_ccir>, <&clk_dcam>, <&clk_dcam_mipi>; }; sprd_isp { compatible = "sprd,sprd_isp"; clock-names = "clk_mm_i","clk_isp"; clocks = <&clk_mm>, <&clk_isp>; }; sprd_dma_copy { compatible = "sprd,sprd_dma_copy"; }; fb0: fb@20800000 { compatible = "sprd,sprdfb"; reg = <0x20800000 0x1000>,<0x21800000 0x1000>; interrupts = <0 46 0x0>,<0 48 0x0>, <0 49 0x0>; clock-names = "dispc_clk_parent", "dispc_dbi_clk_parent", "dispc_dpi_clk_parent", "dispc_emc_clk_parent", "dispc_clk", "dispc_dbi_clk", "dispc_dpi_clk", "dispc_emc_clk", "fb_spi_clock", "fb_spi_clock_parent"; clocks = <&clk_256m>, <&clk_256m>, <&clk_384m>, <&clk_aon_apb>, <&clk_dispc0>, <&clk_dispc0_dbi>, <&clk_dispc0_dpi>, <&clk_disp_emc>, <&clk_spi2>, <&ext_26m>; clock-src = <256000000 256000000 384000000>; dpi_clk_div = <7>; sprd,fb_use_reservemem; sprd,fb_mem = <0x9f73e000 0x1c2000>; sprd,fb_display_size = <480 854>; }; gsp:gsp@20a00000 { compatible = "sprd,gsp"; reg = <0x20a00000 0x1000>; interrupts = <0 51 0x0>; clock-names = "clk_gsp", "clk_gsp_emc", "clk_gsp_parent", "clk_aon_apb"; clocks = <&clk_gsp>, <&clk_gsp_emc>, <&clk_256m>, <&clk_aon_apb>; gsp_mmu_ctrl_base = <0x20b08000>; }; /* sipc initializer */ sipc: sipc-common { compatible = "sprd,sipc"; reg = <0x87800000 0x240000>; /* */ //#interrupt-cells = <2>; #address-cells = <1>; #size-cells = <1>; ranges = <0x8000000 0x88000000 0x1c00000>, <0x07800000 0x87800000 0x180000>, <0x9bff000 0x89bff000 0x1000>; sipc_cpw { sprd,name = "sipc-w"; sprd,dst = <2>; sprd,ap2cp = <0x402c0000>; /* base on ipi reggister */ sprd,cp2ap = <0x402c0004>; sprd,trig = <0x01>; /* trigger bit */ sprd,clr = <0x01>; /* clear bit */ interrupts = <0 68 0x0>; reg = <0x8000000 0x1c00000> , /* */ <0x07800000 0x180000>, /* */ <0x9bff000 0x1000>; /* smsg ring buffer */ }; }; /* cpw virtual devices */ spipe-cpw { compatible = "sprd,spipe"; sprd,name = "spipe_w"; sprd,dst = <2>; sprd,channel = <4>; sprd,ringnr = <9>; sprd,size-rxbuf = <0x1000>; /* 4*1024 */ sprd,size-txbuf = <0x1000>; /* 4*1024 */ }; slog-cpw { compatible = "sprd,spipe"; sprd,name = "slog_w"; sprd,dst = <2>; sprd,channel = <5>; sprd,ringnr = <1>; sprd,size-rxbuf = <0x40000>; /* 256*1024*/ sprd,size-txbuf = <0x8000>; /* 32*1024 */ }; stty-cpw { compatible = "sprd,spipe"; sprd,name = "stty_w"; sprd,dst = <2>; sprd,channel = <6>; sprd,ringnr = <32>; sprd,size-rxbuf = <0x0800>; /* 2*1024*/ sprd,size-txbuf = <0x0800>; /* 2*1024 */ }; seth0-cpw { compatible = "sprd,seth"; sprd,name = "seth_w0"; sprd,dst = <2>; sprd,channel = <7>; sprd,blknum = <128>; }; seth1-cpw { compatible = "sprd,seth"; sprd,name = "seth_w1"; sprd,dst = <2>; sprd,channel = <8>; sprd,blknum = <64>; }; seth2-cpw { compatible = "sprd,seth"; sprd,name = "seth_w2"; sprd,dst = <2>; sprd,channel = <9>; sprd,blknum = <64>; }; scproc_cpw: scproc { compatible = "sprd,scproc"; sprd,name = "cpw"; sprd,ctrl-reg = <0x44 0x44 0xb0 0xbc>; /* */ sprd,ctrl-mask = <0x02000000 0x10000000 0x01 0xf0000>; /* masks <> */ sprd,iram-data = <0xe59f0000 0xe12fff10 0x88300000>; /* 3rd param equals modem_addr*/ reg = <0x88000000 0x1c00000>, /* = <+128M 26M> */ <0x50000000 0x0c>, /* */ <0x402b0000 0x10000>, <0x402b0000 0x10000>, <0x402b0000 0x10000>, <0x402b0000 0x10000>; /* */ interrupts = <0 84 0x0>; /* cp1_wdg_int */ #address-cells = <1>; #size-cells = <1>; /* segnr=2 */ ranges = <0x300000 0x88300000 0x00800000>, <0x20000 0x88020000 0x00220000>; modem { cproc,name = "modem"; reg = <0x300000 0x00800000>; /* */ }; dsp { cproc,name = "dsp"; reg = <0x20000 0x00220000>; /* */ }; }; saudio_w { compatible = "sprd,saudio"; sprd,saudio-dst-id = <2>; sprd,ctrl_channel = <10>; /* SMSG_CH_VBC */ sprd,playback_channel = <11>; /* SMSG_CH_PLAYBACK */ sprd,capture_channel = <12>; /* SMSG_CH_CAPTURE */ sprd,monitor_channel = <13>; /*SMSG_CH_MONITOR_AUDIO */ sprd,saudio-names = "VIRTUAL AUDIO W"; }; saudio_voip { compatible = "sprd,saudio"; sprd,saudio-dst-id = <2>; sprd,ctrl_channel = <14>; /* SMSG_CH_CTRL_VOIP */ sprd,playback_channel = <15>; /* SMSG_CH_PLAYBACK_VOIP */ sprd,capture_channel = <16>; /* SMSG_CH_CAPTURE_VOIP */ sprd,monitor_channel = <17>; /*SMSG_CH_MONITOR_VOIP */ sprd,saudio-names = "saudiovoip"; }; sdhci3: sdhci@20600000 { compatible = "sprd,sdhci-shark"; interrupts = <0 60 0x0>; reg = <0x20600000 0x1000>; id = <3>; bus-width = <8>; max-frequency = <384000000>; keep-power-in-suspend = <1>; non-removable = <1>; caps = <0x80000800>; caps2 = <0x202>; host-caps-mask = <0x03000000>; vdd-vmmc = "vddemmccore"; vdd-vqmmc = "vddgen1"; emmc-signal-supply = <&vddemmccore>; vdd-level = <1200000 1300000 1500000 1800000>; clock-names = "clk_emmc"; clocks = <&clk_emmc>, <&clk_384m>; enb-bit = <0x800>; rst-bit = <0x4000>; write-delay = <0x08>; read-pos-delay = <0x04>; read-neg-delay = <0x04>; keep-power = <0>; runtime = <1>; }; sdhci0: sdhci@20300000 { compatible = "sprd,sdhci-shark"; interrupts = <0 57 0x0>; reg = <0x20300000 0x1000>; id = <0>; bus-width = <4>; max-frequency = <384000000>; keep-power-in-suspend = <1>; caps = <0x80000000>; caps2 = <0x202>; host-caps-mask = <0x05000000>; vdd-vmmc = "vddsdcore"; vdd-vqmmc = "vddsdcore"; sd-supply = <&vddsdio>; vdd-level = <0 0 1800000 3000000>; pinmap-offset = <0x0184>; d3-gpio = <100>; d3-index = <0>; sd-func = <0>; gpio-func = <3>; cd-gpios = <71>; clock-names = "clk_sdio0"; clocks = <&clk_sdio0>, <&clk_384m>; enb-bit = <0x100>; rst-bit = <0x800>; keep-power = <0>; runtime = <1>; }; sdhci1: sdhci@20400000 { compatible = "sprd,sdhci-shark"; interrupts = <0 58 0x0>; reg = <0x20400000 0x1000>; id = <1>; bus-width = <4>; max-frequency = <96000000>; keep-power-in-suspend = <1>; cap-power-off-card = <1>; caps = <0x80000000>; clock-names = "clk_sdio1"; clocks = <&clk_sdio1>, <&clk_96m>; enb-bit = <0x200>; rst-bit = <0x1000>; keep-power = <0>; runtime = <1>; }; usb: usb@20200000 { compatible = "sprd,usb"; interrupts = <0 55 0x0>; ngpios = <2>; gpios = <&a_eic_gpio 0 0>,<&d_gpio_gpio 72 0>; reg = <0x20200000 0x1000>; tune_value = <0x44073e37>; usb-supply = <&vddusb>; #address-cells = <1>; #size-cells = <0>; }; sprd_thermal { compatible = "sprd,sprd-thermal"; id = <0>; interrupts = <0 26 0x0>; reg = <0x402f0000 0x1000>; trip_points_active = <80 88 100>; trip_points_lowoff = <72 72 81>; trip_points_critical = <110>; trip_num = <4>; }; sprd_thermal1 { compatible = "sprd,sprd-thermal"; id = <1>; interrupt-parent = <&adi>; interrupts = <9 0x0>; reg = <0x40038280 0x1000>; trip_points_active = <90>; trip_points_lowoff = <81>; /*no use, jut for compatiable*/ trip_points_critical = <114>; trip_num = <2>; }; spi0: spi@70a00000 { compatible = "sprd,sprd-spi"; interrupts = <0 7 0x0>; reg = <0x70a00000 0x1000>; clock-names = "clk_spi0"; #address-cells = <1>; #size-cells = <0>; }; spi1: spi@70b00000 { compatible = "sprd,sprd-spi"; interrupts = <0 8 0x0>; reg = <0x70b00000 0x1000>; clock-names = "clk_spi1"; #address-cells = <1>; #size-cells = <0>; }; spi2: spi@70c00000 { compatible = "sprd,sprd-spi"; interrupts = <0 9 0x0>; reg = <0x70c00000 0x1000>; clock-names = "clk_spi2"; #address-cells = <1>; #size-cells = <0>; }; dmac: dmac@20100000 { compatible = "sprd,sprd-dma"; interrupts = <0 50 0x0>; reg = <0x20100000 0x4000>; }; adc: adc@40038300 { compatible = "sprd,sprd-adc"; reg = <0x40038300 0x400>; }; hwspinlock0: hwspinlock0@20c00000 { compatible = "sprd,sprd-hwspinlock"; reg = <0x20c00000 0x1000>; }; hwspinlock1: hwspinlock1@40060000 { compatible = "sprd,sprd-hwspinlock"; reg = <0x40060000 0x1000>; }; l_ion: ion { compatible = "sprd,ion-sprd"; #address-cells = <1>; #size-cells = <0>; sprd,ion-heap@1 { reg = <1>; /* SYSTEM */ reg-names = "ion_heap_system"; sprd,ion-heap-type = <0>; /* SYSTEM */ sprd,ion-heap-mem = <0x0 0x0>; }; sprd,ion-heap@2 { reg = <2>; /* MM */ reg-names = "ion_heap_carveout_mm"; sprd,ion-heap-type = <0>; /* carveout mm */ sprd,ion-heap-mem = <0x0 0x0>; }; sprd,ion-heap@3 { reg = <3>; /* OVERLAY */ reg-names = "ion_heap_carveout_overlay"; sprd,ion-heap-type = <2>; /* CARVEOUT */ sprd,ion-heap-mem = <0x9f900000 0x200000>; }; }; sprd_iommu0:sprd_iommu@21400000 { compatible = "sprd,sprd_iommu";//gsp func-name = "sprd_iommu_gsp"; reg = <0x10000000 0x2000000>, //iova <0x21400000 0x8000>, //pgt <0x21408000 0x8000>; //ctrl_reg reg_name = "iova","pgt","ctrl_reg"; clock-names = "clk_gsp_emc","clk_153m6","clk_gsp"; clocks = <&clk_gsp_emc>, <&clk_153m6>,<&clk_gsp>; status = "ok"; }; sprd_iommu1:sprd_iommu@60f00000 { compatible = "sprd,sprd_iommu";//mm func-name = "sprd_iommu_mm"; reg = <0x20000000 0x8000000>, //iova <0x60f00000 0x20000>, //pgt <0x60f20000 0x2000>; //ctrl_reg reg_name = "iova","pgt","ctrl_reg"; clock-names = "clk_mmu","clk_mm_i"; clocks = <&clk_mmu>,<&clk_mm>; status = "ok"; }; sprd-io-base { #address-cells = <1>; #size-cells = <1>; ranges = <0 0 0x80000000>; ahb { compatible = "sprd,ahb"; reg = <0x20d00000 0x10000>; }; aonapb { compatible = "sprd,aonapb"; reg = <0x402e0000 0x10000>; }; apbreg { compatible = "sprd,apbreg"; reg = <0x71300000 0x10000>; }; pmu { compatible = "sprd,pmu"; reg = <0x402b0000 0x10000>; }; mmahb { compatible = "sprd,mmahb"; reg = <0x60d00000 0x4000>; }; mmckg { compatible = "sprd,mmckg"; reg = <0x60e00000 0x1000>; }; adislave { compatible = "sprd,adislave"; reg = <0x40038000 0x1000>; }; gpuapb { compatible = "sprd,gpuapb"; reg = <0x60100000 0x1000>; }; aonckg { compatible = "sprd,aonckg"; reg = <0x402d0000 0x1000>; }; apbckg { compatible = "sprd,apbckg"; reg = <0x71200000 0x10000>; }; gpuckg { compatible = "sprd,gpuckg"; reg = <0x60200000 0x1000>; }; core { compatible = "sprd,core"; reg = <0x12000000 0x10000>; }; int { compatible = "sprd,int"; reg = <0x40200000 0x1000>; }; intc0 { compatible = "sprd,intc0"; reg = <0x71400000 0x1000>; }; intc1 { compatible = "sprd,intc1"; reg = <0x71500000 0x1000>; }; intc2 { compatible = "sprd,intc2"; reg = <0x71600000 0x1000>; }; intc3 { compatible = "sprd,intc3"; reg = <0x71700000 0x1000>; }; uidefuse { compatible = "sprd,uidefuse"; reg = <0x40240000 0x1000>; }; isp { compatible = "sprd,isp"; reg = <0x60a00000 0x8000>; }; csi2 { compatible = "sprd,csi2"; reg = <0x60c00000 0x1000>; }; ipi { compatible = "sprd,ipi"; reg = <0x402c0000 0x1000>; }; dcam { compatible = "sprd,dcam"; reg = <0x60800000 0x10000>; }; syscnt { compatible = "sprd,syscnt"; reg = <0x40230000 0x1000>; }; dma0 { compatible = "sprd,dma0"; reg = <0x20100000 0x4000>; }; pub { compatible = "sprd,pub"; reg = <0x30020000 0x10000>; }; pin { compatible = "sprd,pin"; reg = <0x402a0000 0x1000>; }; axibm0 { compatible = "sprd,axibm0"; reg = <0 0x30040000 0 0x20000>; interrupts = <0 86 0x0>; }; }; wdt@40290000 { compatible = "sprd,sprd-wdt"; reg = <0x40290000 0x1000>, <0x40320000 0x1000>; interrupts = <0 124 0x0>; }; }; &vbc_r2p0 { status = "okay"; }; &sprd_codec { status = "okay"; sprd,audio_power_ver = <4>; }; &i2s0 { status = "okay"; }; &i2s1 { status = "okay"; }; &i2s2 { status = "okay"; }; &i2s3 { status = "okay"; }; &i2s_sound { sprd,i2s = <&i2s0>, <&i2s1>, <&i2s2>, <&i2s3>; };