From 8e4bff4cab0ddac6060645b0715210484d02ff40 Mon Sep 17 00:00:00 2001 From: Yuval Adam <_@yuv.al> Date: Wed, 30 Aug 2017 08:25:59 +0000 Subject: Initial file dump from open source release --- arch/mips/vr41xx/casio-e55/Makefile | 5 +++++ arch/mips/vr41xx/casio-e55/setup.c | 40 +++++++++++++++++++++++++++++++++++++ 2 files changed, 45 insertions(+) create mode 100644 arch/mips/vr41xx/casio-e55/Makefile create mode 100644 arch/mips/vr41xx/casio-e55/setup.c (limited to 'arch/mips/vr41xx/casio-e55') diff --git a/arch/mips/vr41xx/casio-e55/Makefile b/arch/mips/vr41xx/casio-e55/Makefile new file mode 100644 index 00000000..d4c03cc8 --- /dev/null +++ b/arch/mips/vr41xx/casio-e55/Makefile @@ -0,0 +1,5 @@ +# +# Makefile for the CASIO CASSIOPEIA E-55/65 specific parts of the kernel +# + +obj-y += setup.o diff --git a/arch/mips/vr41xx/casio-e55/setup.c b/arch/mips/vr41xx/casio-e55/setup.c new file mode 100644 index 00000000..719f4a5b --- /dev/null +++ b/arch/mips/vr41xx/casio-e55/setup.c @@ -0,0 +1,40 @@ +/* + * setup.c, Setup for the CASIO CASSIOPEIA E-11/15/55/65. + * + * Copyright (C) 2002-2006 Yoichi Yuasa + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#include +#include + +#include + +#define E55_ISA_IO_BASE 0x1400c000 +#define E55_ISA_IO_SIZE 0x03ff4000 +#define E55_ISA_IO_START 0 +#define E55_ISA_IO_END (E55_ISA_IO_SIZE - 1) +#define E55_IO_PORT_BASE KSEG1ADDR(E55_ISA_IO_BASE) + +static int __init casio_e55_setup(void) +{ + set_io_port_base(E55_IO_PORT_BASE); + ioport_resource.start = E55_ISA_IO_START; + ioport_resource.end = E55_ISA_IO_END; + + return 0; +} + +arch_initcall(casio_e55_setup); -- cgit v1.3.1