From 4085ae3ddfbbf10c8ccbd3dccd43452c40a1fe40 Mon Sep 17 00:00:00 2001 From: Yuval Adam Date: Fri, 13 Mar 2015 12:24:52 +0200 Subject: Add bootloader, nfclib and sensorlib --- boot_loader/bl_link.icf | 83 +++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 83 insertions(+) create mode 100644 boot_loader/bl_link.icf (limited to 'boot_loader/bl_link.icf') diff --git a/boot_loader/bl_link.icf b/boot_loader/bl_link.icf new file mode 100644 index 0000000..3e7af89 --- /dev/null +++ b/boot_loader/bl_link.icf @@ -0,0 +1,83 @@ +//***************************************************************************** +// +// bl_link.icf - Linker script for EW-ARM. +// +// Copyright (c) 2007-2014 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 2.1.0.12573 of the Tiva Firmware Development Package. +// +//***************************************************************************** + +// +// Define a memory region that covers the entire 4 GB addressible space of the +// processor. +// +define memory mem with size = 4G; + +// +// Define a region for the on-chip flash. +// +define region FLASH = mem:[from 0x00000000 to 0x0000ffff]; + +// +// Define a region for the on-chip SRAM. +// +define region SRAM = mem:[from 0x20000000 to 0x2000ffff]; + +// +// Indicate that the sections containing the boot loader code should be +// initialized by copying. +// +initialize manually with packing = none { section INTVEC }; +initialize manually with packing = none { section CODE }; +initialize manually with packing = none { section .text }; +initialize manually with packing = none { section .rodata }; +initialize manually with packing = none { section .data }; + +keep { section INTVEC }; +keep { section INTVEC_init }; + +// +// Indicate that the noinit values should be left alone. This includes the +// stack, which if initialized will destroy the return address from the +// initialization code, causing the processor to branch to zero and fault. +// +do not initialize { section .noinit }; + +// +// Place the interrupt vectors at the start of flash/SRAM. +// +place at start of FLASH { readonly section INTVEC_init }; +place at start of SRAM { readwrite section INTVEC }; + +// +// Place the remainder of the read-only items into flash/SRAM. +// +place in FLASH { readonly section CODE_init }; +place in SRAM { readwrite section CODE }; +place in FLASH { readonly section .text_init }; +place in SRAM { readwrite section .text }; +place in FLASH { readonly section .rodata_init }; +place in SRAM { readwrite section .rodata }; +place in FLASH { readonly section .data_init }; +place in SRAM { readwrite section .data }; +place in FLASH { readonly }; + +// +// Place all read/write items into SRAM. +// +place in SRAM { readwrite }; -- cgit v1.3.1