From c3e4c9a25c2910d2d66d52215b3406b13d5b23d5 Mon Sep 17 00:00:00 2001 From: Yuval Adam Date: Sun, 29 Jun 2014 12:34:32 +0300 Subject: Add more board models --- boards/dk-tm4c129x/enet_lwip/Makefile | 106 + boards/dk-tm4c129x/enet_lwip/ccs/.ccsimportspec | 26 + boards/dk-tm4c129x/enet_lwip/ccs/.ccsproject | 10 + boards/dk-tm4c129x/enet_lwip/ccs/.cproject | 203 + boards/dk-tm4c129x/enet_lwip/ccs/.project | 100 + .../ccs/.settings/org.eclipse.cdt.codan.core.prefs | 3 + .../dk-tm4c129x/enet_lwip/ccs/Debug/enet_lwip.bin | Bin 0 -> 189576 bytes .../dk-tm4c129x/enet_lwip/ccs/Debug/enet_lwip.out | Bin 0 -> 982762 bytes .../dk-tm4c129x/enet_lwip/ccs/macros.ini_initial | 1 + .../dk-tm4c129x/enet_lwip/ccs/target_config.ccxml | 13 + boards/dk-tm4c129x/enet_lwip/enet_fs.c | 338 + boards/dk-tm4c129x/enet_lwip/enet_fs.h | 36 + boards/dk-tm4c129x/enet_lwip/enet_fsdata.h | 16229 +++++++++++++++++++ boards/dk-tm4c129x/enet_lwip/enet_lwip.c | 455 + boards/dk-tm4c129x/enet_lwip/enet_lwip.ewd | 614 + boards/dk-tm4c129x/enet_lwip/enet_lwip.ewp | 831 + boards/dk-tm4c129x/enet_lwip/enet_lwip.icf | 78 + boards/dk-tm4c129x/enet_lwip/enet_lwip.ld | 57 + boards/dk-tm4c129x/enet_lwip/enet_lwip.sct | 47 + boards/dk-tm4c129x/enet_lwip/enet_lwip.uvopt | 443 + boards/dk-tm4c129x/enet_lwip/enet_lwip.uvproj | 479 + boards/dk-tm4c129x/enet_lwip/enet_lwip_ccs.cmd | 70 + .../dk-tm4c129x/enet_lwip/ewarm/Exe/enet_lwip.bin | Bin 0 -> 184872 bytes .../dk-tm4c129x/enet_lwip/ewarm/Exe/enet_lwip.out | Bin 0 -> 857612 bytes boards/dk-tm4c129x/enet_lwip/fs/404.htm | 9 + boards/dk-tm4c129x/enet_lwip/fs/about.htm | 32 + boards/dk-tm4c129x/enet_lwip/fs/block.htm | 17 + boards/dk-tm4c129x/enet_lwip/fs/block.jpg | Bin 0 -> 90569 bytes boards/dk-tm4c129x/enet_lwip/fs/dk-tm4c129x.jpg | Bin 0 -> 16832 bytes boards/dk-tm4c129x/enet_lwip/fs/favicon.ico | Bin 0 -> 1718 bytes boards/dk-tm4c129x/enet_lwip/fs/index.htm | 54 + boards/dk-tm4c129x/enet_lwip/fs/javascript.js | 53 + boards/dk-tm4c129x/enet_lwip/fs/overview.htm | 29 + boards/dk-tm4c129x/enet_lwip/fs/styles.css | 104 + boards/dk-tm4c129x/enet_lwip/fs/ti.jpg | Bin 0 -> 7156 bytes boards/dk-tm4c129x/enet_lwip/fs/tm4c.jpg | Bin 0 -> 3369 bytes boards/dk-tm4c129x/enet_lwip/gcc/enet_lwip.axf | Bin 0 -> 255946 bytes boards/dk-tm4c129x/enet_lwip/gcc/enet_lwip.bin | Bin 0 -> 190739 bytes boards/dk-tm4c129x/enet_lwip/lwipopts.h | 439 + boards/dk-tm4c129x/enet_lwip/readme.txt | 41 + boards/dk-tm4c129x/enet_lwip/rvmdk/enet_lwip.axf | Bin 0 -> 651124 bytes boards/dk-tm4c129x/enet_lwip/rvmdk/enet_lwip.bin | Bin 0 -> 186256 bytes boards/dk-tm4c129x/enet_lwip/startup_ccs.c | 276 + boards/dk-tm4c129x/enet_lwip/startup_ewarm.c | 307 + boards/dk-tm4c129x/enet_lwip/startup_gcc.c | 323 + boards/dk-tm4c129x/enet_lwip/startup_rvmdk.S | 332 + 46 files changed, 22155 insertions(+) create mode 100644 boards/dk-tm4c129x/enet_lwip/Makefile create mode 100644 boards/dk-tm4c129x/enet_lwip/ccs/.ccsimportspec create mode 100644 boards/dk-tm4c129x/enet_lwip/ccs/.ccsproject create mode 100644 boards/dk-tm4c129x/enet_lwip/ccs/.cproject create mode 100644 boards/dk-tm4c129x/enet_lwip/ccs/.project create mode 100644 boards/dk-tm4c129x/enet_lwip/ccs/.settings/org.eclipse.cdt.codan.core.prefs create mode 100644 boards/dk-tm4c129x/enet_lwip/ccs/Debug/enet_lwip.bin create mode 100644 boards/dk-tm4c129x/enet_lwip/ccs/Debug/enet_lwip.out create mode 100644 boards/dk-tm4c129x/enet_lwip/ccs/macros.ini_initial create mode 100644 boards/dk-tm4c129x/enet_lwip/ccs/target_config.ccxml create mode 100644 boards/dk-tm4c129x/enet_lwip/enet_fs.c create mode 100644 boards/dk-tm4c129x/enet_lwip/enet_fs.h create mode 100644 boards/dk-tm4c129x/enet_lwip/enet_fsdata.h create mode 100644 boards/dk-tm4c129x/enet_lwip/enet_lwip.c create mode 100644 boards/dk-tm4c129x/enet_lwip/enet_lwip.ewd create mode 100644 boards/dk-tm4c129x/enet_lwip/enet_lwip.ewp create mode 100644 boards/dk-tm4c129x/enet_lwip/enet_lwip.icf create mode 100644 boards/dk-tm4c129x/enet_lwip/enet_lwip.ld create mode 100644 boards/dk-tm4c129x/enet_lwip/enet_lwip.sct create mode 100644 boards/dk-tm4c129x/enet_lwip/enet_lwip.uvopt create mode 100644 boards/dk-tm4c129x/enet_lwip/enet_lwip.uvproj create mode 100644 boards/dk-tm4c129x/enet_lwip/enet_lwip_ccs.cmd create mode 100644 boards/dk-tm4c129x/enet_lwip/ewarm/Exe/enet_lwip.bin create mode 100644 boards/dk-tm4c129x/enet_lwip/ewarm/Exe/enet_lwip.out create mode 100644 boards/dk-tm4c129x/enet_lwip/fs/404.htm create mode 100644 boards/dk-tm4c129x/enet_lwip/fs/about.htm create mode 100644 boards/dk-tm4c129x/enet_lwip/fs/block.htm create mode 100644 boards/dk-tm4c129x/enet_lwip/fs/block.jpg create mode 100644 boards/dk-tm4c129x/enet_lwip/fs/dk-tm4c129x.jpg create mode 100644 boards/dk-tm4c129x/enet_lwip/fs/favicon.ico create mode 100644 boards/dk-tm4c129x/enet_lwip/fs/index.htm create mode 100644 boards/dk-tm4c129x/enet_lwip/fs/javascript.js create mode 100644 boards/dk-tm4c129x/enet_lwip/fs/overview.htm create mode 100644 boards/dk-tm4c129x/enet_lwip/fs/styles.css create mode 100644 boards/dk-tm4c129x/enet_lwip/fs/ti.jpg create mode 100644 boards/dk-tm4c129x/enet_lwip/fs/tm4c.jpg create mode 100644 boards/dk-tm4c129x/enet_lwip/gcc/enet_lwip.axf create mode 100644 boards/dk-tm4c129x/enet_lwip/gcc/enet_lwip.bin create mode 100644 boards/dk-tm4c129x/enet_lwip/lwipopts.h create mode 100644 boards/dk-tm4c129x/enet_lwip/readme.txt create mode 100644 boards/dk-tm4c129x/enet_lwip/rvmdk/enet_lwip.axf create mode 100644 boards/dk-tm4c129x/enet_lwip/rvmdk/enet_lwip.bin create mode 100644 boards/dk-tm4c129x/enet_lwip/startup_ccs.c create mode 100644 boards/dk-tm4c129x/enet_lwip/startup_ewarm.c create mode 100644 boards/dk-tm4c129x/enet_lwip/startup_gcc.c create mode 100644 boards/dk-tm4c129x/enet_lwip/startup_rvmdk.S (limited to 'boards/dk-tm4c129x/enet_lwip') diff --git a/boards/dk-tm4c129x/enet_lwip/Makefile b/boards/dk-tm4c129x/enet_lwip/Makefile new file mode 100644 index 0000000..2b633ba --- /dev/null +++ b/boards/dk-tm4c129x/enet_lwip/Makefile @@ -0,0 +1,106 @@ +#****************************************************************************** +# +# Makefile - Rules for building the web server using lwIP. +# +# Copyright (c) 2013-2014 Texas Instruments Incorporated. All rights reserved. +# Software License Agreement +# +# Texas Instruments (TI) is supplying this software for use solely and +# exclusively on TI's microcontroller products. The software is owned by +# TI and/or its suppliers, and is protected under applicable copyright +# laws. You may not combine this software with "viral" open-source +# software in order to form a larger program. +# +# THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +# NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +# NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +# A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +# CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +# DAMAGES, FOR ANY REASON WHATSOEVER. +# +# This is part of revision 2.1.0.12573 of the DK-TM4C129X Firmware Package. +# +#****************************************************************************** + +# +# Defines the part type that this project uses. +# +PART=TM4C129XNCZAD + +# +# The base directory for TivaWare. +# +ROOT=../../../.. + +# +# Include the common make definitions. +# +include ${ROOT}/makedefs + +# +# Where to find source files that do not live in this directory. +# +VPATH=../drivers +VPATH+=../../../../third_party/lwip-1.4.1/apps/httpserver_raw +VPATH+=../../../../third_party/fatfs/port +VPATH+=../../../../third_party/fatfs/src +VPATH+=../../../../utils + +# +# Where to find header files that do not live in the source directory. +# +IPATH=. +IPATH+=.. +IPATH+=../../../.. +IPATH+=../../../../third_party/lwip-1.4.1/apps +IPATH+=../../../../third_party/lwip-1.4.1/ports/tiva-tm4c129/include +IPATH+=../../../../third_party/lwip-1.4.1/src/include +IPATH+=../../../../third_party/lwip-1.4.1/src/include/ipv4 +IPATH+=../../../../third_party + +# +# The default rule, which causes the web server using lwIP to be built. +# +all: ${COMPILER} +all: ${COMPILER}/enet_lwip.axf + +# +# The rule to clean out all the build products. +# +clean: + @rm -rf ${COMPILER} ${wildcard *~} + +# +# The rule to create the target directory. +# +${COMPILER}: + @mkdir -p ${COMPILER} + +# +# Rules for building the web server using lwIP. +# +${COMPILER}/enet_lwip.axf: ${COMPILER}/enet_fs.o +${COMPILER}/enet_lwip.axf: ${COMPILER}/enet_lwip.o +${COMPILER}/enet_lwip.axf: ${COMPILER}/ff.o +${COMPILER}/enet_lwip.axf: ${COMPILER}/frame.o +${COMPILER}/enet_lwip.axf: ${COMPILER}/httpd.o +${COMPILER}/enet_lwip.axf: ${COMPILER}/kentec320x240x16_ssd2119.o +${COMPILER}/enet_lwip.axf: ${COMPILER}/locator.o +${COMPILER}/enet_lwip.axf: ${COMPILER}/lwiplib.o +${COMPILER}/enet_lwip.axf: ${COMPILER}/mmc-dk-tm4c129x.o +${COMPILER}/enet_lwip.axf: ${COMPILER}/pinout.o +${COMPILER}/enet_lwip.axf: ${COMPILER}/startup_${COMPILER}.o +${COMPILER}/enet_lwip.axf: ${COMPILER}/ustdlib.o +${COMPILER}/enet_lwip.axf: ${ROOT}/grlib/${COMPILER}/libgr.a +${COMPILER}/enet_lwip.axf: ${ROOT}/driverlib/${COMPILER}/libdriver.a +${COMPILER}/enet_lwip.axf: enet_lwip.ld +SCATTERgcc_enet_lwip=enet_lwip.ld +ENTRY_enet_lwip=ResetISR +CFLAGSgcc=-DTARGET_IS_TM4C129_RA0 + +# +# Include the automatically generated dependency files. +# +ifneq (${MAKECMDGOALS},clean) +-include ${wildcard ${COMPILER}/*.d} __dummy__ +endif diff --git a/boards/dk-tm4c129x/enet_lwip/ccs/.ccsimportspec b/boards/dk-tm4c129x/enet_lwip/ccs/.ccsimportspec new file mode 100644 index 0000000..5537fcc --- /dev/null +++ b/boards/dk-tm4c129x/enet_lwip/ccs/.ccsimportspec @@ -0,0 +1,26 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/boards/dk-tm4c129x/enet_lwip/ccs/.ccsproject b/boards/dk-tm4c129x/enet_lwip/ccs/.ccsproject new file mode 100644 index 0000000..59a3400 --- /dev/null +++ b/boards/dk-tm4c129x/enet_lwip/ccs/.ccsproject @@ -0,0 +1,10 @@ + + + + + + + + + + diff --git a/boards/dk-tm4c129x/enet_lwip/ccs/.cproject b/boards/dk-tm4c129x/enet_lwip/ccs/.cproject new file mode 100644 index 0000000..d5b34c0 --- /dev/null +++ b/boards/dk-tm4c129x/enet_lwip/ccs/.cproject @@ -0,0 +1,203 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/boards/dk-tm4c129x/enet_lwip/ccs/.project b/boards/dk-tm4c129x/enet_lwip/ccs/.project new file mode 100644 index 0000000..f1e4978 --- /dev/null +++ b/boards/dk-tm4c129x/enet_lwip/ccs/.project @@ -0,0 +1,100 @@ + + + enet_lwip + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + com.ti.ccstudio.core.ccsNature + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.core.ccnature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + enet_fs.c + 1 + SW_ROOT/examples/boards/dk-tm4c129x/enet_lwip/enet_fs.c + + + enet_lwip.c + 1 + SW_ROOT/examples/boards/dk-tm4c129x/enet_lwip/enet_lwip.c + + + enet_lwip_ccs.cmd + 1 + SW_ROOT/examples/boards/dk-tm4c129x/enet_lwip/enet_lwip_ccs.cmd + + + startup_ccs.c + 1 + SW_ROOT/examples/boards/dk-tm4c129x/enet_lwip/startup_ccs.c + + + drivers/frame.c + 1 + SW_ROOT/examples/boards/dk-tm4c129x/drivers/frame.c + + + drivers/kentec320x240x16_ssd2119.c + 1 + SW_ROOT/examples/boards/dk-tm4c129x/drivers/kentec320x240x16_ssd2119.c + + + drivers/pinout.c + 1 + SW_ROOT/examples/boards/dk-tm4c129x/drivers/pinout.c + + + utils/locator.c + 1 + SW_ROOT/utils/locator.c + + + utils/lwiplib.c + 1 + SW_ROOT/utils/lwiplib.c + + + utils/ustdlib.c + 1 + SW_ROOT/utils/ustdlib.c + + + third_party/fatfs/port/mmc-dk-tm4c129x.c + 1 + SW_ROOT/third_party/fatfs/port/mmc-dk-tm4c129x.c + + + third_party/fatfs/src/ff.c + 1 + SW_ROOT/third_party/fatfs/src/ff.c + + + third_party/lwip-1.4.1/apps/httpserver_raw/httpd.c + 1 + SW_ROOT/third_party/lwip-1.4.1/apps/httpserver_raw/httpd.c + + + + + SW_ROOT + $%7BPARENT-5-PROJECT_LOC%7D + + + diff --git a/boards/dk-tm4c129x/enet_lwip/ccs/.settings/org.eclipse.cdt.codan.core.prefs b/boards/dk-tm4c129x/enet_lwip/ccs/.settings/org.eclipse.cdt.codan.core.prefs new file mode 100644 index 0000000..98b6350 --- /dev/null +++ b/boards/dk-tm4c129x/enet_lwip/ccs/.settings/org.eclipse.cdt.codan.core.prefs @@ -0,0 +1,3 @@ +eclipse.preferences.version=1 +inEditor=false +onBuild=false diff --git a/boards/dk-tm4c129x/enet_lwip/ccs/Debug/enet_lwip.bin b/boards/dk-tm4c129x/enet_lwip/ccs/Debug/enet_lwip.bin new file mode 100644 index 0000000..df15448 Binary files /dev/null and b/boards/dk-tm4c129x/enet_lwip/ccs/Debug/enet_lwip.bin differ diff --git a/boards/dk-tm4c129x/enet_lwip/ccs/Debug/enet_lwip.out b/boards/dk-tm4c129x/enet_lwip/ccs/Debug/enet_lwip.out new file mode 100644 index 0000000..7e7356e Binary files /dev/null and b/boards/dk-tm4c129x/enet_lwip/ccs/Debug/enet_lwip.out differ diff --git a/boards/dk-tm4c129x/enet_lwip/ccs/macros.ini_initial b/boards/dk-tm4c129x/enet_lwip/ccs/macros.ini_initial new file mode 100644 index 0000000..31214b5 --- /dev/null +++ b/boards/dk-tm4c129x/enet_lwip/ccs/macros.ini_initial @@ -0,0 +1 @@ +SW_ROOT = ../../../../.. diff --git a/boards/dk-tm4c129x/enet_lwip/ccs/target_config.ccxml b/boards/dk-tm4c129x/enet_lwip/ccs/target_config.ccxml new file mode 100644 index 0000000..6e5ef45 --- /dev/null +++ b/boards/dk-tm4c129x/enet_lwip/ccs/target_config.ccxml @@ -0,0 +1,13 @@ + + + + + + + + + + + + + diff --git a/boards/dk-tm4c129x/enet_lwip/enet_fs.c b/boards/dk-tm4c129x/enet_lwip/enet_fs.c new file mode 100644 index 0000000..4a38ee5 --- /dev/null +++ b/boards/dk-tm4c129x/enet_lwip/enet_fs.c @@ -0,0 +1,338 @@ +//***************************************************************************** +// +// enet_fs.c - File System Processing for lwIP Web Server Apps. +// +// Copyright (c) 2013-2014 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 2.1.0.12573 of the DK-TM4C129X Firmware Package. +// +//***************************************************************************** + +#include +#include +#include +#include "inc/hw_memmap.h" +#include "driverlib/rom.h" +#include "driverlib/ssi.h" +#include "utils/lwiplib.h" +#include "utils/ustdlib.h" +#include "httpserver_raw/httpd.h" +#include "httpserver_raw/fs.h" +#include "httpserver_raw/fsdata.h" +#include "fatfs/src/ff.h" +#include "fatfs/src/diskio.h" + +//***************************************************************************** +// +// Include the file system data for this application. This file is generated +// by the makefsfile utility, using the following command: +// +// ../../../../tools/bin/makefsfile -i fs -o enet_fsdata.h -r -h -q +// +// If any changes are made to the static content of the web pages served by the +// application, this command must be used to regenerate enet_fsdata.h in order +// for those changes to be picked up by the web server. +// +//***************************************************************************** +#include "enet_fsdata.h" + +//***************************************************************************** +// +// The following are data structures used by FatFs. +// +//***************************************************************************** +static FATFS g_sFatFs; + +//***************************************************************************** +// +// The number of milliseconds that has passed since the last disk_timerproc() +// call. +// +//***************************************************************************** +static uint32_t ui32TickCounter = 0; + +//***************************************************************************** +// +// Initialize the file system. +// +//***************************************************************************** +void +fs_init(void) +{ + // + // Initialize and mount the Fat File System. + // + f_mount(0, &g_sFatFs); +} + +//***************************************************************************** +// +// File System tick handler. +// +//***************************************************************************** +void +fs_tick(uint32_t ui32TickMS) +{ + // + // Increment the tick counter. + // + ui32TickCounter += ui32TickMS; + + // + // Check to see if the FAT FS tick needs to run. + // + if(ui32TickCounter >= 10) + { + ui32TickCounter = 0; + disk_timerproc(); + } +} + +//***************************************************************************** +// +// Open a file and return a handle to the file, if found. Otherwise, +// return NULL. +// +//***************************************************************************** +struct fs_file * +fs_open(const char *pcName) +{ + const struct fsdata_file *psTree; + struct fs_file *psFile = NULL; + FIL *psFatFile = NULL; + FRESULT fresult = FR_OK; + + // + // Allocate memory for the file system structure. + // + psFile = mem_malloc(sizeof(struct fs_file)); + if(psFile == NULL) + { + return(NULL); + } + + // + // See if a file on the SD card is being requested. + // + if(ustrncmp(pcName, "/sd/", 4) == 0) + { + // + // Allocate memory for the Fat File system handle. + // + psFatFile = mem_malloc(sizeof(FIL)); + if(psFatFile == NULL) + { + mem_free(psFile); + return(NULL); + } + + // + // Attempt to open the file on the Fat File System. + // + fresult = f_open(psFatFile, pcName + 3, FA_READ); + if(fresult == FR_OK) + { + psFile->data = NULL; + psFile->len = 0; + psFile->index = 0; + psFile->pextension = psFatFile; + return(psFile); + } + + // + // If we get here, we failed to find the file on the Fat File System, + // so free up the Fat File system handle/object. + // + mem_free(psFatFile); + mem_free(psFile); + return(NULL); + } + + // + // Initialize the file system tree pointer to the root of the linked list. + // + psTree = FS_ROOT; + + // + // Begin processing the linked list, looking for the requested file name. + // + while(NULL != psTree) + { + // + // Compare the requested file "name" to the file name in the + // current node. + // + if(ustrncmp(pcName, (char *)psTree->name, psTree->len) == 0) + { + // + // Fill in the data pointer and length values from the + // linked list node. + // + psFile->data = (char *)psTree->data; + psFile->len = psTree->len; + + // + // For now, we setup the read index to the end of the file, + // indicating that all data has been read. + // + psFile->index = psTree->len; + + // + // We are not using any file system extensions in this + // application, so set the pointer to NULL. + // + psFile->pextension = NULL; + + // + // Exit the loop and return the file system pointer. + // + break; + } + + // + // If we get here, we did not find the file at this node of the linked + // list. Get the next element in the list. + // + psTree = psTree->next; + } + + // + // If we didn't find the file, ptTee will be NULL. Make sure we + // return a NULL pointer if this happens. + // + if(psTree == NULL) + { + mem_free(psFile); + psFile = NULL; + } + + // + // Return the file system pointer. + // + return(psFile); +} + +//***************************************************************************** +// +// Close an opened file designated by the handle. +// +//***************************************************************************** +void +fs_close(struct fs_file *psFile) +{ + // + // If a Fat file was opened, free its object. + // + if(psFile->pextension) + { + mem_free(psFile->pextension); + } + + // + // Free the main file system object. + // + mem_free(psFile); +} + +//***************************************************************************** +// +// Read the next chunck of data from the file. Return the count of data +// that was read. Return 0 if no data is currently available. Return +// a -1 if at the end of file. +// +//***************************************************************************** +int +fs_read(struct fs_file *psFile, char *pcBuffer, int iCount) +{ + int iAvailable; + UINT uiBytesRead; + FRESULT fresult; + + // + // Check to see if a Fat File was opened and process it. + // + if(psFile->pextension) + { + // + // Read the data. + // + fresult = f_read(psFile->pextension, pcBuffer, iCount, &uiBytesRead); + if((fresult != FR_OK) || (uiBytesRead == 0)) + { + return(-1); + } + return((int)uiBytesRead); + } + + // + // Check to see if more data is available. + // + if(psFile->index == psFile->len) + { + // + // There is no remaining data. Return a -1 for EOF indication. + // + return(-1); + } + + // + // Determine how much data we can copy. The minimum of the 'iCount' + // parameter or the available data in the file system buffer. + // + iAvailable = psFile->len - psFile->index; + if(iAvailable > iCount) + { + iAvailable = iCount; + } + + // + // Copy the data. + // + memcpy(pcBuffer, psFile->data + iAvailable, iAvailable); + psFile->index += iAvailable; + + // + // Return the count of data that we copied. + // + return(iAvailable); +} + +//***************************************************************************** +// +// Determine the number of bytes left to read from the file. +// +//***************************************************************************** +int +fs_bytes_left(struct fs_file *psFile) +{ + // + // Check to see if a Fat File was opened and process it. + // + if(psFile->pextension) + { + // + // Return the number of bytes left to be read from the Fat File. + // + return(f_size((FIL *)psFile->pextension) - + f_tell((FIL *)psFile->pextension)); + } + + // + // Return the number of bytes left to be read from this file. + // + return(psFile->len - psFile->index); +} diff --git a/boards/dk-tm4c129x/enet_lwip/enet_fs.h b/boards/dk-tm4c129x/enet_lwip/enet_fs.h new file mode 100644 index 0000000..fd04321 --- /dev/null +++ b/boards/dk-tm4c129x/enet_lwip/enet_fs.h @@ -0,0 +1,36 @@ +//***************************************************************************** +// +// enet_fs.h - Prototypes for the file system module. +// +// Copyright (c) 2013-2014 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 2.1.0.12573 of the DK-TM4C129X Firmware Package. +// +//***************************************************************************** + +#ifndef __ENET_FS_H__ +#define __ENET_FS_H__ + +//***************************************************************************** +// +// Prototypes. +// +//***************************************************************************** +extern void fs_init(void); +extern void fs_tick(uint32_t ui32TickMS); + +#endif // __ENET_FS_H__ diff --git a/boards/dk-tm4c129x/enet_lwip/enet_fsdata.h b/boards/dk-tm4c129x/enet_lwip/enet_fsdata.h new file mode 100644 index 0000000..1faf92d --- /dev/null +++ b/boards/dk-tm4c129x/enet_lwip/enet_fsdata.h @@ -0,0 +1,16229 @@ +//*************************************************************************** +// +// File System Image. +// +// This file was automatically generated using the makefsfile utility. +// +//*************************************************************************** + +static const uint8_t data_404_htm[] = +{ + /* /404.htm */ + 0x2f, 0x34, 0x30, 0x34, 0x2e, 0x68, 0x74, 0x6d, + 0x00, + 0x3c, 0x21, 0x2d, 0x2d, 0x20, 0x43, 0x6f, 0x70, + 0x79, 0x72, 0x69, 0x67, 0x68, 0x74, 0x20, 0x28, + 0x63, 0x29, 0x20, 0x32, 0x30, 0x31, 0x33, 0x2d, + 0x32, 0x30, 0x31, 0x34, 0x20, 0x54, 0x65, 0x78, + 0x61, 0x73, 0x20, 0x49, 0x6e, 0x73, 0x74, 0x72, + 0x75, 0x6d, 0x65, 0x6e, 0x74, 0x73, 0x20, 0x49, + 0x6e, 0x63, 0x6f, 0x72, 0x70, 0x6f, 0x72, 0x61, + 0x74, 0x65, 0x64, 0x2e, 0x20, 0x20, 0x41, 0x6c, + 0x6c, 0x20, 0x72, 0x69, 0x67, 0x68, 0x74, 0x73, + 0x20, 0x72, 0x65, 0x73, 0x65, 0x72, 0x76, 0x65, + 0x64, 0x2e, 0x20, 0x2d, 0x2d, 0x3e, 0x0a, 0x3c, + 0x68, 0x74, 0x6d, 0x6c, 0x3e, 0x0a, 0x3c, 0x62, + 0x6f, 0x64, 0x79, 0x3e, 0x0a, 0x3c, 0x63, 0x65, + 0x6e, 0x74, 0x65, 0x72, 0x3e, 0x0a, 0x3c, 0x68, + 0x31, 0x3e, 0x34, 0x30, 0x34, 0x20, 0x2d, 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0x70, 0xae, 0xb8, 0x2a, 0x08, 0xf8, + 0x18, 0x01, 0xc2, 0x62, 0xcc, 0x19, 0x83, 0x7f, + 0xa8, 0xd2, 0x26, 0xa1, 0xca, 0xd6, 0xb2, 0xf9, + 0x31, 0xb4, 0x81, 0x10, 0xc0, 0xda, 0x5d, 0x54, + 0x82, 0xea, 0xaf, 0x33, 0x55, 0x3b, 0x79, 0xd4, + 0x82, 0xab, 0xa5, 0xd2, 0x35, 0xa6, 0x0c, 0x8e, + 0xe1, 0x4a, 0x80, 0x85, 0x56, 0x80, 0xed, 0x6b, + 0xa1, 0x3f, 0x03, 0x22, 0x03, 0x8a, 0x1c, 0x82, + 0xd2, 0x17, 0x41, 0x8f, 0xd1, 0xa5, 0x64, 0x01, + 0x62, 0x05, 0x50, 0xd3, 0x8d, 0x29, 0xbb, 0xd4, + 0xe5, 0x0d, 0x14, 0x16, 0xa3, 0xad, 0x47, 0x78, + 0x1d, 0xf2, 0x80, 0x16, 0x88, 0x14, 0x1a, 0x81, + 0x02, 0x6a, 0x61, 0x77, 0x45, 0x47, 0x43, 0xd5, + 0xb3, 0x7f, 0x13, 0x10, 0x29, 0xb5, 0x85, 0x57, + 0xed, 0xc4, 0x92, 0xdf, 0xdd, 0x73, 0xf3, 0x22, + 0xc0, 0x54, 0x5b, 0xc6, 0xe1, 0xa1, 0x87, 0x82, + 0x7f, 0x40, 0x18, 0x7c, 0xfe, 0x07, 0xcb, 0x00, + 0xff, 0x00, 0x5e, 0xfd, 0xda, 0xc3, 0xcc, 0xe7, + 0x80, 0xab, 0x96, 0xff, 0x00, 0x5b, 0xdf, 0xa5, + 0x3d, 0xc9, 0x56, 0xd2, 0xd0, 0xbb, 0xb8, 0x6d, + 0xf6, 0xe4, 0x8e, 0xb8, 0x26, 0x06, 0x67, 0x7a, + 0x05, 0x56, 0x08, 0xa7, 0xae, 0x82, 0x98, 0x54, + 0xaf, 0x8a, 0xa0, 0x50, 0xd5, 0x54, 0xa3, 0x54, + 0x6f, 0x11, 0xba, 0x0b, 0x72, 0xbb, 0x5a, 0xec, + 0xef, 0x99, 0xf9, 0x75, 0x83, 0x97, 0xc4, 0x74, + 0xf7, 0x09, 0xa4, 0xfc, 0xe3, 0x05, 0xc5, 0x7a, + 0x60, 0x22, 0x04, 0x3e, 0x0f, 0xeb, 0xcc, 0x31, + 0xdc, 0xb3, 0xdc, 0x41, 0xee, 0x4e, 0x35, 0xee, + 0x08, 0x7b, 0x7f, 0x18, 0x17, 0x79, 0xc0, 0x72, + 0xdf, 0xe0, 0x38, 0x14, 0x43, 0x8e, 0x36, 0x59, + 0xd3, 0xcc, 0x6b, 0xd4, 0xa8, 0xa9, 0x08, 0x71, + 0x78, 0x60, 0xae, 0xa8, 0xe0, 0x6d, 0xab, 0xd7, + 0x00, 0x91, 0xef, 0x4d, 0xc3, 0x62, 0x8f, 0x21, + 0xfd, 0xf9, 0x9d, 0x47, 0x04, 0xa5, 0x32, 0xf5, + 0xb8, 0x5f, 0x38, 0x07, 0xb8, 0xb3, 0x13, 0x20, + 0xee, 0x21, 0xbb, 0x81, 0xf7, 0x11, 0xd7, 0x11, + 0x3f, 0x81, 0x8b, 0xec, 0xb9, 0xae, 0x9f, 0xd8, + 0xc1, 0x60, 0x03, 0xeb, 0xff, 0x00, 0x0a, 0x83, + 0x08, 0x31, 0xe6, 0x6e, 0xef, 0x26, 0x5b, 0x92, + 0xf7, 0x29, 0xee, 0x6d, 0x6f, 0x3f, 0xff, 0xd9, + +}; + +static const uint8_t data_favicon_ico[] = +{ + /* /favicon.ico */ + 0x2f, 0x66, 0x61, 0x76, 0x69, 0x63, 0x6f, 0x6e, + 0x2e, 0x69, 0x63, 0x6f, 0x00, + 0x00, 0x00, 0x01, 0x00, 0x02, 0x00, 0x10, 0x10, + 0x10, 0x00, 0x01, 0x00, 0x04, 0x00, 0x28, 0x01, + 0x00, 0x00, 0x26, 0x00, 0x00, 0x00, 0x10, 0x10, + 0x00, 0x00, 0x01, 0x00, 0x08, 0x00, 0x68, 0x05, + 0x00, 0x00, 0x4e, 0x01, 0x00, 0x00, 0x28, 0x00, + 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x20, 0x00, + 0x00, 0x00, 0x01, 0x00, 0x04, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x80, + 0x00, 0x00, 0x00, 0x80, 0x80, 0x00, 0x80, 0x00, + 0x00, 0x00, 0x80, 0x00, 0x80, 0x00, 0x80, 0x80, + 0x00, 0x00, 0xc0, 0xc0, 0xc0, 0x00, 0x80, 0x80, + 0x80, 0x00, 0x00, 0x00, 0xff, 0x00, 0x00, 0xff, + 0x00, 0x00, 0x00, 0xff, 0xff, 0x00, 0xff, 0x00, + 0x00, 0x00, 0xff, 0x00, 0xff, 0x00, 0xff, 0xff, + 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data_tm4c_jpg[] = +{ + /* /tm4c.jpg */ + 0x2f, 0x74, 0x6d, 0x34, 0x63, 0x2e, 0x6a, 0x70, + 0x67, 0x00, + 0xff, 0xd8, 0xff, 0xe0, 0x00, 0x10, 0x4a, 0x46, + 0x49, 0x46, 0x00, 0x01, 0x01, 0x01, 0x00, 0x48, + 0x00, 0x48, 0x00, 0x00, 0xff, 0xdb, 0x00, 0x43, + 0x00, 0x03, 0x02, 0x02, 0x03, 0x02, 0x02, 0x03, + 0x03, 0x03, 0x03, 0x04, 0x03, 0x03, 0x04, 0x05, + 0x08, 0x05, 0x05, 0x04, 0x04, 0x05, 0x0a, 0x07, + 0x07, 0x06, 0x08, 0x0c, 0x0a, 0x0c, 0x0c, 0x0b, + 0x0a, 0x0b, 0x0b, 0x0d, 0x0e, 0x12, 0x10, 0x0d, + 0x0e, 0x11, 0x0e, 0x0b, 0x0b, 0x10, 0x16, 0x10, + 0x11, 0x13, 0x14, 0x15, 0x15, 0x15, 0x0c, 0x0f, + 0x17, 0x18, 0x16, 0x14, 0x18, 0x12, 0x14, 0x15, + 0x14, 0xff, 0xdb, 0x00, 0x43, 0x01, 0x03, 0x04, + 0x04, 0x05, 0x04, 0x05, 0x09, 0x05, 0x05, 0x09, + 0x14, 0x0d, 0x0b, 0x0d, 0x14, 0x14, 0x14, 0x14, + 0x14, 0x14, 0x14, 0x14, 0x14, 0x14, 0x14, 0x14, + 0x14, 0x14, 0x14, 0x14, 0x14, 0x14, 0x14, 0x14, + 0x14, 0x14, 0x14, 0x14, 0x14, 0x14, 0x14, 0x14, + 0x14, 0x14, 0x14, 0x14, 0x14, 0x14, 0x14, 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0xe5, + 0x67, 0x6c, 0xdd, 0xb3, 0x4c, 0xda, 0xe6, 0xd0, + 0xed, 0x98, 0x58, 0xdf, 0x91, 0x94, 0xeb, 0x05, + 0x4f, 0xa5, 0x1c, 0xd0, 0x3c, 0x06, 0x7f, 0xff, + 0xd9, +}; + +const struct fsdata_file file_tm4c_jpg[] = +{ + { + NULL, + data_tm4c_jpg, + data_tm4c_jpg + 10, + sizeof(data_tm4c_jpg) - 10 + } +}; + +const struct fsdata_file file_ti_jpg[] = +{ + { + file_tm4c_jpg, + data_ti_jpg, + data_ti_jpg + 8, + sizeof(data_ti_jpg) - 8 + } +}; + +const struct fsdata_file file_styles_css[] = +{ + { + file_ti_jpg, + data_styles_css, + data_styles_css + 12, + sizeof(data_styles_css) - 12 + } +}; + +const struct fsdata_file file_overview_htm[] = +{ + { + file_styles_css, + data_overview_htm, + data_overview_htm + 14, + sizeof(data_overview_htm) - 14 + } +}; + +const struct fsdata_file file_javascript_js[] = +{ + { + file_overview_htm, + data_javascript_js, + data_javascript_js + 15, + sizeof(data_javascript_js) - 15 + } +}; + +const struct fsdata_file file_index_htm[] = +{ + { + file_javascript_js, + data_index_htm, + data_index_htm + 11, + sizeof(data_index_htm) - 11 + } +}; + +const struct fsdata_file file_favicon_ico[] = +{ + { + file_index_htm, + data_favicon_ico, + data_favicon_ico + 13, + sizeof(data_favicon_ico) - 13 + } +}; + +const struct fsdata_file file_dk_tm4c129x_jpg[] = +{ + { + file_favicon_ico, + data_dk_tm4c129x_jpg, + data_dk_tm4c129x_jpg + 17, + sizeof(data_dk_tm4c129x_jpg) - 17 + } +}; + +const struct fsdata_file file_block_jpg[] = +{ + { + file_dk_tm4c129x_jpg, + data_block_jpg, + data_block_jpg + 11, + sizeof(data_block_jpg) - 11 + } +}; + +const struct fsdata_file file_block_htm[] = +{ + { + file_block_jpg, + data_block_htm, + data_block_htm + 11, + sizeof(data_block_htm) - 11 + } +}; + +const struct fsdata_file file_about_htm[] = +{ + { + file_block_htm, + data_about_htm, + data_about_htm + 11, + sizeof(data_about_htm) - 11 + } +}; + +const struct fsdata_file file_404_htm[] = +{ + { + file_about_htm, + data_404_htm, + data_404_htm + 9, + sizeof(data_404_htm) - 9 + } +}; + +#define FS_ROOT file_404_htm + +#define FS_NUMFILES 12 + diff --git a/boards/dk-tm4c129x/enet_lwip/enet_lwip.c b/boards/dk-tm4c129x/enet_lwip/enet_lwip.c new file mode 100644 index 0000000..cb09eb5 --- /dev/null +++ b/boards/dk-tm4c129x/enet_lwip/enet_lwip.c @@ -0,0 +1,455 @@ +//***************************************************************************** +// +// enet_lwip.c - Sample WebServer Application using lwIP. +// +// Copyright (c) 2013-2014 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 2.1.0.12573 of the DK-TM4C129X Firmware Package. +// +//***************************************************************************** + +#include +#include +#include "inc/hw_ints.h" +#include "driverlib/interrupt.h" +#include "driverlib/rom.h" +#include "driverlib/rom_map.h" +#include "driverlib/sysctl.h" +#include "driverlib/systick.h" +#include "grlib/grlib.h" +#include "utils/locator.h" +#include "utils/lwiplib.h" +#include "utils/ustdlib.h" +#include "httpserver_raw/httpd.h" +#include "drivers/frame.h" +#include "drivers/kentec320x240x16_ssd2119.h" +#include "drivers/pinout.h" +#include "enet_fs.h" + +//***************************************************************************** +// +//! \addtogroup example_list +//!

Ethernet with lwIP (enet_lwip)

+//! +//! This example application demonstrates the operation of the Tiva +//! Ethernet controller using the lwIP TCP/IP Stack configured to operate as +//! an HTTP file server (web server). DHCP is used to obtain an Ethernet +//! address. If DHCP times out without obtaining an address, AUTOIP will be +//! used to obtain a link-local address. The address that is selected will be +//! shown on the QVGA display. +//! +//! The file system code will first check to see if an SD card has been plugged +//! into the microSD slot. If so, all file requests from the web server will +//! be directed to the SD card. Otherwise, a default set of pages served up +//! by an internal file system will be used. Source files for the internal +//! file system image can be found in the ``fs'' directory. If any of these +//! files are changed, the file system image (enet_fsdata.h) should be +//! rebuilt using the command: +//! +//! ../../../../tools/bin/makefsfile -i fs -o enet_fsdata.h -r -h -q +//! +//! For additional details on lwIP, refer to the lwIP web page at: +//! http://savannah.nongnu.org/projects/lwip/ +// +//***************************************************************************** + +//***************************************************************************** +// +// Defines for setting up the system clock. +// +//***************************************************************************** +#define SYSTICKHZ 100 +#define SYSTICKMS (1000 / SYSTICKHZ) + +//***************************************************************************** +// +// Interrupt priority definitions. The top 3 bits of these values are +// significant with lower values indicating higher priority interrupts. +// +//***************************************************************************** +#define SYSTICK_INT_PRIORITY 0x80 +#define ETHERNET_INT_PRIORITY 0xC0 + +//***************************************************************************** +// +// The positions of the circles in the animation used while waiting for an IP +// address. +// +//***************************************************************************** +const int32_t g_ppi32CirclePos[][2] = +{ + { + 12, 0 + }, + { + 8, -9 + }, + { + 0, -12 + }, + { + -8, -9 + }, + { + -12, 0 + }, + { + -8, 9 + }, + { + 0, 12 + }, + { + 8, 9 + } +}; + +//***************************************************************************** +// +// The colors of the circles in the animation used while waiting for an IP +// address. +// +//***************************************************************************** +const uint32_t g_pui32CircleColor[] = +{ + 0x111111, + 0x333333, + 0x555555, + 0x777777, + 0x999999, + 0xbbbbbb, + 0xdddddd, + 0xffffff, +}; + +//***************************************************************************** +// +// The current color index for the animation used while waiting for an IP +// address. +// +//***************************************************************************** +uint32_t g_ui32ColorIdx; + +//***************************************************************************** +// +// The current IP address. +// +//***************************************************************************** +uint32_t g_ui32IPAddress; + +//***************************************************************************** +// +// The application's graphics context. +// +//***************************************************************************** +tContext g_sContext; + +//***************************************************************************** +// +// The system clock frequency. Used by the SD card driver. +// +//***************************************************************************** +uint32_t g_ui32SysClock; + +//***************************************************************************** +// +// The error routine that is called if the driver library encounters an error. +// +//***************************************************************************** +#ifdef DEBUG +void +__error__(char *pcFilename, uint32_t ui32Line) +{ +} +#endif + +//***************************************************************************** +// +// Display an lwIP type IP Address. +// +//***************************************************************************** +void +DisplayIPAddress(uint32_t ui32Addr, uint32_t ui32Col, uint32_t ui32Row) +{ + char pcBuf[16]; + + // + // Convert the IP Address into a string. + // + usprintf(pcBuf, "%d.%d.%d.%d", ui32Addr & 0xff, (ui32Addr >> 8) & 0xff, + (ui32Addr >> 16) & 0xff, (ui32Addr >> 24) & 0xff); + + // + // Display the string. + // + GrStringDraw(&g_sContext, pcBuf, -1, ui32Col, ui32Row, false); +} + +//***************************************************************************** +// +// Required by lwIP library to support any host-related timer functions. +// +//***************************************************************************** +void +lwIPHostTimerHandler(void) +{ + uint32_t ui32Idx, ui32NewIPAddress, ui32Width, ui32Height; + tRectangle sRect; + + // + // Get the width and height of the display. + // + ui32Width = GrContextDpyWidthGet(&g_sContext); + ui32Height = GrContextDpyHeightGet(&g_sContext); + + // + // Get the current IP address. + // + ui32NewIPAddress = lwIPLocalIPAddrGet(); + + // + // See if the IP address has changed. + // + if(ui32NewIPAddress != g_ui32IPAddress) + { + // + // Clear the display. + // + sRect.i16XMin = 0; + sRect.i16YMin = 0; + sRect.i16XMax = ui32Width - 1; + sRect.i16YMax = ui32Height - 1; + GrContextForegroundSet(&g_sContext, ClrBlack); + GrRectFill(&g_sContext, &sRect); + GrContextForegroundSet(&g_sContext, ClrWhite); + + // + // See if there is an IP address assigned. + // + if(ui32NewIPAddress == 0xffffffff) + { + // + // Indicate that there is no link. + // + GrStringDrawCentered(&g_sContext, "Waiting for link", -1, + ui32Width / 2, (ui32Height / 2) - 18, false); + } + else if(ui32NewIPAddress == 0) + { + // + // There is no IP address, so indicate that the DHCP process is + // running. + // + GrStringDrawCentered(&g_sContext, "Waiting for IP address", -1, + ui32Width / 2, (ui32Height / 2) - 18, false); + } + else + { + // + // Display the new IP address information. + // + GrStringDraw(&g_sContext, "IP Address:", -1, (ui32Width / 2) - 110, + (ui32Height / 2) + 8 - 10 - 20, false); + GrStringDraw(&g_sContext, "Subnet Mask:", -1, + (ui32Width / 2) - 110, (ui32Height / 2) + 8 - 10, + false); + GrStringDraw(&g_sContext, "Gateway:", -1, (ui32Width / 2) - 110, + (ui32Height / 2) + 8 - 10 + 20, false); + DisplayIPAddress(ui32NewIPAddress, ui32Width / 2, + (ui32Height / 2) + 8 - 10 - 20); + DisplayIPAddress(lwIPLocalNetMaskGet(), ui32Width / 2, + (ui32Height / 2) + 8 - 10); + DisplayIPAddress(lwIPLocalGWAddrGet(), ui32Width / 2, + (ui32Height / 2) + 8 - 10 + 20); + } + + // + // Save the new IP address. + // + g_ui32IPAddress = ui32NewIPAddress; + } + + // + // If there is not an IP address, draw the animated circle. + // + if((ui32NewIPAddress == 0) || (ui32NewIPAddress == 0xffffffff)) + { + // + // Loop through the circles in the animation. + // + for(ui32Idx = 0; ui32Idx < 8; ui32Idx++) + { + // + // Draw this circle. + // + GrContextForegroundSet(&g_sContext, + g_pui32CircleColor[(g_ui32ColorIdx + + ui32Idx) & 7]); + GrCircleFill(&g_sContext, + (ui32Width / 2) + g_ppi32CirclePos[ui32Idx][0], + (ui32Height / 2) + g_ppi32CirclePos[ui32Idx][1] + 24, + 2); + } + + // + // Increment the color index. + // + g_ui32ColorIdx++; + } +} + +//***************************************************************************** +// +// The interrupt handler for the SysTick interrupt. +// +//***************************************************************************** +void +SysTickIntHandler(void) +{ + // + // Call the lwIP timer handler. + // + lwIPTimer(SYSTICKMS); + + // + // Run the file system tick handler. + // + fs_tick(SYSTICKMS); +} + +//***************************************************************************** +// +// This example demonstrates the use of the Ethernet Controller. +// +//***************************************************************************** +int +main(void) +{ + uint32_t ui32User0, ui32User1; + uint8_t pui8MACArray[8]; + + // + // Run from the PLL at 120 MHz. + // + g_ui32SysClock = MAP_SysCtlClockFreqSet((SYSCTL_XTAL_25MHZ | + SYSCTL_OSC_MAIN | SYSCTL_USE_PLL | + SYSCTL_CFG_VCO_480), 120000000); + + // + // Configure the device pins. + // + PinoutSet(); + + // + // Initialize the display driver. + // + Kentec320x240x16_SSD2119Init(g_ui32SysClock); + + // + // Initialize the graphics context. + // + GrContextInit(&g_sContext, &g_sKentec320x240x16_SSD2119); + + // + // Draw the application frame. + // + FrameDraw(&g_sContext, "enet-lwip"); + + // + // Configure SysTick for a periodic interrupt. + // + ROM_SysTickPeriodSet(g_ui32SysClock / SYSTICKHZ); + ROM_SysTickEnable(); + ROM_SysTickIntEnable(); + + // + // Initialize the file system. + // + fs_init(); + + // + // Configure the hardware MAC address for Ethernet Controller filtering of + // incoming packets. The MAC address will be stored in the non-volatile + // USER0 and USER1 registers. + // + ROM_FlashUserGet(&ui32User0, &ui32User1); + if((ui32User0 == 0xffffffff) || (ui32User1 == 0xffffffff)) + { + // + // We should never get here. This is an error if the MAC address has + // not been programmed into the device. Exit the program. + // + GrContextForegroundSet(&g_sContext, ClrRed); + GrStringDrawCentered(&g_sContext, "MAC Address", -1, + GrContextDpyWidthGet(&g_sContext) / 2, + (GrContextDpyHeightGet(&g_sContext) / 2) - 4, + false); + GrStringDrawCentered(&g_sContext, "Not Programmed!", -1, + GrContextDpyWidthGet(&g_sContext) / 2, + (GrContextDpyHeightGet(&g_sContext) / 2) + 16, + false); + while(1) + { + } + } + + // + // Convert the 24/24 split MAC address from NV ram into a 32/16 split MAC + // address needed to program the hardware registers, then program the MAC + // address into the Ethernet Controller registers. + // + pui8MACArray[0] = ((ui32User0 >> 0) & 0xff); + pui8MACArray[1] = ((ui32User0 >> 8) & 0xff); + pui8MACArray[2] = ((ui32User0 >> 16) & 0xff); + pui8MACArray[3] = ((ui32User1 >> 0) & 0xff); + pui8MACArray[4] = ((ui32User1 >> 8) & 0xff); + pui8MACArray[5] = ((ui32User1 >> 16) & 0xff); + + // + // Initialze the lwIP library, using DHCP. + // + lwIPInit(g_ui32SysClock, pui8MACArray, 0, 0, 0, IPADDR_USE_DHCP); + + // + // Setup the device locator service. + // + LocatorInit(); + LocatorMACAddrSet(pui8MACArray); + LocatorAppTitleSet("DK-TM4C129X enet_lwip"); + + // + // Initialize the sample httpd server. + // + httpd_init(); + + // + // Set the interrupt priorities. We set the SysTick interrupt to a higher + // priority than the Ethernet interrupt to ensure that the file system + // tick is processed if SysTick occurs while the Ethernet handler is being + // processed. This is very likely since all the TCP/IP and HTTP work is + // done in the context of the Ethernet interrupt. + // + ROM_IntPrioritySet(INT_EMAC0, ETHERNET_INT_PRIORITY); + ROM_IntPrioritySet(FAULT_SYSTICK, SYSTICK_INT_PRIORITY); + + // + // Loop forever. All the work is done in interrupt handlers. + // + while(1) + { + } +} diff --git a/boards/dk-tm4c129x/enet_lwip/enet_lwip.ewd b/boards/dk-tm4c129x/enet_lwip/enet_lwip.ewd new file mode 100644 index 0000000..484e41a --- /dev/null +++ b/boards/dk-tm4c129x/enet_lwip/enet_lwip.ewd @@ -0,0 +1,614 @@ + + + + 1 + + Debug + + ARM + + 1 + + C-SPY + 2 + + 15 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + ARMSIM_ID + 2 + + 1 + 1 + 1 + + + + + + + + ANGEL_ID + 2 + + 0 + 1 + 1 + + + + + + + + + + + + GDBSERVER_ID + 2 + + 0 + 1 + 1 + + + + + + + + + + + IARROM_ID + 2 + + 0 + 1 + 1 + + + + + + + + + + JLINK_ID + 2 + + 9 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + LMIFTDI_ID + 2 + + 1 + 1 + 1 + + + + + + + + MACRAIGOR_ID + 2 + + 2 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + RDI_ID + 2 + + 1 + 1 + 1 + + + + + + + + + + + + + + + + + THIRDPARTY_ID + 2 + + 0 + 1 + 1 + + + + + + + + + $TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\OSE\OseEpsilonPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\PowerPac\PowerPacRTOS.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin + 0 + + + $EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin + 1 + + + $EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin + 0 + + + $EW_DIR$\common\plugins\Profiling\Profiling.ENU.ewplugin + 1 + + + $EW_DIR$\common\plugins\Stack\Stack.ENU.ewplugin + 1 + + + + diff --git a/boards/dk-tm4c129x/enet_lwip/enet_lwip.ewp b/boards/dk-tm4c129x/enet_lwip/enet_lwip.ewp new file mode 100644 index 0000000..1ba03ba --- /dev/null +++ b/boards/dk-tm4c129x/enet_lwip/enet_lwip.ewp @@ -0,0 +1,831 @@ + + + + 1 + + Debug + + ARM + + 1 + + General + 3 + + 14 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCARM + 2 + + 19 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AARM + 2 + + 7 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + OBJCOPY + 0 + + 1 + 1 + 1 + + + + + + + + + CUSTOM + 3 + + + + + + + BICOMP + 0 + + + + BUILDACTION + 1 + + + + + + + ILINK + 0 + + 5 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + IARCHIVE + 0 + + 0 + 1 + 1 + + + + + + + BILINK + 0 + + + + + Libraries + + $PROJ_DIR$\..\..\..\..\driverlib\ewarm\Exe\driverlib.a + + + $PROJ_DIR$\..\..\..\..\grlib\ewarm\Exe\grlib.a + + + + Source + + $PROJ_DIR$\enet_fs.c + + + $PROJ_DIR$\enet_lwip.c + + + $PROJ_DIR$\..\..\..\..\third_party\fatfs\src\ff.c + + + $PROJ_DIR$\..\drivers\frame.c + + + $PROJ_DIR$\..\..\..\..\third_party\lwip-1.4.1\apps\httpserver_raw\httpd.c + + + $PROJ_DIR$\..\drivers\kentec320x240x16_ssd2119.c + + + $PROJ_DIR$\..\..\..\..\utils\locator.c + + + $PROJ_DIR$\..\..\..\..\utils\lwiplib.c + + + $PROJ_DIR$\..\..\..\..\third_party\fatfs\port\mmc-dk-tm4c129x.c + + + $PROJ_DIR$\..\drivers\pinout.c + + + $PROJ_DIR$\startup_ewarm.c + + + $PROJ_DIR$\..\..\..\..\utils\ustdlib.c + + + diff --git a/boards/dk-tm4c129x/enet_lwip/enet_lwip.icf b/boards/dk-tm4c129x/enet_lwip/enet_lwip.icf new file mode 100644 index 0000000..807a33b --- /dev/null +++ b/boards/dk-tm4c129x/enet_lwip/enet_lwip.icf @@ -0,0 +1,78 @@ +//***************************************************************************** +// +// enet_lwip.icf - Linker configuration file for enet_lwip. +// +// Copyright (c) 2013-2014 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 2.1.0.12573 of the DK-TM4C129X Firmware Package. +// +//***************************************************************************** + +// +// Define a memory region that covers the entire 4 GB addressible space of the +// processor. +// +define memory mem with size = 4G; + +// +// Define a region for the on-chip flash. +// +define region FLASH = mem:[from 0x00000000 to 0x000fffff]; + +// +// Define a region for the on-chip SRAM. +// +define region SRAM = mem:[from 0x20000000 to 0x2003ffff]; + +// +// Define a block for the heap. The size should be set to something other +// than zero if things in the C library that require the heap are used. +// +define block HEAP with alignment = 8, size = 0x00000000 { }; + +// +// Indicate that the read/write values should be initialized by copying from +// flash. +// +initialize by copy { readwrite }; + +// +// Indicate that the noinit values should be left alone. This includes the +// stack, which if initialized will destroy the return address from the +// initialization code, causing the processor to branch to zero and fault. +// +do not initialize { section .noinit }; + +// +// Place the interrupt vectors at the start of flash. +// +place at start of FLASH { readonly section .intvec }; + +// +// Place the remainder of the read-only items into flash. +// +place in FLASH { readonly }; + +// +// Place the RAM vector table at the start of SRAM. +// +place at start of SRAM { section VTABLE }; + +// +// Place all read/write items into SRAM. +// +place in SRAM { readwrite, block HEAP }; diff --git a/boards/dk-tm4c129x/enet_lwip/enet_lwip.ld b/boards/dk-tm4c129x/enet_lwip/enet_lwip.ld new file mode 100644 index 0000000..baa4004 --- /dev/null +++ b/boards/dk-tm4c129x/enet_lwip/enet_lwip.ld @@ -0,0 +1,57 @@ +/****************************************************************************** + * + * enet_lwip.ld - Linker configuration file for enet_lwip. + * + * Copyright (c) 2013-2014 Texas Instruments Incorporated. All rights reserved. + * Software License Agreement + * + * Texas Instruments (TI) is supplying this software for use solely and + * exclusively on TI's microcontroller products. The software is owned by + * TI and/or its suppliers, and is protected under applicable copyright + * laws. You may not combine this software with "viral" open-source + * software in order to form a larger program. + * + * THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. + * NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT + * NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY + * CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL + * DAMAGES, FOR ANY REASON WHATSOEVER. + * + * This is part of revision 2.1.0.12573 of the DK-TM4C129X Firmware Package. + * + *****************************************************************************/ + +MEMORY +{ + FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x00100000 + SRAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00040000 +} + +SECTIONS +{ + .text : + { + _text = .; + KEEP(*(.isr_vector)) + *(.text*) + *(.rodata*) + _etext = .; + } > FLASH + + .data : AT(ADDR(.text) + SIZEOF(.text)) + { + _data = .; + *(vtable) + *(.data*) + _edata = .; + } > SRAM + + .bss : + { + _bss = .; + *(.bss*) + *(COMMON) + _ebss = .; + } > SRAM +} diff --git a/boards/dk-tm4c129x/enet_lwip/enet_lwip.sct b/boards/dk-tm4c129x/enet_lwip/enet_lwip.sct new file mode 100644 index 0000000..1013c6d --- /dev/null +++ b/boards/dk-tm4c129x/enet_lwip/enet_lwip.sct @@ -0,0 +1,47 @@ +;****************************************************************************** +; +; enet_lwip.sct - Linker configuration file for enet_lwip. +; +; Copyright (c) 2013-2014 Texas Instruments Incorporated. All rights reserved. +; Software License Agreement +; +; Texas Instruments (TI) is supplying this software for use solely and +; exclusively on TI's microcontroller products. The software is owned by +; TI and/or its suppliers, and is protected under applicable copyright +; laws. You may not combine this software with "viral" open-source +; software in order to form a larger program. +; +; THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +; NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +; NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +; A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +; CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +; DAMAGES, FOR ANY REASON WHATSOEVER. +; +; This is part of revision 2.1.0.12573 of the DK-TM4C129X Firmware Package. +; +;****************************************************************************** + +LR_IROM 0x00000000 0x00100000 +{ + ; + ; Specify the Execution Address of the code and the size. + ; + ER_IROM 0x00000000 0x00100000 + { + *.o (RESET, +First) + * (InRoot$$Sections, +RO) + } + + ; + ; Specify the Execution Address of the data area. + ; + RW_IRAM 0x20000000 0x00040000 + { + ; + ; Uncomment the following line in order to use IntRegister(). + ; + ;* (vtable, +First) + * (+RW, +ZI) + } +} diff --git a/boards/dk-tm4c129x/enet_lwip/enet_lwip.uvopt b/boards/dk-tm4c129x/enet_lwip/enet_lwip.uvopt new file mode 100644 index 0000000..428b6c8 --- /dev/null +++ b/boards/dk-tm4c129x/enet_lwip/enet_lwip.uvopt @@ -0,0 +1,443 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + + + + 0 + 0 + + + + enet_lwip + 0x4 + ARM-ADS + + 25000000 + + 1 + 1 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\rvmdk\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 255 + + + 0 + Data Sheet + DATASHTS\Luminary\TM4C129XNCZAD.PDF + + + + SARMCM3.DLL + -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 0 + 1 + 0 + 0 + 4 + + + + + + + + + + + BIN\lmidk-agdi.dll + + + + 0 + lmidk-agdi + -O4614 -S1 -FO29 + + + 0 + DLGTARM + + + + 0 + ARMDBGFLAGS + + + + + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + Source + 1 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + .\enet_fs.c + enet_fs.c + + + 1 + 2 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + .\enet_lwip.c + enet_lwip.c + + + 1 + 3 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\..\third_party\fatfs\src\ff.c + ff.c + + + 1 + 4 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\drivers\frame.c + frame.c + + + 1 + 5 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\..\third_party\lwip-1.4.1\apps\httpserver_raw\httpd.c + httpd.c + + + 1 + 6 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\drivers\kentec320x240x16_ssd2119.c + kentec320x240x16_ssd2119.c + + + 1 + 7 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\..\utils\locator.c + locator.c + + + 1 + 8 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\..\utils\lwiplib.c + lwiplib.c + + + 1 + 9 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\..\third_party\fatfs\port\mmc-dk-tm4c129x.c + mmc-dk-tm4c129x.c + + + 1 + 10 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\drivers\pinout.c + pinout.c + + + 1 + 11 + 2 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + .\startup_rvmdk.S + startup_rvmdk.S + + + 1 + 12 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\..\utils\ustdlib.c + ustdlib.c + + + + + Libraries + 1 + 0 + 0 + + 2 + 13 + 4 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\..\driverlib\rvmdk\driverlib.lib + driverlib.lib + + + 2 + 14 + 4 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\..\grlib\rvmdk\grlib.lib + grlib.lib + + + + + Documentation + 1 + 0 + 0 + + 3 + 15 + 5 + 0 + 1 + 0 + 0 + 1 + 1 + 0 + .\readme.txt + readme.txt + + 44 + 0 + 1 + + -1 + -1 + + + -1 + -1 + + + 0 + 0 + 729 + 300 + + + + + + + 1 + 0 + + 100 + 0 + + + .\readme.txt + 0 + 1 + 1 + + + + + + diff --git a/boards/dk-tm4c129x/enet_lwip/enet_lwip.uvproj b/boards/dk-tm4c129x/enet_lwip/enet_lwip.uvproj new file mode 100644 index 0000000..0116cfd --- /dev/null +++ b/boards/dk-tm4c129x/enet_lwip/enet_lwip.uvproj @@ -0,0 +1,479 @@ + + + + 1.1 + +
### uVision Project, (C) Keil Software
+ + + + enet_lwip + 0x4 + ARM-ADS + + + TM4C129XNCZAD + Texas Instruments + IRAM(0x20000000-0x2003FFFF) IROM(0-0xFFFFF) CLOCK(25000000) CPUTYPE("Cortex-M4") FPU2 + + "STARTUP\Luminary\Startup.s" ("Luminary Startup Code") + UL2CM3(-O207 -S0 -C0 -FO7 -FD20000000 -FC800 -FN1 -FF0LM4F_1024 -FS00 -FL0100000) + 5919 + LM4Fxxxx.H + + + + + + + + + + 0 + + + + Luminary\ + Luminary\ + + 0 + 0 + 0 + 0 + 1 + + .\rvmdk\ + enet_lwip + 1 + 0 + 0 + 1 + 1 + .\rvmdk\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + + 1 + 0 + fromelf --bin --output .\rvmdk\enet_lwip.bin .\rvmdk\enet_lwip.axf + + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + + + SARMCM3.DLL + -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + + 1 + 0 + 0 + 0 + 16 + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + + + 1 + 1 + 0 + 1 + 1 + 1 + 0 + 1 + + 0 + 4 + + + + + + + + + + + + + + BIN\lmidk-agdi.dll + + + + + 1 + 0 + 0 + 0 + 1 + 4099 + + BIN\lmidk-agdi.dll + + + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M4" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 2 + 0 + 0 + 8 + 1 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x40000 + + + 1 + 0x0 + 0x100000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x100000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x40000 + + + 0 + 0x0 + 0x0 + + + + + + 0 + 3 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + + --c99 + rvmdk PART_TM4C129XNCZAD TARGET_IS_TM4C129_RA0 + + .;..;..\..\..\..;..\..\..\..\third_party\lwip-1.4.1\apps;..\..\..\..\third_party\lwip-1.4.1\ports\tiva-tm4c129\include;..\..\..\..\third_party\lwip-1.4.1\src\include;..\..\..\..\third_party\lwip-1.4.1\src\include\ipv4;..\..\..\..\third_party; + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x00000000 + 0x20000000 + enet_lwip.sct + + + --entry Reset_Handler + + + + + + + + Source + + + enet_fs.c + 1 + .\enet_fs.c + + + enet_lwip.c + 1 + .\enet_lwip.c + + + ff.c + 1 + ..\..\..\..\third_party\fatfs\src\ff.c + + + frame.c + 1 + ..\drivers\frame.c + + + httpd.c + 1 + ..\..\..\..\third_party\lwip-1.4.1\apps\httpserver_raw\httpd.c + + + kentec320x240x16_ssd2119.c + 1 + ..\drivers\kentec320x240x16_ssd2119.c + + + locator.c + 1 + ..\..\..\..\utils\locator.c + + + lwiplib.c + 1 + ..\..\..\..\utils\lwiplib.c + + + mmc-dk-tm4c129x.c + 1 + ..\..\..\..\third_party\fatfs\port\mmc-dk-tm4c129x.c + + + pinout.c + 1 + ..\drivers\pinout.c + + + startup_rvmdk.S + 2 + .\startup_rvmdk.S + + + ustdlib.c + 1 + ..\..\..\..\utils\ustdlib.c + + + + + Libraries + + + driverlib.lib + 4 + ..\..\..\..\driverlib\rvmdk\driverlib.lib + + + grlib.lib + 4 + ..\..\..\..\grlib\rvmdk\grlib.lib + + + + + Documentation + + + readme.txt + 5 + .\readme.txt + + + + + + + + diff --git a/boards/dk-tm4c129x/enet_lwip/enet_lwip_ccs.cmd b/boards/dk-tm4c129x/enet_lwip/enet_lwip_ccs.cmd new file mode 100644 index 0000000..8b42fbf --- /dev/null +++ b/boards/dk-tm4c129x/enet_lwip/enet_lwip_ccs.cmd @@ -0,0 +1,70 @@ +/****************************************************************************** + * + * enet_lwip_ccs.cmd - CCS linker configuration file for enet_lwip. + * + * Copyright (c) 2013-2014 Texas Instruments Incorporated. All rights reserved. + * Software License Agreement + * + * Texas Instruments (TI) is supplying this software for use solely and + * exclusively on TI's microcontroller products. The software is owned by + * TI and/or its suppliers, and is protected under applicable copyright + * laws. You may not combine this software with "viral" open-source + * software in order to form a larger program. + * + * THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. + * NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT + * NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY + * CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL + * DAMAGES, FOR ANY REASON WHATSOEVER. + * + * This is part of revision 2.1.0.12573 of the DK-TM4C129X Firmware Package. + * + *****************************************************************************/ + +--retain=g_pfnVectors + +/* The following command line options are set as part of the CCS project. */ +/* If you are building using the command line, or for some reason want to */ +/* define them here, you can uncomment and modify these lines as needed. */ +/* If you are using CCS for building, it is probably better to make any such */ +/* modifications in your CCS project and leave this file alone. */ +/* */ +/* --heap_size=0 */ +/* --stack_size=256 */ +/* --library=rtsv7M3_T_le_eabi.lib */ + +/* The starting address of the application. Normally the interrupt vectors */ +/* must be located at the beginning of the application. */ +#define APP_BASE 0x00000000 +#define RAM_BASE 0x20000000 + +/* System memory map */ + +MEMORY +{ + /* Application stored in and executes from internal flash */ + FLASH (RX) : origin = APP_BASE, length = 0x00100000 + /* Application uses internal RAM for data */ + SRAM (RWX) : origin = 0x20000000, length = 0x00040000 +} + +/* Section allocation in memory */ + +SECTIONS +{ + .intvecs: > APP_BASE + .text : > FLASH + .const : > FLASH + .cinit : > FLASH + .pinit : > FLASH + .init_array : > FLASH + + .vtable : > RAM_BASE + .data : > SRAM + .bss : > SRAM + .sysmem : > SRAM + .stack : > SRAM +} + +__STACK_TOP = __stack + 2048; diff --git a/boards/dk-tm4c129x/enet_lwip/ewarm/Exe/enet_lwip.bin b/boards/dk-tm4c129x/enet_lwip/ewarm/Exe/enet_lwip.bin new file mode 100644 index 0000000..e42598f Binary files /dev/null and b/boards/dk-tm4c129x/enet_lwip/ewarm/Exe/enet_lwip.bin differ diff --git a/boards/dk-tm4c129x/enet_lwip/ewarm/Exe/enet_lwip.out b/boards/dk-tm4c129x/enet_lwip/ewarm/Exe/enet_lwip.out new file mode 100644 index 0000000..7cc3450 Binary files /dev/null and b/boards/dk-tm4c129x/enet_lwip/ewarm/Exe/enet_lwip.out differ diff --git a/boards/dk-tm4c129x/enet_lwip/fs/404.htm b/boards/dk-tm4c129x/enet_lwip/fs/404.htm new file mode 100644 index 0000000..bc5fdb0 --- /dev/null +++ b/boards/dk-tm4c129x/enet_lwip/fs/404.htm @@ -0,0 +1,9 @@ + + + +
+

404 - file not found

+

Try here instead.

+
+ + diff --git a/boards/dk-tm4c129x/enet_lwip/fs/about.htm b/boards/dk-tm4c129x/enet_lwip/fs/about.htm new file mode 100644 index 0000000..41528ca --- /dev/null +++ b/boards/dk-tm4c129x/enet_lwip/fs/about.htm @@ -0,0 +1,32 @@ + + + + +DK-TM4C129X Development Kit + + + + +

About Texas Instruments

+
+
+Texas Instruments (TI) is a global +analog +and digital +semiconductor IC design +and manufacturing company. In addition to analog technologies, +digital signal processing (DSP) +and +microcontroller (MCU) +semiconductors, TI designs and manufactures semiconductor solutions for analog +and digital embedded and application processing. In the microcontroller space, +TI offers the broadest range of embedded control products, from ultra-low-power +MSP430™ +MCUs and high-performance +TMS320C2000™ +real-time controllers, to the 32 bit general-purpose ARM®-based MCUs of the +Tiva™ C Series +product line. Read more about us on the web at +www.ti.com. + + diff --git a/boards/dk-tm4c129x/enet_lwip/fs/block.htm b/boards/dk-tm4c129x/enet_lwip/fs/block.htm new file mode 100644 index 0000000..f9d4c04 --- /dev/null +++ b/boards/dk-tm4c129x/enet_lwip/fs/block.htm @@ -0,0 +1,17 @@ + + + + +DK-TM4C129X Development Kit + + + + +

TM4C129XNCZAD Block Diagram

+
+
+
+ +
+ + diff --git a/boards/dk-tm4c129x/enet_lwip/fs/block.jpg b/boards/dk-tm4c129x/enet_lwip/fs/block.jpg new file mode 100644 index 0000000..4a2504d Binary files /dev/null and b/boards/dk-tm4c129x/enet_lwip/fs/block.jpg differ diff --git a/boards/dk-tm4c129x/enet_lwip/fs/dk-tm4c129x.jpg b/boards/dk-tm4c129x/enet_lwip/fs/dk-tm4c129x.jpg new file mode 100644 index 0000000..e59a70b Binary files /dev/null and b/boards/dk-tm4c129x/enet_lwip/fs/dk-tm4c129x.jpg differ diff --git a/boards/dk-tm4c129x/enet_lwip/fs/favicon.ico b/boards/dk-tm4c129x/enet_lwip/fs/favicon.ico new file mode 100644 index 0000000..d14b5d9 Binary files /dev/null and b/boards/dk-tm4c129x/enet_lwip/fs/favicon.ico differ diff --git a/boards/dk-tm4c129x/enet_lwip/fs/index.htm b/boards/dk-tm4c129x/enet_lwip/fs/index.htm new file mode 100644 index 0000000..f3e8e78 --- /dev/null +++ b/boards/dk-tm4c129x/enet_lwip/fs/index.htm @@ -0,0 +1,54 @@ + + + + + DK-TM4C129X Development Kit + + + + + +
+ + + + + + +
+ + Texas Instruments + + +
+ Tiva™ C Series TM4C129X Development Kit +
+
+ DK-TM4C129X +
+ 		+ + TM4C + +
+
+
+ +
+
+
+
+ Copyright © 2013-2014 Texas Instruments Incorporated. All rights reserved. +
+ + diff --git a/boards/dk-tm4c129x/enet_lwip/fs/javascript.js b/boards/dk-tm4c129x/enet_lwip/fs/javascript.js new file mode 100644 index 0000000..e492c23 --- /dev/null +++ b/boards/dk-tm4c129x/enet_lwip/fs/javascript.js @@ -0,0 +1,53 @@ + + +window.onload = function() +{ + document.getElementById('about').onclick = loadAbout; + document.getElementById('overview').onclick = loadOverview; + document.getElementById('block').onclick = loadBlock; + + loadPage("about.htm"); +} + +function loadAbout() +{ + loadPage("about.htm"); + return false; +} + +function loadOverview() +{ + loadPage("overview.htm"); + return false; +} + +function loadBlock() +{ + loadPage("block.htm"); + return false; +} + +function loadPage(page) +{ + if(window.XMLHttpRequest) + { + xmlhttp = new XMLHttpRequest(); + } + else + { + xmlhttp = new ActiveXObject("Microsoft.XMLHTTP"); + } + + xmlhttp.open("GET", page, true); + xmlhttp.setRequestHeader("Content-type", + "application/x-www-form-urlencoded"); + xmlhttp.send(); + + xmlhttp.onreadystatechange = function () + { + if((xmlhttp.readyState == 4) && (xmlhttp.status == 200)) + { + document.getElementById("content").innerHTML = xmlhttp.responseText; + } + } +} diff --git a/boards/dk-tm4c129x/enet_lwip/fs/overview.htm b/boards/dk-tm4c129x/enet_lwip/fs/overview.htm new file mode 100644 index 0000000..b4f9094 --- /dev/null +++ b/boards/dk-tm4c129x/enet_lwip/fs/overview.htm @@ -0,0 +1,29 @@ + + + + +DK-TM4C129X Development Kit + + + + +

Tiva™ C Series Product Line

+
+
+As the first ARM® Cortex™-M4 microcontrollers (MCUs) to be +implemented on TI's proprietary 65-nm process technology, the Tiva C Series +provides customers an opportunity to increase their connectivity integration +without sacrificing price, performance, or power consumption. Every C Series +MCU integrates a floating-point core and high-performance analog while still +providing low-power modes to offer a great set of functional options. Today's +engineers understand that designs require more than hardware alone. Often, the +greatest challenge is software and +TivaWare for C Series is a +free library of C files that include both peripheral-level and +application-level code in source and in ROM for every Tiva C Series MCU. This +offering delivers USB, CAN, graphics, and sensor application libraries so +customers can focus their efforts on building applications instead of +programming their connectivity peripherals. The Tiva C Series provides an +excellent baseline for home, building, and industrial applications. + + diff --git a/boards/dk-tm4c129x/enet_lwip/fs/styles.css b/boards/dk-tm4c129x/enet_lwip/fs/styles.css new file mode 100644 index 0000000..3403359 --- /dev/null +++ b/boards/dk-tm4c129x/enet_lwip/fs/styles.css @@ -0,0 +1,104 @@ +/* Copyright (c) 2013-2014 Texas Instruments Incorporated. All rights reserved. */ + +/* Styling for the entire document. */ +body +{ + background-color: white; + color: black; + font-family: Ariel,Helvetica,sans-serif; +} + +/* Styling for the heading div. */ +#heading +{ + clear: both; + margin-bottom: 10px; +} + +#heading_h1 +{ + font-size: 2em; + font-weight: bold; + text-align: center; +} + +#heading_h2 +{ + font-size: 1.25em; + font-weight: bold; + text-align: center; +} + +#heading hr +{ + border-bottom: 1px solid #ff0000; + border-top: 1px solid #ff0000; +} + +#heading a img +{ + border: 0; +} + +/* Styling for the menu div. */ +#menu +{ + float: left; + margin-bottom: 10px; + width: 225px; +} + +#menu ul +{ + list-style-type: none; + margin: 0; + padding: 0; +} + +#menu a:link, #menu a:visited +{ + background-color: #ff0000; + color: #ffffff; + display: block; + font-weight: bold; + margin-bottom: 2px; + margin-top: 2px; + padding: 4px; + text-align: center; + text-decoration: none; + width: 200px; +} + +#menu a:hover, #menu a:active +{ + background-color: #bf0000; +} + +/* Styling for the content div. */ +#content +{ + margin-bottom: 10px; + margin-left: 225px; +} + +#content_heading +{ + font-size: 1.5em; + font-weight: bold; + text-align: center; +} + +/* Styling for the footing div. */ +#footing +{ + clear: both; + font-size: .75em; + font-style: italic; + text-align: right; +} + +#footing hr +{ + border-bottom: 1px solid #ff0000; + border-top: 1px solid #ff0000; +} diff --git a/boards/dk-tm4c129x/enet_lwip/fs/ti.jpg b/boards/dk-tm4c129x/enet_lwip/fs/ti.jpg new file mode 100644 index 0000000..5d1669c Binary files /dev/null and b/boards/dk-tm4c129x/enet_lwip/fs/ti.jpg differ diff --git a/boards/dk-tm4c129x/enet_lwip/fs/tm4c.jpg b/boards/dk-tm4c129x/enet_lwip/fs/tm4c.jpg new file mode 100644 index 0000000..1672a1d Binary files /dev/null and b/boards/dk-tm4c129x/enet_lwip/fs/tm4c.jpg differ diff --git a/boards/dk-tm4c129x/enet_lwip/gcc/enet_lwip.axf b/boards/dk-tm4c129x/enet_lwip/gcc/enet_lwip.axf new file mode 100644 index 0000000..636e57c Binary files /dev/null and b/boards/dk-tm4c129x/enet_lwip/gcc/enet_lwip.axf differ diff --git a/boards/dk-tm4c129x/enet_lwip/gcc/enet_lwip.bin b/boards/dk-tm4c129x/enet_lwip/gcc/enet_lwip.bin new file mode 100644 index 0000000..5f84444 Binary files /dev/null and b/boards/dk-tm4c129x/enet_lwip/gcc/enet_lwip.bin differ diff --git a/boards/dk-tm4c129x/enet_lwip/lwipopts.h b/boards/dk-tm4c129x/enet_lwip/lwipopts.h new file mode 100644 index 0000000..314d1d1 --- /dev/null +++ b/boards/dk-tm4c129x/enet_lwip/lwipopts.h @@ -0,0 +1,439 @@ +//***************************************************************************** +// +// lwipopts.h - Configuration file for lwIP +// +// Copyright (c) 2013-2014 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 2.1.0.12573 of the DK-TM4C129X Firmware Package. +// +//***************************************************************************** +// +// NOTE: This file has been derived from the lwIP/src/include/lwip/opt.h +// header file. +// +// For additional details, refer to the original "opt.h" file, and lwIP +// documentation. +// +//***************************************************************************** + +#ifndef __LWIPOPTS_H__ +#define __LWIPOPTS_H__ + +//***************************************************************************** +// +// ---------- Stellaris / lwIP Port Options ---------- +// +//***************************************************************************** +#define HOST_TMR_INTERVAL 100 // default is 0 +//#define DHCP_EXPIRE_TIMER_MSECS (60 * 1000) +//#define LWIP_HTTPD_SSI 1 +//#define LWIP_HTTPD_CGI 1 +#define LWIP_HTTPD_DYNAMIC_HEADERS 1 +//#define HTTPD_DEBUG LWIP_DBG_ON +#define EMAC_PHY_CONFIG (EMAC_PHY_TYPE_INTERNAL | EMAC_PHY_INT_MDIX_EN | \ + EMAC_PHY_AN_100B_T_FULL_DUPLEX) +#define PHY_PHYS_ADDR 0 +#define NUM_TX_DESCRIPTORS 24 +#define NUM_RX_DESCRIPTORS 8 + +//***************************************************************************** +// +// ---------- Platform specific locking ---------- +// +//***************************************************************************** +#define SYS_LIGHTWEIGHT_PROT 1 // default is 0 +#define NO_SYS 1 // default is 0 +//#define MEMCPY(dst,src,len) memcpy(dst,src,len) +//#define SMEMCPY(dst,src,len) memcpy(dst,src,len) + +//***************************************************************************** +// +// ---------- Memory options ---------- +// +//***************************************************************************** +//#define MEM_LIBC_MALLOC 0 +#define MEM_ALIGNMENT 4 +#define MEM_SIZE (64 * 1024) +//#define MEMP_OVERFLOW_CHECK 0 +//#define MEMP_SANITY_CHECK 0 +//#define MEM_USE_POOLS 0 +//#define MEMP_USE_CUSTOM_POOLS 0 + +//***************************************************************************** +// +// ---------- Internal Memory Pool Sizes ---------- +// +//***************************************************************************** +#define MEMP_NUM_PBUF 48 // Default 16 +//#define MEMP_NUM_RAW_PCB 4 +//#define MEMP_NUM_UDP_PCB 4 +#define MEMP_NUM_TCP_PCB 16 // Default 5 +//#define MEMP_NUM_TCP_PCB_LISTEN 8 +//#define MEMP_NUM_TCP_SEG 16 +//#define MEMP_NUM_REASSDATA 5 +//#define MEMP_NUM_ARP_QUEUE 30 +//#define MEMP_NUM_IGMP_GROUP 8 +#define MEMP_NUM_SYS_TIMEOUT 8 +//#define MEMP_NUM_NETBUF 2 +//#define MEMP_NUM_NETCONN 4 +//#define MEMP_NUM_TCPIP_MSG_API 8 +//#define MEMP_NUM_TCPIP_MSG_INPKT 8 +#define PBUF_POOL_SIZE 48 // Default 16 + +//***************************************************************************** +// +// ---------- ARP options ---------- +// +//***************************************************************************** +//#define LWIP_ARP 1 +//#define ARP_TABLE_SIZE 10 +//#define ARP_QUEUEING 1 +//#define ETHARP_TRUST_IP_MAC 1 + +//***************************************************************************** +// +// ---------- IP options ---------- +// +//***************************************************************************** +//#define IP_FORWARD 0 +//#define IP_OPTIONS_ALLOWED 1 +#define IP_REASSEMBLY 0 // default is 1 +#define IP_FRAG 0 // default is 1 +//#define IP_REASS_MAXAGE 3 +//#define IP_REASS_MAX_PBUFS 10 +//#define IP_FRAG_USES_STATIC_BUF 1 +//#define IP_FRAG_MAX_MTU 1500 +//#define IP_DEFAULT_TTL 255 + +//***************************************************************************** +// +// ---------- ICMP options ---------- +// +//***************************************************************************** +//#define LWIP_ICMP 1 +//#define ICMP_TTL (IP_DEFAULT_TTL) + +//***************************************************************************** +// +// ---------- RAW options ---------- +// +//***************************************************************************** +//#define LWIP_RAW 1 +//#define RAW_TTL (IP_DEFAULT_TTL) + +//***************************************************************************** +// +// ---------- DHCP options ---------- +// +//***************************************************************************** +#define LWIP_DHCP 1 // default is 0 +//#define DHCP_DOES_ARP_CHECK ((LWIP_DHCP) && (LWIP_ARP)) + +//***************************************************************************** +// +// ---------- UPNP options ---------- +// +//***************************************************************************** +//#define LWIP_UPNP 0 + +//***************************************************************************** +// +// ---------- PTPD options ---------- +// +//***************************************************************************** +//#define LWIP_PTPD 0 + +//***************************************************************************** +// +// ---------- AUTOIP options ---------- +// +//***************************************************************************** +#define LWIP_AUTOIP 1 // default is 0 +#define LWIP_DHCP_AUTOIP_COOP ((LWIP_DHCP) && (LWIP_AUTOIP)) + // default is 0 +#define LWIP_DHCP_AUTOIP_COOP_TRIES 5 // default is 9 + +//***************************************************************************** +// +// ---------- SNMP options ---------- +// +//***************************************************************************** +//#define LWIP_SNMP 0 +//#define SNMP_CONCURRENT_REQUESTS 1 +//#define SNMP_TRAP_DESTINATIONS 1 +//#define SNMP_PRIVATE_MIB 0 +//#define SNMP_SAFE_REQUESTS 1 + +//***************************************************************************** +// +// ---------- IGMP options ---------- +// +//***************************************************************************** +//#define LWIP_IGMP 0 + +//***************************************************************************** +// +// ---------- DNS options ----------- +// +//***************************************************************************** +//#define LWIP_DNS 0 +//#define DNS_TABLE_SIZE 4 +//#define DNS_MAX_NAME_LENGTH 256 +//#define DNS_MAX_SERVERS 2 +//#define DNS_DOES_NAME_CHECK 1 +//#define DNS_USES_STATIC_BUF 1 +//#define DNS_MSG_SIZE 512 + +//***************************************************************************** +// +// ---------- UDP options ---------- +// +//***************************************************************************** +//#define LWIP_UDP 1 +//#define LWIP_UDPLITE 0 +//#define UDP_TTL (IP_DEFAULT_TTL) + +//***************************************************************************** +// +// ---------- TCP options ---------- +// +//***************************************************************************** +#define LWIP_TCP 1 +//#define TCP_TTL (IP_DEFAULT_TTL) +#define TCP_WND 4096 // default is 2048 +//#define TCP_MAXRTX 12 +//#define TCP_SYNMAXRTX 6 +//#define TCP_QUEUE_OOSEQ 1 +#define TCP_MSS 1500 // default is 128 +//#define TCP_CALCULATE_EFF_SEND_MSS 1 +#define TCP_SND_BUF (4 * TCP_MSS) + // default is 256, was 6 * +//#define TCP_SND_QUEUELEN (4 * (TCP_SND_BUF/TCP_MSS)) +//#define TCP_SNDLOWAT (TCP_SND_BUF/2) +//#define TCP_LISTEN_BACKLOG 0 +//#define TCP_DEFAULT_LISTEN_BACKLOG 0xff + +//***************************************************************************** +// +// ---------- API options ---------- +// +//***************************************************************************** +//#define LWIP_EVENT_API 0 +//#define LWIP_CALLBACK_API 1 + +//***************************************************************************** +// +// ---------- Pbuf options ---------- +// +//***************************************************************************** +#define PBUF_LINK_HLEN 16 // default is 14 +#define PBUF_POOL_BUFSIZE 512 + // default is LWIP_MEM_ALIGN_SIZE(TCP_MSS+40+PBUF_LINK_HLEN) +#define ETH_PAD_SIZE 0 // default is 0 + +//***************************************************************************** +// +// ---------- Network Interfaces options ---------- +// +//***************************************************************************** +//#define LWIP_NETIF_HOSTNAME 0 +//#define LWIP_NETIF_API 0 +//#define LWIP_NETIF_STATUS_CALLBACK 0 +//#define LWIP_NETIF_LINK_CALLBACK 0 +//#define LWIP_NETIF_HWADDRHINT 0 + +//***************************************************************************** +// +// ---------- LOOPIF options ---------- +// +//***************************************************************************** +//#define LWIP_HAVE_LOOPIF 0 +//#define LWIP_LOOPIF_MULTITHREADING 1 + +//***************************************************************************** +// +// ---------- Thread options ---------- +// +//***************************************************************************** +//#define TCPIP_THREAD_NAME "tcpip_thread" +//#define TCPIP_THREAD_STACKSIZE 0 +//#define TCPIP_THREAD_PRIO 1 +//#define TCPIP_MBOX_SIZE 0 +//#define SLIPIF_THREAD_NAME "slipif_loop" +//#define SLIPIF_THREAD_STACKSIZE 0 +//#define SLIPIF_THREAD_PRIO 1 +//#define PPP_THREAD_NAME "pppMain" +//#define PPP_THREAD_STACKSIZE 0 +//#define PPP_THREAD_PRIO 1 +//#define DEFAULT_THREAD_NAME "lwIP" +//#define DEFAULT_THREAD_STACKSIZE 0 +//#define DEFAULT_THREAD_PRIO 1 +//#define DEFAULT_RAW_RECVMBOX_SIZE 0 +//#define DEFAULT_UDP_RECVMBOX_SIZE 0 +//#define DEFAULT_TCP_RECVMBOX_SIZE 0 +//#define DEFAULT_ACCEPTMBOX_SIZE 0 + +//***************************************************************************** +// +// ---------- Sequential layer options ---------- +// +//***************************************************************************** +//#define LWIP_TCPIP_CORE_LOCKING 0 +#define LWIP_NETCONN 0 // default is 1 + +//***************************************************************************** +// +// ---------- Socket Options ---------- +// +//***************************************************************************** +#define LWIP_SOCKET 0 // default is 1 +//#define LWIP_COMPAT_SOCKETS 1 +//#define LWIP_POSIX_SOCKETS_IO_NAMES 1 +//#define LWIP_TCP_KEEPALIVE 0 +//#define LWIP_SO_RCVTIMEO 0 +//#define LWIP_SO_RCVBUF 0 +//#define SO_REUSE 0 + +//***************************************************************************** +// +// ---------- Statistics options ---------- +// +//***************************************************************************** +//#define LWIP_STATS 1 +//#define LWIP_STATS_DISPLAY 0 +//#define LINK_STATS 1 +//#define ETHARP_STATS (LWIP_ARP) +//#define IP_STATS 1 +//#define IPFRAG_STATS (IP_REASSEMBLY || IP_FRAG) +//#define ICMP_STATS 1 +//#define IGMP_STATS (LWIP_IGMP) +//#define UDP_STATS (LWIP_UDP) +//#define TCP_STATS (LWIP_TCP) +//#define MEM_STATS 1 +//#define MEMP_STATS 1 +//#define SYS_STATS 1 + +//***************************************************************************** +// +// ---------- PPP options ---------- +// +//***************************************************************************** +//#define PPP_SUPPORT 0 +//#define PPPOE_SUPPORT 0 +//#define PPPOS_SUPPORT PPP_SUPPORT + +#if PPP_SUPPORT +//#define NUM_PPP 1 +//#define PAP_SUPPORT 0 +//#define CHAP_SUPPORT 0 +//#define MSCHAP_SUPPORT 0 +//#define CBCP_SUPPORT 0 +//#define CCP_SUPPORT 0 +//#define VJ_SUPPORT 0 +//#define MD5_SUPPORT 0 +//#define FSM_DEFTIMEOUT 6 +//#define FSM_DEFMAXTERMREQS 2 +//#define FSM_DEFMAXCONFREQS 10 +//#define FSM_DEFMAXNAKLOOPS 5 +//#define UPAP_DEFTIMEOUT 6 +//#define UPAP_DEFREQTIME 30 +//#define CHAP_DEFTIMEOUT 6 +//#define CHAP_DEFTRANSMITS 10 +//#define LCP_ECHOINTERVAL 0 +//#define LCP_MAXECHOFAILS 3 +//#define PPP_MAXIDLEFLAG 100 + +//#define PPP_MAXMTU 1500 +//#define PPP_DEFMRU 296 +#endif + +//***************************************************************************** +// +// ---------- checksum options ---------- +// +//***************************************************************************** +#define CHECKSUM_GEN_IP 0 +#define CHECKSUM_GEN_ICMP 0 +#define CHECKSUM_GEN_UDP 0 +#define CHECKSUM_GEN_TCP 0 +#define CHECKSUM_CHECK_IP 0 +#define CHECKSUM_CHECK_UDP 0 +#define CHECKSUM_CHECK_TCP 0 + +//***************************************************************************** +// +// ---------- Debugging options ---------- +// +//***************************************************************************** +#if 0 +#define U8_F "c" +#define S8_F "c" +#define X8_F "x" +#define U16_F "u" +#define S16_F "d" +#define X16_F "x" +#define U32_F "u" +#define S32_F "d" +#define X32_F "x" +extern void UARTprintf(const char *pcString, ...); +#define LWIP_DEBUG +#endif + +//#define LWIP_DBG_MIN_LEVEL LWIP_DBG_LEVEL_OFF +#define LWIP_DBG_MIN_LEVEL LWIP_DBG_LEVEL_OFF +//#define LWIP_DBG_MIN_LEVEL LWIP_DBG_LEVEL_WARNING +//#define LWIP_DBG_MIN_LEVEL LWIP_DBG_LEVEL_SERIOUS +//#define LWIP_DBG_MIN_LEVEL LWIP_DBG_LEVEL_SEVERE + +//#define LWIP_DBG_TYPES_ON LWIP_DBG_ON +#define LWIP_DBG_TYPES_ON (LWIP_DBG_ON|LWIP_DBG_TRACE|LWIP_DBG_STATE|LWIP_DBG_FRESH) + +//#define ETHARP_DEBUG LWIP_DBG_ON // default is OFF +//#define NETIF_DEBUG LWIP_DBG_ON // default is OFF +//#define PBUF_DEBUG LWIP_DBG_OFF +//#define API_LIB_DEBUG LWIP_DBG_OFF +//#define API_MSG_DEBUG LWIP_DBG_OFF +//#define SOCKETS_DEBUG LWIP_DBG_OFF +//#define ICMP_DEBUG LWIP_DBG_OFF +//#define IGMP_DEBUG LWIP_DBG_OFF +//#define INET_DEBUG LWIP_DBG_OFF +//#define IP_DEBUG LWIP_DBG_ON // default is OFF +//#define IP_REASS_DEBUG LWIP_DBG_OFF +//#define RAW_DEBUG LWIP_DBG_OFF +//#define MEM_DEBUG LWIP_DBG_OFF +//#define MEMP_DEBUG LWIP_DBG_OFF +//#define SYS_DEBUG LWIP_DBG_OFF +//#define TCP_DEBUG LWIP_DBG_OFF +//#define TCP_INPUT_DEBUG LWIP_DBG_OFF +//#define TCP_FR_DEBUG LWIP_DBG_OFF +//#define TCP_RTO_DEBUG LWIP_DBG_OFF +//#define TCP_CWND_DEBUG LWIP_DBG_OFF +//#define TCP_WND_DEBUG LWIP_DBG_OFF +//#define TCP_OUTPUT_DEBUG LWIP_DBG_OFF +//#define TCP_RST_DEBUG LWIP_DBG_OFF +//#define TCP_QLEN_DEBUG LWIP_DBG_OFF +//#define UDP_DEBUG LWIP_DBG_ON // default is OFF +//#define TCPIP_DEBUG LWIP_DBG_OFF +//#define PPP_DEBUG LWIP_DBG_OFF +//#define SLIP_DEBUG LWIP_DBG_OFF +//#define DHCP_DEBUG LWIP_DBG_ON // default is OFF +//#define AUTOIP_DEBUG LWIP_DBG_OFF +//#define SNMP_MSG_DEBUG LWIP_DBG_OFF +//#define SNMP_MIB_DEBUG LWIP_DBG_OFF +//#define DNS_DEBUG LWIP_DBG_OFF + +#endif /* __LWIPOPTS_H__ */ diff --git a/boards/dk-tm4c129x/enet_lwip/readme.txt b/boards/dk-tm4c129x/enet_lwip/readme.txt new file mode 100644 index 0000000..605aa1c --- /dev/null +++ b/boards/dk-tm4c129x/enet_lwip/readme.txt @@ -0,0 +1,41 @@ +Ethernet with lwIP + +This example application demonstrates the operation of the Tiva +Ethernet controller using the lwIP TCP/IP Stack configured to operate as +an HTTP file server (web server). DHCP is used to obtain an Ethernet +address. If DHCP times out without obtaining an address, AUTOIP will be +used to obtain a link-local address. The address that is selected will be +shown on the QVGA display. + +The file system code will first check to see if an SD card has been plugged +into the microSD slot. If so, all file requests from the web server will +be directed to the SD card. Otherwise, a default set of pages served up +by an internal file system will be used. Source files for the internal +file system image can be found in the ``fs'' directory. If any of these +files are changed, the file system image (enet_fsdata.h) should be +rebuilt using the command: + + ../../../../tools/bin/makefsfile -i fs -o enet_fsdata.h -r -h -q + +For additional details on lwIP, refer to the lwIP web page at: +http://savannah.nongnu.org/projects/lwip/ + +------------------------------------------------------------------------------- + +Copyright (c) 2013-2014 Texas Instruments Incorporated. All rights reserved. +Software License Agreement + +Texas Instruments (TI) is supplying this software for use solely and +exclusively on TI's microcontroller products. The software is owned by +TI and/or its suppliers, and is protected under applicable copyright +laws. You may not combine this software with "viral" open-source +software in order to form a larger program. + +THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +DAMAGES, FOR ANY REASON WHATSOEVER. + +This is part of revision 2.1.0.12573 of the DK-TM4C129X Firmware Package. diff --git a/boards/dk-tm4c129x/enet_lwip/rvmdk/enet_lwip.axf b/boards/dk-tm4c129x/enet_lwip/rvmdk/enet_lwip.axf new file mode 100644 index 0000000..ef7bd87 Binary files /dev/null and b/boards/dk-tm4c129x/enet_lwip/rvmdk/enet_lwip.axf differ diff --git a/boards/dk-tm4c129x/enet_lwip/rvmdk/enet_lwip.bin b/boards/dk-tm4c129x/enet_lwip/rvmdk/enet_lwip.bin new file mode 100644 index 0000000..3be1620 Binary files /dev/null and b/boards/dk-tm4c129x/enet_lwip/rvmdk/enet_lwip.bin differ diff --git a/boards/dk-tm4c129x/enet_lwip/startup_ccs.c b/boards/dk-tm4c129x/enet_lwip/startup_ccs.c new file mode 100644 index 0000000..09439c6 --- /dev/null +++ b/boards/dk-tm4c129x/enet_lwip/startup_ccs.c @@ -0,0 +1,276 @@ +//***************************************************************************** +// +// startup_ccs.c - Startup code for use with TI's Code Composer Studio. +// +// Copyright (c) 2013-2014 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 2.1.0.12573 of the DK-TM4C129X Firmware Package. +// +//***************************************************************************** + +#include +#include "inc/hw_nvic.h" +#include "inc/hw_types.h" + +//***************************************************************************** +// +// Forward declaration of the default fault handlers. +// +//***************************************************************************** +void ResetISR(void); +static void NmiSR(void); +static void FaultISR(void); +static void IntDefaultHandler(void); + +//***************************************************************************** +// +// External declaration for the reset handler that is to be called when the +// processor is started +// +//***************************************************************************** +extern void _c_int00(void); + +//***************************************************************************** +// +// Linker variable that marks the top of the stack. +// +//***************************************************************************** +extern uint32_t __STACK_TOP; + +//***************************************************************************** +// +// External declarations for the interrupt handlers used by the application. +// +//***************************************************************************** +extern void lwIPEthernetIntHandler(void); +extern void SysTickIntHandler(void); + +//***************************************************************************** +// +// The vector table. Note that the proper constructs must be placed on this to +// ensure that it ends up at physical address 0x0000.0000 or at the start of +// the program if located at a start address other than 0. +// +//***************************************************************************** +#pragma DATA_SECTION(g_pfnVectors, ".intvecs") +void (* const g_pfnVectors[])(void) = +{ + (void (*)(void))((uint32_t)&__STACK_TOP), + // The initial stack pointer + ResetISR, // The reset handler + NmiSR, // The NMI handler + FaultISR, // The hard fault handler + IntDefaultHandler, // The MPU fault handler + IntDefaultHandler, // The bus fault handler + IntDefaultHandler, // The usage fault handler + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // SVCall handler + IntDefaultHandler, // Debug monitor handler + 0, // Reserved + IntDefaultHandler, // The PendSV handler + SysTickIntHandler, // The SysTick handler + IntDefaultHandler, // GPIO Port A + IntDefaultHandler, // GPIO Port B + IntDefaultHandler, // GPIO Port C + IntDefaultHandler, // GPIO Port D + IntDefaultHandler, // GPIO Port E + IntDefaultHandler, // UART0 Rx and Tx + IntDefaultHandler, // UART1 Rx and Tx + IntDefaultHandler, // SSI0 Rx and Tx + IntDefaultHandler, // I2C0 Master and Slave + IntDefaultHandler, // PWM Fault + IntDefaultHandler, // PWM Generator 0 + IntDefaultHandler, // PWM Generator 1 + IntDefaultHandler, // PWM Generator 2 + IntDefaultHandler, // Quadrature Encoder 0 + IntDefaultHandler, // ADC Sequence 0 + IntDefaultHandler, // ADC Sequence 1 + IntDefaultHandler, // ADC Sequence 2 + IntDefaultHandler, // ADC Sequence 3 + IntDefaultHandler, // Watchdog timer + IntDefaultHandler, // Timer 0 subtimer A + IntDefaultHandler, // Timer 0 subtimer B + IntDefaultHandler, // Timer 1 subtimer A + IntDefaultHandler, // Timer 1 subtimer B + IntDefaultHandler, // Timer 2 subtimer A + IntDefaultHandler, // Timer 2 subtimer B + IntDefaultHandler, // Analog Comparator 0 + IntDefaultHandler, // Analog Comparator 1 + IntDefaultHandler, // Analog Comparator 2 + IntDefaultHandler, // System Control (PLL, OSC, BO) + IntDefaultHandler, // FLASH Control + IntDefaultHandler, // GPIO Port F + IntDefaultHandler, // GPIO Port G + IntDefaultHandler, // GPIO Port H + IntDefaultHandler, // UART2 Rx and Tx + IntDefaultHandler, // SSI1 Rx and Tx + IntDefaultHandler, // Timer 3 subtimer A + IntDefaultHandler, // Timer 3 subtimer B + IntDefaultHandler, // I2C1 Master and Slave + IntDefaultHandler, // CAN0 + IntDefaultHandler, // CAN1 + lwIPEthernetIntHandler, // Ethernet + IntDefaultHandler, // Hibernate + IntDefaultHandler, // USB0 + IntDefaultHandler, // PWM Generator 3 + IntDefaultHandler, // uDMA Software Transfer + IntDefaultHandler, // uDMA Error + IntDefaultHandler, // ADC1 Sequence 0 + IntDefaultHandler, // ADC1 Sequence 1 + IntDefaultHandler, // ADC1 Sequence 2 + IntDefaultHandler, // ADC1 Sequence 3 + IntDefaultHandler, // External Bus Interface 0 + IntDefaultHandler, // GPIO Port J + IntDefaultHandler, // GPIO Port K + IntDefaultHandler, // GPIO Port L + IntDefaultHandler, // SSI2 Rx and Tx + IntDefaultHandler, // SSI3 Rx and Tx + IntDefaultHandler, // UART3 Rx and Tx + IntDefaultHandler, // UART4 Rx and Tx + IntDefaultHandler, // UART5 Rx and Tx + IntDefaultHandler, // UART6 Rx and Tx + IntDefaultHandler, // UART7 Rx and Tx + IntDefaultHandler, // I2C2 Master and Slave + IntDefaultHandler, // I2C3 Master and Slave + IntDefaultHandler, // Timer 4 subtimer A + IntDefaultHandler, // Timer 4 subtimer B + IntDefaultHandler, // Timer 5 subtimer A + IntDefaultHandler, // Timer 5 subtimer B + IntDefaultHandler, // FPU + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // I2C4 Master and Slave + IntDefaultHandler, // I2C5 Master and Slave + IntDefaultHandler, // GPIO Port M + IntDefaultHandler, // GPIO Port N + 0, // Reserved + IntDefaultHandler, // Tamper + IntDefaultHandler, // GPIO Port P (Summary or P0) + IntDefaultHandler, // GPIO Port P1 + IntDefaultHandler, // GPIO Port P2 + IntDefaultHandler, // GPIO Port P3 + IntDefaultHandler, // GPIO Port P4 + IntDefaultHandler, // GPIO Port P5 + IntDefaultHandler, // GPIO Port P6 + IntDefaultHandler, // GPIO Port P7 + IntDefaultHandler, // GPIO Port Q (Summary or Q0) + IntDefaultHandler, // GPIO Port Q1 + IntDefaultHandler, // GPIO Port Q2 + IntDefaultHandler, // GPIO Port Q3 + IntDefaultHandler, // GPIO Port Q4 + IntDefaultHandler, // GPIO Port Q5 + IntDefaultHandler, // GPIO Port Q6 + IntDefaultHandler, // GPIO Port Q7 + IntDefaultHandler, // GPIO Port R + IntDefaultHandler, // GPIO Port S + IntDefaultHandler, // SHA/MD5 0 + IntDefaultHandler, // AES 0 + IntDefaultHandler, // DES3DES 0 + IntDefaultHandler, // LCD Controller 0 + IntDefaultHandler, // Timer 6 subtimer A + IntDefaultHandler, // Timer 6 subtimer B + IntDefaultHandler, // Timer 7 subtimer A + IntDefaultHandler, // Timer 7 subtimer B + IntDefaultHandler, // I2C6 Master and Slave + IntDefaultHandler, // I2C7 Master and Slave + IntDefaultHandler, // HIM Scan Matrix Keyboard 0 + IntDefaultHandler, // One Wire 0 + IntDefaultHandler, // HIM PS/2 0 + IntDefaultHandler, // HIM LED Sequencer 0 + IntDefaultHandler, // HIM Consumer IR 0 + IntDefaultHandler, // I2C8 Master and Slave + IntDefaultHandler, // I2C9 Master and Slave + IntDefaultHandler // GPIO Port T +}; + +//***************************************************************************** +// +// This is the code that gets called when the processor first starts execution +// following a reset event. Only the absolutely necessary set is performed, +// after which the application supplied entry() routine is called. Any fancy +// actions (such as making decisions based on the reset cause register, and +// resetting the bits in that register) are left solely in the hands of the +// application. +// +//***************************************************************************** +void +ResetISR(void) +{ + // + // Jump to the CCS C initialization routine. This will enable the + // floating-point unit as well, so that does not need to be done here. + // + __asm(" .global _c_int00\n" + " b.w _c_int00"); +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a NMI. This +// simply enters an infinite loop, preserving the system state for examination +// by a debugger. +// +//***************************************************************************** +static void +NmiSR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a fault +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +FaultISR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives an unexpected +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +IntDefaultHandler(void) +{ + // + // Go into an infinite loop. + // + while(1) + { + } +} diff --git a/boards/dk-tm4c129x/enet_lwip/startup_ewarm.c b/boards/dk-tm4c129x/enet_lwip/startup_ewarm.c new file mode 100644 index 0000000..21174f2 --- /dev/null +++ b/boards/dk-tm4c129x/enet_lwip/startup_ewarm.c @@ -0,0 +1,307 @@ +//***************************************************************************** +// +// startup_ewarm.c - Startup code for use with IAR's Embedded Workbench, +// version 5. +// +// Copyright (c) 2013-2014 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 2.1.0.12573 of the DK-TM4C129X Firmware Package. +// +//***************************************************************************** + +#include +#include "inc/hw_nvic.h" +#include "inc/hw_types.h" + +//***************************************************************************** +// +// Enable the IAR extensions for this source file. +// +//***************************************************************************** +#pragma language=extended + +//***************************************************************************** +// +// Forward declaration of the default fault handlers. +// +//***************************************************************************** +void ResetISR(void); +static void NmiSR(void); +static void FaultISR(void); +static void IntDefaultHandler(void); + +//***************************************************************************** +// +// External declarations for the interrupt handlers used by the application. +// +//***************************************************************************** +extern void lwIPEthernetIntHandler(void); +extern void SysTickIntHandler(void); + +//***************************************************************************** +// +// The entry point for the application startup code. +// +//***************************************************************************** +extern void __iar_program_start(void); + +//***************************************************************************** +// +// Reserve space for the system stack. +// +//***************************************************************************** +static uint32_t pui32Stack[512] @ ".noinit"; + +//***************************************************************************** +// +// A union that describes the entries of the vector table. The union is needed +// since the first entry is the stack pointer and the remainder are function +// pointers. +// +//***************************************************************************** +typedef union +{ + void (*pfnHandler)(void); + uint32_t ui32Ptr; +} +uVectorEntry; + +//***************************************************************************** +// +// The vector table. Note that the proper constructs must be placed on this to +// ensure that it ends up at physical address 0x0000.0000. +// +//***************************************************************************** +__root const uVectorEntry __vector_table[] @ ".intvec" = +{ + { .ui32Ptr = (uint32_t)pui32Stack + sizeof(pui32Stack) }, + // The initial stack pointer + ResetISR, // The reset handler + NmiSR, // The NMI handler + FaultISR, // The hard fault handler + IntDefaultHandler, // The MPU fault handler + IntDefaultHandler, // The bus fault handler + IntDefaultHandler, // The usage fault handler + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // SVCall handler + IntDefaultHandler, // Debug monitor handler + 0, // Reserved + IntDefaultHandler, // The PendSV handler + SysTickIntHandler, // The SysTick handler + IntDefaultHandler, // GPIO Port A + IntDefaultHandler, // GPIO Port B + IntDefaultHandler, // GPIO Port C + IntDefaultHandler, // GPIO Port D + IntDefaultHandler, // GPIO Port E + IntDefaultHandler, // UART0 Rx and Tx + IntDefaultHandler, // UART1 Rx and Tx + IntDefaultHandler, // SSI0 Rx and Tx + IntDefaultHandler, // I2C0 Master and Slave + IntDefaultHandler, // PWM Fault + IntDefaultHandler, // PWM Generator 0 + IntDefaultHandler, // PWM Generator 1 + IntDefaultHandler, // PWM Generator 2 + IntDefaultHandler, // Quadrature Encoder 0 + IntDefaultHandler, // ADC Sequence 0 + IntDefaultHandler, // ADC Sequence 1 + IntDefaultHandler, // ADC Sequence 2 + IntDefaultHandler, // ADC Sequence 3 + IntDefaultHandler, // Watchdog timer + IntDefaultHandler, // Timer 0 subtimer A + IntDefaultHandler, // Timer 0 subtimer B + IntDefaultHandler, // Timer 1 subtimer A + IntDefaultHandler, // Timer 1 subtimer B + IntDefaultHandler, // Timer 2 subtimer A + IntDefaultHandler, // Timer 2 subtimer B + IntDefaultHandler, // Analog Comparator 0 + IntDefaultHandler, // Analog Comparator 1 + IntDefaultHandler, // Analog Comparator 2 + IntDefaultHandler, // System Control (PLL, OSC, BO) + IntDefaultHandler, // FLASH Control + IntDefaultHandler, // GPIO Port F + IntDefaultHandler, // GPIO Port G + IntDefaultHandler, // GPIO Port H + IntDefaultHandler, // UART2 Rx and Tx + IntDefaultHandler, // SSI1 Rx and Tx + IntDefaultHandler, // Timer 3 subtimer A + IntDefaultHandler, // Timer 3 subtimer B + IntDefaultHandler, // I2C1 Master and Slave + IntDefaultHandler, // CAN0 + IntDefaultHandler, // CAN1 + lwIPEthernetIntHandler, // Ethernet + IntDefaultHandler, // Hibernate + IntDefaultHandler, // USB0 + IntDefaultHandler, // PWM Generator 3 + IntDefaultHandler, // uDMA Software Transfer + IntDefaultHandler, // uDMA Error + IntDefaultHandler, // ADC1 Sequence 0 + IntDefaultHandler, // ADC1 Sequence 1 + IntDefaultHandler, // ADC1 Sequence 2 + IntDefaultHandler, // ADC1 Sequence 3 + IntDefaultHandler, // External Bus Interface 0 + IntDefaultHandler, // GPIO Port J + IntDefaultHandler, // GPIO Port K + IntDefaultHandler, // GPIO Port L + IntDefaultHandler, // SSI2 Rx and Tx + IntDefaultHandler, // SSI3 Rx and Tx + IntDefaultHandler, // UART3 Rx and Tx + IntDefaultHandler, // UART4 Rx and Tx + IntDefaultHandler, // UART5 Rx and Tx + IntDefaultHandler, // UART6 Rx and Tx + IntDefaultHandler, // UART7 Rx and Tx + IntDefaultHandler, // I2C2 Master and Slave + IntDefaultHandler, // I2C3 Master and Slave + IntDefaultHandler, // Timer 4 subtimer A + IntDefaultHandler, // Timer 4 subtimer B + IntDefaultHandler, // Timer 5 subtimer A + IntDefaultHandler, // Timer 5 subtimer B + IntDefaultHandler, // FPU + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // I2C4 Master and Slave + IntDefaultHandler, // I2C5 Master and Slave + IntDefaultHandler, // GPIO Port M + IntDefaultHandler, // GPIO Port N + 0, // Reserved + IntDefaultHandler, // Tamper + IntDefaultHandler, // GPIO Port P (Summary or P0) + IntDefaultHandler, // GPIO Port P1 + IntDefaultHandler, // GPIO Port P2 + IntDefaultHandler, // GPIO Port P3 + IntDefaultHandler, // GPIO Port P4 + IntDefaultHandler, // GPIO Port P5 + IntDefaultHandler, // GPIO Port P6 + IntDefaultHandler, // GPIO Port P7 + IntDefaultHandler, // GPIO Port Q (Summary or Q0) + IntDefaultHandler, // GPIO Port Q1 + IntDefaultHandler, // GPIO Port Q2 + IntDefaultHandler, // GPIO Port Q3 + IntDefaultHandler, // GPIO Port Q4 + IntDefaultHandler, // GPIO Port Q5 + IntDefaultHandler, // GPIO Port Q6 + IntDefaultHandler, // GPIO Port Q7 + IntDefaultHandler, // GPIO Port R + IntDefaultHandler, // GPIO Port S + IntDefaultHandler, // SHA/MD5 0 + IntDefaultHandler, // AES 0 + IntDefaultHandler, // DES3DES 0 + IntDefaultHandler, // LCD Controller 0 + IntDefaultHandler, // Timer 6 subtimer A + IntDefaultHandler, // Timer 6 subtimer B + IntDefaultHandler, // Timer 7 subtimer A + IntDefaultHandler, // Timer 7 subtimer B + IntDefaultHandler, // I2C6 Master and Slave + IntDefaultHandler, // I2C7 Master and Slave + IntDefaultHandler, // HIM Scan Matrix Keyboard 0 + IntDefaultHandler, // One Wire 0 + IntDefaultHandler, // HIM PS/2 0 + IntDefaultHandler, // HIM LED Sequencer 0 + IntDefaultHandler, // HIM Consumer IR 0 + IntDefaultHandler, // I2C8 Master and Slave + IntDefaultHandler, // I2C9 Master and Slave + IntDefaultHandler // GPIO Port T +}; + +//***************************************************************************** +// +// This is the code that gets called when the processor first starts execution +// following a reset event. Only the absolutely necessary set is performed, +// after which the application supplied entry() routine is called. Any fancy +// actions (such as making decisions based on the reset cause register, and +// resetting the bits in that register) are left solely in the hands of the +// application. +// +//***************************************************************************** +void +ResetISR(void) +{ + // + // Enable the floating-point unit. This must be done here to handle the + // case where main() uses floating-point and the function prologue saves + // floating-point registers (which will fault if floating-point is not + // enabled). Any configuration of the floating-point unit using DriverLib + // APIs must be done here prior to the floating-point unit being enabled. + // + // Note that this does not use DriverLib since it might not be included in + // this project. + // + HWREG(NVIC_CPAC) = ((HWREG(NVIC_CPAC) & + ~(NVIC_CPAC_CP10_M | NVIC_CPAC_CP11_M)) | + NVIC_CPAC_CP10_FULL | NVIC_CPAC_CP11_FULL); + + // + // Call the application's entry point. + // + __iar_program_start(); +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a NMI. This +// simply enters an infinite loop, preserving the system state for examination +// by a debugger. +// +//***************************************************************************** +static void +NmiSR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a fault +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +FaultISR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives an unexpected +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +IntDefaultHandler(void) +{ + // + // Go into an infinite loop. + // + while(1) + { + } +} diff --git a/boards/dk-tm4c129x/enet_lwip/startup_gcc.c b/boards/dk-tm4c129x/enet_lwip/startup_gcc.c new file mode 100644 index 0000000..7ba6b86 --- /dev/null +++ b/boards/dk-tm4c129x/enet_lwip/startup_gcc.c @@ -0,0 +1,323 @@ +//***************************************************************************** +// +// startup_gcc.c - Startup code for use with GNU tools. +// +// Copyright (c) 2013-2014 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 2.1.0.12573 of the DK-TM4C129X Firmware Package. +// +//***************************************************************************** + +#include +#include "inc/hw_nvic.h" +#include "inc/hw_types.h" + +//***************************************************************************** +// +// Forward declaration of the default fault handlers. +// +//***************************************************************************** +void ResetISR(void); +static void NmiSR(void); +static void FaultISR(void); +static void IntDefaultHandler(void); + +//***************************************************************************** +// +// External declarations for the interrupt handlers used by the application. +// +//***************************************************************************** +extern void lwIPEthernetIntHandler(void); +extern void SysTickIntHandler(void); + +//***************************************************************************** +// +// The entry point for the application. +// +//***************************************************************************** +extern int main(void); + +//***************************************************************************** +// +// Reserve space for the system stack. +// +//***************************************************************************** +static uint32_t pui32Stack[512]; + +//***************************************************************************** +// +// The vector table. Note that the proper constructs must be placed on this to +// ensure that it ends up at physical address 0x0000.0000. +// +//***************************************************************************** +__attribute__ ((section(".isr_vector"))) +void (* const g_pfnVectors[])(void) = +{ + (void (*)(void))((uint32_t)pui32Stack + sizeof(pui32Stack)), + // The initial stack pointer + ResetISR, // The reset handler + NmiSR, // The NMI handler + FaultISR, // The hard fault handler + IntDefaultHandler, // The MPU fault handler + IntDefaultHandler, // The bus fault handler + IntDefaultHandler, // The usage fault handler + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // SVCall handler + IntDefaultHandler, // Debug monitor handler + 0, // Reserved + IntDefaultHandler, // The PendSV handler + SysTickIntHandler, // The SysTick handler + IntDefaultHandler, // GPIO Port A + IntDefaultHandler, // GPIO Port B + IntDefaultHandler, // GPIO Port C + IntDefaultHandler, // GPIO Port D + IntDefaultHandler, // GPIO Port E + IntDefaultHandler, // UART0 Rx and Tx + IntDefaultHandler, // UART1 Rx and Tx + IntDefaultHandler, // SSI0 Rx and Tx + IntDefaultHandler, // I2C0 Master and Slave + IntDefaultHandler, // PWM Fault + IntDefaultHandler, // PWM Generator 0 + IntDefaultHandler, // PWM Generator 1 + IntDefaultHandler, // PWM Generator 2 + IntDefaultHandler, // Quadrature Encoder 0 + IntDefaultHandler, // ADC Sequence 0 + IntDefaultHandler, // ADC Sequence 1 + IntDefaultHandler, // ADC Sequence 2 + IntDefaultHandler, // ADC Sequence 3 + IntDefaultHandler, // Watchdog timer + IntDefaultHandler, // Timer 0 subtimer A + IntDefaultHandler, // Timer 0 subtimer B + IntDefaultHandler, // Timer 1 subtimer A + IntDefaultHandler, // Timer 1 subtimer B + IntDefaultHandler, // Timer 2 subtimer A + IntDefaultHandler, // Timer 2 subtimer B + IntDefaultHandler, // Analog Comparator 0 + IntDefaultHandler, // Analog Comparator 1 + IntDefaultHandler, // Analog Comparator 2 + IntDefaultHandler, // System Control (PLL, OSC, BO) + IntDefaultHandler, // FLASH Control + IntDefaultHandler, // GPIO Port F + IntDefaultHandler, // GPIO Port G + IntDefaultHandler, // GPIO Port H + IntDefaultHandler, // UART2 Rx and Tx + IntDefaultHandler, // SSI1 Rx and Tx + IntDefaultHandler, // Timer 3 subtimer A + IntDefaultHandler, // Timer 3 subtimer B + IntDefaultHandler, // I2C1 Master and Slave + IntDefaultHandler, // CAN0 + IntDefaultHandler, // CAN1 + lwIPEthernetIntHandler, // Ethernet + IntDefaultHandler, // Hibernate + IntDefaultHandler, // USB0 + IntDefaultHandler, // PWM Generator 3 + IntDefaultHandler, // uDMA Software Transfer + IntDefaultHandler, // uDMA Error + IntDefaultHandler, // ADC1 Sequence 0 + IntDefaultHandler, // ADC1 Sequence 1 + IntDefaultHandler, // ADC1 Sequence 2 + IntDefaultHandler, // ADC1 Sequence 3 + IntDefaultHandler, // External Bus Interface 0 + IntDefaultHandler, // GPIO Port J + IntDefaultHandler, // GPIO Port K + IntDefaultHandler, // GPIO Port L + IntDefaultHandler, // SSI2 Rx and Tx + IntDefaultHandler, // SSI3 Rx and Tx + IntDefaultHandler, // UART3 Rx and Tx + IntDefaultHandler, // UART4 Rx and Tx + IntDefaultHandler, // UART5 Rx and Tx + IntDefaultHandler, // UART6 Rx and Tx + IntDefaultHandler, // UART7 Rx and Tx + IntDefaultHandler, // I2C2 Master and Slave + IntDefaultHandler, // I2C3 Master and Slave + IntDefaultHandler, // Timer 4 subtimer A + IntDefaultHandler, // Timer 4 subtimer B + IntDefaultHandler, // Timer 5 subtimer A + IntDefaultHandler, // Timer 5 subtimer B + IntDefaultHandler, // FPU + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // I2C4 Master and Slave + IntDefaultHandler, // I2C5 Master and Slave + IntDefaultHandler, // GPIO Port M + IntDefaultHandler, // GPIO Port N + 0, // Reserved + IntDefaultHandler, // Tamper + IntDefaultHandler, // GPIO Port P (Summary or P0) + IntDefaultHandler, // GPIO Port P1 + IntDefaultHandler, // GPIO Port P2 + IntDefaultHandler, // GPIO Port P3 + IntDefaultHandler, // GPIO Port P4 + IntDefaultHandler, // GPIO Port P5 + IntDefaultHandler, // GPIO Port P6 + IntDefaultHandler, // GPIO Port P7 + IntDefaultHandler, // GPIO Port Q (Summary or Q0) + IntDefaultHandler, // GPIO Port Q1 + IntDefaultHandler, // GPIO Port Q2 + IntDefaultHandler, // GPIO Port Q3 + IntDefaultHandler, // GPIO Port Q4 + IntDefaultHandler, // GPIO Port Q5 + IntDefaultHandler, // GPIO Port Q6 + IntDefaultHandler, // GPIO Port Q7 + IntDefaultHandler, // GPIO Port R + IntDefaultHandler, // GPIO Port S + IntDefaultHandler, // SHA/MD5 0 + IntDefaultHandler, // AES 0 + IntDefaultHandler, // DES3DES 0 + IntDefaultHandler, // LCD Controller 0 + IntDefaultHandler, // Timer 6 subtimer A + IntDefaultHandler, // Timer 6 subtimer B + IntDefaultHandler, // Timer 7 subtimer A + IntDefaultHandler, // Timer 7 subtimer B + IntDefaultHandler, // I2C6 Master and Slave + IntDefaultHandler, // I2C7 Master and Slave + IntDefaultHandler, // HIM Scan Matrix Keyboard 0 + IntDefaultHandler, // One Wire 0 + IntDefaultHandler, // HIM PS/2 0 + IntDefaultHandler, // HIM LED Sequencer 0 + IntDefaultHandler, // HIM Consumer IR 0 + IntDefaultHandler, // I2C8 Master and Slave + IntDefaultHandler, // I2C9 Master and Slave + IntDefaultHandler // GPIO Port T +}; + +//***************************************************************************** +// +// The following are constructs created by the linker, indicating where the +// the "data" and "bss" segments reside in memory. The initializers for the +// for the "data" segment resides immediately following the "text" segment. +// +//***************************************************************************** +extern uint32_t _etext; +extern uint32_t _data; +extern uint32_t _edata; +extern uint32_t _bss; +extern uint32_t _ebss; + +//***************************************************************************** +// +// This is the code that gets called when the processor first starts execution +// following a reset event. Only the absolutely necessary set is performed, +// after which the application supplied entry() routine is called. Any fancy +// actions (such as making decisions based on the reset cause register, and +// resetting the bits in that register) are left solely in the hands of the +// application. +// +//***************************************************************************** +void +ResetISR(void) +{ + uint32_t *pui32Src, *pui32Dest; + + // + // Copy the data segment initializers from flash to SRAM. + // + pui32Src = &_etext; + for(pui32Dest = &_data; pui32Dest < &_edata; ) + { + *pui32Dest++ = *pui32Src++; + } + + // + // Zero fill the bss segment. + // + __asm(" ldr r0, =_bss\n" + " ldr r1, =_ebss\n" + " mov r2, #0\n" + " .thumb_func\n" + "zero_loop:\n" + " cmp r0, r1\n" + " it lt\n" + " strlt r2, [r0], #4\n" + " blt zero_loop"); + + // + // Enable the floating-point unit. This must be done here to handle the + // case where main() uses floating-point and the function prologue saves + // floating-point registers (which will fault if floating-point is not + // enabled). Any configuration of the floating-point unit using DriverLib + // APIs must be done here prior to the floating-point unit being enabled. + // + // Note that this does not use DriverLib since it might not be included in + // this project. + // + HWREG(NVIC_CPAC) = ((HWREG(NVIC_CPAC) & + ~(NVIC_CPAC_CP10_M | NVIC_CPAC_CP11_M)) | + NVIC_CPAC_CP10_FULL | NVIC_CPAC_CP11_FULL); + + // + // Call the application's entry point. + // + main(); +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a NMI. This +// simply enters an infinite loop, preserving the system state for examination +// by a debugger. +// +//***************************************************************************** +static void +NmiSR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a fault +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +FaultISR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives an unexpected +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +IntDefaultHandler(void) +{ + // + // Go into an infinite loop. + // + while(1) + { + } +} diff --git a/boards/dk-tm4c129x/enet_lwip/startup_rvmdk.S b/boards/dk-tm4c129x/enet_lwip/startup_rvmdk.S new file mode 100644 index 0000000..d0afaf0 --- /dev/null +++ b/boards/dk-tm4c129x/enet_lwip/startup_rvmdk.S @@ -0,0 +1,332 @@ +; <<< Use Configuration Wizard in Context Menu >>> +;****************************************************************************** +; +; startup_rvmdk.S - Startup code for use with Keil's uVision. +; +; Copyright (c) 2013-2014 Texas Instruments Incorporated. All rights reserved. +; Software License Agreement +; +; Texas Instruments (TI) is supplying this software for use solely and +; exclusively on TI's microcontroller products. The software is owned by +; TI and/or its suppliers, and is protected under applicable copyright +; laws. You may not combine this software with "viral" open-source +; software in order to form a larger program. +; +; THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +; NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +; NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +; A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +; CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +; DAMAGES, FOR ANY REASON WHATSOEVER. +; +; This is part of revision 2.1.0.12573 of the DK-TM4C129X Firmware Package. +; +;****************************************************************************** + +;****************************************************************************** +; +; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +; +;****************************************************************************** +Stack EQU 0x00000800 + +;****************************************************************************** +; +; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> +; +;****************************************************************************** +Heap EQU 0x00000000 + +;****************************************************************************** +; +; Allocate space for the stack. +; +;****************************************************************************** + AREA STACK, NOINIT, READWRITE, ALIGN=3 +StackMem + SPACE Stack +__initial_sp + +;****************************************************************************** +; +; Allocate space for the heap. +; +;****************************************************************************** + AREA HEAP, NOINIT, READWRITE, ALIGN=3 +__heap_base +HeapMem + SPACE Heap +__heap_limit + +;****************************************************************************** +; +; Indicate that the code in this file preserves 8-byte alignment of the stack. +; +;****************************************************************************** + PRESERVE8 + +;****************************************************************************** +; +; Place code into the reset code section. +; +;****************************************************************************** + AREA RESET, CODE, READONLY + THUMB + +;****************************************************************************** +; +; External declarations for the interrupt handlers used by the application. +; +;****************************************************************************** + EXTERN lwIPEthernetIntHandler + EXTERN SysTickIntHandler + +;****************************************************************************** +; +; The vector table. +; +;****************************************************************************** + EXPORT __Vectors +__Vectors + DCD StackMem + Stack ; Top of Stack + DCD Reset_Handler ; Reset Handler + DCD NmiSR ; NMI Handler + DCD FaultISR ; Hard Fault Handler + DCD IntDefaultHandler ; The MPU fault handler + DCD IntDefaultHandler ; The bus fault handler + DCD IntDefaultHandler ; The usage fault handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD IntDefaultHandler ; SVCall handler + DCD IntDefaultHandler ; Debug monitor handler + DCD 0 ; Reserved + DCD IntDefaultHandler ; The PendSV handler + DCD SysTickIntHandler ; The SysTick handler + DCD IntDefaultHandler ; GPIO Port A + DCD IntDefaultHandler ; GPIO Port B + DCD IntDefaultHandler ; GPIO Port C + DCD IntDefaultHandler ; GPIO Port D + DCD IntDefaultHandler ; GPIO Port E + DCD IntDefaultHandler ; UART0 Rx and Tx + DCD IntDefaultHandler ; UART1 Rx and Tx + DCD IntDefaultHandler ; SSI0 Rx and Tx + DCD IntDefaultHandler ; I2C0 Master and Slave + DCD IntDefaultHandler ; PWM Fault + DCD IntDefaultHandler ; PWM Generator 0 + DCD IntDefaultHandler ; PWM Generator 1 + DCD IntDefaultHandler ; PWM Generator 2 + DCD IntDefaultHandler ; Quadrature Encoder 0 + DCD IntDefaultHandler ; ADC Sequence 0 + DCD IntDefaultHandler ; ADC Sequence 1 + DCD IntDefaultHandler ; ADC Sequence 2 + DCD IntDefaultHandler ; ADC Sequence 3 + DCD IntDefaultHandler ; Watchdog timer + DCD IntDefaultHandler ; Timer 0 subtimer A + DCD IntDefaultHandler ; Timer 0 subtimer B + DCD IntDefaultHandler ; Timer 1 subtimer A + DCD IntDefaultHandler ; Timer 1 subtimer B + DCD IntDefaultHandler ; Timer 2 subtimer A + DCD IntDefaultHandler ; Timer 2 subtimer B + DCD IntDefaultHandler ; Analog Comparator 0 + DCD IntDefaultHandler ; Analog Comparator 1 + DCD IntDefaultHandler ; Analog Comparator 2 + DCD IntDefaultHandler ; System Control (PLL, OSC, BO) + DCD IntDefaultHandler ; FLASH Control + DCD IntDefaultHandler ; GPIO Port F + DCD IntDefaultHandler ; GPIO Port G + DCD IntDefaultHandler ; GPIO Port H + DCD IntDefaultHandler ; UART2 Rx and Tx + DCD IntDefaultHandler ; SSI1 Rx and Tx + DCD IntDefaultHandler ; Timer 3 subtimer A + DCD IntDefaultHandler ; Timer 3 subtimer B + DCD IntDefaultHandler ; I2C1 Master and Slave + DCD IntDefaultHandler ; CAN0 + DCD IntDefaultHandler ; CAN1 + DCD lwIPEthernetIntHandler ; Ethernet + DCD IntDefaultHandler ; Hibernate + DCD IntDefaultHandler ; USB0 + DCD IntDefaultHandler ; PWM Generator 3 + DCD IntDefaultHandler ; uDMA Software Transfer + DCD IntDefaultHandler ; uDMA Error + DCD IntDefaultHandler ; ADC1 Sequence 0 + DCD IntDefaultHandler ; ADC1 Sequence 1 + DCD IntDefaultHandler ; ADC1 Sequence 2 + DCD IntDefaultHandler ; ADC1 Sequence 3 + DCD IntDefaultHandler ; External Bus Interface 0 + DCD IntDefaultHandler ; GPIO Port J + DCD IntDefaultHandler ; GPIO Port K + DCD IntDefaultHandler ; GPIO Port L + DCD IntDefaultHandler ; SSI2 Rx and Tx + DCD IntDefaultHandler ; SSI3 Rx and Tx + DCD IntDefaultHandler ; UART3 Rx and Tx + DCD IntDefaultHandler ; UART4 Rx and Tx + DCD IntDefaultHandler ; UART5 Rx and Tx + DCD IntDefaultHandler ; UART6 Rx and Tx + DCD IntDefaultHandler ; UART7 Rx and Tx + DCD IntDefaultHandler ; I2C2 Master and Slave + DCD IntDefaultHandler ; I2C3 Master and Slave + DCD IntDefaultHandler ; Timer 4 subtimer A + DCD IntDefaultHandler ; Timer 4 subtimer B + DCD IntDefaultHandler ; Timer 5 subtimer A + DCD IntDefaultHandler ; Timer 5 subtimer B + DCD IntDefaultHandler ; FPU + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD IntDefaultHandler ; I2C4 Master and Slave + DCD IntDefaultHandler ; I2C5 Master and Slave + DCD IntDefaultHandler ; GPIO Port M + DCD IntDefaultHandler ; GPIO Port N + DCD 0 ; Reserved + DCD IntDefaultHandler ; Tamper + DCD IntDefaultHandler ; GPIO Port P (Summary or P0) + DCD IntDefaultHandler ; GPIO Port P1 + DCD IntDefaultHandler ; GPIO Port P2 + DCD IntDefaultHandler ; GPIO Port P3 + DCD IntDefaultHandler ; GPIO Port P4 + DCD IntDefaultHandler ; GPIO Port P5 + DCD IntDefaultHandler ; GPIO Port P6 + DCD IntDefaultHandler ; GPIO Port P7 + DCD IntDefaultHandler ; GPIO Port Q (Summary or Q0) + DCD IntDefaultHandler ; GPIO Port Q1 + DCD IntDefaultHandler ; GPIO Port Q2 + DCD IntDefaultHandler ; GPIO Port Q3 + DCD IntDefaultHandler ; GPIO Port Q4 + DCD IntDefaultHandler ; GPIO Port Q5 + DCD IntDefaultHandler ; GPIO Port Q6 + DCD IntDefaultHandler ; GPIO Port Q7 + DCD IntDefaultHandler ; GPIO Port R + DCD IntDefaultHandler ; GPIO Port S + DCD IntDefaultHandler ; SHA/MD5 0 + DCD IntDefaultHandler ; AES 0 + DCD IntDefaultHandler ; DES3DES 0 + DCD IntDefaultHandler ; LCD Controller 0 + DCD IntDefaultHandler ; Timer 6 subtimer A + DCD IntDefaultHandler ; Timer 6 subtimer B + DCD IntDefaultHandler ; Timer 7 subtimer A + DCD IntDefaultHandler ; Timer 7 subtimer B + DCD IntDefaultHandler ; I2C6 Master and Slave + DCD IntDefaultHandler ; I2C7 Master and Slave + DCD IntDefaultHandler ; HIM Scan Matrix Keyboard 0 + DCD IntDefaultHandler ; One Wire 0 + DCD IntDefaultHandler ; HIM PS/2 0 + DCD IntDefaultHandler ; HIM LED Sequencer 0 + DCD IntDefaultHandler ; HIM Consumer IR 0 + DCD IntDefaultHandler ; I2C8 Master and Slave + DCD IntDefaultHandler ; I2C9 Master and Slave + DCD IntDefaultHandler ; GPIO Port T + +;****************************************************************************** +; +; This is the code that gets called when the processor first starts execution +; following a reset event. +; +;****************************************************************************** + EXPORT Reset_Handler +Reset_Handler + ; + ; Enable the floating-point unit. This must be done here to handle the + ; case where main() uses floating-point and the function prologue saves + ; floating-point registers (which will fault if floating-point is not + ; enabled). Any configuration of the floating-point unit using + ; DriverLib APIs must be done here prior to the floating-point unit + ; being enabled. + ; + ; Note that this does not use DriverLib since it might not be included + ; in this project. + ; + MOVW R0, #0xED88 + MOVT R0, #0xE000 + LDR R1, [R0] + ORR R1, #0x00F00000 + STR R1, [R0] + + ; + ; Call the C library enty point that handles startup. This will copy + ; the .data section initializers from flash to SRAM and zero fill the + ; .bss section. + ; + IMPORT __main + B __main + +;****************************************************************************** +; +; This is the code that gets called when the processor receives a NMI. This +; simply enters an infinite loop, preserving the system state for examination +; by a debugger. +; +;****************************************************************************** +NmiSR + B NmiSR + +;****************************************************************************** +; +; This is the code that gets called when the processor receives a fault +; interrupt. This simply enters an infinite loop, preserving the system state +; for examination by a debugger. +; +;****************************************************************************** +FaultISR + B FaultISR + +;****************************************************************************** +; +; This is the code that gets called when the processor receives an unexpected +; interrupt. This simply enters an infinite loop, preserving the system state +; for examination by a debugger. +; +;****************************************************************************** +IntDefaultHandler + B IntDefaultHandler + +;****************************************************************************** +; +; Make sure the end of this section is aligned. +; +;****************************************************************************** + ALIGN + +;****************************************************************************** +; +; Some code in the normal code section for initializing the heap and stack. +; +;****************************************************************************** + AREA |.text|, CODE, READONLY + +;****************************************************************************** +; +; The function expected of the C library startup code for defining the stack +; and heap memory locations. For the C library version of the startup code, +; provide this function so that the C library initialization code can find out +; the location of the stack and heap. +; +;****************************************************************************** + IF :DEF: __MICROLIB + EXPORT __initial_sp + EXPORT __heap_base + EXPORT __heap_limit + ELSE + IMPORT __use_two_region_memory + EXPORT __user_initial_stackheap +__user_initial_stackheap + LDR R0, =HeapMem + LDR R1, =(StackMem + Stack) + LDR R2, =(HeapMem + Heap) + LDR R3, =StackMem + BX LR + ENDIF + +;****************************************************************************** +; +; Make sure the end of this section is aligned. +; +;****************************************************************************** + ALIGN + +;****************************************************************************** +; +; Tell the assembler that we're done. +; +;****************************************************************************** + END -- cgit v1.3.1