From c3e4c9a25c2910d2d66d52215b3406b13d5b23d5 Mon Sep 17 00:00:00 2001 From: Yuval Adam Date: Sun, 29 Jun 2014 12:34:32 +0300 Subject: Add more board models --- boards/dk-tm4c129x/boot_demo_flash/Makefile | 100 +++ .../dk-tm4c129x/boot_demo_flash/boot_demo_flash.c | 512 +++++++++++++ .../boot_demo_flash/boot_demo_flash.ewd | 614 +++++++++++++++ .../boot_demo_flash/boot_demo_flash.ewp | 821 +++++++++++++++++++++ .../boot_demo_flash/boot_demo_flash.icf | 78 ++ .../dk-tm4c129x/boot_demo_flash/boot_demo_flash.ld | 57 ++ .../boot_demo_flash/boot_demo_flash.sct | 47 ++ .../boot_demo_flash/boot_demo_flash.uvopt | 387 ++++++++++ .../boot_demo_flash/boot_demo_flash.uvproj | 459 ++++++++++++ .../boot_demo_flash/boot_demo_flash_ccs.cmd | 70 ++ .../dk-tm4c129x/boot_demo_flash/ccs/.ccsimportspec | 9 + boards/dk-tm4c129x/boot_demo_flash/ccs/.ccsproject | 10 + boards/dk-tm4c129x/boot_demo_flash/ccs/.cproject | 205 +++++ boards/dk-tm4c129x/boot_demo_flash/ccs/.project | 80 ++ .../ccs/.settings/org.eclipse.cdt.codan.core.prefs | 3 + .../boot_demo_flash/ccs/Debug/boot_demo_flash.bin | Bin 0 -> 56560 bytes .../boot_demo_flash/ccs/Debug/boot_demo_flash.out | Bin 0 -> 718405 bytes .../boot_demo_flash/ccs/macros.ini_initial | 1 + .../boot_demo_flash/ccs/target_config.ccxml | 13 + .../boot_demo_flash/ewarm/Exe/boot_demo_flash.bin | Bin 0 -> 51876 bytes .../boot_demo_flash/ewarm/Exe/boot_demo_flash.out | Bin 0 -> 625160 bytes .../boot_demo_flash/gcc/boot_demo_flash.axf | Bin 0 -> 120693 bytes .../boot_demo_flash/gcc/boot_demo_flash.bin | Bin 0 -> 55452 bytes boards/dk-tm4c129x/boot_demo_flash/lwipopts.h | 433 +++++++++++ boards/dk-tm4c129x/boot_demo_flash/readme.txt | 43 ++ .../boot_demo_flash/rvmdk/boot_demo_flash.axf | Bin 0 -> 501916 bytes .../boot_demo_flash/rvmdk/boot_demo_flash.bin | Bin 0 -> 53692 bytes boards/dk-tm4c129x/boot_demo_flash/startup_ccs.c | 277 +++++++ boards/dk-tm4c129x/boot_demo_flash/startup_ewarm.c | 308 ++++++++ boards/dk-tm4c129x/boot_demo_flash/startup_gcc.c | 324 ++++++++ boards/dk-tm4c129x/boot_demo_flash/startup_rvmdk.S | 333 +++++++++ 31 files changed, 5184 insertions(+) create mode 100644 boards/dk-tm4c129x/boot_demo_flash/Makefile create mode 100644 boards/dk-tm4c129x/boot_demo_flash/boot_demo_flash.c create mode 100644 boards/dk-tm4c129x/boot_demo_flash/boot_demo_flash.ewd create mode 100644 boards/dk-tm4c129x/boot_demo_flash/boot_demo_flash.ewp create mode 100644 boards/dk-tm4c129x/boot_demo_flash/boot_demo_flash.icf create mode 100644 boards/dk-tm4c129x/boot_demo_flash/boot_demo_flash.ld create mode 100644 boards/dk-tm4c129x/boot_demo_flash/boot_demo_flash.sct create mode 100644 boards/dk-tm4c129x/boot_demo_flash/boot_demo_flash.uvopt create mode 100644 boards/dk-tm4c129x/boot_demo_flash/boot_demo_flash.uvproj create mode 100644 boards/dk-tm4c129x/boot_demo_flash/boot_demo_flash_ccs.cmd create mode 100644 boards/dk-tm4c129x/boot_demo_flash/ccs/.ccsimportspec create mode 100644 boards/dk-tm4c129x/boot_demo_flash/ccs/.ccsproject create mode 100644 boards/dk-tm4c129x/boot_demo_flash/ccs/.cproject create mode 100644 boards/dk-tm4c129x/boot_demo_flash/ccs/.project create mode 100644 boards/dk-tm4c129x/boot_demo_flash/ccs/.settings/org.eclipse.cdt.codan.core.prefs create mode 100644 boards/dk-tm4c129x/boot_demo_flash/ccs/Debug/boot_demo_flash.bin create mode 100644 boards/dk-tm4c129x/boot_demo_flash/ccs/Debug/boot_demo_flash.out create mode 100644 boards/dk-tm4c129x/boot_demo_flash/ccs/macros.ini_initial create mode 100644 boards/dk-tm4c129x/boot_demo_flash/ccs/target_config.ccxml create mode 100644 boards/dk-tm4c129x/boot_demo_flash/ewarm/Exe/boot_demo_flash.bin create mode 100644 boards/dk-tm4c129x/boot_demo_flash/ewarm/Exe/boot_demo_flash.out create mode 100644 boards/dk-tm4c129x/boot_demo_flash/gcc/boot_demo_flash.axf create mode 100644 boards/dk-tm4c129x/boot_demo_flash/gcc/boot_demo_flash.bin create mode 100644 boards/dk-tm4c129x/boot_demo_flash/lwipopts.h create mode 100644 boards/dk-tm4c129x/boot_demo_flash/readme.txt create mode 100644 boards/dk-tm4c129x/boot_demo_flash/rvmdk/boot_demo_flash.axf create mode 100644 boards/dk-tm4c129x/boot_demo_flash/rvmdk/boot_demo_flash.bin create mode 100644 boards/dk-tm4c129x/boot_demo_flash/startup_ccs.c create mode 100644 boards/dk-tm4c129x/boot_demo_flash/startup_ewarm.c create mode 100644 boards/dk-tm4c129x/boot_demo_flash/startup_gcc.c create mode 100644 boards/dk-tm4c129x/boot_demo_flash/startup_rvmdk.S (limited to 'boards/dk-tm4c129x/boot_demo_flash') diff --git a/boards/dk-tm4c129x/boot_demo_flash/Makefile b/boards/dk-tm4c129x/boot_demo_flash/Makefile new file mode 100644 index 0000000..44bd941 --- /dev/null +++ b/boards/dk-tm4c129x/boot_demo_flash/Makefile @@ -0,0 +1,100 @@ +#****************************************************************************** +# +# Makefile - Rules for building the boot_demo_flash example. +# +# Copyright (c) 2013-2014 Texas Instruments Incorporated. All rights reserved. +# Software License Agreement +# +# Texas Instruments (TI) is supplying this software for use solely and +# exclusively on TI's microcontroller products. The software is owned by +# TI and/or its suppliers, and is protected under applicable copyright +# laws. You may not combine this software with "viral" open-source +# software in order to form a larger program. +# +# THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +# NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +# NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +# A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +# CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +# DAMAGES, FOR ANY REASON WHATSOEVER. +# +# This is part of revision 2.1.0.12573 of the DK-TM4C129X Firmware Package. +# +#****************************************************************************** + +# +# Defines the part type that this project uses. +# +PART=TM4C129XNCZAD + +# +# The base directory for TivaWare. +# +ROOT=../../../.. + +# +# Include the common make definitions. +# +include ${ROOT}/makedefs + +# +# Where to find source files that do not live in this directory. +# +VPATH=../drivers +VPATH+=../../../../utils + +# +# Where to find header files that do not live in the source directory. +# +IPATH=. +IPATH+=.. +IPATH+=../../../.. +IPATH+=../../../../third_party/lwip-1.4.1/apps +IPATH+=../../../../third_party/bget +IPATH+=../../../../third_party/lwip-1.4.1/ports/tiva-tm4c129/include +IPATH+=../../../../third_party/lwip-1.4.1/src/include +IPATH+=../../../../third_party/lwip-1.4.1/src/include/ipv4 +IPATH+=../../../../third_party + +# +# The default rule, which causes the boot_demo_flash example to be built. +# +all: ${COMPILER} +all: ${COMPILER}/boot_demo_flash.axf + +# +# The rule to clean out all the build products. +# +clean: + @rm -rf ${COMPILER} ${wildcard *~} + +# +# The rule to create the target directory. +# +${COMPILER}: + @mkdir -p ${COMPILER} + +# +# Rules for building the boot_demo_flash example. +# +${COMPILER}/boot_demo_flash.axf: ${COMPILER}/boot_demo_flash.o +${COMPILER}/boot_demo_flash.axf: ${COMPILER}/frame.o +${COMPILER}/boot_demo_flash.axf: ${COMPILER}/kentec320x240x16_ssd2119.o +${COMPILER}/boot_demo_flash.axf: ${COMPILER}/lwiplib.o +${COMPILER}/boot_demo_flash.axf: ${COMPILER}/pinout.o +${COMPILER}/boot_demo_flash.axf: ${COMPILER}/startup_${COMPILER}.o +${COMPILER}/boot_demo_flash.axf: ${COMPILER}/touch.o +${COMPILER}/boot_demo_flash.axf: ${COMPILER}/ustdlib.o +${COMPILER}/boot_demo_flash.axf: ${ROOT}/grlib/${COMPILER}/libgr.a +${COMPILER}/boot_demo_flash.axf: ${ROOT}/driverlib/${COMPILER}/libdriver.a +${COMPILER}/boot_demo_flash.axf: boot_demo_flash.ld +SCATTERgcc_boot_demo_flash=boot_demo_flash.ld +ENTRY_boot_demo_flash=ResetISR +CFLAGSgcc=-DTARGET_IS_TM4C129_RA0 + +# +# Include the automatically generated dependency files. +# +ifneq (${MAKECMDGOALS},clean) +-include ${wildcard ${COMPILER}/*.d} __dummy__ +endif diff --git a/boards/dk-tm4c129x/boot_demo_flash/boot_demo_flash.c b/boards/dk-tm4c129x/boot_demo_flash/boot_demo_flash.c new file mode 100644 index 0000000..071bd92 --- /dev/null +++ b/boards/dk-tm4c129x/boot_demo_flash/boot_demo_flash.c @@ -0,0 +1,512 @@ +//***************************************************************************** +// +// boot_demo_flash.c - Flash-base boot loader application example. +// +// Copyright (c) 2013-2014 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 2.1.0.12573 of the DK-TM4C129X Firmware Package. +// +//***************************************************************************** + +#include +#include +#include "inc/hw_types.h" +#include "inc/hw_flash.h" +#include "inc/hw_memmap.h" +#include "inc/hw_nvic.h" +#include "driverlib/interrupt.h" +#include "driverlib/sysctl.h" +#include "driverlib/systick.h" +#include "driverlib/flash.h" +#include "driverlib/uart.h" +#include "driverlib/uart.h" +#include "driverlib/gpio.h" +#include "driverlib/usb.h" +#include "driverlib/emac.h" +#include "driverlib/rom.h" +#include "driverlib/rom_map.h" +#include "utils/ustdlib.h" +#include "utils/lwiplib.h" +#include "grlib/grlib.h" +#include "grlib/widget.h" +#include "grlib/canvas.h" +#include "grlib/pushbutton.h" +#include "drivers/frame.h" +#include "drivers/kentec320x240x16_ssd2119.h" +#include "drivers/touch.h" +#include "drivers/pinout.h" + +//***************************************************************************** +// +//! \addtogroup example_list +//!

Flash-based Boot Loader Demo (boot_demo_flash)

+//! +//! An example to demonstrate the use of a flash-based boot loader. At +//! startup, the application will configure the UART, USB and Ethernet +//! peripherals, and then branch to the boot loader to await the start of an +//! update. +//! +//! This application is intended for use with flash-based ethernet boot +//! loader (boot_emac_flash). Although it isn't neccessary to configure USB +//! and UART interface in this example since only ethernet flash-based boot +//! loader is provided, the code is there for completeness so that USB or +//! UART flash-based boot loader can be implemented if needed. +//! The link address for this application is set to 0x4000, the link address +//! has to be multiple of the flash erase block size(16KB=0x4000). +//! You may change this address to a 16KB boundary higher than the last +//! address occupied by the boot loader binary as long as you also rebuild the +//! boot loader itself after modifying its bl_config.h file to set +//! APP_START_ADDRESS to the same value. +//! +//! The boot_demo_emac_flash application can be used along with this +//! application to easily demonstrate that the boot loader is actually updating +//! the on-chip flash. +//! +// +//***************************************************************************** + + +//***************************************************************************** +// +// The system clock frequency. +// +//***************************************************************************** +uint32_t g_ui32SysClock; + +//***************************************************************************** +// +// The current IP address. +// +//***************************************************************************** +uint32_t g_ui32IPAddress; + +//***************************************************************************** +// +// The number of SysTick ticks per second. +// +//***************************************************************************** +#define TICKS_PER_SECOND 100 + +//***************************************************************************** +// +// A global we use to keep track of when the user presses the "Update now" +// button. +// +//***************************************************************************** +volatile bool g_bFirmwareUpdate = false; + +//***************************************************************************** +// +// Buffers used to hold the Ethernet MAC and IP addresses for the board. +// +//***************************************************************************** +#define SIZE_MAC_ADDR_BUFFER 32 +#define SIZE_IP_ADDR_BUFFER 32 +char g_pcMACAddr[SIZE_MAC_ADDR_BUFFER]; +char g_pcIPAddr[SIZE_IP_ADDR_BUFFER]; + +//***************************************************************************** +// +// Forward reference to various widget structures. +// +//***************************************************************************** +extern tCanvasWidget g_sBackground; + +//***************************************************************************** +// +// Forward reference to the button press handler. +// +//***************************************************************************** +void OnButtonPress(tWidget *psWidget); + +//***************************************************************************** +// +// The canvas widget used to display the board's Ethernet IP address. +// +//***************************************************************************** +Canvas(g_sIPAddr, &g_sBackground, 0, 0, + &g_sKentec320x240x16_SSD2119, 10, 180, 300, 20, + (CANVAS_STYLE_FILL | CANVAS_STYLE_TEXT), + ClrBlack, 0, ClrWhite, g_psFontCmss18b, g_pcIPAddr, 0, 0); + +//***************************************************************************** +// +// The canvas widget used to display the board's Ethernet MAC address. This +// is required if using the Ethernet boot loader. +// +//***************************************************************************** +Canvas(g_sMACAddr, &g_sBackground, &g_sIPAddr, 0, + &g_sKentec320x240x16_SSD2119, 10, 200, 300, 20, + (CANVAS_STYLE_FILL | CANVAS_STYLE_TEXT), + ClrBlack, 0, ClrWhite, g_psFontCmss18b, g_pcMACAddr, 0, 0); + +//***************************************************************************** +// +// The button used to initiate a boot loader software update. +// +//***************************************************************************** +RectangularButton(g_sPushBtn, &g_sBackground, &g_sMACAddr, 0, + &g_sKentec320x240x16_SSD2119, 60, 110, 200, 40, + (PB_STYLE_OUTLINE | PB_STYLE_TEXT_OPAQUE | PB_STYLE_TEXT | + PB_STYLE_FILL | PB_STYLE_RELEASE_NOTIFY), + ClrDarkBlue, ClrBlue, ClrWhite, ClrWhite, + g_psFontCmss22b, "Update Now", 0, 0, 0, 0, OnButtonPress); + +//***************************************************************************** +// +// The canvas widget acting as the background to the display. +// +//***************************************************************************** +Canvas(g_sBackground, WIDGET_ROOT, 0, &g_sPushBtn, + &g_sKentec320x240x16_SSD2119, 10, 25, 300, (240 - 35), + CANVAS_STYLE_FILL, ClrBlack, 0, 0, 0, 0, 0, 0); + +//***************************************************************************** +// +// The error routine that is called if the driver library encounters an error. +// +//***************************************************************************** +#ifdef DEBUG +void +__error__(char *pcFilename, uint32_t ui32Line) +{ +} +#endif + +//***************************************************************************** +// +// This is the handler for this SysTick interrupt. We use this to provide the +// required timer call to the lwIP stack. +// +//***************************************************************************** +void +SysTickHandler(void) +{ + // + // Call the lwIP timer. + // + lwIPTimer(1000 / TICKS_PER_SECOND); +} + +//***************************************************************************** +// +// Passes control to the bootloader and initiates a remote software update. +// +// This function passes control to the bootloader and initiates an update of +// the main application firmware image via UART0, Ethernet or USB depending +// upon the specific boot loader binary in use. +// +// \return Never returns. +// +//***************************************************************************** +void +JumpToBootLoader(void) +{ + // + // We must make sure we turn off SysTick and its interrupt before entering + // the boot loader! + // + ROM_SysTickIntDisable(); + ROM_SysTickDisable(); + + // + // Disable all processor interrupts. Instead of disabling them + // one at a time, a direct write to NVIC is done to disable all + // peripheral interrupts. + // + HWREG(NVIC_DIS0) = 0xffffffff; + HWREG(NVIC_DIS1) = 0xffffffff; + HWREG(NVIC_DIS2) = 0xffffffff; + HWREG(NVIC_DIS3) = 0xffffffff; + HWREG(NVIC_DIS4) = 0xffffffff; + + // + // Return control to the boot loader. This is a call to the SVC + // handler in the flash based boot loader. + // + (*((void (*)(void))(*(unsigned long *)0x2c)))(); +} + +//***************************************************************************** +// +// Perform the initialization steps required to start up the Ethernet controller +// and lwIP stack. +// +//***************************************************************************** +void +SetupForEthernet(void) +{ + uint32_t ui32User0, ui32User1; + uint8_t pui8MACAddr[6]; + + // + // Configure SysTick for a 100Hz interrupt. + // + ROM_SysTickPeriodSet(g_ui32SysClock / TICKS_PER_SECOND); + ROM_SysTickEnable(); + ROM_SysTickIntEnable(); + + // + // Get the MAC address from the UART0 and UART1 registers in NV ram. + // + ROM_FlashUserGet(&ui32User0, &ui32User1); + + // + // Convert the 24/24 split MAC address from NV ram into a MAC address + // array. + // + pui8MACAddr[0] = ui32User0 & 0xff; + pui8MACAddr[1] = (ui32User0 >> 8) & 0xff; + pui8MACAddr[2] = (ui32User0 >> 16) & 0xff; + pui8MACAddr[3] = ui32User1 & 0xff; + pui8MACAddr[4] = (ui32User1 >> 8) & 0xff; + pui8MACAddr[5] = (ui32User1 >> 16) & 0xff; + + // + // Format this address into the string used by the relevant widget. + // + usnprintf(g_pcMACAddr, SIZE_MAC_ADDR_BUFFER, + "MAC: %02X-%02X-%02X-%02X-%02X-%02X", + pui8MACAddr[0], pui8MACAddr[1], pui8MACAddr[2], pui8MACAddr[3], + pui8MACAddr[4], pui8MACAddr[5]); + + // + // Remember that we don't have an IP address yet. + // + usnprintf(g_pcIPAddr, SIZE_IP_ADDR_BUFFER, "IP: Not assigned"); + + // + // Initialize the lwIP TCP/IP stack. + // + lwIPInit(g_ui32SysClock, pui8MACAddr, 0, 0, 0, IPADDR_USE_DHCP); +} + +//***************************************************************************** +// +// Initialize UART0 and set the appropriate communication parameters. +// +//***************************************************************************** +void +SetupForUART(void) +{ + // + // Enable UART0 peripheral. + // + ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_UART0); + + // + // Configure the UART for 115200, n, 8, 1 + // + ROM_UARTConfigSetExpClk(UART0_BASE, g_ui32SysClock, 115200, + (UART_CONFIG_PAR_NONE | UART_CONFIG_STOP_ONE | + UART_CONFIG_WLEN_8)); + + // + // Enable the UART operation. + // + ROM_UARTEnable(UART0_BASE); +} + +//***************************************************************************** +// +// Enable the USB controller +// +//***************************************************************************** +void +SetupForUSB(void) +{ + ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_USB0); + ROM_USBClockEnable(USB0_BASE, 8, USB_CLOCK_INTERNAL); +} + +//***************************************************************************** +// +// This function is called by the graphics library widget manager whenever the +// "Update Now" button is pressed. It sets a flag that the main loop checks +// and, when set, causes control to transfer to the boot loader. +// +//***************************************************************************** +void +OnButtonPress(tWidget *psWidget) +{ + g_bFirmwareUpdate = true; +} + +//***************************************************************************** +// +// A simple application demonstrating use of the boot loader, +// +//***************************************************************************** +int +main(void) +{ + unsigned long ui32NewIPAddr; + tContext sContext; + + // + // Run from the PLL at 120 MHz. + // + g_ui32SysClock = MAP_SysCtlClockFreqSet((SYSCTL_XTAL_25MHZ | + SYSCTL_OSC_MAIN | SYSCTL_USE_PLL | + SYSCTL_CFG_VCO_480), 120000000); + + // + // Configure the device pins. + // + PinoutSet(); + + // + // Initialize the display driver. + // + Kentec320x240x16_SSD2119Init(g_ui32SysClock); + + // + // Initialize the graphics context. + // + GrContextInit(&sContext, &g_sKentec320x240x16_SSD2119); + + // + // Draw the application frame. + // + FrameDraw(&sContext, "boot-demo-flash"); + + // + // Initialize the peripherals that each of the boot loader flavors + // supports. Since this example is intended for use with any of the + // boot loaders and we don't know which is actually in use, we cover all + // bases and initialize for serial, Ethernet and USB use here. + // + SetupForUART(); + SetupForEthernet(); + SetupForUSB(); + + // + // Enable Interrupts + // + ROM_IntMasterEnable(); + + // + // Initialize the touch screen driver. + // + TouchScreenInit(g_ui32SysClock); + + // + // Set the touch screen event handler. + // + TouchScreenCallbackSet(WidgetPointerMessage); + + // + // Add the compile-time defined widgets to the widget tree. + // + WidgetAdd(WIDGET_ROOT, (tWidget *)&g_sBackground); + + // + // Paint the widget tree to make sure they all appear on the display. + // + WidgetPaint(WIDGET_ROOT); + + // + // We don't have an IP address yet so clear the variable to tell us to + // check until we are assigned one. + // + g_ui32IPAddress = 0; + + // + // Loop forever, processing widget messages. + // + while(!g_bFirmwareUpdate) + { + // + // Do we have an IP address yet? If not, check to see if we've been + // assigned one since the last time we checked. + // + if(g_ui32IPAddress == 0 || g_ui32IPAddress == 0xffffffff) + { + // + // What is our current IP address? + // + ui32NewIPAddr = lwIPLocalIPAddrGet(); + + // + // See if the IP address has changed. + // + if(ui32NewIPAddr != g_ui32IPAddress) + { + // + // If it's non zero, update the display. + // + if(ui32NewIPAddr == 0xffffffff) + { + usnprintf(g_pcIPAddr, SIZE_IP_ADDR_BUFFER, + "IP: waiting for link"); + } + else if(ui32NewIPAddr == 0) + { + usnprintf(g_pcIPAddr, SIZE_IP_ADDR_BUFFER, + "IP: waiting for IP address"); + } + else + { + usprintf(g_pcIPAddr, "IP: %d.%d.%d.%d", + ui32NewIPAddr & 0xff, + (ui32NewIPAddr >> 8) & 0xff, + (ui32NewIPAddr >> 16) & 0xff, + ui32NewIPAddr >> 24); + } + WidgetPaint((tWidget *)&g_sIPAddr); + + // + // Save the new IP address. + // + g_ui32IPAddress = ui32NewIPAddr; + } + } + + // + // Process any messages from or for the widgets. + // + WidgetMessageQueueProcess(); + } + + // + // If we drop out, the user has pressed the "Update Now" button so we + // tidy up and transfer control to the boot loader. + // + + // + // Tell the user that we got their instruction. + // + PushButtonTextSet(&g_sPushBtn, "Wait for Update..."); + WidgetPaint((tWidget *)&g_sPushBtn); + + // + // Process all remaining messages on the queue (including the paint message + // we just posted). + // + WidgetMessageQueueProcess(); + + // + // Transfer control to the boot loader. + // + JumpToBootLoader(); + + // + // The previous function never returns but we need to stick in a return + // code here to keep the compiler from generating a warning. + // + return(0); +} diff --git a/boards/dk-tm4c129x/boot_demo_flash/boot_demo_flash.ewd b/boards/dk-tm4c129x/boot_demo_flash/boot_demo_flash.ewd new file mode 100644 index 0000000..484e41a --- /dev/null +++ b/boards/dk-tm4c129x/boot_demo_flash/boot_demo_flash.ewd @@ -0,0 +1,614 @@ + + + + 1 + + Debug + + ARM + + 1 + + C-SPY + 2 + + 15 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + ARMSIM_ID + 2 + + 1 + 1 + 1 + + + + + + + + ANGEL_ID + 2 + + 0 + 1 + 1 + + + + + + + + + + + + GDBSERVER_ID + 2 + + 0 + 1 + 1 + + + + + + + + + + + IARROM_ID + 2 + + 0 + 1 + 1 + + + + + + + + + + JLINK_ID + 2 + + 9 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + LMIFTDI_ID + 2 + + 1 + 1 + 1 + + + + + + + + MACRAIGOR_ID + 2 + + 2 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + RDI_ID + 2 + + 1 + 1 + 1 + + + + + + + + + + + + + + + + + THIRDPARTY_ID + 2 + + 0 + 1 + 1 + + + + + + + + + $TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\OSE\OseEpsilonPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\PowerPac\PowerPacRTOS.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin + 0 + + + $EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin + 1 + + + $EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin + 0 + + + $EW_DIR$\common\plugins\Profiling\Profiling.ENU.ewplugin + 1 + + + $EW_DIR$\common\plugins\Stack\Stack.ENU.ewplugin + 1 + + + + diff --git a/boards/dk-tm4c129x/boot_demo_flash/boot_demo_flash.ewp b/boards/dk-tm4c129x/boot_demo_flash/boot_demo_flash.ewp new file mode 100644 index 0000000..ff10bdb --- /dev/null +++ b/boards/dk-tm4c129x/boot_demo_flash/boot_demo_flash.ewp @@ -0,0 +1,821 @@ + + + + 1 + + Debug + + ARM + + 1 + + General + 3 + + 14 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCARM + 2 + + 19 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AARM + 2 + + 7 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + OBJCOPY + 0 + + 1 + 1 + 1 + + + + + + + + + CUSTOM + 3 + + + + + + + BICOMP + 0 + + + + BUILDACTION + 1 + + + + + + + ILINK + 0 + + 5 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + IARCHIVE + 0 + + 0 + 1 + 1 + + + + + + + BILINK + 0 + + + + + Libraries + + $PROJ_DIR$\..\..\..\..\driverlib\ewarm\Exe\driverlib.a + + + $PROJ_DIR$\..\..\..\..\grlib\ewarm\Exe\grlib.a + + + + Source + + $PROJ_DIR$\boot_demo_flash.c + + + $PROJ_DIR$\..\drivers\frame.c + + + $PROJ_DIR$\..\drivers\kentec320x240x16_ssd2119.c + + + $PROJ_DIR$\..\..\..\..\utils\lwiplib.c + + + $PROJ_DIR$\..\drivers\pinout.c + + + $PROJ_DIR$\startup_ewarm.c + + + $PROJ_DIR$\..\drivers\touch.c + + + $PROJ_DIR$\..\..\..\..\utils\ustdlib.c + + + diff --git a/boards/dk-tm4c129x/boot_demo_flash/boot_demo_flash.icf b/boards/dk-tm4c129x/boot_demo_flash/boot_demo_flash.icf new file mode 100644 index 0000000..fa872e2 --- /dev/null +++ b/boards/dk-tm4c129x/boot_demo_flash/boot_demo_flash.icf @@ -0,0 +1,78 @@ +//***************************************************************************** +// +// boot_demo_flash.icf - Linker configuration file for boot_demo_flash. +// +// Copyright (c) 2013-2014 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 2.1.0.12573 of the DK-TM4C129X Firmware Package. +// +//***************************************************************************** + +// +// Define a memory region that covers the entire 4 GB addressible space of the +// processor. +// +define memory mem with size = 4G; + +// +// Define a region for the on-chip flash. +// +define region FLASH = mem:[from 0x00004000 to 0x000fffff]; + +// +// Define a region for the on-chip SRAM. +// +define region SRAM = mem:[from 0x20000000 to 0x2003ffff]; + +// +// Define a block for the heap. The size should be set to something other +// than zero if things in the C library that require the heap are used. +// +define block HEAP with alignment = 8, size = 0x00000000 { }; + +// +// Indicate that the read/write values should be initialized by copying from +// flash. +// +initialize by copy { readwrite }; + +// +// Indicate that the noinit values should be left alone. This includes the +// stack, which if initialized will destroy the return address from the +// initialization code, causing the processor to branch to zero and fault. +// +do not initialize { section .noinit }; + +// +// Place the interrupt vectors at the start of flash. +// +place at start of FLASH { readonly section .intvec }; + +// +// Place the remainder of the read-only items into flash. +// +place in FLASH { readonly }; + +// +// Place the RAM vector table at the start of SRAM. +// +place at start of SRAM { section VTABLE }; + +// +// Place all read/write items into SRAM. +// +place in SRAM { readwrite, block HEAP }; diff --git a/boards/dk-tm4c129x/boot_demo_flash/boot_demo_flash.ld b/boards/dk-tm4c129x/boot_demo_flash/boot_demo_flash.ld new file mode 100644 index 0000000..7c06009 --- /dev/null +++ b/boards/dk-tm4c129x/boot_demo_flash/boot_demo_flash.ld @@ -0,0 +1,57 @@ +/****************************************************************************** + * + * boot_demo_flash.ld - Linker configuration file for boot_demo_flash. + * + * Copyright (c) 2013-2014 Texas Instruments Incorporated. All rights reserved. + * Software License Agreement + * + * Texas Instruments (TI) is supplying this software for use solely and + * exclusively on TI's microcontroller products. The software is owned by + * TI and/or its suppliers, and is protected under applicable copyright + * laws. You may not combine this software with "viral" open-source + * software in order to form a larger program. + * + * THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. + * NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT + * NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY + * CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL + * DAMAGES, FOR ANY REASON WHATSOEVER. + * + * This is part of revision 2.1.0.12573 of the DK-TM4C129X Firmware Package. + * + *****************************************************************************/ + +MEMORY +{ + FLASH (rx) : ORIGIN = 0x00004000, LENGTH = 0x000fc000 + SRAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00040000 +} + +SECTIONS +{ + .text : + { + _text = .; + KEEP(*(.isr_vector)) + *(.text*) + *(.rodata*) + _etext = .; + } > FLASH + + .data : AT(ADDR(.text) + SIZEOF(.text)) + { + _data = .; + *(vtable) + *(.data*) + _edata = .; + } > SRAM + + .bss : + { + _bss = .; + *(.bss*) + *(COMMON) + _ebss = .; + } > SRAM +} diff --git a/boards/dk-tm4c129x/boot_demo_flash/boot_demo_flash.sct b/boards/dk-tm4c129x/boot_demo_flash/boot_demo_flash.sct new file mode 100644 index 0000000..70a3d1a --- /dev/null +++ b/boards/dk-tm4c129x/boot_demo_flash/boot_demo_flash.sct @@ -0,0 +1,47 @@ +;****************************************************************************** +; +; boot_demo_flash.sct - Linker configuration file for boot_demo_flash. +; +; Copyright (c) 2013-2014 Texas Instruments Incorporated. All rights reserved. +; Software License Agreement +; +; Texas Instruments (TI) is supplying this software for use solely and +; exclusively on TI's microcontroller products. The software is owned by +; TI and/or its suppliers, and is protected under applicable copyright +; laws. You may not combine this software with "viral" open-source +; software in order to form a larger program. +; +; THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +; NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +; NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +; A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +; CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +; DAMAGES, FOR ANY REASON WHATSOEVER. +; +; This is part of revision 2.1.0.12573 of the DK-TM4C129X Firmware Package. +; +;****************************************************************************** + +LR_IROM 0x00004000 0x000fc000 +{ + ; + ; Specify the Execution Address of the code and the size. + ; + ER_IROM 0x00004000 0x000fc000 + { + *.o (RESET, +First) + * (InRoot$$Sections, +RO) + } + + ; + ; Specify the Execution Address of the data area. + ; + RW_IRAM 0x20000000 0x00040000 + { + ; + ; Uncomment the following line in order to use IntRegister(). + ; + ;* (vtable, +First) + * (+RW, +ZI) + } +} diff --git a/boards/dk-tm4c129x/boot_demo_flash/boot_demo_flash.uvopt b/boards/dk-tm4c129x/boot_demo_flash/boot_demo_flash.uvopt new file mode 100644 index 0000000..3c080f8 --- /dev/null +++ b/boards/dk-tm4c129x/boot_demo_flash/boot_demo_flash.uvopt @@ -0,0 +1,387 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + + + + 0 + 0 + + + + boot_demo_flash + 0x4 + ARM-ADS + + 25000000 + + 1 + 1 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\rvmdk\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 255 + + + 0 + Data Sheet + DATASHTS\Luminary\TM4C129XNCZAD.PDF + + + + SARMCM3.DLL + -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 0 + 1 + 0 + 0 + 4 + + + + + + + + + + + BIN\lmidk-agdi.dll + + + + 0 + lmidk-agdi + -O4614 -S1 -FO29 + + + 0 + DLGTARM + + + + 0 + ARMDBGFLAGS + + + + + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + Source + 1 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + .\boot_demo_flash.c + boot_demo_flash.c + + + 1 + 2 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\drivers\frame.c + frame.c + + + 1 + 3 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\drivers\kentec320x240x16_ssd2119.c + kentec320x240x16_ssd2119.c + + + 1 + 4 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\..\utils\lwiplib.c + lwiplib.c + + + 1 + 5 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\drivers\pinout.c + pinout.c + + + 1 + 6 + 2 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + .\startup_rvmdk.S + startup_rvmdk.S + + + 1 + 7 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\drivers\touch.c + touch.c + + + 1 + 8 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\..\utils\ustdlib.c + ustdlib.c + + + + + Libraries + 1 + 0 + 0 + + 2 + 9 + 4 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\..\driverlib\rvmdk\driverlib.lib + driverlib.lib + + + 2 + 10 + 4 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\..\grlib\rvmdk\grlib.lib + grlib.lib + + + + + Documentation + 1 + 0 + 0 + + 3 + 11 + 5 + 0 + 1 + 0 + 0 + 1 + 1 + 0 + .\readme.txt + readme.txt + + 44 + 0 + 1 + + -1 + -1 + + + -1 + -1 + + + 0 + 0 + 729 + 300 + + + + + + + 1 + 0 + + 100 + 0 + + + .\readme.txt + 0 + 1 + 1 + + + + + + diff --git a/boards/dk-tm4c129x/boot_demo_flash/boot_demo_flash.uvproj b/boards/dk-tm4c129x/boot_demo_flash/boot_demo_flash.uvproj new file mode 100644 index 0000000..9da41c2 --- /dev/null +++ b/boards/dk-tm4c129x/boot_demo_flash/boot_demo_flash.uvproj @@ -0,0 +1,459 @@ + + + + 1.1 + +
### uVision Project, (C) Keil Software
+ + + + boot_demo_flash + 0x4 + ARM-ADS + + + TM4C129XNCZAD + Texas Instruments + IRAM(0x20000000-0x2003FFFF) IROM(0-0xFFFFF) CLOCK(25000000) CPUTYPE("Cortex-M4") FPU2 + + "STARTUP\Luminary\Startup.s" ("Luminary Startup Code") + UL2CM3(-O207 -S0 -C0 -FO7 -FD20000000 -FC800 -FN1 -FF0LM4F_1024 -FS00 -FL0100000) + 5919 + LM4Fxxxx.H + + + + + + + + + + 0 + + + + Luminary\ + Luminary\ + + 0 + 0 + 0 + 0 + 1 + + .\rvmdk\ + boot_demo_flash + 1 + 0 + 0 + 1 + 1 + .\rvmdk\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + + 1 + 0 + fromelf --bin --output .\rvmdk\boot_demo_flash.bin .\rvmdk\boot_demo_flash.axf + + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + + + SARMCM3.DLL + -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + + 1 + 0 + 0 + 0 + 16 + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + + + 1 + 1 + 0 + 1 + 1 + 1 + 0 + 1 + + 0 + 4 + + + + + + + + + + + + + + BIN\lmidk-agdi.dll + + + + + 1 + 0 + 0 + 0 + 1 + 4099 + + BIN\lmidk-agdi.dll + + + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M4" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 2 + 0 + 0 + 8 + 1 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x40000 + + + 1 + 0x0 + 0x100000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x100000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x40000 + + + 0 + 0x0 + 0x0 + + + + + + 0 + 3 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + + --c99 + rvmdk PART_TM4C129XNCZAD TARGET_IS_TM4C129_RA0 + + .;..;..\..\..\..;..\..\..\..\third_party\lwip-1.4.1\apps;..\..\..\..\third_party\bget;..\..\..\..\third_party\lwip-1.4.1\ports\tiva-tm4c129\include;..\..\..\..\third_party\lwip-1.4.1\src\include;..\..\..\..\third_party\lwip-1.4.1\src\include\ipv4;..\..\..\..\third_party; + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x00000000 + 0x20000000 + boot_demo_flash.sct + + + --entry Reset_Handler + + + + + + + + Source + + + boot_demo_flash.c + 1 + .\boot_demo_flash.c + + + frame.c + 1 + ..\drivers\frame.c + + + kentec320x240x16_ssd2119.c + 1 + ..\drivers\kentec320x240x16_ssd2119.c + + + lwiplib.c + 1 + ..\..\..\..\utils\lwiplib.c + + + pinout.c + 1 + ..\drivers\pinout.c + + + startup_rvmdk.S + 2 + .\startup_rvmdk.S + + + touch.c + 1 + ..\drivers\touch.c + + + ustdlib.c + 1 + ..\..\..\..\utils\ustdlib.c + + + + + Libraries + + + driverlib.lib + 4 + ..\..\..\..\driverlib\rvmdk\driverlib.lib + + + grlib.lib + 4 + ..\..\..\..\grlib\rvmdk\grlib.lib + + + + + Documentation + + + readme.txt + 5 + .\readme.txt + + + + + + + + diff --git a/boards/dk-tm4c129x/boot_demo_flash/boot_demo_flash_ccs.cmd b/boards/dk-tm4c129x/boot_demo_flash/boot_demo_flash_ccs.cmd new file mode 100644 index 0000000..f7126a2 --- /dev/null +++ b/boards/dk-tm4c129x/boot_demo_flash/boot_demo_flash_ccs.cmd @@ -0,0 +1,70 @@ +/****************************************************************************** + * + * boot_demo_flash_ccs.cmd - CCS linker configuration file for boot_demo_flash. + * + * Copyright (c) 2013-2014 Texas Instruments Incorporated. All rights reserved. + * Software License Agreement + * + * Texas Instruments (TI) is supplying this software for use solely and + * exclusively on TI's microcontroller products. The software is owned by + * TI and/or its suppliers, and is protected under applicable copyright + * laws. You may not combine this software with "viral" open-source + * software in order to form a larger program. + * + * THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. + * NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT + * NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY + * CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL + * DAMAGES, FOR ANY REASON WHATSOEVER. + * + * This is part of revision 2.1.0.12573 of the DK-TM4C129X Firmware Package. + * + *****************************************************************************/ + +--retain=g_pfnVectors + +/* The following command line options are set as part of the CCS project. */ +/* If you are building using the command line, or for some reason want to */ +/* define them here, you can uncomment and modify these lines as needed. */ +/* If you are using CCS for building, it is probably better to make any such */ +/* modifications in your CCS project and leave this file alone. */ +/* */ +/* --heap_size=0 */ +/* --stack_size=256 */ +/* --library=rtsv7M3_T_le_eabi.lib */ + +/* The starting address of the application. Normally the interrupt vectors */ +/* must be located at the beginning of the application. */ +#define APP_BASE 0x00004000 +#define RAM_BASE 0x20000000 + +/* System memory map */ + +MEMORY +{ + /* Application stored in and executes from internal flash */ + FLASH (RX) : origin = APP_BASE, length = 0x000fc000 + /* Application uses internal RAM for data */ + SRAM (RWX) : origin = 0x20000000, length = 0x00040000 +} + +/* Section allocation in memory */ + +SECTIONS +{ + .intvecs: > APP_BASE + .text : > FLASH + .const : > FLASH + .cinit : > FLASH + .pinit : > FLASH + .init_array : > FLASH + + .vtable : > RAM_BASE + .data : > SRAM + .bss : > SRAM + .sysmem : > SRAM + .stack : > SRAM +} + +__STACK_TOP = __stack + 1024; diff --git a/boards/dk-tm4c129x/boot_demo_flash/ccs/.ccsimportspec b/boards/dk-tm4c129x/boot_demo_flash/ccs/.ccsimportspec new file mode 100644 index 0000000..a735210 --- /dev/null +++ b/boards/dk-tm4c129x/boot_demo_flash/ccs/.ccsimportspec @@ -0,0 +1,9 @@ + + + + + + + + + diff --git a/boards/dk-tm4c129x/boot_demo_flash/ccs/.ccsproject b/boards/dk-tm4c129x/boot_demo_flash/ccs/.ccsproject new file mode 100644 index 0000000..59a3400 --- /dev/null +++ b/boards/dk-tm4c129x/boot_demo_flash/ccs/.ccsproject @@ -0,0 +1,10 @@ + + + + + + + + + + diff --git a/boards/dk-tm4c129x/boot_demo_flash/ccs/.cproject b/boards/dk-tm4c129x/boot_demo_flash/ccs/.cproject new file mode 100644 index 0000000..8994b43 --- /dev/null +++ b/boards/dk-tm4c129x/boot_demo_flash/ccs/.cproject @@ -0,0 +1,205 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/boards/dk-tm4c129x/boot_demo_flash/ccs/.project b/boards/dk-tm4c129x/boot_demo_flash/ccs/.project new file mode 100644 index 0000000..ed043d5 --- /dev/null +++ b/boards/dk-tm4c129x/boot_demo_flash/ccs/.project @@ -0,0 +1,80 @@ + + + boot_demo_flash + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + com.ti.ccstudio.core.ccsNature + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.core.ccnature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + boot_demo_flash.c + 1 + SW_ROOT/examples/boards/dk-tm4c129x/boot_demo_flash/boot_demo_flash.c + + + boot_demo_flash_ccs.cmd + 1 + SW_ROOT/examples/boards/dk-tm4c129x/boot_demo_flash/boot_demo_flash_ccs.cmd + + + startup_ccs.c + 1 + SW_ROOT/examples/boards/dk-tm4c129x/boot_demo_flash/startup_ccs.c + + + drivers/frame.c + 1 + SW_ROOT/examples/boards/dk-tm4c129x/drivers/frame.c + + + drivers/kentec320x240x16_ssd2119.c + 1 + SW_ROOT/examples/boards/dk-tm4c129x/drivers/kentec320x240x16_ssd2119.c + + + drivers/pinout.c + 1 + SW_ROOT/examples/boards/dk-tm4c129x/drivers/pinout.c + + + drivers/touch.c + 1 + SW_ROOT/examples/boards/dk-tm4c129x/drivers/touch.c + + + utils/lwiplib.c + 1 + SW_ROOT/utils/lwiplib.c + + + utils/ustdlib.c + 1 + SW_ROOT/utils/ustdlib.c + + + + + SW_ROOT + $%7BPARENT-5-PROJECT_LOC%7D + + + diff --git a/boards/dk-tm4c129x/boot_demo_flash/ccs/.settings/org.eclipse.cdt.codan.core.prefs b/boards/dk-tm4c129x/boot_demo_flash/ccs/.settings/org.eclipse.cdt.codan.core.prefs new file mode 100644 index 0000000..98b6350 --- /dev/null +++ b/boards/dk-tm4c129x/boot_demo_flash/ccs/.settings/org.eclipse.cdt.codan.core.prefs @@ -0,0 +1,3 @@ +eclipse.preferences.version=1 +inEditor=false +onBuild=false diff --git a/boards/dk-tm4c129x/boot_demo_flash/ccs/Debug/boot_demo_flash.bin b/boards/dk-tm4c129x/boot_demo_flash/ccs/Debug/boot_demo_flash.bin new file mode 100644 index 0000000..1676872 Binary files /dev/null and b/boards/dk-tm4c129x/boot_demo_flash/ccs/Debug/boot_demo_flash.bin differ diff --git a/boards/dk-tm4c129x/boot_demo_flash/ccs/Debug/boot_demo_flash.out b/boards/dk-tm4c129x/boot_demo_flash/ccs/Debug/boot_demo_flash.out new file mode 100644 index 0000000..1e52aeb Binary files /dev/null and b/boards/dk-tm4c129x/boot_demo_flash/ccs/Debug/boot_demo_flash.out differ diff --git a/boards/dk-tm4c129x/boot_demo_flash/ccs/macros.ini_initial b/boards/dk-tm4c129x/boot_demo_flash/ccs/macros.ini_initial new file mode 100644 index 0000000..31214b5 --- /dev/null +++ b/boards/dk-tm4c129x/boot_demo_flash/ccs/macros.ini_initial @@ -0,0 +1 @@ +SW_ROOT = ../../../../.. diff --git a/boards/dk-tm4c129x/boot_demo_flash/ccs/target_config.ccxml b/boards/dk-tm4c129x/boot_demo_flash/ccs/target_config.ccxml new file mode 100644 index 0000000..6e5ef45 --- /dev/null +++ b/boards/dk-tm4c129x/boot_demo_flash/ccs/target_config.ccxml @@ -0,0 +1,13 @@ + + + + + + + + + + + + + diff --git a/boards/dk-tm4c129x/boot_demo_flash/ewarm/Exe/boot_demo_flash.bin b/boards/dk-tm4c129x/boot_demo_flash/ewarm/Exe/boot_demo_flash.bin new file mode 100644 index 0000000..60103be Binary files /dev/null and b/boards/dk-tm4c129x/boot_demo_flash/ewarm/Exe/boot_demo_flash.bin differ diff --git a/boards/dk-tm4c129x/boot_demo_flash/ewarm/Exe/boot_demo_flash.out b/boards/dk-tm4c129x/boot_demo_flash/ewarm/Exe/boot_demo_flash.out new file mode 100644 index 0000000..ec7dc38 Binary files /dev/null and b/boards/dk-tm4c129x/boot_demo_flash/ewarm/Exe/boot_demo_flash.out differ diff --git a/boards/dk-tm4c129x/boot_demo_flash/gcc/boot_demo_flash.axf b/boards/dk-tm4c129x/boot_demo_flash/gcc/boot_demo_flash.axf new file mode 100644 index 0000000..717bbab Binary files /dev/null and b/boards/dk-tm4c129x/boot_demo_flash/gcc/boot_demo_flash.axf differ diff --git a/boards/dk-tm4c129x/boot_demo_flash/gcc/boot_demo_flash.bin b/boards/dk-tm4c129x/boot_demo_flash/gcc/boot_demo_flash.bin new file mode 100644 index 0000000..611ca4f Binary files /dev/null and b/boards/dk-tm4c129x/boot_demo_flash/gcc/boot_demo_flash.bin differ diff --git a/boards/dk-tm4c129x/boot_demo_flash/lwipopts.h b/boards/dk-tm4c129x/boot_demo_flash/lwipopts.h new file mode 100644 index 0000000..932dfb5 --- /dev/null +++ b/boards/dk-tm4c129x/boot_demo_flash/lwipopts.h @@ -0,0 +1,433 @@ +//***************************************************************************** +// +// lwipopts.h - Configuration file for lwIP +// +// Copyright (c) 2013-2014 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 2.1.0.12573 of the DK-TM4C129X Firmware Package. +// +//***************************************************************************** +// +// NOTE: This file has been derived from the lwIP/src/include/lwip/opt.h +// header file. +// +// For additional details, refer to the original "opt.h" file, and lwIP +// documentation. +// +//***************************************************************************** + +#ifndef __LWIPOPTS_H__ +#define __LWIPOPTS_H__ + +//***************************************************************************** +// +// ---------- Stellaris / lwIP Port Options ---------- +// +//***************************************************************************** +//#define HOST_TMR_INTERVAL 0 +//#define DHCP_EXPIRE_TIMER_MSECS (60 * 1000) +//#define INCLUDE_HTTPD_SSI +//#define INCLUDE_HTTPD_CGI +//#define DYNAMIC_HTTP_HEADERS +//#define INCLUDE_HTTPD_DEBUG + +//***************************************************************************** +// +// ---------- Platform specific locking ---------- +// +//***************************************************************************** +#define SYS_LIGHTWEIGHT_PROT 1 // default is 0 +#define NO_SYS 1 // default is 0 +//#define MEMCPY(dst,src,len) memcpy(dst,src,len) +//#define SMEMCPY(dst,src,len) memcpy(dst,src,len) + +//***************************************************************************** +// +// ---------- Memory options ---------- +// +//***************************************************************************** +//#define MEM_LIBC_MALLOC 0 +#define MEM_ALIGNMENT 4 // default is 1 +#define MEM_SIZE (24 * 1024) // default is 1600 +//#define MEMP_OVERFLOW_CHECK 0 +//#define MEMP_SANITY_CHECK 0 +//#define MEM_USE_POOLS 0 +//#define MEMP_USE_CUSTOM_POOLS 0 + +//***************************************************************************** +// +// ---------- Internal Memory Pool Sizes ---------- +// +//***************************************************************************** +#define MEMP_NUM_PBUF 20 // Was 16 +//#define MEMP_NUM_RAW_PCB 4 +//#define MEMP_NUM_UDP_PCB 4 +#define MEMP_NUM_TCP_PCB 8 // Was 5 +//#define MEMP_NUM_TCP_PCB_LISTEN 8 +#define MEMP_NUM_TCP_SEG 16 +//#define MEMP_NUM_REASSDATA 5 +//#define MEMP_NUM_ARP_QUEUE 30 +//#define MEMP_NUM_IGMP_GROUP 8 +//#define MEMP_NUM_SYS_TIMEOUT 3 +//#define MEMP_NUM_NETBUF 2 +//#define MEMP_NUM_NETCONN 4 +//#define MEMP_NUM_TCPIP_MSG_API 8 +//#define MEMP_NUM_TCPIP_MSG_INPKT 8 +#define PBUF_POOL_SIZE 20 // Was 16 + +//***************************************************************************** +// +// ---------- ARP options ---------- +// +//***************************************************************************** +//#define LWIP_ARP 1 +//#define ARP_TABLE_SIZE 10 +//#define ARP_QUEUEING 1 +//#define ETHARP_TRUST_IP_MAC 1 + +//***************************************************************************** +// +// ---------- IP options ---------- +// +//***************************************************************************** +//#define IP_FORWARD 0 +//#define IP_OPTIONS_ALLOWED 1 +#define IP_REASSEMBLY 0 // default is 1 +#define IP_FRAG 0 // default is 1 +//#define IP_REASS_MAXAGE 3 +//#define IP_REASS_MAX_PBUFS 10 +//#define IP_FRAG_USES_STATIC_BUF 1 +//#define IP_FRAG_MAX_MTU 1500 +//#define IP_DEFAULT_TTL 255 + +//***************************************************************************** +// +// ---------- ICMP options ---------- +// +//***************************************************************************** +//#define LWIP_ICMP 1 +//#define ICMP_TTL (IP_DEFAULT_TTL) + +//***************************************************************************** +// +// ---------- RAW options ---------- +// +//***************************************************************************** +//#define LWIP_RAW 1 +//#define RAW_TTL (IP_DEFAULT_TTL) + +//***************************************************************************** +// +// ---------- DHCP options ---------- +// +//***************************************************************************** +#define LWIP_DHCP 1 // default is 0 +//#define DHCP_DOES_ARP_CHECK ((LWIP_DHCP) && (LWIP_ARP)) + +//***************************************************************************** +// +// ---------- UPNP options ---------- +// +//***************************************************************************** +//#define LWIP_UPNP 0 + +//***************************************************************************** +// +// ---------- PTPD options ---------- +// +//***************************************************************************** +//#define LWIP_PTPD 0 + +//***************************************************************************** +// +// ---------- AUTOIP options ---------- +// +//***************************************************************************** +#define LWIP_AUTOIP 1 // default is 0 +#define LWIP_DHCP_AUTOIP_COOP ((LWIP_DHCP) && (LWIP_AUTOIP)) + // default is 0 +#define LWIP_DHCP_AUTOIP_COOP_TRIES 5 // default is 9 + +//***************************************************************************** +// +// ---------- SNMP options ---------- +// +//***************************************************************************** +//#define LWIP_SNMP 0 +//#define SNMP_CONCURRENT_REQUESTS 1 +//#define SNMP_TRAP_DESTINATIONS 1 +//#define SNMP_PRIVATE_MIB 0 +//#define SNMP_SAFE_REQUESTS 1 + +//***************************************************************************** +// +// ---------- IGMP options ---------- +// +//***************************************************************************** +//#define LWIP_IGMP 0 + +//***************************************************************************** +// +// ---------- DNS options ----------- +// +//***************************************************************************** +//#define LWIP_DNS 0 +//#define DNS_TABLE_SIZE 4 +//#define DNS_MAX_NAME_LENGTH 256 +//#define DNS_MAX_SERVERS 2 +//#define DNS_DOES_NAME_CHECK 1 +//#define DNS_USES_STATIC_BUF 1 +//#define DNS_MSG_SIZE 512 + +//***************************************************************************** +// +// ---------- UDP options ---------- +// +//***************************************************************************** +//#define LWIP_UDP 1 +//#define LWIP_UDPLITE 0 +//#define UDP_TTL (IP_DEFAULT_TTL) + +//***************************************************************************** +// +// ---------- TCP options ---------- +// +//***************************************************************************** +//#define LWIP_TCP 1 +//#define TCP_TTL (IP_DEFAULT_TTL) +#define TCP_WND 1024 // default is 2048, was 4096 +//#define TCP_MAXRTX 12 +//#define TCP_SYNMAXRTX 6 +//#define TCP_QUEUE_OOSEQ 1 +#define TCP_MSS 512 // default is 128, was 1500 +//#define TCP_CALCULATE_EFF_SEND_MSS 1 +#define TCP_SND_BUF (4 * TCP_MSS) + // default is 256 +//#define TCP_SND_QUEUELEN (4 * (TCP_SND_BUF/TCP_MSS)) +//#define TCP_SNDLOWAT (TCP_SND_BUF/2) +//#define TCP_LISTEN_BACKLOG 0 +//#define TCP_DEFAULT_LISTEN_BACKLOG 0xff + +//***************************************************************************** +// +// ---------- API options ---------- +// +//***************************************************************************** +//#define LWIP_EVENT_API 0 +//#define LWIP_CALLBACK_API 1 + +//***************************************************************************** +// +// ---------- Pbuf options ---------- +// +//***************************************************************************** +#define PBUF_LINK_HLEN 16 // default is 14 +#define PBUF_POOL_BUFSIZE 256 + // default is LWIP_MEM_ALIGN_SIZE(TCP_MSS+40+PBUF_LINK_HLEN) +#define ETH_PAD_SIZE 0 // default is 0 + +//***************************************************************************** +// +// ---------- Network Interfaces options ---------- +// +//***************************************************************************** +//#define LWIP_NETIF_HOSTNAME 0 +//#define LWIP_NETIF_API 0 +//#define LWIP_NETIF_STATUS_CALLBACK 0 +//#define LWIP_NETIF_LINK_CALLBACK 0 +//#define LWIP_NETIF_HWADDRHINT 0 + +//***************************************************************************** +// +// ---------- LOOPIF options ---------- +// +//***************************************************************************** +//#define LWIP_HAVE_LOOPIF 0 +//#define LWIP_LOOPIF_MULTITHREADING 1 + +//***************************************************************************** +// +// ---------- Thread options ---------- +// +//***************************************************************************** +//#define TCPIP_THREAD_NAME "tcpip_thread" +//#define TCPIP_THREAD_STACKSIZE 0 +//#define TCPIP_THREAD_PRIO 1 +//#define TCPIP_MBOX_SIZE 0 +//#define SLIPIF_THREAD_NAME "slipif_loop" +//#define SLIPIF_THREAD_STACKSIZE 0 +//#define SLIPIF_THREAD_PRIO 1 +//#define PPP_THREAD_NAME "pppMain" +//#define PPP_THREAD_STACKSIZE 0 +//#define PPP_THREAD_PRIO 1 +//#define DEFAULT_THREAD_NAME "lwIP" +//#define DEFAULT_THREAD_STACKSIZE 0 +//#define DEFAULT_THREAD_PRIO 1 +//#define DEFAULT_RAW_RECVMBOX_SIZE 0 +//#define DEFAULT_UDP_RECVMBOX_SIZE 0 +//#define DEFAULT_TCP_RECVMBOX_SIZE 0 +//#define DEFAULT_ACCEPTMBOX_SIZE 0 + +//***************************************************************************** +// +// ---------- Sequential layer options ---------- +// +//***************************************************************************** +//#define LWIP_TCPIP_CORE_LOCKING 0 +#define LWIP_NETCONN 0 // default is 1 + +//***************************************************************************** +// +// ---------- Socket Options ---------- +// +//***************************************************************************** +#define LWIP_SOCKET 0 // default is 1 +//#define LWIP_COMPAT_SOCKETS 1 +//#define LWIP_POSIX_SOCKETS_IO_NAMES 1 +//#define LWIP_TCP_KEEPALIVE 0 +//#define LWIP_SO_RCVTIMEO 0 +//#define LWIP_SO_RCVBUF 0 +//#define SO_REUSE 0 + +//***************************************************************************** +// +// ---------- Statistics options ---------- +// +//***************************************************************************** +//#define LWIP_STATS 1 +//#define LWIP_STATS_DISPLAY 0 +//#define LINK_STATS 1 +//#define ETHARP_STATS (LWIP_ARP) +//#define IP_STATS 1 +//#define IPFRAG_STATS (IP_REASSEMBLY || IP_FRAG) +//#define ICMP_STATS 1 +//#define IGMP_STATS (LWIP_IGMP) +//#define UDP_STATS (LWIP_UDP) +//#define TCP_STATS (LWIP_TCP) +//#define MEM_STATS 1 +//#define MEMP_STATS 1 +//#define SYS_STATS 1 + +//***************************************************************************** +// +// ---------- PPP options ---------- +// +//***************************************************************************** +//#define PPP_SUPPORT 0 +//#define PPPOE_SUPPORT 0 +//#define PPPOS_SUPPORT PPP_SUPPORT + +#if PPP_SUPPORT +//#define NUM_PPP 1 +//#define PAP_SUPPORT 0 +//#define CHAP_SUPPORT 0 +//#define MSCHAP_SUPPORT 0 +//#define CBCP_SUPPORT 0 +//#define CCP_SUPPORT 0 +//#define VJ_SUPPORT 0 +//#define MD5_SUPPORT 0 +//#define FSM_DEFTIMEOUT 6 +//#define FSM_DEFMAXTERMREQS 2 +//#define FSM_DEFMAXCONFREQS 10 +//#define FSM_DEFMAXNAKLOOPS 5 +//#define UPAP_DEFTIMEOUT 6 +//#define UPAP_DEFREQTIME 30 +//#define CHAP_DEFTIMEOUT 6 +//#define CHAP_DEFTRANSMITS 10 +//#define LCP_ECHOINTERVAL 0 +//#define LCP_MAXECHOFAILS 3 +//#define PPP_MAXIDLEFLAG 100 + +//#define PPP_MAXMTU 1500 +//#define PPP_DEFMRU 296 +#endif + +//***************************************************************************** +// +// ---------- checksum options ---------- +// +//***************************************************************************** +//#define CHECKSUM_GEN_IP 1 +//#define CHECKSUM_GEN_UDP 1 +//#define CHECKSUM_GEN_TCP 1 +//#define CHECKSUM_CHECK_IP 1 +//#define CHECKSUM_CHECK_UDP 1 +//#define CHECKSUM_CHECK_TCP 1 + +//***************************************************************************** +// +// ---------- Debugging options ---------- +// +//***************************************************************************** +#if 0 +#define U8_F "c" +#define S8_F "c" +#define X8_F "x" +#define U16_F "u" +#define S16_F "d" +#define X16_F "x" +#define U32_F "u" +#define S32_F "d" +#define X32_F "x" +extern void UARTprintf(const char *pcString, ...); +#define LWIP_DEBUG +#endif + +//#define LWIP_DBG_MIN_LEVEL LWIP_DBG_LEVEL_OFF +#define LWIP_DBG_MIN_LEVEL LWIP_DBG_LEVEL_OFF +//#define LWIP_DBG_MIN_LEVEL LWIP_DBG_LEVEL_WARNING +//#define LWIP_DBG_MIN_LEVEL LWIP_DBG_LEVEL_SERIOUS +//#define LWIP_DBG_MIN_LEVEL LWIP_DBG_LEVEL_SEVERE + +//#define LWIP_DBG_TYPES_ON LWIP_DBG_ON +#define LWIP_DBG_TYPES_ON (LWIP_DBG_ON|LWIP_DBG_TRACE|LWIP_DBG_STATE|LWIP_DBG_FRESH) + +//#define ETHARP_DEBUG LWIP_DBG_ON // default is OFF +//#define NETIF_DEBUG LWIP_DBG_ON // default is OFF +//#define PBUF_DEBUG LWIP_DBG_OFF +//#define API_LIB_DEBUG LWIP_DBG_OFF +//#define API_MSG_DEBUG LWIP_DBG_OFF +//#define SOCKETS_DEBUG LWIP_DBG_OFF +//#define ICMP_DEBUG LWIP_DBG_OFF +//#define IGMP_DEBUG LWIP_DBG_OFF +//#define INET_DEBUG LWIP_DBG_OFF +//#define IP_DEBUG LWIP_DBG_ON // default is OFF +//#define IP_REASS_DEBUG LWIP_DBG_OFF +//#define RAW_DEBUG LWIP_DBG_OFF +//#define MEM_DEBUG LWIP_DBG_OFF +//#define MEMP_DEBUG LWIP_DBG_OFF +//#define SYS_DEBUG LWIP_DBG_OFF +//#define TCP_DEBUG LWIP_DBG_OFF +#define TCP_INPUT_DEBUG LWIP_DBG_ON +//#define TCP_FR_DEBUG LWIP_DBG_OFF +//#define TCP_RTO_DEBUG LWIP_DBG_OFF +//#define TCP_CWND_DEBUG LWIP_DBG_OFF +//#define TCP_WND_DEBUG LWIP_DBG_OFF +//#define TCP_OUTPUT_DEBUG LWIP_DBG_OFF +//#define TCP_RST_DEBUG LWIP_DBG_OFF +//#define TCP_QLEN_DEBUG LWIP_DBG_OFF +//#define UDP_DEBUG LWIP_DBG_ON // default is OFF +//#define TCPIP_DEBUG LWIP_DBG_OFF +//#define PPP_DEBUG LWIP_DBG_OFF +//#define SLIP_DEBUG LWIP_DBG_OFF +//#define DHCP_DEBUG LWIP_DBG_ON // default is OFF +//#define AUTOIP_DEBUG LWIP_DBG_OFF +//#define SNMP_MSG_DEBUG LWIP_DBG_OFF +//#define SNMP_MIB_DEBUG LWIP_DBG_OFF +//#define DNS_DEBUG LWIP_DBG_OFF + +#endif /* __LWIPOPTS_H__ */ diff --git a/boards/dk-tm4c129x/boot_demo_flash/readme.txt b/boards/dk-tm4c129x/boot_demo_flash/readme.txt new file mode 100644 index 0000000..c5a2ec6 --- /dev/null +++ b/boards/dk-tm4c129x/boot_demo_flash/readme.txt @@ -0,0 +1,43 @@ +Flash-based Boot Loader Demo + +An example to demonstrate the use of a flash-based boot loader. At +startup, the application will configure the UART, USB and Ethernet +peripherals, and then branch to the boot loader to await the start of an +update. + +This application is intended for use with flash-based ethernet boot +loader (boot_emac_flash). Although it isn't neccessary to configure USB +and UART interface in this example since only ethernet flash-based boot +loader is provided, the code is there for completeness so that USB or +UART flash-based boot loader can be implemented if needed. +The link address for this application is set to 0x4000, the link address +has to be multiple of the flash erase block size(16KB=0x4000). +You may change this address to a 16KB boundary higher than the last +address occupied by the boot loader binary as long as you also rebuild the +boot loader itself after modifying its bl_config.h file to set +APP_START_ADDRESS to the same value. + +The boot_demo_emac_flash application can be used along with this +application to easily demonstrate that the boot loader is actually updating +the on-chip flash. + + +------------------------------------------------------------------------------- + +Copyright (c) 2013-2014 Texas Instruments Incorporated. All rights reserved. +Software License Agreement + +Texas Instruments (TI) is supplying this software for use solely and +exclusively on TI's microcontroller products. The software is owned by +TI and/or its suppliers, and is protected under applicable copyright +laws. You may not combine this software with "viral" open-source +software in order to form a larger program. + +THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +DAMAGES, FOR ANY REASON WHATSOEVER. + +This is part of revision 2.1.0.12573 of the DK-TM4C129X Firmware Package. diff --git a/boards/dk-tm4c129x/boot_demo_flash/rvmdk/boot_demo_flash.axf b/boards/dk-tm4c129x/boot_demo_flash/rvmdk/boot_demo_flash.axf new file mode 100644 index 0000000..87cb9b9 Binary files /dev/null and b/boards/dk-tm4c129x/boot_demo_flash/rvmdk/boot_demo_flash.axf differ diff --git a/boards/dk-tm4c129x/boot_demo_flash/rvmdk/boot_demo_flash.bin b/boards/dk-tm4c129x/boot_demo_flash/rvmdk/boot_demo_flash.bin new file mode 100644 index 0000000..9045263 Binary files /dev/null and b/boards/dk-tm4c129x/boot_demo_flash/rvmdk/boot_demo_flash.bin differ diff --git a/boards/dk-tm4c129x/boot_demo_flash/startup_ccs.c b/boards/dk-tm4c129x/boot_demo_flash/startup_ccs.c new file mode 100644 index 0000000..b63c29e --- /dev/null +++ b/boards/dk-tm4c129x/boot_demo_flash/startup_ccs.c @@ -0,0 +1,277 @@ +//***************************************************************************** +// +// startup_ccs.c - Startup code for use with TI's Code Composer Studio. +// +// Copyright (c) 2013-2014 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 2.1.0.12573 of the DK-TM4C129X Firmware Package. +// +//***************************************************************************** + +#include +#include "inc/hw_nvic.h" +#include "inc/hw_types.h" + +//***************************************************************************** +// +// Forward declaration of the default fault handlers. +// +//***************************************************************************** +void ResetISR(void); +static void NmiSR(void); +static void FaultISR(void); +static void IntDefaultHandler(void); + +//***************************************************************************** +// +// External declaration for the reset handler that is to be called when the +// processor is started +// +//***************************************************************************** +extern void _c_int00(void); + +//***************************************************************************** +// +// Linker variable that marks the top of the stack. +// +//***************************************************************************** +extern uint32_t __STACK_TOP; + +//***************************************************************************** +// +// External declarations for the interrupt handlers used by the application. +// +//***************************************************************************** +extern void TouchScreenIntHandler(void); +extern void lwIPEthernetIntHandler(void); +extern void SysTickHandler(void); + +//***************************************************************************** +// +// The vector table. Note that the proper constructs must be placed on this to +// ensure that it ends up at physical address 0x0000.0000 or at the start of +// the program if located at a start address other than 0. +// +//***************************************************************************** +#pragma DATA_SECTION(g_pfnVectors, ".intvecs") +void (* const g_pfnVectors[])(void) = +{ + (void (*)(void))((uint32_t)&__STACK_TOP), + // The initial stack pointer + ResetISR, // The reset handler + NmiSR, // The NMI handler + FaultISR, // The hard fault handler + IntDefaultHandler, // The MPU fault handler + IntDefaultHandler, // The bus fault handler + IntDefaultHandler, // The usage fault handler + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // SVCall handler + IntDefaultHandler, // Debug monitor handler + 0, // Reserved + IntDefaultHandler, // The PendSV handler + SysTickHandler, // The SysTick handler + IntDefaultHandler, // GPIO Port A + IntDefaultHandler, // GPIO Port B + IntDefaultHandler, // GPIO Port C + IntDefaultHandler, // GPIO Port D + IntDefaultHandler, // GPIO Port E + IntDefaultHandler, // UART0 Rx and Tx + IntDefaultHandler, // UART1 Rx and Tx + IntDefaultHandler, // SSI0 Rx and Tx + IntDefaultHandler, // I2C0 Master and Slave + IntDefaultHandler, // PWM Fault + IntDefaultHandler, // PWM Generator 0 + IntDefaultHandler, // PWM Generator 1 + IntDefaultHandler, // PWM Generator 2 + IntDefaultHandler, // Quadrature Encoder 0 + IntDefaultHandler, // ADC Sequence 0 + IntDefaultHandler, // ADC Sequence 1 + IntDefaultHandler, // ADC Sequence 2 + TouchScreenIntHandler, // ADC Sequence 3 + IntDefaultHandler, // Watchdog timer + IntDefaultHandler, // Timer 0 subtimer A + IntDefaultHandler, // Timer 0 subtimer B + IntDefaultHandler, // Timer 1 subtimer A + IntDefaultHandler, // Timer 1 subtimer B + IntDefaultHandler, // Timer 2 subtimer A + IntDefaultHandler, // Timer 2 subtimer B + IntDefaultHandler, // Analog Comparator 0 + IntDefaultHandler, // Analog Comparator 1 + IntDefaultHandler, // Analog Comparator 2 + IntDefaultHandler, // System Control (PLL, OSC, BO) + IntDefaultHandler, // FLASH Control + IntDefaultHandler, // GPIO Port F + IntDefaultHandler, // GPIO Port G + IntDefaultHandler, // GPIO Port H + IntDefaultHandler, // UART2 Rx and Tx + IntDefaultHandler, // SSI1 Rx and Tx + IntDefaultHandler, // Timer 3 subtimer A + IntDefaultHandler, // Timer 3 subtimer B + IntDefaultHandler, // I2C1 Master and Slave + IntDefaultHandler, // CAN0 + IntDefaultHandler, // CAN1 + lwIPEthernetIntHandler, // Ethernet + IntDefaultHandler, // Hibernate + IntDefaultHandler, // USB0 + IntDefaultHandler, // PWM Generator 3 + IntDefaultHandler, // uDMA Software Transfer + IntDefaultHandler, // uDMA Error + IntDefaultHandler, // ADC1 Sequence 0 + IntDefaultHandler, // ADC1 Sequence 1 + IntDefaultHandler, // ADC1 Sequence 2 + IntDefaultHandler, // ADC1 Sequence 3 + IntDefaultHandler, // External Bus Interface 0 + IntDefaultHandler, // GPIO Port J + IntDefaultHandler, // GPIO Port K + IntDefaultHandler, // GPIO Port L + IntDefaultHandler, // SSI2 Rx and Tx + IntDefaultHandler, // SSI3 Rx and Tx + IntDefaultHandler, // UART3 Rx and Tx + IntDefaultHandler, // UART4 Rx and Tx + IntDefaultHandler, // UART5 Rx and Tx + IntDefaultHandler, // UART6 Rx and Tx + IntDefaultHandler, // UART7 Rx and Tx + IntDefaultHandler, // I2C2 Master and Slave + IntDefaultHandler, // I2C3 Master and Slave + IntDefaultHandler, // Timer 4 subtimer A + IntDefaultHandler, // Timer 4 subtimer B + IntDefaultHandler, // Timer 5 subtimer A + IntDefaultHandler, // Timer 5 subtimer B + IntDefaultHandler, // FPU + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // I2C4 Master and Slave + IntDefaultHandler, // I2C5 Master and Slave + IntDefaultHandler, // GPIO Port M + IntDefaultHandler, // GPIO Port N + 0, // Reserved + IntDefaultHandler, // Tamper + IntDefaultHandler, // GPIO Port P (Summary or P0) + IntDefaultHandler, // GPIO Port P1 + IntDefaultHandler, // GPIO Port P2 + IntDefaultHandler, // GPIO Port P3 + IntDefaultHandler, // GPIO Port P4 + IntDefaultHandler, // GPIO Port P5 + IntDefaultHandler, // GPIO Port P6 + IntDefaultHandler, // GPIO Port P7 + IntDefaultHandler, // GPIO Port Q (Summary or Q0) + IntDefaultHandler, // GPIO Port Q1 + IntDefaultHandler, // GPIO Port Q2 + IntDefaultHandler, // GPIO Port Q3 + IntDefaultHandler, // GPIO Port Q4 + IntDefaultHandler, // GPIO Port Q5 + IntDefaultHandler, // GPIO Port Q6 + IntDefaultHandler, // GPIO Port Q7 + IntDefaultHandler, // GPIO Port R + IntDefaultHandler, // GPIO Port S + IntDefaultHandler, // SHA/MD5 0 + IntDefaultHandler, // AES 0 + IntDefaultHandler, // DES3DES 0 + IntDefaultHandler, // LCD Controller 0 + IntDefaultHandler, // Timer 6 subtimer A + IntDefaultHandler, // Timer 6 subtimer B + IntDefaultHandler, // Timer 7 subtimer A + IntDefaultHandler, // Timer 7 subtimer B + IntDefaultHandler, // I2C6 Master and Slave + IntDefaultHandler, // I2C7 Master and Slave + IntDefaultHandler, // HIM Scan Matrix Keyboard 0 + IntDefaultHandler, // One Wire 0 + IntDefaultHandler, // HIM PS/2 0 + IntDefaultHandler, // HIM LED Sequencer 0 + IntDefaultHandler, // HIM Consumer IR 0 + IntDefaultHandler, // I2C8 Master and Slave + IntDefaultHandler, // I2C9 Master and Slave + IntDefaultHandler // GPIO Port T +}; + +//***************************************************************************** +// +// This is the code that gets called when the processor first starts execution +// following a reset event. Only the absolutely necessary set is performed, +// after which the application supplied entry() routine is called. Any fancy +// actions (such as making decisions based on the reset cause register, and +// resetting the bits in that register) are left solely in the hands of the +// application. +// +//***************************************************************************** +void +ResetISR(void) +{ + // + // Jump to the CCS C initialization routine. This will enable the + // floating-point unit as well, so that does not need to be done here. + // + __asm(" .global _c_int00\n" + " b.w _c_int00"); +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a NMI. This +// simply enters an infinite loop, preserving the system state for examination +// by a debugger. +// +//***************************************************************************** +static void +NmiSR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a fault +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +FaultISR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives an unexpected +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +IntDefaultHandler(void) +{ + // + // Go into an infinite loop. + // + while(1) + { + } +} diff --git a/boards/dk-tm4c129x/boot_demo_flash/startup_ewarm.c b/boards/dk-tm4c129x/boot_demo_flash/startup_ewarm.c new file mode 100644 index 0000000..d10fcec --- /dev/null +++ b/boards/dk-tm4c129x/boot_demo_flash/startup_ewarm.c @@ -0,0 +1,308 @@ +//***************************************************************************** +// +// startup_ewarm.c - Startup code for use with IAR's Embedded Workbench, +// version 5. +// +// Copyright (c) 2013-2014 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 2.1.0.12573 of the DK-TM4C129X Firmware Package. +// +//***************************************************************************** + +#include +#include "inc/hw_nvic.h" +#include "inc/hw_types.h" + +//***************************************************************************** +// +// Enable the IAR extensions for this source file. +// +//***************************************************************************** +#pragma language=extended + +//***************************************************************************** +// +// Forward declaration of the default fault handlers. +// +//***************************************************************************** +void ResetISR(void); +static void NmiSR(void); +static void FaultISR(void); +static void IntDefaultHandler(void); + +//***************************************************************************** +// +// External declarations for the interrupt handlers used by the application. +// +//***************************************************************************** +extern void TouchScreenIntHandler(void); +extern void lwIPEthernetIntHandler(void); +extern void SysTickHandler(void); + +//***************************************************************************** +// +// The entry point for the application startup code. +// +//***************************************************************************** +extern void __iar_program_start(void); + +//***************************************************************************** +// +// Reserve space for the system stack. +// +//***************************************************************************** +static uint32_t pui32Stack[256] @ ".noinit"; + +//***************************************************************************** +// +// A union that describes the entries of the vector table. The union is needed +// since the first entry is the stack pointer and the remainder are function +// pointers. +// +//***************************************************************************** +typedef union +{ + void (*pfnHandler)(void); + uint32_t ui32Ptr; +} +uVectorEntry; + +//***************************************************************************** +// +// The vector table. Note that the proper constructs must be placed on this to +// ensure that it ends up at physical address 0x0000.0000. +// +//***************************************************************************** +__root const uVectorEntry __vector_table[] @ ".intvec" = +{ + { .ui32Ptr = (uint32_t)pui32Stack + sizeof(pui32Stack) }, + // The initial stack pointer + ResetISR, // The reset handler + NmiSR, // The NMI handler + FaultISR, // The hard fault handler + IntDefaultHandler, // The MPU fault handler + IntDefaultHandler, // The bus fault handler + IntDefaultHandler, // The usage fault handler + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // SVCall handler + IntDefaultHandler, // Debug monitor handler + 0, // Reserved + IntDefaultHandler, // The PendSV handler + SysTickHandler, // The SysTick handler + IntDefaultHandler, // GPIO Port A + IntDefaultHandler, // GPIO Port B + IntDefaultHandler, // GPIO Port C + IntDefaultHandler, // GPIO Port D + IntDefaultHandler, // GPIO Port E + IntDefaultHandler, // UART0 Rx and Tx + IntDefaultHandler, // UART1 Rx and Tx + IntDefaultHandler, // SSI0 Rx and Tx + IntDefaultHandler, // I2C0 Master and Slave + IntDefaultHandler, // PWM Fault + IntDefaultHandler, // PWM Generator 0 + IntDefaultHandler, // PWM Generator 1 + IntDefaultHandler, // PWM Generator 2 + IntDefaultHandler, // Quadrature Encoder 0 + IntDefaultHandler, // ADC Sequence 0 + IntDefaultHandler, // ADC Sequence 1 + IntDefaultHandler, // ADC Sequence 2 + TouchScreenIntHandler, // ADC Sequence 3 + IntDefaultHandler, // Watchdog timer + IntDefaultHandler, // Timer 0 subtimer A + IntDefaultHandler, // Timer 0 subtimer B + IntDefaultHandler, // Timer 1 subtimer A + IntDefaultHandler, // Timer 1 subtimer B + IntDefaultHandler, // Timer 2 subtimer A + IntDefaultHandler, // Timer 2 subtimer B + IntDefaultHandler, // Analog Comparator 0 + IntDefaultHandler, // Analog Comparator 1 + IntDefaultHandler, // Analog Comparator 2 + IntDefaultHandler, // System Control (PLL, OSC, BO) + IntDefaultHandler, // FLASH Control + IntDefaultHandler, // GPIO Port F + IntDefaultHandler, // GPIO Port G + IntDefaultHandler, // GPIO Port H + IntDefaultHandler, // UART2 Rx and Tx + IntDefaultHandler, // SSI1 Rx and Tx + IntDefaultHandler, // Timer 3 subtimer A + IntDefaultHandler, // Timer 3 subtimer B + IntDefaultHandler, // I2C1 Master and Slave + IntDefaultHandler, // CAN0 + IntDefaultHandler, // CAN1 + lwIPEthernetIntHandler, // Ethernet + IntDefaultHandler, // Hibernate + IntDefaultHandler, // USB0 + IntDefaultHandler, // PWM Generator 3 + IntDefaultHandler, // uDMA Software Transfer + IntDefaultHandler, // uDMA Error + IntDefaultHandler, // ADC1 Sequence 0 + IntDefaultHandler, // ADC1 Sequence 1 + IntDefaultHandler, // ADC1 Sequence 2 + IntDefaultHandler, // ADC1 Sequence 3 + IntDefaultHandler, // External Bus Interface 0 + IntDefaultHandler, // GPIO Port J + IntDefaultHandler, // GPIO Port K + IntDefaultHandler, // GPIO Port L + IntDefaultHandler, // SSI2 Rx and Tx + IntDefaultHandler, // SSI3 Rx and Tx + IntDefaultHandler, // UART3 Rx and Tx + IntDefaultHandler, // UART4 Rx and Tx + IntDefaultHandler, // UART5 Rx and Tx + IntDefaultHandler, // UART6 Rx and Tx + IntDefaultHandler, // UART7 Rx and Tx + IntDefaultHandler, // I2C2 Master and Slave + IntDefaultHandler, // I2C3 Master and Slave + IntDefaultHandler, // Timer 4 subtimer A + IntDefaultHandler, // Timer 4 subtimer B + IntDefaultHandler, // Timer 5 subtimer A + IntDefaultHandler, // Timer 5 subtimer B + IntDefaultHandler, // FPU + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // I2C4 Master and Slave + IntDefaultHandler, // I2C5 Master and Slave + IntDefaultHandler, // GPIO Port M + IntDefaultHandler, // GPIO Port N + 0, // Reserved + IntDefaultHandler, // Tamper + IntDefaultHandler, // GPIO Port P (Summary or P0) + IntDefaultHandler, // GPIO Port P1 + IntDefaultHandler, // GPIO Port P2 + IntDefaultHandler, // GPIO Port P3 + IntDefaultHandler, // GPIO Port P4 + IntDefaultHandler, // GPIO Port P5 + IntDefaultHandler, // GPIO Port P6 + IntDefaultHandler, // GPIO Port P7 + IntDefaultHandler, // GPIO Port Q (Summary or Q0) + IntDefaultHandler, // GPIO Port Q1 + IntDefaultHandler, // GPIO Port Q2 + IntDefaultHandler, // GPIO Port Q3 + IntDefaultHandler, // GPIO Port Q4 + IntDefaultHandler, // GPIO Port Q5 + IntDefaultHandler, // GPIO Port Q6 + IntDefaultHandler, // GPIO Port Q7 + IntDefaultHandler, // GPIO Port R + IntDefaultHandler, // GPIO Port S + IntDefaultHandler, // SHA/MD5 0 + IntDefaultHandler, // AES 0 + IntDefaultHandler, // DES3DES 0 + IntDefaultHandler, // LCD Controller 0 + IntDefaultHandler, // Timer 6 subtimer A + IntDefaultHandler, // Timer 6 subtimer B + IntDefaultHandler, // Timer 7 subtimer A + IntDefaultHandler, // Timer 7 subtimer B + IntDefaultHandler, // I2C6 Master and Slave + IntDefaultHandler, // I2C7 Master and Slave + IntDefaultHandler, // HIM Scan Matrix Keyboard 0 + IntDefaultHandler, // One Wire 0 + IntDefaultHandler, // HIM PS/2 0 + IntDefaultHandler, // HIM LED Sequencer 0 + IntDefaultHandler, // HIM Consumer IR 0 + IntDefaultHandler, // I2C8 Master and Slave + IntDefaultHandler, // I2C9 Master and Slave + IntDefaultHandler // GPIO Port T +}; + +//***************************************************************************** +// +// This is the code that gets called when the processor first starts execution +// following a reset event. Only the absolutely necessary set is performed, +// after which the application supplied entry() routine is called. Any fancy +// actions (such as making decisions based on the reset cause register, and +// resetting the bits in that register) are left solely in the hands of the +// application. +// +//***************************************************************************** +void +ResetISR(void) +{ + // + // Enable the floating-point unit. This must be done here to handle the + // case where main() uses floating-point and the function prologue saves + // floating-point registers (which will fault if floating-point is not + // enabled). Any configuration of the floating-point unit using DriverLib + // APIs must be done here prior to the floating-point unit being enabled. + // + // Note that this does not use DriverLib since it might not be included in + // this project. + // + HWREG(NVIC_CPAC) = ((HWREG(NVIC_CPAC) & + ~(NVIC_CPAC_CP10_M | NVIC_CPAC_CP11_M)) | + NVIC_CPAC_CP10_FULL | NVIC_CPAC_CP11_FULL); + + // + // Call the application's entry point. + // + __iar_program_start(); +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a NMI. This +// simply enters an infinite loop, preserving the system state for examination +// by a debugger. +// +//***************************************************************************** +static void +NmiSR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a fault +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +FaultISR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives an unexpected +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +IntDefaultHandler(void) +{ + // + // Go into an infinite loop. + // + while(1) + { + } +} diff --git a/boards/dk-tm4c129x/boot_demo_flash/startup_gcc.c b/boards/dk-tm4c129x/boot_demo_flash/startup_gcc.c new file mode 100644 index 0000000..c590e71 --- /dev/null +++ b/boards/dk-tm4c129x/boot_demo_flash/startup_gcc.c @@ -0,0 +1,324 @@ +//***************************************************************************** +// +// startup_gcc.c - Startup code for use with GNU tools. +// +// Copyright (c) 2013-2014 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 2.1.0.12573 of the DK-TM4C129X Firmware Package. +// +//***************************************************************************** + +#include +#include "inc/hw_nvic.h" +#include "inc/hw_types.h" + +//***************************************************************************** +// +// Forward declaration of the default fault handlers. +// +//***************************************************************************** +void ResetISR(void); +static void NmiSR(void); +static void FaultISR(void); +static void IntDefaultHandler(void); + +//***************************************************************************** +// +// External declarations for the interrupt handlers used by the application. +// +//***************************************************************************** +extern void TouchScreenIntHandler(void); +extern void lwIPEthernetIntHandler(void); +extern void SysTickHandler(void); + +//***************************************************************************** +// +// The entry point for the application. +// +//***************************************************************************** +extern int main(void); + +//***************************************************************************** +// +// Reserve space for the system stack. +// +//***************************************************************************** +static uint32_t pui32Stack[256]; + +//***************************************************************************** +// +// The vector table. Note that the proper constructs must be placed on this to +// ensure that it ends up at physical address 0x0000.0000. +// +//***************************************************************************** +__attribute__ ((section(".isr_vector"))) +void (* const g_pfnVectors[])(void) = +{ + (void (*)(void))((uint32_t)pui32Stack + sizeof(pui32Stack)), + // The initial stack pointer + ResetISR, // The reset handler + NmiSR, // The NMI handler + FaultISR, // The hard fault handler + IntDefaultHandler, // The MPU fault handler + IntDefaultHandler, // The bus fault handler + IntDefaultHandler, // The usage fault handler + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // SVCall handler + IntDefaultHandler, // Debug monitor handler + 0, // Reserved + IntDefaultHandler, // The PendSV handler + SysTickHandler, // The SysTick handler + IntDefaultHandler, // GPIO Port A + IntDefaultHandler, // GPIO Port B + IntDefaultHandler, // GPIO Port C + IntDefaultHandler, // GPIO Port D + IntDefaultHandler, // GPIO Port E + IntDefaultHandler, // UART0 Rx and Tx + IntDefaultHandler, // UART1 Rx and Tx + IntDefaultHandler, // SSI0 Rx and Tx + IntDefaultHandler, // I2C0 Master and Slave + IntDefaultHandler, // PWM Fault + IntDefaultHandler, // PWM Generator 0 + IntDefaultHandler, // PWM Generator 1 + IntDefaultHandler, // PWM Generator 2 + IntDefaultHandler, // Quadrature Encoder 0 + IntDefaultHandler, // ADC Sequence 0 + IntDefaultHandler, // ADC Sequence 1 + IntDefaultHandler, // ADC Sequence 2 + TouchScreenIntHandler, // ADC Sequence 3 + IntDefaultHandler, // Watchdog timer + IntDefaultHandler, // Timer 0 subtimer A + IntDefaultHandler, // Timer 0 subtimer B + IntDefaultHandler, // Timer 1 subtimer A + IntDefaultHandler, // Timer 1 subtimer B + IntDefaultHandler, // Timer 2 subtimer A + IntDefaultHandler, // Timer 2 subtimer B + IntDefaultHandler, // Analog Comparator 0 + IntDefaultHandler, // Analog Comparator 1 + IntDefaultHandler, // Analog Comparator 2 + IntDefaultHandler, // System Control (PLL, OSC, BO) + IntDefaultHandler, // FLASH Control + IntDefaultHandler, // GPIO Port F + IntDefaultHandler, // GPIO Port G + IntDefaultHandler, // GPIO Port H + IntDefaultHandler, // UART2 Rx and Tx + IntDefaultHandler, // SSI1 Rx and Tx + IntDefaultHandler, // Timer 3 subtimer A + IntDefaultHandler, // Timer 3 subtimer B + IntDefaultHandler, // I2C1 Master and Slave + IntDefaultHandler, // CAN0 + IntDefaultHandler, // CAN1 + lwIPEthernetIntHandler, // Ethernet + IntDefaultHandler, // Hibernate + IntDefaultHandler, // USB0 + IntDefaultHandler, // PWM Generator 3 + IntDefaultHandler, // uDMA Software Transfer + IntDefaultHandler, // uDMA Error + IntDefaultHandler, // ADC1 Sequence 0 + IntDefaultHandler, // ADC1 Sequence 1 + IntDefaultHandler, // ADC1 Sequence 2 + IntDefaultHandler, // ADC1 Sequence 3 + IntDefaultHandler, // External Bus Interface 0 + IntDefaultHandler, // GPIO Port J + IntDefaultHandler, // GPIO Port K + IntDefaultHandler, // GPIO Port L + IntDefaultHandler, // SSI2 Rx and Tx + IntDefaultHandler, // SSI3 Rx and Tx + IntDefaultHandler, // UART3 Rx and Tx + IntDefaultHandler, // UART4 Rx and Tx + IntDefaultHandler, // UART5 Rx and Tx + IntDefaultHandler, // UART6 Rx and Tx + IntDefaultHandler, // UART7 Rx and Tx + IntDefaultHandler, // I2C2 Master and Slave + IntDefaultHandler, // I2C3 Master and Slave + IntDefaultHandler, // Timer 4 subtimer A + IntDefaultHandler, // Timer 4 subtimer B + IntDefaultHandler, // Timer 5 subtimer A + IntDefaultHandler, // Timer 5 subtimer B + IntDefaultHandler, // FPU + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // I2C4 Master and Slave + IntDefaultHandler, // I2C5 Master and Slave + IntDefaultHandler, // GPIO Port M + IntDefaultHandler, // GPIO Port N + 0, // Reserved + IntDefaultHandler, // Tamper + IntDefaultHandler, // GPIO Port P (Summary or P0) + IntDefaultHandler, // GPIO Port P1 + IntDefaultHandler, // GPIO Port P2 + IntDefaultHandler, // GPIO Port P3 + IntDefaultHandler, // GPIO Port P4 + IntDefaultHandler, // GPIO Port P5 + IntDefaultHandler, // GPIO Port P6 + IntDefaultHandler, // GPIO Port P7 + IntDefaultHandler, // GPIO Port Q (Summary or Q0) + IntDefaultHandler, // GPIO Port Q1 + IntDefaultHandler, // GPIO Port Q2 + IntDefaultHandler, // GPIO Port Q3 + IntDefaultHandler, // GPIO Port Q4 + IntDefaultHandler, // GPIO Port Q5 + IntDefaultHandler, // GPIO Port Q6 + IntDefaultHandler, // GPIO Port Q7 + IntDefaultHandler, // GPIO Port R + IntDefaultHandler, // GPIO Port S + IntDefaultHandler, // SHA/MD5 0 + IntDefaultHandler, // AES 0 + IntDefaultHandler, // DES3DES 0 + IntDefaultHandler, // LCD Controller 0 + IntDefaultHandler, // Timer 6 subtimer A + IntDefaultHandler, // Timer 6 subtimer B + IntDefaultHandler, // Timer 7 subtimer A + IntDefaultHandler, // Timer 7 subtimer B + IntDefaultHandler, // I2C6 Master and Slave + IntDefaultHandler, // I2C7 Master and Slave + IntDefaultHandler, // HIM Scan Matrix Keyboard 0 + IntDefaultHandler, // One Wire 0 + IntDefaultHandler, // HIM PS/2 0 + IntDefaultHandler, // HIM LED Sequencer 0 + IntDefaultHandler, // HIM Consumer IR 0 + IntDefaultHandler, // I2C8 Master and Slave + IntDefaultHandler, // I2C9 Master and Slave + IntDefaultHandler // GPIO Port T +}; + +//***************************************************************************** +// +// The following are constructs created by the linker, indicating where the +// the "data" and "bss" segments reside in memory. The initializers for the +// for the "data" segment resides immediately following the "text" segment. +// +//***************************************************************************** +extern uint32_t _etext; +extern uint32_t _data; +extern uint32_t _edata; +extern uint32_t _bss; +extern uint32_t _ebss; + +//***************************************************************************** +// +// This is the code that gets called when the processor first starts execution +// following a reset event. Only the absolutely necessary set is performed, +// after which the application supplied entry() routine is called. Any fancy +// actions (such as making decisions based on the reset cause register, and +// resetting the bits in that register) are left solely in the hands of the +// application. +// +//***************************************************************************** +void +ResetISR(void) +{ + uint32_t *pui32Src, *pui32Dest; + + // + // Copy the data segment initializers from flash to SRAM. + // + pui32Src = &_etext; + for(pui32Dest = &_data; pui32Dest < &_edata; ) + { + *pui32Dest++ = *pui32Src++; + } + + // + // Zero fill the bss segment. + // + __asm(" ldr r0, =_bss\n" + " ldr r1, =_ebss\n" + " mov r2, #0\n" + " .thumb_func\n" + "zero_loop:\n" + " cmp r0, r1\n" + " it lt\n" + " strlt r2, [r0], #4\n" + " blt zero_loop"); + + // + // Enable the floating-point unit. This must be done here to handle the + // case where main() uses floating-point and the function prologue saves + // floating-point registers (which will fault if floating-point is not + // enabled). Any configuration of the floating-point unit using DriverLib + // APIs must be done here prior to the floating-point unit being enabled. + // + // Note that this does not use DriverLib since it might not be included in + // this project. + // + HWREG(NVIC_CPAC) = ((HWREG(NVIC_CPAC) & + ~(NVIC_CPAC_CP10_M | NVIC_CPAC_CP11_M)) | + NVIC_CPAC_CP10_FULL | NVIC_CPAC_CP11_FULL); + + // + // Call the application's entry point. + // + main(); +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a NMI. This +// simply enters an infinite loop, preserving the system state for examination +// by a debugger. +// +//***************************************************************************** +static void +NmiSR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a fault +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +FaultISR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives an unexpected +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +IntDefaultHandler(void) +{ + // + // Go into an infinite loop. + // + while(1) + { + } +} diff --git a/boards/dk-tm4c129x/boot_demo_flash/startup_rvmdk.S b/boards/dk-tm4c129x/boot_demo_flash/startup_rvmdk.S new file mode 100644 index 0000000..bf79349 --- /dev/null +++ b/boards/dk-tm4c129x/boot_demo_flash/startup_rvmdk.S @@ -0,0 +1,333 @@ +; <<< Use Configuration Wizard in Context Menu >>> +;****************************************************************************** +; +; startup_rvmdk.S - Startup code for use with Keil's uVision. +; +; Copyright (c) 2013-2014 Texas Instruments Incorporated. All rights reserved. +; Software License Agreement +; +; Texas Instruments (TI) is supplying this software for use solely and +; exclusively on TI's microcontroller products. The software is owned by +; TI and/or its suppliers, and is protected under applicable copyright +; laws. You may not combine this software with "viral" open-source +; software in order to form a larger program. +; +; THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +; NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +; NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +; A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +; CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +; DAMAGES, FOR ANY REASON WHATSOEVER. +; +; This is part of revision 2.1.0.12573 of the DK-TM4C129X Firmware Package. +; +;****************************************************************************** + +;****************************************************************************** +; +; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +; +;****************************************************************************** +Stack EQU 0x00000400 + +;****************************************************************************** +; +; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> +; +;****************************************************************************** +Heap EQU 0x00000000 + +;****************************************************************************** +; +; Allocate space for the stack. +; +;****************************************************************************** + AREA STACK, NOINIT, READWRITE, ALIGN=3 +StackMem + SPACE Stack +__initial_sp + +;****************************************************************************** +; +; Allocate space for the heap. +; +;****************************************************************************** + AREA HEAP, NOINIT, READWRITE, ALIGN=3 +__heap_base +HeapMem + SPACE Heap +__heap_limit + +;****************************************************************************** +; +; Indicate that the code in this file preserves 8-byte alignment of the stack. +; +;****************************************************************************** + PRESERVE8 + +;****************************************************************************** +; +; Place code into the reset code section. +; +;****************************************************************************** + AREA RESET, CODE, READONLY + THUMB + +;****************************************************************************** +; +; External declarations for the interrupt handlers used by the application. +; +;****************************************************************************** + EXTERN TouchScreenIntHandler + EXTERN lwIPEthernetIntHandler + EXTERN SysTickHandler + +;****************************************************************************** +; +; The vector table. +; +;****************************************************************************** + EXPORT __Vectors +__Vectors + DCD StackMem + Stack ; Top of Stack + DCD Reset_Handler ; Reset Handler + DCD NmiSR ; NMI Handler + DCD FaultISR ; Hard Fault Handler + DCD IntDefaultHandler ; The MPU fault handler + DCD IntDefaultHandler ; The bus fault handler + DCD IntDefaultHandler ; The usage fault handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD IntDefaultHandler ; SVCall handler + DCD IntDefaultHandler ; Debug monitor handler + DCD 0 ; Reserved + DCD IntDefaultHandler ; The PendSV handler + DCD SysTickHandler ; The SysTick handler + DCD IntDefaultHandler ; GPIO Port A + DCD IntDefaultHandler ; GPIO Port B + DCD IntDefaultHandler ; GPIO Port C + DCD IntDefaultHandler ; GPIO Port D + DCD IntDefaultHandler ; GPIO Port E + DCD IntDefaultHandler ; UART0 Rx and Tx + DCD IntDefaultHandler ; UART1 Rx and Tx + DCD IntDefaultHandler ; SSI0 Rx and Tx + DCD IntDefaultHandler ; I2C0 Master and Slave + DCD IntDefaultHandler ; PWM Fault + DCD IntDefaultHandler ; PWM Generator 0 + DCD IntDefaultHandler ; PWM Generator 1 + DCD IntDefaultHandler ; PWM Generator 2 + DCD IntDefaultHandler ; Quadrature Encoder 0 + DCD IntDefaultHandler ; ADC Sequence 0 + DCD IntDefaultHandler ; ADC Sequence 1 + DCD IntDefaultHandler ; ADC Sequence 2 + DCD TouchScreenIntHandler ; ADC Sequence 3 + DCD IntDefaultHandler ; Watchdog timer + DCD IntDefaultHandler ; Timer 0 subtimer A + DCD IntDefaultHandler ; Timer 0 subtimer B + DCD IntDefaultHandler ; Timer 1 subtimer A + DCD IntDefaultHandler ; Timer 1 subtimer B + DCD IntDefaultHandler ; Timer 2 subtimer A + DCD IntDefaultHandler ; Timer 2 subtimer B + DCD IntDefaultHandler ; Analog Comparator 0 + DCD IntDefaultHandler ; Analog Comparator 1 + DCD IntDefaultHandler ; Analog Comparator 2 + DCD IntDefaultHandler ; System Control (PLL, OSC, BO) + DCD IntDefaultHandler ; FLASH Control + DCD IntDefaultHandler ; GPIO Port F + DCD IntDefaultHandler ; GPIO Port G + DCD IntDefaultHandler ; GPIO Port H + DCD IntDefaultHandler ; UART2 Rx and Tx + DCD IntDefaultHandler ; SSI1 Rx and Tx + DCD IntDefaultHandler ; Timer 3 subtimer A + DCD IntDefaultHandler ; Timer 3 subtimer B + DCD IntDefaultHandler ; I2C1 Master and Slave + DCD IntDefaultHandler ; CAN0 + DCD IntDefaultHandler ; CAN1 + DCD lwIPEthernetIntHandler ; Ethernet + DCD IntDefaultHandler ; Hibernate + DCD IntDefaultHandler ; USB0 + DCD IntDefaultHandler ; PWM Generator 3 + DCD IntDefaultHandler ; uDMA Software Transfer + DCD IntDefaultHandler ; uDMA Error + DCD IntDefaultHandler ; ADC1 Sequence 0 + DCD IntDefaultHandler ; ADC1 Sequence 1 + DCD IntDefaultHandler ; ADC1 Sequence 2 + DCD IntDefaultHandler ; ADC1 Sequence 3 + DCD IntDefaultHandler ; External Bus Interface 0 + DCD IntDefaultHandler ; GPIO Port J + DCD IntDefaultHandler ; GPIO Port K + DCD IntDefaultHandler ; GPIO Port L + DCD IntDefaultHandler ; SSI2 Rx and Tx + DCD IntDefaultHandler ; SSI3 Rx and Tx + DCD IntDefaultHandler ; UART3 Rx and Tx + DCD IntDefaultHandler ; UART4 Rx and Tx + DCD IntDefaultHandler ; UART5 Rx and Tx + DCD IntDefaultHandler ; UART6 Rx and Tx + DCD IntDefaultHandler ; UART7 Rx and Tx + DCD IntDefaultHandler ; I2C2 Master and Slave + DCD IntDefaultHandler ; I2C3 Master and Slave + DCD IntDefaultHandler ; Timer 4 subtimer A + DCD IntDefaultHandler ; Timer 4 subtimer B + DCD IntDefaultHandler ; Timer 5 subtimer A + DCD IntDefaultHandler ; Timer 5 subtimer B + DCD IntDefaultHandler ; FPU + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD IntDefaultHandler ; I2C4 Master and Slave + DCD IntDefaultHandler ; I2C5 Master and Slave + DCD IntDefaultHandler ; GPIO Port M + DCD IntDefaultHandler ; GPIO Port N + DCD 0 ; Reserved + DCD IntDefaultHandler ; Tamper + DCD IntDefaultHandler ; GPIO Port P (Summary or P0) + DCD IntDefaultHandler ; GPIO Port P1 + DCD IntDefaultHandler ; GPIO Port P2 + DCD IntDefaultHandler ; GPIO Port P3 + DCD IntDefaultHandler ; GPIO Port P4 + DCD IntDefaultHandler ; GPIO Port P5 + DCD IntDefaultHandler ; GPIO Port P6 + DCD IntDefaultHandler ; GPIO Port P7 + DCD IntDefaultHandler ; GPIO Port Q (Summary or Q0) + DCD IntDefaultHandler ; GPIO Port Q1 + DCD IntDefaultHandler ; GPIO Port Q2 + DCD IntDefaultHandler ; GPIO Port Q3 + DCD IntDefaultHandler ; GPIO Port Q4 + DCD IntDefaultHandler ; GPIO Port Q5 + DCD IntDefaultHandler ; GPIO Port Q6 + DCD IntDefaultHandler ; GPIO Port Q7 + DCD IntDefaultHandler ; GPIO Port R + DCD IntDefaultHandler ; GPIO Port S + DCD IntDefaultHandler ; SHA/MD5 0 + DCD IntDefaultHandler ; AES 0 + DCD IntDefaultHandler ; DES3DES 0 + DCD IntDefaultHandler ; LCD Controller 0 + DCD IntDefaultHandler ; Timer 6 subtimer A + DCD IntDefaultHandler ; Timer 6 subtimer B + DCD IntDefaultHandler ; Timer 7 subtimer A + DCD IntDefaultHandler ; Timer 7 subtimer B + DCD IntDefaultHandler ; I2C6 Master and Slave + DCD IntDefaultHandler ; I2C7 Master and Slave + DCD IntDefaultHandler ; HIM Scan Matrix Keyboard 0 + DCD IntDefaultHandler ; One Wire 0 + DCD IntDefaultHandler ; HIM PS/2 0 + DCD IntDefaultHandler ; HIM LED Sequencer 0 + DCD IntDefaultHandler ; HIM Consumer IR 0 + DCD IntDefaultHandler ; I2C8 Master and Slave + DCD IntDefaultHandler ; I2C9 Master and Slave + DCD IntDefaultHandler ; GPIO Port T + +;****************************************************************************** +; +; This is the code that gets called when the processor first starts execution +; following a reset event. +; +;****************************************************************************** + EXPORT Reset_Handler +Reset_Handler + ; + ; Enable the floating-point unit. This must be done here to handle the + ; case where main() uses floating-point and the function prologue saves + ; floating-point registers (which will fault if floating-point is not + ; enabled). Any configuration of the floating-point unit using + ; DriverLib APIs must be done here prior to the floating-point unit + ; being enabled. + ; + ; Note that this does not use DriverLib since it might not be included + ; in this project. + ; + MOVW R0, #0xED88 + MOVT R0, #0xE000 + LDR R1, [R0] + ORR R1, #0x00F00000 + STR R1, [R0] + + ; + ; Call the C library enty point that handles startup. This will copy + ; the .data section initializers from flash to SRAM and zero fill the + ; .bss section. + ; + IMPORT __main + B __main + +;****************************************************************************** +; +; This is the code that gets called when the processor receives a NMI. This +; simply enters an infinite loop, preserving the system state for examination +; by a debugger. +; +;****************************************************************************** +NmiSR + B NmiSR + +;****************************************************************************** +; +; This is the code that gets called when the processor receives a fault +; interrupt. This simply enters an infinite loop, preserving the system state +; for examination by a debugger. +; +;****************************************************************************** +FaultISR + B FaultISR + +;****************************************************************************** +; +; This is the code that gets called when the processor receives an unexpected +; interrupt. This simply enters an infinite loop, preserving the system state +; for examination by a debugger. +; +;****************************************************************************** +IntDefaultHandler + B IntDefaultHandler + +;****************************************************************************** +; +; Make sure the end of this section is aligned. +; +;****************************************************************************** + ALIGN + +;****************************************************************************** +; +; Some code in the normal code section for initializing the heap and stack. +; +;****************************************************************************** + AREA |.text|, CODE, READONLY + +;****************************************************************************** +; +; The function expected of the C library startup code for defining the stack +; and heap memory locations. For the C library version of the startup code, +; provide this function so that the C library initialization code can find out +; the location of the stack and heap. +; +;****************************************************************************** + IF :DEF: __MICROLIB + EXPORT __initial_sp + EXPORT __heap_base + EXPORT __heap_limit + ELSE + IMPORT __use_two_region_memory + EXPORT __user_initial_stackheap +__user_initial_stackheap + LDR R0, =HeapMem + LDR R1, =(StackMem + Stack) + LDR R2, =(HeapMem + Heap) + LDR R3, =StackMem + BX LR + ENDIF + +;****************************************************************************** +; +; Make sure the end of this section is aligned. +; +;****************************************************************************** + ALIGN + +;****************************************************************************** +; +; Tell the assembler that we're done. +; +;****************************************************************************** + END -- cgit v1.3.1