From e018ceebed74b8223482bc9d1ed0b31c938381da Mon Sep 17 00:00:00 2001 From: Yuval Adam Date: Mon, 29 Oct 2012 23:04:19 +0200 Subject: New example files --- boards/Makefile | 44 + boards/ek-lm4f120xl-boost-capsense/Makefile | 47 + .../ek-lm4f120xl-boost-capsense/capsense/Makefile | 99 ++ .../capsense/capsense.c | 604 ++++++++++ .../capsense/capsense.ewd | 614 ++++++++++ .../capsense/capsense.ewp | 806 +++++++++++++ .../capsense/capsense.icf | 78 ++ .../capsense/capsense.ld | 57 + .../capsense/capsense.sct | 47 + .../capsense/capsense.sgxx | Bin 0 -> 4976 bytes .../capsense/capsense.uvopt | 373 ++++++ .../capsense/capsense.uvproj | 454 ++++++++ .../capsense/capsense_ccs.cmd | 70 ++ .../capsense/capsense_sourcerygxx.ld | 31 + .../capsense/ccs/.ccsimportspec | 8 + .../capsense/ccs/.ccsproject | 12 + .../capsense/ccs/.cproject | 195 ++++ .../capsense/ccs/.project | 136 +++ .../ccs/.settings/org.eclipse.cdt.codan.core.prefs | 3 + .../capsense/ccs/Debug/capsense.bin | Bin 0 -> 6072 bytes .../capsense/ccs/Debug/capsense.out | Bin 0 -> 109085 bytes .../capsense/ccs/macros.ini_initial | 1 + .../capsense/ccs/target_config.ccxml | 13 + .../capsense/ewarm/Exe/capsense.bin | Bin 0 -> 4860 bytes .../capsense/ewarm/Exe/capsense.out | Bin 0 -> 104900 bytes .../capsense/gcc/capsense.axf | Bin 0 -> 69283 bytes .../capsense/gcc/capsense.bin | Bin 0 -> 4932 bytes .../capsense/readme.txt | 32 + .../capsense/rvmdk/capsense.axf | Bin 0 -> 49828 bytes .../capsense/rvmdk/capsense.bin | Bin 0 -> 5204 bytes .../capsense/sourcerygxx/capsense.axf | Bin 0 -> 1133463 bytes .../capsense/sourcerygxx/capsense.bin | Bin 0 -> 5136 bytes .../capsense/startup_ccs.c | 291 +++++ .../capsense/startup_ewarm.c | 325 ++++++ .../capsense/startup_gcc.c | 341 ++++++ .../capsense/startup_rvmdk.S | 351 ++++++ .../capsense/startup_sourcerygxx.S | 75 ++ .../ek-lm4f120xl-boost-capsense/drivers/CTS_HAL.c | 140 +++ .../ek-lm4f120xl-boost-capsense/drivers/CTS_HAL.h | 34 + .../drivers/CTS_Layer.c | 663 +++++++++++ .../drivers/CTS_Layer.h | 64 + .../drivers/CTS_structure.c | 131 +++ .../drivers/CTS_structure.h | 74 ++ .../ek-lm4f120xl-boost-capsense.eww | 30 + .../ek-lm4f120xl-boost-capsense.sgxw | 30 + .../ek-lm4f120xl-boost-capsense.uvmpw | 25 + boards/ek-lm4f120xl-boost-olimex-8x8/Makefile | 47 + .../ek-lm4f120xl-boost-olimex-8x8.eww | 30 + .../ek-lm4f120xl-boost-olimex-8x8.sgxw | 30 + .../ek-lm4f120xl-boost-olimex-8x8.uvmpw | 25 + .../ek-lm4f120xl-boost-olimex-8x8/faces/Makefile | 91 ++ .../faces/ccs/.ccsimportspec | 8 + .../faces/ccs/.ccsproject | 12 + .../faces/ccs/.cproject | 191 +++ .../faces/ccs/.project | 116 ++ .../ccs/.settings/org.eclipse.cdt.codan.core.prefs | 3 + .../faces/ccs/Debug/faces.bin | Bin 0 -> 4912 bytes .../faces/ccs/Debug/faces.out | Bin 0 -> 90100 bytes .../faces/ccs/macros.ini_initial | 1 + .../faces/ccs/target_config.ccxml | 13 + .../faces/ewarm/Exe/faces.bin | Bin 0 -> 3832 bytes .../faces/ewarm/Exe/faces.out | Bin 0 -> 71020 bytes boards/ek-lm4f120xl-boost-olimex-8x8/faces/faces.c | 328 ++++++ .../ek-lm4f120xl-boost-olimex-8x8/faces/faces.ewd | 614 ++++++++++ .../ek-lm4f120xl-boost-olimex-8x8/faces/faces.ewp | 790 +++++++++++++ .../ek-lm4f120xl-boost-olimex-8x8/faces/faces.icf | 78 ++ .../ek-lm4f120xl-boost-olimex-8x8/faces/faces.ld | 57 + .../ek-lm4f120xl-boost-olimex-8x8/faces/faces.sct | 47 + .../ek-lm4f120xl-boost-olimex-8x8/faces/faces.sgxx | Bin 0 -> 4918 bytes .../faces/faces.uvopt | 317 +++++ .../faces/faces.uvproj | 434 +++++++ .../faces/faces_ccs.cmd | 70 ++ .../faces/faces_sourcerygxx.ld | 39 + .../faces/gcc/faces.axf | Bin 0 -> 40263 bytes .../faces/gcc/faces.bin | Bin 0 -> 4104 bytes .../ek-lm4f120xl-boost-olimex-8x8/faces/readme.txt | 29 + .../faces/rvmdk/faces.axf | Bin 0 -> 44532 bytes .../faces/rvmdk/faces.bin | Bin 0 -> 4172 bytes .../faces/sourcerygxx/faces.axf | Bin 0 -> 771387 bytes .../faces/sourcerygxx/faces.bin | Bin 0 -> 4320 bytes .../faces/startup_ccs.c | 298 +++++ .../faces/startup_ewarm.c | 332 ++++++ .../faces/startup_gcc.c | 348 ++++++ .../faces/startup_rvmdk.S | 358 ++++++ .../faces/startup_sourcerygxx.S | 75 ++ boards/ek-lm4f120xl/Makefile | 60 + boards/ek-lm4f120xl/bitband/Makefile | 91 ++ boards/ek-lm4f120xl/bitband/bitband.c | 220 ++++ boards/ek-lm4f120xl/bitband/bitband.ewd | 614 ++++++++++ boards/ek-lm4f120xl/bitband/bitband.ewp | 789 +++++++++++++ boards/ek-lm4f120xl/bitband/bitband.icf | 78 ++ boards/ek-lm4f120xl/bitband/bitband.ld | 57 + boards/ek-lm4f120xl/bitband/bitband.sct | 47 + boards/ek-lm4f120xl/bitband/bitband.sgxx | Bin 0 -> 4842 bytes boards/ek-lm4f120xl/bitband/bitband.uvopt | 303 +++++ boards/ek-lm4f120xl/bitband/bitband.uvproj | 429 +++++++ boards/ek-lm4f120xl/bitband/bitband_ccs.cmd | 70 ++ boards/ek-lm4f120xl/bitband/bitband_sourcerygxx.ld | 31 + boards/ek-lm4f120xl/bitband/ccs/.ccsimportspec | 8 + boards/ek-lm4f120xl/bitband/ccs/.ccsproject | 12 + boards/ek-lm4f120xl/bitband/ccs/.cproject | 193 +++ boards/ek-lm4f120xl/bitband/ccs/.project | 111 ++ .../ccs/.settings/org.eclipse.cdt.codan.core.prefs | 3 + boards/ek-lm4f120xl/bitband/ccs/Debug/bitband.bin | Bin 0 -> 2952 bytes boards/ek-lm4f120xl/bitband/ccs/Debug/bitband.out | Bin 0 -> 55922 bytes boards/ek-lm4f120xl/bitband/ccs/macros.ini_initial | 1 + .../ek-lm4f120xl/bitband/ccs/target_config.ccxml | 13 + boards/ek-lm4f120xl/bitband/ewarm/Exe/bitband.bin | Bin 0 -> 2112 bytes boards/ek-lm4f120xl/bitband/ewarm/Exe/bitband.out | Bin 0 -> 38620 bytes boards/ek-lm4f120xl/bitband/gcc/bitband.axf | Bin 0 -> 36522 bytes boards/ek-lm4f120xl/bitband/gcc/bitband.bin | Bin 0 -> 1972 bytes boards/ek-lm4f120xl/bitband/readme.txt | 29 + boards/ek-lm4f120xl/bitband/rvmdk/bitband.axf | Bin 0 -> 18084 bytes boards/ek-lm4f120xl/bitband/rvmdk/bitband.bin | Bin 0 -> 1976 bytes .../ek-lm4f120xl/bitband/sourcerygxx/bitband.axf | Bin 0 -> 469934 bytes .../ek-lm4f120xl/bitband/sourcerygxx/bitband.bin | Bin 0 -> 2184 bytes boards/ek-lm4f120xl/bitband/startup_ccs.c | 291 +++++ boards/ek-lm4f120xl/bitband/startup_ewarm.c | 325 ++++++ boards/ek-lm4f120xl/bitband/startup_gcc.c | 341 ++++++ boards/ek-lm4f120xl/bitband/startup_rvmdk.S | 351 ++++++ boards/ek-lm4f120xl/bitband/startup_sourcerygxx.S | 75 ++ boards/ek-lm4f120xl/blinky/Makefile | 82 ++ boards/ek-lm4f120xl/blinky/blinky.c | 94 ++ boards/ek-lm4f120xl/blinky/blinky.ewd | 614 ++++++++++ boards/ek-lm4f120xl/blinky/blinky.ewp | 777 +++++++++++++ boards/ek-lm4f120xl/blinky/blinky.icf | 78 ++ boards/ek-lm4f120xl/blinky/blinky.ld | 57 + boards/ek-lm4f120xl/blinky/blinky.sct | 47 + boards/ek-lm4f120xl/blinky/blinky.sgxx | Bin 0 -> 4695 bytes boards/ek-lm4f120xl/blinky/blinky.uvopt | 268 +++++ boards/ek-lm4f120xl/blinky/blinky.uvproj | 414 +++++++ boards/ek-lm4f120xl/blinky/blinky_ccs.cmd | 70 ++ boards/ek-lm4f120xl/blinky/blinky_sourcerygxx.ld | 31 + boards/ek-lm4f120xl/blinky/ccs/.ccsimportspec | 8 + boards/ek-lm4f120xl/blinky/ccs/.ccsproject | 12 + boards/ek-lm4f120xl/blinky/ccs/.cproject | 187 +++ boards/ek-lm4f120xl/blinky/ccs/.project | 106 ++ .../ccs/.settings/org.eclipse.cdt.codan.core.prefs | 3 + boards/ek-lm4f120xl/blinky/ccs/Debug/blinky.bin | Bin 0 -> 1440 bytes boards/ek-lm4f120xl/blinky/ccs/Debug/blinky.out | Bin 0 -> 28482 bytes boards/ek-lm4f120xl/blinky/ccs/macros.ini_initial | 1 + boards/ek-lm4f120xl/blinky/ccs/target_config.ccxml | 13 + boards/ek-lm4f120xl/blinky/ewarm/Exe/blinky.bin | Bin 0 -> 844 bytes boards/ek-lm4f120xl/blinky/ewarm/Exe/blinky.out | Bin 0 -> 16340 bytes boards/ek-lm4f120xl/blinky/gcc/blinky.axf | Bin 0 -> 34682 bytes boards/ek-lm4f120xl/blinky/gcc/blinky.bin | Bin 0 -> 804 bytes boards/ek-lm4f120xl/blinky/readme.txt | 24 + boards/ek-lm4f120xl/blinky/rvmdk/blinky.axf | Bin 0 -> 6816 bytes boards/ek-lm4f120xl/blinky/rvmdk/blinky.bin | Bin 0 -> 844 bytes boards/ek-lm4f120xl/blinky/sourcerygxx/blinky.axf | Bin 0 -> 301552 bytes boards/ek-lm4f120xl/blinky/sourcerygxx/blinky.bin | Bin 0 -> 1016 bytes boards/ek-lm4f120xl/blinky/startup_ccs.c | 291 +++++ boards/ek-lm4f120xl/blinky/startup_ewarm.c | 325 ++++++ boards/ek-lm4f120xl/blinky/startup_gcc.c | 341 ++++++ boards/ek-lm4f120xl/blinky/startup_rvmdk.S | 351 ++++++ boards/ek-lm4f120xl/blinky/startup_sourcerygxx.S | 75 ++ boards/ek-lm4f120xl/drivers/buttons.c | 193 +++ boards/ek-lm4f120xl/drivers/buttons.h | 96 ++ boards/ek-lm4f120xl/drivers/rgb.c | 298 +++++ boards/ek-lm4f120xl/drivers/rgb.h | 143 +++ boards/ek-lm4f120xl/ek-lm4f120xl.eww | 121 ++ boards/ek-lm4f120xl/ek-lm4f120xl.sgxw | 43 + boards/ek-lm4f120xl/ek-lm4f120xl.uvmpw | 90 ++ boards/ek-lm4f120xl/freertos_demo/FreeRTOSConfig.h | 107 ++ boards/ek-lm4f120xl/freertos_demo/Makefile | 110 ++ .../ek-lm4f120xl/freertos_demo/ccs/.ccsimportspec | 14 + boards/ek-lm4f120xl/freertos_demo/ccs/.ccsproject | 12 + boards/ek-lm4f120xl/freertos_demo/ccs/.cproject | 203 ++++ boards/ek-lm4f120xl/freertos_demo/ccs/.project | 166 +++ .../ccs/.settings/org.eclipse.cdt.codan.core.prefs | 3 + .../freertos_demo/ccs/Debug/freertos_demo.bin | Bin 0 -> 8720 bytes .../freertos_demo/ccs/Debug/freertos_demo.out | Bin 0 -> 201257 bytes .../freertos_demo/ccs/macros.ini_initial | 1 + .../freertos_demo/ccs/target_config.ccxml | 13 + .../freertos_demo/ewarm/Exe/freertos_demo.bin | Bin 0 -> 7464 bytes .../freertos_demo/ewarm/Exe/freertos_demo.out | Bin 0 -> 185084 bytes boards/ek-lm4f120xl/freertos_demo/freertos_demo.c | 185 +++ .../ek-lm4f120xl/freertos_demo/freertos_demo.ewd | 614 ++++++++++ .../ek-lm4f120xl/freertos_demo/freertos_demo.ewp | 832 +++++++++++++ .../ek-lm4f120xl/freertos_demo/freertos_demo.icf | 78 ++ boards/ek-lm4f120xl/freertos_demo/freertos_demo.ld | 57 + .../ek-lm4f120xl/freertos_demo/freertos_demo.sct | 47 + .../ek-lm4f120xl/freertos_demo/freertos_demo.sgxx | Bin 0 -> 5154 bytes .../ek-lm4f120xl/freertos_demo/freertos_demo.uvopt | 443 +++++++ .../freertos_demo/freertos_demo.uvproj | 479 ++++++++ .../freertos_demo/freertos_demo_ccs.cmd | 70 ++ .../freertos_demo/freertos_demo_sourcerygxx.ld | 43 + .../freertos_demo/gcc/freertos_demo.axf | Bin 0 -> 93175 bytes .../freertos_demo/gcc/freertos_demo.bin | Bin 0 -> 8560 bytes boards/ek-lm4f120xl/freertos_demo/led_task.c | 235 ++++ boards/ek-lm4f120xl/freertos_demo/led_task.h | 35 + boards/ek-lm4f120xl/freertos_demo/priorities.h | 37 + boards/ek-lm4f120xl/freertos_demo/readme.txt | 51 + .../freertos_demo/rvmdk/freertos_demo.axf | Bin 0 -> 105068 bytes .../freertos_demo/rvmdk/freertos_demo.bin | Bin 0 -> 7696 bytes .../freertos_demo/sourcerygxx/freertos_demo.axf | Bin 0 -> 1246590 bytes .../freertos_demo/sourcerygxx/freertos_demo.bin | Bin 0 -> 8768 bytes boards/ek-lm4f120xl/freertos_demo/startup_ccs.c | 300 +++++ boards/ek-lm4f120xl/freertos_demo/startup_ewarm.c | 334 ++++++ boards/ek-lm4f120xl/freertos_demo/startup_gcc.c | 350 ++++++ boards/ek-lm4f120xl/freertos_demo/startup_rvmdk.S | 360 ++++++ .../freertos_demo/startup_sourcerygxx.S | 75 ++ boards/ek-lm4f120xl/freertos_demo/switch_task.c | 175 +++ boards/ek-lm4f120xl/freertos_demo/switch_task.h | 35 + boards/ek-lm4f120xl/gpio_jtag/Makefile | 93 ++ boards/ek-lm4f120xl/gpio_jtag/ccs/.ccsimportspec | 8 + boards/ek-lm4f120xl/gpio_jtag/ccs/.ccsproject | 12 + boards/ek-lm4f120xl/gpio_jtag/ccs/.cproject | 193 +++ boards/ek-lm4f120xl/gpio_jtag/ccs/.project | 116 ++ .../ccs/.settings/org.eclipse.cdt.codan.core.prefs | 3 + .../ek-lm4f120xl/gpio_jtag/ccs/Debug/gpio_jtag.bin | Bin 0 -> 3984 bytes .../ek-lm4f120xl/gpio_jtag/ccs/Debug/gpio_jtag.out | Bin 0 -> 71137 bytes .../ek-lm4f120xl/gpio_jtag/ccs/macros.ini_initial | 1 + .../ek-lm4f120xl/gpio_jtag/ccs/target_config.ccxml | 13 + .../ek-lm4f120xl/gpio_jtag/ewarm/Exe/gpio_jtag.bin | Bin 0 -> 3120 bytes .../ek-lm4f120xl/gpio_jtag/ewarm/Exe/gpio_jtag.out | Bin 0 -> 58696 bytes boards/ek-lm4f120xl/gpio_jtag/gcc/gpio_jtag.axf | Bin 0 -> 68178 bytes boards/ek-lm4f120xl/gpio_jtag/gcc/gpio_jtag.bin | Bin 0 -> 3057 bytes boards/ek-lm4f120xl/gpio_jtag/gpio_jtag.c | 279 +++++ boards/ek-lm4f120xl/gpio_jtag/gpio_jtag.ewd | 614 ++++++++++ boards/ek-lm4f120xl/gpio_jtag/gpio_jtag.ewp | 792 +++++++++++++ boards/ek-lm4f120xl/gpio_jtag/gpio_jtag.icf | 78 ++ boards/ek-lm4f120xl/gpio_jtag/gpio_jtag.ld | 57 + boards/ek-lm4f120xl/gpio_jtag/gpio_jtag.sct | 47 + boards/ek-lm4f120xl/gpio_jtag/gpio_jtag.sgxx | Bin 0 -> 4880 bytes boards/ek-lm4f120xl/gpio_jtag/gpio_jtag.uvopt | 317 +++++ boards/ek-lm4f120xl/gpio_jtag/gpio_jtag.uvproj | 434 +++++++ boards/ek-lm4f120xl/gpio_jtag/gpio_jtag_ccs.cmd | 70 ++ .../gpio_jtag/gpio_jtag_sourcerygxx.ld | 39 + boards/ek-lm4f120xl/gpio_jtag/readme.txt | 33 + boards/ek-lm4f120xl/gpio_jtag/rvmdk/gpio_jtag.axf | Bin 0 -> 30708 bytes boards/ek-lm4f120xl/gpio_jtag/rvmdk/gpio_jtag.bin | Bin 0 -> 3448 bytes .../gpio_jtag/sourcerygxx/gpio_jtag.axf | Bin 0 -> 753688 bytes .../gpio_jtag/sourcerygxx/gpio_jtag.bin | Bin 0 -> 3264 bytes boards/ek-lm4f120xl/gpio_jtag/startup_ccs.c | 298 +++++ boards/ek-lm4f120xl/gpio_jtag/startup_ewarm.c | 332 ++++++ boards/ek-lm4f120xl/gpio_jtag/startup_gcc.c | 348 ++++++ boards/ek-lm4f120xl/gpio_jtag/startup_rvmdk.S | 358 ++++++ .../ek-lm4f120xl/gpio_jtag/startup_sourcerygxx.S | 75 ++ boards/ek-lm4f120xl/hello/Makefile | 90 ++ boards/ek-lm4f120xl/hello/ccs/.ccsimportspec | 8 + boards/ek-lm4f120xl/hello/ccs/.ccsproject | 12 + boards/ek-lm4f120xl/hello/ccs/.cproject | 191 +++ boards/ek-lm4f120xl/hello/ccs/.project | 111 ++ .../ccs/.settings/org.eclipse.cdt.codan.core.prefs | 3 + boards/ek-lm4f120xl/hello/ccs/Debug/hello.bin | Bin 0 -> 3128 bytes boards/ek-lm4f120xl/hello/ccs/Debug/hello.out | Bin 0 -> 54407 bytes boards/ek-lm4f120xl/hello/ccs/macros.ini_initial | 1 + boards/ek-lm4f120xl/hello/ccs/target_config.ccxml | 13 + boards/ek-lm4f120xl/hello/ewarm/Exe/hello.bin | Bin 0 -> 2344 bytes boards/ek-lm4f120xl/hello/ewarm/Exe/hello.out | Bin 0 -> 42408 bytes boards/ek-lm4f120xl/hello/gcc/hello.axf | Bin 0 -> 36812 bytes boards/ek-lm4f120xl/hello/gcc/hello.bin | Bin 0 -> 2256 bytes boards/ek-lm4f120xl/hello/hello.c | 135 +++ boards/ek-lm4f120xl/hello/hello.ewd | 614 ++++++++++ boards/ek-lm4f120xl/hello/hello.ewp | 787 +++++++++++++ boards/ek-lm4f120xl/hello/hello.icf | 78 ++ boards/ek-lm4f120xl/hello/hello.ld | 57 + boards/ek-lm4f120xl/hello/hello.sct | 47 + boards/ek-lm4f120xl/hello/hello.sgxx | Bin 0 -> 4823 bytes boards/ek-lm4f120xl/hello/hello.uvopt | 303 +++++ boards/ek-lm4f120xl/hello/hello.uvproj | 429 +++++++ boards/ek-lm4f120xl/hello/hello_ccs.cmd | 70 ++ boards/ek-lm4f120xl/hello/hello_sourcerygxx.ld | 31 + boards/ek-lm4f120xl/hello/readme.txt | 27 + boards/ek-lm4f120xl/hello/rvmdk/hello.axf | Bin 0 -> 23956 bytes boards/ek-lm4f120xl/hello/rvmdk/hello.bin | Bin 0 -> 2656 bytes boards/ek-lm4f120xl/hello/sourcerygxx/hello.axf | Bin 0 -> 602092 bytes boards/ek-lm4f120xl/hello/sourcerygxx/hello.bin | Bin 0 -> 2464 bytes boards/ek-lm4f120xl/hello/startup_ccs.c | 291 +++++ boards/ek-lm4f120xl/hello/startup_ewarm.c | 325 ++++++ boards/ek-lm4f120xl/hello/startup_gcc.c | 341 ++++++ boards/ek-lm4f120xl/hello/startup_rvmdk.S | 351 ++++++ boards/ek-lm4f120xl/hello/startup_sourcerygxx.S | 75 ++ boards/ek-lm4f120xl/interrupts/Makefile | 90 ++ boards/ek-lm4f120xl/interrupts/ccs/.ccsimportspec | 8 + boards/ek-lm4f120xl/interrupts/ccs/.ccsproject | 12 + boards/ek-lm4f120xl/interrupts/ccs/.cproject | 191 +++ boards/ek-lm4f120xl/interrupts/ccs/.project | 111 ++ .../ccs/.settings/org.eclipse.cdt.codan.core.prefs | 3 + .../interrupts/ccs/Debug/interrupts.bin | Bin 0 -> 3704 bytes .../interrupts/ccs/Debug/interrupts.out | Bin 0 -> 61000 bytes .../ek-lm4f120xl/interrupts/ccs/macros.ini_initial | 1 + .../interrupts/ccs/target_config.ccxml | 13 + .../interrupts/ewarm/Exe/interrupts.bin | Bin 0 -> 2736 bytes .../interrupts/ewarm/Exe/interrupts.out | Bin 0 -> 48308 bytes boards/ek-lm4f120xl/interrupts/gcc/interrupts.axf | Bin 0 -> 37671 bytes boards/ek-lm4f120xl/interrupts/gcc/interrupts.bin | Bin 0 -> 2756 bytes boards/ek-lm4f120xl/interrupts/interrupts.c | 514 ++++++++ boards/ek-lm4f120xl/interrupts/interrupts.ewd | 614 ++++++++++ boards/ek-lm4f120xl/interrupts/interrupts.ewp | 787 +++++++++++++ boards/ek-lm4f120xl/interrupts/interrupts.icf | 78 ++ boards/ek-lm4f120xl/interrupts/interrupts.ld | 57 + boards/ek-lm4f120xl/interrupts/interrupts.sct | 47 + boards/ek-lm4f120xl/interrupts/interrupts.sgxx | Bin 0 -> 4851 bytes boards/ek-lm4f120xl/interrupts/interrupts.uvopt | 303 +++++ boards/ek-lm4f120xl/interrupts/interrupts.uvproj | 429 +++++++ boards/ek-lm4f120xl/interrupts/interrupts_ccs.cmd | 70 ++ .../interrupts/interrupts_sourcerygxx.ld | 43 + boards/ek-lm4f120xl/interrupts/readme.txt | 33 + .../ek-lm4f120xl/interrupts/rvmdk/interrupts.axf | Bin 0 -> 21332 bytes .../ek-lm4f120xl/interrupts/rvmdk/interrupts.bin | Bin 0 -> 2692 bytes .../interrupts/sourcerygxx/interrupts.axf | Bin 0 -> 504607 bytes .../interrupts/sourcerygxx/interrupts.bin | Bin 0 -> 2968 bytes boards/ek-lm4f120xl/interrupts/startup_ccs.c | 300 +++++ boards/ek-lm4f120xl/interrupts/startup_ewarm.c | 334 ++++++ boards/ek-lm4f120xl/interrupts/startup_gcc.c | 350 ++++++ boards/ek-lm4f120xl/interrupts/startup_rvmdk.S | 360 ++++++ .../ek-lm4f120xl/interrupts/startup_sourcerygxx.S | 75 ++ boards/ek-lm4f120xl/mpu_fault/Makefile | 91 ++ boards/ek-lm4f120xl/mpu_fault/ccs/.ccsimportspec | 8 + boards/ek-lm4f120xl/mpu_fault/ccs/.ccsproject | 12 + boards/ek-lm4f120xl/mpu_fault/ccs/.cproject | 191 +++ boards/ek-lm4f120xl/mpu_fault/ccs/.project | 111 ++ .../ccs/.settings/org.eclipse.cdt.codan.core.prefs | 3 + .../ek-lm4f120xl/mpu_fault/ccs/Debug/mpu_fault.bin | Bin 0 -> 3304 bytes .../ek-lm4f120xl/mpu_fault/ccs/Debug/mpu_fault.out | Bin 0 -> 56469 bytes .../ek-lm4f120xl/mpu_fault/ccs/macros.ini_initial | 1 + .../ek-lm4f120xl/mpu_fault/ccs/target_config.ccxml | 13 + .../ek-lm4f120xl/mpu_fault/ewarm/Exe/mpu_fault.bin | Bin 0 -> 2408 bytes .../ek-lm4f120xl/mpu_fault/ewarm/Exe/mpu_fault.out | Bin 0 -> 41212 bytes boards/ek-lm4f120xl/mpu_fault/gcc/mpu_fault.axf | Bin 0 -> 37025 bytes boards/ek-lm4f120xl/mpu_fault/gcc/mpu_fault.bin | Bin 0 -> 2324 bytes boards/ek-lm4f120xl/mpu_fault/mpu_fault.c | 383 ++++++ boards/ek-lm4f120xl/mpu_fault/mpu_fault.ewd | 614 ++++++++++ boards/ek-lm4f120xl/mpu_fault/mpu_fault.ewp | 789 +++++++++++++ boards/ek-lm4f120xl/mpu_fault/mpu_fault.icf | 78 ++ boards/ek-lm4f120xl/mpu_fault/mpu_fault.ld | 57 + boards/ek-lm4f120xl/mpu_fault/mpu_fault.sct | 47 + boards/ek-lm4f120xl/mpu_fault/mpu_fault.sgxx | Bin 0 -> 4858 bytes boards/ek-lm4f120xl/mpu_fault/mpu_fault.uvopt | 303 +++++ boards/ek-lm4f120xl/mpu_fault/mpu_fault.uvproj | 429 +++++++ boards/ek-lm4f120xl/mpu_fault/mpu_fault_ccs.cmd | 70 ++ .../mpu_fault/mpu_fault_sourcerygxx.ld | 39 + boards/ek-lm4f120xl/mpu_fault/readme.txt | 28 + boards/ek-lm4f120xl/mpu_fault/rvmdk/mpu_fault.axf | Bin 0 -> 18216 bytes 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boards/ek-lm4f120xl/uart_echo/startup_ccs.c | 298 +++++ boards/ek-lm4f120xl/uart_echo/startup_ewarm.c | 332 ++++++ boards/ek-lm4f120xl/uart_echo/startup_gcc.c | 348 ++++++ boards/ek-lm4f120xl/uart_echo/startup_rvmdk.S | 358 ++++++ .../ek-lm4f120xl/uart_echo/startup_sourcerygxx.S | 75 ++ boards/ek-lm4f120xl/uart_echo/uart_echo.c | 206 ++++ boards/ek-lm4f120xl/uart_echo/uart_echo.ewd | 614 ++++++++++ boards/ek-lm4f120xl/uart_echo/uart_echo.ewp | 784 +++++++++++++ boards/ek-lm4f120xl/uart_echo/uart_echo.icf | 78 ++ boards/ek-lm4f120xl/uart_echo/uart_echo.ld | 57 + boards/ek-lm4f120xl/uart_echo/uart_echo.sct | 47 + boards/ek-lm4f120xl/uart_echo/uart_echo.sgxx | Bin 0 -> 4805 bytes boards/ek-lm4f120xl/uart_echo/uart_echo.uvopt | 289 +++++ boards/ek-lm4f120xl/uart_echo/uart_echo.uvproj | 424 +++++++ boards/ek-lm4f120xl/uart_echo/uart_echo_ccs.cmd | 70 ++ .../uart_echo/uart_echo_sourcerygxx.ld | 39 + boards/ek-lm4f120xl/udma_demo/Makefile | 92 ++ boards/ek-lm4f120xl/udma_demo/ccs/.ccsimportspec | 8 + boards/ek-lm4f120xl/udma_demo/ccs/.ccsproject | 12 + boards/ek-lm4f120xl/udma_demo/ccs/.cproject | 191 +++ boards/ek-lm4f120xl/udma_demo/ccs/.project | 121 ++ .../ccs/.settings/org.eclipse.cdt.codan.core.prefs | 3 + .../ek-lm4f120xl/udma_demo/ccs/Debug/udma_demo.bin | Bin 0 -> 5368 bytes .../ek-lm4f120xl/udma_demo/ccs/Debug/udma_demo.out | Bin 0 -> 82313 bytes .../ek-lm4f120xl/udma_demo/ccs/macros.ini_initial | 1 + .../ek-lm4f120xl/udma_demo/ccs/target_config.ccxml | 13 + .../ek-lm4f120xl/udma_demo/ewarm/Exe/udma_demo.bin | Bin 0 -> 4364 bytes .../ek-lm4f120xl/udma_demo/ewarm/Exe/udma_demo.out | Bin 0 -> 65220 bytes boards/ek-lm4f120xl/udma_demo/gcc/udma_demo.axf | Bin 0 -> 40684 bytes boards/ek-lm4f120xl/udma_demo/gcc/udma_demo.bin | Bin 0 -> 4384 bytes boards/ek-lm4f120xl/udma_demo/readme.txt | 28 + boards/ek-lm4f120xl/udma_demo/rvmdk/udma_demo.axf | Bin 0 -> 36020 bytes boards/ek-lm4f120xl/udma_demo/rvmdk/udma_demo.bin | Bin 0 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Bin 0 -> 10996 bytes .../usb_dev_serial/ewarm/Exe/usb_dev_serial.out | Bin 0 -> 247792 bytes .../usb_dev_serial/gcc/usb_dev_serial.axf | Bin 0 -> 77215 bytes .../usb_dev_serial/gcc/usb_dev_serial.bin | Bin 0 -> 11254 bytes boards/ek-lm4f120xl/usb_dev_serial/readme.txt | 31 + .../usb_dev_serial/rvmdk/usb_dev_serial.axf | Bin 0 -> 185564 bytes .../usb_dev_serial/rvmdk/usb_dev_serial.bin | Bin 0 -> 12812 bytes .../usb_dev_serial/sourcerygxx/usb_dev_serial.axf | Bin 0 -> 1863430 bytes .../usb_dev_serial/sourcerygxx/usb_dev_serial.bin | Bin 0 -> 11464 bytes boards/ek-lm4f120xl/usb_dev_serial/startup_ccs.c | 300 +++++ boards/ek-lm4f120xl/usb_dev_serial/startup_ewarm.c | 334 ++++++ boards/ek-lm4f120xl/usb_dev_serial/startup_gcc.c | 350 ++++++ boards/ek-lm4f120xl/usb_dev_serial/startup_rvmdk.S | 360 ++++++ .../usb_dev_serial/startup_sourcerygxx.S | 75 ++ .../ek-lm4f120xl/usb_dev_serial/usb_dev_serial.c | 1223 ++++++++++++++++++++ .../ek-lm4f120xl/usb_dev_serial/usb_dev_serial.ewd | 614 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All rights reserved. +# Software License Agreement +# +# Texas Instruments (TI) is supplying this software for use solely and +# exclusively on TI's microcontroller products. The software is owned by +# TI and/or its suppliers, and is protected under applicable copyright +# laws. You may not combine this software with "viral" open-source +# software in order to form a larger program. +# +# THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +# NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +# NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +# A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +# CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +# DAMAGES, FOR ANY REASON WHATSOEVER. +# +# This is part of revision 9453 of the Stellaris Firmware Development Package. +# +#****************************************************************************** + +DIRS=${wildcard *} + +all: + @for i in ${DIRS}; \ + do \ + if [ -f $${i}/Makefile ]; \ + then \ + make -C $${i} || exit $$?; \ + fi; \ + done + +clean: + @for i in ${DIRS}; \ + do \ + if [ -f $${i}/Makefile ]; \ + then \ + make -C $${i} clean; \ + fi; \ + done + @rm -f ${wildcard *~} __dummy__ diff --git a/boards/ek-lm4f120xl-boost-capsense/Makefile b/boards/ek-lm4f120xl-boost-capsense/Makefile new file mode 100644 index 0000000..44d515e --- /dev/null +++ b/boards/ek-lm4f120xl-boost-capsense/Makefile @@ -0,0 +1,47 @@ +#****************************************************************************** +# +# Makefile - Rules for building the ek-lm4f120xl-boost-capsense examples. +# +# Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +# Software License Agreement +# +# Texas Instruments (TI) is supplying this software for use solely and +# exclusively on TI's microcontroller products. The software is owned by +# TI and/or its suppliers, and is protected under applicable copyright +# laws. You may not combine this software with "viral" open-source +# software in order to form a larger program. +# +# THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +# NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +# NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +# A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +# CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +# DAMAGES, FOR ANY REASON WHATSOEVER. +# +# This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +# +#****************************************************************************** + +# +# A list of the directories containing the examples. +# +DIRS=capsense + +# +# The default rule, which causes the examples to be built. +# +all: + @for i in ${DIRS}; \ + do \ + make -C $${i} || exit $$?; \ + done + +# +# The rule to clean out all the build products. +# +clean: + @rm -rf ${wildcard *~} __dummy__ + @-for i in ${DIRS}; \ + do \ + make -C $${i} clean; \ + done diff --git a/boards/ek-lm4f120xl-boost-capsense/capsense/Makefile b/boards/ek-lm4f120xl-boost-capsense/capsense/Makefile new file mode 100644 index 0000000..7592be6 --- /dev/null +++ b/boards/ek-lm4f120xl-boost-capsense/capsense/Makefile @@ -0,0 +1,99 @@ +#****************************************************************************** +# +# Makefile - Rules for building the CapSense Demo. +# +# Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +# Software License Agreement +# +# Texas Instruments (TI) is supplying this software for use solely and +# exclusively on TI's microcontroller products. The software is owned by +# TI and/or its suppliers, and is protected under applicable copyright +# laws. You may not combine this software with "viral" open-source +# software in order to form a larger program. +# +# THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +# NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +# NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +# A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +# CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +# DAMAGES, FOR ANY REASON WHATSOEVER. +# +# This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +# +#****************************************************************************** + +# +# Defines the part type that this project uses. +# +PART=LM4F120H5QR + +# +# Set the processor variant. +# +VARIANT=cm4f + +# +# The base directory for StellarisWare. +# +ROOT=../../.. + +# +# Include the common make definitions. +# +include ${ROOT}/makedefs + +# +# Where to find source files that do not live in this directory. +# +VPATH=../../ek-lm4f120xl/drivers +VPATH+=../drivers +VPATH+=../../../utils + +# +# Where to find header files that do not live in the source directory. +# +IPATH=.. +IPATH+=../../.. +IPATH+=../../ek-lm4f120xl + +# +# The default rule, which causes the CapSense Demo to be built. +# +all: ${COMPILER} +all: ${COMPILER}/capsense.axf + +# +# The rule to clean out all the build products. +# +clean: + @rm -rf ${COMPILER} ${wildcard *~} + +# +# The rule to create the target directory. +# +${COMPILER}: + @mkdir -p ${COMPILER} + +# +# Rules for building the CapSense Demo. +# +${COMPILER}/capsense.axf: ${COMPILER}/CTS_HAL.o +${COMPILER}/capsense.axf: ${COMPILER}/CTS_Layer.o +${COMPILER}/capsense.axf: ${COMPILER}/CTS_structure.o +${COMPILER}/capsense.axf: ${COMPILER}/buttons.o +${COMPILER}/capsense.axf: ${COMPILER}/capsense.o +${COMPILER}/capsense.axf: ${COMPILER}/rgb.o +${COMPILER}/capsense.axf: ${COMPILER}/startup_${COMPILER}.o +${COMPILER}/capsense.axf: ${COMPILER}/uartstdio.o +${COMPILER}/capsense.axf: ${ROOT}/driverlib/${COMPILER}-cm4f/libdriver-cm4f.a +${COMPILER}/capsense.axf: capsense.ld +SCATTERgcc_capsense=capsense.ld +ENTRY_capsense=ResetISR +CFLAGSgcc=-DTARGET_IS_BLIZZARD_RA1 + +# +# Include the automatically generated dependency files. +# +ifneq (${MAKECMDGOALS},clean) +-include ${wildcard ${COMPILER}/*.d} __dummy__ +endif diff --git a/boards/ek-lm4f120xl-boost-capsense/capsense/capsense.c b/boards/ek-lm4f120xl-boost-capsense/capsense/capsense.c new file mode 100644 index 0000000..bf2afdc --- /dev/null +++ b/boards/ek-lm4f120xl-boost-capsense/capsense/capsense.c @@ -0,0 +1,604 @@ +//***************************************************************************** +// +// capsense.c - Capacitive touch example. +// +// Copyright (c) 2011-2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +#include +#include "inc/hw_types.h" +#include "inc/hw_gpio.h" +#include "inc/hw_memmap.h" +#include "inc/hw_nvic.h" +#include "driverlib/fpu.h" +#include "driverlib/sysctl.h" +#include "driverlib/rom.h" +#include "driverlib/pin_map.h" +#include "driverlib/gpio.h" +#include "driverlib/systick.h" +#include "driverlib/interrupt.h" +#include "driverlib/uart.h" +#include "utils/uartstdio.h" +#include "drivers/buttons.h" + +#include "drivers/CTS_structure.h" +#include "drivers/CTS_Layer.h" + +//***************************************************************************** +// +//! \addtogroup example_list +//!

Capacitive Touch Example (capsense)

+//! +//! An example that works with the 430BOOST-SENSE1 capactive sense +//! BoosterPack, originally designed for the MSP430 LaunchPad. +//! +//! The Stellaris LM4F120H5QR does not have the capacitive sense hardware +//! assisted peripheral features of some MSP430 chips. Therefore it is +//! required that the user install surface mount resistors on the pads +//! provided on the bottom of the capacitive sense BoosterPack. Resistor values +//! of 30 ohms are recommended. Calibration may be required for +//! resistor values other than 30 ohms. +//! +// +//***************************************************************************** + + +//***************************************************************************** +// +// Macro definitions +// +//***************************************************************************** +#define TESTMODE +#define NUM_OSCILLATIONS 100 + +#define WAKE_UP_UART_CODE 0xBE +#define WAKE_UP_UART_CODE2 0xEF +#define SLEEP_MODE_UART_CODE 0xDE +#define SLEEP_MODE_UART_CODE2 0xAD +#define MIDDLE_BUTTON_CODE 0x80 +#define INVALID_CONVERTED_POSITION 0xFD +#define GESTURE_START 0xFC +#define GESTURE_STOP 0xFB +#define COUNTER_CLOCKWISE 1 +#define CLOCKWISE 2 +#define GESTURE_POSITION_OFFSET 0x20 +#define WHEEL_POSITION_OFFSET 0x30 + +#define WHEEL_TOUCH_DELAY 12 +#define MAX_IDLE_TIME 200 +#define PROXIMITY_THRESHOLD 60 + + +//***************************************************************************** +// +// Global variables +// +//***************************************************************************** +unsigned long g_ulUpBaseline = 0; +unsigned long g_ulDownBaseline = 0; +unsigned long g_ulLeftBaseline = 0; +unsigned long g_ulRightBaseline = 0; +unsigned long g_ulCenterBaseline = 0; +unsigned long g_ulWheelPosition = ILLEGAL_SLIDER_WHEEL_POSITION; +unsigned long ulPreviousWheelPosition = ILLEGAL_SLIDER_WHEEL_POSITION; + + +//***************************************************************************** +// +// The error routine that is called if the driver library encounters an error. +// +//***************************************************************************** +#ifdef DEBUG +void +__error__(char *pcFilename, unsigned long ulLine) +{ +} +#endif + +//***************************************************************************** +// +// Delay for count milliseconds +// +//***************************************************************************** +void +DelayMs(unsigned long ulCount) +{ + SysCtlDelay((SysCtlClockGet()/3000)*ulCount); +} + +//***************************************************************************** +// +// Abstraction for LED output. +// +//***************************************************************************** +void +LEDOutput(unsigned long ulWheelPosition) +{ + GPIOPinWrite(GPIO_PORTE_BASE, GPIO_PIN_4, 0); + GPIOPinTypeGPIOInput(GPIO_PORTE_BASE, GPIO_PIN_5); + GPIOPinTypeGPIOInput(GPIO_PORTB_BASE, GPIO_PIN_4); + GPIOPinTypeGPIOInput(GPIO_PORTB_BASE, GPIO_PIN_6); + GPIOPinTypeGPIOInput(GPIO_PORTB_BASE, GPIO_PIN_7); + + switch(ulWheelPosition) + { + case 0: + break; + case 1: + GPIOPinWrite(GPIO_PORTE_BASE, GPIO_PIN_4, GPIO_PIN_4); + GPIOPinTypeGPIOOutput(GPIO_PORTE_BASE, GPIO_PIN_5); + GPIOPinWrite(GPIO_PORTE_BASE, GPIO_PIN_5, 0); + break; + case 2: + GPIOPinWrite(GPIO_PORTE_BASE, GPIO_PIN_4, GPIO_PIN_4); + GPIOPinTypeGPIOOutput(GPIO_PORTE_BASE, GPIO_PIN_5); + GPIOPinWrite(GPIO_PORTE_BASE, GPIO_PIN_5, 0); + //P1-5OFF + GPIOPinTypeGPIOOutput(GPIO_PORTB_BASE, GPIO_PIN_4); + GPIOPinWrite(GPIO_PORTB_BASE, GPIO_PIN_4, 0); + break; + case 3: + GPIOPinWrite(GPIO_PORTE_BASE, GPIO_PIN_4, GPIO_PIN_4); + //P1-5OFF + GPIOPinTypeGPIOOutput(GPIO_PORTB_BASE, GPIO_PIN_4); + GPIOPinWrite(GPIO_PORTB_BASE, GPIO_PIN_4, 0); + break; + case 4: + GPIOPinWrite(GPIO_PORTE_BASE, GPIO_PIN_4, GPIO_PIN_4); + //P1-5OFF + GPIOPinTypeGPIOOutput(GPIO_PORTB_BASE, GPIO_PIN_4); + GPIOPinWrite(GPIO_PORTB_BASE, GPIO_PIN_4, 0); + //P1-6OFF + GPIOPinTypeGPIOOutput(GPIO_PORTB_BASE, GPIO_PIN_6); + GPIOPinWrite(GPIO_PORTB_BASE, GPIO_PIN_6, 0); + break; + case 5: + GPIOPinWrite(GPIO_PORTE_BASE, GPIO_PIN_4, GPIO_PIN_4); + //P1-6OFF + GPIOPinTypeGPIOOutput(GPIO_PORTB_BASE, GPIO_PIN_6); + GPIOPinWrite(GPIO_PORTB_BASE, GPIO_PIN_6, 0); + break; + case 6: + GPIOPinWrite(GPIO_PORTE_BASE, GPIO_PIN_4, GPIO_PIN_4); + //P1-6OFF + GPIOPinTypeGPIOOutput(GPIO_PORTB_BASE, GPIO_PIN_6); + GPIOPinWrite(GPIO_PORTB_BASE, GPIO_PIN_6, 0); + //P1-7OFF + GPIOPinTypeGPIOOutput(GPIO_PORTB_BASE, GPIO_PIN_7); + GPIOPinWrite(GPIO_PORTB_BASE, GPIO_PIN_7, 0); + break; + case 7: + GPIOPinWrite(GPIO_PORTE_BASE, GPIO_PIN_4, GPIO_PIN_4); + //P1-7OFF + GPIOPinTypeGPIOOutput(GPIO_PORTB_BASE, GPIO_PIN_7); + GPIOPinWrite(GPIO_PORTB_BASE, GPIO_PIN_7, 0); + break; + case 8: + break; + case 9: + GPIOPinWrite(GPIO_PORTE_BASE, GPIO_PIN_4, 0); + //P1-7ON + GPIOPinTypeGPIOOutput(GPIO_PORTB_BASE, GPIO_PIN_7); + GPIOPinWrite(GPIO_PORTB_BASE, GPIO_PIN_7, GPIO_PIN_7); + break; + case 10: + GPIOPinWrite(GPIO_PORTE_BASE, GPIO_PIN_4, 0); + //P1-7ON + GPIOPinTypeGPIOOutput(GPIO_PORTB_BASE, GPIO_PIN_7); + GPIOPinWrite(GPIO_PORTB_BASE, GPIO_PIN_7, GPIO_PIN_7); + //P1-6ON + GPIOPinTypeGPIOOutput(GPIO_PORTB_BASE, GPIO_PIN_6); + GPIOPinWrite(GPIO_PORTB_BASE, GPIO_PIN_6, GPIO_PIN_6); + break; + case 11: + GPIOPinWrite(GPIO_PORTE_BASE, GPIO_PIN_4, 0); + //P1-6ON + GPIOPinTypeGPIOOutput(GPIO_PORTB_BASE, GPIO_PIN_6); + GPIOPinWrite(GPIO_PORTB_BASE, GPIO_PIN_6, GPIO_PIN_6); + break; + case 12: + GPIOPinWrite(GPIO_PORTE_BASE, GPIO_PIN_4, 0); + //P1-6ON + GPIOPinTypeGPIOOutput(GPIO_PORTB_BASE, GPIO_PIN_6); + GPIOPinWrite(GPIO_PORTB_BASE, GPIO_PIN_6, GPIO_PIN_6); + //P1-5ON + GPIOPinTypeGPIOOutput(GPIO_PORTB_BASE, GPIO_PIN_4); + GPIOPinWrite(GPIO_PORTB_BASE, GPIO_PIN_4, GPIO_PIN_4); + break; + case 13: + GPIOPinWrite(GPIO_PORTE_BASE, GPIO_PIN_4, 0); + //P1-5ON + GPIOPinTypeGPIOOutput(GPIO_PORTB_BASE, GPIO_PIN_4); + GPIOPinWrite(GPIO_PORTB_BASE, GPIO_PIN_4, GPIO_PIN_4); + break; + case 14: + GPIOPinWrite(GPIO_PORTE_BASE, GPIO_PIN_4, 0); + //P1-5ON + GPIOPinTypeGPIOOutput(GPIO_PORTB_BASE, GPIO_PIN_4); + GPIOPinWrite(GPIO_PORTB_BASE, GPIO_PIN_4, GPIO_PIN_4); + //P1-4ON + GPIOPinTypeGPIOOutput(GPIO_PORTE_BASE, GPIO_PIN_5); + GPIOPinWrite(GPIO_PORTE_BASE, GPIO_PIN_5, GPIO_PIN_5); + break; + case 15: + GPIOPinWrite(GPIO_PORTE_BASE, GPIO_PIN_4, 0); + //P1-4ON + GPIOPinTypeGPIOOutput(GPIO_PORTE_BASE, GPIO_PIN_5); + GPIOPinWrite(GPIO_PORTE_BASE, GPIO_PIN_5, GPIO_PIN_5); + break; + default: + break; + } +} +//***************************************************************************** +// +// Get Gesture. +// +//***************************************************************************** +unsigned char GetGesture(unsigned char ulWheelPosition) +{ + unsigned char gesture = INVALID_CONVERTED_POSITION; + unsigned char ucDirection, ccw_check, cw_check; + + if(ulPreviousWheelPosition != ILLEGAL_SLIDER_WHEEL_POSITION) + { + if(ulPreviousWheelPosition > ulWheelPosition) + { + ccw_check = ulPreviousWheelPosition - ulWheelPosition; + if(ccw_check < 8) + { + gesture = ccw_check; + ucDirection = COUNTER_CLOCKWISE; + } + else + { + cw_check = 16 - ulPreviousWheelPosition + ulWheelPosition; + if(cw_check < 8) + { + gesture = cw_check; + ucDirection = CLOCKWISE; + } + } + } + else + { + cw_check = ulWheelPosition - ulPreviousWheelPosition; + if(cw_check < 8) + { + gesture = cw_check; + ucDirection = CLOCKWISE; + } + else + { + ccw_check = 16 + ulPreviousWheelPosition - ulWheelPosition; + if(ccw_check < 8) + { + gesture = ccw_check; + ucDirection = COUNTER_CLOCKWISE; + } + } + } + } + if(gesture == INVALID_CONVERTED_POSITION) + return gesture; + if(ucDirection == COUNTER_CLOCKWISE) + return(gesture + 16); + else + return gesture; +} +//***************************************************************************** +// +// Main cap-touch example. +// +//***************************************************************************** +int +main(void) +{ + unsigned char ucCenterButtonTouched; + unsigned long ulWheelTouchCounter; + unsigned char ucConvertedWheelPosition; + unsigned char ucGestureDetected; + + // + // Enable lazy stacking for interrupt handlers. This allows floating-point + // instructions to be used within interrupt handlers, but at the expense of + // extra stack usage. + // + ROM_FPUEnable(); + ROM_FPULazyStackingEnable(); + + // + // Set the clocking to run directly from the PLL at 80 MHz + // + ROM_SysCtlClockSet(SYSCTL_SYSDIV_2_5 | SYSCTL_USE_PLL | SYSCTL_XTAL_16MHZ | + SYSCTL_OSC_MAIN); + ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA); + ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOB); + ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOE); + + // + // Initialize a few GPIO outputs for the LEDs + // + GPIOPinTypeGPIOOutput(GPIO_PORTE_BASE, GPIO_PIN_4); + GPIOPinTypeGPIOOutput(GPIO_PORTE_BASE, GPIO_PIN_5); + GPIOPinTypeGPIOOutput(GPIO_PORTB_BASE, GPIO_PIN_4); + GPIOPinTypeGPIOOutput(GPIO_PORTB_BASE, GPIO_PIN_6); + GPIOPinTypeGPIOOutput(GPIO_PORTB_BASE, GPIO_PIN_7); + GPIOPinTypeGPIOOutput(GPIO_PORTB_BASE, GPIO_PIN_5); + + // + // Turn on the Center LED + // + GPIOPinWrite(GPIO_PORTB_BASE, GPIO_PIN_5, GPIO_PIN_5); + + // + // Initialize the UART. + // + ROM_GPIOPinConfigure(GPIO_PA0_U0RX); + ROM_GPIOPinConfigure(GPIO_PA1_U0TX); + ROM_GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_1); + UARTStdioInitExpClk(0,9600); + + // + // First, I'm configuring the pins as outputs to take care of all of the + // non-recurring setup. + // + ROM_SysCtlGPIOAHBEnable(SYSCTL_PERIPH_GPIOA); + GPIOPinTypeGPIOOutput(GPIO_PORTA_AHB_BASE, GPIO_PIN_2); + GPIOPinTypeGPIOOutput(GPIO_PORTA_AHB_BASE, GPIO_PIN_3); + GPIOPinTypeGPIOOutput(GPIO_PORTA_AHB_BASE, GPIO_PIN_4); + GPIOPinTypeGPIOOutput(GPIO_PORTA_AHB_BASE, GPIO_PIN_6); + GPIOPinTypeGPIOOutput(GPIO_PORTA_AHB_BASE, GPIO_PIN_7); + + // + // Start up Systick to measure time + // + SysTickPeriodSet(0x00FFFFFF); + SysTickEnable(); + + // + // Set the baseline capacitance measurements for our wheel and center + // button. + // + TI_CAPT_Init_Baseline(&g_sSensorWheel); + TI_CAPT_Update_Baseline(&g_sSensorWheel,2); + TI_CAPT_Init_Baseline(&g_sMiddleButton); + TI_CAPT_Update_Baseline(&g_sMiddleButton,2); + + // + // Send the Sleep code + // + UARTprintf("\0xDE\0xAD"); + + // + // Perform the LED startup sequence, and tell the GUI we're alive. + // + UARTprintf("\0xBE\0xEF"); + + // + // Assume that the center button starts off "untouched", the wheel has no + // position, and no gestures are in progress. + // + ucCenterButtonTouched = 0; + ucConvertedWheelPosition = INVALID_CONVERTED_POSITION; + ucGestureDetected = 0; + + // + // Set the wheel counter for the default delay period. + // + ulWheelTouchCounter = WHEEL_TOUCH_DELAY - 1; + + // + // Go into active mode. + // + while(1) + { + g_ulWheelPosition = ILLEGAL_SLIDER_WHEEL_POSITION; + g_ulWheelPosition = TI_CAPT_Wheel(&g_sSensorWheel); + + if(g_ulWheelPosition != ILLEGAL_SLIDER_WHEEL_POSITION) + { + ucCenterButtonTouched = 0; + + if(g_ulWheelPosition < 0x08) + { + g_ulWheelPosition += 0x40 - 0x08; + } + else + { + g_ulWheelPosition -= 0x08; + } + + g_ulWheelPosition = g_ulWheelPosition >> 2; + + ucConvertedWheelPosition = GetGesture(g_ulWheelPosition); + + // + // Add hysteresis to reduce toggling between g_sSensorWheel + // positions if no gesture has been TRULY detected. + // + if((ucGestureDetected==0) && ((ucConvertedWheelPosition<=1) || + (ucConvertedWheelPosition==0x11) || + (ucConvertedWheelPosition==0x10))) + { + if (ulPreviousWheelPosition != ILLEGAL_SLIDER_WHEEL_POSITION) + g_ulWheelPosition = ulPreviousWheelPosition; + ucConvertedWheelPosition = 0; + } + + // + //Turn on corresponding LED(s) + // + LEDOutput(g_ulWheelPosition); + + // + // A gesture has been detected + // + if((ucConvertedWheelPosition != 0) && + (ucConvertedWheelPosition != 16) && + (ucConvertedWheelPosition != INVALID_CONVERTED_POSITION)) + { + // + // Starting of a new gesture sequence + // + if (ucGestureDetected ==0) + { + ucGestureDetected = 1; + + // + // Transmit gesture start status update & position via UART + // to PC + // + UARTCharPut(UART0_BASE, GESTURE_START); + UARTCharPut(UART0_BASE,ulPreviousWheelPosition + + GESTURE_POSITION_OFFSET); + } + + // + // Transmit gesture & position via UART to PC + // + UARTCharPut(UART0_BASE,ucConvertedWheelPosition); + UARTCharPut(UART0_BASE,g_ulWheelPosition + + GESTURE_POSITION_OFFSET); + } + else + { + // + // If no gesture was detected, this is constituted as a + // touch/tap + // + if (ucGestureDetected==0) + { + if (++ulWheelTouchCounter >= WHEEL_TOUCH_DELAY) + { + // + // Transmit wheel position [twice] via UART to PC + // + ulWheelTouchCounter = 0; + UARTCharPut(UART0_BASE,g_ulWheelPosition + + WHEEL_POSITION_OFFSET); + UARTCharPut(UART0_BASE,g_ulWheelPosition + + WHEEL_POSITION_OFFSET); + } + } + else + { + ulWheelTouchCounter = WHEEL_TOUCH_DELAY - 1; + } + } + + ulPreviousWheelPosition = g_ulWheelPosition; + } + else + { + // + // no wheel position was detected + // + + if(TI_CAPT_Button(&g_sMiddleButton)) + { + // + // Middle button was touched + // + if (ucCenterButtonTouched==0) + { + // + // Transmit center button code [twice] via UART to PC + // + UARTCharPut(UART0_BASE,MIDDLE_BUTTON_CODE); + UARTCharPut(UART0_BASE,MIDDLE_BUTTON_CODE); + + ucCenterButtonTouched = 1; + + if(GPIOPinRead(GPIO_PORTB_BASE, GPIO_PIN_5)) + { + GPIOPinWrite(GPIO_PORTB_BASE, GPIO_PIN_5, 0); + } + else + { + GPIOPinWrite(GPIO_PORTB_BASE, GPIO_PIN_5, GPIO_PIN_5); + } + } + } + else + { + // + // No touch was registered at all [Not wheel or center button] + // + ucCenterButtonTouched = 0; + + if((ucConvertedWheelPosition == INVALID_CONVERTED_POSITION) || + (ucGestureDetected ==0)) + { + // + // No gesture was registered previously + // + if(ulPreviousWheelPosition != + ILLEGAL_SLIDER_WHEEL_POSITION) + { + // + // Transmit last wheel position [twice] via UART to PC + // + UARTCharPut(UART0_BASE,ulPreviousWheelPosition + + WHEEL_POSITION_OFFSET ); + UARTCharPut(UART0_BASE,ulPreviousWheelPosition + + WHEEL_POSITION_OFFSET ); + ulWheelTouchCounter = WHEEL_TOUCH_DELAY - 1; + } + } + + if (ucGestureDetected == 1) + { + // + // A gesture was registered previously + // + + // + // Transmit status update: stop gesture tracking [twice] + // via UART to PC + // + UARTCharPut(UART0_BASE,GESTURE_STOP); + UARTCharPut(UART0_BASE,GESTURE_STOP); + } + + } + + // + // Reset all touch conditions, turn off LEDs, + // + LEDOutput(0); + ulPreviousWheelPosition= ILLEGAL_SLIDER_WHEEL_POSITION; + ucConvertedWheelPosition = INVALID_CONVERTED_POSITION; + ucGestureDetected = 0; + + } + + // + // Option: Add delay/sleep cycle here to reduce active duty cycle. This + // lowers power consumption but sacrifices wheel responsiveness. + // Additional timing refinement must be taken into consideration when + // interfacing with PC applications GUI to retain proper communication + // protocol. + // + + DelayMs(50); + + } +} diff --git a/boards/ek-lm4f120xl-boost-capsense/capsense/capsense.ewd b/boards/ek-lm4f120xl-boost-capsense/capsense/capsense.ewd new file mode 100644 index 0000000..b8eeac7 --- /dev/null +++ b/boards/ek-lm4f120xl-boost-capsense/capsense/capsense.ewd @@ -0,0 +1,614 @@ + + + + 1 + + Debug + + ARM + + 1 + + C-SPY + 2 + + 15 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + ARMSIM_ID + 2 + + 1 + 1 + 1 + + + + + + + + ANGEL_ID + 2 + + 0 + 1 + 1 + + + + + + + + + + + + GDBSERVER_ID + 2 + + 0 + 1 + 1 + + + + + + + + + + + IARROM_ID + 2 + + 0 + 1 + 1 + + + + + + + + + + JLINK_ID + 2 + + 9 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + LMIFTDI_ID + 2 + + 1 + 1 + 1 + + + + + + + + MACRAIGOR_ID + 2 + + 2 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + RDI_ID + 2 + + 1 + 1 + 1 + + + + + + + + + + + + + + + + + THIRDPARTY_ID + 2 + + 0 + 1 + 1 + + + + + + + + + $TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\OSE\OseEpsilonPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\PowerPac\PowerPacRTOS.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin + 0 + + + $EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin + 1 + + + $EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin + 0 + + + $EW_DIR$\common\plugins\Profiling\Profiling.ENU.ewplugin + 1 + + + $EW_DIR$\common\plugins\Stack\Stack.ENU.ewplugin + 1 + + + + diff --git a/boards/ek-lm4f120xl-boost-capsense/capsense/capsense.ewp b/boards/ek-lm4f120xl-boost-capsense/capsense/capsense.ewp new file mode 100644 index 0000000..76f4ff3 --- /dev/null +++ b/boards/ek-lm4f120xl-boost-capsense/capsense/capsense.ewp @@ -0,0 +1,806 @@ + + + + 1 + + Debug + + ARM + + 1 + + General + 3 + + 14 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCARM + 2 + + 19 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AARM + 2 + + 7 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + OBJCOPY + 0 + + 1 + 1 + 1 + + + + + + + + + CUSTOM + 3 + + + + + + + BICOMP + 0 + + + + BUILDACTION + 1 + + + + + + + ILINK + 0 + + 5 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + IARCHIVE + 0 + + 0 + 1 + 1 + + + + + + + BILINK + 0 + + + + + Libraries + + $PROJ_DIR$\..\..\..\driverlib\ewarm-cm4f\Exe\driverlib-cm4f.a + + + + Source + + $PROJ_DIR$\..\drivers\CTS_HAL.c + + + $PROJ_DIR$\..\drivers\CTS_Layer.c + + + $PROJ_DIR$\..\drivers\CTS_structure.c + + + $PROJ_DIR$\..\..\ek-lm4f120xl\drivers\buttons.c + + + $PROJ_DIR$\capsense.c + + + $PROJ_DIR$\..\..\ek-lm4f120xl\drivers\rgb.c + + + $PROJ_DIR$\startup_ewarm.c + + + $PROJ_DIR$\..\..\..\utils\uartstdio.c + + + diff --git a/boards/ek-lm4f120xl-boost-capsense/capsense/capsense.icf b/boards/ek-lm4f120xl-boost-capsense/capsense/capsense.icf new file mode 100644 index 0000000..3b04759 --- /dev/null +++ b/boards/ek-lm4f120xl-boost-capsense/capsense/capsense.icf @@ -0,0 +1,78 @@ +//***************************************************************************** +// +// capsense.icf - Linker configuration file for capsense. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +// +// Define a memory region that covers the entire 4 GB addressible space of the +// processor. +// +define memory mem with size = 4G; + +// +// Define a region for the on-chip flash. +// +define region FLASH = mem:[from 0x00000000 to 0x0003ffff]; + +// +// Define a region for the on-chip SRAM. +// +define region SRAM = mem:[from 0x20000000 to 0x20007fff]; + +// +// Define a block for the heap. The size should be set to something other +// than zero if things in the C library that require the heap are used. +// +define block HEAP with alignment = 8, size = 0x00000000 { }; + +// +// Indicate that the read/write values should be initialized by copying from +// flash. +// +initialize by copy { readwrite }; + +// +// Indicate that the noinit values should be left alone. This includes the +// stack, which if initialized will destroy the return address from the +// initialization code, causing the processor to branch to zero and fault. +// +do not initialize { section .noinit }; + +// +// Place the interrupt vectors at the start of flash. +// +place at start of FLASH { readonly section .intvec }; + +// +// Place the remainder of the read-only items into flash. +// +place in FLASH { readonly }; + +// +// Place the RAM vector table at the start of SRAM. +// +place at start of SRAM { section VTABLE }; + +// +// Place all read/write items into SRAM. +// +place in SRAM { readwrite, block HEAP }; diff --git a/boards/ek-lm4f120xl-boost-capsense/capsense/capsense.ld b/boards/ek-lm4f120xl-boost-capsense/capsense/capsense.ld new file mode 100644 index 0000000..92a4331 --- /dev/null +++ b/boards/ek-lm4f120xl-boost-capsense/capsense/capsense.ld @@ -0,0 +1,57 @@ +/****************************************************************************** + * + * capsense.ld - Linker configuration file for capsense. + * + * Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. + * Software License Agreement + * + * Texas Instruments (TI) is supplying this software for use solely and + * exclusively on TI's microcontroller products. The software is owned by + * TI and/or its suppliers, and is protected under applicable copyright + * laws. You may not combine this software with "viral" open-source + * software in order to form a larger program. + * + * THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. + * NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT + * NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY + * CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL + * DAMAGES, FOR ANY REASON WHATSOEVER. + * + * This is part of revision 9453 of the EK-LM4F120XL Firmware Package. + * + *****************************************************************************/ + +MEMORY +{ + FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x00040000 + SRAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00008000 +} + +SECTIONS +{ + .text : + { + _text = .; + KEEP(*(.isr_vector)) + *(.text*) + *(.rodata*) + _etext = .; + } > FLASH + + .data : AT(ADDR(.text) + SIZEOF(.text)) + { + _data = .; + *(vtable) + *(.data*) + _edata = .; + } > SRAM + + .bss : + { + _bss = .; + *(.bss*) + *(COMMON) + _ebss = .; + } > SRAM +} diff --git a/boards/ek-lm4f120xl-boost-capsense/capsense/capsense.sct b/boards/ek-lm4f120xl-boost-capsense/capsense/capsense.sct new file mode 100644 index 0000000..8fddf54 --- /dev/null +++ b/boards/ek-lm4f120xl-boost-capsense/capsense/capsense.sct @@ -0,0 +1,47 @@ +;****************************************************************************** +; +; capsense.sct - Linker configuration file for capsense. +; +; Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +; Software License Agreement +; +; Texas Instruments (TI) is supplying this software for use solely and +; exclusively on TI's microcontroller products. The software is owned by +; TI and/or its suppliers, and is protected under applicable copyright +; laws. You may not combine this software with "viral" open-source +; software in order to form a larger program. +; +; THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +; NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +; NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +; A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +; CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +; DAMAGES, FOR ANY REASON WHATSOEVER. +; +; This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +; +;****************************************************************************** + +LR_IROM 0x00000000 0x00040000 +{ + ; + ; Specify the Execution Address of the code and the size. + ; + ER_IROM 0x00000000 0x00040000 + { + *.o (RESET, +First) + * (InRoot$$Sections, +RO) + } + + ; + ; Specify the Execution Address of the data area. + ; + RW_IRAM 0x20000000 0x00008000 + { + ; + ; Uncomment the following line in order to use IntRegister(). + ; + ;* (vtable, +First) + * (+RW, +ZI) + } +} diff --git a/boards/ek-lm4f120xl-boost-capsense/capsense/capsense.sgxx b/boards/ek-lm4f120xl-boost-capsense/capsense/capsense.sgxx new file mode 100644 index 0000000..521ec38 Binary files /dev/null and b/boards/ek-lm4f120xl-boost-capsense/capsense/capsense.sgxx differ diff --git a/boards/ek-lm4f120xl-boost-capsense/capsense/capsense.uvopt b/boards/ek-lm4f120xl-boost-capsense/capsense/capsense.uvopt new file mode 100644 index 0000000..84ef7f4 --- /dev/null +++ b/boards/ek-lm4f120xl-boost-capsense/capsense/capsense.uvopt @@ -0,0 +1,373 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + + + + 0 + 0 + + + + capsense + 0x4 + ARM-ADS + + 8000000 + + 1 + 1 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\rvmdk\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 255 + + + 0 + Data Sheet + DATASHTS\Luminary\LM4F120H5QR.PDF + + + + SARMCM3.DLL + -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 0 + 1 + 0 + 0 + 4 + + + + + + + + + + + BIN\lmidk-agdi.dll + + + + 0 + lmidk-agdi + -O4614 -S3 -FO29 + + + 0 + DLGTARM + + + + 0 + ARMDBGFLAGS + + + + + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + Source + 1 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\drivers\CTS_HAL.c + CTS_HAL.c + + + 1 + 2 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\drivers\CTS_Layer.c + CTS_Layer.c + + + 1 + 3 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\drivers\CTS_structure.c + CTS_structure.c + + + 1 + 4 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\ek-lm4f120xl\drivers\buttons.c + buttons.c + + + 1 + 5 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + .\capsense.c + capsense.c + + + 1 + 6 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\ek-lm4f120xl\drivers\rgb.c + rgb.c + + + 1 + 7 + 2 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + .\startup_rvmdk.S + startup_rvmdk.S + + + 1 + 8 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\utils\uartstdio.c + uartstdio.c + + + + + Libraries + 1 + 0 + 0 + + 2 + 9 + 4 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\driverlib\rvmdk-cm4f\driverlib-cm4f.lib + driverlib-cm4f.lib + + + + + Documentation + 1 + 0 + 0 + + 3 + 10 + 5 + 0 + 1 + 0 + 0 + 1 + 1 + 0 + .\readme.txt + readme.txt + + 44 + 0 + 1 + + -1 + -1 + + + -1 + -1 + + + 0 + 0 + 729 + 300 + + + + + + + 1 + 0 + + 100 + 0 + + + .\readme.txt + 0 + 1 + 1 + + + + + + diff --git a/boards/ek-lm4f120xl-boost-capsense/capsense/capsense.uvproj b/boards/ek-lm4f120xl-boost-capsense/capsense/capsense.uvproj new file mode 100644 index 0000000..ae7acde --- /dev/null +++ b/boards/ek-lm4f120xl-boost-capsense/capsense/capsense.uvproj @@ -0,0 +1,454 @@ + + + + 1.1 + +
### uVision Project, (C) Keil Software
+ + + + capsense + 0x4 + ARM-ADS + + + LM4F120H5QR + Texas Instruments + IRAM(0x20000000-0x20007FFF) IROM(0-0x3FFFF) CLOCK(8000000) CPUTYPE("Cortex-M4") FPU2 + + "STARTUP\Luminary\Startup.s" ("Luminary Startup Code") + UL2CM3(-O207 -S0 -C0 -FO7 -FD20000000 -FC800 -FN1 -FF0LM4F_256 -FS00 -FL040000) + 5919 + LM4Fxxxx.H + + + + + + + + + + 0 + + + + Luminary\ + Luminary\ + + 0 + 0 + 0 + 0 + 1 + + .\rvmdk\ + capsense + 1 + 0 + 0 + 1 + 1 + .\rvmdk\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + + 1 + 0 + fromelf --bin --output .\rvmdk\capsense.bin .\rvmdk\capsense.axf + + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + + + SARMCM3.DLL + -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + + 1 + 0 + 0 + 0 + 16 + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + + + 1 + 1 + 0 + 1 + 1 + 1 + 0 + 1 + + 0 + 4 + + + + + + + + + + + + + + BIN\lmidk-agdi.dll + + + + + 1 + 0 + 0 + 0 + 1 + 4099 + + BIN\lmidk-agdi.dll + + + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M4" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 2 + 0 + 0 + 8 + 1 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x8000 + + + 1 + 0x0 + 0x40000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x40000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x8000 + + + 0 + 0x0 + 0x0 + + + + + + 0 + 3 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + + + rvmdk PART_LM4F120H5QR TARGET_IS_BLIZZARD_RA1 + + ..;..\..\..;..\..\ek-lm4f120xl; + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x00000000 + 0x20000000 + capsense.sct + + + --entry Reset_Handler + + + + + + + + Source + + + CTS_HAL.c + 1 + ..\drivers\CTS_HAL.c + + + CTS_Layer.c + 1 + ..\drivers\CTS_Layer.c + + + CTS_structure.c + 1 + ..\drivers\CTS_structure.c + + + buttons.c + 1 + ..\..\ek-lm4f120xl\drivers\buttons.c + + + capsense.c + 1 + .\capsense.c + + + rgb.c + 1 + ..\..\ek-lm4f120xl\drivers\rgb.c + + + startup_rvmdk.S + 2 + .\startup_rvmdk.S + + + uartstdio.c + 1 + ..\..\..\utils\uartstdio.c + + + + + Libraries + + + driverlib-cm4f.lib + 4 + ..\..\..\driverlib\rvmdk-cm4f\driverlib-cm4f.lib + + + + + Documentation + + + readme.txt + 5 + .\readme.txt + + + + + + + + diff --git a/boards/ek-lm4f120xl-boost-capsense/capsense/capsense_ccs.cmd b/boards/ek-lm4f120xl-boost-capsense/capsense/capsense_ccs.cmd new file mode 100644 index 0000000..524b166 --- /dev/null +++ b/boards/ek-lm4f120xl-boost-capsense/capsense/capsense_ccs.cmd @@ -0,0 +1,70 @@ +/****************************************************************************** + * + * capsense_ccs.cmd - CCS linker configuration file for capsense. + * + * Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. + * Software License Agreement + * + * Texas Instruments (TI) is supplying this software for use solely and + * exclusively on TI's microcontroller products. The software is owned by + * TI and/or its suppliers, and is protected under applicable copyright + * laws. You may not combine this software with "viral" open-source + * software in order to form a larger program. + * + * THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. + * NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT + * NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY + * CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL + * DAMAGES, FOR ANY REASON WHATSOEVER. + * + * This is part of revision 9453 of the EK-LM4F120XL Firmware Package. + * + *****************************************************************************/ + +--retain=g_pfnVectors + +/* The following command line options are set as part of the CCS project. */ +/* If you are building using the command line, or for some reason want to */ +/* define them here, you can uncomment and modify these lines as needed. */ +/* If you are using CCS for building, it is probably better to make any such */ +/* modifications in your CCS project and leave this file alone. */ +/* */ +/* --heap_size=0 */ +/* --stack_size=256 */ +/* --library=rtsv7M3_T_le_eabi.lib */ + +/* The starting address of the application. Normally the interrupt vectors */ +/* must be located at the beginning of the application. */ +#define APP_BASE 0x00000000 +#define RAM_BASE 0x20000000 + +/* System memory map */ + +MEMORY +{ + /* Application stored in and executes from internal flash */ + FLASH (RX) : origin = APP_BASE, length = 0x00040000 + /* Application uses internal RAM for data */ + SRAM (RWX) : origin = 0x20000000, length = 0x00008000 +} + +/* Section allocation in memory */ + +SECTIONS +{ + .intvecs: > APP_BASE + .text : > FLASH + .const : > FLASH + .cinit : > FLASH + .pinit : > FLASH + .init_array : > FLASH + + .vtable : > RAM_BASE + .data : > SRAM + .bss : > SRAM + .sysmem : > SRAM + .stack : > SRAM +} + +__STACK_TOP = __stack + 512; diff --git a/boards/ek-lm4f120xl-boost-capsense/capsense/capsense_sourcerygxx.ld b/boards/ek-lm4f120xl-boost-capsense/capsense/capsense_sourcerygxx.ld new file mode 100644 index 0000000..e17f412 --- /dev/null +++ b/boards/ek-lm4f120xl-boost-capsense/capsense/capsense_sourcerygxx.ld @@ -0,0 +1,31 @@ +/****************************************************************************** + * + * capsense_sourcerygxx.ld - Scatter file for Sourcery CodeBench + * + * Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. + * Software License Agreement + * + * Texas Instruments (TI) is supplying this software for use solely and + * exclusively on TI's microcontroller products. The software is owned by + * TI and/or its suppliers, and is protected under applicable copyright + * laws. You may not combine this software with "viral" open-source + * software in order to form a larger program. + * + * THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. + * NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT + * NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY + * CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL + * DAMAGES, FOR ANY REASON WHATSOEVER. + * + * This is part of revision 9453 of the EK-LM4F120XL Firmware Package. + * + *****************************************************************************/ + +/****************************************************************************** + * + * Define the end of the heap space, which determines the beginning of the + * stack space. + * + *****************************************************************************/ +__cs3_heap_end = __cs3_region_end_ram - 512; diff --git a/boards/ek-lm4f120xl-boost-capsense/capsense/ccs/.ccsimportspec b/boards/ek-lm4f120xl-boost-capsense/capsense/ccs/.ccsimportspec new file mode 100644 index 0000000..fff5e0c --- /dev/null +++ b/boards/ek-lm4f120xl-boost-capsense/capsense/ccs/.ccsimportspec @@ -0,0 +1,8 @@ + + + + + + + + diff --git a/boards/ek-lm4f120xl-boost-capsense/capsense/ccs/.ccsproject b/boards/ek-lm4f120xl-boost-capsense/capsense/ccs/.ccsproject new file mode 100644 index 0000000..56793f4 --- /dev/null +++ b/boards/ek-lm4f120xl-boost-capsense/capsense/ccs/.ccsproject @@ -0,0 +1,12 @@ + + + + + + + + + + + + diff --git a/boards/ek-lm4f120xl-boost-capsense/capsense/ccs/.cproject b/boards/ek-lm4f120xl-boost-capsense/capsense/ccs/.cproject new file mode 100644 index 0000000..c13272a --- /dev/null +++ b/boards/ek-lm4f120xl-boost-capsense/capsense/ccs/.cproject @@ -0,0 +1,195 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/boards/ek-lm4f120xl-boost-capsense/capsense/ccs/.project b/boards/ek-lm4f120xl-boost-capsense/capsense/ccs/.project new file mode 100644 index 0000000..55a238f --- /dev/null +++ b/boards/ek-lm4f120xl-boost-capsense/capsense/ccs/.project @@ -0,0 +1,136 @@ + + + capsense + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + + + ?name? + + + + org.eclipse.cdt.make.core.append_environment + true + + + org.eclipse.cdt.make.core.autoBuildTarget + all + + + org.eclipse.cdt.make.core.buildArguments + -k + + + org.eclipse.cdt.make.core.buildCommand + ${CCS_UTILS_DIR}/bin/gmake + + + org.eclipse.cdt.make.core.buildLocation + ${BuildDirectory} + + + org.eclipse.cdt.make.core.cleanBuildTarget + clean + + + org.eclipse.cdt.make.core.contents + org.eclipse.cdt.make.core.activeConfigSettings + + + org.eclipse.cdt.make.core.enableAutoBuild + true + + + org.eclipse.cdt.make.core.enableCleanBuild + true + + + org.eclipse.cdt.make.core.enableFullBuild + true + + + org.eclipse.cdt.make.core.fullBuildTarget + all + + + org.eclipse.cdt.make.core.stopOnError + false + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + true + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + com.ti.ccstudio.core.ccsNature + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.core.ccnature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + capsense.c + 1 + SW_ROOT/boards/ek-lm4f120xl-boost-capsense/capsense/capsense.c + + + capsense_ccs.cmd + 1 + SW_ROOT/boards/ek-lm4f120xl-boost-capsense/capsense/capsense_ccs.cmd + + + startup_ccs.c + 1 + SW_ROOT/boards/ek-lm4f120xl-boost-capsense/capsense/startup_ccs.c + + + drivers/CTS_HAL.c + 1 + SW_ROOT/boards/ek-lm4f120xl-boost-capsense/drivers/CTS_HAL.c + + + drivers/CTS_Layer.c + 1 + SW_ROOT/boards/ek-lm4f120xl-boost-capsense/drivers/CTS_Layer.c + + + drivers/CTS_structure.c + 1 + SW_ROOT/boards/ek-lm4f120xl-boost-capsense/drivers/CTS_structure.c + + + utils/uartstdio.c + 1 + SW_ROOT/utils/uartstdio.c + + + ek-lm4f120xl/drivers/buttons.c + 1 + SW_ROOT/boards/ek-lm4f120xl/drivers/buttons.c + + + ek-lm4f120xl/drivers/rgb.c + 1 + SW_ROOT/boards/ek-lm4f120xl/drivers/rgb.c + + + + + SW_ROOT + $%7BPARENT-4-PROJECT_LOC%7D + + + diff --git a/boards/ek-lm4f120xl-boost-capsense/capsense/ccs/.settings/org.eclipse.cdt.codan.core.prefs b/boards/ek-lm4f120xl-boost-capsense/capsense/ccs/.settings/org.eclipse.cdt.codan.core.prefs new file mode 100644 index 0000000..98b6350 --- /dev/null +++ b/boards/ek-lm4f120xl-boost-capsense/capsense/ccs/.settings/org.eclipse.cdt.codan.core.prefs @@ -0,0 +1,3 @@ +eclipse.preferences.version=1 +inEditor=false +onBuild=false diff --git a/boards/ek-lm4f120xl-boost-capsense/capsense/ccs/Debug/capsense.bin b/boards/ek-lm4f120xl-boost-capsense/capsense/ccs/Debug/capsense.bin new file mode 100644 index 0000000..8a87e1b Binary files /dev/null and b/boards/ek-lm4f120xl-boost-capsense/capsense/ccs/Debug/capsense.bin differ diff --git a/boards/ek-lm4f120xl-boost-capsense/capsense/ccs/Debug/capsense.out b/boards/ek-lm4f120xl-boost-capsense/capsense/ccs/Debug/capsense.out new file mode 100644 index 0000000..30334bd Binary files /dev/null and b/boards/ek-lm4f120xl-boost-capsense/capsense/ccs/Debug/capsense.out differ diff --git a/boards/ek-lm4f120xl-boost-capsense/capsense/ccs/macros.ini_initial b/boards/ek-lm4f120xl-boost-capsense/capsense/ccs/macros.ini_initial new file mode 100644 index 0000000..588017d --- /dev/null +++ b/boards/ek-lm4f120xl-boost-capsense/capsense/ccs/macros.ini_initial @@ -0,0 +1 @@ +SW_ROOT = ../../../.. diff --git a/boards/ek-lm4f120xl-boost-capsense/capsense/ccs/target_config.ccxml b/boards/ek-lm4f120xl-boost-capsense/capsense/ccs/target_config.ccxml new file mode 100644 index 0000000..469eea0 --- /dev/null +++ b/boards/ek-lm4f120xl-boost-capsense/capsense/ccs/target_config.ccxml @@ -0,0 +1,13 @@ + + + + + + + + + + + + + diff --git a/boards/ek-lm4f120xl-boost-capsense/capsense/ewarm/Exe/capsense.bin b/boards/ek-lm4f120xl-boost-capsense/capsense/ewarm/Exe/capsense.bin new file mode 100644 index 0000000..be02763 Binary files /dev/null and b/boards/ek-lm4f120xl-boost-capsense/capsense/ewarm/Exe/capsense.bin differ diff --git a/boards/ek-lm4f120xl-boost-capsense/capsense/ewarm/Exe/capsense.out b/boards/ek-lm4f120xl-boost-capsense/capsense/ewarm/Exe/capsense.out new file mode 100644 index 0000000..171adb8 Binary files /dev/null and b/boards/ek-lm4f120xl-boost-capsense/capsense/ewarm/Exe/capsense.out differ diff --git a/boards/ek-lm4f120xl-boost-capsense/capsense/gcc/capsense.axf b/boards/ek-lm4f120xl-boost-capsense/capsense/gcc/capsense.axf new file mode 100644 index 0000000..2313693 Binary files /dev/null and b/boards/ek-lm4f120xl-boost-capsense/capsense/gcc/capsense.axf differ diff --git a/boards/ek-lm4f120xl-boost-capsense/capsense/gcc/capsense.bin b/boards/ek-lm4f120xl-boost-capsense/capsense/gcc/capsense.bin new file mode 100644 index 0000000..46b0852 Binary files /dev/null and b/boards/ek-lm4f120xl-boost-capsense/capsense/gcc/capsense.bin differ diff --git a/boards/ek-lm4f120xl-boost-capsense/capsense/readme.txt b/boards/ek-lm4f120xl-boost-capsense/capsense/readme.txt new file mode 100644 index 0000000..cf3300b --- /dev/null +++ b/boards/ek-lm4f120xl-boost-capsense/capsense/readme.txt @@ -0,0 +1,32 @@ +Capacitive Touch Example + +An example that works with the 430BOOST-SENSE1 capactive sense +BoosterPack, originally designed for the MSP430 LaunchPad. + +The Stellaris LM4F120H5QR does not have the capacitive sense hardware +assisted peripheral features of some MSP430 chips. Therefore it is +required that the user install surface mount resistors on the pads +provided on the bottom of the capacitive sense BoosterPack. Resistor values +of 30 ohms are recommended. Calibration may be required for +resistor values other than 30 ohms. + + +------------------------------------------------------------------------------- + +Copyright (c) 2011-2012 Texas Instruments Incorporated. All rights reserved. +Software License Agreement + +Texas Instruments (TI) is supplying this software for use solely and +exclusively on TI's microcontroller products. The software is owned by +TI and/or its suppliers, and is protected under applicable copyright +laws. You may not combine this software with "viral" open-source +software in order to form a larger program. + +THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +DAMAGES, FOR ANY REASON WHATSOEVER. + +This is part of revision 9453 of the EK-LM4F120XL Firmware Package. diff --git a/boards/ek-lm4f120xl-boost-capsense/capsense/rvmdk/capsense.axf b/boards/ek-lm4f120xl-boost-capsense/capsense/rvmdk/capsense.axf new file mode 100644 index 0000000..8979a0a Binary files /dev/null and b/boards/ek-lm4f120xl-boost-capsense/capsense/rvmdk/capsense.axf differ diff --git a/boards/ek-lm4f120xl-boost-capsense/capsense/rvmdk/capsense.bin b/boards/ek-lm4f120xl-boost-capsense/capsense/rvmdk/capsense.bin new file mode 100644 index 0000000..498e8fb Binary files /dev/null and b/boards/ek-lm4f120xl-boost-capsense/capsense/rvmdk/capsense.bin differ diff --git a/boards/ek-lm4f120xl-boost-capsense/capsense/sourcerygxx/capsense.axf b/boards/ek-lm4f120xl-boost-capsense/capsense/sourcerygxx/capsense.axf new file mode 100644 index 0000000..7c18785 Binary files /dev/null and b/boards/ek-lm4f120xl-boost-capsense/capsense/sourcerygxx/capsense.axf differ diff --git a/boards/ek-lm4f120xl-boost-capsense/capsense/sourcerygxx/capsense.bin b/boards/ek-lm4f120xl-boost-capsense/capsense/sourcerygxx/capsense.bin new file mode 100644 index 0000000..16dc618 Binary files /dev/null and b/boards/ek-lm4f120xl-boost-capsense/capsense/sourcerygxx/capsense.bin differ diff --git a/boards/ek-lm4f120xl-boost-capsense/capsense/startup_ccs.c b/boards/ek-lm4f120xl-boost-capsense/capsense/startup_ccs.c new file mode 100644 index 0000000..9f15b47 --- /dev/null +++ b/boards/ek-lm4f120xl-boost-capsense/capsense/startup_ccs.c @@ -0,0 +1,291 @@ +//***************************************************************************** +// +// startup_ccs.c - Startup code for use with TI's Code Composer Studio. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +//***************************************************************************** +// +// Forward declaration of the default fault handlers. +// +//***************************************************************************** +void ResetISR(void); +static void NmiSR(void); +static void FaultISR(void); +static void IntDefaultHandler(void); + +//***************************************************************************** +// +// External declaration for the reset handler that is to be called when the +// processor is started +// +//***************************************************************************** +extern void _c_int00(void); + +//***************************************************************************** +// +// Linker variable that marks the top of the stack. +// +//***************************************************************************** +extern unsigned long __STACK_TOP; + +//***************************************************************************** +// +// The vector table. Note that the proper constructs must be placed on this to +// ensure that it ends up at physical address 0x0000.0000 or at the start of +// the program if located at a start address other than 0. +// +//***************************************************************************** +#pragma DATA_SECTION(g_pfnVectors, ".intvecs") +void (* const g_pfnVectors[])(void) = +{ + (void (*)(void))((unsigned long)&__STACK_TOP), + // The initial stack pointer + ResetISR, // The reset handler + NmiSR, // The NMI handler + FaultISR, // The hard fault handler + IntDefaultHandler, // The MPU fault handler + IntDefaultHandler, // The bus fault handler + IntDefaultHandler, // The usage fault handler + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // SVCall handler + IntDefaultHandler, // Debug monitor handler + 0, // Reserved + IntDefaultHandler, // The PendSV handler + IntDefaultHandler, // The SysTick handler + IntDefaultHandler, // GPIO Port A + IntDefaultHandler, // GPIO Port B + IntDefaultHandler, // GPIO Port C + IntDefaultHandler, // GPIO Port D + IntDefaultHandler, // GPIO Port E + IntDefaultHandler, // UART0 Rx and Tx + IntDefaultHandler, // UART1 Rx and Tx + IntDefaultHandler, // SSI0 Rx and Tx + IntDefaultHandler, // I2C0 Master and Slave + IntDefaultHandler, // PWM Fault + IntDefaultHandler, // PWM Generator 0 + IntDefaultHandler, // PWM Generator 1 + IntDefaultHandler, // PWM Generator 2 + IntDefaultHandler, // Quadrature Encoder 0 + IntDefaultHandler, // ADC Sequence 0 + IntDefaultHandler, // ADC Sequence 1 + IntDefaultHandler, // ADC Sequence 2 + IntDefaultHandler, // ADC Sequence 3 + IntDefaultHandler, // Watchdog timer + IntDefaultHandler, // Timer 0 subtimer A + IntDefaultHandler, // Timer 0 subtimer B + IntDefaultHandler, // Timer 1 subtimer A + IntDefaultHandler, // Timer 1 subtimer B + IntDefaultHandler, // Timer 2 subtimer A + IntDefaultHandler, // Timer 2 subtimer B + IntDefaultHandler, // Analog Comparator 0 + IntDefaultHandler, // Analog Comparator 1 + IntDefaultHandler, // Analog Comparator 2 + IntDefaultHandler, // System Control (PLL, OSC, BO) + IntDefaultHandler, // FLASH Control + IntDefaultHandler, // GPIO Port F + IntDefaultHandler, // GPIO Port G + IntDefaultHandler, // GPIO Port H + IntDefaultHandler, // UART2 Rx and Tx + IntDefaultHandler, // SSI1 Rx and Tx + IntDefaultHandler, // Timer 3 subtimer A + IntDefaultHandler, // Timer 3 subtimer B + IntDefaultHandler, // I2C1 Master and Slave + IntDefaultHandler, // Quadrature Encoder 1 + IntDefaultHandler, // CAN0 + IntDefaultHandler, // CAN1 + IntDefaultHandler, // CAN2 + IntDefaultHandler, // Ethernet + IntDefaultHandler, // Hibernate + IntDefaultHandler, // USB0 + IntDefaultHandler, // PWM Generator 3 + IntDefaultHandler, // uDMA Software Transfer + IntDefaultHandler, // uDMA Error + IntDefaultHandler, // ADC1 Sequence 0 + IntDefaultHandler, // ADC1 Sequence 1 + IntDefaultHandler, // ADC1 Sequence 2 + IntDefaultHandler, // ADC1 Sequence 3 + IntDefaultHandler, // I2S0 + IntDefaultHandler, // External Bus Interface 0 + IntDefaultHandler, // GPIO Port J + IntDefaultHandler, // GPIO Port K + IntDefaultHandler, // GPIO Port L + IntDefaultHandler, // SSI2 Rx and Tx + IntDefaultHandler, // SSI3 Rx and Tx + IntDefaultHandler, // UART3 Rx and Tx + IntDefaultHandler, // UART4 Rx and Tx + IntDefaultHandler, // UART5 Rx and Tx + IntDefaultHandler, // UART6 Rx and Tx + IntDefaultHandler, // UART7 Rx and Tx + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // I2C2 Master and Slave + IntDefaultHandler, // I2C3 Master and Slave + IntDefaultHandler, // Timer 4 subtimer A + IntDefaultHandler, // Timer 4 subtimer B + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // Timer 5 subtimer A + IntDefaultHandler, // Timer 5 subtimer B + IntDefaultHandler, // Wide Timer 0 subtimer A + IntDefaultHandler, // Wide Timer 0 subtimer B + IntDefaultHandler, // Wide Timer 1 subtimer A + IntDefaultHandler, // Wide Timer 1 subtimer B + IntDefaultHandler, // Wide Timer 2 subtimer A + IntDefaultHandler, // Wide Timer 2 subtimer B + IntDefaultHandler, // Wide Timer 3 subtimer A + IntDefaultHandler, // Wide Timer 3 subtimer B + IntDefaultHandler, // Wide Timer 4 subtimer A + IntDefaultHandler, // Wide Timer 4 subtimer B + IntDefaultHandler, // Wide Timer 5 subtimer A + IntDefaultHandler, // Wide Timer 5 subtimer B + IntDefaultHandler, // FPU + IntDefaultHandler, // PECI 0 + IntDefaultHandler, // LPC 0 + IntDefaultHandler, // I2C4 Master and Slave + IntDefaultHandler, // I2C5 Master and Slave + IntDefaultHandler, // GPIO Port M + IntDefaultHandler, // GPIO Port N + IntDefaultHandler, // Quadrature Encoder 2 + IntDefaultHandler, // Fan 0 + 0, // Reserved + IntDefaultHandler, // GPIO Port P (Summary or P0) + IntDefaultHandler, // GPIO Port P1 + IntDefaultHandler, // GPIO Port P2 + IntDefaultHandler, // GPIO Port P3 + IntDefaultHandler, // GPIO Port P4 + IntDefaultHandler, // GPIO Port P5 + IntDefaultHandler, // GPIO Port P6 + IntDefaultHandler, // GPIO Port P7 + IntDefaultHandler, // GPIO Port Q (Summary or Q0) + IntDefaultHandler, // GPIO Port Q1 + IntDefaultHandler, // GPIO Port Q2 + IntDefaultHandler, // GPIO Port Q3 + IntDefaultHandler, // GPIO Port Q4 + IntDefaultHandler, // GPIO Port Q5 + IntDefaultHandler, // GPIO Port Q6 + IntDefaultHandler, // GPIO Port Q7 + IntDefaultHandler, // GPIO Port R + IntDefaultHandler, // GPIO Port S + IntDefaultHandler, // PWM 1 Generator 0 + IntDefaultHandler, // PWM 1 Generator 1 + IntDefaultHandler, // PWM 1 Generator 2 + IntDefaultHandler, // PWM 1 Generator 3 + IntDefaultHandler // PWM 1 Fault +}; + +//***************************************************************************** +// +// This is the code that gets called when the processor first starts execution +// following a reset event. Only the absolutely necessary set is performed, +// after which the application supplied entry() routine is called. Any fancy +// actions (such as making decisions based on the reset cause register, and +// resetting the bits in that register) are left solely in the hands of the +// application. +// +//***************************************************************************** +void +ResetISR(void) +{ + // + // Jump to the CCS C initialization routine. This will enable the + // floating-point unit as well, so that does not need to be done here. + // + __asm(" .global _c_int00\n" + " b.w _c_int00"); +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a NMI. This +// simply enters an infinite loop, preserving the system state for examination +// by a debugger. +// +//***************************************************************************** +static void +NmiSR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a fault +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +FaultISR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives an unexpected +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +IntDefaultHandler(void) +{ + // + // Go into an infinite loop. + // + while(1) + { + } +} diff --git a/boards/ek-lm4f120xl-boost-capsense/capsense/startup_ewarm.c b/boards/ek-lm4f120xl-boost-capsense/capsense/startup_ewarm.c new file mode 100644 index 0000000..ea56618 --- /dev/null +++ b/boards/ek-lm4f120xl-boost-capsense/capsense/startup_ewarm.c @@ -0,0 +1,325 @@ +//***************************************************************************** +// +// startup_ewarm.c - Startup code for use with IAR's Embedded Workbench, +// version 5. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +#include "inc/hw_nvic.h" +#include "inc/hw_types.h" + +//***************************************************************************** +// +// Enable the IAR extensions for this source file. +// +//***************************************************************************** +#pragma language=extended + +//***************************************************************************** +// +// Forward declaration of the default fault handlers. +// +//***************************************************************************** +void ResetISR(void); +static void NmiSR(void); +static void FaultISR(void); +static void IntDefaultHandler(void); + +//***************************************************************************** +// +// The entry point for the application startup code. +// +//***************************************************************************** +extern void __iar_program_start(void); + +//***************************************************************************** +// +// Reserve space for the system stack. +// +//***************************************************************************** +static unsigned long pulStack[128] @ ".noinit"; + +//***************************************************************************** +// +// A union that describes the entries of the vector table. The union is needed +// since the first entry is the stack pointer and the remainder are function +// pointers. +// +//***************************************************************************** +typedef union +{ + void (*pfnHandler)(void); + unsigned long ulPtr; +} +uVectorEntry; + +//***************************************************************************** +// +// The vector table. Note that the proper constructs must be placed on this to +// ensure that it ends up at physical address 0x0000.0000. +// +//***************************************************************************** +__root const uVectorEntry __vector_table[] @ ".intvec" = +{ + { .ulPtr = (unsigned long)pulStack + sizeof(pulStack) }, + // The initial stack pointer + ResetISR, // The reset handler + NmiSR, // The NMI handler + FaultISR, // The hard fault handler + IntDefaultHandler, // The MPU fault handler + IntDefaultHandler, // The bus fault handler + IntDefaultHandler, // The usage fault handler + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // SVCall handler + IntDefaultHandler, // Debug monitor handler + 0, // Reserved + IntDefaultHandler, // The PendSV handler + IntDefaultHandler, // The SysTick handler + IntDefaultHandler, // GPIO Port A + IntDefaultHandler, // GPIO Port B + IntDefaultHandler, // GPIO Port C + IntDefaultHandler, // GPIO Port D + IntDefaultHandler, // GPIO Port E + IntDefaultHandler, // UART0 Rx and Tx + IntDefaultHandler, // UART1 Rx and Tx + IntDefaultHandler, // SSI0 Rx and Tx + IntDefaultHandler, // I2C0 Master and Slave + IntDefaultHandler, // PWM Fault + IntDefaultHandler, // PWM Generator 0 + IntDefaultHandler, // PWM Generator 1 + IntDefaultHandler, // PWM Generator 2 + IntDefaultHandler, // Quadrature Encoder 0 + IntDefaultHandler, // ADC Sequence 0 + IntDefaultHandler, // ADC Sequence 1 + IntDefaultHandler, // ADC Sequence 2 + IntDefaultHandler, // ADC Sequence 3 + IntDefaultHandler, // Watchdog timer + IntDefaultHandler, // Timer 0 subtimer A + IntDefaultHandler, // Timer 0 subtimer B + IntDefaultHandler, // Timer 1 subtimer A + IntDefaultHandler, // Timer 1 subtimer B + IntDefaultHandler, // Timer 2 subtimer A + IntDefaultHandler, // Timer 2 subtimer B + IntDefaultHandler, // Analog Comparator 0 + IntDefaultHandler, // Analog Comparator 1 + IntDefaultHandler, // Analog Comparator 2 + IntDefaultHandler, // System Control (PLL, OSC, BO) + IntDefaultHandler, // FLASH Control + IntDefaultHandler, // GPIO Port F + IntDefaultHandler, // GPIO Port G + IntDefaultHandler, // GPIO Port H + IntDefaultHandler, // UART2 Rx and Tx + IntDefaultHandler, // SSI1 Rx and Tx + IntDefaultHandler, // Timer 3 subtimer A + IntDefaultHandler, // Timer 3 subtimer B + IntDefaultHandler, // I2C1 Master and Slave + IntDefaultHandler, // Quadrature Encoder 1 + IntDefaultHandler, // CAN0 + IntDefaultHandler, // CAN1 + IntDefaultHandler, // CAN2 + IntDefaultHandler, // Ethernet + IntDefaultHandler, // Hibernate + IntDefaultHandler, // USB0 + IntDefaultHandler, // PWM Generator 3 + IntDefaultHandler, // uDMA Software Transfer + IntDefaultHandler, // uDMA Error + IntDefaultHandler, // ADC1 Sequence 0 + IntDefaultHandler, // ADC1 Sequence 1 + IntDefaultHandler, // ADC1 Sequence 2 + IntDefaultHandler, // ADC1 Sequence 3 + IntDefaultHandler, // I2S0 + IntDefaultHandler, // External Bus Interface 0 + IntDefaultHandler, // GPIO Port J + IntDefaultHandler, // GPIO Port K + IntDefaultHandler, // GPIO Port L + IntDefaultHandler, // SSI2 Rx and Tx + IntDefaultHandler, // SSI3 Rx and Tx + IntDefaultHandler, // UART3 Rx and Tx + IntDefaultHandler, // UART4 Rx and Tx + IntDefaultHandler, // UART5 Rx and Tx + IntDefaultHandler, // UART6 Rx and Tx + IntDefaultHandler, // UART7 Rx and Tx + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // I2C2 Master and Slave + IntDefaultHandler, // I2C3 Master and Slave + IntDefaultHandler, // Timer 4 subtimer A + IntDefaultHandler, // Timer 4 subtimer B + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // Timer 5 subtimer A + IntDefaultHandler, // Timer 5 subtimer B + IntDefaultHandler, // Wide Timer 0 subtimer A + IntDefaultHandler, // Wide Timer 0 subtimer B + IntDefaultHandler, // Wide Timer 1 subtimer A + IntDefaultHandler, // Wide Timer 1 subtimer B + IntDefaultHandler, // Wide Timer 2 subtimer A + IntDefaultHandler, // Wide Timer 2 subtimer B + IntDefaultHandler, // Wide Timer 3 subtimer A + IntDefaultHandler, // Wide Timer 3 subtimer B + IntDefaultHandler, // Wide Timer 4 subtimer A + IntDefaultHandler, // Wide Timer 4 subtimer B + IntDefaultHandler, // Wide Timer 5 subtimer A + IntDefaultHandler, // Wide Timer 5 subtimer B + IntDefaultHandler, // FPU + IntDefaultHandler, // PECI 0 + IntDefaultHandler, // LPC 0 + IntDefaultHandler, // I2C4 Master and Slave + IntDefaultHandler, // I2C5 Master and Slave + IntDefaultHandler, // GPIO Port M + IntDefaultHandler, // GPIO Port N + IntDefaultHandler, // Quadrature Encoder 2 + IntDefaultHandler, // Fan 0 + 0, // Reserved + IntDefaultHandler, // GPIO Port P (Summary or P0) + IntDefaultHandler, // GPIO Port P1 + IntDefaultHandler, // GPIO Port P2 + IntDefaultHandler, // GPIO Port P3 + IntDefaultHandler, // GPIO Port P4 + IntDefaultHandler, // GPIO Port P5 + IntDefaultHandler, // GPIO Port P6 + IntDefaultHandler, // GPIO Port P7 + IntDefaultHandler, // GPIO Port Q (Summary or Q0) + IntDefaultHandler, // GPIO Port Q1 + IntDefaultHandler, // GPIO Port Q2 + IntDefaultHandler, // GPIO Port Q3 + IntDefaultHandler, // GPIO Port Q4 + IntDefaultHandler, // GPIO Port Q5 + IntDefaultHandler, // GPIO Port Q6 + IntDefaultHandler, // GPIO Port Q7 + IntDefaultHandler, // GPIO Port R + IntDefaultHandler, // GPIO Port S + IntDefaultHandler, // PWM 1 Generator 0 + IntDefaultHandler, // PWM 1 Generator 1 + IntDefaultHandler, // PWM 1 Generator 2 + IntDefaultHandler, // PWM 1 Generator 3 + IntDefaultHandler // PWM 1 Fault +}; + +//***************************************************************************** +// +// This is the code that gets called when the processor first starts execution +// following a reset event. Only the absolutely necessary set is performed, +// after which the application supplied entry() routine is called. Any fancy +// actions (such as making decisions based on the reset cause register, and +// resetting the bits in that register) are left solely in the hands of the +// application. +// +//***************************************************************************** +void +ResetISR(void) +{ + // + // Enable the floating-point unit. This must be done here to handle the + // case where main() uses floating-point and the function prologue saves + // floating-point registers (which will fault if floating-point is not + // enabled). Any configuration of the floating-point unit using DriverLib + // APIs must be done here prior to the floating-point unit being enabled. + // + // Note that this does not use DriverLib since it might not be included in + // this project. + // + HWREG(NVIC_CPAC) = ((HWREG(NVIC_CPAC) & + ~(NVIC_CPAC_CP10_M | NVIC_CPAC_CP11_M)) | + NVIC_CPAC_CP10_FULL | NVIC_CPAC_CP11_FULL); + + // + // Call the application's entry point. + // + __iar_program_start(); +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a NMI. This +// simply enters an infinite loop, preserving the system state for examination +// by a debugger. +// +//***************************************************************************** +static void +NmiSR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a fault +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +FaultISR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives an unexpected +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +IntDefaultHandler(void) +{ + // + // Go into an infinite loop. + // + while(1) + { + } +} diff --git a/boards/ek-lm4f120xl-boost-capsense/capsense/startup_gcc.c b/boards/ek-lm4f120xl-boost-capsense/capsense/startup_gcc.c new file mode 100644 index 0000000..4c64cd2 --- /dev/null +++ b/boards/ek-lm4f120xl-boost-capsense/capsense/startup_gcc.c @@ -0,0 +1,341 @@ +//***************************************************************************** +// +// startup_gcc.c - Startup code for use with GNU tools. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +#include "inc/hw_nvic.h" +#include "inc/hw_types.h" + +//***************************************************************************** +// +// Forward declaration of the default fault handlers. +// +//***************************************************************************** +void ResetISR(void); +static void NmiSR(void); +static void FaultISR(void); +static void IntDefaultHandler(void); + +//***************************************************************************** +// +// The entry point for the application. +// +//***************************************************************************** +extern int main(void); + +//***************************************************************************** +// +// Reserve space for the system stack. +// +//***************************************************************************** +static unsigned long pulStack[128]; + +//***************************************************************************** +// +// The vector table. Note that the proper constructs must be placed on this to +// ensure that it ends up at physical address 0x0000.0000. +// +//***************************************************************************** +__attribute__ ((section(".isr_vector"))) +void (* const g_pfnVectors[])(void) = +{ + (void (*)(void))((unsigned long)pulStack + sizeof(pulStack)), + // The initial stack pointer + ResetISR, // The reset handler + NmiSR, // The NMI handler + FaultISR, // The hard fault handler + IntDefaultHandler, // The MPU fault handler + IntDefaultHandler, // The bus fault handler + IntDefaultHandler, // The usage fault handler + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // SVCall handler + IntDefaultHandler, // Debug monitor handler + 0, // Reserved + IntDefaultHandler, // The PendSV handler + IntDefaultHandler, // The SysTick handler + IntDefaultHandler, // GPIO Port A + IntDefaultHandler, // GPIO Port B + IntDefaultHandler, // GPIO Port C + IntDefaultHandler, // GPIO Port D + IntDefaultHandler, // GPIO Port E + IntDefaultHandler, // UART0 Rx and Tx + IntDefaultHandler, // UART1 Rx and Tx + IntDefaultHandler, // SSI0 Rx and Tx + IntDefaultHandler, // I2C0 Master and Slave + IntDefaultHandler, // PWM Fault + IntDefaultHandler, // PWM Generator 0 + IntDefaultHandler, // PWM Generator 1 + IntDefaultHandler, // PWM Generator 2 + IntDefaultHandler, // Quadrature Encoder 0 + IntDefaultHandler, // ADC Sequence 0 + IntDefaultHandler, // ADC Sequence 1 + IntDefaultHandler, // ADC Sequence 2 + IntDefaultHandler, // ADC Sequence 3 + IntDefaultHandler, // Watchdog timer + IntDefaultHandler, // Timer 0 subtimer A + IntDefaultHandler, // Timer 0 subtimer B + IntDefaultHandler, // Timer 1 subtimer A + IntDefaultHandler, // Timer 1 subtimer B + IntDefaultHandler, // Timer 2 subtimer A + IntDefaultHandler, // Timer 2 subtimer B + IntDefaultHandler, // Analog Comparator 0 + IntDefaultHandler, // Analog Comparator 1 + IntDefaultHandler, // Analog Comparator 2 + IntDefaultHandler, // System Control (PLL, OSC, BO) + IntDefaultHandler, // FLASH Control + IntDefaultHandler, // GPIO Port F + IntDefaultHandler, // GPIO Port G + IntDefaultHandler, // GPIO Port H + IntDefaultHandler, // UART2 Rx and Tx + IntDefaultHandler, // SSI1 Rx and Tx + IntDefaultHandler, // Timer 3 subtimer A + IntDefaultHandler, // Timer 3 subtimer B + IntDefaultHandler, // I2C1 Master and Slave + IntDefaultHandler, // Quadrature Encoder 1 + IntDefaultHandler, // CAN0 + IntDefaultHandler, // CAN1 + IntDefaultHandler, // CAN2 + IntDefaultHandler, // Ethernet + IntDefaultHandler, // Hibernate + IntDefaultHandler, // USB0 + IntDefaultHandler, // PWM Generator 3 + IntDefaultHandler, // uDMA Software Transfer + IntDefaultHandler, // uDMA Error + IntDefaultHandler, // ADC1 Sequence 0 + IntDefaultHandler, // ADC1 Sequence 1 + IntDefaultHandler, // ADC1 Sequence 2 + IntDefaultHandler, // ADC1 Sequence 3 + IntDefaultHandler, // I2S0 + IntDefaultHandler, // External Bus Interface 0 + IntDefaultHandler, // GPIO Port J + IntDefaultHandler, // GPIO Port K + IntDefaultHandler, // GPIO Port L + IntDefaultHandler, // SSI2 Rx and Tx + IntDefaultHandler, // SSI3 Rx and Tx + IntDefaultHandler, // UART3 Rx and Tx + IntDefaultHandler, // UART4 Rx and Tx + IntDefaultHandler, // UART5 Rx and Tx + IntDefaultHandler, // UART6 Rx and Tx + IntDefaultHandler, // UART7 Rx and Tx + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // I2C2 Master and Slave + IntDefaultHandler, // I2C3 Master and Slave + IntDefaultHandler, // Timer 4 subtimer A + IntDefaultHandler, // Timer 4 subtimer B + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // Timer 5 subtimer A + IntDefaultHandler, // Timer 5 subtimer B + IntDefaultHandler, // Wide Timer 0 subtimer A + IntDefaultHandler, // Wide Timer 0 subtimer B + IntDefaultHandler, // Wide Timer 1 subtimer A + IntDefaultHandler, // Wide Timer 1 subtimer B + IntDefaultHandler, // Wide Timer 2 subtimer A + IntDefaultHandler, // Wide Timer 2 subtimer B + IntDefaultHandler, // Wide Timer 3 subtimer A + IntDefaultHandler, // Wide Timer 3 subtimer B + IntDefaultHandler, // Wide Timer 4 subtimer A + IntDefaultHandler, // Wide Timer 4 subtimer B + IntDefaultHandler, // Wide Timer 5 subtimer A + IntDefaultHandler, // Wide Timer 5 subtimer B + IntDefaultHandler, // FPU + IntDefaultHandler, // PECI 0 + IntDefaultHandler, // LPC 0 + IntDefaultHandler, // I2C4 Master and Slave + IntDefaultHandler, // I2C5 Master and Slave + IntDefaultHandler, // GPIO Port M + IntDefaultHandler, // GPIO Port N + IntDefaultHandler, // Quadrature Encoder 2 + IntDefaultHandler, // Fan 0 + 0, // Reserved + IntDefaultHandler, // GPIO Port P (Summary or P0) + IntDefaultHandler, // GPIO Port P1 + IntDefaultHandler, // GPIO Port P2 + IntDefaultHandler, // GPIO Port P3 + IntDefaultHandler, // GPIO Port P4 + IntDefaultHandler, // GPIO Port P5 + IntDefaultHandler, // GPIO Port P6 + IntDefaultHandler, // GPIO Port P7 + IntDefaultHandler, // GPIO Port Q (Summary or Q0) + IntDefaultHandler, // GPIO Port Q1 + IntDefaultHandler, // GPIO Port Q2 + IntDefaultHandler, // GPIO Port Q3 + IntDefaultHandler, // GPIO Port Q4 + IntDefaultHandler, // GPIO Port Q5 + IntDefaultHandler, // GPIO Port Q6 + IntDefaultHandler, // GPIO Port Q7 + IntDefaultHandler, // GPIO Port R + IntDefaultHandler, // GPIO Port S + IntDefaultHandler, // PWM 1 Generator 0 + IntDefaultHandler, // PWM 1 Generator 1 + IntDefaultHandler, // PWM 1 Generator 2 + IntDefaultHandler, // PWM 1 Generator 3 + IntDefaultHandler // PWM 1 Fault +}; + +//***************************************************************************** +// +// The following are constructs created by the linker, indicating where the +// the "data" and "bss" segments reside in memory. The initializers for the +// for the "data" segment resides immediately following the "text" segment. +// +//***************************************************************************** +extern unsigned long _etext; +extern unsigned long _data; +extern unsigned long _edata; +extern unsigned long _bss; +extern unsigned long _ebss; + +//***************************************************************************** +// +// This is the code that gets called when the processor first starts execution +// following a reset event. Only the absolutely necessary set is performed, +// after which the application supplied entry() routine is called. Any fancy +// actions (such as making decisions based on the reset cause register, and +// resetting the bits in that register) are left solely in the hands of the +// application. +// +//***************************************************************************** +void +ResetISR(void) +{ + unsigned long *pulSrc, *pulDest; + + // + // Copy the data segment initializers from flash to SRAM. + // + pulSrc = &_etext; + for(pulDest = &_data; pulDest < &_edata; ) + { + *pulDest++ = *pulSrc++; + } + + // + // Zero fill the bss segment. + // + __asm(" ldr r0, =_bss\n" + " ldr r1, =_ebss\n" + " mov r2, #0\n" + " .thumb_func\n" + "zero_loop:\n" + " cmp r0, r1\n" + " it lt\n" + " strlt r2, [r0], #4\n" + " blt zero_loop"); + + // + // Enable the floating-point unit. This must be done here to handle the + // case where main() uses floating-point and the function prologue saves + // floating-point registers (which will fault if floating-point is not + // enabled). Any configuration of the floating-point unit using DriverLib + // APIs must be done here prior to the floating-point unit being enabled. + // + // Note that this does not use DriverLib since it might not be included in + // this project. + // + HWREG(NVIC_CPAC) = ((HWREG(NVIC_CPAC) & + ~(NVIC_CPAC_CP10_M | NVIC_CPAC_CP11_M)) | + NVIC_CPAC_CP10_FULL | NVIC_CPAC_CP11_FULL); + + // + // Call the application's entry point. + // + main(); +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a NMI. This +// simply enters an infinite loop, preserving the system state for examination +// by a debugger. +// +//***************************************************************************** +static void +NmiSR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a fault +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +FaultISR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives an unexpected +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +IntDefaultHandler(void) +{ + // + // Go into an infinite loop. + // + while(1) + { + } +} diff --git a/boards/ek-lm4f120xl-boost-capsense/capsense/startup_rvmdk.S b/boards/ek-lm4f120xl-boost-capsense/capsense/startup_rvmdk.S new file mode 100644 index 0000000..5de7fdc --- /dev/null +++ b/boards/ek-lm4f120xl-boost-capsense/capsense/startup_rvmdk.S @@ -0,0 +1,351 @@ +; <<< Use Configuration Wizard in Context Menu >>> +;****************************************************************************** +; +; startup_rvmdk.S - Startup code for use with Keil's uVision. +; +; Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +; Software License Agreement +; +; Texas Instruments (TI) is supplying this software for use solely and +; exclusively on TI's microcontroller products. The software is owned by +; TI and/or its suppliers, and is protected under applicable copyright +; laws. You may not combine this software with "viral" open-source +; software in order to form a larger program. +; +; THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +; NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +; NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +; A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +; CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +; DAMAGES, FOR ANY REASON WHATSOEVER. +; +; This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +; +;****************************************************************************** + +;****************************************************************************** +; +; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +; +;****************************************************************************** +Stack EQU 0x00000200 + +;****************************************************************************** +; +; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> +; +;****************************************************************************** +Heap EQU 0x00000000 + +;****************************************************************************** +; +; Allocate space for the stack. +; +;****************************************************************************** + AREA STACK, NOINIT, READWRITE, ALIGN=3 +StackMem + SPACE Stack +__initial_sp + +;****************************************************************************** +; +; Allocate space for the heap. +; +;****************************************************************************** + AREA HEAP, NOINIT, READWRITE, ALIGN=3 +__heap_base +HeapMem + SPACE Heap +__heap_limit + +;****************************************************************************** +; +; Indicate that the code in this file preserves 8-byte alignment of the stack. +; +;****************************************************************************** + PRESERVE8 + +;****************************************************************************** +; +; Place code into the reset code section. +; +;****************************************************************************** + AREA RESET, CODE, READONLY + THUMB + +;****************************************************************************** +; +; The vector table. +; +;****************************************************************************** + EXPORT __Vectors +__Vectors + DCD StackMem + Stack ; Top of Stack + DCD Reset_Handler ; Reset Handler + DCD NmiSR ; NMI Handler + DCD FaultISR ; Hard Fault Handler + DCD IntDefaultHandler ; The MPU fault handler + DCD IntDefaultHandler ; The bus fault handler + DCD IntDefaultHandler ; The usage fault handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD IntDefaultHandler ; SVCall handler + DCD IntDefaultHandler ; Debug monitor handler + DCD 0 ; Reserved + DCD IntDefaultHandler ; The PendSV handler + DCD IntDefaultHandler ; The SysTick handler + DCD IntDefaultHandler ; GPIO Port A + DCD IntDefaultHandler ; GPIO Port B + DCD IntDefaultHandler ; GPIO Port C + DCD IntDefaultHandler ; GPIO Port D + DCD IntDefaultHandler ; GPIO Port E + DCD IntDefaultHandler ; UART0 Rx and Tx + DCD IntDefaultHandler ; UART1 Rx and Tx + DCD IntDefaultHandler ; SSI0 Rx and Tx + DCD IntDefaultHandler ; I2C0 Master and Slave + DCD IntDefaultHandler ; PWM Fault + DCD IntDefaultHandler ; PWM Generator 0 + DCD IntDefaultHandler ; PWM Generator 1 + DCD IntDefaultHandler ; PWM Generator 2 + DCD IntDefaultHandler ; Quadrature Encoder 0 + DCD IntDefaultHandler ; ADC Sequence 0 + DCD IntDefaultHandler ; ADC Sequence 1 + DCD IntDefaultHandler ; ADC Sequence 2 + DCD IntDefaultHandler ; ADC Sequence 3 + DCD IntDefaultHandler ; Watchdog timer + DCD IntDefaultHandler ; Timer 0 subtimer A + DCD IntDefaultHandler ; Timer 0 subtimer B + DCD IntDefaultHandler ; Timer 1 subtimer A + DCD IntDefaultHandler ; Timer 1 subtimer B + DCD IntDefaultHandler ; Timer 2 subtimer A + DCD IntDefaultHandler ; Timer 2 subtimer B + DCD IntDefaultHandler ; Analog Comparator 0 + DCD IntDefaultHandler ; Analog Comparator 1 + DCD IntDefaultHandler ; Analog Comparator 2 + DCD IntDefaultHandler ; System Control (PLL, OSC, BO) + DCD IntDefaultHandler ; FLASH Control + DCD IntDefaultHandler ; GPIO Port F + DCD IntDefaultHandler ; GPIO Port G + DCD IntDefaultHandler ; GPIO Port H + DCD IntDefaultHandler ; UART2 Rx and Tx + DCD IntDefaultHandler ; SSI1 Rx and Tx + DCD IntDefaultHandler ; Timer 3 subtimer A + DCD IntDefaultHandler ; Timer 3 subtimer B + DCD IntDefaultHandler ; I2C1 Master and Slave + DCD IntDefaultHandler ; Quadrature Encoder 1 + DCD IntDefaultHandler ; CAN0 + DCD IntDefaultHandler ; CAN1 + DCD IntDefaultHandler ; CAN2 + DCD IntDefaultHandler ; Ethernet + DCD IntDefaultHandler ; Hibernate + DCD IntDefaultHandler ; USB0 + DCD IntDefaultHandler ; PWM Generator 3 + DCD IntDefaultHandler ; uDMA Software Transfer + DCD IntDefaultHandler ; uDMA Error + DCD IntDefaultHandler ; ADC1 Sequence 0 + DCD IntDefaultHandler ; ADC1 Sequence 1 + DCD IntDefaultHandler ; ADC1 Sequence 2 + DCD IntDefaultHandler ; ADC1 Sequence 3 + DCD IntDefaultHandler ; I2S0 + DCD IntDefaultHandler ; External Bus Interface 0 + DCD IntDefaultHandler ; GPIO Port J + DCD IntDefaultHandler ; GPIO Port K + DCD IntDefaultHandler ; GPIO Port L + DCD IntDefaultHandler ; SSI2 Rx and Tx + DCD IntDefaultHandler ; SSI3 Rx and Tx + DCD IntDefaultHandler ; UART3 Rx and Tx + DCD IntDefaultHandler ; UART4 Rx and Tx + DCD IntDefaultHandler ; UART5 Rx and Tx + DCD IntDefaultHandler ; UART6 Rx and Tx + DCD IntDefaultHandler ; UART7 Rx and Tx + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD IntDefaultHandler ; I2C2 Master and Slave + DCD IntDefaultHandler ; I2C3 Master and Slave + DCD IntDefaultHandler ; Timer 4 subtimer A + DCD IntDefaultHandler ; Timer 4 subtimer B + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD IntDefaultHandler ; Timer 5 subtimer A + DCD IntDefaultHandler ; Timer 5 subtimer B + DCD IntDefaultHandler ; Wide Timer 0 subtimer A + DCD IntDefaultHandler ; Wide Timer 0 subtimer B + DCD IntDefaultHandler ; Wide Timer 1 subtimer A + DCD IntDefaultHandler ; Wide Timer 1 subtimer B + DCD IntDefaultHandler ; Wide Timer 2 subtimer A + DCD IntDefaultHandler ; Wide Timer 2 subtimer B + DCD IntDefaultHandler ; Wide Timer 3 subtimer A + DCD IntDefaultHandler ; Wide Timer 3 subtimer B + DCD IntDefaultHandler ; Wide Timer 4 subtimer A + DCD IntDefaultHandler ; Wide Timer 4 subtimer B + DCD IntDefaultHandler ; Wide Timer 5 subtimer A + DCD IntDefaultHandler ; Wide Timer 5 subtimer B + DCD IntDefaultHandler ; FPU + DCD IntDefaultHandler ; PECI 0 + DCD IntDefaultHandler ; LPC 0 + DCD IntDefaultHandler ; I2C4 Master and Slave + DCD IntDefaultHandler ; I2C5 Master and Slave + DCD IntDefaultHandler ; GPIO Port M + DCD IntDefaultHandler ; GPIO Port N + DCD IntDefaultHandler ; Quadrature Encoder 2 + DCD IntDefaultHandler ; Fan 0 + DCD 0 ; Reserved + DCD IntDefaultHandler ; GPIO Port P (Summary or P0) + DCD IntDefaultHandler ; GPIO Port P1 + DCD IntDefaultHandler ; GPIO Port P2 + DCD IntDefaultHandler ; GPIO Port P3 + DCD IntDefaultHandler ; GPIO Port P4 + DCD IntDefaultHandler ; GPIO Port P5 + DCD IntDefaultHandler ; GPIO Port P6 + DCD IntDefaultHandler ; GPIO Port P7 + DCD IntDefaultHandler ; GPIO Port Q (Summary or Q0) + DCD IntDefaultHandler ; GPIO Port Q1 + DCD IntDefaultHandler ; GPIO Port Q2 + DCD IntDefaultHandler ; GPIO Port Q3 + DCD IntDefaultHandler ; GPIO Port Q4 + DCD IntDefaultHandler ; GPIO Port Q5 + DCD IntDefaultHandler ; GPIO Port Q6 + DCD IntDefaultHandler ; GPIO Port Q7 + DCD IntDefaultHandler ; GPIO Port R + DCD IntDefaultHandler ; GPIO Port S + DCD IntDefaultHandler ; PWM 1 Generator 0 + DCD IntDefaultHandler ; PWM 1 Generator 1 + DCD IntDefaultHandler ; PWM 1 Generator 2 + DCD IntDefaultHandler ; PWM 1 Generator 3 + DCD IntDefaultHandler ; PWM 1 Fault + +;****************************************************************************** +; +; This is the code that gets called when the processor first starts execution +; following a reset event. +; +;****************************************************************************** + EXPORT Reset_Handler +Reset_Handler + ; + ; Enable the floating-point unit. This must be done here to handle the + ; case where main() uses floating-point and the function prologue saves + ; floating-point registers (which will fault if floating-point is not + ; enabled). Any configuration of the floating-point unit using + ; DriverLib APIs must be done here prior to the floating-point unit + ; being enabled. + ; + ; Note that this does not use DriverLib since it might not be included + ; in this project. + ; + MOVW R0, #0xED88 + MOVT R0, #0xE000 + LDR R1, [R0] + ORR R1, #0x00F00000 + STR R1, [R0] + + ; + ; Call the C library enty point that handles startup. This will copy + ; the .data section initializers from flash to SRAM and zero fill the + ; .bss section. + ; + IMPORT __main + B __main + +;****************************************************************************** +; +; This is the code that gets called when the processor receives a NMI. This +; simply enters an infinite loop, preserving the system state for examination +; by a debugger. +; +;****************************************************************************** +NmiSR + B NmiSR + +;****************************************************************************** +; +; This is the code that gets called when the processor receives a fault +; interrupt. This simply enters an infinite loop, preserving the system state +; for examination by a debugger. +; +;****************************************************************************** +FaultISR + B FaultISR + +;****************************************************************************** +; +; This is the code that gets called when the processor receives an unexpected +; interrupt. This simply enters an infinite loop, preserving the system state +; for examination by a debugger. +; +;****************************************************************************** +IntDefaultHandler + B IntDefaultHandler + +;****************************************************************************** +; +; Make sure the end of this section is aligned. +; +;****************************************************************************** + ALIGN + +;****************************************************************************** +; +; Some code in the normal code section for initializing the heap and stack. +; +;****************************************************************************** + AREA |.text|, CODE, READONLY + +;****************************************************************************** +; +; The function expected of the C library startup code for defining the stack +; and heap memory locations. For the C library version of the startup code, +; provide this function so that the C library initialization code can find out +; the location of the stack and heap. +; +;****************************************************************************** + IF :DEF: __MICROLIB + EXPORT __initial_sp + EXPORT __heap_base + EXPORT __heap_limit + ELSE + IMPORT __use_two_region_memory + EXPORT __user_initial_stackheap +__user_initial_stackheap + LDR R0, =HeapMem + LDR R1, =(StackMem + Stack) + LDR R2, =(HeapMem + Heap) + LDR R3, =StackMem + BX LR + ENDIF + +;****************************************************************************** +; +; Make sure the end of this section is aligned. +; +;****************************************************************************** + ALIGN + +;****************************************************************************** +; +; Tell the assembler that we're done. +; +;****************************************************************************** + END diff --git a/boards/ek-lm4f120xl-boost-capsense/capsense/startup_sourcerygxx.S b/boards/ek-lm4f120xl-boost-capsense/capsense/startup_sourcerygxx.S new file mode 100644 index 0000000..b720839 --- /dev/null +++ b/boards/ek-lm4f120xl-boost-capsense/capsense/startup_sourcerygxx.S @@ -0,0 +1,75 @@ +//***************************************************************************** +// +// startup_sourcerygxx.S - Startup code for Sourcery CodeBench. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + + .syntax unified + .thumb + +//***************************************************************************** +// +// Place this code into the .cs3.reset section so that it can be executed prior +// to the startup code in Sourcery CodeBench. +// +//***************************************************************************** + .section .cs3.reset,"x" + +//***************************************************************************** +// +// The reset handler, which overrides the one provided by CS3. +// +//***************************************************************************** + .globl __cs3_reset + .thumb_func +__cs3_reset: + // + // Enable the floating-point unit. This must be done here to handle the + // case where main() uses floating-point and the function prologue saves + // floating-point registers (which will fault if floating-point is not + // enabled). Any configuration of the floating-point unit using DriverLib + // APIs must be done here prior to the floating-point unit being enabled. + // + // Note that this does not use DriverLib since it might not be included in + // this project. + // + movw r0, #0xed88 + movt r0, #0xe000 + ldr r1, [r0] + orr r1, #0x00f00000 + str r1, [r0] + + // + // Branch to the normal CS3 startup code. + // + .extern __cs3_reset_ekc_lm4f232 + ldr r0, =__cs3_reset_ekc_lm4f232 + bx r0 + + // + // Place the literal pool here. + // + .ltorg + + // + // The end of the file. + // + .end diff --git a/boards/ek-lm4f120xl-boost-capsense/drivers/CTS_HAL.c b/boards/ek-lm4f120xl-boost-capsense/drivers/CTS_HAL.c new file mode 100644 index 0000000..5ad0720 --- /dev/null +++ b/boards/ek-lm4f120xl-boost-capsense/drivers/CTS_HAL.c @@ -0,0 +1,140 @@ +//***************************************************************************** +// +// CTS_HAL.c - Capacative Sense Library Hardware Abstraction Layer. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +#include "inc/hw_types.h" +#include "inc/hw_gpio.h" +#include "inc/hw_memmap.h" +#include "inc/hw_nvic.h" +#include "drivers/CTS_structure.h" +#include "drivers/CTS_HAL.h" + +//***************************************************************************** +// +// Function to get a capacitance reading from a single-pin RC-based capacitive +// sensor. This function assumes that the capacitive sensor is charged by a +// GPIO, and then discharged through a resistor to GND. The same GPIO used to +// perform the charging will be used as an input during discharge to sense when +// the capacitor's voltage has decreased to at least VIL. The function will +// execute several cycles of this, and report how long the process took in +// units of SysTick counts. This count should be proportional to the current +// capacitance of the sensor, and the resistance of the discharge resistor. +// +//***************************************************************************** +void +CapSenseSystickRC(const tSensor *group, unsigned long *counts) +{ + unsigned char ucIndex; + + // + // Run an RC based capacitance measurement routine on each element in the + // sensor array. + // + for(ucIndex = 0; ucIndex < (group->ucNumElements); ucIndex++) + { + // + // Reset Systick to zero (probably not necessary for most cases, but we + // want to make sure that Systick doesn't roll over.) + // + HWREG(NVIC_ST_CURRENT) = 0x0; + + // + // Grab a count number from the capacitive sensor element. + // + counts[ucIndex] = + CapSenseElementSystickRC(group->Element[ucIndex]->ulGPIOPort, + group->Element[ucIndex]->ulGPIOPin, + group->ulNumSamples); + + } +} + +//***************************************************************************** +// +// +// +// +//***************************************************************************** +unsigned long +CapSenseElementSystickRC(unsigned long ulGPIOPort, unsigned long ulGPIOPin, + unsigned long ulNumSamples) +{ + volatile unsigned long ulStartTime; + volatile unsigned long ulEndTime; + unsigned long ulIndex; + unsigned long ulGPIODataReg; + unsigned long ulGPIODirReg; + + // + // Save off our GPIO information. + // + ulGPIODataReg = (ulGPIOPort + (GPIO_O_DATA + (ulGPIOPin << 2))); + ulGPIODirReg = ulGPIOPort + GPIO_O_DIR; + + // + // Grab the time + // + ulStartTime = HWREG(NVIC_ST_CURRENT); + + // + // Loop until we have the requisite number of samples. + // + for(ulIndex = 0; ulIndex < ulNumSamples; ulIndex++) + { + // + // Drive up. + // + //GPIOPinWrite(ulGPIOPort, ulGPIOPin, ulGPIOPin); + HWREG(ulGPIODataReg) = 0xFF; + + // + // Configure as input + // + //GPIOPinTypeGPIOInput(ulGPIOPort, ulGPIOPin); + HWREG(ulGPIODirReg) = (HWREG(ulGPIODirReg) & ~(ulGPIOPin)); + + // + // Wait until the capacitor drains away to ground + // + //while(GPIOPinRead(ulGPIOPort, ulGPIOPin)) + while(HWREG(ulGPIODataReg)) + { + } + + // + // Configure as an output. + // + //GPIOPinTypeGPIOOutput(ulGPIOPort, ulGPIOPin); + HWREG(ulGPIODirReg) = (HWREG(ulGPIODirReg) | ulGPIOPin); + } + + // + // Grab the time, and calculate the difference + // + ulEndTime = HWREG(NVIC_ST_CURRENT); + + // + // Return the time difference + // + return(ulStartTime - ulEndTime); +} diff --git a/boards/ek-lm4f120xl-boost-capsense/drivers/CTS_HAL.h b/boards/ek-lm4f120xl-boost-capsense/drivers/CTS_HAL.h new file mode 100644 index 0000000..40ba534 --- /dev/null +++ b/boards/ek-lm4f120xl-boost-capsense/drivers/CTS_HAL.h @@ -0,0 +1,34 @@ +//***************************************************************************** +// +// CTS_HAL.h - Capacative Sense HAL Header file definitions. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +#ifndef __CTS_HAL_H__ +#define __CTS_HAL_H__ + +extern void CapSenseSystickRC(const tSensor *group, unsigned long *counts); + +extern unsigned long CapSenseElementSystickRC(unsigned long ulGPIOPort, + unsigned long ulGPIOPin, + unsigned long ulNumSamples); + +#endif // __CTS_HAL_H__ diff --git a/boards/ek-lm4f120xl-boost-capsense/drivers/CTS_Layer.c b/boards/ek-lm4f120xl-boost-capsense/drivers/CTS_Layer.c new file mode 100644 index 0000000..c16a0fd --- /dev/null +++ b/boards/ek-lm4f120xl-boost-capsense/drivers/CTS_Layer.c @@ -0,0 +1,663 @@ +//***************************************************************************** +// +// CTS_HAL.c - Capacative Sense Library Hardware Abstraction Layer. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +#include "drivers/CTS_structure.h" +#include "drivers/CTS_Layer.h" +#define RAM_FOR_FLASH + +// Global variables for sensing +#ifdef TOTAL_NUMBER_OF_ELEMENTS +unsigned long baseCnt[TOTAL_NUMBER_OF_ELEMENTS]; +#ifdef RAM_FOR_FLASH +unsigned long measCnt[MAXIMUM_NUMBER_OF_ELEMENTS_PER_SENSOR]; +#endif +unsigned long ctsStatusReg = (DOI_INC+TRADOI_FAST+TRIDOI_SLOW); +#endif + +//***************************************************************************** +// +//! \addtogroup CTS_API +//! @{ +// +//***************************************************************************** + + +//***************************************************************************** +// +//! Measure the capacitance of each element within the Sensor +//! +//! \param groupOfElements Pointer to Sensor structure to be measured +//! +//! \param counts Address to where the measurements are to be written +//! +//! This function selects the appropriate HAL to perform the capacitance +//! measurement based upon the halDefinition found in the sensor structure. +//! The order of the elements within the Sensor structure is arbitrary but must +//! be consistent between the application and configuration. The first element +//! in the array (counts) corresponds to the first element within the Sensor +//! structure. +//! +//! \return None. +// +//***************************************************************************** +void +TI_CAPT_Raw(const tSensor* groupOfElements, unsigned long * counts) +{ + CapSenseSystickRC(groupOfElements, counts); +} + +#ifdef TOTAL_NUMBER_OF_ELEMENTS + + +//***************************************************************************** +// +//! Make a single capacitance meausrment to initialize baseline tracking +//! +//! \param groupOfElements Pointer to Sensor structure to be measured +//! +//! \return none +// +//***************************************************************************** +void +TI_CAPT_Init_Baseline(const tSensor* groupOfElements) +{ + TI_CAPT_Raw(groupOfElements, &baseCnt[groupOfElements->ulBaseOffset]); +} + +//***************************************************************************** +// +//! Update baseline tracking by averaging several measurements +//! +//! \param groupOfElements Pointer to Sensor structure to be measured +//! +//! \param numberOfAverages Number of measurements to be averaged +//! +//! \return none +// +//***************************************************************************** +void +TI_CAPT_Update_Baseline(const tSensor* groupOfElements, unsigned char numberOfAverages) +{ + unsigned char i,j; + #ifndef RAM_FOR_FLASH + unsigned long *measCnt; + measCnt = (unsigned long *)malloc(groupOfElements->ucNumElements * sizeof(unsigned long)); + if(measCnt ==0) + { + while(1); + } + #endif + for(j=0; j < numberOfAverages; j++) + { + for(i=0; i < groupOfElements->ucNumElements; i++) + { + TI_CAPT_Raw(groupOfElements, measCnt); + baseCnt[i+groupOfElements->ulBaseOffset] = measCnt[i]/2 + baseCnt[i+groupOfElements->ulBaseOffset]/2; + } + } + #ifndef RAM_FOR_FLASH + free(measCnt); + #endif +} + +//***************************************************************************** +//! Reset the Baseline Tracking algorithm to the default state +//! +//! \return none +// +//***************************************************************************** +void +TI_CAPT_Reset_Tracking(void) +{ + ctsStatusReg = (DOI_INC+TRADOI_FAST+TRIDOI_SLOW); +} + +//***************************************************************************** +// +//! Update the Baseline Tracking algorithm Direction of Interest +//! +//! \param direction Direction of increasing or decreasing capacitance +//! +//! \return none +// +//***************************************************************************** +void +TI_CAPT_Update_Tracking_DOI(unsigned char direction) +{ + if(direction) + { + ctsStatusReg |= DOI_INC; + } + else + { + ctsStatusReg &= ~DOI_INC; + } +} + +//***************************************************************************** +// +//! Update the baseling tracking algorithm tracking rates +//! +//! \param rate Rate of tracking changes in and against direction of intrest +//! +//! \return none +// +//***************************************************************************** +void +TI_CAPT_Update_Tracking_Rate(unsigned char rate) +{ + ctsStatusReg &= ~(TRIDOI_FAST+TRADOI_VSLOW); // clear fields + ctsStatusReg |= (rate & 0xF0); // update fields +} + +//***************************************************************************** +// +//! Measure the change in capacitance of the Sensor +//! +//! \param groupOfElements Pointer to Sensor structure to be measured +//! +//! \param deltaCnt Address to where the measurements are to be written +//! +//! This function measures the change in capacitance of each element within a +//! sensor and updates the baseline tracking in the event that no change +//! exceeds the detection threshold. The order of the elements within the +//! Sensor structure is arbitrary but must be consistent between the +//! application and configuration. The first element in the array (deltaCnt) +//! corresponds to the first element within the Sensor structure. +//! +//! \return none +// +//***************************************************************************** +void +TI_CAPT_Custom(const tSensor* groupOfElements, unsigned long * deltaCnt) +{ + unsigned char j; + unsigned long tempCnt; + ctsStatusReg &= ~ EVNT; + + // This section calculates the delta counts************************************* + //****************************************************************************** + TI_CAPT_Raw(groupOfElements, &deltaCnt[0]); // measure group of sensors + + for (j = 0; j < (groupOfElements->ucNumElements); j++) + { + tempCnt = deltaCnt[j]; + if((!(ctsStatusReg & DOI_MASK))) + { + // RO method, interested in an increase in capacitance + if(baseCnt[j+groupOfElements->ulBaseOffset] < deltaCnt[j]) + { + // If capacitance decreases, then measCnt is greater than base + // , set delta to zero + deltaCnt[j] = 0; + // Limit the change in the opposite direction to the threshold + if(((groupOfElements->Element[j])->ulThreshold) + && + (baseCnt[j+groupOfElements->ulBaseOffset]+(groupOfElements->Element[j])->ulThreshold < tempCnt)) + { + tempCnt = baseCnt[j+groupOfElements->ulBaseOffset]+(groupOfElements->Element[j])->ulThreshold; + } + } + else + { + // change occuring in our DOI, save result + deltaCnt[j] = baseCnt[j+groupOfElements->ulBaseOffset]-deltaCnt[j]; + } + } + if(((ctsStatusReg & DOI_MASK))) + { + // RO method: interested in a decrease in capactiance + // measCnt is greater than baseCnt + if(baseCnt[j+groupOfElements->ulBaseOffset] > deltaCnt[j]) + { + // If capacitance increases, set delta to zero + deltaCnt[j] = 0; + // Limit the change in the opposite direction to the threshold + if(((groupOfElements->Element[j])->ulThreshold) + && + (baseCnt[j+groupOfElements->ulBaseOffset] > tempCnt+(groupOfElements->Element[j])->ulThreshold)) + { + tempCnt = baseCnt[j+groupOfElements->ulBaseOffset]-(groupOfElements->Element[j])->ulThreshold; + } + } + else + { + // change occuring in our DOI + deltaCnt[j] = deltaCnt[j] - baseCnt[j+groupOfElements->ulBaseOffset]; + } + } + + // This section updates the baseline capacitance**************************** + //************************************************************************** + if (deltaCnt[j]==0) + { // if delta counts is 0, then the change in capacitance was opposite the + // direction of interest. The baseCnt[i] is updated with the saved + // measCnt value for the current index value 'i'. + switch ((ctsStatusReg & TRADOI_VSLOW)) + { + case TRADOI_FAST://Fast + tempCnt = tempCnt/2; + baseCnt[j+groupOfElements->ulBaseOffset] = (baseCnt[j+groupOfElements->ulBaseOffset]/2); + break; + case TRADOI_MED://Medium + tempCnt = tempCnt/4; + baseCnt[j+groupOfElements->ulBaseOffset] = 3*(baseCnt[j+groupOfElements->ulBaseOffset]/4); + break; + case TRADOI_SLOW://slow + tempCnt = tempCnt/64; + baseCnt[j+groupOfElements->ulBaseOffset] = 63*(baseCnt[j+groupOfElements->ulBaseOffset]/64); + break; + case TRADOI_VSLOW://very slow + tempCnt = tempCnt/128; + baseCnt[j+groupOfElements->ulBaseOffset] = 127*(baseCnt[j+groupOfElements->ulBaseOffset]/128); + break; + } + // set X, Y & Z, then perform calculation for baseline tracking: + // Base_Capacitance = X*(Measured_Capacitance/Z) + Y*(Base_Capacitance/Z) + baseCnt[j+groupOfElements->ulBaseOffset] = (tempCnt)+(baseCnt[j+groupOfElements->ulBaseOffset]); + } + // delta counts are either 0, less than threshold, or greater than threshold + // never negative + else if(deltaCnt[j]<(groupOfElements->Element[j])->ulThreshold && !(ctsStatusReg & PAST_EVNT)) + { //if delta counts is positive but less than threshold, + switch ((ctsStatusReg & TRIDOI_FAST)) + { + case TRIDOI_VSLOW://very slow + if(deltaCnt[j] > 15) + { + if(tempCnt < baseCnt[j+groupOfElements->ulBaseOffset]) + { + baseCnt[j+groupOfElements->ulBaseOffset] = baseCnt[j+groupOfElements->ulBaseOffset] - 1; + } + else + { + baseCnt[j+groupOfElements->ulBaseOffset] = baseCnt[j+groupOfElements->ulBaseOffset] + 1; + } + } + tempCnt = 0; + break; + case TRIDOI_SLOW://slow + if(tempCnt < baseCnt[j+groupOfElements->ulBaseOffset]) + { + baseCnt[j+groupOfElements->ulBaseOffset] = baseCnt[j+groupOfElements->ulBaseOffset] - 1; + } + else + { + baseCnt[j+groupOfElements->ulBaseOffset] = baseCnt[j+groupOfElements->ulBaseOffset] + 1; + } + tempCnt = 0; + break; + case TRIDOI_MED://medium + tempCnt = tempCnt/4; + baseCnt[j+groupOfElements->ulBaseOffset] = 3*(baseCnt[j+groupOfElements->ulBaseOffset]/4); + break; + case TRIDOI_FAST://fast + tempCnt = tempCnt/2; + baseCnt[j+groupOfElements->ulBaseOffset] = (baseCnt[j+groupOfElements->ulBaseOffset]/2); + break; + } + // set X, Y & Z, then perform calculation for baseline tracking: + // Base_Capacitance = X*(Measured_Capacitance/Z) + Y*(Base_Capacitance/Z) + baseCnt[j+groupOfElements->ulBaseOffset] = (tempCnt)+(baseCnt[j+groupOfElements->ulBaseOffset]); + } + //if delta counts above the threshold, event has occurred + else if(deltaCnt[j]>=(groupOfElements->Element[j])->ulThreshold) + { + ctsStatusReg |= EVNT; + ctsStatusReg |= PAST_EVNT; + } + }// end of for-loop + if(!(ctsStatusReg & EVNT)) + { + ctsStatusReg &= ~PAST_EVNT; + } +} + +//***************************************************************************** +// +//! Determine if a button is being pressed +//! +//! \param groupOfElements Pointer to button to be scanned +//! +//! \return result Indication if button is (1) or is not (0) being pressed +//! +// +//***************************************************************************** +unsigned char +TI_CAPT_Button(const tSensor * groupOfElements) +{ + unsigned char result = 0; + + #ifndef RAM_FOR_FLASH + unsigned long *measCnt; + measCnt = (unsigned long *)malloc(groupOfElements->ucNumElements * sizeof(unsigned long)); + if(measCnt ==0) + { + while(1); + } + #endif + + TI_CAPT_Custom(groupOfElements, measCnt); + #ifndef RAM_FOR_FLASH + free(measCnt); + #endif + if(ctsStatusReg & EVNT) + { + result = 1; + } + return result; +} + +//***************************************************************************** +// +//! \brief Determine which button if any is being pressed +//! +//! \param groupOfElements Pointer to buttons to be scanned +//! +//! \return result pointer to element (button) being pressed or 0 none +// +//***************************************************************************** +const tCapTouchElement * +TI_CAPT_Buttons(const tSensor *groupOfElements) +{ + unsigned char index; + #ifndef RAM_FOR_FLASH + unsigned long *measCnt; + measCnt = (unsigned long *)malloc(groupOfElements->ucNumElements * sizeof(unsigned long)); + if(measCnt ==0) + { + while(1); + } + #endif + TI_CAPT_Custom(groupOfElements, measCnt); + + if(ctsStatusReg & EVNT) + { + index = Dominant_Element(groupOfElements, measCnt); + //ctsStatusReg &= ~EVNT; + index++; + } + else + { + index = 0; + } + #ifndef RAM_FOR_FLASH + free(measCnt); + #endif + if(index) + { + return groupOfElements->Element[index-1]; + } + return 0; +} + +#ifdef SLIDER +//***************************************************************************** +// +//! Determine the position on a slider +// +//! \param groupOfElements Pointer to slider +// +//! \return result position on slider or illegal value if no touch +// +//***************************************************************************** +unsigned long +TI_CAPT_Slider(const tSensor* groupOfElements) +{ + unsigned char index; + signed long position; + // allocate memory for measurement + #ifndef RAM_FOR_FLASH + unsigned long *measCnt; + measCnt = (unsigned long *)malloc(groupOfElements->ucNumElements * sizeof(unsigned long)); + if(measCnt ==0) + { + while(1); + } + #endif + position = ILLEGAL_SLIDER_WHEEL_POSITION; + //make measurement + TI_CAPT_Custom(groupOfElements, measCnt); + + // Use EVNT flag to determine if slider was touched. + // The EVNT flag is a global variable and managed within the TI_CAPT_Custom function. + if(ctsStatusReg & EVNT) + { + index = Dominant_Element(groupOfElements, &measCnt[0]); + // The index represents the element within the array with the highest return. + if(index == 0) + { + // Special case of 1st element in slider, add 1st, last, and 2nd + position = measCnt[0] + measCnt[1]; + } + else if(index == (groupOfElements->ucNumElements -1)) + { + // Special case of Last element in slider, add last, 1st, and 2nd to last + position = measCnt[groupOfElements->ucNumElements -1] + measCnt[groupOfElements->ucNumElements -2]; + } + else + { + position = measCnt[index] + measCnt[index+1] + measCnt[index-1]; + } + // Determine if sensor threshold criteria is met + if(position > groupOfElements->ulSensorThreshold) + { + // calculate position + position = index*(groupOfElements->ucPoints/groupOfElements->ucNumElements); + position += (groupOfElements->ucPoints/groupOfElements->ucNumElements)/2; + if(index == 0) + { + // Special case of 1st element in slider, which only has one + // neighbor, measCnt[1]. measCnt is limited to ulMaxResponse + // within dominantElement function + if(measCnt[1]) + { + position += (measCnt[1]*(groupOfElements->ucPoints/groupOfElements->ucNumElements))/100; + } + else + { + position = (measCnt[0]*(groupOfElements->ucPoints/groupOfElements->ucNumElements)/2)/100; + } + } + else if(index == (groupOfElements->ucNumElements -1)) + { + // Special case of Last element in slider, which only has one + // neighbor, measCnt[x-1] or measCnt[ucNumElements-1] + if(measCnt[index-1]) + { + position -= (measCnt[index-1]*(groupOfElements->ucPoints/groupOfElements->ucNumElements))/100; + } + else + { + position = groupOfElements->ucPoints; + position -= (measCnt[index]*(groupOfElements->ucPoints/groupOfElements->ucNumElements)/2)/100; + } + } + else + { + position += (measCnt[index+1]*(groupOfElements->ucPoints/groupOfElements->ucNumElements))/100; + position -= (measCnt[index-1]*(groupOfElements->ucPoints/groupOfElements->ucNumElements))/100; + } + if((position > groupOfElements->ucPoints) || (position < 0)) + { + position = ILLEGAL_SLIDER_WHEEL_POSITION; + } + } + else + { + position = ILLEGAL_SLIDER_WHEEL_POSITION; + } + } + #ifndef RAM_FOR_FLASH + free(measCnt); + #endif + return position; +} +#endif + +#ifdef WHEEL +//***************************************************************************** +// +//! Determine the position on a wheel +// +//! \param groupOfElements Pointer to wheel +// +//! \return result position on wheel or illegal value if no touch +// +//***************************************************************************** +unsigned long +TI_CAPT_Wheel(const tSensor* groupOfElements) +{ + unsigned char index; + signed long position; + // allocate memory for measurement + #ifndef RAM_FOR_FLASH + unsigned long *measCnt; + measCnt = (unsigned long *)malloc(groupOfElements->ucNumElements * sizeof(unsigned long)); + if(measCnt ==0) + { + while(1); + } + #endif + position = ILLEGAL_SLIDER_WHEEL_POSITION; + //make measurement + TI_CAPT_Custom(groupOfElements, measCnt); + // Translate the EVNT flag from an element level EVNT to a sensor level EVNT. + // The sensor must read at least 75% cumulative response before indicating a + // touch. + if(ctsStatusReg & EVNT) + { + index = Dominant_Element(groupOfElements, &measCnt[0]); + // The index represents the element within the array with the highest return. + // + if(index == 0) + { + // Special case of 1st element in slider, add 1st, last, and 2nd + position = measCnt[0] + measCnt[groupOfElements->ucNumElements -1] + measCnt[1]; + } + else if(index == (groupOfElements->ucNumElements -1)) + { + // Special case of Last element in slider, add last, 1st, and 2nd to last + position = measCnt[index] + measCnt[0] + measCnt[index-1]; + } + else + { + position = measCnt[index] + measCnt[index+1] + measCnt[index-1]; + } + if(position > groupOfElements->ulSensorThreshold) + { + //index = Dominant_Element(groupOfElements, &measCnt[0]); + // The index represents the element within the array with the highest return. + // + position = index*(groupOfElements->ucPoints/groupOfElements->ucNumElements); + position += (groupOfElements->ucPoints/groupOfElements->ucNumElements)/2; + if(index == 0) + { + // Special case of 1st element in slider, which only has one neighbor, measCnt[1] + // measCnt is limited to ulMaxResponse within dominantElement function + position += (measCnt[1]*(groupOfElements->ucPoints/groupOfElements->ucNumElements))/100; + position -= (measCnt[groupOfElements->ucNumElements -1]*(groupOfElements->ucPoints/groupOfElements->ucNumElements))/100; + if(position < 0) + { + position = position + (unsigned long)groupOfElements->ucPoints; + } + } + else if(index == (groupOfElements->ucNumElements -1)) + { + // Special case of Last element in slider, which only has one neighbor, measCnt[x-1] or measCnt[ucNumElements-1] + // measCnt is limited to ulMaxResponse within dominantElement function + position += (measCnt[0]*(groupOfElements->ucPoints/groupOfElements->ucNumElements))/100; + position -= (measCnt[index-1]*(groupOfElements->ucPoints/groupOfElements->ucNumElements))/100; + if(position > (groupOfElements->ucPoints -1)) + { + position = position - (unsigned long)groupOfElements->ucPoints; + } + } + else + { + position += (measCnt[index+1]*(groupOfElements->ucPoints/groupOfElements->ucNumElements))/100; + position -= (measCnt[index-1]*(groupOfElements->ucPoints/groupOfElements->ucNumElements))/100; + } + if((position > groupOfElements->ucPoints) || position < 0) + { + position = ILLEGAL_SLIDER_WHEEL_POSITION; + } + } + else + { + position = ILLEGAL_SLIDER_WHEEL_POSITION; + } + } + #ifndef RAM_FOR_FLASH + free(measCnt); + #endif + return position; +} +#endif + +//***************************************************************************** +// +// Close the Doxygen group. +//! @} +// +//***************************************************************************** + + +//***************************************************************************** +// +// +//***************************************************************************** +unsigned char +Dominant_Element(const tSensor* groupOfElements, unsigned long* deltaCnt) +{ + unsigned char i; + unsigned long percentDelta=0; + unsigned char dominantElement=0; + for(i=0;iucNumElements;i++) + { + if(deltaCnt[i]>=(groupOfElements->Element[i])->ulThreshold) + { + if(deltaCnt[i] > ((groupOfElements->Element[i])->ulMaxResponse)) + { + deltaCnt[i] = (groupOfElements->Element[i])->ulMaxResponse; + // limit response to the maximum + } + // (ulMaxResponse - threshold) cannot exceed 655 + // 100*(delta - threshold) / (ulMaxResponse - threshold) + deltaCnt[i] = (100*(deltaCnt[i]-(groupOfElements->Element[i])->ulThreshold))/((groupOfElements->Element[i])->ulMaxResponse - (groupOfElements->Element[i])->ulThreshold); + if(deltaCnt[i] > percentDelta) + { + //update percentDelta + percentDelta = deltaCnt[i]; + dominantElement = i; + } + } + else + { + deltaCnt[i] = 0; + } + } // end for loop + return dominantElement; +} +#endif diff --git a/boards/ek-lm4f120xl-boost-capsense/drivers/CTS_Layer.h b/boards/ek-lm4f120xl-boost-capsense/drivers/CTS_Layer.h new file mode 100644 index 0000000..51f54ae --- /dev/null +++ b/boards/ek-lm4f120xl-boost-capsense/drivers/CTS_Layer.h @@ -0,0 +1,64 @@ +//***************************************************************************** +// +// CTS_Layer.h - Capacative Sense API Layer Header file definitions. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +#ifndef __CTS_LAYER_H__ +#define __CTS_LAYER_H__ + +#define EVNT 0x01 +#define DOI_MASK 0x02 +#define DOI_INC 0x02 +#define DOI_DEC 0x00 +#define PAST_EVNT 0x04 +#define TRIDOI_VSLOW 0x00 +#define TRIDOI_SLOW 0x10 +#define TRIDOI_MED 0x20 +#define TRIDOI_FAST 0x30 +#define TRADOI_FAST 0x00 +#define TRADOI_MED 0x40 +#define TRADOI_SLOW 0x80 +#define TRADOI_VSLOW 0xC0 + + + +// API Calls +void TI_CAPT_Init_Baseline(const tSensor*); +void TI_CAPT_Update_Baseline(const tSensor*, unsigned char); + +void TI_CAPT_Reset_Tracking(void); +void TI_CAPT_Update_Tracking_DOI(unsigned char); +void TI_CAPT_Update_Tracking_Rate(unsigned char); + +void TI_CAPT_Raw(const tSensor*, unsigned long*); + +void TI_CAPT_Custom(const tSensor *, unsigned long*); + +unsigned char TI_CAPT_Button(const tSensor *); +const tCapTouchElement * TI_CAPT_Buttons(const tSensor *); +unsigned long TI_CAPT_Slider(const tSensor*); +unsigned long TI_CAPT_Wheel(const tSensor*); + +// Internal Calls +unsigned char Dominant_Element (const tSensor*, unsigned long*); + +#endif // __CTS_LAYER_H__ diff --git a/boards/ek-lm4f120xl-boost-capsense/drivers/CTS_structure.c b/boards/ek-lm4f120xl-boost-capsense/drivers/CTS_structure.c new file mode 100644 index 0000000..db1465e --- /dev/null +++ b/boards/ek-lm4f120xl-boost-capsense/drivers/CTS_structure.c @@ -0,0 +1,131 @@ +//***************************************************************************** +// +// CTS_structure.c - Capacative Sense structures. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +//***************************************************************************** +// +// 4 elements configured as a wheel. +// 1 element configured as a button. [Center Button] +// 1 element configured as a proximity sensor. +// This file contains the structure names and the variable assingments. +// +// Revision 1.00 Baseline +// Developed with IAR 5.10.4 [Kickstart] (5.10.4.30168) +// +// 09/24/10 Rev1.00 Pre-Alpha Version. Added "max_cnts" slider variable in +// CT_Handler object. +// +// 09/29/10 0.02 Update naming convention for elements and sensors. +// +// 10/11/10 0.03 Update +// +//****************************************************************************** + +#include "inc/hw_types.h" +#include "inc/hw_gpio.h" +#include "inc/hw_memmap.h" +#include "driverlib/gpio.h" +#include "drivers/CTS_structure.h" + +// +// Volume down button on PD3 +// +const tCapTouchElement g_sVolumeDownElement = +{ + GPIO_PORTA_AHB_BASE,//ulGPIOPort + GPIO_PIN_7,//ulGPIOPin + 100,//ulThreshold + 2000//ulMaxResponse +}; + +// +// Left button on PD2 +// +const tCapTouchElement g_sLeftElement = +{ + GPIO_PORTA_AHB_BASE,//ulGPIOPort + GPIO_PIN_6,//ulGPIOPin + 100,//ulThreshold + 2000//ulMaxResponse +}; + +// +// Right button on PE3 +// +const tCapTouchElement g_sRightElement = +{ + GPIO_PORTA_AHB_BASE,//ulGPIOPort + GPIO_PIN_2,//ulGPIOPin + 100,//ulThreshold + 2000//ulMaxResponse +}; + +// +// Volume up button on PE2 +// +const tCapTouchElement g_sVolumeUpElement = +{ + GPIO_PORTA_AHB_BASE,//ulGPIOPort + GPIO_PIN_3,//ulGPIOPin + 100,//ulThreshold + 2000//ulMaxResponse +}; + +// +// Middle button on PE1 +// +const tCapTouchElement g_sMiddleElement = +{ + GPIO_PORTA_AHB_BASE,//ulGPIOPort + GPIO_PIN_4,//ulGPIOPin + 100,//ulThreshold + 1800//ulMaxResponse +}; + +const tSensor g_sSensorWheel = +{ + 4,//unsigned char ucNumElements; + 100,//unsigned long ulNumSamples; + 64,//unsigned char ucPoints; + 75,//unsigned char ucSensorThreshold; + 0,//unsigned long ulBaseOffset; + { + &g_sVolumeUpElement, + &g_sRightElement, + &g_sVolumeDownElement, + &g_sLeftElement + }//const tCapTouchElement *Element[MAXIMUM_NUMBER_OF_ELEMENTS_PER_SENSOR]; +}; + +const tSensor g_sMiddleButton = +{ + 1,//unsigned char ucNumElements; + 100,//unsigned long ulNumSamples; + 0,//unsigned char ucPoints; + 0,//unsigned char ucSensorThreshold; + 4,//unsigned long ulBaseOffset; + { + &g_sMiddleElement + }//const tCapTouchElement *Element[MAXIMUM_NUMBER_OF_ELEMENTS_PER_SENSOR]; +}; + diff --git a/boards/ek-lm4f120xl-boost-capsense/drivers/CTS_structure.h b/boards/ek-lm4f120xl-boost-capsense/drivers/CTS_structure.h new file mode 100644 index 0000000..eb603a4 --- /dev/null +++ b/boards/ek-lm4f120xl-boost-capsense/drivers/CTS_structure.h @@ -0,0 +1,74 @@ +//***************************************************************************** +// +// CTS_structure.c - Capacative Sense structures. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +#ifndef __CTS_STRUCTURE_H__ +#define __CTS_STRUCTURE_H__ + + +#define MAXIMUM_NUMBER_OF_ELEMENTS_PER_SENSOR 4 +#define TOTAL_NUMBER_OF_ELEMENTS 6 + + +#define ILLEGAL_SLIDER_WHEEL_POSITION 0xFFFFFFFF +#define WHEEL + +//****************************************************************************** +// The following structure definitons are application independent and are not +// intended to be modified. +// +// The CT_handler 'groups' the sensor based upon function and capacitive +// measurement method. +//****************************************************************************** +typedef struct +{ + unsigned long ulGPIOPort; + unsigned long ulGPIOPin; + unsigned long ulThreshold; + unsigned long ulMaxResponse; +} +tCapTouchElement; + +typedef struct tSensor +{ + unsigned char ucNumElements; + unsigned long ulNumSamples; + unsigned char ucPoints; + unsigned long ulSensorThreshold; + unsigned long ulBaseOffset; + const tCapTouchElement *Element[MAXIMUM_NUMBER_OF_ELEMENTS_PER_SENSOR]; +} +tSensor; + +extern const tCapTouchElement g_sVolumeDownElement; // structure containing elements for +extern const tCapTouchElement g_sVolumeUpElement; // +extern const tCapTouchElement g_sRightElement; // +extern const tCapTouchElement g_sLeftElement; // +extern const tCapTouchElement g_sMiddleElement; // +extern const tCapTouchElement g_sProximityElement; // + +extern const tSensor g_sSensorWheel; + +extern const tSensor g_sMiddleButton; // structure of info for a given + +#endif // __CTS_STRUCTURE_H__ diff --git a/boards/ek-lm4f120xl-boost-capsense/ek-lm4f120xl-boost-capsense.eww b/boards/ek-lm4f120xl-boost-capsense/ek-lm4f120xl-boost-capsense.eww new file mode 100644 index 0000000..3f340d5 --- /dev/null +++ b/boards/ek-lm4f120xl-boost-capsense/ek-lm4f120xl-boost-capsense.eww @@ -0,0 +1,30 @@ + + + + + $WS_DIR$\..\..\driverlib\driverlib-cm4f.ewp + + + $WS_DIR$\..\..\usblib\usblib-cm4f.ewp + + + $WS_DIR$\capsense\capsense.ewp + + + + All Examples + + driverlib-cm4f + Debug + + + usblib-cm4f + Debug + + + capsense + Debug + + + + diff --git a/boards/ek-lm4f120xl-boost-capsense/ek-lm4f120xl-boost-capsense.sgxw b/boards/ek-lm4f120xl-boost-capsense/ek-lm4f120xl-boost-capsense.sgxw new file mode 100644 index 0000000..0d1b79a --- /dev/null +++ b/boards/ek-lm4f120xl-boost-capsense/ek-lm4f120xl-boost-capsense.sgxw @@ -0,0 +1,30 @@ + + + + + + + + + + diff --git a/boards/ek-lm4f120xl-boost-capsense/ek-lm4f120xl-boost-capsense.uvmpw b/boards/ek-lm4f120xl-boost-capsense/ek-lm4f120xl-boost-capsense.uvmpw new file mode 100644 index 0000000..63a8f56 --- /dev/null +++ b/boards/ek-lm4f120xl-boost-capsense/ek-lm4f120xl-boost-capsense.uvmpw @@ -0,0 +1,25 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + ek-lm4f120xl-boost-capsense + + + ..\..\driverlib\driverlib-cm4f.uvproj + 1 + + + + ..\..\usblib\usblib-cm4f.uvproj + 1 + + + + .\capsense\capsense.uvproj + 1 + + + diff --git a/boards/ek-lm4f120xl-boost-olimex-8x8/Makefile b/boards/ek-lm4f120xl-boost-olimex-8x8/Makefile new file mode 100644 index 0000000..532ac3f --- /dev/null +++ b/boards/ek-lm4f120xl-boost-olimex-8x8/Makefile @@ -0,0 +1,47 @@ +#****************************************************************************** +# +# Makefile - Rules for building the ek-lm4f120xl-boost-olimex-8x8 examples. +# +# Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +# Software License Agreement +# +# Texas Instruments (TI) is supplying this software for use solely and +# exclusively on TI's microcontroller products. The software is owned by +# TI and/or its suppliers, and is protected under applicable copyright +# laws. You may not combine this software with "viral" open-source +# software in order to form a larger program. +# +# THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +# NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +# NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +# A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +# CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +# DAMAGES, FOR ANY REASON WHATSOEVER. +# +# This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +# +#****************************************************************************** + +# +# A list of the directories containing the examples. +# +DIRS=faces + +# +# The default rule, which causes the examples to be built. +# +all: + @for i in ${DIRS}; \ + do \ + make -C $${i} || exit $$?; \ + done + +# +# The rule to clean out all the build products. +# +clean: + @rm -rf ${wildcard *~} __dummy__ + @-for i in ${DIRS}; \ + do \ + make -C $${i} clean; \ + done diff --git a/boards/ek-lm4f120xl-boost-olimex-8x8/ek-lm4f120xl-boost-olimex-8x8.eww b/boards/ek-lm4f120xl-boost-olimex-8x8/ek-lm4f120xl-boost-olimex-8x8.eww new file mode 100644 index 0000000..2e943d7 --- /dev/null +++ b/boards/ek-lm4f120xl-boost-olimex-8x8/ek-lm4f120xl-boost-olimex-8x8.eww @@ -0,0 +1,30 @@ + + + + + $WS_DIR$\..\..\driverlib\driverlib-cm4f.ewp + + + $WS_DIR$\..\..\usblib\usblib-cm4f.ewp + + + $WS_DIR$\faces\faces.ewp + + + + All Examples + + driverlib-cm4f + Debug + + + usblib-cm4f + Debug + + + faces + Debug + + + + diff --git a/boards/ek-lm4f120xl-boost-olimex-8x8/ek-lm4f120xl-boost-olimex-8x8.sgxw b/boards/ek-lm4f120xl-boost-olimex-8x8/ek-lm4f120xl-boost-olimex-8x8.sgxw new file mode 100644 index 0000000..32c92f1 --- /dev/null +++ b/boards/ek-lm4f120xl-boost-olimex-8x8/ek-lm4f120xl-boost-olimex-8x8.sgxw @@ -0,0 +1,30 @@ + + + + + + + + + + diff --git a/boards/ek-lm4f120xl-boost-olimex-8x8/ek-lm4f120xl-boost-olimex-8x8.uvmpw b/boards/ek-lm4f120xl-boost-olimex-8x8/ek-lm4f120xl-boost-olimex-8x8.uvmpw new file mode 100644 index 0000000..973c92e --- /dev/null +++ b/boards/ek-lm4f120xl-boost-olimex-8x8/ek-lm4f120xl-boost-olimex-8x8.uvmpw @@ -0,0 +1,25 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + ek-lm4f120xl-boost-olimex-8x8 + + + ..\..\driverlib\driverlib-cm4f.uvproj + 1 + + + + ..\..\usblib\usblib-cm4f.uvproj + 1 + + + + .\faces\faces.uvproj + 1 + + + diff --git a/boards/ek-lm4f120xl-boost-olimex-8x8/faces/Makefile b/boards/ek-lm4f120xl-boost-olimex-8x8/faces/Makefile new file mode 100644 index 0000000..f9bb452 --- /dev/null +++ b/boards/ek-lm4f120xl-boost-olimex-8x8/faces/Makefile @@ -0,0 +1,91 @@ +#****************************************************************************** +# +# Makefile - Rules for building the olimex_led example. +# +# Copyright (c) 2011-2012 Texas Instruments Incorporated. All rights reserved. +# Software License Agreement +# +# Texas Instruments (TI) is supplying this software for use solely and +# exclusively on TI's microcontroller products. The software is owned by +# TI and/or its suppliers, and is protected under applicable copyright +# laws. You may not combine this software with "viral" open-source +# software in order to form a larger program. +# +# THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +# NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +# NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +# A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +# CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +# DAMAGES, FOR ANY REASON WHATSOEVER. +# +# This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +# +#****************************************************************************** + +# +# Defines the part type that this project uses. +# +PART=LM4F120H5QR + +# +# Set the processor variant. +# +VARIANT=cm4f + +# +# The base directory for StellarisWare. +# +ROOT=../../.. + +# +# Include the common make definitions. +# +include ${ROOT}/makedefs + +# +# Where to find source files that do not live in this directory. +# +VPATH=../../../utils + +# +# Where to find header files that do not live in the source directory. +# +IPATH=../../.. + +# +# The default rule, which causes the olimex_led example to be built. +# +all: ${COMPILER} +all: ${COMPILER}/faces.axf + +# +# The rule to clean out all the build products. +# +clean: + @rm -rf ${COMPILER} ${wildcard *~} + +# +# The rule to create the target directory. +# +${COMPILER}: + @mkdir -p ${COMPILER} + +# +# Rules for building the olimex_led example. +# +${COMPILER}/faces.axf: ${COMPILER}/faces.o +${COMPILER}/faces.axf: ${COMPILER}/softssi.o +${COMPILER}/faces.axf: ${COMPILER}/startup_${COMPILER}.o +${COMPILER}/faces.axf: ${COMPILER}/uartstdio.o +${COMPILER}/faces.axf: ${ROOT}/driverlib/${COMPILER}-cm4f/libdriver-cm4f.a +${COMPILER}/faces.axf: faces.ld +SCATTERgcc_faces=faces.ld +ENTRY_faces=ResetISR +CFLAGSgcc=-DTARGET_IS_BLIZZARD_RA1 + +# +# Include the automatically generated dependency files. +# +ifneq (${MAKECMDGOALS},clean) +-include ${wildcard ${COMPILER}/*.d} __dummy__ +endif diff --git a/boards/ek-lm4f120xl-boost-olimex-8x8/faces/ccs/.ccsimportspec b/boards/ek-lm4f120xl-boost-olimex-8x8/faces/ccs/.ccsimportspec new file mode 100644 index 0000000..18b3e68 --- /dev/null +++ b/boards/ek-lm4f120xl-boost-olimex-8x8/faces/ccs/.ccsimportspec @@ -0,0 +1,8 @@ + + + + + + + + diff --git a/boards/ek-lm4f120xl-boost-olimex-8x8/faces/ccs/.ccsproject b/boards/ek-lm4f120xl-boost-olimex-8x8/faces/ccs/.ccsproject new file mode 100644 index 0000000..56793f4 --- /dev/null +++ b/boards/ek-lm4f120xl-boost-olimex-8x8/faces/ccs/.ccsproject @@ -0,0 +1,12 @@ + + + + + + + + + + + + diff --git a/boards/ek-lm4f120xl-boost-olimex-8x8/faces/ccs/.cproject b/boards/ek-lm4f120xl-boost-olimex-8x8/faces/ccs/.cproject new file mode 100644 index 0000000..324328a --- /dev/null +++ b/boards/ek-lm4f120xl-boost-olimex-8x8/faces/ccs/.cproject @@ -0,0 +1,191 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/boards/ek-lm4f120xl-boost-olimex-8x8/faces/ccs/.project b/boards/ek-lm4f120xl-boost-olimex-8x8/faces/ccs/.project new file mode 100644 index 0000000..8826bf4 --- /dev/null +++ b/boards/ek-lm4f120xl-boost-olimex-8x8/faces/ccs/.project @@ -0,0 +1,116 @@ + + + faces + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + + + ?name? + + + + org.eclipse.cdt.make.core.append_environment + true + + + org.eclipse.cdt.make.core.autoBuildTarget + all + + + org.eclipse.cdt.make.core.buildArguments + -k + + + org.eclipse.cdt.make.core.buildCommand + ${CCS_UTILS_DIR}/bin/gmake + + + org.eclipse.cdt.make.core.buildLocation + ${BuildDirectory} + + + org.eclipse.cdt.make.core.cleanBuildTarget + clean + + + org.eclipse.cdt.make.core.contents + org.eclipse.cdt.make.core.activeConfigSettings + + + org.eclipse.cdt.make.core.enableAutoBuild + true + + + org.eclipse.cdt.make.core.enableCleanBuild + true + + + org.eclipse.cdt.make.core.enableFullBuild + true + + + org.eclipse.cdt.make.core.fullBuildTarget + all + + + org.eclipse.cdt.make.core.stopOnError + false + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + true + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + com.ti.ccstudio.core.ccsNature + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.core.ccnature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + faces.c + 1 + SW_ROOT/boards/ek-lm4f120xl-boost-olimex-8x8/faces/faces.c + + + faces_ccs.cmd + 1 + SW_ROOT/boards/ek-lm4f120xl-boost-olimex-8x8/faces/faces_ccs.cmd + + + startup_ccs.c + 1 + SW_ROOT/boards/ek-lm4f120xl-boost-olimex-8x8/faces/startup_ccs.c + + + utils/softssi.c + 1 + SW_ROOT/utils/softssi.c + + + utils/uartstdio.c + 1 + SW_ROOT/utils/uartstdio.c + + + + + SW_ROOT + $%7BPARENT-4-PROJECT_LOC%7D + + + diff --git a/boards/ek-lm4f120xl-boost-olimex-8x8/faces/ccs/.settings/org.eclipse.cdt.codan.core.prefs b/boards/ek-lm4f120xl-boost-olimex-8x8/faces/ccs/.settings/org.eclipse.cdt.codan.core.prefs new file mode 100644 index 0000000..98b6350 --- /dev/null +++ b/boards/ek-lm4f120xl-boost-olimex-8x8/faces/ccs/.settings/org.eclipse.cdt.codan.core.prefs @@ -0,0 +1,3 @@ +eclipse.preferences.version=1 +inEditor=false +onBuild=false diff --git a/boards/ek-lm4f120xl-boost-olimex-8x8/faces/ccs/Debug/faces.bin b/boards/ek-lm4f120xl-boost-olimex-8x8/faces/ccs/Debug/faces.bin new file mode 100644 index 0000000..e88567d Binary files /dev/null and b/boards/ek-lm4f120xl-boost-olimex-8x8/faces/ccs/Debug/faces.bin differ diff --git a/boards/ek-lm4f120xl-boost-olimex-8x8/faces/ccs/Debug/faces.out b/boards/ek-lm4f120xl-boost-olimex-8x8/faces/ccs/Debug/faces.out new file mode 100644 index 0000000..4d00b24 Binary files /dev/null and b/boards/ek-lm4f120xl-boost-olimex-8x8/faces/ccs/Debug/faces.out differ diff --git a/boards/ek-lm4f120xl-boost-olimex-8x8/faces/ccs/macros.ini_initial b/boards/ek-lm4f120xl-boost-olimex-8x8/faces/ccs/macros.ini_initial new file mode 100644 index 0000000..588017d --- /dev/null +++ b/boards/ek-lm4f120xl-boost-olimex-8x8/faces/ccs/macros.ini_initial @@ -0,0 +1 @@ +SW_ROOT = ../../../.. diff --git a/boards/ek-lm4f120xl-boost-olimex-8x8/faces/ccs/target_config.ccxml b/boards/ek-lm4f120xl-boost-olimex-8x8/faces/ccs/target_config.ccxml new file mode 100644 index 0000000..469eea0 --- /dev/null +++ b/boards/ek-lm4f120xl-boost-olimex-8x8/faces/ccs/target_config.ccxml @@ -0,0 +1,13 @@ + + + + + + + + + + + + + diff --git a/boards/ek-lm4f120xl-boost-olimex-8x8/faces/ewarm/Exe/faces.bin b/boards/ek-lm4f120xl-boost-olimex-8x8/faces/ewarm/Exe/faces.bin new file mode 100644 index 0000000..56050ea Binary files /dev/null and b/boards/ek-lm4f120xl-boost-olimex-8x8/faces/ewarm/Exe/faces.bin differ diff --git a/boards/ek-lm4f120xl-boost-olimex-8x8/faces/ewarm/Exe/faces.out b/boards/ek-lm4f120xl-boost-olimex-8x8/faces/ewarm/Exe/faces.out new file mode 100644 index 0000000..0997c1a Binary files /dev/null and b/boards/ek-lm4f120xl-boost-olimex-8x8/faces/ewarm/Exe/faces.out differ diff --git a/boards/ek-lm4f120xl-boost-olimex-8x8/faces/faces.c b/boards/ek-lm4f120xl-boost-olimex-8x8/faces/faces.c new file mode 100644 index 0000000..1ff3596 --- /dev/null +++ b/boards/ek-lm4f120xl-boost-olimex-8x8/faces/faces.c @@ -0,0 +1,328 @@ +//***************************************************************************** +// +// olimex_led.c - Simple olimex_led world example. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +#include +#include "inc/hw_memmap.h" +#include "inc/hw_types.h" +#include "driverlib/debug.h" +#include "driverlib/fpu.h" +#include "driverlib/gpio.h" +#include "driverlib/pin_map.h" +#include "driverlib/rom.h" +#include "driverlib/sysctl.h" +#include "driverlib/systick.h" +#include "utils/softssi.h" +#include "utils/uartstdio.h" + +//***************************************************************************** +// +//! \addtogroup example_list +//!

olimex_led World (olimex_led)

+//! +//! A very simple ``hello world'' example. It simply displays ``Hello World!'' +//! on the UART and is a starting point for more complicated applications. +//! +//! UART0, connected to the Stellaris Virtual Serial Port and running at +//! 115,200, 8-N-1, is used to display messages from this application. +//! +//! Displays a series of faces on the LED matrix. +// +//***************************************************************************** + + +//***************************************************************************** +// +// The error routine that is called if the driver library encounters an error. +// +//***************************************************************************** +#ifdef DEBUG +void +__error__(char *pcFilename, unsigned long ulLine) +{ +} +#endif + +//***************************************************************************** +// +// Number of bytes to send and receive. +// +//***************************************************************************** +#define NUM_SSI_DATA 8 + +//***************************************************************************** +// +// The persistent state of the SoftSSI peripheral. +// +//***************************************************************************** +tSoftSSI g_sSoftSSI; + +//***************************************************************************** +// +// The data buffer that is used as the transmit FIFO. The size of this buffer +// can be increased or decreased as required to match the transmit buffering +// requirements of your application. +// +//***************************************************************************** +unsigned short g_pusTxBuffer[16]; + +//***************************************************************************** +// +// The data buffer that is used as the receive FIFO. The size of this buffer +// can be increased or decreased as required to match the receive buffering +// requirements of your application. +// +//***************************************************************************** +unsigned short g_pusRxBuffer[16]; + +//***************************************************************************** +// +// Index control variable to cycle through faces. +// +//***************************************************************************** +volatile unsigned long g_ulFaceIndex; + +//***************************************************************************** +// +// Matrices that correspond to faces on the LED display. +// +//***************************************************************************** +#define NONE 0 +#define LAUGH 1 +#define HAPPY 2 +#define SMILE 3 +#define ANGRY 4 +#define NUM_FACES 5 + +const unsigned char g_ucFaces[NUM_FACES][8] = + { + {0x03, 0x03, 0x40, 0x4E, 0x4E, 0x40, 0x03, 0x03}, + {0x43, 0xC3, 0xC0, 0xCE, 0xCE, 0xC0, 0xC3, 0x43}, + {0x66, 0x86, 0x80, 0x9C, 0x9C, 0x80, 0x86, 0x66}, + {0x46, 0x86, 0x80, 0x9C, 0x9C, 0x80, 0x86, 0x46}, + {0x86, 0x46, 0x40, 0x5C, 0x5C, 0x40, 0x46, 0x86} + }; + +//***************************************************************************** +// +// Bit-wise reverses a number. +// +//***************************************************************************** +unsigned char +Reverse(unsigned char ucNumber) +{ + unsigned short ucIndex; + unsigned short ucReversedNumber = 0; + for(ucIndex=0; ucIndex<8; ucIndex++) + { + ucReversedNumber = ucReversedNumber << 1; + ucReversedNumber |= ((1 << ucIndex) & ucNumber) >> ucIndex; + } + return ucReversedNumber; +} + +//***************************************************************************** +// +// The interrupt handler for the SysTick interrupt. +// +//***************************************************************************** +void +SysTickIntHandler(void) +{ + static unsigned long ulTickCounter; + // + // Call the SoftSSI timer tick. + // + SoftSSITimerTick(&g_sSoftSSI); + + // + // Keep track of ticks and scroll through the faces in the array + // + ulTickCounter++; + if(ulTickCounter > 10000) + { + ulTickCounter = 0; + g_ulFaceIndex++; + if(g_ulFaceIndex >= NUM_FACES) + { + g_ulFaceIndex = 0; + } + } +} + +//***************************************************************************** +// +// Print a graphic on the 8x8 LED screen. +// +//***************************************************************************** +void +PrintByteArray(const unsigned char * pucBytes) +{ + unsigned long ulIndex; + unsigned long ulData; + + // + // Display indication that the SoftSSI is transmitting data. + // + UARTprintf("\n\nSent:\n "); + + // + // Send the 8 bytes of data. + // + for(ulIndex = 0; ulIndex < NUM_SSI_DATA; ulIndex++) + { + ulData = (Reverse(pucBytes[ulIndex]) << 8) + (1 << ulIndex); + + // + // Display the data that SSI is transferring. + // + UARTprintf("'%x' ", ulData); + + // + // Send the data using the "blocking" put function. This function + // will wait until there is room in the send FIFO before returning. + // This allows you to assure that all the data you send makes it + // into the send FIFO. + // + SoftSSIDataPut(&g_sSoftSSI, ulData); + + // + // Wait until SoftSSI is done transferring all the data in the + // transmit FIFO. + // + while(SoftSSIBusy(&g_sSoftSSI)) + { + } + + // + // Raise the clear signal to show the new value. + // + GPIOPinWrite(GPIO_PORTE_BASE, GPIO_PIN_5, GPIO_PIN_5); + SysCtlDelay(100); + // + // Clear the Shift Register + // + GPIOPinWrite(GPIO_PORTE_BASE, GPIO_PIN_5, 0); + + } +} + + +//***************************************************************************** +// +// Print "Hello World!" to the UART on the Stellaris evaluation board. +// +//***************************************************************************** +int +main(void) +{ + + // Enable lazy stacking for interrupt handlers. This allows floating-point + // instructions to be used within interrupt handlers, but at the expense of + // extra stack usage. + // + ROM_FPUEnable(); + ROM_FPULazyStackingEnable(); + + // + // Set the clocking to run directly from the crystal. + // + ROM_SysCtlClockSet(SYSCTL_SYSDIV_5 | SYSCTL_USE_PLL | SYSCTL_XTAL_16MHZ | + SYSCTL_OSC_MAIN); + + // + // Initialize the UART. + // + ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA); + ROM_GPIOPinConfigure(GPIO_PA0_U0RX); + ROM_GPIOPinConfigure(GPIO_PA1_U0TX); + ROM_GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_1); + UARTStdioInit(0); + + // + // Hello! + // + UARTprintf("Hello, world!\n"); + + // + // Initialize the GPIOs we will need for communication with the LED Matrix + // + ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOB); + ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOE); + + // + // Initialize the clear signal + // + GPIOPinTypeGPIOOutput(GPIO_PORTE_BASE, GPIO_PIN_5); + GPIOPinWrite(GPIO_PORTE_BASE, GPIO_PIN_5, 0); + + // + // Configure the SoftSSI module. The size of the FIFO buffers can be + // changed to accommodate the requirements of your application. The GPIO + // pins utilized can also be changed. + // The pins are assigned as follows: + // PB4 - SoftSSICLK + // PB6 - SoftSSITx + // + memset(&g_sSoftSSI, 0, sizeof(g_sSoftSSI)); + SoftSSIClkGPIOSet(&g_sSoftSSI, GPIO_PORTB_BASE, GPIO_PIN_4); + SoftSSITxGPIOSet(&g_sSoftSSI, GPIO_PORTB_BASE, GPIO_PIN_6); + SoftSSIRxBufferSet(&g_sSoftSSI, g_pusRxBuffer, + sizeof(g_pusRxBuffer) / sizeof(g_pusRxBuffer[0])); + SoftSSITxBufferSet(&g_sSoftSSI, g_pusTxBuffer, + sizeof(g_pusTxBuffer) / sizeof(g_pusTxBuffer[0])); + + // + // Configure the SoftSSI module. Use idle clock level low and active low + // clock (mode 0) and 8-bit data. You can set the polarity of the SoftSSI + // clock when the SoftSSI module is idle. You can also configure what + // clock edge you want to capture data on. Please reference the datasheet + // for more information on the different SPI modes. + // + SoftSSIConfigSet(&g_sSoftSSI, SOFTSSI_FRF_MOTO_MODE_0, 16); + + // + // Enable the SoftSSI module. + // + SoftSSIEnable(&g_sSoftSSI); + + // + // Configure SysTick to provide an interrupt at a 10 KHz rate. This is + // used to control the clock rate of the SoftSSI module; the clock rate of + // the SoftSSI Clk signal will be 1/2 the interrupt rate. + // + SysTickPeriodSet(SysCtlClockGet() / 20000); + SysTickIntEnable(); + SysTickEnable(); + + while(1) + { + // + // Cycle through all available faces... + // Face index updated inside the SysTickIntHandler. + // + PrintByteArray(g_ucFaces[g_ulFaceIndex]); + + } + +} diff --git a/boards/ek-lm4f120xl-boost-olimex-8x8/faces/faces.ewd b/boards/ek-lm4f120xl-boost-olimex-8x8/faces/faces.ewd new file mode 100644 index 0000000..b8eeac7 --- /dev/null +++ b/boards/ek-lm4f120xl-boost-olimex-8x8/faces/faces.ewd @@ -0,0 +1,614 @@ + + + + 1 + + Debug + + ARM + + 1 + + C-SPY + 2 + + 15 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + ARMSIM_ID + 2 + + 1 + 1 + 1 + + + + + + + + ANGEL_ID + 2 + + 0 + 1 + 1 + + + + + + + + + + + + GDBSERVER_ID + 2 + + 0 + 1 + 1 + + + + + + + + + + + IARROM_ID + 2 + + 0 + 1 + 1 + + + + + + + + + + JLINK_ID + 2 + + 9 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + LMIFTDI_ID + 2 + + 1 + 1 + 1 + + + + + + + + MACRAIGOR_ID + 2 + + 2 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + RDI_ID + 2 + + 1 + 1 + 1 + + + + + + + + + + + + + + + + + THIRDPARTY_ID + 2 + + 0 + 1 + 1 + + + + + + + + + $TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\OSE\OseEpsilonPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\PowerPac\PowerPacRTOS.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin + 0 + + + $EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin + 1 + + + $EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin + 0 + + + $EW_DIR$\common\plugins\Profiling\Profiling.ENU.ewplugin + 1 + + + $EW_DIR$\common\plugins\Stack\Stack.ENU.ewplugin + 1 + + + + diff --git a/boards/ek-lm4f120xl-boost-olimex-8x8/faces/faces.ewp b/boards/ek-lm4f120xl-boost-olimex-8x8/faces/faces.ewp new file mode 100644 index 0000000..86892e9 --- /dev/null +++ b/boards/ek-lm4f120xl-boost-olimex-8x8/faces/faces.ewp @@ -0,0 +1,790 @@ + + + + 1 + + Debug + + ARM + + 1 + + General + 3 + + 14 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCARM + 2 + + 19 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AARM + 2 + + 7 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + OBJCOPY + 0 + + 1 + 1 + 1 + + + + + + + + + CUSTOM + 3 + + + + + + + BICOMP + 0 + + + + BUILDACTION + 1 + + + + + + + ILINK + 0 + + 5 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + IARCHIVE + 0 + + 0 + 1 + 1 + + + + + + + BILINK + 0 + + + + + Libraries + + $PROJ_DIR$\..\..\..\driverlib\ewarm-cm4f\Exe\driverlib-cm4f.a + + + + Source + + $PROJ_DIR$\faces.c + + + $PROJ_DIR$\..\..\..\utils\softssi.c + + + $PROJ_DIR$\startup_ewarm.c + + + $PROJ_DIR$\..\..\..\utils\uartstdio.c + + + diff --git a/boards/ek-lm4f120xl-boost-olimex-8x8/faces/faces.icf b/boards/ek-lm4f120xl-boost-olimex-8x8/faces/faces.icf new file mode 100644 index 0000000..700749a --- /dev/null +++ b/boards/ek-lm4f120xl-boost-olimex-8x8/faces/faces.icf @@ -0,0 +1,78 @@ +//***************************************************************************** +// +// faces.icf - Linker configuration file for faces. +// +// Copyright (c) 2011-2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +// +// Define a memory region that covers the entire 4 GB addressible space of the +// processor. +// +define memory mem with size = 4G; + +// +// Define a region for the on-chip flash. +// +define region FLASH = mem:[from 0x00000000 to 0x0003ffff]; + +// +// Define a region for the on-chip SRAM. +// +define region SRAM = mem:[from 0x20000000 to 0x20007fff]; + +// +// Define a block for the heap. The size should be set to something other +// than zero if things in the C library that require the heap are used. +// +define block HEAP with alignment = 8, size = 0x00000000 { }; + +// +// Indicate that the read/write values should be initialized by copying from +// flash. +// +initialize by copy { readwrite }; + +// +// Indicate that the noinit values should be left alone. This includes the +// stack, which if initialized will destroy the return address from the +// initialization code, causing the processor to branch to zero and fault. +// +do not initialize { section .noinit }; + +// +// Place the interrupt vectors at the start of flash. +// +place at start of FLASH { readonly section .intvec }; + +// +// Place the remainder of the read-only items into flash. +// +place in FLASH { readonly }; + +// +// Place the RAM vector table at the start of SRAM. +// +place at start of SRAM { section VTABLE }; + +// +// Place all read/write items into SRAM. +// +place in SRAM { readwrite, block HEAP }; diff --git a/boards/ek-lm4f120xl-boost-olimex-8x8/faces/faces.ld b/boards/ek-lm4f120xl-boost-olimex-8x8/faces/faces.ld new file mode 100644 index 0000000..09e1bed --- /dev/null +++ b/boards/ek-lm4f120xl-boost-olimex-8x8/faces/faces.ld @@ -0,0 +1,57 @@ +/****************************************************************************** + * + * faces.ld - Linker configuration file for faces. + * + * Copyright (c) 2011-2012 Texas Instruments Incorporated. All rights reserved. + * Software License Agreement + * + * Texas Instruments (TI) is supplying this software for use solely and + * exclusively on TI's microcontroller products. The software is owned by + * TI and/or its suppliers, and is protected under applicable copyright + * laws. You may not combine this software with "viral" open-source + * software in order to form a larger program. + * + * THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. + * NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT + * NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY + * CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL + * DAMAGES, FOR ANY REASON WHATSOEVER. + * + * This is part of revision 9453 of the EK-LM4F120XL Firmware Package. + * + *****************************************************************************/ + +MEMORY +{ + FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x00040000 + SRAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00008000 +} + +SECTIONS +{ + .text : + { + _text = .; + KEEP(*(.isr_vector)) + *(.text*) + *(.rodata*) + _etext = .; + } > FLASH + + .data : AT(ADDR(.text) + SIZEOF(.text)) + { + _data = .; + *(vtable) + *(.data*) + _edata = .; + } > SRAM + + .bss : + { + _bss = .; + *(.bss*) + *(COMMON) + _ebss = .; + } > SRAM +} diff --git a/boards/ek-lm4f120xl-boost-olimex-8x8/faces/faces.sct b/boards/ek-lm4f120xl-boost-olimex-8x8/faces/faces.sct new file mode 100644 index 0000000..298ac55 --- /dev/null +++ b/boards/ek-lm4f120xl-boost-olimex-8x8/faces/faces.sct @@ -0,0 +1,47 @@ +;****************************************************************************** +; +; faces.sct - Linker configuration file for faces. +; +; Copyright (c) 2011-2012 Texas Instruments Incorporated. All rights reserved. +; Software License Agreement +; +; Texas Instruments (TI) is supplying this software for use solely and +; exclusively on TI's microcontroller products. The software is owned by +; TI and/or its suppliers, and is protected under applicable copyright +; laws. You may not combine this software with "viral" open-source +; software in order to form a larger program. +; +; THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +; NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +; NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +; A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +; CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +; DAMAGES, FOR ANY REASON WHATSOEVER. +; +; This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +; +;****************************************************************************** + +LR_IROM 0x00000000 0x00040000 +{ + ; + ; Specify the Execution Address of the code and the size. + ; + ER_IROM 0x00000000 0x00040000 + { + *.o (RESET, +First) + * (InRoot$$Sections, +RO) + } + + ; + ; Specify the Execution Address of the data area. + ; + RW_IRAM 0x20000000 0x00008000 + { + ; + ; Uncomment the following line in order to use IntRegister(). + ; + ;* (vtable, +First) + * (+RW, +ZI) + } +} diff --git a/boards/ek-lm4f120xl-boost-olimex-8x8/faces/faces.sgxx b/boards/ek-lm4f120xl-boost-olimex-8x8/faces/faces.sgxx new file mode 100644 index 0000000..73869e9 Binary files /dev/null and b/boards/ek-lm4f120xl-boost-olimex-8x8/faces/faces.sgxx differ diff --git a/boards/ek-lm4f120xl-boost-olimex-8x8/faces/faces.uvopt b/boards/ek-lm4f120xl-boost-olimex-8x8/faces/faces.uvopt new file mode 100644 index 0000000..368e418 --- /dev/null +++ b/boards/ek-lm4f120xl-boost-olimex-8x8/faces/faces.uvopt @@ -0,0 +1,317 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + + + + 0 + 0 + + + + faces + 0x4 + ARM-ADS + + 8000000 + + 1 + 1 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\rvmdk\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 255 + + + 0 + Data Sheet + DATASHTS\Luminary\LM4F120H5QR.PDF + + + + SARMCM3.DLL + -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 0 + 1 + 0 + 0 + 4 + + + + + + + + + + + BIN\lmidk-agdi.dll + + + + 0 + lmidk-agdi + -O4614 -S3 -FO29 + + + 0 + DLGTARM + + + + 0 + ARMDBGFLAGS + + + + + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + Source + 1 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + .\faces.c + faces.c + + + 1 + 2 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\utils\softssi.c + softssi.c + + + 1 + 3 + 2 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + .\startup_rvmdk.S + startup_rvmdk.S + + + 1 + 4 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\utils\uartstdio.c + uartstdio.c + + + + + Libraries + 1 + 0 + 0 + + 2 + 5 + 4 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\driverlib\rvmdk-cm4f\driverlib-cm4f.lib + driverlib-cm4f.lib + + + + + Documentation + 1 + 0 + 0 + + 3 + 6 + 5 + 0 + 1 + 0 + 0 + 1 + 1 + 0 + .\readme.txt + readme.txt + + 44 + 0 + 1 + + -1 + -1 + + + -1 + -1 + + + 0 + 0 + 729 + 300 + + + + + + + 1 + 0 + + 100 + 0 + + + .\readme.txt + 0 + 1 + 1 + + + + + + diff --git a/boards/ek-lm4f120xl-boost-olimex-8x8/faces/faces.uvproj b/boards/ek-lm4f120xl-boost-olimex-8x8/faces/faces.uvproj new file mode 100644 index 0000000..df5d6c8 --- /dev/null +++ b/boards/ek-lm4f120xl-boost-olimex-8x8/faces/faces.uvproj @@ -0,0 +1,434 @@ + + + + 1.1 + +
### uVision Project, (C) Keil Software
+ + + + faces + 0x4 + ARM-ADS + + + LM4F120H5QR + Texas Instruments + IRAM(0x20000000-0x20007FFF) IROM(0-0x3FFFF) CLOCK(8000000) CPUTYPE("Cortex-M4") FPU2 + + "STARTUP\Luminary\Startup.s" ("Luminary Startup Code") + UL2CM3(-O207 -S0 -C0 -FO7 -FD20000000 -FC800 -FN1 -FF0LM4F_256 -FS00 -FL040000) + 5919 + LM4Fxxxx.H + + + + + + + + + + 0 + + + + Luminary\ + Luminary\ + + 0 + 0 + 0 + 0 + 1 + + .\rvmdk\ + faces + 1 + 0 + 0 + 1 + 1 + .\rvmdk\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + + 1 + 0 + fromelf --bin --output .\rvmdk\faces.bin .\rvmdk\faces.axf + + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + + + SARMCM3.DLL + -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + + 1 + 0 + 0 + 0 + 16 + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + + + 1 + 1 + 0 + 1 + 1 + 1 + 0 + 1 + + 0 + 4 + + + + + + + + + + + + + + BIN\lmidk-agdi.dll + + + + + 1 + 0 + 0 + 0 + 1 + 4099 + + BIN\lmidk-agdi.dll + + + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M4" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 2 + 0 + 0 + 8 + 1 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x8000 + + + 1 + 0x0 + 0x40000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x40000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x8000 + + + 0 + 0x0 + 0x0 + + + + + + 0 + 3 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + + + rvmdk PART_LM4F120H5QR TARGET_IS_BLIZZARD_RA1 + + ..\..\..; + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x00000000 + 0x20000000 + faces.sct + + + --entry Reset_Handler + + + + + + + + Source + + + faces.c + 1 + .\faces.c + + + softssi.c + 1 + ..\..\..\utils\softssi.c + + + startup_rvmdk.S + 2 + .\startup_rvmdk.S + + + uartstdio.c + 1 + ..\..\..\utils\uartstdio.c + + + + + Libraries + + + driverlib-cm4f.lib + 4 + ..\..\..\driverlib\rvmdk-cm4f\driverlib-cm4f.lib + + + + + Documentation + + + readme.txt + 5 + .\readme.txt + + + + + + + + diff --git a/boards/ek-lm4f120xl-boost-olimex-8x8/faces/faces_ccs.cmd b/boards/ek-lm4f120xl-boost-olimex-8x8/faces/faces_ccs.cmd new file mode 100644 index 0000000..e9d4003 --- /dev/null +++ b/boards/ek-lm4f120xl-boost-olimex-8x8/faces/faces_ccs.cmd @@ -0,0 +1,70 @@ +/****************************************************************************** + * + * faces_ccs.cmd - CCS linker configuration file for faces. + * + * Copyright (c) 2011-2012 Texas Instruments Incorporated. All rights reserved. + * Software License Agreement + * + * Texas Instruments (TI) is supplying this software for use solely and + * exclusively on TI's microcontroller products. The software is owned by + * TI and/or its suppliers, and is protected under applicable copyright + * laws. You may not combine this software with "viral" open-source + * software in order to form a larger program. + * + * THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. + * NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT + * NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY + * CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL + * DAMAGES, FOR ANY REASON WHATSOEVER. + * + * This is part of revision 9453 of the EK-LM4F120XL Firmware Package. + * + *****************************************************************************/ + +--retain=g_pfnVectors + +/* The following command line options are set as part of the CCS project. */ +/* If you are building using the command line, or for some reason want to */ +/* define them here, you can uncomment and modify these lines as needed. */ +/* If you are using CCS for building, it is probably better to make any such */ +/* modifications in your CCS project and leave this file alone. */ +/* */ +/* --heap_size=0 */ +/* --stack_size=256 */ +/* --library=rtsv7M3_T_le_eabi.lib */ + +/* The starting address of the application. Normally the interrupt vectors */ +/* must be located at the beginning of the application. */ +#define APP_BASE 0x00000000 +#define RAM_BASE 0x20000000 + +/* System memory map */ + +MEMORY +{ + /* Application stored in and executes from internal flash */ + FLASH (RX) : origin = APP_BASE, length = 0x00040000 + /* Application uses internal RAM for data */ + SRAM (RWX) : origin = 0x20000000, length = 0x00008000 +} + +/* Section allocation in memory */ + +SECTIONS +{ + .intvecs: > APP_BASE + .text : > FLASH + .const : > FLASH + .cinit : > FLASH + .pinit : > FLASH + .init_array : > FLASH + + .vtable : > RAM_BASE + .data : > SRAM + .bss : > SRAM + .sysmem : > SRAM + .stack : > SRAM +} + +__STACK_TOP = __stack + 1024; diff --git a/boards/ek-lm4f120xl-boost-olimex-8x8/faces/faces_sourcerygxx.ld b/boards/ek-lm4f120xl-boost-olimex-8x8/faces/faces_sourcerygxx.ld new file mode 100644 index 0000000..10cbda1 --- /dev/null +++ b/boards/ek-lm4f120xl-boost-olimex-8x8/faces/faces_sourcerygxx.ld @@ -0,0 +1,39 @@ +/****************************************************************************** + * + * faces_sourcerygxx.ld - Scatter file for Sourcery CodeBench + * + * Copyright (c) 2011-2012 Texas Instruments Incorporated. All rights reserved. + * Software License Agreement + * + * Texas Instruments (TI) is supplying this software for use solely and + * exclusively on TI's microcontroller products. The software is owned by + * TI and/or its suppliers, and is protected under applicable copyright + * laws. You may not combine this software with "viral" open-source + * software in order to form a larger program. + * + * THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. + * NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT + * NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY + * CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL + * DAMAGES, FOR ANY REASON WHATSOEVER. + * + * This is part of revision 9453 of the EK-LM4F120XL Firmware Package. + * + *****************************************************************************/ + +/****************************************************************************** + * + * Define the end of the heap space, which determines the beginning of the + * stack space. + * + *****************************************************************************/ +__cs3_heap_end = __cs3_region_end_ram - 1024; + +/****************************************************************************** + * + * Define the interrupt handlers used by the application. + * + *****************************************************************************/ +EXTERN(SysTickIntHandler) +__cs3_isr_systick = SysTickIntHandler; diff --git a/boards/ek-lm4f120xl-boost-olimex-8x8/faces/gcc/faces.axf b/boards/ek-lm4f120xl-boost-olimex-8x8/faces/gcc/faces.axf new file mode 100644 index 0000000..145817d Binary files /dev/null and b/boards/ek-lm4f120xl-boost-olimex-8x8/faces/gcc/faces.axf differ diff --git a/boards/ek-lm4f120xl-boost-olimex-8x8/faces/gcc/faces.bin b/boards/ek-lm4f120xl-boost-olimex-8x8/faces/gcc/faces.bin new file mode 100644 index 0000000..33e47ad Binary files /dev/null and b/boards/ek-lm4f120xl-boost-olimex-8x8/faces/gcc/faces.bin differ diff --git a/boards/ek-lm4f120xl-boost-olimex-8x8/faces/readme.txt b/boards/ek-lm4f120xl-boost-olimex-8x8/faces/readme.txt new file mode 100644 index 0000000..bca7430 --- /dev/null +++ b/boards/ek-lm4f120xl-boost-olimex-8x8/faces/readme.txt @@ -0,0 +1,29 @@ +olimex_led World + +A very simple ``hello world'' example. It simply displays ``Hello World!'' +on the UART and is a starting point for more complicated applications. + +UART0, connected to the Stellaris Virtual Serial Port and running at +115,200, 8-N-1, is used to display messages from this application. + +Displays a series of faces on the LED matrix. + +------------------------------------------------------------------------------- + +Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +Software License Agreement + +Texas Instruments (TI) is supplying this software for use solely and +exclusively on TI's microcontroller products. The software is owned by +TI and/or its suppliers, and is protected under applicable copyright +laws. You may not combine this software with "viral" open-source +software in order to form a larger program. + +THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +DAMAGES, FOR ANY REASON WHATSOEVER. + +This is part of revision 9453 of the EK-LM4F120XL Firmware Package. diff --git a/boards/ek-lm4f120xl-boost-olimex-8x8/faces/rvmdk/faces.axf b/boards/ek-lm4f120xl-boost-olimex-8x8/faces/rvmdk/faces.axf new file mode 100644 index 0000000..d3c1d89 Binary files /dev/null and b/boards/ek-lm4f120xl-boost-olimex-8x8/faces/rvmdk/faces.axf differ diff --git a/boards/ek-lm4f120xl-boost-olimex-8x8/faces/rvmdk/faces.bin b/boards/ek-lm4f120xl-boost-olimex-8x8/faces/rvmdk/faces.bin new file mode 100644 index 0000000..6105977 Binary files /dev/null and b/boards/ek-lm4f120xl-boost-olimex-8x8/faces/rvmdk/faces.bin differ diff --git a/boards/ek-lm4f120xl-boost-olimex-8x8/faces/sourcerygxx/faces.axf b/boards/ek-lm4f120xl-boost-olimex-8x8/faces/sourcerygxx/faces.axf new file mode 100644 index 0000000..35130c4 Binary files /dev/null and b/boards/ek-lm4f120xl-boost-olimex-8x8/faces/sourcerygxx/faces.axf differ diff --git a/boards/ek-lm4f120xl-boost-olimex-8x8/faces/sourcerygxx/faces.bin b/boards/ek-lm4f120xl-boost-olimex-8x8/faces/sourcerygxx/faces.bin new file mode 100644 index 0000000..41f48da Binary files /dev/null and b/boards/ek-lm4f120xl-boost-olimex-8x8/faces/sourcerygxx/faces.bin differ diff --git a/boards/ek-lm4f120xl-boost-olimex-8x8/faces/startup_ccs.c b/boards/ek-lm4f120xl-boost-olimex-8x8/faces/startup_ccs.c new file mode 100644 index 0000000..43e5b0d --- /dev/null +++ b/boards/ek-lm4f120xl-boost-olimex-8x8/faces/startup_ccs.c @@ -0,0 +1,298 @@ +//***************************************************************************** +// +// startup_ccs.c - Startup code for use with TI's Code Composer Studio. +// +// Copyright (c) 2011-2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +//***************************************************************************** +// +// Forward declaration of the default fault handlers. +// +//***************************************************************************** +void ResetISR(void); +static void NmiSR(void); +static void FaultISR(void); +static void IntDefaultHandler(void); + +//***************************************************************************** +// +// External declaration for the reset handler that is to be called when the +// processor is started +// +//***************************************************************************** +extern void _c_int00(void); + +//***************************************************************************** +// +// Linker variable that marks the top of the stack. +// +//***************************************************************************** +extern unsigned long __STACK_TOP; + +//***************************************************************************** +// +// External declaration for the interrupt handler used by the application. +// +//***************************************************************************** +extern void SysTickIntHandler(void); + +//***************************************************************************** +// +// The vector table. Note that the proper constructs must be placed on this to +// ensure that it ends up at physical address 0x0000.0000 or at the start of +// the program if located at a start address other than 0. +// +//***************************************************************************** +#pragma DATA_SECTION(g_pfnVectors, ".intvecs") +void (* const g_pfnVectors[])(void) = +{ + (void (*)(void))((unsigned long)&__STACK_TOP), + // The initial stack pointer + ResetISR, // The reset handler + NmiSR, // The NMI handler + FaultISR, // The hard fault handler + IntDefaultHandler, // The MPU fault handler + IntDefaultHandler, // The bus fault handler + IntDefaultHandler, // The usage fault handler + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // SVCall handler + IntDefaultHandler, // Debug monitor handler + 0, // Reserved + IntDefaultHandler, // The PendSV handler + SysTickIntHandler, // The SysTick handler + IntDefaultHandler, // GPIO Port A + IntDefaultHandler, // GPIO Port B + IntDefaultHandler, // GPIO Port C + IntDefaultHandler, // GPIO Port D + IntDefaultHandler, // GPIO Port E + IntDefaultHandler, // UART0 Rx and Tx + IntDefaultHandler, // UART1 Rx and Tx + IntDefaultHandler, // SSI0 Rx and Tx + IntDefaultHandler, // I2C0 Master and Slave + IntDefaultHandler, // PWM Fault + IntDefaultHandler, // PWM Generator 0 + IntDefaultHandler, // PWM Generator 1 + IntDefaultHandler, // PWM Generator 2 + IntDefaultHandler, // Quadrature Encoder 0 + IntDefaultHandler, // ADC Sequence 0 + IntDefaultHandler, // ADC Sequence 1 + IntDefaultHandler, // ADC Sequence 2 + IntDefaultHandler, // ADC Sequence 3 + IntDefaultHandler, // Watchdog timer + IntDefaultHandler, // Timer 0 subtimer A + IntDefaultHandler, // Timer 0 subtimer B + IntDefaultHandler, // Timer 1 subtimer A + IntDefaultHandler, // Timer 1 subtimer B + IntDefaultHandler, // Timer 2 subtimer A + IntDefaultHandler, // Timer 2 subtimer B + IntDefaultHandler, // Analog Comparator 0 + IntDefaultHandler, // Analog Comparator 1 + IntDefaultHandler, // Analog Comparator 2 + IntDefaultHandler, // System Control (PLL, OSC, BO) + IntDefaultHandler, // FLASH Control + IntDefaultHandler, // GPIO Port F + IntDefaultHandler, // GPIO Port G + IntDefaultHandler, // GPIO Port H + IntDefaultHandler, // UART2 Rx and Tx + IntDefaultHandler, // SSI1 Rx and Tx + IntDefaultHandler, // Timer 3 subtimer A + IntDefaultHandler, // Timer 3 subtimer B + IntDefaultHandler, // I2C1 Master and Slave + IntDefaultHandler, // Quadrature Encoder 1 + IntDefaultHandler, // CAN0 + IntDefaultHandler, // CAN1 + IntDefaultHandler, // CAN2 + IntDefaultHandler, // Ethernet + IntDefaultHandler, // Hibernate + IntDefaultHandler, // USB0 + IntDefaultHandler, // PWM Generator 3 + IntDefaultHandler, // uDMA Software Transfer + IntDefaultHandler, // uDMA Error + IntDefaultHandler, // ADC1 Sequence 0 + IntDefaultHandler, // ADC1 Sequence 1 + IntDefaultHandler, // ADC1 Sequence 2 + IntDefaultHandler, // ADC1 Sequence 3 + IntDefaultHandler, // I2S0 + IntDefaultHandler, // External Bus Interface 0 + IntDefaultHandler, // GPIO Port J + IntDefaultHandler, // GPIO Port K + IntDefaultHandler, // GPIO Port L + IntDefaultHandler, // SSI2 Rx and Tx + IntDefaultHandler, // SSI3 Rx and Tx + IntDefaultHandler, // UART3 Rx and Tx + IntDefaultHandler, // UART4 Rx and Tx + IntDefaultHandler, // UART5 Rx and Tx + IntDefaultHandler, // UART6 Rx and Tx + IntDefaultHandler, // UART7 Rx and Tx + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // I2C2 Master and Slave + IntDefaultHandler, // I2C3 Master and Slave + IntDefaultHandler, // Timer 4 subtimer A + IntDefaultHandler, // Timer 4 subtimer B + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // Timer 5 subtimer A + IntDefaultHandler, // Timer 5 subtimer B + IntDefaultHandler, // Wide Timer 0 subtimer A + IntDefaultHandler, // Wide Timer 0 subtimer B + IntDefaultHandler, // Wide Timer 1 subtimer A + IntDefaultHandler, // Wide Timer 1 subtimer B + IntDefaultHandler, // Wide Timer 2 subtimer A + IntDefaultHandler, // Wide Timer 2 subtimer B + IntDefaultHandler, // Wide Timer 3 subtimer A + IntDefaultHandler, // Wide Timer 3 subtimer B + IntDefaultHandler, // Wide Timer 4 subtimer A + IntDefaultHandler, // Wide Timer 4 subtimer B + IntDefaultHandler, // Wide Timer 5 subtimer A + IntDefaultHandler, // Wide Timer 5 subtimer B + IntDefaultHandler, // FPU + IntDefaultHandler, // PECI 0 + IntDefaultHandler, // LPC 0 + IntDefaultHandler, // I2C4 Master and Slave + IntDefaultHandler, // I2C5 Master and Slave + IntDefaultHandler, // GPIO Port M + IntDefaultHandler, // GPIO Port N + IntDefaultHandler, // Quadrature Encoder 2 + IntDefaultHandler, // Fan 0 + 0, // Reserved + IntDefaultHandler, // GPIO Port P (Summary or P0) + IntDefaultHandler, // GPIO Port P1 + IntDefaultHandler, // GPIO Port P2 + IntDefaultHandler, // GPIO Port P3 + IntDefaultHandler, // GPIO Port P4 + IntDefaultHandler, // GPIO Port P5 + IntDefaultHandler, // GPIO Port P6 + IntDefaultHandler, // GPIO Port P7 + IntDefaultHandler, // GPIO Port Q (Summary or Q0) + IntDefaultHandler, // GPIO Port Q1 + IntDefaultHandler, // GPIO Port Q2 + IntDefaultHandler, // GPIO Port Q3 + IntDefaultHandler, // GPIO Port Q4 + IntDefaultHandler, // GPIO Port Q5 + IntDefaultHandler, // GPIO Port Q6 + IntDefaultHandler, // GPIO Port Q7 + IntDefaultHandler, // GPIO Port R + IntDefaultHandler, // GPIO Port S + IntDefaultHandler, // PWM 1 Generator 0 + IntDefaultHandler, // PWM 1 Generator 1 + IntDefaultHandler, // PWM 1 Generator 2 + IntDefaultHandler, // PWM 1 Generator 3 + IntDefaultHandler // PWM 1 Fault +}; + +//***************************************************************************** +// +// This is the code that gets called when the processor first starts execution +// following a reset event. Only the absolutely necessary set is performed, +// after which the application supplied entry() routine is called. Any fancy +// actions (such as making decisions based on the reset cause register, and +// resetting the bits in that register) are left solely in the hands of the +// application. +// +//***************************************************************************** +void +ResetISR(void) +{ + // + // Jump to the CCS C initialization routine. This will enable the + // floating-point unit as well, so that does not need to be done here. + // + __asm(" .global _c_int00\n" + " b.w _c_int00"); +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a NMI. This +// simply enters an infinite loop, preserving the system state for examination +// by a debugger. +// +//***************************************************************************** +static void +NmiSR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a fault +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +FaultISR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives an unexpected +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +IntDefaultHandler(void) +{ + // + // Go into an infinite loop. + // + while(1) + { + } +} diff --git a/boards/ek-lm4f120xl-boost-olimex-8x8/faces/startup_ewarm.c b/boards/ek-lm4f120xl-boost-olimex-8x8/faces/startup_ewarm.c new file mode 100644 index 0000000..a9f5f7f --- /dev/null +++ b/boards/ek-lm4f120xl-boost-olimex-8x8/faces/startup_ewarm.c @@ -0,0 +1,332 @@ +//***************************************************************************** +// +// startup_ewarm.c - Startup code for use with IAR's Embedded Workbench, +// version 5. +// +// Copyright (c) 2011-2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +#include "inc/hw_nvic.h" +#include "inc/hw_types.h" + +//***************************************************************************** +// +// Enable the IAR extensions for this source file. +// +//***************************************************************************** +#pragma language=extended + +//***************************************************************************** +// +// Forward declaration of the default fault handlers. +// +//***************************************************************************** +void ResetISR(void); +static void NmiSR(void); +static void FaultISR(void); +static void IntDefaultHandler(void); + +//***************************************************************************** +// +// External declaration for the interrupt handler used by the application. +// +//***************************************************************************** +extern void SysTickIntHandler(void); + +//***************************************************************************** +// +// The entry point for the application startup code. +// +//***************************************************************************** +extern void __iar_program_start(void); + +//***************************************************************************** +// +// Reserve space for the system stack. +// +//***************************************************************************** +static unsigned long pulStack[256] @ ".noinit"; + +//***************************************************************************** +// +// A union that describes the entries of the vector table. The union is needed +// since the first entry is the stack pointer and the remainder are function +// pointers. +// +//***************************************************************************** +typedef union +{ + void (*pfnHandler)(void); + unsigned long ulPtr; +} +uVectorEntry; + +//***************************************************************************** +// +// The vector table. Note that the proper constructs must be placed on this to +// ensure that it ends up at physical address 0x0000.0000. +// +//***************************************************************************** +__root const uVectorEntry __vector_table[] @ ".intvec" = +{ + { .ulPtr = (unsigned long)pulStack + sizeof(pulStack) }, + // The initial stack pointer + ResetISR, // The reset handler + NmiSR, // The NMI handler + FaultISR, // The hard fault handler + IntDefaultHandler, // The MPU fault handler + IntDefaultHandler, // The bus fault handler + IntDefaultHandler, // The usage fault handler + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // SVCall handler + IntDefaultHandler, // Debug monitor handler + 0, // Reserved + IntDefaultHandler, // The PendSV handler + SysTickIntHandler, // The SysTick handler + IntDefaultHandler, // GPIO Port A + IntDefaultHandler, // GPIO Port B + IntDefaultHandler, // GPIO Port C + IntDefaultHandler, // GPIO Port D + IntDefaultHandler, // GPIO Port E + IntDefaultHandler, // UART0 Rx and Tx + IntDefaultHandler, // UART1 Rx and Tx + IntDefaultHandler, // SSI0 Rx and Tx + IntDefaultHandler, // I2C0 Master and Slave + IntDefaultHandler, // PWM Fault + IntDefaultHandler, // PWM Generator 0 + IntDefaultHandler, // PWM Generator 1 + IntDefaultHandler, // PWM Generator 2 + IntDefaultHandler, // Quadrature Encoder 0 + IntDefaultHandler, // ADC Sequence 0 + IntDefaultHandler, // ADC Sequence 1 + IntDefaultHandler, // ADC Sequence 2 + IntDefaultHandler, // ADC Sequence 3 + IntDefaultHandler, // Watchdog timer + IntDefaultHandler, // Timer 0 subtimer A + IntDefaultHandler, // Timer 0 subtimer B + IntDefaultHandler, // Timer 1 subtimer A + IntDefaultHandler, // Timer 1 subtimer B + IntDefaultHandler, // Timer 2 subtimer A + IntDefaultHandler, // Timer 2 subtimer B + IntDefaultHandler, // Analog Comparator 0 + IntDefaultHandler, // Analog Comparator 1 + IntDefaultHandler, // Analog Comparator 2 + IntDefaultHandler, // System Control (PLL, OSC, BO) + IntDefaultHandler, // FLASH Control + IntDefaultHandler, // GPIO Port F + IntDefaultHandler, // GPIO Port G + IntDefaultHandler, // GPIO Port H + IntDefaultHandler, // UART2 Rx and Tx + IntDefaultHandler, // SSI1 Rx and Tx + IntDefaultHandler, // Timer 3 subtimer A + IntDefaultHandler, // Timer 3 subtimer B + IntDefaultHandler, // I2C1 Master and Slave + IntDefaultHandler, // Quadrature Encoder 1 + IntDefaultHandler, // CAN0 + IntDefaultHandler, // CAN1 + IntDefaultHandler, // CAN2 + IntDefaultHandler, // Ethernet + IntDefaultHandler, // Hibernate + IntDefaultHandler, // USB0 + IntDefaultHandler, // PWM Generator 3 + IntDefaultHandler, // uDMA Software Transfer + IntDefaultHandler, // uDMA Error + IntDefaultHandler, // ADC1 Sequence 0 + IntDefaultHandler, // ADC1 Sequence 1 + IntDefaultHandler, // ADC1 Sequence 2 + IntDefaultHandler, // ADC1 Sequence 3 + IntDefaultHandler, // I2S0 + IntDefaultHandler, // External Bus Interface 0 + IntDefaultHandler, // GPIO Port J + IntDefaultHandler, // GPIO Port K + IntDefaultHandler, // GPIO Port L + IntDefaultHandler, // SSI2 Rx and Tx + IntDefaultHandler, // SSI3 Rx and Tx + IntDefaultHandler, // UART3 Rx and Tx + IntDefaultHandler, // UART4 Rx and Tx + IntDefaultHandler, // UART5 Rx and Tx + IntDefaultHandler, // UART6 Rx and Tx + IntDefaultHandler, // UART7 Rx and Tx + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // I2C2 Master and Slave + IntDefaultHandler, // I2C3 Master and Slave + IntDefaultHandler, // Timer 4 subtimer A + IntDefaultHandler, // Timer 4 subtimer B + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // Timer 5 subtimer A + IntDefaultHandler, // Timer 5 subtimer B + IntDefaultHandler, // Wide Timer 0 subtimer A + IntDefaultHandler, // Wide Timer 0 subtimer B + IntDefaultHandler, // Wide Timer 1 subtimer A + IntDefaultHandler, // Wide Timer 1 subtimer B + IntDefaultHandler, // Wide Timer 2 subtimer A + IntDefaultHandler, // Wide Timer 2 subtimer B + IntDefaultHandler, // Wide Timer 3 subtimer A + IntDefaultHandler, // Wide Timer 3 subtimer B + IntDefaultHandler, // Wide Timer 4 subtimer A + IntDefaultHandler, // Wide Timer 4 subtimer B + IntDefaultHandler, // Wide Timer 5 subtimer A + IntDefaultHandler, // Wide Timer 5 subtimer B + IntDefaultHandler, // FPU + IntDefaultHandler, // PECI 0 + IntDefaultHandler, // LPC 0 + IntDefaultHandler, // I2C4 Master and Slave + IntDefaultHandler, // I2C5 Master and Slave + IntDefaultHandler, // GPIO Port M + IntDefaultHandler, // GPIO Port N + IntDefaultHandler, // Quadrature Encoder 2 + IntDefaultHandler, // Fan 0 + 0, // Reserved + IntDefaultHandler, // GPIO Port P (Summary or P0) + IntDefaultHandler, // GPIO Port P1 + IntDefaultHandler, // GPIO Port P2 + IntDefaultHandler, // GPIO Port P3 + IntDefaultHandler, // GPIO Port P4 + IntDefaultHandler, // GPIO Port P5 + IntDefaultHandler, // GPIO Port P6 + IntDefaultHandler, // GPIO Port P7 + IntDefaultHandler, // GPIO Port Q (Summary or Q0) + IntDefaultHandler, // GPIO Port Q1 + IntDefaultHandler, // GPIO Port Q2 + IntDefaultHandler, // GPIO Port Q3 + IntDefaultHandler, // GPIO Port Q4 + IntDefaultHandler, // GPIO Port Q5 + IntDefaultHandler, // GPIO Port Q6 + IntDefaultHandler, // GPIO Port Q7 + IntDefaultHandler, // GPIO Port R + IntDefaultHandler, // GPIO Port S + IntDefaultHandler, // PWM 1 Generator 0 + IntDefaultHandler, // PWM 1 Generator 1 + IntDefaultHandler, // PWM 1 Generator 2 + IntDefaultHandler, // PWM 1 Generator 3 + IntDefaultHandler // PWM 1 Fault +}; + +//***************************************************************************** +// +// This is the code that gets called when the processor first starts execution +// following a reset event. Only the absolutely necessary set is performed, +// after which the application supplied entry() routine is called. Any fancy +// actions (such as making decisions based on the reset cause register, and +// resetting the bits in that register) are left solely in the hands of the +// application. +// +//***************************************************************************** +void +ResetISR(void) +{ + // + // Enable the floating-point unit. This must be done here to handle the + // case where main() uses floating-point and the function prologue saves + // floating-point registers (which will fault if floating-point is not + // enabled). Any configuration of the floating-point unit using DriverLib + // APIs must be done here prior to the floating-point unit being enabled. + // + // Note that this does not use DriverLib since it might not be included in + // this project. + // + HWREG(NVIC_CPAC) = ((HWREG(NVIC_CPAC) & + ~(NVIC_CPAC_CP10_M | NVIC_CPAC_CP11_M)) | + NVIC_CPAC_CP10_FULL | NVIC_CPAC_CP11_FULL); + + // + // Call the application's entry point. + // + __iar_program_start(); +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a NMI. This +// simply enters an infinite loop, preserving the system state for examination +// by a debugger. +// +//***************************************************************************** +static void +NmiSR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a fault +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +FaultISR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives an unexpected +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +IntDefaultHandler(void) +{ + // + // Go into an infinite loop. + // + while(1) + { + } +} diff --git a/boards/ek-lm4f120xl-boost-olimex-8x8/faces/startup_gcc.c b/boards/ek-lm4f120xl-boost-olimex-8x8/faces/startup_gcc.c new file mode 100644 index 0000000..c020294 --- /dev/null +++ b/boards/ek-lm4f120xl-boost-olimex-8x8/faces/startup_gcc.c @@ -0,0 +1,348 @@ +//***************************************************************************** +// +// startup_gcc.c - Startup code for use with GNU tools. +// +// Copyright (c) 2011-2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +#include "inc/hw_nvic.h" +#include "inc/hw_types.h" + +//***************************************************************************** +// +// Forward declaration of the default fault handlers. +// +//***************************************************************************** +void ResetISR(void); +static void NmiSR(void); +static void FaultISR(void); +static void IntDefaultHandler(void); + +//***************************************************************************** +// +// External declaration for the interrupt handler used by the application. +// +//***************************************************************************** +extern void SysTickIntHandler(void); + +//***************************************************************************** +// +// The entry point for the application. +// +//***************************************************************************** +extern int main(void); + +//***************************************************************************** +// +// Reserve space for the system stack. +// +//***************************************************************************** +static unsigned long pulStack[256]; + +//***************************************************************************** +// +// The vector table. Note that the proper constructs must be placed on this to +// ensure that it ends up at physical address 0x0000.0000. +// +//***************************************************************************** +__attribute__ ((section(".isr_vector"))) +void (* const g_pfnVectors[])(void) = +{ + (void (*)(void))((unsigned long)pulStack + sizeof(pulStack)), + // The initial stack pointer + ResetISR, // The reset handler + NmiSR, // The NMI handler + FaultISR, // The hard fault handler + IntDefaultHandler, // The MPU fault handler + IntDefaultHandler, // The bus fault handler + IntDefaultHandler, // The usage fault handler + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // SVCall handler + IntDefaultHandler, // Debug monitor handler + 0, // Reserved + IntDefaultHandler, // The PendSV handler + SysTickIntHandler, // The SysTick handler + IntDefaultHandler, // GPIO Port A + IntDefaultHandler, // GPIO Port B + IntDefaultHandler, // GPIO Port C + IntDefaultHandler, // GPIO Port D + IntDefaultHandler, // GPIO Port E + IntDefaultHandler, // UART0 Rx and Tx + IntDefaultHandler, // UART1 Rx and Tx + IntDefaultHandler, // SSI0 Rx and Tx + IntDefaultHandler, // I2C0 Master and Slave + IntDefaultHandler, // PWM Fault + IntDefaultHandler, // PWM Generator 0 + IntDefaultHandler, // PWM Generator 1 + IntDefaultHandler, // PWM Generator 2 + IntDefaultHandler, // Quadrature Encoder 0 + IntDefaultHandler, // ADC Sequence 0 + IntDefaultHandler, // ADC Sequence 1 + IntDefaultHandler, // ADC Sequence 2 + IntDefaultHandler, // ADC Sequence 3 + IntDefaultHandler, // Watchdog timer + IntDefaultHandler, // Timer 0 subtimer A + IntDefaultHandler, // Timer 0 subtimer B + IntDefaultHandler, // Timer 1 subtimer A + IntDefaultHandler, // Timer 1 subtimer B + IntDefaultHandler, // Timer 2 subtimer A + IntDefaultHandler, // Timer 2 subtimer B + IntDefaultHandler, // Analog Comparator 0 + IntDefaultHandler, // Analog Comparator 1 + IntDefaultHandler, // Analog Comparator 2 + IntDefaultHandler, // System Control (PLL, OSC, BO) + IntDefaultHandler, // FLASH Control + IntDefaultHandler, // GPIO Port F + IntDefaultHandler, // GPIO Port G + IntDefaultHandler, // GPIO Port H + IntDefaultHandler, // UART2 Rx and Tx + IntDefaultHandler, // SSI1 Rx and Tx + IntDefaultHandler, // Timer 3 subtimer A + IntDefaultHandler, // Timer 3 subtimer B + IntDefaultHandler, // I2C1 Master and Slave + IntDefaultHandler, // Quadrature Encoder 1 + IntDefaultHandler, // CAN0 + IntDefaultHandler, // CAN1 + IntDefaultHandler, // CAN2 + IntDefaultHandler, // Ethernet + IntDefaultHandler, // Hibernate + IntDefaultHandler, // USB0 + IntDefaultHandler, // PWM Generator 3 + IntDefaultHandler, // uDMA Software Transfer + IntDefaultHandler, // uDMA Error + IntDefaultHandler, // ADC1 Sequence 0 + IntDefaultHandler, // ADC1 Sequence 1 + IntDefaultHandler, // ADC1 Sequence 2 + IntDefaultHandler, // ADC1 Sequence 3 + IntDefaultHandler, // I2S0 + IntDefaultHandler, // External Bus Interface 0 + IntDefaultHandler, // GPIO Port J + IntDefaultHandler, // GPIO Port K + IntDefaultHandler, // GPIO Port L + IntDefaultHandler, // SSI2 Rx and Tx + IntDefaultHandler, // SSI3 Rx and Tx + IntDefaultHandler, // UART3 Rx and Tx + IntDefaultHandler, // UART4 Rx and Tx + IntDefaultHandler, // UART5 Rx and Tx + IntDefaultHandler, // UART6 Rx and Tx + IntDefaultHandler, // UART7 Rx and Tx + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // I2C2 Master and Slave + IntDefaultHandler, // I2C3 Master and Slave + IntDefaultHandler, // Timer 4 subtimer A + IntDefaultHandler, // Timer 4 subtimer B + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // Timer 5 subtimer A + IntDefaultHandler, // Timer 5 subtimer B + IntDefaultHandler, // Wide Timer 0 subtimer A + IntDefaultHandler, // Wide Timer 0 subtimer B + IntDefaultHandler, // Wide Timer 1 subtimer A + IntDefaultHandler, // Wide Timer 1 subtimer B + IntDefaultHandler, // Wide Timer 2 subtimer A + IntDefaultHandler, // Wide Timer 2 subtimer B + IntDefaultHandler, // Wide Timer 3 subtimer A + IntDefaultHandler, // Wide Timer 3 subtimer B + IntDefaultHandler, // Wide Timer 4 subtimer A + IntDefaultHandler, // Wide Timer 4 subtimer B + IntDefaultHandler, // Wide Timer 5 subtimer A + IntDefaultHandler, // Wide Timer 5 subtimer B + IntDefaultHandler, // FPU + IntDefaultHandler, // PECI 0 + IntDefaultHandler, // LPC 0 + IntDefaultHandler, // I2C4 Master and Slave + IntDefaultHandler, // I2C5 Master and Slave + IntDefaultHandler, // GPIO Port M + IntDefaultHandler, // GPIO Port N + IntDefaultHandler, // Quadrature Encoder 2 + IntDefaultHandler, // Fan 0 + 0, // Reserved + IntDefaultHandler, // GPIO Port P (Summary or P0) + IntDefaultHandler, // GPIO Port P1 + IntDefaultHandler, // GPIO Port P2 + IntDefaultHandler, // GPIO Port P3 + IntDefaultHandler, // GPIO Port P4 + IntDefaultHandler, // GPIO Port P5 + IntDefaultHandler, // GPIO Port P6 + IntDefaultHandler, // GPIO Port P7 + IntDefaultHandler, // GPIO Port Q (Summary or Q0) + IntDefaultHandler, // GPIO Port Q1 + IntDefaultHandler, // GPIO Port Q2 + IntDefaultHandler, // GPIO Port Q3 + IntDefaultHandler, // GPIO Port Q4 + IntDefaultHandler, // GPIO Port Q5 + IntDefaultHandler, // GPIO Port Q6 + IntDefaultHandler, // GPIO Port Q7 + IntDefaultHandler, // GPIO Port R + IntDefaultHandler, // GPIO Port S + IntDefaultHandler, // PWM 1 Generator 0 + IntDefaultHandler, // PWM 1 Generator 1 + IntDefaultHandler, // PWM 1 Generator 2 + IntDefaultHandler, // PWM 1 Generator 3 + IntDefaultHandler // PWM 1 Fault +}; + +//***************************************************************************** +// +// The following are constructs created by the linker, indicating where the +// the "data" and "bss" segments reside in memory. The initializers for the +// for the "data" segment resides immediately following the "text" segment. +// +//***************************************************************************** +extern unsigned long _etext; +extern unsigned long _data; +extern unsigned long _edata; +extern unsigned long _bss; +extern unsigned long _ebss; + +//***************************************************************************** +// +// This is the code that gets called when the processor first starts execution +// following a reset event. Only the absolutely necessary set is performed, +// after which the application supplied entry() routine is called. Any fancy +// actions (such as making decisions based on the reset cause register, and +// resetting the bits in that register) are left solely in the hands of the +// application. +// +//***************************************************************************** +void +ResetISR(void) +{ + unsigned long *pulSrc, *pulDest; + + // + // Copy the data segment initializers from flash to SRAM. + // + pulSrc = &_etext; + for(pulDest = &_data; pulDest < &_edata; ) + { + *pulDest++ = *pulSrc++; + } + + // + // Zero fill the bss segment. + // + __asm(" ldr r0, =_bss\n" + " ldr r1, =_ebss\n" + " mov r2, #0\n" + " .thumb_func\n" + "zero_loop:\n" + " cmp r0, r1\n" + " it lt\n" + " strlt r2, [r0], #4\n" + " blt zero_loop"); + + // + // Enable the floating-point unit. This must be done here to handle the + // case where main() uses floating-point and the function prologue saves + // floating-point registers (which will fault if floating-point is not + // enabled). Any configuration of the floating-point unit using DriverLib + // APIs must be done here prior to the floating-point unit being enabled. + // + // Note that this does not use DriverLib since it might not be included in + // this project. + // + HWREG(NVIC_CPAC) = ((HWREG(NVIC_CPAC) & + ~(NVIC_CPAC_CP10_M | NVIC_CPAC_CP11_M)) | + NVIC_CPAC_CP10_FULL | NVIC_CPAC_CP11_FULL); + + // + // Call the application's entry point. + // + main(); +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a NMI. This +// simply enters an infinite loop, preserving the system state for examination +// by a debugger. +// +//***************************************************************************** +static void +NmiSR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a fault +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +FaultISR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives an unexpected +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +IntDefaultHandler(void) +{ + // + // Go into an infinite loop. + // + while(1) + { + } +} diff --git a/boards/ek-lm4f120xl-boost-olimex-8x8/faces/startup_rvmdk.S b/boards/ek-lm4f120xl-boost-olimex-8x8/faces/startup_rvmdk.S new file mode 100644 index 0000000..87e9d38 --- /dev/null +++ b/boards/ek-lm4f120xl-boost-olimex-8x8/faces/startup_rvmdk.S @@ -0,0 +1,358 @@ +; <<< Use Configuration Wizard in Context Menu >>> +;****************************************************************************** +; +; startup_rvmdk.S - Startup code for use with Keil's uVision. +; +; Copyright (c) 2011-2012 Texas Instruments Incorporated. All rights reserved. +; Software License Agreement +; +; Texas Instruments (TI) is supplying this software for use solely and +; exclusively on TI's microcontroller products. The software is owned by +; TI and/or its suppliers, and is protected under applicable copyright +; laws. You may not combine this software with "viral" open-source +; software in order to form a larger program. +; +; THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +; NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +; NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +; A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +; CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +; DAMAGES, FOR ANY REASON WHATSOEVER. +; +; This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +; +;****************************************************************************** + +;****************************************************************************** +; +; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +; +;****************************************************************************** +Stack EQU 0x00000400 + +;****************************************************************************** +; +; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> +; +;****************************************************************************** +Heap EQU 0x00000000 + +;****************************************************************************** +; +; Allocate space for the stack. +; +;****************************************************************************** + AREA STACK, NOINIT, READWRITE, ALIGN=3 +StackMem + SPACE Stack +__initial_sp + +;****************************************************************************** +; +; Allocate space for the heap. +; +;****************************************************************************** + AREA HEAP, NOINIT, READWRITE, ALIGN=3 +__heap_base +HeapMem + SPACE Heap +__heap_limit + +;****************************************************************************** +; +; Indicate that the code in this file preserves 8-byte alignment of the stack. +; +;****************************************************************************** + PRESERVE8 + +;****************************************************************************** +; +; Place code into the reset code section. +; +;****************************************************************************** + AREA RESET, CODE, READONLY + THUMB + +;****************************************************************************** +; +; External declaration for the interrupt handler used by the application. +; +;****************************************************************************** + EXTERN SysTickIntHandler + +;****************************************************************************** +; +; The vector table. +; +;****************************************************************************** + EXPORT __Vectors +__Vectors + DCD StackMem + Stack ; Top of Stack + DCD Reset_Handler ; Reset Handler + DCD NmiSR ; NMI Handler + DCD FaultISR ; Hard Fault Handler + DCD IntDefaultHandler ; The MPU fault handler + DCD IntDefaultHandler ; The bus fault handler + DCD IntDefaultHandler ; The usage fault handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD IntDefaultHandler ; SVCall handler + DCD IntDefaultHandler ; Debug monitor handler + DCD 0 ; Reserved + DCD IntDefaultHandler ; The PendSV handler + DCD SysTickIntHandler ; The SysTick handler + DCD IntDefaultHandler ; GPIO Port A + DCD IntDefaultHandler ; GPIO Port B + DCD IntDefaultHandler ; GPIO Port C + DCD IntDefaultHandler ; GPIO Port D + DCD IntDefaultHandler ; GPIO Port E + DCD IntDefaultHandler ; UART0 Rx and Tx + DCD IntDefaultHandler ; UART1 Rx and Tx + DCD IntDefaultHandler ; SSI0 Rx and Tx + DCD IntDefaultHandler ; I2C0 Master and Slave + DCD IntDefaultHandler ; PWM Fault + DCD IntDefaultHandler ; PWM Generator 0 + DCD IntDefaultHandler ; PWM Generator 1 + DCD IntDefaultHandler ; PWM Generator 2 + DCD IntDefaultHandler ; Quadrature Encoder 0 + DCD IntDefaultHandler ; ADC Sequence 0 + DCD IntDefaultHandler ; ADC Sequence 1 + DCD IntDefaultHandler ; ADC Sequence 2 + DCD IntDefaultHandler ; ADC Sequence 3 + DCD IntDefaultHandler ; Watchdog timer + DCD IntDefaultHandler ; Timer 0 subtimer A + DCD IntDefaultHandler ; Timer 0 subtimer B + DCD IntDefaultHandler ; Timer 1 subtimer A + DCD IntDefaultHandler ; Timer 1 subtimer B + DCD IntDefaultHandler ; Timer 2 subtimer A + DCD IntDefaultHandler ; Timer 2 subtimer B + DCD IntDefaultHandler ; Analog Comparator 0 + DCD IntDefaultHandler ; Analog Comparator 1 + DCD IntDefaultHandler ; Analog Comparator 2 + DCD IntDefaultHandler ; System Control (PLL, OSC, BO) + DCD IntDefaultHandler ; FLASH Control + DCD IntDefaultHandler ; GPIO Port F + DCD IntDefaultHandler ; GPIO Port G + DCD IntDefaultHandler ; GPIO Port H + DCD IntDefaultHandler ; UART2 Rx and Tx + DCD IntDefaultHandler ; SSI1 Rx and Tx + DCD IntDefaultHandler ; Timer 3 subtimer A + DCD IntDefaultHandler ; Timer 3 subtimer B + DCD IntDefaultHandler ; I2C1 Master and Slave + DCD IntDefaultHandler ; Quadrature Encoder 1 + DCD IntDefaultHandler ; CAN0 + DCD IntDefaultHandler ; CAN1 + DCD IntDefaultHandler ; CAN2 + DCD IntDefaultHandler ; Ethernet + DCD IntDefaultHandler ; Hibernate + DCD IntDefaultHandler ; USB0 + DCD IntDefaultHandler ; PWM Generator 3 + DCD IntDefaultHandler ; uDMA Software Transfer + DCD IntDefaultHandler ; uDMA Error + DCD IntDefaultHandler ; ADC1 Sequence 0 + DCD IntDefaultHandler ; ADC1 Sequence 1 + DCD IntDefaultHandler ; ADC1 Sequence 2 + DCD IntDefaultHandler ; ADC1 Sequence 3 + DCD IntDefaultHandler ; I2S0 + DCD IntDefaultHandler ; External Bus Interface 0 + DCD IntDefaultHandler ; GPIO Port J + DCD IntDefaultHandler ; GPIO Port K + DCD IntDefaultHandler ; GPIO Port L + DCD IntDefaultHandler ; SSI2 Rx and Tx + DCD IntDefaultHandler ; SSI3 Rx and Tx + DCD IntDefaultHandler ; UART3 Rx and Tx + DCD IntDefaultHandler ; UART4 Rx and Tx + DCD IntDefaultHandler ; UART5 Rx and Tx + DCD IntDefaultHandler ; UART6 Rx and Tx + DCD IntDefaultHandler ; UART7 Rx and Tx + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD IntDefaultHandler ; I2C2 Master and Slave + DCD IntDefaultHandler ; I2C3 Master and Slave + DCD IntDefaultHandler ; Timer 4 subtimer A + DCD IntDefaultHandler ; Timer 4 subtimer B + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD IntDefaultHandler ; Timer 5 subtimer A + DCD IntDefaultHandler ; Timer 5 subtimer B + DCD IntDefaultHandler ; Wide Timer 0 subtimer A + DCD IntDefaultHandler ; Wide Timer 0 subtimer B + DCD IntDefaultHandler ; Wide Timer 1 subtimer A + DCD IntDefaultHandler ; Wide Timer 1 subtimer B + DCD IntDefaultHandler ; Wide Timer 2 subtimer A + DCD IntDefaultHandler ; Wide Timer 2 subtimer B + DCD IntDefaultHandler ; Wide Timer 3 subtimer A + DCD IntDefaultHandler ; Wide Timer 3 subtimer B + DCD IntDefaultHandler ; Wide Timer 4 subtimer A + DCD IntDefaultHandler ; Wide Timer 4 subtimer B + DCD IntDefaultHandler ; Wide Timer 5 subtimer A + DCD IntDefaultHandler ; Wide Timer 5 subtimer B + DCD IntDefaultHandler ; FPU + DCD IntDefaultHandler ; PECI 0 + DCD IntDefaultHandler ; LPC 0 + DCD IntDefaultHandler ; I2C4 Master and Slave + DCD IntDefaultHandler ; I2C5 Master and Slave + DCD IntDefaultHandler ; GPIO Port M + DCD IntDefaultHandler ; GPIO Port N + DCD IntDefaultHandler ; Quadrature Encoder 2 + DCD IntDefaultHandler ; Fan 0 + DCD 0 ; Reserved + DCD IntDefaultHandler ; GPIO Port P (Summary or P0) + DCD IntDefaultHandler ; GPIO Port P1 + DCD IntDefaultHandler ; GPIO Port P2 + DCD IntDefaultHandler ; GPIO Port P3 + DCD IntDefaultHandler ; GPIO Port P4 + DCD IntDefaultHandler ; GPIO Port P5 + DCD IntDefaultHandler ; GPIO Port P6 + DCD IntDefaultHandler ; GPIO Port P7 + DCD IntDefaultHandler ; GPIO Port Q (Summary or Q0) + DCD IntDefaultHandler ; GPIO Port Q1 + DCD IntDefaultHandler ; GPIO Port Q2 + DCD IntDefaultHandler ; GPIO Port Q3 + DCD IntDefaultHandler ; GPIO Port Q4 + DCD IntDefaultHandler ; GPIO Port Q5 + DCD IntDefaultHandler ; GPIO Port Q6 + DCD IntDefaultHandler ; GPIO Port Q7 + DCD IntDefaultHandler ; GPIO Port R + DCD IntDefaultHandler ; GPIO Port S + DCD IntDefaultHandler ; PWM 1 Generator 0 + DCD IntDefaultHandler ; PWM 1 Generator 1 + DCD IntDefaultHandler ; PWM 1 Generator 2 + DCD IntDefaultHandler ; PWM 1 Generator 3 + DCD IntDefaultHandler ; PWM 1 Fault + +;****************************************************************************** +; +; This is the code that gets called when the processor first starts execution +; following a reset event. +; +;****************************************************************************** + EXPORT Reset_Handler +Reset_Handler + ; + ; Enable the floating-point unit. This must be done here to handle the + ; case where main() uses floating-point and the function prologue saves + ; floating-point registers (which will fault if floating-point is not + ; enabled). Any configuration of the floating-point unit using + ; DriverLib APIs must be done here prior to the floating-point unit + ; being enabled. + ; + ; Note that this does not use DriverLib since it might not be included + ; in this project. + ; + MOVW R0, #0xED88 + MOVT R0, #0xE000 + LDR R1, [R0] + ORR R1, #0x00F00000 + STR R1, [R0] + + ; + ; Call the C library enty point that handles startup. This will copy + ; the .data section initializers from flash to SRAM and zero fill the + ; .bss section. + ; + IMPORT __main + B __main + +;****************************************************************************** +; +; This is the code that gets called when the processor receives a NMI. This +; simply enters an infinite loop, preserving the system state for examination +; by a debugger. +; +;****************************************************************************** +NmiSR + B NmiSR + +;****************************************************************************** +; +; This is the code that gets called when the processor receives a fault +; interrupt. This simply enters an infinite loop, preserving the system state +; for examination by a debugger. +; +;****************************************************************************** +FaultISR + B FaultISR + +;****************************************************************************** +; +; This is the code that gets called when the processor receives an unexpected +; interrupt. This simply enters an infinite loop, preserving the system state +; for examination by a debugger. +; +;****************************************************************************** +IntDefaultHandler + B IntDefaultHandler + +;****************************************************************************** +; +; Make sure the end of this section is aligned. +; +;****************************************************************************** + ALIGN + +;****************************************************************************** +; +; Some code in the normal code section for initializing the heap and stack. +; +;****************************************************************************** + AREA |.text|, CODE, READONLY + +;****************************************************************************** +; +; The function expected of the C library startup code for defining the stack +; and heap memory locations. For the C library version of the startup code, +; provide this function so that the C library initialization code can find out +; the location of the stack and heap. +; +;****************************************************************************** + IF :DEF: __MICROLIB + EXPORT __initial_sp + EXPORT __heap_base + EXPORT __heap_limit + ELSE + IMPORT __use_two_region_memory + EXPORT __user_initial_stackheap +__user_initial_stackheap + LDR R0, =HeapMem + LDR R1, =(StackMem + Stack) + LDR R2, =(HeapMem + Heap) + LDR R3, =StackMem + BX LR + ENDIF + +;****************************************************************************** +; +; Make sure the end of this section is aligned. +; +;****************************************************************************** + ALIGN + +;****************************************************************************** +; +; Tell the assembler that we're done. +; +;****************************************************************************** + END diff --git a/boards/ek-lm4f120xl-boost-olimex-8x8/faces/startup_sourcerygxx.S b/boards/ek-lm4f120xl-boost-olimex-8x8/faces/startup_sourcerygxx.S new file mode 100644 index 0000000..2e9a508 --- /dev/null +++ b/boards/ek-lm4f120xl-boost-olimex-8x8/faces/startup_sourcerygxx.S @@ -0,0 +1,75 @@ +//***************************************************************************** +// +// startup_sourcerygxx.S - Startup code for Sourcery CodeBench. +// +// Copyright (c) 2011-2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + + .syntax unified + .thumb + +//***************************************************************************** +// +// Place this code into the .cs3.reset section so that it can be executed prior +// to the startup code in Sourcery CodeBench. +// +//***************************************************************************** + .section .cs3.reset,"x" + +//***************************************************************************** +// +// The reset handler, which overrides the one provided by CS3. +// +//***************************************************************************** + .globl __cs3_reset + .thumb_func +__cs3_reset: + // + // Enable the floating-point unit. This must be done here to handle the + // case where main() uses floating-point and the function prologue saves + // floating-point registers (which will fault if floating-point is not + // enabled). Any configuration of the floating-point unit using DriverLib + // APIs must be done here prior to the floating-point unit being enabled. + // + // Note that this does not use DriverLib since it might not be included in + // this project. + // + movw r0, #0xed88 + movt r0, #0xe000 + ldr r1, [r0] + orr r1, #0x00f00000 + str r1, [r0] + + // + // Branch to the normal CS3 startup code. + // + .extern __cs3_reset_ekc_lm4f232 + ldr r0, =__cs3_reset_ekc_lm4f232 + bx r0 + + // + // Place the literal pool here. + // + .ltorg + + // + // The end of the file. + // + .end diff --git a/boards/ek-lm4f120xl/Makefile b/boards/ek-lm4f120xl/Makefile new file mode 100644 index 0000000..93cf932 --- /dev/null +++ b/boards/ek-lm4f120xl/Makefile @@ -0,0 +1,60 @@ +#****************************************************************************** +# +# Makefile - Rules for building the ek-lm4f120xl examples. +# +# Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +# Software License Agreement +# +# Texas Instruments (TI) is supplying this software for use solely and +# exclusively on TI's microcontroller products. The software is owned by +# TI and/or its suppliers, and is protected under applicable copyright +# laws. You may not combine this software with "viral" open-source +# software in order to form a larger program. +# +# THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +# NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +# NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +# A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +# CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +# DAMAGES, FOR ANY REASON WHATSOEVER. +# +# This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +# +#****************************************************************************** + +# +# A list of the directories containing the examples. +# +DIRS=bitband \ + blinky \ + freertos_demo \ + gpio_jtag \ + hello \ + interrupts \ + mpu_fault \ + project0 \ + qs-rgb \ + timers \ + uart_echo \ + udma_demo \ + usb_dev_bulk \ + usb_dev_serial + +# +# The default rule, which causes the examples to be built. +# +all: + @for i in ${DIRS}; \ + do \ + make -C $${i} || exit $$?; \ + done + +# +# The rule to clean out all the build products. +# +clean: + @rm -rf ${wildcard *~} __dummy__ + @-for i in ${DIRS}; \ + do \ + make -C $${i} clean; \ + done diff --git a/boards/ek-lm4f120xl/bitband/Makefile b/boards/ek-lm4f120xl/bitband/Makefile new file mode 100644 index 0000000..3b22c9c --- /dev/null +++ b/boards/ek-lm4f120xl/bitband/Makefile @@ -0,0 +1,91 @@ +#****************************************************************************** +# +# Makefile - Rules for building the bitband example. +# +# Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +# Software License Agreement +# +# Texas Instruments (TI) is supplying this software for use solely and +# exclusively on TI's microcontroller products. The software is owned by +# TI and/or its suppliers, and is protected under applicable copyright +# laws. You may not combine this software with "viral" open-source +# software in order to form a larger program. +# +# THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +# NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +# NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +# A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +# CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +# DAMAGES, FOR ANY REASON WHATSOEVER. +# +# This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +# +#****************************************************************************** + +# +# Defines the part type that this project uses. +# +PART=LM4F120H5QR + +# +# Set the processor variant. +# +VARIANT=cm4f + +# +# The base directory for StellarisWare. +# +ROOT=../../.. + +# +# Include the common make definitions. +# +include ${ROOT}/makedefs + +# +# Where to find source files that do not live in this directory. +# +VPATH=../../../utils + +# +# Where to find header files that do not live in the source directory. +# +IPATH=.. +IPATH+=../../.. + +# +# The default rule, which causes the bitband example to be built. +# +all: ${COMPILER} +all: ${COMPILER}/bitband.axf + +# +# The rule to clean out all the build products. +# +clean: + @rm -rf ${COMPILER} ${wildcard *~} + +# +# The rule to create the target directory. +# +${COMPILER}: + @mkdir -p ${COMPILER} + +# +# Rules for building the bitband example. +# +${COMPILER}/bitband.axf: ${COMPILER}/bitband.o +${COMPILER}/bitband.axf: ${COMPILER}/startup_${COMPILER}.o +${COMPILER}/bitband.axf: ${COMPILER}/uartstdio.o +${COMPILER}/bitband.axf: ${ROOT}/driverlib/${COMPILER}-cm4f/libdriver-cm4f.a +${COMPILER}/bitband.axf: bitband.ld +SCATTERgcc_bitband=bitband.ld +ENTRY_bitband=ResetISR +CFLAGSgcc=-DTARGET_IS_BLIZZARD_RA1 + +# +# Include the automatically generated dependency files. +# +ifneq (${MAKECMDGOALS},clean) +-include ${wildcard ${COMPILER}/*.d} __dummy__ +endif diff --git a/boards/ek-lm4f120xl/bitband/bitband.c b/boards/ek-lm4f120xl/bitband/bitband.c new file mode 100644 index 0000000..52b1b15 --- /dev/null +++ b/boards/ek-lm4f120xl/bitband/bitband.c @@ -0,0 +1,220 @@ +//***************************************************************************** +// +// bitband.c - Bit-band manipulation example. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +#include "inc/hw_memmap.h" +#include "inc/hw_types.h" +#include "driverlib/debug.h" +#include "driverlib/gpio.h" +#include "driverlib/fpu.h" +#include "driverlib/pin_map.h" +#include "driverlib/sysctl.h" +#include "driverlib/systick.h" +#include "driverlib/rom.h" +#include "utils/uartstdio.h" + +//***************************************************************************** +// +//! \addtogroup example_list +//!

Bit-Banding (bitband)

+//! +//! This example application demonstrates the use of the bit-banding +//! capabilities of the Cortex-M4F microprocessor. All of SRAM and all of the +//! peripherals reside within bit-band regions, meaning that bit-banding +//! operations can be applied to any of them. In this example, a variable in +//! SRAM is set to a particular value one bit at a time using bit-banding +//! operations (it would be more efficient to do a single non-bit-banded write; +//! this simply demonstrates the operation of bit-banding). +// +//***************************************************************************** + + +//***************************************************************************** +// +// The value that is to be modified via bit-banding. +// +//***************************************************************************** +static volatile unsigned long g_ulValue; + +//***************************************************************************** +// +// The error routine that is called if the driver library encounters an error. +// +//***************************************************************************** +#ifdef DEBUG +void +__error__(char *pcFilename, unsigned long ulLine) +{ +} +#endif + +//***************************************************************************** +// +// Delay for the specified number of seconds. Depending upon the current +// SysTick value, the delay will be between N-1 and N seconds (i.e. N-1 full +// seconds are guaranteed, along with the remainder of the current second). +// +//***************************************************************************** +void +Delay(unsigned long ulSeconds) +{ + // + // Loop while there are more seconds to wait. + // + while(ulSeconds--) + { + // + // Wait until the SysTick value is less than 1000. + // + while(ROM_SysTickValueGet() > 1000) + { + } + + // + // Wait until the SysTick value is greater than 1000. + // + while(ROM_SysTickValueGet() < 1000) + { + } + } +} + + +//***************************************************************************** +// +// This example demonstrates the use of bit-banding to set individual bits +// within a word of SRAM. +// +//***************************************************************************** +int +main(void) +{ + unsigned long ulErrors, ulIdx; + + // + // Enable lazy stacking for interrupt handlers. This allows floating-point + // instructions to be used within interrupt handlers, but at the expense of + // extra stack usage. + // + ROM_FPULazyStackingEnable(); + + // + // Set the clocking to run directly from the crystal. + // + ROM_SysCtlClockSet(SYSCTL_SYSDIV_1 | SYSCTL_USE_OSC | SYSCTL_OSC_MAIN | + SYSCTL_XTAL_16MHZ); + + // + // Initialize the UART interface. + // + ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA); + GPIOPinConfigure(GPIO_PA0_U0RX); + GPIOPinConfigure(GPIO_PA1_U0TX); + ROM_GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_1); + UARTStdioInit(0); + UARTprintf("\033[2JBit banding...\n"); + + // + // Set up and enable the SysTick timer. It will be used as a reference + // for delay loops. The SysTick timer period will be set up for one + // second. + // + ROM_SysTickPeriodSet(ROM_SysCtlClockGet()); + ROM_SysTickEnable(); + + // + // Set the value and error count to zero. + // + g_ulValue = 0; + ulErrors = 0; + + // + // Print the initial value to the UART. + // + UARTprintf("\r%08x", g_ulValue); + + // + // Delay for 1 second. + // + Delay(1); + + // + // Set the value to 0xdecafbad using bit band accesses to each individual + // bit. + // + for(ulIdx = 0; ulIdx < 32; ulIdx++) + { + // + // Set this bit. + // + HWREGBITW(&g_ulValue, 31 - ulIdx) = (0xdecafbad >> (31 - ulIdx)) & 1; + + // + // Print the current value to the UART. + // + UARTprintf("\r%08x", g_ulValue); + + // + // Delay for 1 second. + // + Delay(1); + } + + // + // Make sure that the value is 0xdecafbad. + // + if(g_ulValue != 0xdecafbad) + { + ulErrors++; + } + + // + // Make sure that the individual bits read back correctly. + // + for(ulIdx = 0; ulIdx < 32; ulIdx++) + { + if(HWREGBITW(&g_ulValue, ulIdx) != ((0xdecafbad >> ulIdx) & 1)) + { + ulErrors++; + } + } + + // + // Print out the result. + // + if(ulErrors) + { + UARTprintf("\nErrors!\n"); + } + else + { + UARTprintf("\nSuccess!\n"); + } + + // + // Loop forever. + // + while(1) + { + } +} diff --git a/boards/ek-lm4f120xl/bitband/bitband.ewd b/boards/ek-lm4f120xl/bitband/bitband.ewd new file mode 100644 index 0000000..b8eeac7 --- /dev/null +++ b/boards/ek-lm4f120xl/bitband/bitband.ewd @@ -0,0 +1,614 @@ + + + + 1 + + Debug + + ARM + + 1 + + C-SPY + 2 + + 15 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + ARMSIM_ID + 2 + + 1 + 1 + 1 + + + + + + + + ANGEL_ID + 2 + + 0 + 1 + 1 + + + + + + + + + + + + GDBSERVER_ID + 2 + + 0 + 1 + 1 + + + + + + + + + + + IARROM_ID + 2 + + 0 + 1 + 1 + + + + + + + + + + JLINK_ID + 2 + + 9 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + LMIFTDI_ID + 2 + + 1 + 1 + 1 + + + + + + + + MACRAIGOR_ID + 2 + + 2 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + RDI_ID + 2 + + 1 + 1 + 1 + + + + + + + + + + + + + + + + + THIRDPARTY_ID + 2 + + 0 + 1 + 1 + + + + + + + + + $TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\OSE\OseEpsilonPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\PowerPac\PowerPacRTOS.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin + 0 + + + $EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin + 1 + + + $EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin + 0 + + + $EW_DIR$\common\plugins\Profiling\Profiling.ENU.ewplugin + 1 + + + $EW_DIR$\common\plugins\Stack\Stack.ENU.ewplugin + 1 + + + + diff --git a/boards/ek-lm4f120xl/bitband/bitband.ewp b/boards/ek-lm4f120xl/bitband/bitband.ewp new file mode 100644 index 0000000..2c109cd --- /dev/null +++ b/boards/ek-lm4f120xl/bitband/bitband.ewp @@ -0,0 +1,789 @@ + + + + 1 + + Debug + + ARM + + 1 + + General + 3 + + 14 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCARM + 2 + + 19 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AARM + 2 + + 7 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + OBJCOPY + 0 + + 1 + 1 + 1 + + + + + + + + + CUSTOM + 3 + + + + + + + BICOMP + 0 + + + + BUILDACTION + 1 + + + + + + + ILINK + 0 + + 5 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + IARCHIVE + 0 + + 0 + 1 + 1 + + + + + + + BILINK + 0 + + + + + Libraries + + $PROJ_DIR$\..\..\..\driverlib\ewarm-cm4f\Exe\driverlib-cm4f.a + + + + Source + + $PROJ_DIR$\bitband.c + + + $PROJ_DIR$\startup_ewarm.c + + + $PROJ_DIR$\..\..\..\utils\uartstdio.c + + + diff --git a/boards/ek-lm4f120xl/bitband/bitband.icf b/boards/ek-lm4f120xl/bitband/bitband.icf new file mode 100644 index 0000000..3c86b3a --- /dev/null +++ b/boards/ek-lm4f120xl/bitband/bitband.icf @@ -0,0 +1,78 @@ +//***************************************************************************** +// +// bitband.icf - Linker configuration file for bitband. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +// +// Define a memory region that covers the entire 4 GB addressible space of the +// processor. +// +define memory mem with size = 4G; + +// +// Define a region for the on-chip flash. +// +define region FLASH = mem:[from 0x00000000 to 0x0003ffff]; + +// +// Define a region for the on-chip SRAM. +// +define region SRAM = mem:[from 0x20000000 to 0x20007fff]; + +// +// Define a block for the heap. The size should be set to something other +// than zero if things in the C library that require the heap are used. +// +define block HEAP with alignment = 8, size = 0x00000000 { }; + +// +// Indicate that the read/write values should be initialized by copying from +// flash. +// +initialize by copy { readwrite }; + +// +// Indicate that the noinit values should be left alone. This includes the +// stack, which if initialized will destroy the return address from the +// initialization code, causing the processor to branch to zero and fault. +// +do not initialize { section .noinit }; + +// +// Place the interrupt vectors at the start of flash. +// +place at start of FLASH { readonly section .intvec }; + +// +// Place the remainder of the read-only items into flash. +// +place in FLASH { readonly }; + +// +// Place the RAM vector table at the start of SRAM. +// +place at start of SRAM { section VTABLE }; + +// +// Place all read/write items into SRAM. +// +place in SRAM { readwrite, block HEAP }; diff --git a/boards/ek-lm4f120xl/bitband/bitband.ld b/boards/ek-lm4f120xl/bitband/bitband.ld new file mode 100644 index 0000000..5a25be7 --- /dev/null +++ b/boards/ek-lm4f120xl/bitband/bitband.ld @@ -0,0 +1,57 @@ +/****************************************************************************** + * + * bitband.ld - Linker configuration file for bitband. + * + * Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. + * Software License Agreement + * + * Texas Instruments (TI) is supplying this software for use solely and + * exclusively on TI's microcontroller products. The software is owned by + * TI and/or its suppliers, and is protected under applicable copyright + * laws. You may not combine this software with "viral" open-source + * software in order to form a larger program. + * + * THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. + * NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT + * NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY + * CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL + * DAMAGES, FOR ANY REASON WHATSOEVER. + * + * This is part of revision 9453 of the EK-LM4F120XL Firmware Package. + * + *****************************************************************************/ + +MEMORY +{ + FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x00040000 + SRAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00008000 +} + +SECTIONS +{ + .text : + { + _text = .; + KEEP(*(.isr_vector)) + *(.text*) + *(.rodata*) + _etext = .; + } > FLASH + + .data : AT(ADDR(.text) + SIZEOF(.text)) + { + _data = .; + *(vtable) + *(.data*) + _edata = .; + } > SRAM + + .bss : + { + _bss = .; + *(.bss*) + *(COMMON) + _ebss = .; + } > SRAM +} diff --git a/boards/ek-lm4f120xl/bitband/bitband.sct b/boards/ek-lm4f120xl/bitband/bitband.sct new file mode 100644 index 0000000..e44b14d --- /dev/null +++ b/boards/ek-lm4f120xl/bitband/bitband.sct @@ -0,0 +1,47 @@ +;****************************************************************************** +; +; bitband.sct - Linker configuration file for bitband. +; +; Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +; Software License Agreement +; +; Texas Instruments (TI) is supplying this software for use solely and +; exclusively on TI's microcontroller products. The software is owned by +; TI and/or its suppliers, and is protected under applicable copyright +; laws. You may not combine this software with "viral" open-source +; software in order to form a larger program. +; +; THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +; NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +; NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +; A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +; CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +; DAMAGES, FOR ANY REASON WHATSOEVER. +; +; This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +; +;****************************************************************************** + +LR_IROM 0x00000000 0x00040000 +{ + ; + ; Specify the Execution Address of the code and the size. + ; + ER_IROM 0x00000000 0x00040000 + { + *.o (RESET, +First) + * (InRoot$$Sections, +RO) + } + + ; + ; Specify the Execution Address of the data area. + ; + RW_IRAM 0x20000000 0x00008000 + { + ; + ; Uncomment the following line in order to use IntRegister(). + ; + ;* (vtable, +First) + * (+RW, +ZI) + } +} diff --git a/boards/ek-lm4f120xl/bitband/bitband.sgxx b/boards/ek-lm4f120xl/bitband/bitband.sgxx new file mode 100644 index 0000000..5accdac Binary files /dev/null and b/boards/ek-lm4f120xl/bitband/bitband.sgxx differ diff --git a/boards/ek-lm4f120xl/bitband/bitband.uvopt b/boards/ek-lm4f120xl/bitband/bitband.uvopt new file mode 100644 index 0000000..b4904a3 --- /dev/null +++ b/boards/ek-lm4f120xl/bitband/bitband.uvopt @@ -0,0 +1,303 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + + + + 0 + 0 + + + + bitband + 0x4 + ARM-ADS + + 8000000 + + 1 + 1 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\rvmdk\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 255 + + + 0 + Data Sheet + DATASHTS\Luminary\LM4F120H5QR.PDF + + + + SARMCM3.DLL + -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 0 + 1 + 0 + 0 + 4 + + + + + + + + + + + BIN\lmidk-agdi.dll + + + + 0 + lmidk-agdi + -O4614 -S3 -FO29 + + + 0 + DLGTARM + + + + 0 + ARMDBGFLAGS + + + + + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + Source + 1 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + .\bitband.c + bitband.c + + + 1 + 2 + 2 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + .\startup_rvmdk.S + startup_rvmdk.S + + + 1 + 3 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\utils\uartstdio.c + uartstdio.c + + + + + Libraries + 1 + 0 + 0 + + 2 + 4 + 4 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\driverlib\rvmdk-cm4f\driverlib-cm4f.lib + driverlib-cm4f.lib + + + + + Documentation + 1 + 0 + 0 + + 3 + 5 + 5 + 0 + 1 + 0 + 0 + 1 + 1 + 0 + .\readme.txt + readme.txt + + 44 + 0 + 1 + + -1 + -1 + + + -1 + -1 + + + 0 + 0 + 729 + 300 + + + + + + + 1 + 0 + + 100 + 0 + + + .\readme.txt + 0 + 1 + 1 + + + + + + diff --git a/boards/ek-lm4f120xl/bitband/bitband.uvproj b/boards/ek-lm4f120xl/bitband/bitband.uvproj new file mode 100644 index 0000000..ab95318 --- /dev/null +++ b/boards/ek-lm4f120xl/bitband/bitband.uvproj @@ -0,0 +1,429 @@ + + + + 1.1 + +
### uVision Project, (C) Keil Software
+ + + + bitband + 0x4 + ARM-ADS + + + LM4F120H5QR + Texas Instruments + IRAM(0x20000000-0x20007FFF) IROM(0-0x3FFFF) CLOCK(8000000) CPUTYPE("Cortex-M4") FPU2 + + "STARTUP\Luminary\Startup.s" ("Luminary Startup Code") + UL2CM3(-O207 -S0 -C0 -FO7 -FD20000000 -FC800 -FN1 -FF0LM4F_256 -FS00 -FL040000) + 5919 + LM4Fxxxx.H + + + + + + + + + + 0 + + + + Luminary\ + Luminary\ + + 0 + 0 + 0 + 0 + 1 + + .\rvmdk\ + bitband + 1 + 0 + 0 + 1 + 1 + .\rvmdk\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + + 1 + 0 + fromelf --bin --output .\rvmdk\bitband.bin .\rvmdk\bitband.axf + + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + + + SARMCM3.DLL + -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + + 1 + 0 + 0 + 0 + 16 + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + + + 1 + 1 + 0 + 1 + 1 + 1 + 0 + 1 + + 0 + 4 + + + + + + + + + + + + + + BIN\lmidk-agdi.dll + + + + + 1 + 0 + 0 + 0 + 1 + 4099 + + BIN\lmidk-agdi.dll + + + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M4" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 2 + 0 + 0 + 8 + 1 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x8000 + + + 1 + 0x0 + 0x40000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x40000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x8000 + + + 0 + 0x0 + 0x0 + + + + + + 0 + 3 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + + + rvmdk PART_LM4F120H5QR TARGET_IS_BLIZZARD_RA1 + + ..;..\..\..; + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x00000000 + 0x20000000 + bitband.sct + + + --entry Reset_Handler + + + + + + + + Source + + + bitband.c + 1 + .\bitband.c + + + startup_rvmdk.S + 2 + .\startup_rvmdk.S + + + uartstdio.c + 1 + ..\..\..\utils\uartstdio.c + + + + + Libraries + + + driverlib-cm4f.lib + 4 + ..\..\..\driverlib\rvmdk-cm4f\driverlib-cm4f.lib + + + + + Documentation + + + readme.txt + 5 + .\readme.txt + + + + + + + + diff --git a/boards/ek-lm4f120xl/bitband/bitband_ccs.cmd b/boards/ek-lm4f120xl/bitband/bitband_ccs.cmd new file mode 100644 index 0000000..f4b653d --- /dev/null +++ b/boards/ek-lm4f120xl/bitband/bitband_ccs.cmd @@ -0,0 +1,70 @@ +/****************************************************************************** + * + * bitband_ccs.cmd - CCS linker configuration file for bitband. + * + * Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. + * Software License Agreement + * + * Texas Instruments (TI) is supplying this software for use solely and + * exclusively on TI's microcontroller products. The software is owned by + * TI and/or its suppliers, and is protected under applicable copyright + * laws. You may not combine this software with "viral" open-source + * software in order to form a larger program. + * + * THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. + * NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT + * NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY + * CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL + * DAMAGES, FOR ANY REASON WHATSOEVER. + * + * This is part of revision 9453 of the EK-LM4F120XL Firmware Package. + * + *****************************************************************************/ + +--retain=g_pfnVectors + +/* The following command line options are set as part of the CCS project. */ +/* If you are building using the command line, or for some reason want to */ +/* define them here, you can uncomment and modify these lines as needed. */ +/* If you are using CCS for building, it is probably better to make any such */ +/* modifications in your CCS project and leave this file alone. */ +/* */ +/* --heap_size=0 */ +/* --stack_size=256 */ +/* --library=rtsv7M3_T_le_eabi.lib */ + +/* The starting address of the application. Normally the interrupt vectors */ +/* must be located at the beginning of the application. */ +#define APP_BASE 0x00000000 +#define RAM_BASE 0x20000000 + +/* System memory map */ + +MEMORY +{ + /* Application stored in and executes from internal flash */ + FLASH (RX) : origin = APP_BASE, length = 0x00040000 + /* Application uses internal RAM for data */ + SRAM (RWX) : origin = 0x20000000, length = 0x00008000 +} + +/* Section allocation in memory */ + +SECTIONS +{ + .intvecs: > APP_BASE + .text : > FLASH + .const : > FLASH + .cinit : > FLASH + .pinit : > FLASH + .init_array : > FLASH + + .vtable : > RAM_BASE + .data : > SRAM + .bss : > SRAM + .sysmem : > SRAM + .stack : > SRAM +} + +__STACK_TOP = __stack + 512; diff --git a/boards/ek-lm4f120xl/bitband/bitband_sourcerygxx.ld b/boards/ek-lm4f120xl/bitband/bitband_sourcerygxx.ld new file mode 100644 index 0000000..6e82a60 --- /dev/null +++ b/boards/ek-lm4f120xl/bitband/bitband_sourcerygxx.ld @@ -0,0 +1,31 @@ +/****************************************************************************** + * + * bitband_sourcerygxx.ld - Scatter file for Sourcery CodeBench + * + * Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. + * Software License Agreement + * + * Texas Instruments (TI) is supplying this software for use solely and + * exclusively on TI's microcontroller products. The software is owned by + * TI and/or its suppliers, and is protected under applicable copyright + * laws. You may not combine this software with "viral" open-source + * software in order to form a larger program. + * + * THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. + * NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT + * NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY + * CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL + * DAMAGES, FOR ANY REASON WHATSOEVER. + * + * This is part of revision 9453 of the EK-LM4F120XL Firmware Package. + * + *****************************************************************************/ + +/****************************************************************************** + * + * Define the end of the heap space, which determines the beginning of the + * stack space. + * + *****************************************************************************/ +__cs3_heap_end = __cs3_region_end_ram - 512; diff --git a/boards/ek-lm4f120xl/bitband/ccs/.ccsimportspec b/boards/ek-lm4f120xl/bitband/ccs/.ccsimportspec new file mode 100644 index 0000000..9748e3c --- /dev/null +++ b/boards/ek-lm4f120xl/bitband/ccs/.ccsimportspec @@ -0,0 +1,8 @@ + + + + + + + + diff --git a/boards/ek-lm4f120xl/bitband/ccs/.ccsproject b/boards/ek-lm4f120xl/bitband/ccs/.ccsproject new file mode 100644 index 0000000..56793f4 --- /dev/null +++ b/boards/ek-lm4f120xl/bitband/ccs/.ccsproject @@ -0,0 +1,12 @@ + + + + + + + + + + + + diff --git a/boards/ek-lm4f120xl/bitband/ccs/.cproject b/boards/ek-lm4f120xl/bitband/ccs/.cproject new file mode 100644 index 0000000..6ad163e --- /dev/null +++ b/boards/ek-lm4f120xl/bitband/ccs/.cproject @@ -0,0 +1,193 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/boards/ek-lm4f120xl/bitband/ccs/.project b/boards/ek-lm4f120xl/bitband/ccs/.project new file mode 100644 index 0000000..b4f28d7 --- /dev/null +++ b/boards/ek-lm4f120xl/bitband/ccs/.project @@ -0,0 +1,111 @@ + + + bitband + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + + + ?name? + + + + org.eclipse.cdt.make.core.append_environment + true + + + org.eclipse.cdt.make.core.autoBuildTarget + all + + + org.eclipse.cdt.make.core.buildArguments + -k + + + org.eclipse.cdt.make.core.buildCommand + ${CCS_UTILS_DIR}/bin/gmake + + + org.eclipse.cdt.make.core.buildLocation + ${BuildDirectory} + + + org.eclipse.cdt.make.core.cleanBuildTarget + clean + + + org.eclipse.cdt.make.core.contents + org.eclipse.cdt.make.core.activeConfigSettings + + + org.eclipse.cdt.make.core.enableAutoBuild + true + + + org.eclipse.cdt.make.core.enableCleanBuild + true + + + org.eclipse.cdt.make.core.enableFullBuild + true + + + org.eclipse.cdt.make.core.fullBuildTarget + all + + + org.eclipse.cdt.make.core.stopOnError + false + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + true + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + com.ti.ccstudio.core.ccsNature + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.core.ccnature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + bitband.c + 1 + SW_ROOT/boards/ek-lm4f120xl/bitband/bitband.c + + + bitband_ccs.cmd + 1 + SW_ROOT/boards/ek-lm4f120xl/bitband/bitband_ccs.cmd + + + startup_ccs.c + 1 + SW_ROOT/boards/ek-lm4f120xl/bitband/startup_ccs.c + + + utils/uartstdio.c + 1 + SW_ROOT/utils/uartstdio.c + + + + + SW_ROOT + $%7BPARENT-4-PROJECT_LOC%7D + + + diff --git a/boards/ek-lm4f120xl/bitband/ccs/.settings/org.eclipse.cdt.codan.core.prefs b/boards/ek-lm4f120xl/bitband/ccs/.settings/org.eclipse.cdt.codan.core.prefs new file mode 100644 index 0000000..98b6350 --- /dev/null +++ b/boards/ek-lm4f120xl/bitband/ccs/.settings/org.eclipse.cdt.codan.core.prefs @@ -0,0 +1,3 @@ +eclipse.preferences.version=1 +inEditor=false +onBuild=false diff --git a/boards/ek-lm4f120xl/bitband/ccs/Debug/bitband.bin b/boards/ek-lm4f120xl/bitband/ccs/Debug/bitband.bin new file mode 100644 index 0000000..20f219e Binary files /dev/null and b/boards/ek-lm4f120xl/bitband/ccs/Debug/bitband.bin differ diff --git a/boards/ek-lm4f120xl/bitband/ccs/Debug/bitband.out b/boards/ek-lm4f120xl/bitband/ccs/Debug/bitband.out new file mode 100644 index 0000000..827ead1 Binary files /dev/null and b/boards/ek-lm4f120xl/bitband/ccs/Debug/bitband.out differ diff --git a/boards/ek-lm4f120xl/bitband/ccs/macros.ini_initial b/boards/ek-lm4f120xl/bitband/ccs/macros.ini_initial new file mode 100644 index 0000000..588017d --- /dev/null +++ b/boards/ek-lm4f120xl/bitband/ccs/macros.ini_initial @@ -0,0 +1 @@ +SW_ROOT = ../../../.. diff --git a/boards/ek-lm4f120xl/bitband/ccs/target_config.ccxml b/boards/ek-lm4f120xl/bitband/ccs/target_config.ccxml new file mode 100644 index 0000000..469eea0 --- /dev/null +++ b/boards/ek-lm4f120xl/bitband/ccs/target_config.ccxml @@ -0,0 +1,13 @@ + + + + + + + + + + + + + diff --git a/boards/ek-lm4f120xl/bitband/ewarm/Exe/bitband.bin b/boards/ek-lm4f120xl/bitband/ewarm/Exe/bitband.bin new file mode 100644 index 0000000..2cc4677 Binary files /dev/null and b/boards/ek-lm4f120xl/bitband/ewarm/Exe/bitband.bin differ diff --git a/boards/ek-lm4f120xl/bitband/ewarm/Exe/bitband.out b/boards/ek-lm4f120xl/bitband/ewarm/Exe/bitband.out new file mode 100644 index 0000000..59ed203 Binary files /dev/null and b/boards/ek-lm4f120xl/bitband/ewarm/Exe/bitband.out differ diff --git a/boards/ek-lm4f120xl/bitband/gcc/bitband.axf b/boards/ek-lm4f120xl/bitband/gcc/bitband.axf new file mode 100644 index 0000000..75dbca3 Binary files /dev/null and b/boards/ek-lm4f120xl/bitband/gcc/bitband.axf differ diff --git a/boards/ek-lm4f120xl/bitband/gcc/bitband.bin b/boards/ek-lm4f120xl/bitband/gcc/bitband.bin new file mode 100644 index 0000000..1a3a406 Binary files /dev/null and b/boards/ek-lm4f120xl/bitband/gcc/bitband.bin differ diff --git a/boards/ek-lm4f120xl/bitband/readme.txt b/boards/ek-lm4f120xl/bitband/readme.txt new file mode 100644 index 0000000..c6391cd --- /dev/null +++ b/boards/ek-lm4f120xl/bitband/readme.txt @@ -0,0 +1,29 @@ +Bit-Banding + +This example application demonstrates the use of the bit-banding +capabilities of the Cortex-M4F microprocessor. All of SRAM and all of the +peripherals reside within bit-band regions, meaning that bit-banding +operations can be applied to any of them. In this example, a variable in +SRAM is set to a particular value one bit at a time using bit-banding +operations (it would be more efficient to do a single non-bit-banded write; +this simply demonstrates the operation of bit-banding). + +------------------------------------------------------------------------------- + +Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +Software License Agreement + +Texas Instruments (TI) is supplying this software for use solely and +exclusively on TI's microcontroller products. The software is owned by +TI and/or its suppliers, and is protected under applicable copyright +laws. You may not combine this software with "viral" open-source +software in order to form a larger program. + +THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +DAMAGES, FOR ANY REASON WHATSOEVER. + +This is part of revision 9453 of the EK-LM4F120XL Firmware Package. diff --git a/boards/ek-lm4f120xl/bitband/rvmdk/bitband.axf b/boards/ek-lm4f120xl/bitband/rvmdk/bitband.axf new file mode 100644 index 0000000..2d68828 Binary files /dev/null and b/boards/ek-lm4f120xl/bitband/rvmdk/bitband.axf differ diff --git a/boards/ek-lm4f120xl/bitband/rvmdk/bitband.bin b/boards/ek-lm4f120xl/bitband/rvmdk/bitband.bin new file mode 100644 index 0000000..0a2605c Binary files /dev/null and b/boards/ek-lm4f120xl/bitband/rvmdk/bitband.bin differ diff --git a/boards/ek-lm4f120xl/bitband/sourcerygxx/bitband.axf b/boards/ek-lm4f120xl/bitband/sourcerygxx/bitband.axf new file mode 100644 index 0000000..21c87fd Binary files /dev/null and b/boards/ek-lm4f120xl/bitband/sourcerygxx/bitband.axf differ diff --git a/boards/ek-lm4f120xl/bitband/sourcerygxx/bitband.bin b/boards/ek-lm4f120xl/bitband/sourcerygxx/bitband.bin new file mode 100644 index 0000000..40cf5a4 Binary files /dev/null and b/boards/ek-lm4f120xl/bitband/sourcerygxx/bitband.bin differ diff --git a/boards/ek-lm4f120xl/bitband/startup_ccs.c b/boards/ek-lm4f120xl/bitband/startup_ccs.c new file mode 100644 index 0000000..9f15b47 --- /dev/null +++ b/boards/ek-lm4f120xl/bitband/startup_ccs.c @@ -0,0 +1,291 @@ +//***************************************************************************** +// +// startup_ccs.c - Startup code for use with TI's Code Composer Studio. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +//***************************************************************************** +// +// Forward declaration of the default fault handlers. +// +//***************************************************************************** +void ResetISR(void); +static void NmiSR(void); +static void FaultISR(void); +static void IntDefaultHandler(void); + +//***************************************************************************** +// +// External declaration for the reset handler that is to be called when the +// processor is started +// +//***************************************************************************** +extern void _c_int00(void); + +//***************************************************************************** +// +// Linker variable that marks the top of the stack. +// +//***************************************************************************** +extern unsigned long __STACK_TOP; + +//***************************************************************************** +// +// The vector table. Note that the proper constructs must be placed on this to +// ensure that it ends up at physical address 0x0000.0000 or at the start of +// the program if located at a start address other than 0. +// +//***************************************************************************** +#pragma DATA_SECTION(g_pfnVectors, ".intvecs") +void (* const g_pfnVectors[])(void) = +{ + (void (*)(void))((unsigned long)&__STACK_TOP), + // The initial stack pointer + ResetISR, // The reset handler + NmiSR, // The NMI handler + FaultISR, // The hard fault handler + IntDefaultHandler, // The MPU fault handler + IntDefaultHandler, // The bus fault handler + IntDefaultHandler, // The usage fault handler + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // SVCall handler + IntDefaultHandler, // Debug monitor handler + 0, // Reserved + IntDefaultHandler, // The PendSV handler + IntDefaultHandler, // The SysTick handler + IntDefaultHandler, // GPIO Port A + IntDefaultHandler, // GPIO Port B + IntDefaultHandler, // GPIO Port C + IntDefaultHandler, // GPIO Port D + IntDefaultHandler, // GPIO Port E + IntDefaultHandler, // UART0 Rx and Tx + IntDefaultHandler, // UART1 Rx and Tx + IntDefaultHandler, // SSI0 Rx and Tx + IntDefaultHandler, // I2C0 Master and Slave + IntDefaultHandler, // PWM Fault + IntDefaultHandler, // PWM Generator 0 + IntDefaultHandler, // PWM Generator 1 + IntDefaultHandler, // PWM Generator 2 + IntDefaultHandler, // Quadrature Encoder 0 + IntDefaultHandler, // ADC Sequence 0 + IntDefaultHandler, // ADC Sequence 1 + IntDefaultHandler, // ADC Sequence 2 + IntDefaultHandler, // ADC Sequence 3 + IntDefaultHandler, // Watchdog timer + IntDefaultHandler, // Timer 0 subtimer A + IntDefaultHandler, // Timer 0 subtimer B + IntDefaultHandler, // Timer 1 subtimer A + IntDefaultHandler, // Timer 1 subtimer B + IntDefaultHandler, // Timer 2 subtimer A + IntDefaultHandler, // Timer 2 subtimer B + IntDefaultHandler, // Analog Comparator 0 + IntDefaultHandler, // Analog Comparator 1 + IntDefaultHandler, // Analog Comparator 2 + IntDefaultHandler, // System Control (PLL, OSC, BO) + IntDefaultHandler, // FLASH Control + IntDefaultHandler, // GPIO Port F + IntDefaultHandler, // GPIO Port G + IntDefaultHandler, // GPIO Port H + IntDefaultHandler, // UART2 Rx and Tx + IntDefaultHandler, // SSI1 Rx and Tx + IntDefaultHandler, // Timer 3 subtimer A + IntDefaultHandler, // Timer 3 subtimer B + IntDefaultHandler, // I2C1 Master and Slave + IntDefaultHandler, // Quadrature Encoder 1 + IntDefaultHandler, // CAN0 + IntDefaultHandler, // CAN1 + IntDefaultHandler, // CAN2 + IntDefaultHandler, // Ethernet + IntDefaultHandler, // Hibernate + IntDefaultHandler, // USB0 + IntDefaultHandler, // PWM Generator 3 + IntDefaultHandler, // uDMA Software Transfer + IntDefaultHandler, // uDMA Error + IntDefaultHandler, // ADC1 Sequence 0 + IntDefaultHandler, // ADC1 Sequence 1 + IntDefaultHandler, // ADC1 Sequence 2 + IntDefaultHandler, // ADC1 Sequence 3 + IntDefaultHandler, // I2S0 + IntDefaultHandler, // External Bus Interface 0 + IntDefaultHandler, // GPIO Port J + IntDefaultHandler, // GPIO Port K + IntDefaultHandler, // GPIO Port L + IntDefaultHandler, // SSI2 Rx and Tx + IntDefaultHandler, // SSI3 Rx and Tx + IntDefaultHandler, // UART3 Rx and Tx + IntDefaultHandler, // UART4 Rx and Tx + IntDefaultHandler, // UART5 Rx and Tx + IntDefaultHandler, // UART6 Rx and Tx + IntDefaultHandler, // UART7 Rx and Tx + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // I2C2 Master and Slave + IntDefaultHandler, // I2C3 Master and Slave + IntDefaultHandler, // Timer 4 subtimer A + IntDefaultHandler, // Timer 4 subtimer B + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // Timer 5 subtimer A + IntDefaultHandler, // Timer 5 subtimer B + IntDefaultHandler, // Wide Timer 0 subtimer A + IntDefaultHandler, // Wide Timer 0 subtimer B + IntDefaultHandler, // Wide Timer 1 subtimer A + IntDefaultHandler, // Wide Timer 1 subtimer B + IntDefaultHandler, // Wide Timer 2 subtimer A + IntDefaultHandler, // Wide Timer 2 subtimer B + IntDefaultHandler, // Wide Timer 3 subtimer A + IntDefaultHandler, // Wide Timer 3 subtimer B + IntDefaultHandler, // Wide Timer 4 subtimer A + IntDefaultHandler, // Wide Timer 4 subtimer B + IntDefaultHandler, // Wide Timer 5 subtimer A + IntDefaultHandler, // Wide Timer 5 subtimer B + IntDefaultHandler, // FPU + IntDefaultHandler, // PECI 0 + IntDefaultHandler, // LPC 0 + IntDefaultHandler, // I2C4 Master and Slave + IntDefaultHandler, // I2C5 Master and Slave + IntDefaultHandler, // GPIO Port M + IntDefaultHandler, // GPIO Port N + IntDefaultHandler, // Quadrature Encoder 2 + IntDefaultHandler, // Fan 0 + 0, // Reserved + IntDefaultHandler, // GPIO Port P (Summary or P0) + IntDefaultHandler, // GPIO Port P1 + IntDefaultHandler, // GPIO Port P2 + IntDefaultHandler, // GPIO Port P3 + IntDefaultHandler, // GPIO Port P4 + IntDefaultHandler, // GPIO Port P5 + IntDefaultHandler, // GPIO Port P6 + IntDefaultHandler, // GPIO Port P7 + IntDefaultHandler, // GPIO Port Q (Summary or Q0) + IntDefaultHandler, // GPIO Port Q1 + IntDefaultHandler, // GPIO Port Q2 + IntDefaultHandler, // GPIO Port Q3 + IntDefaultHandler, // GPIO Port Q4 + IntDefaultHandler, // GPIO Port Q5 + IntDefaultHandler, // GPIO Port Q6 + IntDefaultHandler, // GPIO Port Q7 + IntDefaultHandler, // GPIO Port R + IntDefaultHandler, // GPIO Port S + IntDefaultHandler, // PWM 1 Generator 0 + IntDefaultHandler, // PWM 1 Generator 1 + IntDefaultHandler, // PWM 1 Generator 2 + IntDefaultHandler, // PWM 1 Generator 3 + IntDefaultHandler // PWM 1 Fault +}; + +//***************************************************************************** +// +// This is the code that gets called when the processor first starts execution +// following a reset event. Only the absolutely necessary set is performed, +// after which the application supplied entry() routine is called. Any fancy +// actions (such as making decisions based on the reset cause register, and +// resetting the bits in that register) are left solely in the hands of the +// application. +// +//***************************************************************************** +void +ResetISR(void) +{ + // + // Jump to the CCS C initialization routine. This will enable the + // floating-point unit as well, so that does not need to be done here. + // + __asm(" .global _c_int00\n" + " b.w _c_int00"); +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a NMI. This +// simply enters an infinite loop, preserving the system state for examination +// by a debugger. +// +//***************************************************************************** +static void +NmiSR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a fault +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +FaultISR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives an unexpected +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +IntDefaultHandler(void) +{ + // + // Go into an infinite loop. + // + while(1) + { + } +} diff --git a/boards/ek-lm4f120xl/bitband/startup_ewarm.c b/boards/ek-lm4f120xl/bitband/startup_ewarm.c new file mode 100644 index 0000000..ea56618 --- /dev/null +++ b/boards/ek-lm4f120xl/bitband/startup_ewarm.c @@ -0,0 +1,325 @@ +//***************************************************************************** +// +// startup_ewarm.c - Startup code for use with IAR's Embedded Workbench, +// version 5. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +#include "inc/hw_nvic.h" +#include "inc/hw_types.h" + +//***************************************************************************** +// +// Enable the IAR extensions for this source file. +// +//***************************************************************************** +#pragma language=extended + +//***************************************************************************** +// +// Forward declaration of the default fault handlers. +// +//***************************************************************************** +void ResetISR(void); +static void NmiSR(void); +static void FaultISR(void); +static void IntDefaultHandler(void); + +//***************************************************************************** +// +// The entry point for the application startup code. +// +//***************************************************************************** +extern void __iar_program_start(void); + +//***************************************************************************** +// +// Reserve space for the system stack. +// +//***************************************************************************** +static unsigned long pulStack[128] @ ".noinit"; + +//***************************************************************************** +// +// A union that describes the entries of the vector table. The union is needed +// since the first entry is the stack pointer and the remainder are function +// pointers. +// +//***************************************************************************** +typedef union +{ + void (*pfnHandler)(void); + unsigned long ulPtr; +} +uVectorEntry; + +//***************************************************************************** +// +// The vector table. Note that the proper constructs must be placed on this to +// ensure that it ends up at physical address 0x0000.0000. +// +//***************************************************************************** +__root const uVectorEntry __vector_table[] @ ".intvec" = +{ + { .ulPtr = (unsigned long)pulStack + sizeof(pulStack) }, + // The initial stack pointer + ResetISR, // The reset handler + NmiSR, // The NMI handler + FaultISR, // The hard fault handler + IntDefaultHandler, // The MPU fault handler + IntDefaultHandler, // The bus fault handler + IntDefaultHandler, // The usage fault handler + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // SVCall handler + IntDefaultHandler, // Debug monitor handler + 0, // Reserved + IntDefaultHandler, // The PendSV handler + IntDefaultHandler, // The SysTick handler + IntDefaultHandler, // GPIO Port A + IntDefaultHandler, // GPIO Port B + IntDefaultHandler, // GPIO Port C + IntDefaultHandler, // GPIO Port D + IntDefaultHandler, // GPIO Port E + IntDefaultHandler, // UART0 Rx and Tx + IntDefaultHandler, // UART1 Rx and Tx + IntDefaultHandler, // SSI0 Rx and Tx + IntDefaultHandler, // I2C0 Master and Slave + IntDefaultHandler, // PWM Fault + IntDefaultHandler, // PWM Generator 0 + IntDefaultHandler, // PWM Generator 1 + IntDefaultHandler, // PWM Generator 2 + IntDefaultHandler, // Quadrature Encoder 0 + IntDefaultHandler, // ADC Sequence 0 + IntDefaultHandler, // ADC Sequence 1 + IntDefaultHandler, // ADC Sequence 2 + IntDefaultHandler, // ADC Sequence 3 + IntDefaultHandler, // Watchdog timer + IntDefaultHandler, // Timer 0 subtimer A + IntDefaultHandler, // Timer 0 subtimer B + IntDefaultHandler, // Timer 1 subtimer A + IntDefaultHandler, // Timer 1 subtimer B + IntDefaultHandler, // Timer 2 subtimer A + IntDefaultHandler, // Timer 2 subtimer B + IntDefaultHandler, // Analog Comparator 0 + IntDefaultHandler, // Analog Comparator 1 + IntDefaultHandler, // Analog Comparator 2 + IntDefaultHandler, // System Control (PLL, OSC, BO) + IntDefaultHandler, // FLASH Control + IntDefaultHandler, // GPIO Port F + IntDefaultHandler, // GPIO Port G + IntDefaultHandler, // GPIO Port H + IntDefaultHandler, // UART2 Rx and Tx + IntDefaultHandler, // SSI1 Rx and Tx + IntDefaultHandler, // Timer 3 subtimer A + IntDefaultHandler, // Timer 3 subtimer B + IntDefaultHandler, // I2C1 Master and Slave + IntDefaultHandler, // Quadrature Encoder 1 + IntDefaultHandler, // CAN0 + IntDefaultHandler, // CAN1 + IntDefaultHandler, // CAN2 + IntDefaultHandler, // Ethernet + IntDefaultHandler, // Hibernate + IntDefaultHandler, // USB0 + IntDefaultHandler, // PWM Generator 3 + IntDefaultHandler, // uDMA Software Transfer + IntDefaultHandler, // uDMA Error + IntDefaultHandler, // ADC1 Sequence 0 + IntDefaultHandler, // ADC1 Sequence 1 + IntDefaultHandler, // ADC1 Sequence 2 + IntDefaultHandler, // ADC1 Sequence 3 + IntDefaultHandler, // I2S0 + IntDefaultHandler, // External Bus Interface 0 + IntDefaultHandler, // GPIO Port J + IntDefaultHandler, // GPIO Port K + IntDefaultHandler, // GPIO Port L + IntDefaultHandler, // SSI2 Rx and Tx + IntDefaultHandler, // SSI3 Rx and Tx + IntDefaultHandler, // UART3 Rx and Tx + IntDefaultHandler, // UART4 Rx and Tx + IntDefaultHandler, // UART5 Rx and Tx + IntDefaultHandler, // UART6 Rx and Tx + IntDefaultHandler, // UART7 Rx and Tx + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // I2C2 Master and Slave + IntDefaultHandler, // I2C3 Master and Slave + IntDefaultHandler, // Timer 4 subtimer A + IntDefaultHandler, // Timer 4 subtimer B + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // Timer 5 subtimer A + IntDefaultHandler, // Timer 5 subtimer B + IntDefaultHandler, // Wide Timer 0 subtimer A + IntDefaultHandler, // Wide Timer 0 subtimer B + IntDefaultHandler, // Wide Timer 1 subtimer A + IntDefaultHandler, // Wide Timer 1 subtimer B + IntDefaultHandler, // Wide Timer 2 subtimer A + IntDefaultHandler, // Wide Timer 2 subtimer B + IntDefaultHandler, // Wide Timer 3 subtimer A + IntDefaultHandler, // Wide Timer 3 subtimer B + IntDefaultHandler, // Wide Timer 4 subtimer A + IntDefaultHandler, // Wide Timer 4 subtimer B + IntDefaultHandler, // Wide Timer 5 subtimer A + IntDefaultHandler, // Wide Timer 5 subtimer B + IntDefaultHandler, // FPU + IntDefaultHandler, // PECI 0 + IntDefaultHandler, // LPC 0 + IntDefaultHandler, // I2C4 Master and Slave + IntDefaultHandler, // I2C5 Master and Slave + IntDefaultHandler, // GPIO Port M + IntDefaultHandler, // GPIO Port N + IntDefaultHandler, // Quadrature Encoder 2 + IntDefaultHandler, // Fan 0 + 0, // Reserved + IntDefaultHandler, // GPIO Port P (Summary or P0) + IntDefaultHandler, // GPIO Port P1 + IntDefaultHandler, // GPIO Port P2 + IntDefaultHandler, // GPIO Port P3 + IntDefaultHandler, // GPIO Port P4 + IntDefaultHandler, // GPIO Port P5 + IntDefaultHandler, // GPIO Port P6 + IntDefaultHandler, // GPIO Port P7 + IntDefaultHandler, // GPIO Port Q (Summary or Q0) + IntDefaultHandler, // GPIO Port Q1 + IntDefaultHandler, // GPIO Port Q2 + IntDefaultHandler, // GPIO Port Q3 + IntDefaultHandler, // GPIO Port Q4 + IntDefaultHandler, // GPIO Port Q5 + IntDefaultHandler, // GPIO Port Q6 + IntDefaultHandler, // GPIO Port Q7 + IntDefaultHandler, // GPIO Port R + IntDefaultHandler, // GPIO Port S + IntDefaultHandler, // PWM 1 Generator 0 + IntDefaultHandler, // PWM 1 Generator 1 + IntDefaultHandler, // PWM 1 Generator 2 + IntDefaultHandler, // PWM 1 Generator 3 + IntDefaultHandler // PWM 1 Fault +}; + +//***************************************************************************** +// +// This is the code that gets called when the processor first starts execution +// following a reset event. Only the absolutely necessary set is performed, +// after which the application supplied entry() routine is called. Any fancy +// actions (such as making decisions based on the reset cause register, and +// resetting the bits in that register) are left solely in the hands of the +// application. +// +//***************************************************************************** +void +ResetISR(void) +{ + // + // Enable the floating-point unit. This must be done here to handle the + // case where main() uses floating-point and the function prologue saves + // floating-point registers (which will fault if floating-point is not + // enabled). Any configuration of the floating-point unit using DriverLib + // APIs must be done here prior to the floating-point unit being enabled. + // + // Note that this does not use DriverLib since it might not be included in + // this project. + // + HWREG(NVIC_CPAC) = ((HWREG(NVIC_CPAC) & + ~(NVIC_CPAC_CP10_M | NVIC_CPAC_CP11_M)) | + NVIC_CPAC_CP10_FULL | NVIC_CPAC_CP11_FULL); + + // + // Call the application's entry point. + // + __iar_program_start(); +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a NMI. This +// simply enters an infinite loop, preserving the system state for examination +// by a debugger. +// +//***************************************************************************** +static void +NmiSR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a fault +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +FaultISR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives an unexpected +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +IntDefaultHandler(void) +{ + // + // Go into an infinite loop. + // + while(1) + { + } +} diff --git a/boards/ek-lm4f120xl/bitband/startup_gcc.c b/boards/ek-lm4f120xl/bitband/startup_gcc.c new file mode 100644 index 0000000..4c64cd2 --- /dev/null +++ b/boards/ek-lm4f120xl/bitband/startup_gcc.c @@ -0,0 +1,341 @@ +//***************************************************************************** +// +// startup_gcc.c - Startup code for use with GNU tools. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +#include "inc/hw_nvic.h" +#include "inc/hw_types.h" + +//***************************************************************************** +// +// Forward declaration of the default fault handlers. +// +//***************************************************************************** +void ResetISR(void); +static void NmiSR(void); +static void FaultISR(void); +static void IntDefaultHandler(void); + +//***************************************************************************** +// +// The entry point for the application. +// +//***************************************************************************** +extern int main(void); + +//***************************************************************************** +// +// Reserve space for the system stack. +// +//***************************************************************************** +static unsigned long pulStack[128]; + +//***************************************************************************** +// +// The vector table. Note that the proper constructs must be placed on this to +// ensure that it ends up at physical address 0x0000.0000. +// +//***************************************************************************** +__attribute__ ((section(".isr_vector"))) +void (* const g_pfnVectors[])(void) = +{ + (void (*)(void))((unsigned long)pulStack + sizeof(pulStack)), + // The initial stack pointer + ResetISR, // The reset handler + NmiSR, // The NMI handler + FaultISR, // The hard fault handler + IntDefaultHandler, // The MPU fault handler + IntDefaultHandler, // The bus fault handler + IntDefaultHandler, // The usage fault handler + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // SVCall handler + IntDefaultHandler, // Debug monitor handler + 0, // Reserved + IntDefaultHandler, // The PendSV handler + IntDefaultHandler, // The SysTick handler + IntDefaultHandler, // GPIO Port A + IntDefaultHandler, // GPIO Port B + IntDefaultHandler, // GPIO Port C + IntDefaultHandler, // GPIO Port D + IntDefaultHandler, // GPIO Port E + IntDefaultHandler, // UART0 Rx and Tx + IntDefaultHandler, // UART1 Rx and Tx + IntDefaultHandler, // SSI0 Rx and Tx + IntDefaultHandler, // I2C0 Master and Slave + IntDefaultHandler, // PWM Fault + IntDefaultHandler, // PWM Generator 0 + IntDefaultHandler, // PWM Generator 1 + IntDefaultHandler, // PWM Generator 2 + IntDefaultHandler, // Quadrature Encoder 0 + IntDefaultHandler, // ADC Sequence 0 + IntDefaultHandler, // ADC Sequence 1 + IntDefaultHandler, // ADC Sequence 2 + IntDefaultHandler, // ADC Sequence 3 + IntDefaultHandler, // Watchdog timer + IntDefaultHandler, // Timer 0 subtimer A + IntDefaultHandler, // Timer 0 subtimer B + IntDefaultHandler, // Timer 1 subtimer A + IntDefaultHandler, // Timer 1 subtimer B + IntDefaultHandler, // Timer 2 subtimer A + IntDefaultHandler, // Timer 2 subtimer B + IntDefaultHandler, // Analog Comparator 0 + IntDefaultHandler, // Analog Comparator 1 + IntDefaultHandler, // Analog Comparator 2 + IntDefaultHandler, // System Control (PLL, OSC, BO) + IntDefaultHandler, // FLASH Control + IntDefaultHandler, // GPIO Port F + IntDefaultHandler, // GPIO Port G + IntDefaultHandler, // GPIO Port H + IntDefaultHandler, // UART2 Rx and Tx + IntDefaultHandler, // SSI1 Rx and Tx + IntDefaultHandler, // Timer 3 subtimer A + IntDefaultHandler, // Timer 3 subtimer B + IntDefaultHandler, // I2C1 Master and Slave + IntDefaultHandler, // Quadrature Encoder 1 + IntDefaultHandler, // CAN0 + IntDefaultHandler, // CAN1 + IntDefaultHandler, // CAN2 + IntDefaultHandler, // Ethernet + IntDefaultHandler, // Hibernate + IntDefaultHandler, // USB0 + IntDefaultHandler, // PWM Generator 3 + IntDefaultHandler, // uDMA Software Transfer + IntDefaultHandler, // uDMA Error + IntDefaultHandler, // ADC1 Sequence 0 + IntDefaultHandler, // ADC1 Sequence 1 + IntDefaultHandler, // ADC1 Sequence 2 + IntDefaultHandler, // ADC1 Sequence 3 + IntDefaultHandler, // I2S0 + IntDefaultHandler, // External Bus Interface 0 + IntDefaultHandler, // GPIO Port J + IntDefaultHandler, // GPIO Port K + IntDefaultHandler, // GPIO Port L + IntDefaultHandler, // SSI2 Rx and Tx + IntDefaultHandler, // SSI3 Rx and Tx + IntDefaultHandler, // UART3 Rx and Tx + IntDefaultHandler, // UART4 Rx and Tx + IntDefaultHandler, // UART5 Rx and Tx + IntDefaultHandler, // UART6 Rx and Tx + IntDefaultHandler, // UART7 Rx and Tx + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // I2C2 Master and Slave + IntDefaultHandler, // I2C3 Master and Slave + IntDefaultHandler, // Timer 4 subtimer A + IntDefaultHandler, // Timer 4 subtimer B + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // Timer 5 subtimer A + IntDefaultHandler, // Timer 5 subtimer B + IntDefaultHandler, // Wide Timer 0 subtimer A + IntDefaultHandler, // Wide Timer 0 subtimer B + IntDefaultHandler, // Wide Timer 1 subtimer A + IntDefaultHandler, // Wide Timer 1 subtimer B + IntDefaultHandler, // Wide Timer 2 subtimer A + IntDefaultHandler, // Wide Timer 2 subtimer B + IntDefaultHandler, // Wide Timer 3 subtimer A + IntDefaultHandler, // Wide Timer 3 subtimer B + IntDefaultHandler, // Wide Timer 4 subtimer A + IntDefaultHandler, // Wide Timer 4 subtimer B + IntDefaultHandler, // Wide Timer 5 subtimer A + IntDefaultHandler, // Wide Timer 5 subtimer B + IntDefaultHandler, // FPU + IntDefaultHandler, // PECI 0 + IntDefaultHandler, // LPC 0 + IntDefaultHandler, // I2C4 Master and Slave + IntDefaultHandler, // I2C5 Master and Slave + IntDefaultHandler, // GPIO Port M + IntDefaultHandler, // GPIO Port N + IntDefaultHandler, // Quadrature Encoder 2 + IntDefaultHandler, // Fan 0 + 0, // Reserved + IntDefaultHandler, // GPIO Port P (Summary or P0) + IntDefaultHandler, // GPIO Port P1 + IntDefaultHandler, // GPIO Port P2 + IntDefaultHandler, // GPIO Port P3 + IntDefaultHandler, // GPIO Port P4 + IntDefaultHandler, // GPIO Port P5 + IntDefaultHandler, // GPIO Port P6 + IntDefaultHandler, // GPIO Port P7 + IntDefaultHandler, // GPIO Port Q (Summary or Q0) + IntDefaultHandler, // GPIO Port Q1 + IntDefaultHandler, // GPIO Port Q2 + IntDefaultHandler, // GPIO Port Q3 + IntDefaultHandler, // GPIO Port Q4 + IntDefaultHandler, // GPIO Port Q5 + IntDefaultHandler, // GPIO Port Q6 + IntDefaultHandler, // GPIO Port Q7 + IntDefaultHandler, // GPIO Port R + IntDefaultHandler, // GPIO Port S + IntDefaultHandler, // PWM 1 Generator 0 + IntDefaultHandler, // PWM 1 Generator 1 + IntDefaultHandler, // PWM 1 Generator 2 + IntDefaultHandler, // PWM 1 Generator 3 + IntDefaultHandler // PWM 1 Fault +}; + +//***************************************************************************** +// +// The following are constructs created by the linker, indicating where the +// the "data" and "bss" segments reside in memory. The initializers for the +// for the "data" segment resides immediately following the "text" segment. +// +//***************************************************************************** +extern unsigned long _etext; +extern unsigned long _data; +extern unsigned long _edata; +extern unsigned long _bss; +extern unsigned long _ebss; + +//***************************************************************************** +// +// This is the code that gets called when the processor first starts execution +// following a reset event. Only the absolutely necessary set is performed, +// after which the application supplied entry() routine is called. Any fancy +// actions (such as making decisions based on the reset cause register, and +// resetting the bits in that register) are left solely in the hands of the +// application. +// +//***************************************************************************** +void +ResetISR(void) +{ + unsigned long *pulSrc, *pulDest; + + // + // Copy the data segment initializers from flash to SRAM. + // + pulSrc = &_etext; + for(pulDest = &_data; pulDest < &_edata; ) + { + *pulDest++ = *pulSrc++; + } + + // + // Zero fill the bss segment. + // + __asm(" ldr r0, =_bss\n" + " ldr r1, =_ebss\n" + " mov r2, #0\n" + " .thumb_func\n" + "zero_loop:\n" + " cmp r0, r1\n" + " it lt\n" + " strlt r2, [r0], #4\n" + " blt zero_loop"); + + // + // Enable the floating-point unit. This must be done here to handle the + // case where main() uses floating-point and the function prologue saves + // floating-point registers (which will fault if floating-point is not + // enabled). Any configuration of the floating-point unit using DriverLib + // APIs must be done here prior to the floating-point unit being enabled. + // + // Note that this does not use DriverLib since it might not be included in + // this project. + // + HWREG(NVIC_CPAC) = ((HWREG(NVIC_CPAC) & + ~(NVIC_CPAC_CP10_M | NVIC_CPAC_CP11_M)) | + NVIC_CPAC_CP10_FULL | NVIC_CPAC_CP11_FULL); + + // + // Call the application's entry point. + // + main(); +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a NMI. This +// simply enters an infinite loop, preserving the system state for examination +// by a debugger. +// +//***************************************************************************** +static void +NmiSR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a fault +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +FaultISR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives an unexpected +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +IntDefaultHandler(void) +{ + // + // Go into an infinite loop. + // + while(1) + { + } +} diff --git a/boards/ek-lm4f120xl/bitband/startup_rvmdk.S b/boards/ek-lm4f120xl/bitband/startup_rvmdk.S new file mode 100644 index 0000000..5de7fdc --- /dev/null +++ b/boards/ek-lm4f120xl/bitband/startup_rvmdk.S @@ -0,0 +1,351 @@ +; <<< Use Configuration Wizard in Context Menu >>> +;****************************************************************************** +; +; startup_rvmdk.S - Startup code for use with Keil's uVision. +; +; Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +; Software License Agreement +; +; Texas Instruments (TI) is supplying this software for use solely and +; exclusively on TI's microcontroller products. The software is owned by +; TI and/or its suppliers, and is protected under applicable copyright +; laws. You may not combine this software with "viral" open-source +; software in order to form a larger program. +; +; THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +; NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +; NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +; A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +; CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +; DAMAGES, FOR ANY REASON WHATSOEVER. +; +; This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +; +;****************************************************************************** + +;****************************************************************************** +; +; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +; +;****************************************************************************** +Stack EQU 0x00000200 + +;****************************************************************************** +; +; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> +; +;****************************************************************************** +Heap EQU 0x00000000 + +;****************************************************************************** +; +; Allocate space for the stack. +; +;****************************************************************************** + AREA STACK, NOINIT, READWRITE, ALIGN=3 +StackMem + SPACE Stack +__initial_sp + +;****************************************************************************** +; +; Allocate space for the heap. +; +;****************************************************************************** + AREA HEAP, NOINIT, READWRITE, ALIGN=3 +__heap_base +HeapMem + SPACE Heap +__heap_limit + +;****************************************************************************** +; +; Indicate that the code in this file preserves 8-byte alignment of the stack. +; +;****************************************************************************** + PRESERVE8 + +;****************************************************************************** +; +; Place code into the reset code section. +; +;****************************************************************************** + AREA RESET, CODE, READONLY + THUMB + +;****************************************************************************** +; +; The vector table. +; +;****************************************************************************** + EXPORT __Vectors +__Vectors + DCD StackMem + Stack ; Top of Stack + DCD Reset_Handler ; Reset Handler + DCD NmiSR ; NMI Handler + DCD FaultISR ; Hard Fault Handler + DCD IntDefaultHandler ; The MPU fault handler + DCD IntDefaultHandler ; The bus fault handler + DCD IntDefaultHandler ; The usage fault handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD IntDefaultHandler ; SVCall handler + DCD IntDefaultHandler ; Debug monitor handler + DCD 0 ; Reserved + DCD IntDefaultHandler ; The PendSV handler + DCD IntDefaultHandler ; The SysTick handler + DCD IntDefaultHandler ; GPIO Port A + DCD IntDefaultHandler ; GPIO Port B + DCD IntDefaultHandler ; GPIO Port C + DCD IntDefaultHandler ; GPIO Port D + DCD IntDefaultHandler ; GPIO Port E + DCD IntDefaultHandler ; UART0 Rx and Tx + DCD IntDefaultHandler ; UART1 Rx and Tx + DCD IntDefaultHandler ; SSI0 Rx and Tx + DCD IntDefaultHandler ; I2C0 Master and Slave + DCD IntDefaultHandler ; PWM Fault + DCD IntDefaultHandler ; PWM Generator 0 + DCD IntDefaultHandler ; PWM Generator 1 + DCD IntDefaultHandler ; PWM Generator 2 + DCD IntDefaultHandler ; Quadrature Encoder 0 + DCD IntDefaultHandler ; ADC Sequence 0 + DCD IntDefaultHandler ; ADC Sequence 1 + DCD IntDefaultHandler ; ADC Sequence 2 + DCD IntDefaultHandler ; ADC Sequence 3 + DCD IntDefaultHandler ; Watchdog timer + DCD IntDefaultHandler ; Timer 0 subtimer A + DCD IntDefaultHandler ; Timer 0 subtimer B + DCD IntDefaultHandler ; Timer 1 subtimer A + DCD IntDefaultHandler ; Timer 1 subtimer B + DCD IntDefaultHandler ; Timer 2 subtimer A + DCD IntDefaultHandler ; Timer 2 subtimer B + DCD IntDefaultHandler ; Analog Comparator 0 + DCD IntDefaultHandler ; Analog Comparator 1 + DCD IntDefaultHandler ; Analog Comparator 2 + DCD IntDefaultHandler ; System Control (PLL, OSC, BO) + DCD IntDefaultHandler ; FLASH Control + DCD IntDefaultHandler ; GPIO Port F + DCD IntDefaultHandler ; GPIO Port G + DCD IntDefaultHandler ; GPIO Port H + DCD IntDefaultHandler ; UART2 Rx and Tx + DCD IntDefaultHandler ; SSI1 Rx and Tx + DCD IntDefaultHandler ; Timer 3 subtimer A + DCD IntDefaultHandler ; Timer 3 subtimer B + DCD IntDefaultHandler ; I2C1 Master and Slave + DCD IntDefaultHandler ; Quadrature Encoder 1 + DCD IntDefaultHandler ; CAN0 + DCD IntDefaultHandler ; CAN1 + DCD IntDefaultHandler ; CAN2 + DCD IntDefaultHandler ; Ethernet + DCD IntDefaultHandler ; Hibernate + DCD IntDefaultHandler ; USB0 + DCD IntDefaultHandler ; PWM Generator 3 + DCD IntDefaultHandler ; uDMA Software Transfer + DCD IntDefaultHandler ; uDMA Error + DCD IntDefaultHandler ; ADC1 Sequence 0 + DCD IntDefaultHandler ; ADC1 Sequence 1 + DCD IntDefaultHandler ; ADC1 Sequence 2 + DCD IntDefaultHandler ; ADC1 Sequence 3 + DCD IntDefaultHandler ; I2S0 + DCD IntDefaultHandler ; External Bus Interface 0 + DCD IntDefaultHandler ; GPIO Port J + DCD IntDefaultHandler ; GPIO Port K + DCD IntDefaultHandler ; GPIO Port L + DCD IntDefaultHandler ; SSI2 Rx and Tx + DCD IntDefaultHandler ; SSI3 Rx and Tx + DCD IntDefaultHandler ; UART3 Rx and Tx + DCD IntDefaultHandler ; UART4 Rx and Tx + DCD IntDefaultHandler ; UART5 Rx and Tx + DCD IntDefaultHandler ; UART6 Rx and Tx + DCD IntDefaultHandler ; UART7 Rx and Tx + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD IntDefaultHandler ; I2C2 Master and Slave + DCD IntDefaultHandler ; I2C3 Master and Slave + DCD IntDefaultHandler ; Timer 4 subtimer A + DCD IntDefaultHandler ; Timer 4 subtimer B + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD IntDefaultHandler ; Timer 5 subtimer A + DCD IntDefaultHandler ; Timer 5 subtimer B + DCD IntDefaultHandler ; Wide Timer 0 subtimer A + DCD IntDefaultHandler ; Wide Timer 0 subtimer B + DCD IntDefaultHandler ; Wide Timer 1 subtimer A + DCD IntDefaultHandler ; Wide Timer 1 subtimer B + DCD IntDefaultHandler ; Wide Timer 2 subtimer A + DCD IntDefaultHandler ; Wide Timer 2 subtimer B + DCD IntDefaultHandler ; Wide Timer 3 subtimer A + DCD IntDefaultHandler ; Wide Timer 3 subtimer B + DCD IntDefaultHandler ; Wide Timer 4 subtimer A + DCD IntDefaultHandler ; Wide Timer 4 subtimer B + DCD IntDefaultHandler ; Wide Timer 5 subtimer A + DCD IntDefaultHandler ; Wide Timer 5 subtimer B + DCD IntDefaultHandler ; FPU + DCD IntDefaultHandler ; PECI 0 + DCD IntDefaultHandler ; LPC 0 + DCD IntDefaultHandler ; I2C4 Master and Slave + DCD IntDefaultHandler ; I2C5 Master and Slave + DCD IntDefaultHandler ; GPIO Port M + DCD IntDefaultHandler ; GPIO Port N + DCD IntDefaultHandler ; Quadrature Encoder 2 + DCD IntDefaultHandler ; Fan 0 + DCD 0 ; Reserved + DCD IntDefaultHandler ; GPIO Port P (Summary or P0) + DCD IntDefaultHandler ; GPIO Port P1 + DCD IntDefaultHandler ; GPIO Port P2 + DCD IntDefaultHandler ; GPIO Port P3 + DCD IntDefaultHandler ; GPIO Port P4 + DCD IntDefaultHandler ; GPIO Port P5 + DCD IntDefaultHandler ; GPIO Port P6 + DCD IntDefaultHandler ; GPIO Port P7 + DCD IntDefaultHandler ; GPIO Port Q (Summary or Q0) + DCD IntDefaultHandler ; GPIO Port Q1 + DCD IntDefaultHandler ; GPIO Port Q2 + DCD IntDefaultHandler ; GPIO Port Q3 + DCD IntDefaultHandler ; GPIO Port Q4 + DCD IntDefaultHandler ; GPIO Port Q5 + DCD IntDefaultHandler ; GPIO Port Q6 + DCD IntDefaultHandler ; GPIO Port Q7 + DCD IntDefaultHandler ; GPIO Port R + DCD IntDefaultHandler ; GPIO Port S + DCD IntDefaultHandler ; PWM 1 Generator 0 + DCD IntDefaultHandler ; PWM 1 Generator 1 + DCD IntDefaultHandler ; PWM 1 Generator 2 + DCD IntDefaultHandler ; PWM 1 Generator 3 + DCD IntDefaultHandler ; PWM 1 Fault + +;****************************************************************************** +; +; This is the code that gets called when the processor first starts execution +; following a reset event. +; +;****************************************************************************** + EXPORT Reset_Handler +Reset_Handler + ; + ; Enable the floating-point unit. This must be done here to handle the + ; case where main() uses floating-point and the function prologue saves + ; floating-point registers (which will fault if floating-point is not + ; enabled). Any configuration of the floating-point unit using + ; DriverLib APIs must be done here prior to the floating-point unit + ; being enabled. + ; + ; Note that this does not use DriverLib since it might not be included + ; in this project. + ; + MOVW R0, #0xED88 + MOVT R0, #0xE000 + LDR R1, [R0] + ORR R1, #0x00F00000 + STR R1, [R0] + + ; + ; Call the C library enty point that handles startup. This will copy + ; the .data section initializers from flash to SRAM and zero fill the + ; .bss section. + ; + IMPORT __main + B __main + +;****************************************************************************** +; +; This is the code that gets called when the processor receives a NMI. This +; simply enters an infinite loop, preserving the system state for examination +; by a debugger. +; +;****************************************************************************** +NmiSR + B NmiSR + +;****************************************************************************** +; +; This is the code that gets called when the processor receives a fault +; interrupt. This simply enters an infinite loop, preserving the system state +; for examination by a debugger. +; +;****************************************************************************** +FaultISR + B FaultISR + +;****************************************************************************** +; +; This is the code that gets called when the processor receives an unexpected +; interrupt. This simply enters an infinite loop, preserving the system state +; for examination by a debugger. +; +;****************************************************************************** +IntDefaultHandler + B IntDefaultHandler + +;****************************************************************************** +; +; Make sure the end of this section is aligned. +; +;****************************************************************************** + ALIGN + +;****************************************************************************** +; +; Some code in the normal code section for initializing the heap and stack. +; +;****************************************************************************** + AREA |.text|, CODE, READONLY + +;****************************************************************************** +; +; The function expected of the C library startup code for defining the stack +; and heap memory locations. For the C library version of the startup code, +; provide this function so that the C library initialization code can find out +; the location of the stack and heap. +; +;****************************************************************************** + IF :DEF: __MICROLIB + EXPORT __initial_sp + EXPORT __heap_base + EXPORT __heap_limit + ELSE + IMPORT __use_two_region_memory + EXPORT __user_initial_stackheap +__user_initial_stackheap + LDR R0, =HeapMem + LDR R1, =(StackMem + Stack) + LDR R2, =(HeapMem + Heap) + LDR R3, =StackMem + BX LR + ENDIF + +;****************************************************************************** +; +; Make sure the end of this section is aligned. +; +;****************************************************************************** + ALIGN + +;****************************************************************************** +; +; Tell the assembler that we're done. +; +;****************************************************************************** + END diff --git a/boards/ek-lm4f120xl/bitband/startup_sourcerygxx.S b/boards/ek-lm4f120xl/bitband/startup_sourcerygxx.S new file mode 100644 index 0000000..b720839 --- /dev/null +++ b/boards/ek-lm4f120xl/bitband/startup_sourcerygxx.S @@ -0,0 +1,75 @@ +//***************************************************************************** +// +// startup_sourcerygxx.S - Startup code for Sourcery CodeBench. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + + .syntax unified + .thumb + +//***************************************************************************** +// +// Place this code into the .cs3.reset section so that it can be executed prior +// to the startup code in Sourcery CodeBench. +// +//***************************************************************************** + .section .cs3.reset,"x" + +//***************************************************************************** +// +// The reset handler, which overrides the one provided by CS3. +// +//***************************************************************************** + .globl __cs3_reset + .thumb_func +__cs3_reset: + // + // Enable the floating-point unit. This must be done here to handle the + // case where main() uses floating-point and the function prologue saves + // floating-point registers (which will fault if floating-point is not + // enabled). Any configuration of the floating-point unit using DriverLib + // APIs must be done here prior to the floating-point unit being enabled. + // + // Note that this does not use DriverLib since it might not be included in + // this project. + // + movw r0, #0xed88 + movt r0, #0xe000 + ldr r1, [r0] + orr r1, #0x00f00000 + str r1, [r0] + + // + // Branch to the normal CS3 startup code. + // + .extern __cs3_reset_ekc_lm4f232 + ldr r0, =__cs3_reset_ekc_lm4f232 + bx r0 + + // + // Place the literal pool here. + // + .ltorg + + // + // The end of the file. + // + .end diff --git a/boards/ek-lm4f120xl/blinky/Makefile b/boards/ek-lm4f120xl/blinky/Makefile new file mode 100644 index 0000000..0f0e2b9 --- /dev/null +++ b/boards/ek-lm4f120xl/blinky/Makefile @@ -0,0 +1,82 @@ +#****************************************************************************** +# +# Makefile - Rules for building the blinky example. +# +# Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +# Software License Agreement +# +# Texas Instruments (TI) is supplying this software for use solely and +# exclusively on TI's microcontroller products. The software is owned by +# TI and/or its suppliers, and is protected under applicable copyright +# laws. You may not combine this software with "viral" open-source +# software in order to form a larger program. +# +# THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +# NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +# NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +# A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +# CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +# DAMAGES, FOR ANY REASON WHATSOEVER. +# +# This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +# +#****************************************************************************** + +# +# Defines the part type that this project uses. +# +PART=LM4F120H5QR + +# +# Set the processor variant. +# +VARIANT=cm4f + +# +# The base directory for StellarisWare. +# +ROOT=../../.. + +# +# Include the common make definitions. +# +include ${ROOT}/makedefs + +# +# Where to find header files that do not live in the source directory. +# +IPATH=../../.. + +# +# The default rule, which causes the blinky example to be built. +# +all: ${COMPILER} +all: ${COMPILER}/blinky.axf + +# +# The rule to clean out all the build products. +# +clean: + @rm -rf ${COMPILER} ${wildcard *~} + +# +# The rule to create the target directory. +# +${COMPILER}: + @mkdir -p ${COMPILER} + +# +# Rules for building the blinky example. +# +${COMPILER}/blinky.axf: ${COMPILER}/blinky.o +${COMPILER}/blinky.axf: ${COMPILER}/startup_${COMPILER}.o +${COMPILER}/blinky.axf: blinky.ld +SCATTERgcc_blinky=blinky.ld +ENTRY_blinky=ResetISR + +# +# Include the automatically generated dependency files. +# +ifneq (${MAKECMDGOALS},clean) +-include ${wildcard ${COMPILER}/*.d} __dummy__ +endif diff --git a/boards/ek-lm4f120xl/blinky/blinky.c b/boards/ek-lm4f120xl/blinky/blinky.c new file mode 100644 index 0000000..d45da73 --- /dev/null +++ b/boards/ek-lm4f120xl/blinky/blinky.c @@ -0,0 +1,94 @@ +//***************************************************************************** +// +// blinky.c - Simple example to blink the on-board LED. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +#include "inc/lm4f120h5qr.h" + +//***************************************************************************** +// +//! \addtogroup example_list +//!

Blinky (blinky)

+//! +//! A very simple example that blinks the on-board LED using direct register +//! access. +// +//***************************************************************************** + + +//***************************************************************************** +// +// Blink the on-board LED. +// +//***************************************************************************** +int +main(void) +{ + volatile unsigned long ulLoop; + + // + // Enable the GPIO port that is used for the on-board LED. + // + SYSCTL_RCGC2_R = SYSCTL_RCGC2_GPIOF; + + // + // Do a dummy read to insert a few cycles after enabling the peripheral. + // + ulLoop = SYSCTL_RCGC2_R; + + // + // Enable the GPIO pin for the LED (PF3). Set the direction as output, and + // enable the GPIO pin for digital function. + // + GPIO_PORTF_DIR_R = 0x08; + GPIO_PORTF_DEN_R = 0x08; + + // + // Loop forever. + // + while(1) + { + // + // Turn on the LED. + // + GPIO_PORTF_DATA_R |= 0x08; + + // + // Delay for a bit. + // + for(ulLoop = 0; ulLoop < 200000; ulLoop++) + { + } + + // + // Turn off the LED. + // + GPIO_PORTF_DATA_R &= ~(0x08); + + // + // Delay for a bit. + // + for(ulLoop = 0; ulLoop < 200000; ulLoop++) + { + } + } +} diff --git a/boards/ek-lm4f120xl/blinky/blinky.ewd b/boards/ek-lm4f120xl/blinky/blinky.ewd new file mode 100644 index 0000000..b8eeac7 --- /dev/null +++ b/boards/ek-lm4f120xl/blinky/blinky.ewd @@ -0,0 +1,614 @@ + + + + 1 + + Debug + + ARM + + 1 + + C-SPY + 2 + + 15 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + ARMSIM_ID + 2 + + 1 + 1 + 1 + + + + + + + + ANGEL_ID + 2 + + 0 + 1 + 1 + + + + + + + + + + + + GDBSERVER_ID + 2 + + 0 + 1 + 1 + + + + + + + + + + + IARROM_ID + 2 + + 0 + 1 + 1 + + + + + + + + + + JLINK_ID + 2 + + 9 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + LMIFTDI_ID + 2 + + 1 + 1 + 1 + + + + + + + + MACRAIGOR_ID + 2 + + 2 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + RDI_ID + 2 + + 1 + 1 + 1 + + + + + + + + + + + + + + + + + THIRDPARTY_ID + 2 + + 0 + 1 + 1 + + + + + + + + + $TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\OSE\OseEpsilonPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\PowerPac\PowerPacRTOS.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin + 0 + + + $EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin + 1 + + + $EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin + 0 + + + $EW_DIR$\common\plugins\Profiling\Profiling.ENU.ewplugin + 1 + + + $EW_DIR$\common\plugins\Stack\Stack.ENU.ewplugin + 1 + + + + diff --git a/boards/ek-lm4f120xl/blinky/blinky.ewp b/boards/ek-lm4f120xl/blinky/blinky.ewp new file mode 100644 index 0000000..0f42f6c --- /dev/null +++ b/boards/ek-lm4f120xl/blinky/blinky.ewp @@ -0,0 +1,777 @@ + + + + 1 + + Debug + + ARM + + 1 + + General + 3 + + 14 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCARM + 2 + + 19 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AARM + 2 + + 7 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + OBJCOPY + 0 + + 1 + 1 + 1 + + + + + + + + + CUSTOM + 3 + + + + + + + BICOMP + 0 + + + + BUILDACTION + 1 + + + + + + + ILINK + 0 + + 5 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + IARCHIVE + 0 + + 0 + 1 + 1 + + + + + + + BILINK + 0 + + + + + Source + + $PROJ_DIR$\blinky.c + + + $PROJ_DIR$\startup_ewarm.c + + + diff --git a/boards/ek-lm4f120xl/blinky/blinky.icf b/boards/ek-lm4f120xl/blinky/blinky.icf new file mode 100644 index 0000000..5623faa --- /dev/null +++ b/boards/ek-lm4f120xl/blinky/blinky.icf @@ -0,0 +1,78 @@ +//***************************************************************************** +// +// blinky.icf - Linker configuration file for blinky. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +// +// Define a memory region that covers the entire 4 GB addressible space of the +// processor. +// +define memory mem with size = 4G; + +// +// Define a region for the on-chip flash. +// +define region FLASH = mem:[from 0x00000000 to 0x0003ffff]; + +// +// Define a region for the on-chip SRAM. +// +define region SRAM = mem:[from 0x20000000 to 0x20007fff]; + +// +// Define a block for the heap. The size should be set to something other +// than zero if things in the C library that require the heap are used. +// +define block HEAP with alignment = 8, size = 0x00000000 { }; + +// +// Indicate that the read/write values should be initialized by copying from +// flash. +// +initialize by copy { readwrite }; + +// +// Indicate that the noinit values should be left alone. This includes the +// stack, which if initialized will destroy the return address from the +// initialization code, causing the processor to branch to zero and fault. +// +do not initialize { section .noinit }; + +// +// Place the interrupt vectors at the start of flash. +// +place at start of FLASH { readonly section .intvec }; + +// +// Place the remainder of the read-only items into flash. +// +place in FLASH { readonly }; + +// +// Place the RAM vector table at the start of SRAM. +// +place at start of SRAM { section VTABLE }; + +// +// Place all read/write items into SRAM. +// +place in SRAM { readwrite, block HEAP }; diff --git a/boards/ek-lm4f120xl/blinky/blinky.ld b/boards/ek-lm4f120xl/blinky/blinky.ld new file mode 100644 index 0000000..cbffeb6 --- /dev/null +++ b/boards/ek-lm4f120xl/blinky/blinky.ld @@ -0,0 +1,57 @@ +/****************************************************************************** + * + * blinky.ld - Linker configuration file for blinky. + * + * Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. + * Software License Agreement + * + * Texas Instruments (TI) is supplying this software for use solely and + * exclusively on TI's microcontroller products. The software is owned by + * TI and/or its suppliers, and is protected under applicable copyright + * laws. You may not combine this software with "viral" open-source + * software in order to form a larger program. + * + * THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. + * NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT + * NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY + * CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL + * DAMAGES, FOR ANY REASON WHATSOEVER. + * + * This is part of revision 9453 of the EK-LM4F120XL Firmware Package. + * + *****************************************************************************/ + +MEMORY +{ + FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x00040000 + SRAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00008000 +} + +SECTIONS +{ + .text : + { + _text = .; + KEEP(*(.isr_vector)) + *(.text*) + *(.rodata*) + _etext = .; + } > FLASH + + .data : AT(ADDR(.text) + SIZEOF(.text)) + { + _data = .; + *(vtable) + *(.data*) + _edata = .; + } > SRAM + + .bss : + { + _bss = .; + *(.bss*) + *(COMMON) + _ebss = .; + } > SRAM +} diff --git a/boards/ek-lm4f120xl/blinky/blinky.sct b/boards/ek-lm4f120xl/blinky/blinky.sct new file mode 100644 index 0000000..823dc18 --- /dev/null +++ b/boards/ek-lm4f120xl/blinky/blinky.sct @@ -0,0 +1,47 @@ +;****************************************************************************** +; +; blinky.sct - Linker configuration file for blinky. +; +; Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +; Software License Agreement +; +; Texas Instruments (TI) is supplying this software for use solely and +; exclusively on TI's microcontroller products. The software is owned by +; TI and/or its suppliers, and is protected under applicable copyright +; laws. You may not combine this software with "viral" open-source +; software in order to form a larger program. +; +; THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +; NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +; NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +; A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +; CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +; DAMAGES, FOR ANY REASON WHATSOEVER. +; +; This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +; +;****************************************************************************** + +LR_IROM 0x00000000 0x00040000 +{ + ; + ; Specify the Execution Address of the code and the size. + ; + ER_IROM 0x00000000 0x00040000 + { + *.o (RESET, +First) + * (InRoot$$Sections, +RO) + } + + ; + ; Specify the Execution Address of the data area. + ; + RW_IRAM 0x20000000 0x00008000 + { + ; + ; Uncomment the following line in order to use IntRegister(). + ; + ;* (vtable, +First) + * (+RW, +ZI) + } +} diff --git a/boards/ek-lm4f120xl/blinky/blinky.sgxx b/boards/ek-lm4f120xl/blinky/blinky.sgxx new file mode 100644 index 0000000..e29f3e8 Binary files /dev/null and b/boards/ek-lm4f120xl/blinky/blinky.sgxx differ diff --git a/boards/ek-lm4f120xl/blinky/blinky.uvopt b/boards/ek-lm4f120xl/blinky/blinky.uvopt new file mode 100644 index 0000000..683c304 --- /dev/null +++ b/boards/ek-lm4f120xl/blinky/blinky.uvopt @@ -0,0 +1,268 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + + + + 0 + 0 + + + + blinky + 0x4 + ARM-ADS + + 8000000 + + 1 + 1 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\rvmdk\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 255 + + + 0 + Data Sheet + DATASHTS\Luminary\LM4F120H5QR.PDF + + + + SARMCM3.DLL + -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 0 + 1 + 0 + 0 + 4 + + + + + + + + + + + BIN\lmidk-agdi.dll + + + + 0 + lmidk-agdi + -O4614 -S3 -FO29 + + + 0 + DLGTARM + + + + 0 + ARMDBGFLAGS + + + + + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + Source + 1 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + .\blinky.c + blinky.c + + + 1 + 2 + 2 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + .\startup_rvmdk.S + startup_rvmdk.S + + + + + Documentation + 1 + 0 + 0 + + 2 + 3 + 5 + 0 + 1 + 0 + 0 + 1 + 1 + 0 + .\readme.txt + readme.txt + + 44 + 0 + 1 + + -1 + -1 + + + -1 + -1 + + + 0 + 0 + 729 + 300 + + + + + + + 1 + 0 + + 100 + 0 + + + .\readme.txt + 0 + 1 + 1 + + + + + + diff --git a/boards/ek-lm4f120xl/blinky/blinky.uvproj b/boards/ek-lm4f120xl/blinky/blinky.uvproj new file mode 100644 index 0000000..c99444f --- /dev/null +++ b/boards/ek-lm4f120xl/blinky/blinky.uvproj @@ -0,0 +1,414 @@ + + + + 1.1 + +
### uVision Project, (C) Keil Software
+ + + + blinky + 0x4 + ARM-ADS + + + LM4F120H5QR + Texas Instruments + IRAM(0x20000000-0x20007FFF) IROM(0-0x3FFFF) CLOCK(8000000) CPUTYPE("Cortex-M4") FPU2 + + "STARTUP\Luminary\Startup.s" ("Luminary Startup Code") + UL2CM3(-O207 -S0 -C0 -FO7 -FD20000000 -FC800 -FN1 -FF0LM4F_256 -FS00 -FL040000) + 5919 + LM4Fxxxx.H + + + + + + + + + + 0 + + + + Luminary\ + Luminary\ + + 0 + 0 + 0 + 0 + 1 + + .\rvmdk\ + blinky + 1 + 0 + 0 + 1 + 1 + .\rvmdk\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + + 1 + 0 + fromelf --bin --output .\rvmdk\blinky.bin .\rvmdk\blinky.axf + + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + + + SARMCM3.DLL + -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + + 1 + 0 + 0 + 0 + 16 + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + + + 1 + 1 + 0 + 1 + 1 + 1 + 0 + 1 + + 0 + 4 + + + + + + + + + + + + + + BIN\lmidk-agdi.dll + + + + + 1 + 0 + 0 + 0 + 1 + 4099 + + BIN\lmidk-agdi.dll + + + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M4" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 2 + 0 + 0 + 8 + 1 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x8000 + + + 1 + 0x0 + 0x40000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x40000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x8000 + + + 0 + 0x0 + 0x0 + + + + + + 0 + 3 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + + + rvmdk PART_LM4F120H5QR + + ..\..\..; + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x00000000 + 0x20000000 + blinky.sct + + + --entry Reset_Handler + + + + + + + + Source + + + blinky.c + 1 + .\blinky.c + + + startup_rvmdk.S + 2 + .\startup_rvmdk.S + + + + + Documentation + + + readme.txt + 5 + .\readme.txt + + + + + + + + diff --git a/boards/ek-lm4f120xl/blinky/blinky_ccs.cmd b/boards/ek-lm4f120xl/blinky/blinky_ccs.cmd new file mode 100644 index 0000000..0c05f49 --- /dev/null +++ b/boards/ek-lm4f120xl/blinky/blinky_ccs.cmd @@ -0,0 +1,70 @@ +/****************************************************************************** + * + * blinky_ccs.cmd - CCS linker configuration file for blinky. + * + * Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. + * Software License Agreement + * + * Texas Instruments (TI) is supplying this software for use solely and + * exclusively on TI's microcontroller products. The software is owned by + * TI and/or its suppliers, and is protected under applicable copyright + * laws. You may not combine this software with "viral" open-source + * software in order to form a larger program. + * + * THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. + * NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT + * NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY + * CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL + * DAMAGES, FOR ANY REASON WHATSOEVER. + * + * This is part of revision 9453 of the EK-LM4F120XL Firmware Package. + * + *****************************************************************************/ + +--retain=g_pfnVectors + +/* The following command line options are set as part of the CCS project. */ +/* If you are building using the command line, or for some reason want to */ +/* define them here, you can uncomment and modify these lines as needed. */ +/* If you are using CCS for building, it is probably better to make any such */ +/* modifications in your CCS project and leave this file alone. */ +/* */ +/* --heap_size=0 */ +/* --stack_size=256 */ +/* --library=rtsv7M3_T_le_eabi.lib */ + +/* The starting address of the application. Normally the interrupt vectors */ +/* must be located at the beginning of the application. */ +#define APP_BASE 0x00000000 +#define RAM_BASE 0x20000000 + +/* System memory map */ + +MEMORY +{ + /* Application stored in and executes from internal flash */ + FLASH (RX) : origin = APP_BASE, length = 0x00040000 + /* Application uses internal RAM for data */ + SRAM (RWX) : origin = 0x20000000, length = 0x00008000 +} + +/* Section allocation in memory */ + +SECTIONS +{ + .intvecs: > APP_BASE + .text : > FLASH + .const : > FLASH + .cinit : > FLASH + .pinit : > FLASH + .init_array : > FLASH + + .vtable : > RAM_BASE + .data : > SRAM + .bss : > SRAM + .sysmem : > SRAM + .stack : > SRAM +} + +__STACK_TOP = __stack + 256; diff --git a/boards/ek-lm4f120xl/blinky/blinky_sourcerygxx.ld b/boards/ek-lm4f120xl/blinky/blinky_sourcerygxx.ld new file mode 100644 index 0000000..98d6498 --- /dev/null +++ b/boards/ek-lm4f120xl/blinky/blinky_sourcerygxx.ld @@ -0,0 +1,31 @@ +/****************************************************************************** + * + * blinky_sourcerygxx.ld - Scatter file for Sourcery CodeBench + * + * Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. + * Software License Agreement + * + * Texas Instruments (TI) is supplying this software for use solely and + * exclusively on TI's microcontroller products. The software is owned by + * TI and/or its suppliers, and is protected under applicable copyright + * laws. You may not combine this software with "viral" open-source + * software in order to form a larger program. + * + * THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. + * NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT + * NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY + * CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL + * DAMAGES, FOR ANY REASON WHATSOEVER. + * + * This is part of revision 9453 of the EK-LM4F120XL Firmware Package. + * + *****************************************************************************/ + +/****************************************************************************** + * + * Define the end of the heap space, which determines the beginning of the + * stack space. + * + *****************************************************************************/ +__cs3_heap_end = __cs3_region_end_ram - 256; diff --git a/boards/ek-lm4f120xl/blinky/ccs/.ccsimportspec b/boards/ek-lm4f120xl/blinky/ccs/.ccsimportspec new file mode 100644 index 0000000..60cba3f --- /dev/null +++ b/boards/ek-lm4f120xl/blinky/ccs/.ccsimportspec @@ -0,0 +1,8 @@ + + + + + + + + diff --git a/boards/ek-lm4f120xl/blinky/ccs/.ccsproject b/boards/ek-lm4f120xl/blinky/ccs/.ccsproject new file mode 100644 index 0000000..56793f4 --- /dev/null +++ b/boards/ek-lm4f120xl/blinky/ccs/.ccsproject @@ -0,0 +1,12 @@ + + + + + + + + + + + + diff --git a/boards/ek-lm4f120xl/blinky/ccs/.cproject b/boards/ek-lm4f120xl/blinky/ccs/.cproject new file mode 100644 index 0000000..1535304 --- /dev/null +++ b/boards/ek-lm4f120xl/blinky/ccs/.cproject @@ -0,0 +1,187 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/boards/ek-lm4f120xl/blinky/ccs/.project b/boards/ek-lm4f120xl/blinky/ccs/.project new file mode 100644 index 0000000..4ebb7e7 --- /dev/null +++ b/boards/ek-lm4f120xl/blinky/ccs/.project @@ -0,0 +1,106 @@ + + + blinky + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + + + ?name? + + + + org.eclipse.cdt.make.core.append_environment + true + + + org.eclipse.cdt.make.core.autoBuildTarget + all + + + org.eclipse.cdt.make.core.buildArguments + -k + + + org.eclipse.cdt.make.core.buildCommand + ${CCS_UTILS_DIR}/bin/gmake + + + org.eclipse.cdt.make.core.buildLocation + ${BuildDirectory} + + + org.eclipse.cdt.make.core.cleanBuildTarget + clean + + + org.eclipse.cdt.make.core.contents + org.eclipse.cdt.make.core.activeConfigSettings + + + org.eclipse.cdt.make.core.enableAutoBuild + true + + + org.eclipse.cdt.make.core.enableCleanBuild + true + + + org.eclipse.cdt.make.core.enableFullBuild + true + + + org.eclipse.cdt.make.core.fullBuildTarget + all + + + org.eclipse.cdt.make.core.stopOnError + false + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + true + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + com.ti.ccstudio.core.ccsNature + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.core.ccnature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + blinky.c + 1 + SW_ROOT/boards/ek-lm4f120xl/blinky/blinky.c + + + blinky_ccs.cmd + 1 + SW_ROOT/boards/ek-lm4f120xl/blinky/blinky_ccs.cmd + + + startup_ccs.c + 1 + SW_ROOT/boards/ek-lm4f120xl/blinky/startup_ccs.c + + + + + SW_ROOT + $%7BPARENT-4-PROJECT_LOC%7D + + + diff --git a/boards/ek-lm4f120xl/blinky/ccs/.settings/org.eclipse.cdt.codan.core.prefs b/boards/ek-lm4f120xl/blinky/ccs/.settings/org.eclipse.cdt.codan.core.prefs new file mode 100644 index 0000000..98b6350 --- /dev/null +++ b/boards/ek-lm4f120xl/blinky/ccs/.settings/org.eclipse.cdt.codan.core.prefs @@ -0,0 +1,3 @@ +eclipse.preferences.version=1 +inEditor=false +onBuild=false diff --git a/boards/ek-lm4f120xl/blinky/ccs/Debug/blinky.bin b/boards/ek-lm4f120xl/blinky/ccs/Debug/blinky.bin new file mode 100644 index 0000000..1013117 Binary files /dev/null and b/boards/ek-lm4f120xl/blinky/ccs/Debug/blinky.bin differ diff --git a/boards/ek-lm4f120xl/blinky/ccs/Debug/blinky.out b/boards/ek-lm4f120xl/blinky/ccs/Debug/blinky.out new file mode 100644 index 0000000..331bc1e Binary files /dev/null and b/boards/ek-lm4f120xl/blinky/ccs/Debug/blinky.out differ diff --git a/boards/ek-lm4f120xl/blinky/ccs/macros.ini_initial b/boards/ek-lm4f120xl/blinky/ccs/macros.ini_initial new file mode 100644 index 0000000..588017d --- /dev/null +++ b/boards/ek-lm4f120xl/blinky/ccs/macros.ini_initial @@ -0,0 +1 @@ +SW_ROOT = ../../../.. diff --git a/boards/ek-lm4f120xl/blinky/ccs/target_config.ccxml b/boards/ek-lm4f120xl/blinky/ccs/target_config.ccxml new file mode 100644 index 0000000..469eea0 --- /dev/null +++ b/boards/ek-lm4f120xl/blinky/ccs/target_config.ccxml @@ -0,0 +1,13 @@ + + + + + + + + + + + + + diff --git a/boards/ek-lm4f120xl/blinky/ewarm/Exe/blinky.bin b/boards/ek-lm4f120xl/blinky/ewarm/Exe/blinky.bin new file mode 100644 index 0000000..8731cac Binary files /dev/null and b/boards/ek-lm4f120xl/blinky/ewarm/Exe/blinky.bin differ diff --git a/boards/ek-lm4f120xl/blinky/ewarm/Exe/blinky.out b/boards/ek-lm4f120xl/blinky/ewarm/Exe/blinky.out new file mode 100644 index 0000000..0f9c4bd Binary files /dev/null and b/boards/ek-lm4f120xl/blinky/ewarm/Exe/blinky.out differ diff --git a/boards/ek-lm4f120xl/blinky/gcc/blinky.axf b/boards/ek-lm4f120xl/blinky/gcc/blinky.axf new file mode 100644 index 0000000..6ea4f4d Binary files /dev/null and b/boards/ek-lm4f120xl/blinky/gcc/blinky.axf differ diff --git a/boards/ek-lm4f120xl/blinky/gcc/blinky.bin b/boards/ek-lm4f120xl/blinky/gcc/blinky.bin new file mode 100644 index 0000000..4da66e8 Binary files /dev/null and b/boards/ek-lm4f120xl/blinky/gcc/blinky.bin differ diff --git a/boards/ek-lm4f120xl/blinky/readme.txt b/boards/ek-lm4f120xl/blinky/readme.txt new file mode 100644 index 0000000..89b9fbe --- /dev/null +++ b/boards/ek-lm4f120xl/blinky/readme.txt @@ -0,0 +1,24 @@ +Blinky + +A very simple example that blinks the on-board LED using direct register +access. + +------------------------------------------------------------------------------- + +Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +Software License Agreement + +Texas Instruments (TI) is supplying this software for use solely and +exclusively on TI's microcontroller products. The software is owned by +TI and/or its suppliers, and is protected under applicable copyright +laws. You may not combine this software with "viral" open-source +software in order to form a larger program. + +THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +DAMAGES, FOR ANY REASON WHATSOEVER. + +This is part of revision 9453 of the EK-LM4F120XL Firmware Package. diff --git a/boards/ek-lm4f120xl/blinky/rvmdk/blinky.axf b/boards/ek-lm4f120xl/blinky/rvmdk/blinky.axf new file mode 100644 index 0000000..e0702ee Binary files /dev/null and b/boards/ek-lm4f120xl/blinky/rvmdk/blinky.axf differ diff --git a/boards/ek-lm4f120xl/blinky/rvmdk/blinky.bin b/boards/ek-lm4f120xl/blinky/rvmdk/blinky.bin new file mode 100644 index 0000000..cbe58bd Binary files /dev/null and b/boards/ek-lm4f120xl/blinky/rvmdk/blinky.bin differ diff --git a/boards/ek-lm4f120xl/blinky/sourcerygxx/blinky.axf b/boards/ek-lm4f120xl/blinky/sourcerygxx/blinky.axf new file mode 100644 index 0000000..ec73db3 Binary files /dev/null and b/boards/ek-lm4f120xl/blinky/sourcerygxx/blinky.axf differ diff --git a/boards/ek-lm4f120xl/blinky/sourcerygxx/blinky.bin b/boards/ek-lm4f120xl/blinky/sourcerygxx/blinky.bin new file mode 100644 index 0000000..07bb74e Binary files /dev/null and b/boards/ek-lm4f120xl/blinky/sourcerygxx/blinky.bin differ diff --git a/boards/ek-lm4f120xl/blinky/startup_ccs.c b/boards/ek-lm4f120xl/blinky/startup_ccs.c new file mode 100644 index 0000000..9f15b47 --- /dev/null +++ b/boards/ek-lm4f120xl/blinky/startup_ccs.c @@ -0,0 +1,291 @@ +//***************************************************************************** +// +// startup_ccs.c - Startup code for use with TI's Code Composer Studio. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +//***************************************************************************** +// +// Forward declaration of the default fault handlers. +// +//***************************************************************************** +void ResetISR(void); +static void NmiSR(void); +static void FaultISR(void); +static void IntDefaultHandler(void); + +//***************************************************************************** +// +// External declaration for the reset handler that is to be called when the +// processor is started +// +//***************************************************************************** +extern void _c_int00(void); + +//***************************************************************************** +// +// Linker variable that marks the top of the stack. +// +//***************************************************************************** +extern unsigned long __STACK_TOP; + +//***************************************************************************** +// +// The vector table. Note that the proper constructs must be placed on this to +// ensure that it ends up at physical address 0x0000.0000 or at the start of +// the program if located at a start address other than 0. +// +//***************************************************************************** +#pragma DATA_SECTION(g_pfnVectors, ".intvecs") +void (* const g_pfnVectors[])(void) = +{ + (void (*)(void))((unsigned long)&__STACK_TOP), + // The initial stack pointer + ResetISR, // The reset handler + NmiSR, // The NMI handler + FaultISR, // The hard fault handler + IntDefaultHandler, // The MPU fault handler + IntDefaultHandler, // The bus fault handler + IntDefaultHandler, // The usage fault handler + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // SVCall handler + IntDefaultHandler, // Debug monitor handler + 0, // Reserved + IntDefaultHandler, // The PendSV handler + IntDefaultHandler, // The SysTick handler + IntDefaultHandler, // GPIO Port A + IntDefaultHandler, // GPIO Port B + IntDefaultHandler, // GPIO Port C + IntDefaultHandler, // GPIO Port D + IntDefaultHandler, // GPIO Port E + IntDefaultHandler, // UART0 Rx and Tx + IntDefaultHandler, // UART1 Rx and Tx + IntDefaultHandler, // SSI0 Rx and Tx + IntDefaultHandler, // I2C0 Master and Slave + IntDefaultHandler, // PWM Fault + IntDefaultHandler, // PWM Generator 0 + IntDefaultHandler, // PWM Generator 1 + IntDefaultHandler, // PWM Generator 2 + IntDefaultHandler, // Quadrature Encoder 0 + IntDefaultHandler, // ADC Sequence 0 + IntDefaultHandler, // ADC Sequence 1 + IntDefaultHandler, // ADC Sequence 2 + IntDefaultHandler, // ADC Sequence 3 + IntDefaultHandler, // Watchdog timer + IntDefaultHandler, // Timer 0 subtimer A + IntDefaultHandler, // Timer 0 subtimer B + IntDefaultHandler, // Timer 1 subtimer A + IntDefaultHandler, // Timer 1 subtimer B + IntDefaultHandler, // Timer 2 subtimer A + IntDefaultHandler, // Timer 2 subtimer B + IntDefaultHandler, // Analog Comparator 0 + IntDefaultHandler, // Analog Comparator 1 + IntDefaultHandler, // Analog Comparator 2 + IntDefaultHandler, // System Control (PLL, OSC, BO) + IntDefaultHandler, // FLASH Control + IntDefaultHandler, // GPIO Port F + IntDefaultHandler, // GPIO Port G + IntDefaultHandler, // GPIO Port H + IntDefaultHandler, // UART2 Rx and Tx + IntDefaultHandler, // SSI1 Rx and Tx + IntDefaultHandler, // Timer 3 subtimer A + IntDefaultHandler, // Timer 3 subtimer B + IntDefaultHandler, // I2C1 Master and Slave + IntDefaultHandler, // Quadrature Encoder 1 + IntDefaultHandler, // CAN0 + IntDefaultHandler, // CAN1 + IntDefaultHandler, // CAN2 + IntDefaultHandler, // Ethernet + IntDefaultHandler, // Hibernate + IntDefaultHandler, // USB0 + IntDefaultHandler, // PWM Generator 3 + IntDefaultHandler, // uDMA Software Transfer + IntDefaultHandler, // uDMA Error + IntDefaultHandler, // ADC1 Sequence 0 + IntDefaultHandler, // ADC1 Sequence 1 + IntDefaultHandler, // ADC1 Sequence 2 + IntDefaultHandler, // ADC1 Sequence 3 + IntDefaultHandler, // I2S0 + IntDefaultHandler, // External Bus Interface 0 + IntDefaultHandler, // GPIO Port J + IntDefaultHandler, // GPIO Port K + IntDefaultHandler, // GPIO Port L + IntDefaultHandler, // SSI2 Rx and Tx + IntDefaultHandler, // SSI3 Rx and Tx + IntDefaultHandler, // UART3 Rx and Tx + IntDefaultHandler, // UART4 Rx and Tx + IntDefaultHandler, // UART5 Rx and Tx + IntDefaultHandler, // UART6 Rx and Tx + IntDefaultHandler, // UART7 Rx and Tx + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // I2C2 Master and Slave + IntDefaultHandler, // I2C3 Master and Slave + IntDefaultHandler, // Timer 4 subtimer A + IntDefaultHandler, // Timer 4 subtimer B + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // Timer 5 subtimer A + IntDefaultHandler, // Timer 5 subtimer B + IntDefaultHandler, // Wide Timer 0 subtimer A + IntDefaultHandler, // Wide Timer 0 subtimer B + IntDefaultHandler, // Wide Timer 1 subtimer A + IntDefaultHandler, // Wide Timer 1 subtimer B + IntDefaultHandler, // Wide Timer 2 subtimer A + IntDefaultHandler, // Wide Timer 2 subtimer B + IntDefaultHandler, // Wide Timer 3 subtimer A + IntDefaultHandler, // Wide Timer 3 subtimer B + IntDefaultHandler, // Wide Timer 4 subtimer A + IntDefaultHandler, // Wide Timer 4 subtimer B + IntDefaultHandler, // Wide Timer 5 subtimer A + IntDefaultHandler, // Wide Timer 5 subtimer B + IntDefaultHandler, // FPU + IntDefaultHandler, // PECI 0 + IntDefaultHandler, // LPC 0 + IntDefaultHandler, // I2C4 Master and Slave + IntDefaultHandler, // I2C5 Master and Slave + IntDefaultHandler, // GPIO Port M + IntDefaultHandler, // GPIO Port N + IntDefaultHandler, // Quadrature Encoder 2 + IntDefaultHandler, // Fan 0 + 0, // Reserved + IntDefaultHandler, // GPIO Port P (Summary or P0) + IntDefaultHandler, // GPIO Port P1 + IntDefaultHandler, // GPIO Port P2 + IntDefaultHandler, // GPIO Port P3 + IntDefaultHandler, // GPIO Port P4 + IntDefaultHandler, // GPIO Port P5 + IntDefaultHandler, // GPIO Port P6 + IntDefaultHandler, // GPIO Port P7 + IntDefaultHandler, // GPIO Port Q (Summary or Q0) + IntDefaultHandler, // GPIO Port Q1 + IntDefaultHandler, // GPIO Port Q2 + IntDefaultHandler, // GPIO Port Q3 + IntDefaultHandler, // GPIO Port Q4 + IntDefaultHandler, // GPIO Port Q5 + IntDefaultHandler, // GPIO Port Q6 + IntDefaultHandler, // GPIO Port Q7 + IntDefaultHandler, // GPIO Port R + IntDefaultHandler, // GPIO Port S + IntDefaultHandler, // PWM 1 Generator 0 + IntDefaultHandler, // PWM 1 Generator 1 + IntDefaultHandler, // PWM 1 Generator 2 + IntDefaultHandler, // PWM 1 Generator 3 + IntDefaultHandler // PWM 1 Fault +}; + +//***************************************************************************** +// +// This is the code that gets called when the processor first starts execution +// following a reset event. Only the absolutely necessary set is performed, +// after which the application supplied entry() routine is called. Any fancy +// actions (such as making decisions based on the reset cause register, and +// resetting the bits in that register) are left solely in the hands of the +// application. +// +//***************************************************************************** +void +ResetISR(void) +{ + // + // Jump to the CCS C initialization routine. This will enable the + // floating-point unit as well, so that does not need to be done here. + // + __asm(" .global _c_int00\n" + " b.w _c_int00"); +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a NMI. This +// simply enters an infinite loop, preserving the system state for examination +// by a debugger. +// +//***************************************************************************** +static void +NmiSR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a fault +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +FaultISR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives an unexpected +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +IntDefaultHandler(void) +{ + // + // Go into an infinite loop. + // + while(1) + { + } +} diff --git a/boards/ek-lm4f120xl/blinky/startup_ewarm.c b/boards/ek-lm4f120xl/blinky/startup_ewarm.c new file mode 100644 index 0000000..d7c43dd --- /dev/null +++ b/boards/ek-lm4f120xl/blinky/startup_ewarm.c @@ -0,0 +1,325 @@ +//***************************************************************************** +// +// startup_ewarm.c - Startup code for use with IAR's Embedded Workbench, +// version 5. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +#include "inc/hw_nvic.h" +#include "inc/hw_types.h" + +//***************************************************************************** +// +// Enable the IAR extensions for this source file. +// +//***************************************************************************** +#pragma language=extended + +//***************************************************************************** +// +// Forward declaration of the default fault handlers. +// +//***************************************************************************** +void ResetISR(void); +static void NmiSR(void); +static void FaultISR(void); +static void IntDefaultHandler(void); + +//***************************************************************************** +// +// The entry point for the application startup code. +// +//***************************************************************************** +extern void __iar_program_start(void); + +//***************************************************************************** +// +// Reserve space for the system stack. +// +//***************************************************************************** +static unsigned long pulStack[64] @ ".noinit"; + +//***************************************************************************** +// +// A union that describes the entries of the vector table. The union is needed +// since the first entry is the stack pointer and the remainder are function +// pointers. +// +//***************************************************************************** +typedef union +{ + void (*pfnHandler)(void); + unsigned long ulPtr; +} +uVectorEntry; + +//***************************************************************************** +// +// The vector table. Note that the proper constructs must be placed on this to +// ensure that it ends up at physical address 0x0000.0000. +// +//***************************************************************************** +__root const uVectorEntry __vector_table[] @ ".intvec" = +{ + { .ulPtr = (unsigned long)pulStack + sizeof(pulStack) }, + // The initial stack pointer + ResetISR, // The reset handler + NmiSR, // The NMI handler + FaultISR, // The hard fault handler + IntDefaultHandler, // The MPU fault handler + IntDefaultHandler, // The bus fault handler + IntDefaultHandler, // The usage fault handler + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // SVCall handler + IntDefaultHandler, // Debug monitor handler + 0, // Reserved + IntDefaultHandler, // The PendSV handler + IntDefaultHandler, // The SysTick handler + IntDefaultHandler, // GPIO Port A + IntDefaultHandler, // GPIO Port B + IntDefaultHandler, // GPIO Port C + IntDefaultHandler, // GPIO Port D + IntDefaultHandler, // GPIO Port E + IntDefaultHandler, // UART0 Rx and Tx + IntDefaultHandler, // UART1 Rx and Tx + IntDefaultHandler, // SSI0 Rx and Tx + IntDefaultHandler, // I2C0 Master and Slave + IntDefaultHandler, // PWM Fault + IntDefaultHandler, // PWM Generator 0 + IntDefaultHandler, // PWM Generator 1 + IntDefaultHandler, // PWM Generator 2 + IntDefaultHandler, // Quadrature Encoder 0 + IntDefaultHandler, // ADC Sequence 0 + IntDefaultHandler, // ADC Sequence 1 + IntDefaultHandler, // ADC Sequence 2 + IntDefaultHandler, // ADC Sequence 3 + IntDefaultHandler, // Watchdog timer + IntDefaultHandler, // Timer 0 subtimer A + IntDefaultHandler, // Timer 0 subtimer B + IntDefaultHandler, // Timer 1 subtimer A + IntDefaultHandler, // Timer 1 subtimer B + IntDefaultHandler, // Timer 2 subtimer A + IntDefaultHandler, // Timer 2 subtimer B + IntDefaultHandler, // Analog Comparator 0 + IntDefaultHandler, // Analog Comparator 1 + IntDefaultHandler, // Analog Comparator 2 + IntDefaultHandler, // System Control (PLL, OSC, BO) + IntDefaultHandler, // FLASH Control + IntDefaultHandler, // GPIO Port F + IntDefaultHandler, // GPIO Port G + IntDefaultHandler, // GPIO Port H + IntDefaultHandler, // UART2 Rx and Tx + IntDefaultHandler, // SSI1 Rx and Tx + IntDefaultHandler, // Timer 3 subtimer A + IntDefaultHandler, // Timer 3 subtimer B + IntDefaultHandler, // I2C1 Master and Slave + IntDefaultHandler, // Quadrature Encoder 1 + IntDefaultHandler, // CAN0 + IntDefaultHandler, // CAN1 + IntDefaultHandler, // CAN2 + IntDefaultHandler, // Ethernet + IntDefaultHandler, // Hibernate + IntDefaultHandler, // USB0 + IntDefaultHandler, // PWM Generator 3 + IntDefaultHandler, // uDMA Software Transfer + IntDefaultHandler, // uDMA Error + IntDefaultHandler, // ADC1 Sequence 0 + IntDefaultHandler, // ADC1 Sequence 1 + IntDefaultHandler, // ADC1 Sequence 2 + IntDefaultHandler, // ADC1 Sequence 3 + IntDefaultHandler, // I2S0 + IntDefaultHandler, // External Bus Interface 0 + IntDefaultHandler, // GPIO Port J + IntDefaultHandler, // GPIO Port K + IntDefaultHandler, // GPIO Port L + IntDefaultHandler, // SSI2 Rx and Tx + IntDefaultHandler, // SSI3 Rx and Tx + IntDefaultHandler, // UART3 Rx and Tx + IntDefaultHandler, // UART4 Rx and Tx + IntDefaultHandler, // UART5 Rx and Tx + IntDefaultHandler, // UART6 Rx and Tx + IntDefaultHandler, // UART7 Rx and Tx + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // I2C2 Master and Slave + IntDefaultHandler, // I2C3 Master and Slave + IntDefaultHandler, // Timer 4 subtimer A + IntDefaultHandler, // Timer 4 subtimer B + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // Timer 5 subtimer A + IntDefaultHandler, // Timer 5 subtimer B + IntDefaultHandler, // Wide Timer 0 subtimer A + IntDefaultHandler, // Wide Timer 0 subtimer B + IntDefaultHandler, // Wide Timer 1 subtimer A + IntDefaultHandler, // Wide Timer 1 subtimer B + IntDefaultHandler, // Wide Timer 2 subtimer A + IntDefaultHandler, // Wide Timer 2 subtimer B + IntDefaultHandler, // Wide Timer 3 subtimer A + IntDefaultHandler, // Wide Timer 3 subtimer B + IntDefaultHandler, // Wide Timer 4 subtimer A + IntDefaultHandler, // Wide Timer 4 subtimer B + IntDefaultHandler, // Wide Timer 5 subtimer A + IntDefaultHandler, // Wide Timer 5 subtimer B + IntDefaultHandler, // FPU + IntDefaultHandler, // PECI 0 + IntDefaultHandler, // LPC 0 + IntDefaultHandler, // I2C4 Master and Slave + IntDefaultHandler, // I2C5 Master and Slave + IntDefaultHandler, // GPIO Port M + IntDefaultHandler, // GPIO Port N + IntDefaultHandler, // Quadrature Encoder 2 + IntDefaultHandler, // Fan 0 + 0, // Reserved + IntDefaultHandler, // GPIO Port P (Summary or P0) + IntDefaultHandler, // GPIO Port P1 + IntDefaultHandler, // GPIO Port P2 + IntDefaultHandler, // GPIO Port P3 + IntDefaultHandler, // GPIO Port P4 + IntDefaultHandler, // GPIO Port P5 + IntDefaultHandler, // GPIO Port P6 + IntDefaultHandler, // GPIO Port P7 + IntDefaultHandler, // GPIO Port Q (Summary or Q0) + IntDefaultHandler, // GPIO Port Q1 + IntDefaultHandler, // GPIO Port Q2 + IntDefaultHandler, // GPIO Port Q3 + IntDefaultHandler, // GPIO Port Q4 + IntDefaultHandler, // GPIO Port Q5 + IntDefaultHandler, // GPIO Port Q6 + IntDefaultHandler, // GPIO Port Q7 + IntDefaultHandler, // GPIO Port R + IntDefaultHandler, // GPIO Port S + IntDefaultHandler, // PWM 1 Generator 0 + IntDefaultHandler, // PWM 1 Generator 1 + IntDefaultHandler, // PWM 1 Generator 2 + IntDefaultHandler, // PWM 1 Generator 3 + IntDefaultHandler // PWM 1 Fault +}; + +//***************************************************************************** +// +// This is the code that gets called when the processor first starts execution +// following a reset event. Only the absolutely necessary set is performed, +// after which the application supplied entry() routine is called. Any fancy +// actions (such as making decisions based on the reset cause register, and +// resetting the bits in that register) are left solely in the hands of the +// application. +// +//***************************************************************************** +void +ResetISR(void) +{ + // + // Enable the floating-point unit. This must be done here to handle the + // case where main() uses floating-point and the function prologue saves + // floating-point registers (which will fault if floating-point is not + // enabled). Any configuration of the floating-point unit using DriverLib + // APIs must be done here prior to the floating-point unit being enabled. + // + // Note that this does not use DriverLib since it might not be included in + // this project. + // + HWREG(NVIC_CPAC) = ((HWREG(NVIC_CPAC) & + ~(NVIC_CPAC_CP10_M | NVIC_CPAC_CP11_M)) | + NVIC_CPAC_CP10_FULL | NVIC_CPAC_CP11_FULL); + + // + // Call the application's entry point. + // + __iar_program_start(); +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a NMI. This +// simply enters an infinite loop, preserving the system state for examination +// by a debugger. +// +//***************************************************************************** +static void +NmiSR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a fault +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +FaultISR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives an unexpected +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +IntDefaultHandler(void) +{ + // + // Go into an infinite loop. + // + while(1) + { + } +} diff --git a/boards/ek-lm4f120xl/blinky/startup_gcc.c b/boards/ek-lm4f120xl/blinky/startup_gcc.c new file mode 100644 index 0000000..85b7513 --- /dev/null +++ b/boards/ek-lm4f120xl/blinky/startup_gcc.c @@ -0,0 +1,341 @@ +//***************************************************************************** +// +// startup_gcc.c - Startup code for use with GNU tools. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +#include "inc/hw_nvic.h" +#include "inc/hw_types.h" + +//***************************************************************************** +// +// Forward declaration of the default fault handlers. +// +//***************************************************************************** +void ResetISR(void); +static void NmiSR(void); +static void FaultISR(void); +static void IntDefaultHandler(void); + +//***************************************************************************** +// +// The entry point for the application. +// +//***************************************************************************** +extern int main(void); + +//***************************************************************************** +// +// Reserve space for the system stack. +// +//***************************************************************************** +static unsigned long pulStack[64]; + +//***************************************************************************** +// +// The vector table. Note that the proper constructs must be placed on this to +// ensure that it ends up at physical address 0x0000.0000. +// +//***************************************************************************** +__attribute__ ((section(".isr_vector"))) +void (* const g_pfnVectors[])(void) = +{ + (void (*)(void))((unsigned long)pulStack + sizeof(pulStack)), + // The initial stack pointer + ResetISR, // The reset handler + NmiSR, // The NMI handler + FaultISR, // The hard fault handler + IntDefaultHandler, // The MPU fault handler + IntDefaultHandler, // The bus fault handler + IntDefaultHandler, // The usage fault handler + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // SVCall handler + IntDefaultHandler, // Debug monitor handler + 0, // Reserved + IntDefaultHandler, // The PendSV handler + IntDefaultHandler, // The SysTick handler + IntDefaultHandler, // GPIO Port A + IntDefaultHandler, // GPIO Port B + IntDefaultHandler, // GPIO Port C + IntDefaultHandler, // GPIO Port D + IntDefaultHandler, // GPIO Port E + IntDefaultHandler, // UART0 Rx and Tx + IntDefaultHandler, // UART1 Rx and Tx + IntDefaultHandler, // SSI0 Rx and Tx + IntDefaultHandler, // I2C0 Master and Slave + IntDefaultHandler, // PWM Fault + IntDefaultHandler, // PWM Generator 0 + IntDefaultHandler, // PWM Generator 1 + IntDefaultHandler, // PWM Generator 2 + IntDefaultHandler, // Quadrature Encoder 0 + IntDefaultHandler, // ADC Sequence 0 + IntDefaultHandler, // ADC Sequence 1 + IntDefaultHandler, // ADC Sequence 2 + IntDefaultHandler, // ADC Sequence 3 + IntDefaultHandler, // Watchdog timer + IntDefaultHandler, // Timer 0 subtimer A + IntDefaultHandler, // Timer 0 subtimer B + IntDefaultHandler, // Timer 1 subtimer A + IntDefaultHandler, // Timer 1 subtimer B + IntDefaultHandler, // Timer 2 subtimer A + IntDefaultHandler, // Timer 2 subtimer B + IntDefaultHandler, // Analog Comparator 0 + IntDefaultHandler, // Analog Comparator 1 + IntDefaultHandler, // Analog Comparator 2 + IntDefaultHandler, // System Control (PLL, OSC, BO) + IntDefaultHandler, // FLASH Control + IntDefaultHandler, // GPIO Port F + IntDefaultHandler, // GPIO Port G + IntDefaultHandler, // GPIO Port H + IntDefaultHandler, // UART2 Rx and Tx + IntDefaultHandler, // SSI1 Rx and Tx + IntDefaultHandler, // Timer 3 subtimer A + IntDefaultHandler, // Timer 3 subtimer B + IntDefaultHandler, // I2C1 Master and Slave + IntDefaultHandler, // Quadrature Encoder 1 + IntDefaultHandler, // CAN0 + IntDefaultHandler, // CAN1 + IntDefaultHandler, // CAN2 + IntDefaultHandler, // Ethernet + IntDefaultHandler, // Hibernate + IntDefaultHandler, // USB0 + IntDefaultHandler, // PWM Generator 3 + IntDefaultHandler, // uDMA Software Transfer + IntDefaultHandler, // uDMA Error + IntDefaultHandler, // ADC1 Sequence 0 + IntDefaultHandler, // ADC1 Sequence 1 + IntDefaultHandler, // ADC1 Sequence 2 + IntDefaultHandler, // ADC1 Sequence 3 + IntDefaultHandler, // I2S0 + IntDefaultHandler, // External Bus Interface 0 + IntDefaultHandler, // GPIO Port J + IntDefaultHandler, // GPIO Port K + IntDefaultHandler, // GPIO Port L + IntDefaultHandler, // SSI2 Rx and Tx + IntDefaultHandler, // SSI3 Rx and Tx + IntDefaultHandler, // UART3 Rx and Tx + IntDefaultHandler, // UART4 Rx and Tx + IntDefaultHandler, // UART5 Rx and Tx + IntDefaultHandler, // UART6 Rx and Tx + IntDefaultHandler, // UART7 Rx and Tx + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // I2C2 Master and Slave + IntDefaultHandler, // I2C3 Master and Slave + IntDefaultHandler, // Timer 4 subtimer A + IntDefaultHandler, // Timer 4 subtimer B + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // Timer 5 subtimer A + IntDefaultHandler, // Timer 5 subtimer B + IntDefaultHandler, // Wide Timer 0 subtimer A + IntDefaultHandler, // Wide Timer 0 subtimer B + IntDefaultHandler, // Wide Timer 1 subtimer A + IntDefaultHandler, // Wide Timer 1 subtimer B + IntDefaultHandler, // Wide Timer 2 subtimer A + IntDefaultHandler, // Wide Timer 2 subtimer B + IntDefaultHandler, // Wide Timer 3 subtimer A + IntDefaultHandler, // Wide Timer 3 subtimer B + IntDefaultHandler, // Wide Timer 4 subtimer A + IntDefaultHandler, // Wide Timer 4 subtimer B + IntDefaultHandler, // Wide Timer 5 subtimer A + IntDefaultHandler, // Wide Timer 5 subtimer B + IntDefaultHandler, // FPU + IntDefaultHandler, // PECI 0 + IntDefaultHandler, // LPC 0 + IntDefaultHandler, // I2C4 Master and Slave + IntDefaultHandler, // I2C5 Master and Slave + IntDefaultHandler, // GPIO Port M + IntDefaultHandler, // GPIO Port N + IntDefaultHandler, // Quadrature Encoder 2 + IntDefaultHandler, // Fan 0 + 0, // Reserved + IntDefaultHandler, // GPIO Port P (Summary or P0) + IntDefaultHandler, // GPIO Port P1 + IntDefaultHandler, // GPIO Port P2 + IntDefaultHandler, // GPIO Port P3 + IntDefaultHandler, // GPIO Port P4 + IntDefaultHandler, // GPIO Port P5 + IntDefaultHandler, // GPIO Port P6 + IntDefaultHandler, // GPIO Port P7 + IntDefaultHandler, // GPIO Port Q (Summary or Q0) + IntDefaultHandler, // GPIO Port Q1 + IntDefaultHandler, // GPIO Port Q2 + IntDefaultHandler, // GPIO Port Q3 + IntDefaultHandler, // GPIO Port Q4 + IntDefaultHandler, // GPIO Port Q5 + IntDefaultHandler, // GPIO Port Q6 + IntDefaultHandler, // GPIO Port Q7 + IntDefaultHandler, // GPIO Port R + IntDefaultHandler, // GPIO Port S + IntDefaultHandler, // PWM 1 Generator 0 + IntDefaultHandler, // PWM 1 Generator 1 + IntDefaultHandler, // PWM 1 Generator 2 + IntDefaultHandler, // PWM 1 Generator 3 + IntDefaultHandler // PWM 1 Fault +}; + +//***************************************************************************** +// +// The following are constructs created by the linker, indicating where the +// the "data" and "bss" segments reside in memory. The initializers for the +// for the "data" segment resides immediately following the "text" segment. +// +//***************************************************************************** +extern unsigned long _etext; +extern unsigned long _data; +extern unsigned long _edata; +extern unsigned long _bss; +extern unsigned long _ebss; + +//***************************************************************************** +// +// This is the code that gets called when the processor first starts execution +// following a reset event. Only the absolutely necessary set is performed, +// after which the application supplied entry() routine is called. Any fancy +// actions (such as making decisions based on the reset cause register, and +// resetting the bits in that register) are left solely in the hands of the +// application. +// +//***************************************************************************** +void +ResetISR(void) +{ + unsigned long *pulSrc, *pulDest; + + // + // Copy the data segment initializers from flash to SRAM. + // + pulSrc = &_etext; + for(pulDest = &_data; pulDest < &_edata; ) + { + *pulDest++ = *pulSrc++; + } + + // + // Zero fill the bss segment. + // + __asm(" ldr r0, =_bss\n" + " ldr r1, =_ebss\n" + " mov r2, #0\n" + " .thumb_func\n" + "zero_loop:\n" + " cmp r0, r1\n" + " it lt\n" + " strlt r2, [r0], #4\n" + " blt zero_loop"); + + // + // Enable the floating-point unit. This must be done here to handle the + // case where main() uses floating-point and the function prologue saves + // floating-point registers (which will fault if floating-point is not + // enabled). Any configuration of the floating-point unit using DriverLib + // APIs must be done here prior to the floating-point unit being enabled. + // + // Note that this does not use DriverLib since it might not be included in + // this project. + // + HWREG(NVIC_CPAC) = ((HWREG(NVIC_CPAC) & + ~(NVIC_CPAC_CP10_M | NVIC_CPAC_CP11_M)) | + NVIC_CPAC_CP10_FULL | NVIC_CPAC_CP11_FULL); + + // + // Call the application's entry point. + // + main(); +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a NMI. This +// simply enters an infinite loop, preserving the system state for examination +// by a debugger. +// +//***************************************************************************** +static void +NmiSR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a fault +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +FaultISR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives an unexpected +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +IntDefaultHandler(void) +{ + // + // Go into an infinite loop. + // + while(1) + { + } +} diff --git a/boards/ek-lm4f120xl/blinky/startup_rvmdk.S b/boards/ek-lm4f120xl/blinky/startup_rvmdk.S new file mode 100644 index 0000000..53d4dc9 --- /dev/null +++ b/boards/ek-lm4f120xl/blinky/startup_rvmdk.S @@ -0,0 +1,351 @@ +; <<< Use Configuration Wizard in Context Menu >>> +;****************************************************************************** +; +; startup_rvmdk.S - Startup code for use with Keil's uVision. +; +; Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +; Software License Agreement +; +; Texas Instruments (TI) is supplying this software for use solely and +; exclusively on TI's microcontroller products. The software is owned by +; TI and/or its suppliers, and is protected under applicable copyright +; laws. You may not combine this software with "viral" open-source +; software in order to form a larger program. +; +; THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +; NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +; NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +; A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +; CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +; DAMAGES, FOR ANY REASON WHATSOEVER. +; +; This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +; +;****************************************************************************** + +;****************************************************************************** +; +; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +; +;****************************************************************************** +Stack EQU 0x00000100 + +;****************************************************************************** +; +; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> +; +;****************************************************************************** +Heap EQU 0x00000000 + +;****************************************************************************** +; +; Allocate space for the stack. +; +;****************************************************************************** + AREA STACK, NOINIT, READWRITE, ALIGN=3 +StackMem + SPACE Stack +__initial_sp + +;****************************************************************************** +; +; Allocate space for the heap. +; +;****************************************************************************** + AREA HEAP, NOINIT, READWRITE, ALIGN=3 +__heap_base +HeapMem + SPACE Heap +__heap_limit + +;****************************************************************************** +; +; Indicate that the code in this file preserves 8-byte alignment of the stack. +; +;****************************************************************************** + PRESERVE8 + +;****************************************************************************** +; +; Place code into the reset code section. +; +;****************************************************************************** + AREA RESET, CODE, READONLY + THUMB + +;****************************************************************************** +; +; The vector table. +; +;****************************************************************************** + EXPORT __Vectors +__Vectors + DCD StackMem + Stack ; Top of Stack + DCD Reset_Handler ; Reset Handler + DCD NmiSR ; NMI Handler + DCD FaultISR ; Hard Fault Handler + DCD IntDefaultHandler ; The MPU fault handler + DCD IntDefaultHandler ; The bus fault handler + DCD IntDefaultHandler ; The usage fault handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD IntDefaultHandler ; SVCall handler + DCD IntDefaultHandler ; Debug monitor handler + DCD 0 ; Reserved + DCD IntDefaultHandler ; The PendSV handler + DCD IntDefaultHandler ; The SysTick handler + DCD IntDefaultHandler ; GPIO Port A + DCD IntDefaultHandler ; GPIO Port B + DCD IntDefaultHandler ; GPIO Port C + DCD IntDefaultHandler ; GPIO Port D + DCD IntDefaultHandler ; GPIO Port E + DCD IntDefaultHandler ; UART0 Rx and Tx + DCD IntDefaultHandler ; UART1 Rx and Tx + DCD IntDefaultHandler ; SSI0 Rx and Tx + DCD IntDefaultHandler ; I2C0 Master and Slave + DCD IntDefaultHandler ; PWM Fault + DCD IntDefaultHandler ; PWM Generator 0 + DCD IntDefaultHandler ; PWM Generator 1 + DCD IntDefaultHandler ; PWM Generator 2 + DCD IntDefaultHandler ; Quadrature Encoder 0 + DCD IntDefaultHandler ; ADC Sequence 0 + DCD IntDefaultHandler ; ADC Sequence 1 + DCD IntDefaultHandler ; ADC Sequence 2 + DCD IntDefaultHandler ; ADC Sequence 3 + DCD IntDefaultHandler ; Watchdog timer + DCD IntDefaultHandler ; Timer 0 subtimer A + DCD IntDefaultHandler ; Timer 0 subtimer B + DCD IntDefaultHandler ; Timer 1 subtimer A + DCD IntDefaultHandler ; Timer 1 subtimer B + DCD IntDefaultHandler ; Timer 2 subtimer A + DCD IntDefaultHandler ; Timer 2 subtimer B + DCD IntDefaultHandler ; Analog Comparator 0 + DCD IntDefaultHandler ; Analog Comparator 1 + DCD IntDefaultHandler ; Analog Comparator 2 + DCD IntDefaultHandler ; System Control (PLL, OSC, BO) + DCD IntDefaultHandler ; FLASH Control + DCD IntDefaultHandler ; GPIO Port F + DCD IntDefaultHandler ; GPIO Port G + DCD IntDefaultHandler ; GPIO Port H + DCD IntDefaultHandler ; UART2 Rx and Tx + DCD IntDefaultHandler ; SSI1 Rx and Tx + DCD IntDefaultHandler ; Timer 3 subtimer A + DCD IntDefaultHandler ; Timer 3 subtimer B + DCD IntDefaultHandler ; I2C1 Master and Slave + DCD IntDefaultHandler ; Quadrature Encoder 1 + DCD IntDefaultHandler ; CAN0 + DCD IntDefaultHandler ; CAN1 + DCD IntDefaultHandler ; CAN2 + DCD IntDefaultHandler ; Ethernet + DCD IntDefaultHandler ; Hibernate + DCD IntDefaultHandler ; USB0 + DCD IntDefaultHandler ; PWM Generator 3 + DCD IntDefaultHandler ; uDMA Software Transfer + DCD IntDefaultHandler ; uDMA Error + DCD IntDefaultHandler ; ADC1 Sequence 0 + DCD IntDefaultHandler ; ADC1 Sequence 1 + DCD IntDefaultHandler ; ADC1 Sequence 2 + DCD IntDefaultHandler ; ADC1 Sequence 3 + DCD IntDefaultHandler ; I2S0 + DCD IntDefaultHandler ; External Bus Interface 0 + DCD IntDefaultHandler ; GPIO Port J + DCD IntDefaultHandler ; GPIO Port K + DCD IntDefaultHandler ; GPIO Port L + DCD IntDefaultHandler ; SSI2 Rx and Tx + DCD IntDefaultHandler ; SSI3 Rx and Tx + DCD IntDefaultHandler ; UART3 Rx and Tx + DCD IntDefaultHandler ; UART4 Rx and Tx + DCD IntDefaultHandler ; UART5 Rx and Tx + DCD IntDefaultHandler ; UART6 Rx and Tx + DCD IntDefaultHandler ; UART7 Rx and Tx + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD IntDefaultHandler ; I2C2 Master and Slave + DCD IntDefaultHandler ; I2C3 Master and Slave + DCD IntDefaultHandler ; Timer 4 subtimer A + DCD IntDefaultHandler ; Timer 4 subtimer B + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD IntDefaultHandler ; Timer 5 subtimer A + DCD IntDefaultHandler ; Timer 5 subtimer B + DCD IntDefaultHandler ; Wide Timer 0 subtimer A + DCD IntDefaultHandler ; Wide Timer 0 subtimer B + DCD IntDefaultHandler ; Wide Timer 1 subtimer A + DCD IntDefaultHandler ; Wide Timer 1 subtimer B + DCD IntDefaultHandler ; Wide Timer 2 subtimer A + DCD IntDefaultHandler ; Wide Timer 2 subtimer B + DCD IntDefaultHandler ; Wide Timer 3 subtimer A + DCD IntDefaultHandler ; Wide Timer 3 subtimer B + DCD IntDefaultHandler ; Wide Timer 4 subtimer A + DCD IntDefaultHandler ; Wide Timer 4 subtimer B + DCD IntDefaultHandler ; Wide Timer 5 subtimer A + DCD IntDefaultHandler ; Wide Timer 5 subtimer B + DCD IntDefaultHandler ; FPU + DCD IntDefaultHandler ; PECI 0 + DCD IntDefaultHandler ; LPC 0 + DCD IntDefaultHandler ; I2C4 Master and Slave + DCD IntDefaultHandler ; I2C5 Master and Slave + DCD IntDefaultHandler ; GPIO Port M + DCD IntDefaultHandler ; GPIO Port N + DCD IntDefaultHandler ; Quadrature Encoder 2 + DCD IntDefaultHandler ; Fan 0 + DCD 0 ; Reserved + DCD IntDefaultHandler ; GPIO Port P (Summary or P0) + DCD IntDefaultHandler ; GPIO Port P1 + DCD IntDefaultHandler ; GPIO Port P2 + DCD IntDefaultHandler ; GPIO Port P3 + DCD IntDefaultHandler ; GPIO Port P4 + DCD IntDefaultHandler ; GPIO Port P5 + DCD IntDefaultHandler ; GPIO Port P6 + DCD IntDefaultHandler ; GPIO Port P7 + DCD IntDefaultHandler ; GPIO Port Q (Summary or Q0) + DCD IntDefaultHandler ; GPIO Port Q1 + DCD IntDefaultHandler ; GPIO Port Q2 + DCD IntDefaultHandler ; GPIO Port Q3 + DCD IntDefaultHandler ; GPIO Port Q4 + DCD IntDefaultHandler ; GPIO Port Q5 + DCD IntDefaultHandler ; GPIO Port Q6 + DCD IntDefaultHandler ; GPIO Port Q7 + DCD IntDefaultHandler ; GPIO Port R + DCD IntDefaultHandler ; GPIO Port S + DCD IntDefaultHandler ; PWM 1 Generator 0 + DCD IntDefaultHandler ; PWM 1 Generator 1 + DCD IntDefaultHandler ; PWM 1 Generator 2 + DCD IntDefaultHandler ; PWM 1 Generator 3 + DCD IntDefaultHandler ; PWM 1 Fault + +;****************************************************************************** +; +; This is the code that gets called when the processor first starts execution +; following a reset event. +; +;****************************************************************************** + EXPORT Reset_Handler +Reset_Handler + ; + ; Enable the floating-point unit. This must be done here to handle the + ; case where main() uses floating-point and the function prologue saves + ; floating-point registers (which will fault if floating-point is not + ; enabled). Any configuration of the floating-point unit using + ; DriverLib APIs must be done here prior to the floating-point unit + ; being enabled. + ; + ; Note that this does not use DriverLib since it might not be included + ; in this project. + ; + MOVW R0, #0xED88 + MOVT R0, #0xE000 + LDR R1, [R0] + ORR R1, #0x00F00000 + STR R1, [R0] + + ; + ; Call the C library enty point that handles startup. This will copy + ; the .data section initializers from flash to SRAM and zero fill the + ; .bss section. + ; + IMPORT __main + B __main + +;****************************************************************************** +; +; This is the code that gets called when the processor receives a NMI. This +; simply enters an infinite loop, preserving the system state for examination +; by a debugger. +; +;****************************************************************************** +NmiSR + B NmiSR + +;****************************************************************************** +; +; This is the code that gets called when the processor receives a fault +; interrupt. This simply enters an infinite loop, preserving the system state +; for examination by a debugger. +; +;****************************************************************************** +FaultISR + B FaultISR + +;****************************************************************************** +; +; This is the code that gets called when the processor receives an unexpected +; interrupt. This simply enters an infinite loop, preserving the system state +; for examination by a debugger. +; +;****************************************************************************** +IntDefaultHandler + B IntDefaultHandler + +;****************************************************************************** +; +; Make sure the end of this section is aligned. +; +;****************************************************************************** + ALIGN + +;****************************************************************************** +; +; Some code in the normal code section for initializing the heap and stack. +; +;****************************************************************************** + AREA |.text|, CODE, READONLY + +;****************************************************************************** +; +; The function expected of the C library startup code for defining the stack +; and heap memory locations. For the C library version of the startup code, +; provide this function so that the C library initialization code can find out +; the location of the stack and heap. +; +;****************************************************************************** + IF :DEF: __MICROLIB + EXPORT __initial_sp + EXPORT __heap_base + EXPORT __heap_limit + ELSE + IMPORT __use_two_region_memory + EXPORT __user_initial_stackheap +__user_initial_stackheap + LDR R0, =HeapMem + LDR R1, =(StackMem + Stack) + LDR R2, =(HeapMem + Heap) + LDR R3, =StackMem + BX LR + ENDIF + +;****************************************************************************** +; +; Make sure the end of this section is aligned. +; +;****************************************************************************** + ALIGN + +;****************************************************************************** +; +; Tell the assembler that we're done. +; +;****************************************************************************** + END diff --git a/boards/ek-lm4f120xl/blinky/startup_sourcerygxx.S b/boards/ek-lm4f120xl/blinky/startup_sourcerygxx.S new file mode 100644 index 0000000..b720839 --- /dev/null +++ b/boards/ek-lm4f120xl/blinky/startup_sourcerygxx.S @@ -0,0 +1,75 @@ +//***************************************************************************** +// +// startup_sourcerygxx.S - Startup code for Sourcery CodeBench. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + + .syntax unified + .thumb + +//***************************************************************************** +// +// Place this code into the .cs3.reset section so that it can be executed prior +// to the startup code in Sourcery CodeBench. +// +//***************************************************************************** + .section .cs3.reset,"x" + +//***************************************************************************** +// +// The reset handler, which overrides the one provided by CS3. +// +//***************************************************************************** + .globl __cs3_reset + .thumb_func +__cs3_reset: + // + // Enable the floating-point unit. This must be done here to handle the + // case where main() uses floating-point and the function prologue saves + // floating-point registers (which will fault if floating-point is not + // enabled). Any configuration of the floating-point unit using DriverLib + // APIs must be done here prior to the floating-point unit being enabled. + // + // Note that this does not use DriverLib since it might not be included in + // this project. + // + movw r0, #0xed88 + movt r0, #0xe000 + ldr r1, [r0] + orr r1, #0x00f00000 + str r1, [r0] + + // + // Branch to the normal CS3 startup code. + // + .extern __cs3_reset_ekc_lm4f232 + ldr r0, =__cs3_reset_ekc_lm4f232 + bx r0 + + // + // Place the literal pool here. + // + .ltorg + + // + // The end of the file. + // + .end diff --git a/boards/ek-lm4f120xl/drivers/buttons.c b/boards/ek-lm4f120xl/drivers/buttons.c new file mode 100644 index 0000000..4415168 --- /dev/null +++ b/boards/ek-lm4f120xl/drivers/buttons.c @@ -0,0 +1,193 @@ +//***************************************************************************** +// +// buttons.c - Evaluation board driver for push buttons. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +#include "inc/hw_types.h" +#include "inc/hw_memmap.h" +#include "inc/hw_gpio.h" +#include "driverlib/sysctl.h" +#include "driverlib/rom.h" +#include "driverlib/pin_map.h" +#include "driverlib/gpio.h" +#include "drivers/buttons.h" + +//***************************************************************************** +// +//! \addtogroup buttons_api +//! @{ +// +//***************************************************************************** + +//***************************************************************************** +// +// Holds the current, debounced state of each button. A 0 in a bit indicates +// that that button is currently pressed, otherwise it is released. +// We assume that we start with all the buttons released (though if one is +// pressed when the application starts, this will be detected). +// +//***************************************************************************** +static unsigned char g_ucButtonStates = ALL_BUTTONS; + +//***************************************************************************** +// +//! Polls the current state of the buttons and determines which have changed. +//! +//! \param pucDelta points to a character that will be written to indicate +//! which button states changed since the last time this function was called. +//! This value is derived from the debounced state of the buttons. +//! \param pucRawState points to a location where the raw button state will +//! be stored. +//! +//! This function should be called periodically by the application to poll the +//! pushbuttons. It determines both the current debounced state of the buttons +//! and also which buttons have changed state since the last time the function +//! was called. +//! +//! In order for button debouncing to work properly, this function should be +//! caled at a regular interval, even if the state of the buttons is not needed +//! that often. +//! +//! If button debouncing is not required, the the caller can pass a pointer +//! for the \e pucRawState parameter in order to get the raw state of the +//! buttons. The value returned in \e pucRawState will be a bit mask where +//! a 1 indicates the buttons is pressed. +//! +//! \return Returns the current debounced state of the buttons where a 1 in the +//! button ID's position indicates that the button is pressed and a 0 +//! indicates that it is released. +// +//***************************************************************************** +unsigned char +ButtonsPoll(unsigned char *pucDelta, unsigned char *pucRawState) +{ + unsigned long ulDelta; + unsigned long ulData; + static unsigned char ucSwitchClockA = 0; + static unsigned char ucSwitchClockB = 0; + + // + // Read the raw state of the push buttons. Save the raw state + // (inverting the bit sense) if the caller supplied storage for the + // raw value. + // + ulData = (ROM_GPIOPinRead(BUTTONS_GPIO_BASE, ALL_BUTTONS)); + if(pucRawState) + { + *pucRawState = (unsigned char)~ulData; + } + + // + // Determine the switches that are at a different state than the debounced + // state. + // + ulDelta = ulData ^ g_ucButtonStates; + + // + // Increment the clocks by one. + // + ucSwitchClockA ^= ucSwitchClockB; + ucSwitchClockB = ~ucSwitchClockB; + + // + // Reset the clocks corresponding to switches that have not changed state. + // + ucSwitchClockA &= ulDelta; + ucSwitchClockB &= ulDelta; + + // + // Get the new debounced switch state. + // + g_ucButtonStates &= ucSwitchClockA | ucSwitchClockB; + g_ucButtonStates |= (~(ucSwitchClockA | ucSwitchClockB)) & ulData; + + // + // Determine the switches that just changed debounced state. + // + ulDelta ^= (ucSwitchClockA | ucSwitchClockB); + + // + // Store the bit mask for the buttons that have changed for return to + // caller. + // + if(pucDelta) + { + *pucDelta = (unsigned char)ulDelta; + } + + // + // Return the debounced buttons states to the caller. Invert the bit + // sense so that a '1' indicates the button is pressed, which is a + // sensible way to interpret the return value. + // + return(~g_ucButtonStates); +} + +//***************************************************************************** +// +//! Initializes the GPIO pins used by the board pushbuttons. +//! +//! This function must be called during application initialization to +//! configure the GPIO pins to which the pushbuttons are attached. It enables +//! the port used by the buttons and configures each button GPIO as an input +//! with a weak pull-up. +//! +//! \return None. +// +//***************************************************************************** +void +ButtonsInit(void) +{ + // + // Enable the GPIO port to which the pushbuttons are connected. + // + ROM_SysCtlPeripheralEnable(BUTTONS_GPIO_PERIPH); + + // + // Unlock PF0 so we can change it to a GPIO input + // Once we have enabled (unlocked) the commit register then re-lock it + // to prevent further changes. PF0 is muxed with NMI thus a special case. + // + HWREG(BUTTONS_GPIO_BASE + GPIO_O_LOCK) = GPIO_LOCK_KEY_DD; + HWREG(BUTTONS_GPIO_BASE + GPIO_O_CR) |= 0x01; + HWREG(BUTTONS_GPIO_BASE + GPIO_O_LOCK) = 0; + + // + // Set each of the button GPIO pins as an input with a pull-up. + // + ROM_GPIODirModeSet(BUTTONS_GPIO_BASE, ALL_BUTTONS, GPIO_DIR_MODE_IN); + ROM_GPIOPadConfigSet(BUTTONS_GPIO_BASE, ALL_BUTTONS, + GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_STD_WPU); + + // + // Initialize the debounced button state with the current state read from + // the GPIO bank. + // + g_ucButtonStates = ROM_GPIOPinRead(BUTTONS_GPIO_BASE, ALL_BUTTONS); +} + +//***************************************************************************** +// +// Close the Doxygen group. +//! @} +// +//***************************************************************************** diff --git a/boards/ek-lm4f120xl/drivers/buttons.h b/boards/ek-lm4f120xl/drivers/buttons.h new file mode 100644 index 0000000..416125a --- /dev/null +++ b/boards/ek-lm4f120xl/drivers/buttons.h @@ -0,0 +1,96 @@ +//***************************************************************************** +// +// buttons.h - Prototypes for the evaluation board buttons driver. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +#ifndef __BUTTONS_H__ +#define __BUTTONS_H__ + +//***************************************************************************** +// +// Defines for the hardware resources used by the pushbuttons. +// +// The switches are on the following ports/pins: +// +// PF4 - Left Button +// PF0 - Right Button +// +// The switches tie the GPIO to ground, so the GPIOs need to be configured +// with pull-ups, and a value of 0 means the switch is pressed. +// +//***************************************************************************** +#define BUTTONS_GPIO_PERIPH SYSCTL_PERIPH_GPIOF +#define BUTTONS_GPIO_BASE GPIO_PORTF_BASE + +#define NUM_BUTTONS 2 +#define LEFT_BUTTON GPIO_PIN_4 +#define RIGHT_BUTTON GPIO_PIN_0 + +#define ALL_BUTTONS (LEFT_BUTTON | RIGHT_BUTTON) + +//***************************************************************************** +// +// Useful macros for detecting button events. +// +//***************************************************************************** +#define BUTTON_PRESSED(button, buttons, changed) \ + (((button) & (changed)) && ((button) & (buttons))) + +#define BUTTON_RELEASED(button, buttons, changed) \ + (((button) & (changed)) && !((button) & (buttons))) + +//***************************************************************************** +// +// If building with a C++ compiler, make all of the definitions in this header +// have a C binding. +// +//***************************************************************************** +#ifdef __cplusplus +extern "C" +{ +#endif + +//***************************************************************************** +// +// Functions exported from buttons.c +// +//***************************************************************************** +extern void ButtonsInit(void); +extern unsigned char ButtonsPoll(unsigned char *pucDelta, + unsigned char *pucRaw); + +//***************************************************************************** +// +// Mark the end of the C bindings section for C++ compilers. +// +//***************************************************************************** +#ifdef __cplusplus +} +#endif + +//***************************************************************************** +// +// Prototypes for the globals exported by this driver. +// +//***************************************************************************** + +#endif // __BUTTONS_H__ diff --git a/boards/ek-lm4f120xl/drivers/rgb.c b/boards/ek-lm4f120xl/drivers/rgb.c new file mode 100644 index 0000000..f3107f2 --- /dev/null +++ b/boards/ek-lm4f120xl/drivers/rgb.c @@ -0,0 +1,298 @@ +//***************************************************************************** +// +// rgb.c - Evaluation board driver for RGB LED. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +#include "inc/hw_types.h" +#include "inc/hw_memmap.h" +#include "inc/hw_timer.h" +#include "driverlib/sysctl.h" +#include "driverlib/rom.h" +#include "driverlib/pin_map.h" +#include "driverlib/timer.h" +#include "driverlib/gpio.h" +#include "rgb.h" + +//***************************************************************************** +// +//! \addtogroup rgb_api +//! @{ +// +//***************************************************************************** + +//***************************************************************************** +// +// This is a custom driver that allows the easy manipulation of the RGB LED. +// +// The driver uses the general purpose timers to govern the brightness of the +// LED through simple PWM output mode of the GP Timers. +// +// A global array contains the current relative color of each of the three +// LEDs. A global float variable controls intensity of the overall mixed color. +// +//***************************************************************************** +static unsigned long g_ulColors[3]; +static float g_fIntensity = 0.3f; + +//***************************************************************************** +// +//! Initializes the Timer and GPIO functionality associated with the RGB LED +//! +//! \param ulEnable enables RGB immediately if set. +//! +//! This function must be called during application initialization to +//! configure the GPIO pins to which the LEDs are attached. It enables +//! the port used by the LEDs and configures each color's Timer. It optionally +//! enables the RGB LED by configuring the GPIO pins and starting the timers. +//! +//! \return None. +// +//***************************************************************************** +void +RGBInit(unsigned long ulEnable) +{ + // + // Enable the GPIO Port and Timer for each LED + // + SysCtlPeripheralEnable(RED_GPIO_PERIPH); + SysCtlPeripheralEnable(RED_TIMER_PERIPH); + + SysCtlPeripheralEnable(GREEN_GPIO_PERIPH); + SysCtlPeripheralEnable(GREEN_TIMER_PERIPH); + + SysCtlPeripheralEnable(BLUE_GPIO_PERIPH); + SysCtlPeripheralEnable(BLUE_TIMER_PERIPH); + + // + // Configure each timer for output mode + // + HWREG(GREEN_TIMER_BASE + TIMER_O_CFG) = 0x04; + HWREG(GREEN_TIMER_BASE + TIMER_O_TAMR) = 0x0A; + HWREG(GREEN_TIMER_BASE + TIMER_O_TAILR) = 0xFFFF; + + HWREG(BLUE_TIMER_BASE + TIMER_O_CFG) = 0x04; + HWREG(BLUE_TIMER_BASE + TIMER_O_TBMR) = 0x0A; + HWREG(BLUE_TIMER_BASE + TIMER_O_TBILR) = 0xFFFF; + + HWREG(RED_TIMER_BASE + TIMER_O_CFG) = 0x04; + HWREG(RED_TIMER_BASE + TIMER_O_TBMR) = 0x0A; + HWREG(RED_TIMER_BASE + TIMER_O_TBILR) = 0xFFFF; + + // + // Invert the output signals. + // + HWREG(RED_TIMER_BASE + TIMER_O_CTL) |= 0x4000; + HWREG(GREEN_TIMER_BASE + TIMER_O_CTL) |= 0x40; + HWREG(BLUE_TIMER_BASE + TIMER_O_CTL) |= 0x4000; + + if(ulEnable) + { + RGBEnable(); + } +} + +//***************************************************************************** +// +//! Enable the RGB LED with already configured timer settings +//! +//! This function or RGBDisable should be called during application +//! initialization to configure the GPIO pins to which the LEDs are attached. +//! This function enables the timers and configures the GPIO pins as timer +//! outputs. +//! +//! \return None. +// +//***************************************************************************** +void +RGBEnable(void) +{ + // + // Enable timers to begin counting + // + TimerEnable(RED_TIMER_BASE, TIMER_BOTH); + TimerEnable(GREEN_TIMER_BASE, TIMER_BOTH); + TimerEnable(BLUE_TIMER_BASE, TIMER_BOTH); + + // + // Reconfigure each LED's GPIO pad for timer control + // + GPIOPinConfigure(GREEN_GPIO_PIN_CFG); + GPIOPinTypeTimer(GREEN_GPIO_BASE, GREEN_GPIO_PIN); + GPIOPadConfigSet(GREEN_GPIO_BASE, GREEN_GPIO_PIN, GPIO_STRENGTH_8MA_SC, + GPIO_PIN_TYPE_STD); + + GPIOPinConfigure(BLUE_GPIO_PIN_CFG); + GPIOPinTypeTimer(BLUE_GPIO_BASE, BLUE_GPIO_PIN); + GPIOPadConfigSet(BLUE_GPIO_BASE, BLUE_GPIO_PIN, GPIO_STRENGTH_8MA_SC, + GPIO_PIN_TYPE_STD); + + GPIOPinConfigure(RED_GPIO_PIN_CFG); + GPIOPinTypeTimer(RED_GPIO_BASE, RED_GPIO_PIN); + GPIOPadConfigSet(RED_GPIO_BASE, RED_GPIO_PIN, GPIO_STRENGTH_8MA_SC, + GPIO_PIN_TYPE_STD); +} + +//***************************************************************************** +// +//! Disable the RGB LED by configuring the GPIO's as inputs. +//! +//! This function or RGBEnable should be called during application +//! initialization to configure the GPIO pins to which the LEDs are attached. +//! This function disables the timers and configures the GPIO pins as inputs +//! for minimum current draw. +//! +//! \return None. +// +//***************************************************************************** +void +RGBDisable(void) +{ + // + // Configure the GPIO pads as general purpose inputs. + // + GPIOPinTypeGPIOInput(RED_GPIO_BASE, RED_GPIO_PIN); + GPIOPinTypeGPIOInput(GREEN_GPIO_BASE, GREEN_GPIO_PIN); + GPIOPinTypeGPIOInput(BLUE_GPIO_BASE, BLUE_GPIO_PIN); + + // + // Stop the timer counting. + // + TimerDisable(RED_TIMER_BASE, TIMER_BOTH); + TimerDisable(GREEN_TIMER_BASE, TIMER_BOTH); + TimerDisable(BLUE_TIMER_BASE, TIMER_BOTH); +} + +//***************************************************************************** +// +//! Set the output color and intensity. +//! +//! \param pulRGBColor points to a three element array representing the +//! relative intensity of each color. Red is element 0, Green is element 1, +//! Blue is element 2. 0x0000 is off. 0xFFFF is fully on. +//! +//! \param fIntensity is used to scale the intensity of all three colors by +//! the same amount. fIntensity should be between 0.0 and 1.0. This scale +//! factor is applied to all three colors. +//! +//! This function should be called by the application to set the color and +//! intensity of the RGB LED. +//! +//! \return None. +// +//***************************************************************************** +void +RGBSet(volatile unsigned long * pulRGBColor, float fIntensity) +{ + RGBColorSet(pulRGBColor); + RGBIntensitySet(fIntensity); +} + +//***************************************************************************** +// +//! Set the output color. +//! +//! \param pulRGBColor points to a three element array representing the +//! relative intensity of each color. Red is element 0, Green is element 1, +//! Blue is element 2. 0x0000 is off. 0xFFFF is fully on. +//! +//! This function should be called by the application to set the color +//! of the RGB LED. +//! +//! \return None. +// +//***************************************************************************** +void +RGBColorSet(volatile unsigned long * pulRGBColor) +{ + unsigned long ulColor[3]; + unsigned long ulIndex; + + for(ulIndex=0; ulIndex < 3; ulIndex++) + { + g_ulColors[ulIndex] = pulRGBColor[ulIndex]; + ulColor[ulIndex] = (unsigned long) (((float) pulRGBColor[ulIndex]) * + g_fIntensity + 0.5f); + + if(ulColor[ulIndex] > 0xFFFF) + { + ulColor[ulIndex] = 0xFFFF; + } + } + + TimerMatchSet(RED_TIMER_BASE, RED_TIMER, ulColor[RED]); + TimerMatchSet(GREEN_TIMER_BASE, GREEN_TIMER, ulColor[GREEN]); + TimerMatchSet(BLUE_TIMER_BASE, BLUE_TIMER, ulColor[BLUE]); +} + +//***************************************************************************** +// +//! Set the current output intensity. +//! +//! \param fIntensity is used to scale the intensity of all three colors by +//! the same amount. fIntensity should be between 0.0 and 1.0. This scale +//! factor is applied individually to all three colors. +//! +//! This function should be called by the application to set the intensity +//! of the RGB LED. +//! +//! \return None. +// +//***************************************************************************** +void +RGBIntensitySet(float fIntensity) +{ + g_fIntensity = fIntensity; + RGBColorSet(g_ulColors); +} + +//***************************************************************************** +// +//! Get the output color. +//! +//! \param pulRGBColor points to a three element array representing the +//! relative intensity of each color. Red is element 0, Green is element 1, +//! Blue is element 2. 0x0000 is off. 0xFFFF is fully on. Caller must allocate +//! and pass a pointer to a three element array of unsigned longs. +//! +//! This function should be called by the application to get the current color +//! of the RGB LED. +//! +//! \return None. +// +//***************************************************************************** +void +RGBColorGet(unsigned long * pulRGBColor) +{ + unsigned long ulIndex; + + for(ulIndex=0; ulIndex < 3; ulIndex++) + { + pulRGBColor[ulIndex] = g_ulColors[ulIndex]; + } +} + +//***************************************************************************** +// +// Close the Doxygen group. +//! @} +// +//***************************************************************************** diff --git a/boards/ek-lm4f120xl/drivers/rgb.h b/boards/ek-lm4f120xl/drivers/rgb.h new file mode 100644 index 0000000..27d2276 --- /dev/null +++ b/boards/ek-lm4f120xl/drivers/rgb.h @@ -0,0 +1,143 @@ +//***************************************************************************** +// +// rgb.h - Prototypes for the evaluation board RGB LED driver. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +#ifndef __RGBLED_H__ +#define __RGBLED_H__ + +//***************************************************************************** +// +// Defines for the hardware resources used by the pushbuttons. +// +// The switches are on the following ports/pins: +// +// PF1 - RED (632 nanometer) +// PF2 - GREEN (518 nanometer) +// PF3 - BLUE (465 nanometer) + +// +// The RGB LED is tied up to 5V but since the lowest Vf is 1.75 we can still +// use a General Purpose Timer in pulse out mode. +// +//***************************************************************************** + +// +// Indexes into the array of colors +// +#define RED 0 +#define BLUE 2 +#define GREEN 1 + + +// +// Ratio for percent of full on that should be "true" white. +// +#define RED_WHITE_BALANCE 0.497f +#define GREEN_WHITE_BALANCE 0.6f +#define BLUE_WHITE_BALANCE 1.0f + +// +// GPIO, Timer, Peripheral, and Pin assignments for the colors +// +#define RED_GPIO_PERIPH SYSCTL_PERIPH_GPIOF +#define RED_TIMER_PERIPH SYSCTL_PERIPH_TIMER0 +#define BLUE_GPIO_PERIPH SYSCTL_PERIPH_GPIOF +#define BLUE_TIMER_PERIPH SYSCTL_PERIPH_TIMER1 +#define GREEN_GPIO_PERIPH SYSCTL_PERIPH_GPIOF +#define GREEN_TIMER_PERIPH SYSCTL_PERIPH_TIMER1 + + +#define RED_GPIO_BASE GPIO_PORTF_BASE +#define RED_TIMER_BASE TIMER0_BASE +#define BLUE_GPIO_BASE GPIO_PORTF_BASE +#define BLUE_TIMER_BASE TIMER1_BASE +#define GREEN_GPIO_BASE GPIO_PORTF_BASE +#define GREEN_TIMER_BASE TIMER1_BASE + +#define RED_GPIO_PIN GPIO_PIN_1 +#define BLUE_GPIO_PIN GPIO_PIN_2 +#define GREEN_GPIO_PIN GPIO_PIN_3 + + +#define RED_GPIO_PIN_CFG GPIO_PF1_T0CCP1 +#define BLUE_GPIO_PIN_CFG GPIO_PF2_T1CCP0 +#define GREEN_GPIO_PIN_CFG GPIO_PF3_T1CCP1 + +#define RED_TIMER_CFG TIMER_CFG_B_PWM +#define BLUE_TIMER_CFG TIMER_CFG_A_PWM +#define GREEN_TIMER_CFG TIMER_CFG_B_PWM + +#define RED_TIMER TIMER_B +#define BLUE_TIMER TIMER_A +#define GREEN_TIMER TIMER_B + + +//***************************************************************************** +// +// Useful macros +// +//***************************************************************************** + +//***************************************************************************** +// +// If building with a C++ compiler, make all of the definitions in this header +// have a C binding. +// +//***************************************************************************** +#ifdef __cplusplus +extern "C" +{ +#endif + +//***************************************************************************** +// +// Functions exported from rgb.c +// +//***************************************************************************** +extern void RGBInit(unsigned long ulEnable); + +extern void RGBEnable(void); +extern void RGBDisable(void); +extern void RGBSet(volatile unsigned long * pulRGBColor, float fIntensity); +extern void RGBColorSet(volatile unsigned long * pulRGBColor); + +extern void RGBIntensitySet(float fIntensity); + +extern void RGBGet(unsigned long * pulRGBColor, float * pfIntensity); + +//***************************************************************************** +// +// Mark the end of the C bindings section for C++ compilers. +// +//***************************************************************************** +#ifdef __cplusplus +} +#endif + +//***************************************************************************** +// +// Prototypes for the globals exported by this driver. +// +//***************************************************************************** + +#endif // __RGBLED_H__ diff --git a/boards/ek-lm4f120xl/ek-lm4f120xl.eww b/boards/ek-lm4f120xl/ek-lm4f120xl.eww new file mode 100644 index 0000000..013d37e --- /dev/null +++ b/boards/ek-lm4f120xl/ek-lm4f120xl.eww @@ -0,0 +1,121 @@ + + + + + $WS_DIR$\..\..\driverlib\driverlib-cm4f.ewp + + + $WS_DIR$\..\..\usblib\usblib-cm4f.ewp + + + $WS_DIR$\bitband\bitband.ewp + + + $WS_DIR$\blinky\blinky.ewp + + + $WS_DIR$\freertos_demo\freertos_demo.ewp + + + $WS_DIR$\gpio_jtag\gpio_jtag.ewp + + + $WS_DIR$\hello\hello.ewp + + + $WS_DIR$\interrupts\interrupts.ewp + + + $WS_DIR$\mpu_fault\mpu_fault.ewp + + + $WS_DIR$\project0\project0.ewp + + + $WS_DIR$\qs-rgb\qs-rgb.ewp + + + $WS_DIR$\timers\timers.ewp + + + $WS_DIR$\uart_echo\uart_echo.ewp + + + $WS_DIR$\udma_demo\udma_demo.ewp + + + $WS_DIR$\usb_dev_bulk\usb_dev_bulk.ewp + + + $WS_DIR$\usb_dev_serial\usb_dev_serial.ewp + + + + All Examples + + driverlib-cm4f + Debug + + + usblib-cm4f + Debug + + + bitband + Debug + + + blinky + Debug + + + freertos_demo + Debug + + + gpio_jtag + Debug + + + hello + Debug + + + interrupts + Debug + + + mpu_fault + Debug + + + project0 + Debug + + + qs-rgb + Debug + + + timers + Debug + + + uart_echo + Debug + + + udma_demo + Debug + + + usb_dev_bulk + Debug + + + usb_dev_serial + Debug + + + + diff --git a/boards/ek-lm4f120xl/ek-lm4f120xl.sgxw b/boards/ek-lm4f120xl/ek-lm4f120xl.sgxw new file mode 100644 index 0000000..6bb5e00 --- /dev/null +++ b/boards/ek-lm4f120xl/ek-lm4f120xl.sgxw @@ -0,0 +1,43 @@ + + + + + + + + + + + + + + + + + + + + + + + diff --git a/boards/ek-lm4f120xl/ek-lm4f120xl.uvmpw b/boards/ek-lm4f120xl/ek-lm4f120xl.uvmpw new file mode 100644 index 0000000..70f1a48 --- /dev/null +++ b/boards/ek-lm4f120xl/ek-lm4f120xl.uvmpw @@ -0,0 +1,90 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + ek-lm4f120xl + + + ..\..\driverlib\driverlib-cm4f.uvproj + 1 + + + + ..\..\usblib\usblib-cm4f.uvproj + 1 + + + + .\bitband\bitband.uvproj + 1 + + + + .\blinky\blinky.uvproj + 1 + + + + .\freertos_demo\freertos_demo.uvproj + 1 + + + + .\gpio_jtag\gpio_jtag.uvproj + 1 + + + + .\hello\hello.uvproj + 1 + + + + .\interrupts\interrupts.uvproj + 1 + + + + .\mpu_fault\mpu_fault.uvproj + 1 + + + + .\project0\project0.uvproj + 1 + + + + .\qs-rgb\qs-rgb.uvproj + 1 + + + + .\timers\timers.uvproj + 1 + + + + .\uart_echo\uart_echo.uvproj + 1 + + + + .\udma_demo\udma_demo.uvproj + 1 + + + + .\usb_dev_bulk\usb_dev_bulk.uvproj + 1 + + + + .\usb_dev_serial\usb_dev_serial.uvproj + 1 + + + diff --git a/boards/ek-lm4f120xl/freertos_demo/FreeRTOSConfig.h b/boards/ek-lm4f120xl/freertos_demo/FreeRTOSConfig.h new file mode 100644 index 0000000..4e858c2 --- /dev/null +++ b/boards/ek-lm4f120xl/freertos_demo/FreeRTOSConfig.h @@ -0,0 +1,107 @@ +/* + FreeRTOS V7.0.2 - Copyright (C) 2011 Real Time Engineers Ltd. + + + *************************************************************************** + * * + * FreeRTOS tutorial books are available in pdf and paperback. * + * Complete, revised, and edited pdf reference manuals are also * + * available. * + * * + * Purchasing FreeRTOS documentation will not only help you, by * + * ensuring you get running as quickly as possible and with an * + * in-depth knowledge of how to use FreeRTOS, it will also help * + * the FreeRTOS project to continue with its mission of providing * + * professional grade, cross platform, de facto standard solutions * + * for microcontrollers - completely free of charge! * + * * + * >>> See http://www.FreeRTOS.org/Documentation for details. <<< * + * * + * Thank you for using FreeRTOS, and thank you for your support! * + * * + *************************************************************************** + + + This file is part of the FreeRTOS distribution. + + FreeRTOS is free software; you can redistribute it and/or modify it under + the terms of the GNU General Public License (version 2) as published by the + Free Software Foundation AND MODIFIED BY the FreeRTOS exception. + >>>NOTE<<< The modification to the GPL is included to allow you to + distribute a combined work that includes FreeRTOS without being obliged to + provide the source code for proprietary components outside of the FreeRTOS + kernel. FreeRTOS is distributed in the hope that it will be useful, but + WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY + or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + more details. You should have received a copy of the GNU General Public + License and the FreeRTOS license exception along with FreeRTOS; if not it + can be viewed here: http://www.freertos.org/a00114.html and also obtained + by writing to Richard Barry, contact details for whom are available on the + FreeRTOS WEB site. + + 1 tab == 4 spaces! + + http://www.FreeRTOS.org - Documentation, latest information, license and + contact details. + + http://www.SafeRTOS.com - A version that is certified for use in safety + critical systems. + + http://www.OpenRTOS.com - Commercial support, development, porting, + licensing and training services. +*/ + +#ifndef FREERTOS_CONFIG_H +#define FREERTOS_CONFIG_H + +/*----------------------------------------------------------- + * Application specific definitions. + * + * These definitions should be adjusted for your particular hardware and + * application requirements. + * + * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE + * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE. + * + * See http://www.freertos.org/a00110.html. + *----------------------------------------------------------*/ + +#define configUSE_PREEMPTION 1 +#define configUSE_IDLE_HOOK 0 +#define configUSE_TICK_HOOK 0 +#define configCPU_CLOCK_HZ ( ( unsigned long ) 50000000 ) +#define configTICK_RATE_HZ ( ( portTickType ) 1000 ) +#define configMINIMAL_STACK_SIZE ( ( unsigned short ) 200 ) +#define configTOTAL_HEAP_SIZE ( ( size_t ) ( 30000 ) ) +#define configMAX_TASK_NAME_LEN ( 12 ) +#define configUSE_TRACE_FACILITY 1 +#define configUSE_16_BIT_TICKS 0 +#define configIDLE_SHOULD_YIELD 0 +#define configUSE_CO_ROUTINES 0 +#define configUSE_MUTEXES 1 +#define configUSE_RECURSIVE_MUTEXES 1 +#define configCHECK_FOR_STACK_OVERFLOW 2 + +#define configMAX_PRIORITIES ( ( unsigned portBASE_TYPE ) 16 ) +#define configMAX_CO_ROUTINE_PRIORITIES ( 2 ) +#define configQUEUE_REGISTRY_SIZE 10 + +/* Set the following definitions to 1 to include the API function, or zero +to exclude the API function. */ + +#define INCLUDE_vTaskPrioritySet 1 +#define INCLUDE_uxTaskPriorityGet 1 +#define INCLUDE_vTaskDelete 1 +#define INCLUDE_vTaskCleanUpResources 0 +#define INCLUDE_vTaskSuspend 1 +#define INCLUDE_vTaskDelayUntil 1 +#define INCLUDE_vTaskDelay 1 +#define INCLUDE_uxTaskGetStackHighWaterMark 1 + +/* Be ENORMOUSLY careful if you want to modify these two values and make sure + * you read http://www.freertos.org/a00110.html#kernel_priority first! + */ +#define configKERNEL_INTERRUPT_PRIORITY ( 7 << 5 ) /* Priority 7, or 0xE0 as only the top three bits are implemented. This is the lowest priority. */ +#define configMAX_SYSCALL_INTERRUPT_PRIORITY ( 5 << 5 ) /* Priority 5, or 0xA0 as only the top three bits are implemented. */ + +#endif /* FREERTOS_CONFIG_H */ diff --git a/boards/ek-lm4f120xl/freertos_demo/Makefile b/boards/ek-lm4f120xl/freertos_demo/Makefile new file mode 100644 index 0000000..cb7df99 --- /dev/null +++ b/boards/ek-lm4f120xl/freertos_demo/Makefile @@ -0,0 +1,110 @@ +#****************************************************************************** +# +# Makefile - Rules for building the FreeRTOS example. +# +# Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +# Software License Agreement +# +# Texas Instruments (TI) is supplying this software for use solely and +# exclusively on TI's microcontroller products. The software is owned by +# TI and/or its suppliers, and is protected under applicable copyright +# laws. You may not combine this software with "viral" open-source +# software in order to form a larger program. +# +# THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +# NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +# NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +# A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +# CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +# DAMAGES, FOR ANY REASON WHATSOEVER. +# +# This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +# +#****************************************************************************** + +# +# Defines the part type that this project uses. +# +PART=LM4F120H5QR + +# +# Set the processor variant. +# +VARIANT=cm4f + +# +# The base directory for StellarisWare. +# +ROOT=../../.. + +# +# Include the common make definitions. +# +include ${ROOT}/makedefs + +# +# Where to find source files that do not live in this directory. +# +VPATH=../../../third_party/FreeRTOS/Source/portable/GCC/ARM_CM4F +VPATH+=../../../third_party/FreeRTOS/Source/portable/MemMang/ +VPATH+=../../../third_party/FreeRTOS/Source +VPATH+=../drivers +VPATH+=../../../utils + +# +# Where to find header files that do not live in the source directory. +# +IPATH=. +IPATH+=.. +IPATH+=../../.. +IPATH+=../../../third_party/FreeRTOS/Source/portable/GCC/ARM_CM4F +IPATH+=../../../third_party/FreeRTOS +IPATH+=../../../third_party/FreeRTOS/Source/include +IPATH+=../../../third_party + +# +# The default rule, which causes the FreeRTOS example to be built. +# +all: ${COMPILER} +all: ${COMPILER}/freertos_demo.axf + +# +# The rule to clean out all the build products. +# +clean: + @rm -rf ${COMPILER} ${wildcard *~} + +# +# The rule to create the target directory. +# +${COMPILER}: + @mkdir -p ${COMPILER} + +# +# Rules for building the FreeRTOS example. +# +${COMPILER}/freertos_demo.axf: ${COMPILER}/buttons.o +${COMPILER}/freertos_demo.axf: ${COMPILER}/freertos_demo.o +${COMPILER}/freertos_demo.axf: ${COMPILER}/heap_2.o +${COMPILER}/freertos_demo.axf: ${COMPILER}/led_task.o +${COMPILER}/freertos_demo.axf: ${COMPILER}/list.o +${COMPILER}/freertos_demo.axf: ${COMPILER}/port.o +${COMPILER}/freertos_demo.axf: ${COMPILER}/queue.o +${COMPILER}/freertos_demo.axf: ${COMPILER}/rgb.o +${COMPILER}/freertos_demo.axf: ${COMPILER}/startup_${COMPILER}.o +${COMPILER}/freertos_demo.axf: ${COMPILER}/switch_task.o +${COMPILER}/freertos_demo.axf: ${COMPILER}/tasks.o +${COMPILER}/freertos_demo.axf: ${COMPILER}/uartstdio.o +${COMPILER}/freertos_demo.axf: ${COMPILER}/ustdlib.o +${COMPILER}/freertos_demo.axf: ${ROOT}/driverlib/${COMPILER}-cm4f/libdriver-cm4f.a +${COMPILER}/freertos_demo.axf: freertos_demo.ld +SCATTERgcc_freertos_demo=freertos_demo.ld +ENTRY_freertos_demo=ResetISR +CFLAGSgcc=-DTARGET_IS_BLIZZARD_RA1 + +# +# Include the automatically generated dependency files. +# +ifneq (${MAKECMDGOALS},clean) +-include ${wildcard ${COMPILER}/*.d} __dummy__ +endif diff --git a/boards/ek-lm4f120xl/freertos_demo/ccs/.ccsimportspec b/boards/ek-lm4f120xl/freertos_demo/ccs/.ccsimportspec new file mode 100644 index 0000000..ef4631a --- /dev/null +++ b/boards/ek-lm4f120xl/freertos_demo/ccs/.ccsimportspec @@ -0,0 +1,14 @@ + + + + + + + + + + + + + + diff --git a/boards/ek-lm4f120xl/freertos_demo/ccs/.ccsproject b/boards/ek-lm4f120xl/freertos_demo/ccs/.ccsproject new file mode 100644 index 0000000..56793f4 --- /dev/null +++ b/boards/ek-lm4f120xl/freertos_demo/ccs/.ccsproject @@ -0,0 +1,12 @@ + + + + + + + + + + + + diff --git a/boards/ek-lm4f120xl/freertos_demo/ccs/.cproject b/boards/ek-lm4f120xl/freertos_demo/ccs/.cproject new file mode 100644 index 0000000..31804a7 --- /dev/null +++ b/boards/ek-lm4f120xl/freertos_demo/ccs/.cproject @@ -0,0 +1,203 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/boards/ek-lm4f120xl/freertos_demo/ccs/.project b/boards/ek-lm4f120xl/freertos_demo/ccs/.project new file mode 100644 index 0000000..ded8ce3 --- /dev/null +++ b/boards/ek-lm4f120xl/freertos_demo/ccs/.project @@ -0,0 +1,166 @@ + + + freertos_demo + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + + + ?name? + + + + org.eclipse.cdt.make.core.append_environment + true + + + org.eclipse.cdt.make.core.autoBuildTarget + all + + + org.eclipse.cdt.make.core.buildArguments + -k + + + org.eclipse.cdt.make.core.buildCommand + ${CCS_UTILS_DIR}/bin/gmake + + + org.eclipse.cdt.make.core.buildLocation + ${BuildDirectory} + + + org.eclipse.cdt.make.core.cleanBuildTarget + clean + + + org.eclipse.cdt.make.core.contents + org.eclipse.cdt.make.core.activeConfigSettings + + + org.eclipse.cdt.make.core.enableAutoBuild + true + + + org.eclipse.cdt.make.core.enableCleanBuild + true + + + org.eclipse.cdt.make.core.enableFullBuild + true + + + org.eclipse.cdt.make.core.fullBuildTarget + all + + + org.eclipse.cdt.make.core.stopOnError + false + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + true + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + com.ti.ccstudio.core.ccsNature + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.core.ccnature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + freertos_demo.c + 1 + SW_ROOT/boards/ek-lm4f120xl/freertos_demo/freertos_demo.c + + + freertos_demo_ccs.cmd + 1 + SW_ROOT/boards/ek-lm4f120xl/freertos_demo/freertos_demo_ccs.cmd + + + led_task.c + 1 + SW_ROOT/boards/ek-lm4f120xl/freertos_demo/led_task.c + + + startup_ccs.c + 1 + SW_ROOT/boards/ek-lm4f120xl/freertos_demo/startup_ccs.c + + + switch_task.c + 1 + SW_ROOT/boards/ek-lm4f120xl/freertos_demo/switch_task.c + + + drivers/buttons.c + 1 + SW_ROOT/boards/ek-lm4f120xl/drivers/buttons.c + + + drivers/rgb.c + 1 + SW_ROOT/boards/ek-lm4f120xl/drivers/rgb.c + + + utils/uartstdio.c + 1 + SW_ROOT/utils/uartstdio.c + + + utils/ustdlib.c + 1 + SW_ROOT/utils/ustdlib.c + + + third_party/FreeRTOS/Source/list.c + 1 + SW_ROOT/third_party/FreeRTOS/Source/list.c + + + third_party/FreeRTOS/Source/queue.c + 1 + SW_ROOT/third_party/FreeRTOS/Source/queue.c + + + third_party/FreeRTOS/Source/tasks.c + 1 + SW_ROOT/third_party/FreeRTOS/Source/tasks.c + + + third_party/FreeRTOS/Source/portable/MemMang/heap_2.c + 1 + SW_ROOT/third_party/FreeRTOS/Source/portable/MemMang/heap_2.c + + + third_party/FreeRTOS/Source/portable/CCS/ARM_CM4F/port.c + 1 + SW_ROOT/third_party/FreeRTOS/Source/portable/CCS/ARM_CM4F/port.c + + + third_party/FreeRTOS/Source/portable/CCS/ARM_CM4F/portasm.asm + 1 + SW_ROOT/third_party/FreeRTOS/Source/portable/CCS/ARM_CM4F/portasm.asm + + + + + SW_ROOT + $%7BPARENT-4-PROJECT_LOC%7D + + + diff --git a/boards/ek-lm4f120xl/freertos_demo/ccs/.settings/org.eclipse.cdt.codan.core.prefs b/boards/ek-lm4f120xl/freertos_demo/ccs/.settings/org.eclipse.cdt.codan.core.prefs new file mode 100644 index 0000000..98b6350 --- /dev/null +++ b/boards/ek-lm4f120xl/freertos_demo/ccs/.settings/org.eclipse.cdt.codan.core.prefs @@ -0,0 +1,3 @@ +eclipse.preferences.version=1 +inEditor=false +onBuild=false diff --git a/boards/ek-lm4f120xl/freertos_demo/ccs/Debug/freertos_demo.bin b/boards/ek-lm4f120xl/freertos_demo/ccs/Debug/freertos_demo.bin new file mode 100644 index 0000000..a9fd11a Binary files /dev/null and b/boards/ek-lm4f120xl/freertos_demo/ccs/Debug/freertos_demo.bin differ diff --git a/boards/ek-lm4f120xl/freertos_demo/ccs/Debug/freertos_demo.out b/boards/ek-lm4f120xl/freertos_demo/ccs/Debug/freertos_demo.out new file mode 100644 index 0000000..ff98884 Binary files /dev/null and b/boards/ek-lm4f120xl/freertos_demo/ccs/Debug/freertos_demo.out differ diff --git a/boards/ek-lm4f120xl/freertos_demo/ccs/macros.ini_initial b/boards/ek-lm4f120xl/freertos_demo/ccs/macros.ini_initial new file mode 100644 index 0000000..588017d --- /dev/null +++ b/boards/ek-lm4f120xl/freertos_demo/ccs/macros.ini_initial @@ -0,0 +1 @@ +SW_ROOT = ../../../.. diff --git a/boards/ek-lm4f120xl/freertos_demo/ccs/target_config.ccxml b/boards/ek-lm4f120xl/freertos_demo/ccs/target_config.ccxml new file mode 100644 index 0000000..469eea0 --- /dev/null +++ b/boards/ek-lm4f120xl/freertos_demo/ccs/target_config.ccxml @@ -0,0 +1,13 @@ + + + + + + + + + + + + + diff --git a/boards/ek-lm4f120xl/freertos_demo/ewarm/Exe/freertos_demo.bin b/boards/ek-lm4f120xl/freertos_demo/ewarm/Exe/freertos_demo.bin new file mode 100644 index 0000000..04c887d Binary files /dev/null and b/boards/ek-lm4f120xl/freertos_demo/ewarm/Exe/freertos_demo.bin differ diff --git a/boards/ek-lm4f120xl/freertos_demo/ewarm/Exe/freertos_demo.out b/boards/ek-lm4f120xl/freertos_demo/ewarm/Exe/freertos_demo.out new file mode 100644 index 0000000..90ab134 Binary files /dev/null and b/boards/ek-lm4f120xl/freertos_demo/ewarm/Exe/freertos_demo.out differ diff --git a/boards/ek-lm4f120xl/freertos_demo/freertos_demo.c b/boards/ek-lm4f120xl/freertos_demo/freertos_demo.c new file mode 100644 index 0000000..62c1feb --- /dev/null +++ b/boards/ek-lm4f120xl/freertos_demo/freertos_demo.c @@ -0,0 +1,185 @@ +//***************************************************************************** +// +// freertos_demo.c - Simple FreeRTOS example. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +#include "inc/hw_memmap.h" +#include "inc/hw_types.h" +#include "driverlib/gpio.h" +#include "driverlib/pin_map.h" +#include "driverlib/rom.h" +#include "driverlib/sysctl.h" +#include "driverlib/uart.h" +#include "utils/uartstdio.h" +#include "led_task.h" +#include "switch_task.h" +#include "FreeRTOS.h" +#include "task.h" +#include "queue.h" +#include "semphr.h" + +//***************************************************************************** +// +//! \addtogroup example_list +//!

FreeRTOS Example (freertos_demo)

+//! +//! This application demonstrates the use of FreeRTOS on Launchpad. +//! +//! The application blinks the user-selected LED at a user-selected frequency. +//! To select the LED press the left button and to select the frequency press +//! the right button. The UART outputs the application status at 115,200 baud, +//! 8-n-1 mode. +//! +//! This application utilizes FreeRTOS to perform the tasks in a concurrent +//! fashion. The following tasks are created: +//! +//! - An LED task, which blinks the user-selected on-board LED at a +//! user-selected rate (changed via the buttons). +//! +//! - A Switch task, which monitors the buttons pressed and passes the +//! information to LED task. +//! +//! In addition to the tasks, this application also uses the following FreeRTOS +//! resources: +//! +//! - A Queue to enable information transfer between tasks. +//! +//! - A Semaphore to guard the resource, UART, from access by multiple tasks at +//! the same time. +//! +//! - A non-blocking FreeRTOS Delay to put the tasks in blocked state when they +//! have nothing to do. +//! +//! For additional details on FreeRTOS, refer to the FreeRTOS web page at: +//! http://www.freertos.org/ +// +//***************************************************************************** + + +//***************************************************************************** +// +// The mutex that protects concurrent access of UART from multiple tasks. +// +//***************************************************************************** +xSemaphoreHandle g_pUARTSemaphore; + +//***************************************************************************** +// +// The error routine that is called if the driver library encounters an error. +// +//***************************************************************************** +#ifdef DEBUG +void +__error__(char *pcFilename, unsigned long ulLine) +{ +} + +#endif + +//***************************************************************************** +// +// This hook is called by FreeRTOS when an stack overflow error is detected. +// +//***************************************************************************** +void +vApplicationStackOverflowHook(xTaskHandle *pxTask, signed char *pcTaskName) +{ + // + // This function can not return, so loop forever. Interrupts are disabled + // on entry to this function, so no processor interrupts will interrupt + // this loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// Initialize FreeRTOS and start the initial set of tasks. +// +//***************************************************************************** +int +main(void) +{ + // + // Set the clocking to run at 50 MHz from the PLL. + // + ROM_SysCtlClockSet(SYSCTL_SYSDIV_4 | SYSCTL_USE_PLL | SYSCTL_XTAL_16MHZ | + SYSCTL_OSC_MAIN); + + // + // Initialize the UART and configure it for 115,200, 8-N-1 operation. + // + ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_UART0); + ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA); + GPIOPinConfigure(GPIO_PA0_U0RX); + GPIOPinConfigure(GPIO_PA1_U0TX); + ROM_GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_1); + UARTStdioInit(0); + + // + // Print demo introduction. + // + UARTprintf("\n\nWelcome to the Stellaris EK-LM4F120 FreeRTOS Demo!\n"); + + // + // Create a mutex to guard the UART. + // + g_pUARTSemaphore = xSemaphoreCreateMutex(); + + // + // Create the LED task. + // + if(LEDTaskInit() != 0) + { + + while(1) + { + } + } + + // + // Create the switch task. + // + if(SwitchTaskInit() != 0) + { + + while(1) + { + } + } + + // + // Start the scheduler. This should not return. + // + vTaskStartScheduler(); + + // + // In case the scheduler returns for some reason, print an error and loop + // forever. + // + + while(1) + { + } +} diff --git a/boards/ek-lm4f120xl/freertos_demo/freertos_demo.ewd b/boards/ek-lm4f120xl/freertos_demo/freertos_demo.ewd new file mode 100644 index 0000000..b8eeac7 --- /dev/null +++ b/boards/ek-lm4f120xl/freertos_demo/freertos_demo.ewd @@ -0,0 +1,614 @@ + + + + 1 + + Debug + + ARM + + 1 + + C-SPY + 2 + + 15 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + ARMSIM_ID + 2 + + 1 + 1 + 1 + + + + + + + + ANGEL_ID + 2 + + 0 + 1 + 1 + + + + + + + + + + + + GDBSERVER_ID + 2 + + 0 + 1 + 1 + + + + + + + + + + + IARROM_ID + 2 + + 0 + 1 + 1 + + + + + + + + + + JLINK_ID + 2 + + 9 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + LMIFTDI_ID + 2 + + 1 + 1 + 1 + + + + + + + + MACRAIGOR_ID + 2 + + 2 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + RDI_ID + 2 + + 1 + 1 + 1 + + + + + + + + + + + + + + + + + THIRDPARTY_ID + 2 + + 0 + 1 + 1 + + + + + + + + + $TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\OSE\OseEpsilonPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\PowerPac\PowerPacRTOS.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin + 0 + + + $EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin + 1 + + + $EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin + 0 + + + $EW_DIR$\common\plugins\Profiling\Profiling.ENU.ewplugin + 1 + + + $EW_DIR$\common\plugins\Stack\Stack.ENU.ewplugin + 1 + + + + diff --git a/boards/ek-lm4f120xl/freertos_demo/freertos_demo.ewp b/boards/ek-lm4f120xl/freertos_demo/freertos_demo.ewp new file mode 100644 index 0000000..38252de --- /dev/null +++ b/boards/ek-lm4f120xl/freertos_demo/freertos_demo.ewp @@ -0,0 +1,832 @@ + + + + 1 + + Debug + + ARM + + 1 + + General + 3 + + 14 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCARM + 2 + + 19 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AARM + 2 + + 7 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + OBJCOPY + 0 + + 1 + 1 + 1 + + + + + + + + + CUSTOM + 3 + + + + + + + BICOMP + 0 + + + + BUILDACTION + 1 + + + + + + + ILINK + 0 + + 5 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + IARCHIVE + 0 + + 0 + 1 + 1 + + + + + + + BILINK + 0 + + + + + Libraries + + $PROJ_DIR$\..\..\..\driverlib\ewarm-cm4f\Exe\driverlib-cm4f.a + + + + Source + + $PROJ_DIR$\..\drivers\buttons.c + + + $PROJ_DIR$\freertos_demo.c + + + $PROJ_DIR$\..\..\..\third_party\FreeRTOS\Source\portable\MemMang\heap_2.c + + + $PROJ_DIR$\led_task.c + + + $PROJ_DIR$\..\..\..\third_party\FreeRTOS\Source\list.c + + + $PROJ_DIR$\..\..\..\third_party\FreeRTOS\Source\portable\IAR\ARM_CM4F\port.c + + + $PROJ_DIR$\..\..\..\third_party\FreeRTOS\Source\portable\IAR\ARM_CM4F\portasm.S + + + $PROJ_DIR$\..\..\..\third_party\FreeRTOS\Source\queue.c + + + $PROJ_DIR$\..\drivers\rgb.c + + + $PROJ_DIR$\startup_ewarm.c + + + $PROJ_DIR$\switch_task.c + + + $PROJ_DIR$\..\..\..\third_party\FreeRTOS\Source\tasks.c + + + $PROJ_DIR$\..\..\..\utils\uartstdio.c + + + $PROJ_DIR$\..\..\..\utils\ustdlib.c + + + diff --git a/boards/ek-lm4f120xl/freertos_demo/freertos_demo.icf b/boards/ek-lm4f120xl/freertos_demo/freertos_demo.icf new file mode 100644 index 0000000..9dbcf08 --- /dev/null +++ b/boards/ek-lm4f120xl/freertos_demo/freertos_demo.icf @@ -0,0 +1,78 @@ +//***************************************************************************** +// +// freertos_demo.icf - Linker configuration file for freertos_demo. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +// +// Define a memory region that covers the entire 4 GB addressible space of the +// processor. +// +define memory mem with size = 4G; + +// +// Define a region for the on-chip flash. +// +define region FLASH = mem:[from 0x00000000 to 0x0003ffff]; + +// +// Define a region for the on-chip SRAM. +// +define region SRAM = mem:[from 0x20000000 to 0x20007fff]; + +// +// Define a block for the heap. The size should be set to something other +// than zero if things in the C library that require the heap are used. +// +define block HEAP with alignment = 8, size = 0x00000000 { }; + +// +// Indicate that the read/write values should be initialized by copying from +// flash. +// +initialize by copy { readwrite }; + +// +// Indicate that the noinit values should be left alone. This includes the +// stack, which if initialized will destroy the return address from the +// initialization code, causing the processor to branch to zero and fault. +// +do not initialize { section .noinit }; + +// +// Place the interrupt vectors at the start of flash. +// +place at start of FLASH { readonly section .intvec }; + +// +// Place the remainder of the read-only items into flash. +// +place in FLASH { readonly }; + +// +// Place the RAM vector table at the start of SRAM. +// +place at start of SRAM { section VTABLE }; + +// +// Place all read/write items into SRAM. +// +place in SRAM { readwrite, block HEAP }; diff --git a/boards/ek-lm4f120xl/freertos_demo/freertos_demo.ld b/boards/ek-lm4f120xl/freertos_demo/freertos_demo.ld new file mode 100644 index 0000000..f330aab --- /dev/null +++ b/boards/ek-lm4f120xl/freertos_demo/freertos_demo.ld @@ -0,0 +1,57 @@ +/****************************************************************************** + * + * freertos_demo.ld - Linker configuration file for freertos_demo. + * + * Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. + * Software License Agreement + * + * Texas Instruments (TI) is supplying this software for use solely and + * exclusively on TI's microcontroller products. The software is owned by + * TI and/or its suppliers, and is protected under applicable copyright + * laws. You may not combine this software with "viral" open-source + * software in order to form a larger program. + * + * THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. + * NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT + * NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY + * CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL + * DAMAGES, FOR ANY REASON WHATSOEVER. + * + * This is part of revision 9453 of the EK-LM4F120XL Firmware Package. + * + *****************************************************************************/ + +MEMORY +{ + FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x00040000 + SRAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00008000 +} + +SECTIONS +{ + .text : + { + _text = .; + KEEP(*(.isr_vector)) + *(.text*) + *(.rodata*) + _etext = .; + } > FLASH + + .data : AT(ADDR(.text) + SIZEOF(.text)) + { + _data = .; + *(vtable) + *(.data*) + _edata = .; + } > SRAM + + .bss : + { + _bss = .; + *(.bss*) + *(COMMON) + _ebss = .; + } > SRAM +} diff --git a/boards/ek-lm4f120xl/freertos_demo/freertos_demo.sct b/boards/ek-lm4f120xl/freertos_demo/freertos_demo.sct new file mode 100644 index 0000000..72cd2df --- /dev/null +++ b/boards/ek-lm4f120xl/freertos_demo/freertos_demo.sct @@ -0,0 +1,47 @@ +;****************************************************************************** +; +; freertos_demo.sct - Linker configuration file for freertos_demo. +; +; Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +; Software License Agreement +; +; Texas Instruments (TI) is supplying this software for use solely and +; exclusively on TI's microcontroller products. The software is owned by +; TI and/or its suppliers, and is protected under applicable copyright +; laws. You may not combine this software with "viral" open-source +; software in order to form a larger program. +; +; THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +; NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +; NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +; A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +; CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +; DAMAGES, FOR ANY REASON WHATSOEVER. +; +; This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +; +;****************************************************************************** + +LR_IROM 0x00000000 0x00040000 +{ + ; + ; Specify the Execution Address of the code and the size. + ; + ER_IROM 0x00000000 0x00040000 + { + *.o (RESET, +First) + * (InRoot$$Sections, +RO) + } + + ; + ; Specify the Execution Address of the data area. + ; + RW_IRAM 0x20000000 0x00008000 + { + ; + ; Uncomment the following line in order to use IntRegister(). + ; + ;* (vtable, +First) + * (+RW, +ZI) + } +} diff --git a/boards/ek-lm4f120xl/freertos_demo/freertos_demo.sgxx b/boards/ek-lm4f120xl/freertos_demo/freertos_demo.sgxx new file mode 100644 index 0000000..a8d5845 Binary files /dev/null and b/boards/ek-lm4f120xl/freertos_demo/freertos_demo.sgxx differ diff --git a/boards/ek-lm4f120xl/freertos_demo/freertos_demo.uvopt b/boards/ek-lm4f120xl/freertos_demo/freertos_demo.uvopt new file mode 100644 index 0000000..c591ac9 --- /dev/null +++ b/boards/ek-lm4f120xl/freertos_demo/freertos_demo.uvopt @@ -0,0 +1,443 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + + + + 0 + 0 + + + + freertos_demo + 0x4 + ARM-ADS + + 8000000 + + 1 + 1 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\rvmdk\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 255 + + + 0 + Data Sheet + DATASHTS\Luminary\LM4F120H5QR.PDF + + + + SARMCM3.DLL + -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 0 + 1 + 0 + 0 + 4 + + + + + + + + + + + BIN\lmidk-agdi.dll + + + + 0 + lmidk-agdi + -O4614 -S3 -FO29 + + + 0 + DLGTARM + + + + 0 + ARMDBGFLAGS + + + + + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + Source + 1 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\drivers\buttons.c + buttons.c + + + 1 + 2 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + .\freertos_demo.c + freertos_demo.c + + + 1 + 3 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\third_party\FreeRTOS\Source\portable\MemMang\heap_2.c + heap_2.c + + + 1 + 4 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + .\led_task.c + led_task.c + + + 1 + 5 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\third_party\FreeRTOS\Source\list.c + list.c + + + 1 + 6 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\third_party\FreeRTOS\Source\portable\RVDS\ARM_CM4F\port.c + port.c + + + 1 + 7 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\third_party\FreeRTOS\Source\queue.c + queue.c + + + 1 + 8 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\drivers\rgb.c + rgb.c + + + 1 + 9 + 2 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + .\startup_rvmdk.S + startup_rvmdk.S + + + 1 + 10 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + .\switch_task.c + switch_task.c + + + 1 + 11 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\third_party\FreeRTOS\Source\tasks.c + tasks.c + + + 1 + 12 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\utils\uartstdio.c + uartstdio.c + + + 1 + 13 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\utils\ustdlib.c + ustdlib.c + + + + + Libraries + 1 + 0 + 0 + + 2 + 14 + 4 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\driverlib\rvmdk-cm4f\driverlib-cm4f.lib + driverlib-cm4f.lib + + + + + Documentation + 1 + 0 + 0 + + 3 + 15 + 5 + 0 + 1 + 0 + 0 + 1 + 1 + 0 + .\readme.txt + readme.txt + + 44 + 0 + 1 + + -1 + -1 + + + -1 + -1 + + + 0 + 0 + 729 + 300 + + + + + + + 1 + 0 + + 100 + 0 + + + .\readme.txt + 0 + 1 + 1 + + + + + + diff --git a/boards/ek-lm4f120xl/freertos_demo/freertos_demo.uvproj b/boards/ek-lm4f120xl/freertos_demo/freertos_demo.uvproj new file mode 100644 index 0000000..922a563 --- /dev/null +++ b/boards/ek-lm4f120xl/freertos_demo/freertos_demo.uvproj @@ -0,0 +1,479 @@ + + + + 1.1 + +
### uVision Project, (C) Keil Software
+ + + + freertos_demo + 0x4 + ARM-ADS + + + LM4F120H5QR + Texas Instruments + IRAM(0x20000000-0x20007FFF) IROM(0-0x3FFFF) CLOCK(8000000) CPUTYPE("Cortex-M4") FPU2 + + "STARTUP\Luminary\Startup.s" ("Luminary Startup Code") + UL2CM3(-O207 -S0 -C0 -FO7 -FD20000000 -FC800 -FN1 -FF0LM4F_256 -FS00 -FL040000) + 5919 + LM4Fxxxx.H + + + + + + + + + + 0 + + + + Luminary\ + Luminary\ + + 0 + 0 + 0 + 0 + 1 + + .\rvmdk\ + freertos_demo + 1 + 0 + 0 + 1 + 1 + .\rvmdk\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + + 1 + 0 + fromelf --bin --output .\rvmdk\freertos_demo.bin .\rvmdk\freertos_demo.axf + + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + + + SARMCM3.DLL + -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + + 1 + 0 + 0 + 0 + 16 + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + + + 1 + 1 + 0 + 1 + 1 + 1 + 0 + 1 + + 0 + 4 + + + + + + + + + + + + + + BIN\lmidk-agdi.dll + + + + + 1 + 0 + 0 + 0 + 1 + 4099 + + BIN\lmidk-agdi.dll + + + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M4" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 2 + 0 + 0 + 8 + 1 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x8000 + + + 1 + 0x0 + 0x40000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x40000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x8000 + + + 0 + 0x0 + 0x0 + + + + + + 0 + 3 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + + + rvmdk PART_LM4F120H5QR TARGET_IS_BLIZZARD_RA1 + + .;..;..\..\..;..\..\..\third_party\FreeRTOS\Source\portable\RVDS\ARM_CM4F;..\..\..\third_party\FreeRTOS;..\..\..\third_party\FreeRTOS\Source\include;..\..\..\third_party; + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x00000000 + 0x20000000 + freertos_demo.sct + + + --entry Reset_Handler + + + + + + + + Source + + + buttons.c + 1 + ..\drivers\buttons.c + + + freertos_demo.c + 1 + .\freertos_demo.c + + + heap_2.c + 1 + ..\..\..\third_party\FreeRTOS\Source\portable\MemMang\heap_2.c + + + led_task.c + 1 + .\led_task.c + + + list.c + 1 + ..\..\..\third_party\FreeRTOS\Source\list.c + + + port.c + 1 + ..\..\..\third_party\FreeRTOS\Source\portable\RVDS\ARM_CM4F\port.c + + + queue.c + 1 + ..\..\..\third_party\FreeRTOS\Source\queue.c + + + rgb.c + 1 + ..\drivers\rgb.c + + + startup_rvmdk.S + 2 + .\startup_rvmdk.S + + + switch_task.c + 1 + .\switch_task.c + + + tasks.c + 1 + ..\..\..\third_party\FreeRTOS\Source\tasks.c + + + uartstdio.c + 1 + ..\..\..\utils\uartstdio.c + + + ustdlib.c + 1 + ..\..\..\utils\ustdlib.c + + + + + Libraries + + + driverlib-cm4f.lib + 4 + ..\..\..\driverlib\rvmdk-cm4f\driverlib-cm4f.lib + + + + + Documentation + + + readme.txt + 5 + .\readme.txt + + + + + + + + diff --git a/boards/ek-lm4f120xl/freertos_demo/freertos_demo_ccs.cmd b/boards/ek-lm4f120xl/freertos_demo/freertos_demo_ccs.cmd new file mode 100644 index 0000000..a18acf8 --- /dev/null +++ b/boards/ek-lm4f120xl/freertos_demo/freertos_demo_ccs.cmd @@ -0,0 +1,70 @@ +/****************************************************************************** + * + * freertos_demo_ccs.cmd - CCS linker configuration file for freertos_demo. + * + * Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. + * Software License Agreement + * + * Texas Instruments (TI) is supplying this software for use solely and + * exclusively on TI's microcontroller products. The software is owned by + * TI and/or its suppliers, and is protected under applicable copyright + * laws. You may not combine this software with "viral" open-source + * software in order to form a larger program. + * + * THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. + * NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT + * NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY + * CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL + * DAMAGES, FOR ANY REASON WHATSOEVER. + * + * This is part of revision 9453 of the EK-LM4F120XL Firmware Package. + * + *****************************************************************************/ + +--retain=g_pfnVectors + +/* The following command line options are set as part of the CCS project. */ +/* If you are building using the command line, or for some reason want to */ +/* define them here, you can uncomment and modify these lines as needed. */ +/* If you are using CCS for building, it is probably better to make any such */ +/* modifications in your CCS project and leave this file alone. */ +/* */ +/* --heap_size=0 */ +/* --stack_size=256 */ +/* --library=rtsv7M3_T_le_eabi.lib */ + +/* The starting address of the application. Normally the interrupt vectors */ +/* must be located at the beginning of the application. */ +#define APP_BASE 0x00000000 +#define RAM_BASE 0x20000000 + +/* System memory map */ + +MEMORY +{ + /* Application stored in and executes from internal flash */ + FLASH (RX) : origin = APP_BASE, length = 0x00040000 + /* Application uses internal RAM for data */ + SRAM (RWX) : origin = 0x20000000, length = 0x00008000 +} + +/* Section allocation in memory */ + +SECTIONS +{ + .intvecs: > APP_BASE + .text : > FLASH + .const : > FLASH + .cinit : > FLASH + .pinit : > FLASH + .init_array : > FLASH + + .vtable : > RAM_BASE + .data : > SRAM + .bss : > SRAM + .sysmem : > SRAM + .stack : > SRAM +} + +__STACK_TOP = __stack + 512; diff --git a/boards/ek-lm4f120xl/freertos_demo/freertos_demo_sourcerygxx.ld b/boards/ek-lm4f120xl/freertos_demo/freertos_demo_sourcerygxx.ld new file mode 100644 index 0000000..c88ca3d --- /dev/null +++ b/boards/ek-lm4f120xl/freertos_demo/freertos_demo_sourcerygxx.ld @@ -0,0 +1,43 @@ +/****************************************************************************** + * + * freertos_demo_sourcerygxx.ld - Scatter file for Sourcery CodeBench + * + * Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. + * Software License Agreement + * + * Texas Instruments (TI) is supplying this software for use solely and + * exclusively on TI's microcontroller products. The software is owned by + * TI and/or its suppliers, and is protected under applicable copyright + * laws. You may not combine this software with "viral" open-source + * software in order to form a larger program. + * + * THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. + * NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT + * NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY + * CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL + * DAMAGES, FOR ANY REASON WHATSOEVER. + * + * This is part of revision 9453 of the EK-LM4F120XL Firmware Package. + * + *****************************************************************************/ + +/****************************************************************************** + * + * Define the end of the heap space, which determines the beginning of the + * stack space. + * + *****************************************************************************/ +__cs3_heap_end = __cs3_region_end_ram - 512; + +/****************************************************************************** + * + * Define the interrupt handlers used by the application. + * + *****************************************************************************/ +EXTERN(vPortSVCHandler) +__cs3_isr_svcall = vPortSVCHandler; +EXTERN(xPortPendSVHandler) +__cs3_isr_pendsv = xPortPendSVHandler; +EXTERN(xPortSysTickHandler) +__cs3_isr_systick = xPortSysTickHandler; diff --git a/boards/ek-lm4f120xl/freertos_demo/gcc/freertos_demo.axf b/boards/ek-lm4f120xl/freertos_demo/gcc/freertos_demo.axf new file mode 100644 index 0000000..ecc8c1e Binary files /dev/null and b/boards/ek-lm4f120xl/freertos_demo/gcc/freertos_demo.axf differ diff --git a/boards/ek-lm4f120xl/freertos_demo/gcc/freertos_demo.bin b/boards/ek-lm4f120xl/freertos_demo/gcc/freertos_demo.bin new file mode 100644 index 0000000..c1e077c Binary files /dev/null and b/boards/ek-lm4f120xl/freertos_demo/gcc/freertos_demo.bin differ diff --git a/boards/ek-lm4f120xl/freertos_demo/led_task.c b/boards/ek-lm4f120xl/freertos_demo/led_task.c new file mode 100644 index 0000000..90befb5 --- /dev/null +++ b/boards/ek-lm4f120xl/freertos_demo/led_task.c @@ -0,0 +1,235 @@ +//***************************************************************************** +// +// led_task.c - A simple flashing LED task. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +#include "inc/hw_memmap.h" +#include "inc/hw_types.h" +#include "driverlib/gpio.h" +#include "driverlib/rom.h" +#include "drivers/rgb.h" +#include "drivers/buttons.h" +#include "utils/uartstdio.h" +#include "led_task.h" +#include "priorities.h" +#include "FreeRTOS.h" +#include "task.h" +#include "queue.h" +#include "semphr.h" + +//***************************************************************************** +// +// The stack size for the LED toggle task. +// +//***************************************************************************** +#define LEDTASKSTACKSIZE 128 // Stack size in words + +//***************************************************************************** +// +// The item size and queue size for the LED message queue. +// +//***************************************************************************** +#define LED_ITEM_SIZE sizeof(unsigned char) +#define LED_QUEUE_SIZE 5 + +//***************************************************************************** +// +// Default LED toggle delay value. LED toggling frequency is twice this number. +// +//***************************************************************************** +#define LED_TOGGLE_DELAY 250 + +//***************************************************************************** +// +// The queue that holds messages sent to the LED task. +// +//***************************************************************************** +xQueueHandle g_pLEDQueue; + +// +// [G, R, B] range is 0 to 0xFFFF per color. +// +static unsigned long g_ulColors[3] = { 0x0000, 0x0000, 0x0000 }; +static unsigned char g_ucColorsIndx; + +extern xSemaphoreHandle g_pUARTSemaphore; + +//***************************************************************************** +// +// This task toggles the user selected LED at a user selected frequency. User +// can make the selections by pressing the left and right buttons. +// +//***************************************************************************** +static void +LEDTask(void *pvParameters) +{ + portTickType ulWakeTime; + unsigned long ulLEDToggleDelay; + unsigned char cMessage; + + // + // Initialize the LED Toggle Delay to default value. + // + ulLEDToggleDelay = LED_TOGGLE_DELAY; + + // + // Get the current tick count. + // + ulWakeTime = xTaskGetTickCount(); + + // + // Loop forever. + // + while(1) + { + // + // Read the next message, if available on queue. + // + if(xQueueReceive(g_pLEDQueue, &cMessage, 0) == pdPASS) + { + // + // If left button, update to next LED. + // + if(cMessage == LEFT_BUTTON) + { + // + // Update the LED buffer to turn off the currently working. + // + g_ulColors[g_ucColorsIndx] = 0x0000; + + // + // Update the index to next LED + g_ucColorsIndx++; + if(g_ucColorsIndx > 2) + { + g_ucColorsIndx = 0; + } + + // + // Update the LED buffer to turn on the newly selected LED. + // + g_ulColors[g_ucColorsIndx] = 0x8000; + + // + // Configure the new LED settings. + // + RGBColorSet(g_ulColors); + + // + // Guard UART from concurrent access. Print the currently + // blinking LED. + // + xSemaphoreTake(g_pUARTSemaphore, portMAX_DELAY); + UARTprintf("Led %d is blinking. [G, R, B]\n", g_ucColorsIndx); + xSemaphoreGive(g_pUARTSemaphore); + } + + // + // If right button, update delay time between toggles of led. + // + if(cMessage == RIGHT_BUTTON) + { + ulLEDToggleDelay *= 2; + if(ulLEDToggleDelay > 1000) + { + ulLEDToggleDelay = LED_TOGGLE_DELAY / 2; + } + + // + // Guard UART from concurrent access. Print the currently + // blinking frequency. + // + xSemaphoreTake(g_pUARTSemaphore, portMAX_DELAY); + UARTprintf("Led blinking frequency is %d ms.\n", + (ulLEDToggleDelay * 2)); + xSemaphoreGive(g_pUARTSemaphore); + } + } + + // + // Turn on the LED. + // + RGBEnable(); + + // + // Wait for the required amount of time. + // + vTaskDelayUntil(&ulWakeTime, ulLEDToggleDelay / portTICK_RATE_MS); + + // + // Turn off the LED. + // + RGBDisable(); + + // + // Wait for the required amount of time. + // + vTaskDelayUntil(&ulWakeTime, ulLEDToggleDelay / portTICK_RATE_MS); + } +} + +//***************************************************************************** +// +// Initializes the LED task. +// +//***************************************************************************** +unsigned long +LEDTaskInit(void) +{ + // + // Initialize the GPIOs and Timers that drive the three LEDs. + // + RGBInit(1); + RGBIntensitySet(0.3f); + + // + // Turn on the Green LED + // + g_ucColorsIndx = 0; + g_ulColors[g_ucColorsIndx] = 0x8000; + RGBColorSet(g_ulColors); + + // + // Print the current loggling LED and frequency. + // + UARTprintf("\nLed %d is blinking. [G, R, B]\n", g_ucColorsIndx); + UARTprintf("Led blinking frequency is %d ms.\n", (LED_TOGGLE_DELAY * 2)); + + // + // Create a queue for sending messages to the LED task. + // + g_pLEDQueue = xQueueCreate(LED_QUEUE_SIZE, LED_ITEM_SIZE); + + // + // Create the LED task. + // + if(xTaskCreate(LEDTask, (signed portCHAR *)"LED", LEDTASKSTACKSIZE, NULL, + tskIDLE_PRIORITY + PRIORITY_LED_TASK, NULL) != pdTRUE) + { + return(1); + } + + // + // Success. + // + return(0); +} diff --git a/boards/ek-lm4f120xl/freertos_demo/led_task.h b/boards/ek-lm4f120xl/freertos_demo/led_task.h new file mode 100644 index 0000000..ab6f5cb --- /dev/null +++ b/boards/ek-lm4f120xl/freertos_demo/led_task.h @@ -0,0 +1,35 @@ +//***************************************************************************** +// +// led_task.h - Prototypes for the LED task. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +#ifndef __LED_TASK_H__ +#define __LED_TASK_H__ + +//***************************************************************************** +// +// Prototypes for the LED task. +// +//***************************************************************************** +extern unsigned long LEDTaskInit(void); + +#endif // __LED_TASK_H__ diff --git a/boards/ek-lm4f120xl/freertos_demo/priorities.h b/boards/ek-lm4f120xl/freertos_demo/priorities.h new file mode 100644 index 0000000..9ed75ca --- /dev/null +++ b/boards/ek-lm4f120xl/freertos_demo/priorities.h @@ -0,0 +1,37 @@ +//***************************************************************************** +// +// priorities.h - Priorities for the various FreeRTOS tasks. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +#ifndef __PRIORITIES_H__ +#define __PRIORITIES_H__ + +//***************************************************************************** +// +// The priorities of the various tasks. +// +//***************************************************************************** +#define PRIORITY_SWITCH_TASK 2 +#define PRIORITY_LED_TASK 1 + + +#endif // __PRIORITIES_H__ diff --git a/boards/ek-lm4f120xl/freertos_demo/readme.txt b/boards/ek-lm4f120xl/freertos_demo/readme.txt new file mode 100644 index 0000000..c66feae --- /dev/null +++ b/boards/ek-lm4f120xl/freertos_demo/readme.txt @@ -0,0 +1,51 @@ +FreeRTOS Example + +This application demonstrates the use of FreeRTOS on Launchpad. + +The application blinks the user-selected LED at a user-selected frequency. +To select the LED press the left button and to select the frequency press +the right button. The UART outputs the application status at 115,200 baud, +8-n-1 mode. + +This application utilizes FreeRTOS to perform the tasks in a concurrent +fashion. The following tasks are created: + +- An LED task, which blinks the user-selected on-board LED at a + user-selected rate (changed via the buttons). + +- A Switch task, which monitors the buttons pressed and passes the + information to LED task. + +In addition to the tasks, this application also uses the following FreeRTOS +resources: + +- A Queue to enable information transfer between tasks. + +- A Semaphore to guard the resource, UART, from access by multiple tasks at + the same time. + +- A non-blocking FreeRTOS Delay to put the tasks in blocked state when they + have nothing to do. + +For additional details on FreeRTOS, refer to the FreeRTOS web page at: +http://www.freertos.org/ + +------------------------------------------------------------------------------- + +Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +Software License Agreement + +Texas Instruments (TI) is supplying this software for use solely and +exclusively on TI's microcontroller products. The software is owned by +TI and/or its suppliers, and is protected under applicable copyright +laws. You may not combine this software with "viral" open-source +software in order to form a larger program. + +THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +DAMAGES, FOR ANY REASON WHATSOEVER. + +This is part of revision 9453 of the EK-LM4F120XL Firmware Package. diff --git a/boards/ek-lm4f120xl/freertos_demo/rvmdk/freertos_demo.axf b/boards/ek-lm4f120xl/freertos_demo/rvmdk/freertos_demo.axf new file mode 100644 index 0000000..a900f1e Binary files /dev/null and b/boards/ek-lm4f120xl/freertos_demo/rvmdk/freertos_demo.axf differ diff --git a/boards/ek-lm4f120xl/freertos_demo/rvmdk/freertos_demo.bin b/boards/ek-lm4f120xl/freertos_demo/rvmdk/freertos_demo.bin new file mode 100644 index 0000000..e97fc6e Binary files /dev/null and b/boards/ek-lm4f120xl/freertos_demo/rvmdk/freertos_demo.bin differ diff --git a/boards/ek-lm4f120xl/freertos_demo/sourcerygxx/freertos_demo.axf b/boards/ek-lm4f120xl/freertos_demo/sourcerygxx/freertos_demo.axf new file mode 100644 index 0000000..b4500d9 Binary files /dev/null and b/boards/ek-lm4f120xl/freertos_demo/sourcerygxx/freertos_demo.axf differ diff --git a/boards/ek-lm4f120xl/freertos_demo/sourcerygxx/freertos_demo.bin b/boards/ek-lm4f120xl/freertos_demo/sourcerygxx/freertos_demo.bin new file mode 100644 index 0000000..de0b511 Binary files /dev/null and b/boards/ek-lm4f120xl/freertos_demo/sourcerygxx/freertos_demo.bin differ diff --git a/boards/ek-lm4f120xl/freertos_demo/startup_ccs.c b/boards/ek-lm4f120xl/freertos_demo/startup_ccs.c new file mode 100644 index 0000000..bc89c19 --- /dev/null +++ b/boards/ek-lm4f120xl/freertos_demo/startup_ccs.c @@ -0,0 +1,300 @@ +//***************************************************************************** +// +// startup_ccs.c - Startup code for use with TI's Code Composer Studio. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +//***************************************************************************** +// +// Forward declaration of the default fault handlers. +// +//***************************************************************************** +void ResetISR(void); +static void NmiSR(void); +static void FaultISR(void); +static void IntDefaultHandler(void); + +//***************************************************************************** +// +// External declaration for the reset handler that is to be called when the +// processor is started +// +//***************************************************************************** +extern void _c_int00(void); + +//***************************************************************************** +// +// Linker variable that marks the top of the stack. +// +//***************************************************************************** +extern unsigned long __STACK_TOP; + +//***************************************************************************** +// +// External declarations for the interrupt handlers used by the application. +// +//***************************************************************************** +extern void xPortPendSVHandler(void); +extern void vPortSVCHandler(void); +extern void xPortSysTickHandler(void); + +//***************************************************************************** +// +// The vector table. Note that the proper constructs must be placed on this to +// ensure that it ends up at physical address 0x0000.0000 or at the start of +// the program if located at a start address other than 0. +// +//***************************************************************************** +#pragma DATA_SECTION(g_pfnVectors, ".intvecs") +void (* const g_pfnVectors[])(void) = +{ + (void (*)(void))((unsigned long)&__STACK_TOP), + // The initial stack pointer + ResetISR, // The reset handler + NmiSR, // The NMI handler + FaultISR, // The hard fault handler + IntDefaultHandler, // The MPU fault handler + IntDefaultHandler, // The bus fault handler + IntDefaultHandler, // The usage fault handler + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + vPortSVCHandler, // SVCall handler + IntDefaultHandler, // Debug monitor handler + 0, // Reserved + xPortPendSVHandler, // The PendSV handler + xPortSysTickHandler, // The SysTick handler + IntDefaultHandler, // GPIO Port A + IntDefaultHandler, // GPIO Port B + IntDefaultHandler, // GPIO Port C + IntDefaultHandler, // GPIO Port D + IntDefaultHandler, // GPIO Port E + IntDefaultHandler, // UART0 Rx and Tx + IntDefaultHandler, // UART1 Rx and Tx + IntDefaultHandler, // SSI0 Rx and Tx + IntDefaultHandler, // I2C0 Master and Slave + IntDefaultHandler, // PWM Fault + IntDefaultHandler, // PWM Generator 0 + IntDefaultHandler, // PWM Generator 1 + IntDefaultHandler, // PWM Generator 2 + IntDefaultHandler, // Quadrature Encoder 0 + IntDefaultHandler, // ADC Sequence 0 + IntDefaultHandler, // ADC Sequence 1 + IntDefaultHandler, // ADC Sequence 2 + IntDefaultHandler, // ADC Sequence 3 + IntDefaultHandler, // Watchdog timer + IntDefaultHandler, // Timer 0 subtimer A + IntDefaultHandler, // Timer 0 subtimer B + IntDefaultHandler, // Timer 1 subtimer A + IntDefaultHandler, // Timer 1 subtimer B + IntDefaultHandler, // Timer 2 subtimer A + IntDefaultHandler, // Timer 2 subtimer B + IntDefaultHandler, // Analog Comparator 0 + IntDefaultHandler, // Analog Comparator 1 + IntDefaultHandler, // Analog Comparator 2 + IntDefaultHandler, // System Control (PLL, OSC, BO) + IntDefaultHandler, // FLASH Control + IntDefaultHandler, // GPIO Port F + IntDefaultHandler, // GPIO Port G + IntDefaultHandler, // GPIO Port H + IntDefaultHandler, // UART2 Rx and Tx + IntDefaultHandler, // SSI1 Rx and Tx + IntDefaultHandler, // Timer 3 subtimer A + IntDefaultHandler, // Timer 3 subtimer B + IntDefaultHandler, // I2C1 Master and Slave + IntDefaultHandler, // Quadrature Encoder 1 + IntDefaultHandler, // CAN0 + IntDefaultHandler, // CAN1 + IntDefaultHandler, // CAN2 + IntDefaultHandler, // Ethernet + IntDefaultHandler, // Hibernate + IntDefaultHandler, // USB0 + IntDefaultHandler, // PWM Generator 3 + IntDefaultHandler, // uDMA Software Transfer + IntDefaultHandler, // uDMA Error + IntDefaultHandler, // ADC1 Sequence 0 + IntDefaultHandler, // ADC1 Sequence 1 + IntDefaultHandler, // ADC1 Sequence 2 + IntDefaultHandler, // ADC1 Sequence 3 + IntDefaultHandler, // I2S0 + IntDefaultHandler, // External Bus Interface 0 + IntDefaultHandler, // GPIO Port J + IntDefaultHandler, // GPIO Port K + IntDefaultHandler, // GPIO Port L + IntDefaultHandler, // SSI2 Rx and Tx + IntDefaultHandler, // SSI3 Rx and Tx + IntDefaultHandler, // UART3 Rx and Tx + IntDefaultHandler, // UART4 Rx and Tx + IntDefaultHandler, // UART5 Rx and Tx + IntDefaultHandler, // UART6 Rx and Tx + IntDefaultHandler, // UART7 Rx and Tx + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // I2C2 Master and Slave + IntDefaultHandler, // I2C3 Master and Slave + IntDefaultHandler, // Timer 4 subtimer A + IntDefaultHandler, // Timer 4 subtimer B + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // Timer 5 subtimer A + IntDefaultHandler, // Timer 5 subtimer B + IntDefaultHandler, // Wide Timer 0 subtimer A + IntDefaultHandler, // Wide Timer 0 subtimer B + IntDefaultHandler, // Wide Timer 1 subtimer A + IntDefaultHandler, // Wide Timer 1 subtimer B + IntDefaultHandler, // Wide Timer 2 subtimer A + IntDefaultHandler, // Wide Timer 2 subtimer B + IntDefaultHandler, // Wide Timer 3 subtimer A + IntDefaultHandler, // Wide Timer 3 subtimer B + IntDefaultHandler, // Wide Timer 4 subtimer A + IntDefaultHandler, // Wide Timer 4 subtimer B + IntDefaultHandler, // Wide Timer 5 subtimer A + IntDefaultHandler, // Wide Timer 5 subtimer B + IntDefaultHandler, // FPU + IntDefaultHandler, // PECI 0 + IntDefaultHandler, // LPC 0 + IntDefaultHandler, // I2C4 Master and Slave + IntDefaultHandler, // I2C5 Master and Slave + IntDefaultHandler, // GPIO Port M + IntDefaultHandler, // GPIO Port N + IntDefaultHandler, // Quadrature Encoder 2 + IntDefaultHandler, // Fan 0 + 0, // Reserved + IntDefaultHandler, // GPIO Port P (Summary or P0) + IntDefaultHandler, // GPIO Port P1 + IntDefaultHandler, // GPIO Port P2 + IntDefaultHandler, // GPIO Port P3 + IntDefaultHandler, // GPIO Port P4 + IntDefaultHandler, // GPIO Port P5 + IntDefaultHandler, // GPIO Port P6 + IntDefaultHandler, // GPIO Port P7 + IntDefaultHandler, // GPIO Port Q (Summary or Q0) + IntDefaultHandler, // GPIO Port Q1 + IntDefaultHandler, // GPIO Port Q2 + IntDefaultHandler, // GPIO Port Q3 + IntDefaultHandler, // GPIO Port Q4 + IntDefaultHandler, // GPIO Port Q5 + IntDefaultHandler, // GPIO Port Q6 + IntDefaultHandler, // GPIO Port Q7 + IntDefaultHandler, // GPIO Port R + IntDefaultHandler, // GPIO Port S + IntDefaultHandler, // PWM 1 Generator 0 + IntDefaultHandler, // PWM 1 Generator 1 + IntDefaultHandler, // PWM 1 Generator 2 + IntDefaultHandler, // PWM 1 Generator 3 + IntDefaultHandler // PWM 1 Fault +}; + +//***************************************************************************** +// +// This is the code that gets called when the processor first starts execution +// following a reset event. Only the absolutely necessary set is performed, +// after which the application supplied entry() routine is called. Any fancy +// actions (such as making decisions based on the reset cause register, and +// resetting the bits in that register) are left solely in the hands of the +// application. +// +//***************************************************************************** +void +ResetISR(void) +{ + // + // Jump to the CCS C initialization routine. This will enable the + // floating-point unit as well, so that does not need to be done here. + // + __asm(" .global _c_int00\n" + " b.w _c_int00"); +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a NMI. This +// simply enters an infinite loop, preserving the system state for examination +// by a debugger. +// +//***************************************************************************** +static void +NmiSR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a fault +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +FaultISR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives an unexpected +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +IntDefaultHandler(void) +{ + // + // Go into an infinite loop. + // + while(1) + { + } +} diff --git a/boards/ek-lm4f120xl/freertos_demo/startup_ewarm.c b/boards/ek-lm4f120xl/freertos_demo/startup_ewarm.c new file mode 100644 index 0000000..45ffbca --- /dev/null +++ b/boards/ek-lm4f120xl/freertos_demo/startup_ewarm.c @@ -0,0 +1,334 @@ +//***************************************************************************** +// +// startup_ewarm.c - Startup code for use with IAR's Embedded Workbench, +// version 5. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +#include "inc/hw_nvic.h" +#include "inc/hw_types.h" + +//***************************************************************************** +// +// Enable the IAR extensions for this source file. +// +//***************************************************************************** +#pragma language=extended + +//***************************************************************************** +// +// Forward declaration of the default fault handlers. +// +//***************************************************************************** +void ResetISR(void); +static void NmiSR(void); +static void FaultISR(void); +static void IntDefaultHandler(void); + +//***************************************************************************** +// +// External declarations for the interrupt handlers used by the application. +// +//***************************************************************************** +extern void xPortPendSVHandler(void); +extern void vPortSVCHandler(void); +extern void xPortSysTickHandler(void); + +//***************************************************************************** +// +// The entry point for the application startup code. +// +//***************************************************************************** +extern void __iar_program_start(void); + +//***************************************************************************** +// +// Reserve space for the system stack. +// +//***************************************************************************** +static unsigned long pulStack[128] @ ".noinit"; + +//***************************************************************************** +// +// A union that describes the entries of the vector table. The union is needed +// since the first entry is the stack pointer and the remainder are function +// pointers. +// +//***************************************************************************** +typedef union +{ + void (*pfnHandler)(void); + unsigned long ulPtr; +} +uVectorEntry; + +//***************************************************************************** +// +// The vector table. Note that the proper constructs must be placed on this to +// ensure that it ends up at physical address 0x0000.0000. +// +//***************************************************************************** +__root const uVectorEntry __vector_table[] @ ".intvec" = +{ + { .ulPtr = (unsigned long)pulStack + sizeof(pulStack) }, + // The initial stack pointer + ResetISR, // The reset handler + NmiSR, // The NMI handler + FaultISR, // The hard fault handler + IntDefaultHandler, // The MPU fault handler + IntDefaultHandler, // The bus fault handler + IntDefaultHandler, // The usage fault handler + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + vPortSVCHandler, // SVCall handler + IntDefaultHandler, // Debug monitor handler + 0, // Reserved + xPortPendSVHandler, // The PendSV handler + xPortSysTickHandler, // The SysTick handler + IntDefaultHandler, // GPIO Port A + IntDefaultHandler, // GPIO Port B + IntDefaultHandler, // GPIO Port C + IntDefaultHandler, // GPIO Port D + IntDefaultHandler, // GPIO Port E + IntDefaultHandler, // UART0 Rx and Tx + IntDefaultHandler, // UART1 Rx and Tx + IntDefaultHandler, // SSI0 Rx and Tx + IntDefaultHandler, // I2C0 Master and Slave + IntDefaultHandler, // PWM Fault + IntDefaultHandler, // PWM Generator 0 + IntDefaultHandler, // PWM Generator 1 + IntDefaultHandler, // PWM Generator 2 + IntDefaultHandler, // Quadrature Encoder 0 + IntDefaultHandler, // ADC Sequence 0 + IntDefaultHandler, // ADC Sequence 1 + IntDefaultHandler, // ADC Sequence 2 + IntDefaultHandler, // ADC Sequence 3 + IntDefaultHandler, // Watchdog timer + IntDefaultHandler, // Timer 0 subtimer A + IntDefaultHandler, // Timer 0 subtimer B + IntDefaultHandler, // Timer 1 subtimer A + IntDefaultHandler, // Timer 1 subtimer B + IntDefaultHandler, // Timer 2 subtimer A + IntDefaultHandler, // Timer 2 subtimer B + IntDefaultHandler, // Analog Comparator 0 + IntDefaultHandler, // Analog Comparator 1 + IntDefaultHandler, // Analog Comparator 2 + IntDefaultHandler, // System Control (PLL, OSC, BO) + IntDefaultHandler, // FLASH Control + IntDefaultHandler, // GPIO Port F + IntDefaultHandler, // GPIO Port G + IntDefaultHandler, // GPIO Port H + IntDefaultHandler, // UART2 Rx and Tx + IntDefaultHandler, // SSI1 Rx and Tx + IntDefaultHandler, // Timer 3 subtimer A + IntDefaultHandler, // Timer 3 subtimer B + IntDefaultHandler, // I2C1 Master and Slave + IntDefaultHandler, // Quadrature Encoder 1 + IntDefaultHandler, // CAN0 + IntDefaultHandler, // CAN1 + IntDefaultHandler, // CAN2 + IntDefaultHandler, // Ethernet + IntDefaultHandler, // Hibernate + IntDefaultHandler, // USB0 + IntDefaultHandler, // PWM Generator 3 + IntDefaultHandler, // uDMA Software Transfer + IntDefaultHandler, // uDMA Error + IntDefaultHandler, // ADC1 Sequence 0 + IntDefaultHandler, // ADC1 Sequence 1 + IntDefaultHandler, // ADC1 Sequence 2 + IntDefaultHandler, // ADC1 Sequence 3 + IntDefaultHandler, // I2S0 + IntDefaultHandler, // External Bus Interface 0 + IntDefaultHandler, // GPIO Port J + IntDefaultHandler, // GPIO Port K + IntDefaultHandler, // GPIO Port L + IntDefaultHandler, // SSI2 Rx and Tx + IntDefaultHandler, // SSI3 Rx and Tx + IntDefaultHandler, // UART3 Rx and Tx + IntDefaultHandler, // UART4 Rx and Tx + IntDefaultHandler, // UART5 Rx and Tx + IntDefaultHandler, // UART6 Rx and Tx + IntDefaultHandler, // UART7 Rx and Tx + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // I2C2 Master and Slave + IntDefaultHandler, // I2C3 Master and Slave + IntDefaultHandler, // Timer 4 subtimer A + IntDefaultHandler, // Timer 4 subtimer B + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // Timer 5 subtimer A + IntDefaultHandler, // Timer 5 subtimer B + IntDefaultHandler, // Wide Timer 0 subtimer A + IntDefaultHandler, // Wide Timer 0 subtimer B + IntDefaultHandler, // Wide Timer 1 subtimer A + IntDefaultHandler, // Wide Timer 1 subtimer B + IntDefaultHandler, // Wide Timer 2 subtimer A + IntDefaultHandler, // Wide Timer 2 subtimer B + IntDefaultHandler, // Wide Timer 3 subtimer A + IntDefaultHandler, // Wide Timer 3 subtimer B + IntDefaultHandler, // Wide Timer 4 subtimer A + IntDefaultHandler, // Wide Timer 4 subtimer B + IntDefaultHandler, // Wide Timer 5 subtimer A + IntDefaultHandler, // Wide Timer 5 subtimer B + IntDefaultHandler, // FPU + IntDefaultHandler, // PECI 0 + IntDefaultHandler, // LPC 0 + IntDefaultHandler, // I2C4 Master and Slave + IntDefaultHandler, // I2C5 Master and Slave + IntDefaultHandler, // GPIO Port M + IntDefaultHandler, // GPIO Port N + IntDefaultHandler, // Quadrature Encoder 2 + IntDefaultHandler, // Fan 0 + 0, // Reserved + IntDefaultHandler, // GPIO Port P (Summary or P0) + IntDefaultHandler, // GPIO Port P1 + IntDefaultHandler, // GPIO Port P2 + IntDefaultHandler, // GPIO Port P3 + IntDefaultHandler, // GPIO Port P4 + IntDefaultHandler, // GPIO Port P5 + IntDefaultHandler, // GPIO Port P6 + IntDefaultHandler, // GPIO Port P7 + IntDefaultHandler, // GPIO Port Q (Summary or Q0) + IntDefaultHandler, // GPIO Port Q1 + IntDefaultHandler, // GPIO Port Q2 + IntDefaultHandler, // GPIO Port Q3 + IntDefaultHandler, // GPIO Port Q4 + IntDefaultHandler, // GPIO Port Q5 + IntDefaultHandler, // GPIO Port Q6 + IntDefaultHandler, // GPIO Port Q7 + IntDefaultHandler, // GPIO Port R + IntDefaultHandler, // GPIO Port S + IntDefaultHandler, // PWM 1 Generator 0 + IntDefaultHandler, // PWM 1 Generator 1 + IntDefaultHandler, // PWM 1 Generator 2 + IntDefaultHandler, // PWM 1 Generator 3 + IntDefaultHandler // PWM 1 Fault +}; + +//***************************************************************************** +// +// This is the code that gets called when the processor first starts execution +// following a reset event. Only the absolutely necessary set is performed, +// after which the application supplied entry() routine is called. Any fancy +// actions (such as making decisions based on the reset cause register, and +// resetting the bits in that register) are left solely in the hands of the +// application. +// +//***************************************************************************** +void +ResetISR(void) +{ + // + // Enable the floating-point unit. This must be done here to handle the + // case where main() uses floating-point and the function prologue saves + // floating-point registers (which will fault if floating-point is not + // enabled). Any configuration of the floating-point unit using DriverLib + // APIs must be done here prior to the floating-point unit being enabled. + // + // Note that this does not use DriverLib since it might not be included in + // this project. + // + HWREG(NVIC_CPAC) = ((HWREG(NVIC_CPAC) & + ~(NVIC_CPAC_CP10_M | NVIC_CPAC_CP11_M)) | + NVIC_CPAC_CP10_FULL | NVIC_CPAC_CP11_FULL); + + // + // Call the application's entry point. + // + __iar_program_start(); +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a NMI. This +// simply enters an infinite loop, preserving the system state for examination +// by a debugger. +// +//***************************************************************************** +static void +NmiSR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a fault +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +FaultISR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives an unexpected +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +IntDefaultHandler(void) +{ + // + // Go into an infinite loop. + // + while(1) + { + } +} diff --git a/boards/ek-lm4f120xl/freertos_demo/startup_gcc.c b/boards/ek-lm4f120xl/freertos_demo/startup_gcc.c new file mode 100644 index 0000000..45b3c58 --- /dev/null +++ b/boards/ek-lm4f120xl/freertos_demo/startup_gcc.c @@ -0,0 +1,350 @@ +//***************************************************************************** +// +// startup_gcc.c - Startup code for use with GNU tools. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +#include "inc/hw_nvic.h" +#include "inc/hw_types.h" + +//***************************************************************************** +// +// Forward declaration of the default fault handlers. +// +//***************************************************************************** +void ResetISR(void); +static void NmiSR(void); +static void FaultISR(void); +static void IntDefaultHandler(void); + +//***************************************************************************** +// +// External declarations for the interrupt handlers used by the application. +// +//***************************************************************************** +extern void xPortPendSVHandler(void); +extern void vPortSVCHandler(void); +extern void xPortSysTickHandler(void); + +//***************************************************************************** +// +// The entry point for the application. +// +//***************************************************************************** +extern int main(void); + +//***************************************************************************** +// +// Reserve space for the system stack. +// +//***************************************************************************** +static unsigned long pulStack[128]; + +//***************************************************************************** +// +// The vector table. Note that the proper constructs must be placed on this to +// ensure that it ends up at physical address 0x0000.0000. +// +//***************************************************************************** +__attribute__ ((section(".isr_vector"))) +void (* const g_pfnVectors[])(void) = +{ + (void (*)(void))((unsigned long)pulStack + sizeof(pulStack)), + // The initial stack pointer + ResetISR, // The reset handler + NmiSR, // The NMI handler + FaultISR, // The hard fault handler + IntDefaultHandler, // The MPU fault handler + IntDefaultHandler, // The bus fault handler + IntDefaultHandler, // The usage fault handler + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + vPortSVCHandler, // SVCall handler + IntDefaultHandler, // Debug monitor handler + 0, // Reserved + xPortPendSVHandler, // The PendSV handler + xPortSysTickHandler, // The SysTick handler + IntDefaultHandler, // GPIO Port A + IntDefaultHandler, // GPIO Port B + IntDefaultHandler, // GPIO Port C + IntDefaultHandler, // GPIO Port D + IntDefaultHandler, // GPIO Port E + IntDefaultHandler, // UART0 Rx and Tx + IntDefaultHandler, // UART1 Rx and Tx + IntDefaultHandler, // SSI0 Rx and Tx + IntDefaultHandler, // I2C0 Master and Slave + IntDefaultHandler, // PWM Fault + IntDefaultHandler, // PWM Generator 0 + IntDefaultHandler, // PWM Generator 1 + IntDefaultHandler, // PWM Generator 2 + IntDefaultHandler, // Quadrature Encoder 0 + IntDefaultHandler, // ADC Sequence 0 + IntDefaultHandler, // ADC Sequence 1 + IntDefaultHandler, // ADC Sequence 2 + IntDefaultHandler, // ADC Sequence 3 + IntDefaultHandler, // Watchdog timer + IntDefaultHandler, // Timer 0 subtimer A + IntDefaultHandler, // Timer 0 subtimer B + IntDefaultHandler, // Timer 1 subtimer A + IntDefaultHandler, // Timer 1 subtimer B + IntDefaultHandler, // Timer 2 subtimer A + IntDefaultHandler, // Timer 2 subtimer B + IntDefaultHandler, // Analog Comparator 0 + IntDefaultHandler, // Analog Comparator 1 + IntDefaultHandler, // Analog Comparator 2 + IntDefaultHandler, // System Control (PLL, OSC, BO) + IntDefaultHandler, // FLASH Control + IntDefaultHandler, // GPIO Port F + IntDefaultHandler, // GPIO Port G + IntDefaultHandler, // GPIO Port H + IntDefaultHandler, // UART2 Rx and Tx + IntDefaultHandler, // SSI1 Rx and Tx + IntDefaultHandler, // Timer 3 subtimer A + IntDefaultHandler, // Timer 3 subtimer B + IntDefaultHandler, // I2C1 Master and Slave + IntDefaultHandler, // Quadrature Encoder 1 + IntDefaultHandler, // CAN0 + IntDefaultHandler, // CAN1 + IntDefaultHandler, // CAN2 + IntDefaultHandler, // Ethernet + IntDefaultHandler, // Hibernate + IntDefaultHandler, // USB0 + IntDefaultHandler, // PWM Generator 3 + IntDefaultHandler, // uDMA Software Transfer + IntDefaultHandler, // uDMA Error + IntDefaultHandler, // ADC1 Sequence 0 + IntDefaultHandler, // ADC1 Sequence 1 + IntDefaultHandler, // ADC1 Sequence 2 + IntDefaultHandler, // ADC1 Sequence 3 + IntDefaultHandler, // I2S0 + IntDefaultHandler, // External Bus Interface 0 + IntDefaultHandler, // GPIO Port J + IntDefaultHandler, // GPIO Port K + IntDefaultHandler, // GPIO Port L + IntDefaultHandler, // SSI2 Rx and Tx + IntDefaultHandler, // SSI3 Rx and Tx + IntDefaultHandler, // UART3 Rx and Tx + IntDefaultHandler, // UART4 Rx and Tx + IntDefaultHandler, // UART5 Rx and Tx + IntDefaultHandler, // UART6 Rx and Tx + IntDefaultHandler, // UART7 Rx and Tx + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // I2C2 Master and Slave + IntDefaultHandler, // I2C3 Master and Slave + IntDefaultHandler, // Timer 4 subtimer A + IntDefaultHandler, // Timer 4 subtimer B + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // Timer 5 subtimer A + IntDefaultHandler, // Timer 5 subtimer B + IntDefaultHandler, // Wide Timer 0 subtimer A + IntDefaultHandler, // Wide Timer 0 subtimer B + IntDefaultHandler, // Wide Timer 1 subtimer A + IntDefaultHandler, // Wide Timer 1 subtimer B + IntDefaultHandler, // Wide Timer 2 subtimer A + IntDefaultHandler, // Wide Timer 2 subtimer B + IntDefaultHandler, // Wide Timer 3 subtimer A + IntDefaultHandler, // Wide Timer 3 subtimer B + IntDefaultHandler, // Wide Timer 4 subtimer A + IntDefaultHandler, // Wide Timer 4 subtimer B + IntDefaultHandler, // Wide Timer 5 subtimer A + IntDefaultHandler, // Wide Timer 5 subtimer B + IntDefaultHandler, // FPU + IntDefaultHandler, // PECI 0 + IntDefaultHandler, // LPC 0 + IntDefaultHandler, // I2C4 Master and Slave + IntDefaultHandler, // I2C5 Master and Slave + IntDefaultHandler, // GPIO Port M + IntDefaultHandler, // GPIO Port N + IntDefaultHandler, // Quadrature Encoder 2 + IntDefaultHandler, // Fan 0 + 0, // Reserved + IntDefaultHandler, // GPIO Port P (Summary or P0) + IntDefaultHandler, // GPIO Port P1 + IntDefaultHandler, // GPIO Port P2 + IntDefaultHandler, // GPIO Port P3 + IntDefaultHandler, // GPIO Port P4 + IntDefaultHandler, // GPIO Port P5 + IntDefaultHandler, // GPIO Port P6 + IntDefaultHandler, // GPIO Port P7 + IntDefaultHandler, // GPIO Port Q (Summary or Q0) + IntDefaultHandler, // GPIO Port Q1 + IntDefaultHandler, // GPIO Port Q2 + IntDefaultHandler, // GPIO Port Q3 + IntDefaultHandler, // GPIO Port Q4 + IntDefaultHandler, // GPIO Port Q5 + IntDefaultHandler, // GPIO Port Q6 + IntDefaultHandler, // GPIO Port Q7 + IntDefaultHandler, // GPIO Port R + IntDefaultHandler, // GPIO Port S + IntDefaultHandler, // PWM 1 Generator 0 + IntDefaultHandler, // PWM 1 Generator 1 + IntDefaultHandler, // PWM 1 Generator 2 + IntDefaultHandler, // PWM 1 Generator 3 + IntDefaultHandler // PWM 1 Fault +}; + +//***************************************************************************** +// +// The following are constructs created by the linker, indicating where the +// the "data" and "bss" segments reside in memory. The initializers for the +// for the "data" segment resides immediately following the "text" segment. +// +//***************************************************************************** +extern unsigned long _etext; +extern unsigned long _data; +extern unsigned long _edata; +extern unsigned long _bss; +extern unsigned long _ebss; + +//***************************************************************************** +// +// This is the code that gets called when the processor first starts execution +// following a reset event. Only the absolutely necessary set is performed, +// after which the application supplied entry() routine is called. Any fancy +// actions (such as making decisions based on the reset cause register, and +// resetting the bits in that register) are left solely in the hands of the +// application. +// +//***************************************************************************** +void +ResetISR(void) +{ + unsigned long *pulSrc, *pulDest; + + // + // Copy the data segment initializers from flash to SRAM. + // + pulSrc = &_etext; + for(pulDest = &_data; pulDest < &_edata; ) + { + *pulDest++ = *pulSrc++; + } + + // + // Zero fill the bss segment. + // + __asm(" ldr r0, =_bss\n" + " ldr r1, =_ebss\n" + " mov r2, #0\n" + " .thumb_func\n" + "zero_loop:\n" + " cmp r0, r1\n" + " it lt\n" + " strlt r2, [r0], #4\n" + " blt zero_loop"); + + // + // Enable the floating-point unit. This must be done here to handle the + // case where main() uses floating-point and the function prologue saves + // floating-point registers (which will fault if floating-point is not + // enabled). Any configuration of the floating-point unit using DriverLib + // APIs must be done here prior to the floating-point unit being enabled. + // + // Note that this does not use DriverLib since it might not be included in + // this project. + // + HWREG(NVIC_CPAC) = ((HWREG(NVIC_CPAC) & + ~(NVIC_CPAC_CP10_M | NVIC_CPAC_CP11_M)) | + NVIC_CPAC_CP10_FULL | NVIC_CPAC_CP11_FULL); + + // + // Call the application's entry point. + // + main(); +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a NMI. This +// simply enters an infinite loop, preserving the system state for examination +// by a debugger. +// +//***************************************************************************** +static void +NmiSR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a fault +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +FaultISR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives an unexpected +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +IntDefaultHandler(void) +{ + // + // Go into an infinite loop. + // + while(1) + { + } +} diff --git a/boards/ek-lm4f120xl/freertos_demo/startup_rvmdk.S b/boards/ek-lm4f120xl/freertos_demo/startup_rvmdk.S new file mode 100644 index 0000000..8173da5 --- /dev/null +++ b/boards/ek-lm4f120xl/freertos_demo/startup_rvmdk.S @@ -0,0 +1,360 @@ +; <<< Use Configuration Wizard in Context Menu >>> +;****************************************************************************** +; +; startup_rvmdk.S - Startup code for use with Keil's uVision. +; +; Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +; Software License Agreement +; +; Texas Instruments (TI) is supplying this software for use solely and +; exclusively on TI's microcontroller products. The software is owned by +; TI and/or its suppliers, and is protected under applicable copyright +; laws. You may not combine this software with "viral" open-source +; software in order to form a larger program. +; +; THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +; NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +; NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +; A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +; CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +; DAMAGES, FOR ANY REASON WHATSOEVER. +; +; This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +; +;****************************************************************************** + +;****************************************************************************** +; +; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +; +;****************************************************************************** +Stack EQU 0x00000200 + +;****************************************************************************** +; +; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> +; +;****************************************************************************** +Heap EQU 0x00000000 + +;****************************************************************************** +; +; Allocate space for the stack. +; +;****************************************************************************** + AREA STACK, NOINIT, READWRITE, ALIGN=3 +StackMem + SPACE Stack +__initial_sp + +;****************************************************************************** +; +; Allocate space for the heap. +; +;****************************************************************************** + AREA HEAP, NOINIT, READWRITE, ALIGN=3 +__heap_base +HeapMem + SPACE Heap +__heap_limit + +;****************************************************************************** +; +; Indicate that the code in this file preserves 8-byte alignment of the stack. +; +;****************************************************************************** + PRESERVE8 + +;****************************************************************************** +; +; Place code into the reset code section. +; +;****************************************************************************** + AREA RESET, CODE, READONLY + THUMB + +;****************************************************************************** +; +; External declarations for the interrupt handlers used by the application. +; +;****************************************************************************** + EXTERN xPortPendSVHandler + EXTERN vPortSVCHandler + EXTERN xPortSysTickHandler + +;****************************************************************************** +; +; The vector table. +; +;****************************************************************************** + EXPORT __Vectors +__Vectors + DCD StackMem + Stack ; Top of Stack + DCD Reset_Handler ; Reset Handler + DCD NmiSR ; NMI Handler + DCD FaultISR ; Hard Fault Handler + DCD IntDefaultHandler ; The MPU fault handler + DCD IntDefaultHandler ; The bus fault handler + DCD IntDefaultHandler ; The usage fault handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD vPortSVCHandler ; SVCall handler + DCD IntDefaultHandler ; Debug monitor handler + DCD 0 ; Reserved + DCD xPortPendSVHandler ; The PendSV handler + DCD xPortSysTickHandler ; The SysTick handler + DCD IntDefaultHandler ; GPIO Port A + DCD IntDefaultHandler ; GPIO Port B + DCD IntDefaultHandler ; GPIO Port C + DCD IntDefaultHandler ; GPIO Port D + DCD IntDefaultHandler ; GPIO Port E + DCD IntDefaultHandler ; UART0 Rx and Tx + DCD IntDefaultHandler ; UART1 Rx and Tx + DCD IntDefaultHandler ; SSI0 Rx and Tx + DCD IntDefaultHandler ; I2C0 Master and Slave + DCD IntDefaultHandler ; PWM Fault + DCD IntDefaultHandler ; PWM Generator 0 + DCD IntDefaultHandler ; PWM Generator 1 + DCD IntDefaultHandler ; PWM Generator 2 + DCD IntDefaultHandler ; Quadrature Encoder 0 + DCD IntDefaultHandler ; ADC Sequence 0 + DCD IntDefaultHandler ; ADC Sequence 1 + DCD IntDefaultHandler ; ADC Sequence 2 + DCD IntDefaultHandler ; ADC Sequence 3 + DCD IntDefaultHandler ; Watchdog timer + DCD IntDefaultHandler ; Timer 0 subtimer A + DCD IntDefaultHandler ; Timer 0 subtimer B + DCD IntDefaultHandler ; Timer 1 subtimer A + DCD IntDefaultHandler ; Timer 1 subtimer B + DCD IntDefaultHandler ; Timer 2 subtimer A + DCD IntDefaultHandler ; Timer 2 subtimer B + DCD IntDefaultHandler ; Analog Comparator 0 + DCD IntDefaultHandler ; Analog Comparator 1 + DCD IntDefaultHandler ; Analog Comparator 2 + DCD IntDefaultHandler ; System Control (PLL, OSC, BO) + DCD IntDefaultHandler ; FLASH Control + DCD IntDefaultHandler ; GPIO Port F + DCD IntDefaultHandler ; GPIO Port G + DCD IntDefaultHandler ; GPIO Port H + DCD IntDefaultHandler ; UART2 Rx and Tx + DCD IntDefaultHandler ; SSI1 Rx and Tx + DCD IntDefaultHandler ; Timer 3 subtimer A + DCD IntDefaultHandler ; Timer 3 subtimer B + DCD IntDefaultHandler ; I2C1 Master and Slave + DCD IntDefaultHandler ; Quadrature Encoder 1 + DCD IntDefaultHandler ; CAN0 + DCD IntDefaultHandler ; CAN1 + DCD IntDefaultHandler ; CAN2 + DCD IntDefaultHandler ; Ethernet + DCD IntDefaultHandler ; Hibernate + DCD IntDefaultHandler ; USB0 + DCD IntDefaultHandler ; PWM Generator 3 + DCD IntDefaultHandler ; uDMA Software Transfer + DCD IntDefaultHandler ; uDMA Error + DCD IntDefaultHandler ; ADC1 Sequence 0 + DCD IntDefaultHandler ; ADC1 Sequence 1 + DCD IntDefaultHandler ; ADC1 Sequence 2 + DCD IntDefaultHandler ; ADC1 Sequence 3 + DCD IntDefaultHandler ; I2S0 + DCD IntDefaultHandler ; External Bus Interface 0 + DCD IntDefaultHandler ; GPIO Port J + DCD IntDefaultHandler ; GPIO Port K + DCD IntDefaultHandler ; GPIO Port L + DCD IntDefaultHandler ; SSI2 Rx and Tx + DCD IntDefaultHandler ; SSI3 Rx and Tx + DCD IntDefaultHandler ; UART3 Rx and Tx + DCD IntDefaultHandler ; UART4 Rx and Tx + DCD IntDefaultHandler ; UART5 Rx and Tx + DCD IntDefaultHandler ; UART6 Rx and Tx + DCD IntDefaultHandler ; UART7 Rx and Tx + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD IntDefaultHandler ; I2C2 Master and Slave + DCD IntDefaultHandler ; I2C3 Master and Slave + DCD IntDefaultHandler ; Timer 4 subtimer A + DCD IntDefaultHandler ; Timer 4 subtimer B + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD IntDefaultHandler ; Timer 5 subtimer A + DCD IntDefaultHandler ; Timer 5 subtimer B + DCD IntDefaultHandler ; Wide Timer 0 subtimer A + DCD IntDefaultHandler ; Wide Timer 0 subtimer B + DCD IntDefaultHandler ; Wide Timer 1 subtimer A + DCD IntDefaultHandler ; Wide Timer 1 subtimer B + DCD IntDefaultHandler ; Wide Timer 2 subtimer A + DCD IntDefaultHandler ; Wide Timer 2 subtimer B + DCD IntDefaultHandler ; Wide Timer 3 subtimer A + DCD IntDefaultHandler ; Wide Timer 3 subtimer B + DCD IntDefaultHandler ; Wide Timer 4 subtimer A + DCD IntDefaultHandler ; Wide Timer 4 subtimer B + DCD IntDefaultHandler ; Wide Timer 5 subtimer A + DCD IntDefaultHandler ; Wide Timer 5 subtimer B + DCD IntDefaultHandler ; FPU + DCD IntDefaultHandler ; PECI 0 + DCD IntDefaultHandler ; LPC 0 + DCD IntDefaultHandler ; I2C4 Master and Slave + DCD IntDefaultHandler ; I2C5 Master and Slave + DCD IntDefaultHandler ; GPIO Port M + DCD IntDefaultHandler ; GPIO Port N + DCD IntDefaultHandler ; Quadrature Encoder 2 + DCD IntDefaultHandler ; Fan 0 + DCD 0 ; Reserved + DCD IntDefaultHandler ; GPIO Port P (Summary or P0) + DCD IntDefaultHandler ; GPIO Port P1 + DCD IntDefaultHandler ; GPIO Port P2 + DCD IntDefaultHandler ; GPIO Port P3 + DCD IntDefaultHandler ; GPIO Port P4 + DCD IntDefaultHandler ; GPIO Port P5 + DCD IntDefaultHandler ; GPIO Port P6 + DCD IntDefaultHandler ; GPIO Port P7 + DCD IntDefaultHandler ; GPIO Port Q (Summary or Q0) + DCD IntDefaultHandler ; GPIO Port Q1 + DCD IntDefaultHandler ; GPIO Port Q2 + DCD IntDefaultHandler ; GPIO Port Q3 + DCD IntDefaultHandler ; GPIO Port Q4 + DCD IntDefaultHandler ; GPIO Port Q5 + DCD IntDefaultHandler ; GPIO Port Q6 + DCD IntDefaultHandler ; GPIO Port Q7 + DCD IntDefaultHandler ; GPIO Port R + DCD IntDefaultHandler ; GPIO Port S + DCD IntDefaultHandler ; PWM 1 Generator 0 + DCD IntDefaultHandler ; PWM 1 Generator 1 + DCD IntDefaultHandler ; PWM 1 Generator 2 + DCD IntDefaultHandler ; PWM 1 Generator 3 + DCD IntDefaultHandler ; PWM 1 Fault + +;****************************************************************************** +; +; This is the code that gets called when the processor first starts execution +; following a reset event. +; +;****************************************************************************** + EXPORT Reset_Handler +Reset_Handler + ; + ; Enable the floating-point unit. This must be done here to handle the + ; case where main() uses floating-point and the function prologue saves + ; floating-point registers (which will fault if floating-point is not + ; enabled). Any configuration of the floating-point unit using + ; DriverLib APIs must be done here prior to the floating-point unit + ; being enabled. + ; + ; Note that this does not use DriverLib since it might not be included + ; in this project. + ; + MOVW R0, #0xED88 + MOVT R0, #0xE000 + LDR R1, [R0] + ORR R1, #0x00F00000 + STR R1, [R0] + + ; + ; Call the C library enty point that handles startup. This will copy + ; the .data section initializers from flash to SRAM and zero fill the + ; .bss section. + ; + IMPORT __main + B __main + +;****************************************************************************** +; +; This is the code that gets called when the processor receives a NMI. This +; simply enters an infinite loop, preserving the system state for examination +; by a debugger. +; +;****************************************************************************** +NmiSR + B NmiSR + +;****************************************************************************** +; +; This is the code that gets called when the processor receives a fault +; interrupt. This simply enters an infinite loop, preserving the system state +; for examination by a debugger. +; +;****************************************************************************** +FaultISR + B FaultISR + +;****************************************************************************** +; +; This is the code that gets called when the processor receives an unexpected +; interrupt. This simply enters an infinite loop, preserving the system state +; for examination by a debugger. +; +;****************************************************************************** +IntDefaultHandler + B IntDefaultHandler + +;****************************************************************************** +; +; Make sure the end of this section is aligned. +; +;****************************************************************************** + ALIGN + +;****************************************************************************** +; +; Some code in the normal code section for initializing the heap and stack. +; +;****************************************************************************** + AREA |.text|, CODE, READONLY + +;****************************************************************************** +; +; The function expected of the C library startup code for defining the stack +; and heap memory locations. For the C library version of the startup code, +; provide this function so that the C library initialization code can find out +; the location of the stack and heap. +; +;****************************************************************************** + IF :DEF: __MICROLIB + EXPORT __initial_sp + EXPORT __heap_base + EXPORT __heap_limit + ELSE + IMPORT __use_two_region_memory + EXPORT __user_initial_stackheap +__user_initial_stackheap + LDR R0, =HeapMem + LDR R1, =(StackMem + Stack) + LDR R2, =(HeapMem + Heap) + LDR R3, =StackMem + BX LR + ENDIF + +;****************************************************************************** +; +; Make sure the end of this section is aligned. +; +;****************************************************************************** + ALIGN + +;****************************************************************************** +; +; Tell the assembler that we're done. +; +;****************************************************************************** + END diff --git a/boards/ek-lm4f120xl/freertos_demo/startup_sourcerygxx.S b/boards/ek-lm4f120xl/freertos_demo/startup_sourcerygxx.S new file mode 100644 index 0000000..b720839 --- /dev/null +++ b/boards/ek-lm4f120xl/freertos_demo/startup_sourcerygxx.S @@ -0,0 +1,75 @@ +//***************************************************************************** +// +// startup_sourcerygxx.S - Startup code for Sourcery CodeBench. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + + .syntax unified + .thumb + +//***************************************************************************** +// +// Place this code into the .cs3.reset section so that it can be executed prior +// to the startup code in Sourcery CodeBench. +// +//***************************************************************************** + .section .cs3.reset,"x" + +//***************************************************************************** +// +// The reset handler, which overrides the one provided by CS3. +// +//***************************************************************************** + .globl __cs3_reset + .thumb_func +__cs3_reset: + // + // Enable the floating-point unit. This must be done here to handle the + // case where main() uses floating-point and the function prologue saves + // floating-point registers (which will fault if floating-point is not + // enabled). Any configuration of the floating-point unit using DriverLib + // APIs must be done here prior to the floating-point unit being enabled. + // + // Note that this does not use DriverLib since it might not be included in + // this project. + // + movw r0, #0xed88 + movt r0, #0xe000 + ldr r1, [r0] + orr r1, #0x00f00000 + str r1, [r0] + + // + // Branch to the normal CS3 startup code. + // + .extern __cs3_reset_ekc_lm4f232 + ldr r0, =__cs3_reset_ekc_lm4f232 + bx r0 + + // + // Place the literal pool here. + // + .ltorg + + // + // The end of the file. + // + .end diff --git a/boards/ek-lm4f120xl/freertos_demo/switch_task.c b/boards/ek-lm4f120xl/freertos_demo/switch_task.c new file mode 100644 index 0000000..3665af4 --- /dev/null +++ b/boards/ek-lm4f120xl/freertos_demo/switch_task.c @@ -0,0 +1,175 @@ +//***************************************************************************** +// +// switch_task.c - A simple switch task to process the buttons. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +#include "inc/hw_memmap.h" +#include "inc/hw_types.h" +#include "inc/hw_gpio.h" +#include "driverlib/sysctl.h" +#include "driverlib/gpio.h" +#include "driverlib/rom.h" +#include "drivers/buttons.h" +#include "utils/uartstdio.h" +#include "switch_task.h" +#include "led_task.h" +#include "priorities.h" +#include "FreeRTOS.h" +#include "task.h" +#include "queue.h" +#include "semphr.h" + +//***************************************************************************** +// +// The stack size for the display task. +// +//***************************************************************************** +#define SWITCHTASKSTACKSIZE 128 // Stack size in words + +extern xQueueHandle g_pLEDQueue; +extern xSemaphoreHandle g_pUARTSemaphore; + +//***************************************************************************** +// +// This task reads the buttons' state and passes this information to LEDTask. +// +//***************************************************************************** +static void +SwitchTask(void *pvParameters) +{ + portTickType ulLastTime; + unsigned long ulSwitchDelay = 25; + unsigned char ucCurButtonState, ucPrevButtonState; + unsigned char ucMessage; + + ucCurButtonState = ucPrevButtonState = 0; + + // + // Get the current tick count. + // + ulLastTime = xTaskGetTickCount(); + + // + // Loop forever. + // + while(1) + { + // + // Poll the debounced state of the buttons. + // + ucCurButtonState = ButtonsPoll(0, 0); + + // + // Check if previous debounced state is equal to the current state. + // + if(ucCurButtonState != ucPrevButtonState) + { + ucPrevButtonState = ucCurButtonState; + + // + // Check to make sure the change in state is due to button press + // and not due to button release. + // + if((ucCurButtonState & ALL_BUTTONS) != 0) + { + if((ucCurButtonState & ALL_BUTTONS) == LEFT_BUTTON) + { + ucMessage = LEFT_BUTTON; + + // + // Guard UART from concurrent access. + // + xSemaphoreTake(g_pUARTSemaphore, portMAX_DELAY); + UARTprintf("Left Button is pressed.\n"); + xSemaphoreGive(g_pUARTSemaphore); + } + else if((ucCurButtonState & ALL_BUTTONS) == RIGHT_BUTTON) + { + ucMessage = RIGHT_BUTTON; + + // + // Guard UART from concurrent access. + // + xSemaphoreTake(g_pUARTSemaphore, portMAX_DELAY); + UARTprintf("Right Button is pressed.\n"); + xSemaphoreGive(g_pUARTSemaphore); + } + + // + // Pass the value of the button pressed to LEDTask. + // + if(xQueueSend(g_pLEDQueue, &ucMessage, portMAX_DELAY) != + pdPASS) + { + // + // Error. The queue should never be full. If so print the + // error message on UART and wait for ever. + // + UARTprintf("\nQueue full. This should never happen.\n"); + while(1) + { + } + } + } + } + + // + // Wait for the required amount of time to check back. + // + vTaskDelayUntil(&ulLastTime, ulSwitchDelay / portTICK_RATE_MS); + } +} + +//***************************************************************************** +// +// Initializes the switch task. +// +//***************************************************************************** +unsigned long +SwitchTaskInit(void) +{ + // + // Unlock the GPIO LOCK register for Right button to work. + // + HWREG(GPIO_PORTF_BASE + GPIO_O_LOCK) = GPIO_LOCK_KEY_DD; + HWREG(GPIO_PORTF_BASE + GPIO_O_CR) = 0xFF; + + // + // Initialize the buttons + // + ButtonsInit(); + + // + // Create the switch task. + // + if(xTaskCreate(SwitchTask, (signed portCHAR *)"Switch", + SWITCHTASKSTACKSIZE, NULL, tskIDLE_PRIORITY + + PRIORITY_SWITCH_TASK, NULL) != pdTRUE) + { + return(1); + } + + // + // Success. + // + return(0); +} diff --git a/boards/ek-lm4f120xl/freertos_demo/switch_task.h b/boards/ek-lm4f120xl/freertos_demo/switch_task.h new file mode 100644 index 0000000..5f07b4c --- /dev/null +++ b/boards/ek-lm4f120xl/freertos_demo/switch_task.h @@ -0,0 +1,35 @@ +//***************************************************************************** +// +// switch_task.h - Prototypes for the switch task. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +#ifndef __SWITCH_TASK_H__ +#define __SWITCH_TASK_H__ + +//***************************************************************************** +// +// Prototypes for the switch task. +// +//***************************************************************************** +extern unsigned long SwitchTaskInit(void); + +#endif // __SWITCH_TASK_H__ diff --git a/boards/ek-lm4f120xl/gpio_jtag/Makefile b/boards/ek-lm4f120xl/gpio_jtag/Makefile new file mode 100644 index 0000000..e594c3c --- /dev/null +++ b/boards/ek-lm4f120xl/gpio_jtag/Makefile @@ -0,0 +1,93 @@ +#****************************************************************************** +# +# Makefile - Rules for building the gpio_jtag example. +# +# Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +# Software License Agreement +# +# Texas Instruments (TI) is supplying this software for use solely and +# exclusively on TI's microcontroller products. The software is owned by +# TI and/or its suppliers, and is protected under applicable copyright +# laws. You may not combine this software with "viral" open-source +# software in order to form a larger program. +# +# THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +# NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +# NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +# A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +# CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +# DAMAGES, FOR ANY REASON WHATSOEVER. +# +# This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +# +#****************************************************************************** + +# +# Defines the part type that this project uses. +# +PART=LM4F120H5QR + +# +# Set the processor variant. +# +VARIANT=cm4f + +# +# The base directory for StellarisWare. +# +ROOT=../../.. + +# +# Include the common make definitions. +# +include ${ROOT}/makedefs + +# +# Where to find source files that do not live in this directory. +# +VPATH=../drivers +VPATH+=../../../utils + +# +# Where to find header files that do not live in the source directory. +# +IPATH=.. +IPATH+=../../.. + +# +# The default rule, which causes the gpio_jtag example to be built. +# +all: ${COMPILER} +all: ${COMPILER}/gpio_jtag.axf + +# +# The rule to clean out all the build products. +# +clean: + @rm -rf ${COMPILER} ${wildcard *~} + +# +# The rule to create the target directory. +# +${COMPILER}: + @mkdir -p ${COMPILER} + +# +# Rules for building the gpio_jtag example. +# +${COMPILER}/gpio_jtag.axf: ${COMPILER}/buttons.o +${COMPILER}/gpio_jtag.axf: ${COMPILER}/gpio_jtag.o +${COMPILER}/gpio_jtag.axf: ${COMPILER}/startup_${COMPILER}.o +${COMPILER}/gpio_jtag.axf: ${COMPILER}/uartstdio.o +${COMPILER}/gpio_jtag.axf: ${ROOT}/driverlib/${COMPILER}-cm4f/libdriver-cm4f.a +${COMPILER}/gpio_jtag.axf: gpio_jtag.ld +SCATTERgcc_gpio_jtag=gpio_jtag.ld +ENTRY_gpio_jtag=ResetISR +CFLAGSgcc=-DTARGET_IS_BLIZZARD_RA1 + +# +# Include the automatically generated dependency files. +# +ifneq (${MAKECMDGOALS},clean) +-include ${wildcard ${COMPILER}/*.d} __dummy__ +endif diff --git a/boards/ek-lm4f120xl/gpio_jtag/ccs/.ccsimportspec b/boards/ek-lm4f120xl/gpio_jtag/ccs/.ccsimportspec new file mode 100644 index 0000000..005f812 --- /dev/null +++ b/boards/ek-lm4f120xl/gpio_jtag/ccs/.ccsimportspec @@ -0,0 +1,8 @@ + + + + + + + + diff --git a/boards/ek-lm4f120xl/gpio_jtag/ccs/.ccsproject b/boards/ek-lm4f120xl/gpio_jtag/ccs/.ccsproject new file mode 100644 index 0000000..56793f4 --- /dev/null +++ b/boards/ek-lm4f120xl/gpio_jtag/ccs/.ccsproject @@ -0,0 +1,12 @@ + + + + + + + + + + + + diff --git a/boards/ek-lm4f120xl/gpio_jtag/ccs/.cproject b/boards/ek-lm4f120xl/gpio_jtag/ccs/.cproject new file mode 100644 index 0000000..7f4dee2 --- /dev/null +++ b/boards/ek-lm4f120xl/gpio_jtag/ccs/.cproject @@ -0,0 +1,193 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/boards/ek-lm4f120xl/gpio_jtag/ccs/.project b/boards/ek-lm4f120xl/gpio_jtag/ccs/.project new file mode 100644 index 0000000..6f89850 --- /dev/null +++ b/boards/ek-lm4f120xl/gpio_jtag/ccs/.project @@ -0,0 +1,116 @@ + + + gpio_jtag + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + + + ?name? + + + + org.eclipse.cdt.make.core.append_environment + true + + + org.eclipse.cdt.make.core.autoBuildTarget + all + + + org.eclipse.cdt.make.core.buildArguments + -k + + + org.eclipse.cdt.make.core.buildCommand + ${CCS_UTILS_DIR}/bin/gmake + + + org.eclipse.cdt.make.core.buildLocation + ${BuildDirectory} + + + org.eclipse.cdt.make.core.cleanBuildTarget + clean + + + org.eclipse.cdt.make.core.contents + org.eclipse.cdt.make.core.activeConfigSettings + + + org.eclipse.cdt.make.core.enableAutoBuild + true + + + org.eclipse.cdt.make.core.enableCleanBuild + true + + + org.eclipse.cdt.make.core.enableFullBuild + true + + + org.eclipse.cdt.make.core.fullBuildTarget + all + + + org.eclipse.cdt.make.core.stopOnError + false + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + true + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + com.ti.ccstudio.core.ccsNature + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.core.ccnature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + gpio_jtag.c + 1 + SW_ROOT/boards/ek-lm4f120xl/gpio_jtag/gpio_jtag.c + + + gpio_jtag_ccs.cmd + 1 + SW_ROOT/boards/ek-lm4f120xl/gpio_jtag/gpio_jtag_ccs.cmd + + + startup_ccs.c + 1 + SW_ROOT/boards/ek-lm4f120xl/gpio_jtag/startup_ccs.c + + + drivers/buttons.c + 1 + SW_ROOT/boards/ek-lm4f120xl/drivers/buttons.c + + + utils/uartstdio.c + 1 + SW_ROOT/utils/uartstdio.c + + + + + SW_ROOT + $%7BPARENT-4-PROJECT_LOC%7D + + + diff --git a/boards/ek-lm4f120xl/gpio_jtag/ccs/.settings/org.eclipse.cdt.codan.core.prefs b/boards/ek-lm4f120xl/gpio_jtag/ccs/.settings/org.eclipse.cdt.codan.core.prefs new file mode 100644 index 0000000..98b6350 --- /dev/null +++ b/boards/ek-lm4f120xl/gpio_jtag/ccs/.settings/org.eclipse.cdt.codan.core.prefs @@ -0,0 +1,3 @@ +eclipse.preferences.version=1 +inEditor=false +onBuild=false diff --git a/boards/ek-lm4f120xl/gpio_jtag/ccs/Debug/gpio_jtag.bin b/boards/ek-lm4f120xl/gpio_jtag/ccs/Debug/gpio_jtag.bin new file mode 100644 index 0000000..607420b Binary files /dev/null and b/boards/ek-lm4f120xl/gpio_jtag/ccs/Debug/gpio_jtag.bin differ diff --git a/boards/ek-lm4f120xl/gpio_jtag/ccs/Debug/gpio_jtag.out b/boards/ek-lm4f120xl/gpio_jtag/ccs/Debug/gpio_jtag.out new file mode 100644 index 0000000..b3049aa Binary files /dev/null and b/boards/ek-lm4f120xl/gpio_jtag/ccs/Debug/gpio_jtag.out differ diff --git a/boards/ek-lm4f120xl/gpio_jtag/ccs/macros.ini_initial b/boards/ek-lm4f120xl/gpio_jtag/ccs/macros.ini_initial new file mode 100644 index 0000000..588017d --- /dev/null +++ b/boards/ek-lm4f120xl/gpio_jtag/ccs/macros.ini_initial @@ -0,0 +1 @@ +SW_ROOT = ../../../.. diff --git a/boards/ek-lm4f120xl/gpio_jtag/ccs/target_config.ccxml b/boards/ek-lm4f120xl/gpio_jtag/ccs/target_config.ccxml new file mode 100644 index 0000000..469eea0 --- /dev/null +++ b/boards/ek-lm4f120xl/gpio_jtag/ccs/target_config.ccxml @@ -0,0 +1,13 @@ + + + + + + + + + + + + + diff --git a/boards/ek-lm4f120xl/gpio_jtag/ewarm/Exe/gpio_jtag.bin b/boards/ek-lm4f120xl/gpio_jtag/ewarm/Exe/gpio_jtag.bin new file mode 100644 index 0000000..7be83d3 Binary files /dev/null and b/boards/ek-lm4f120xl/gpio_jtag/ewarm/Exe/gpio_jtag.bin differ diff --git a/boards/ek-lm4f120xl/gpio_jtag/ewarm/Exe/gpio_jtag.out b/boards/ek-lm4f120xl/gpio_jtag/ewarm/Exe/gpio_jtag.out new file mode 100644 index 0000000..ed012f3 Binary files /dev/null and b/boards/ek-lm4f120xl/gpio_jtag/ewarm/Exe/gpio_jtag.out differ diff --git a/boards/ek-lm4f120xl/gpio_jtag/gcc/gpio_jtag.axf b/boards/ek-lm4f120xl/gpio_jtag/gcc/gpio_jtag.axf new file mode 100644 index 0000000..789b431 Binary files /dev/null and b/boards/ek-lm4f120xl/gpio_jtag/gcc/gpio_jtag.axf differ diff --git a/boards/ek-lm4f120xl/gpio_jtag/gcc/gpio_jtag.bin b/boards/ek-lm4f120xl/gpio_jtag/gcc/gpio_jtag.bin new file mode 100644 index 0000000..ce2ddda Binary files /dev/null and b/boards/ek-lm4f120xl/gpio_jtag/gcc/gpio_jtag.bin differ diff --git a/boards/ek-lm4f120xl/gpio_jtag/gpio_jtag.c b/boards/ek-lm4f120xl/gpio_jtag/gpio_jtag.c new file mode 100644 index 0000000..9cd79a5 --- /dev/null +++ b/boards/ek-lm4f120xl/gpio_jtag/gpio_jtag.c @@ -0,0 +1,279 @@ +//***************************************************************************** +// +// gpio_jtag.c - Example to demonstrate recovering the JTAG interface. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +#include "inc/hw_gpio.h" +#include "inc/hw_ints.h" +#include "inc/hw_memmap.h" +#include "inc/hw_types.h" +#include "driverlib/debug.h" +#include "driverlib/fpu.h" +#include "driverlib/gpio.h" +#include "driverlib/interrupt.h" +#include "driverlib/pin_map.h" +#include "driverlib/rom.h" +#include "driverlib/sysctl.h" +#include "driverlib/systick.h" +#include "utils/uartstdio.h" +#include "drivers/buttons.h" + +//***************************************************************************** +// +//! \addtogroup example_list +//!

GPIO JTAG Recovery (gpio_jtag)

+//! +//! This example demonstrates changing the JTAG pins into GPIOs, along with a +//! mechanism to revert them to JTAG pins. When first run, the pins remain in +//! JTAG mode. Pressing the left button will toggle the pins between JTAG mode +//! and GPIO mode. Because there is no debouncing of the push button (either +//! in hardware or software), a button press will occasionally result in more +//! than one mode change. +//! +//! In this example, four pins (PC0, PC1, PC2, and PC3) are switched. +//! +//! UART0, connected to the ICDI virtual COM port and running at 115,200, +//! 8-N-1, is used to display messages from this application. +// +//***************************************************************************** + + +//***************************************************************************** +// +// The current mode of pins PC0, PC1, PC2, and PC3. When zero, the pins +// are in JTAG mode; when non-zero, the pins are in GPIO mode. +// +//***************************************************************************** +volatile unsigned long g_ulMode; + +//***************************************************************************** +// +// The error routine that is called if the driver library encounters an error. +// +//***************************************************************************** +#ifdef DEBUG +void +__error__(char *pcFilename, unsigned long ulLine) +{ +} +#endif + +//***************************************************************************** +// +// The interrupt handler for the PB4 pin interrupt. When triggered, this will +// toggle the JTAG pins between JTAG and GPIO mode. +// +//***************************************************************************** +void +SysTickIntHandler(void) +{ + unsigned char ucButtons; + unsigned char ucButtonsChanged; + + // + // Grab the current, debounced state of the buttons. + // + ucButtons = ButtonsPoll(&ucButtonsChanged, 0); + + // + // If the left button has been pressed, and was previously not pressed, + // start the process of changing the behavior of the JTAG pins. + // + if(BUTTON_PRESSED(LEFT_BUTTON, ucButtons, ucButtonsChanged)) + { + // + // Toggle the pin mode. + // + g_ulMode ^= 1; + + // + // See if the pins should be in JTAG or GPIO mode. + // + if(g_ulMode == 0) + { + // + // Change PC0-3 into hardware (i.e. JTAG) pins. + // + HWREG(GPIO_PORTC_BASE + GPIO_O_LOCK) = GPIO_LOCK_KEY_DD; + HWREG(GPIO_PORTC_BASE + GPIO_O_CR) = 0x01; + HWREG(GPIO_PORTC_BASE + GPIO_O_AFSEL) |= 0x01; + HWREG(GPIO_PORTC_BASE + GPIO_O_LOCK) = GPIO_LOCK_KEY_DD; + HWREG(GPIO_PORTC_BASE + GPIO_O_CR) = 0x02; + HWREG(GPIO_PORTC_BASE + GPIO_O_AFSEL) |= 0x02; + HWREG(GPIO_PORTC_BASE + GPIO_O_LOCK) = GPIO_LOCK_KEY_DD; + HWREG(GPIO_PORTC_BASE + GPIO_O_CR) = 0x04; + HWREG(GPIO_PORTC_BASE + GPIO_O_AFSEL) |= 0x04; + HWREG(GPIO_PORTC_BASE + GPIO_O_LOCK) = GPIO_LOCK_KEY_DD; + HWREG(GPIO_PORTC_BASE + GPIO_O_CR) = 0x08; + HWREG(GPIO_PORTC_BASE + GPIO_O_AFSEL) |= 0x08; + HWREG(GPIO_PORTC_BASE + GPIO_O_LOCK) = GPIO_LOCK_KEY_DD; + HWREG(GPIO_PORTC_BASE + GPIO_O_CR) = 0x00; + HWREG(GPIO_PORTC_BASE + GPIO_O_LOCK) = 0; + + // + // Turn on the LED to indicate that the pins are in JTAG mode. + // + ROM_GPIOPinWrite(GPIO_PORTF_BASE, GPIO_PIN_3 | GPIO_PIN_1, + GPIO_PIN_3); + } + else + { + // + // Change PC0-3 into GPIO inputs. + // + HWREG(GPIO_PORTC_BASE + GPIO_O_LOCK) = GPIO_LOCK_KEY_DD; + HWREG(GPIO_PORTC_BASE + GPIO_O_CR) = 0x01; + HWREG(GPIO_PORTC_BASE + GPIO_O_AFSEL) &= 0xfe; + HWREG(GPIO_PORTC_BASE + GPIO_O_LOCK) = GPIO_LOCK_KEY_DD; + HWREG(GPIO_PORTC_BASE + GPIO_O_CR) = 0x02; + HWREG(GPIO_PORTC_BASE + GPIO_O_AFSEL) &= 0xfd; + HWREG(GPIO_PORTC_BASE + GPIO_O_LOCK) = GPIO_LOCK_KEY_DD; + HWREG(GPIO_PORTC_BASE + GPIO_O_CR) = 0x04; + HWREG(GPIO_PORTC_BASE + GPIO_O_AFSEL) &= 0xfb; + HWREG(GPIO_PORTC_BASE + GPIO_O_LOCK) = GPIO_LOCK_KEY_DD; + HWREG(GPIO_PORTC_BASE + GPIO_O_CR) = 0x08; + HWREG(GPIO_PORTC_BASE + GPIO_O_AFSEL) &= 0xf7; + HWREG(GPIO_PORTC_BASE + GPIO_O_LOCK) = GPIO_LOCK_KEY_DD; + HWREG(GPIO_PORTC_BASE + GPIO_O_CR) = 0x00; + HWREG(GPIO_PORTC_BASE + GPIO_O_LOCK) = 0; + ROM_GPIOPinTypeGPIOInput(GPIO_PORTC_BASE, (GPIO_PIN_0 | GPIO_PIN_1 | + GPIO_PIN_2 | GPIO_PIN_3)); + + // + // Turn off the LED to indicate that the pins are in GPIO mode. + // + ROM_GPIOPinWrite(GPIO_PORTF_BASE, GPIO_PIN_3 | GPIO_PIN_1, + GPIO_PIN_1); + } + } +} + +//***************************************************************************** +// +// Toggle the JTAG pins between JTAG and GPIO mode with a push button selecting +// between the two. +// +//***************************************************************************** +int +main(void) +{ + unsigned long ulMode; + + // + // Enable lazy stacking for interrupt handlers. This allows floating-point + // instructions to be used within interrupt handlers, but at the expense of + // extra stack usage. + // + ROM_FPULazyStackingEnable(); + + // + // Set the clocking to run directly from the crystal. + // + ROM_SysCtlClockSet(SYSCTL_SYSDIV_4 | SYSCTL_USE_PLL | SYSCTL_XTAL_16MHZ | + SYSCTL_OSC_MAIN); + + // + // Enable the peripherals used by this application. + // + ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA); + ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOC); + + // + // Initialize the button driver. + // + ButtonsInit(); + + // + // Set up a SysTick Interrupt to handle polling and debouncing for our + // buttons. + // + SysTickPeriodSet(SysCtlClockGet() / 100); + SysTickIntEnable(); + SysTickEnable(); + + IntMasterEnable(); + + // + // Configure the LED as an output and turn it on. + // + ROM_GPIOPinTypeGPIOOutput(GPIO_PORTF_BASE, GPIO_PIN_3 | GPIO_PIN_1); + ROM_GPIOPinWrite(GPIO_PORTF_BASE, GPIO_PIN_3 | GPIO_PIN_1, GPIO_PIN_3); + + // + // Set the global and local indicator of pin mode to zero, meaning JTAG. + // + g_ulMode = 0; + ulMode = 0; + + // + // Initialize the UART. + // + GPIOPinConfigure(GPIO_PA0_U0RX); + GPIOPinConfigure(GPIO_PA1_U0TX); + ROM_GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_1); + UARTStdioInit(0); + UARTprintf("\033[2JGPIO <-> JTAG\n"); + + // + // Indicate that the pins start out as JTAG. + // + UARTprintf("Pins are JTAG\n"); + + // + // Loop forever. This loop simply exists to display on the UART the + // current state of PC0-3; the handling of changing the JTAG pins to and + // from GPIO mode is done in GPIO Interrupt Handler. + // + while(1) + { + // + // Wait until the pin mode changes. + // + while(g_ulMode == ulMode) + { + } + + // + // Save the new mode locally so that a subsequent pin mode change can + // be detected. + // + ulMode = g_ulMode; + + // + // See what the new pin mode was changed to. + // + if(ulMode == 0) + { + // + // Indicate that PC0-3 are currently JTAG pins. + // + UARTprintf("Pins are JTAG\n"); + } + else + { + // + // Indicate that PC0-3 are currently GPIO pins. + // + UARTprintf("Pins are GPIO\n"); + } + } +} diff --git a/boards/ek-lm4f120xl/gpio_jtag/gpio_jtag.ewd b/boards/ek-lm4f120xl/gpio_jtag/gpio_jtag.ewd new file mode 100644 index 0000000..b8eeac7 --- /dev/null +++ b/boards/ek-lm4f120xl/gpio_jtag/gpio_jtag.ewd @@ -0,0 +1,614 @@ + + + + 1 + + Debug + + ARM + + 1 + + C-SPY + 2 + + 15 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + ARMSIM_ID + 2 + + 1 + 1 + 1 + + + + + + + + ANGEL_ID + 2 + + 0 + 1 + 1 + + + + + + + + + + + + GDBSERVER_ID + 2 + + 0 + 1 + 1 + + + + + + + + + + + IARROM_ID + 2 + + 0 + 1 + 1 + + + + + + + + + + JLINK_ID + 2 + + 9 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + LMIFTDI_ID + 2 + + 1 + 1 + 1 + + + + + + + + MACRAIGOR_ID + 2 + + 2 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + RDI_ID + 2 + + 1 + 1 + 1 + + + + + + + + + + + + + + + + + THIRDPARTY_ID + 2 + + 0 + 1 + 1 + + + + + + + + + $TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\OSE\OseEpsilonPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\PowerPac\PowerPacRTOS.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin + 0 + + + $EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin + 1 + + + $EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin + 0 + + + $EW_DIR$\common\plugins\Profiling\Profiling.ENU.ewplugin + 1 + + + $EW_DIR$\common\plugins\Stack\Stack.ENU.ewplugin + 1 + + + + diff --git a/boards/ek-lm4f120xl/gpio_jtag/gpio_jtag.ewp b/boards/ek-lm4f120xl/gpio_jtag/gpio_jtag.ewp new file mode 100644 index 0000000..86e8411 --- /dev/null +++ b/boards/ek-lm4f120xl/gpio_jtag/gpio_jtag.ewp @@ -0,0 +1,792 @@ + + + + 1 + + Debug + + ARM + + 1 + + General + 3 + + 14 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCARM + 2 + + 19 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AARM + 2 + + 7 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + OBJCOPY + 0 + + 1 + 1 + 1 + + + + + + + + + CUSTOM + 3 + + + + + + + BICOMP + 0 + + + + BUILDACTION + 1 + + + + + + + ILINK + 0 + + 5 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + IARCHIVE + 0 + + 0 + 1 + 1 + + + + + + + BILINK + 0 + + + + + Libraries + + $PROJ_DIR$\..\..\..\driverlib\ewarm-cm4f\Exe\driverlib-cm4f.a + + + + Source + + $PROJ_DIR$\..\drivers\buttons.c + + + $PROJ_DIR$\gpio_jtag.c + + + $PROJ_DIR$\startup_ewarm.c + + + $PROJ_DIR$\..\..\..\utils\uartstdio.c + + + diff --git a/boards/ek-lm4f120xl/gpio_jtag/gpio_jtag.icf b/boards/ek-lm4f120xl/gpio_jtag/gpio_jtag.icf new file mode 100644 index 0000000..4e65152 --- /dev/null +++ b/boards/ek-lm4f120xl/gpio_jtag/gpio_jtag.icf @@ -0,0 +1,78 @@ +//***************************************************************************** +// +// gpio_jtag.icf - Linker configuration file for gpio_jtag. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +// +// Define a memory region that covers the entire 4 GB addressible space of the +// processor. +// +define memory mem with size = 4G; + +// +// Define a region for the on-chip flash. +// +define region FLASH = mem:[from 0x00000000 to 0x0003ffff]; + +// +// Define a region for the on-chip SRAM. +// +define region SRAM = mem:[from 0x20000000 to 0x20007fff]; + +// +// Define a block for the heap. The size should be set to something other +// than zero if things in the C library that require the heap are used. +// +define block HEAP with alignment = 8, size = 0x00000000 { }; + +// +// Indicate that the read/write values should be initialized by copying from +// flash. +// +initialize by copy { readwrite }; + +// +// Indicate that the noinit values should be left alone. This includes the +// stack, which if initialized will destroy the return address from the +// initialization code, causing the processor to branch to zero and fault. +// +do not initialize { section .noinit }; + +// +// Place the interrupt vectors at the start of flash. +// +place at start of FLASH { readonly section .intvec }; + +// +// Place the remainder of the read-only items into flash. +// +place in FLASH { readonly }; + +// +// Place the RAM vector table at the start of SRAM. +// +place at start of SRAM { section VTABLE }; + +// +// Place all read/write items into SRAM. +// +place in SRAM { readwrite, block HEAP }; diff --git a/boards/ek-lm4f120xl/gpio_jtag/gpio_jtag.ld b/boards/ek-lm4f120xl/gpio_jtag/gpio_jtag.ld new file mode 100644 index 0000000..3b51913 --- /dev/null +++ b/boards/ek-lm4f120xl/gpio_jtag/gpio_jtag.ld @@ -0,0 +1,57 @@ +/****************************************************************************** + * + * gpio_jtag.ld - Linker configuration file for gpio_jtag. + * + * Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. + * Software License Agreement + * + * Texas Instruments (TI) is supplying this software for use solely and + * exclusively on TI's microcontroller products. The software is owned by + * TI and/or its suppliers, and is protected under applicable copyright + * laws. You may not combine this software with "viral" open-source + * software in order to form a larger program. + * + * THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. + * NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT + * NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY + * CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL + * DAMAGES, FOR ANY REASON WHATSOEVER. + * + * This is part of revision 9453 of the EK-LM4F120XL Firmware Package. + * + *****************************************************************************/ + +MEMORY +{ + FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x00040000 + SRAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00008000 +} + +SECTIONS +{ + .text : + { + _text = .; + KEEP(*(.isr_vector)) + *(.text*) + *(.rodata*) + _etext = .; + } > FLASH + + .data : AT(ADDR(.text) + SIZEOF(.text)) + { + _data = .; + *(vtable) + *(.data*) + _edata = .; + } > SRAM + + .bss : + { + _bss = .; + *(.bss*) + *(COMMON) + _ebss = .; + } > SRAM +} diff --git a/boards/ek-lm4f120xl/gpio_jtag/gpio_jtag.sct b/boards/ek-lm4f120xl/gpio_jtag/gpio_jtag.sct new file mode 100644 index 0000000..ec519d9 --- /dev/null +++ b/boards/ek-lm4f120xl/gpio_jtag/gpio_jtag.sct @@ -0,0 +1,47 @@ +;****************************************************************************** +; +; gpio_jtag.sct - Linker configuration file for gpio_jtag. +; +; Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +; Software License Agreement +; +; Texas Instruments (TI) is supplying this software for use solely and +; exclusively on TI's microcontroller products. The software is owned by +; TI and/or its suppliers, and is protected under applicable copyright +; laws. You may not combine this software with "viral" open-source +; software in order to form a larger program. +; +; THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +; NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +; NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +; A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +; CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +; DAMAGES, FOR ANY REASON WHATSOEVER. +; +; This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +; +;****************************************************************************** + +LR_IROM 0x00000000 0x00040000 +{ + ; + ; Specify the Execution Address of the code and the size. + ; + ER_IROM 0x00000000 0x00040000 + { + *.o (RESET, +First) + * (InRoot$$Sections, +RO) + } + + ; + ; Specify the Execution Address of the data area. + ; + RW_IRAM 0x20000000 0x00008000 + { + ; + ; Uncomment the following line in order to use IntRegister(). + ; + ;* (vtable, +First) + * (+RW, +ZI) + } +} diff --git a/boards/ek-lm4f120xl/gpio_jtag/gpio_jtag.sgxx b/boards/ek-lm4f120xl/gpio_jtag/gpio_jtag.sgxx new file mode 100644 index 0000000..519e7e4 Binary files /dev/null and b/boards/ek-lm4f120xl/gpio_jtag/gpio_jtag.sgxx differ diff --git a/boards/ek-lm4f120xl/gpio_jtag/gpio_jtag.uvopt b/boards/ek-lm4f120xl/gpio_jtag/gpio_jtag.uvopt new file mode 100644 index 0000000..c5e0fbc --- /dev/null +++ b/boards/ek-lm4f120xl/gpio_jtag/gpio_jtag.uvopt @@ -0,0 +1,317 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + + + + 0 + 0 + + + + gpio_jtag + 0x4 + ARM-ADS + + 8000000 + + 1 + 1 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\rvmdk\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 255 + + + 0 + Data Sheet + DATASHTS\Luminary\LM4F120H5QR.PDF + + + + SARMCM3.DLL + -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 0 + 1 + 0 + 0 + 4 + + + + + + + + + + + BIN\lmidk-agdi.dll + + + + 0 + lmidk-agdi + -O4614 -S3 -FO29 + + + 0 + DLGTARM + + + + 0 + ARMDBGFLAGS + + + + + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + Source + 1 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\drivers\buttons.c + buttons.c + + + 1 + 2 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + .\gpio_jtag.c + gpio_jtag.c + + + 1 + 3 + 2 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + .\startup_rvmdk.S + startup_rvmdk.S + + + 1 + 4 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\utils\uartstdio.c + uartstdio.c + + + + + Libraries + 1 + 0 + 0 + + 2 + 5 + 4 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\driverlib\rvmdk-cm4f\driverlib-cm4f.lib + driverlib-cm4f.lib + + + + + Documentation + 1 + 0 + 0 + + 3 + 6 + 5 + 0 + 1 + 0 + 0 + 1 + 1 + 0 + .\readme.txt + readme.txt + + 44 + 0 + 1 + + -1 + -1 + + + -1 + -1 + + + 0 + 0 + 729 + 300 + + + + + + + 1 + 0 + + 100 + 0 + + + .\readme.txt + 0 + 1 + 1 + + + + + + diff --git a/boards/ek-lm4f120xl/gpio_jtag/gpio_jtag.uvproj b/boards/ek-lm4f120xl/gpio_jtag/gpio_jtag.uvproj new file mode 100644 index 0000000..d994bf9 --- /dev/null +++ b/boards/ek-lm4f120xl/gpio_jtag/gpio_jtag.uvproj @@ -0,0 +1,434 @@ + + + + 1.1 + +
### uVision Project, (C) Keil Software
+ + + + gpio_jtag + 0x4 + ARM-ADS + + + LM4F120H5QR + Texas Instruments + IRAM(0x20000000-0x20007FFF) IROM(0-0x3FFFF) CLOCK(8000000) CPUTYPE("Cortex-M4") FPU2 + + "STARTUP\Luminary\Startup.s" ("Luminary Startup Code") + UL2CM3(-O207 -S0 -C0 -FO7 -FD20000000 -FC800 -FN1 -FF0LM4F_256 -FS00 -FL040000) + 5919 + LM4Fxxxx.H + + + + + + + + + + 0 + + + + Luminary\ + Luminary\ + + 0 + 0 + 0 + 0 + 1 + + .\rvmdk\ + gpio_jtag + 1 + 0 + 0 + 1 + 1 + .\rvmdk\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + + 1 + 0 + fromelf --bin --output .\rvmdk\gpio_jtag.bin .\rvmdk\gpio_jtag.axf + + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + + + SARMCM3.DLL + -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + + 1 + 0 + 0 + 0 + 16 + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + + + 1 + 1 + 0 + 1 + 1 + 1 + 0 + 1 + + 0 + 4 + + + + + + + + + + + + + + BIN\lmidk-agdi.dll + + + + + 1 + 0 + 0 + 0 + 1 + 4099 + + BIN\lmidk-agdi.dll + + + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M4" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 2 + 0 + 0 + 8 + 1 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x8000 + + + 1 + 0x0 + 0x40000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x40000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x8000 + + + 0 + 0x0 + 0x0 + + + + + + 0 + 3 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + + + rvmdk PART_LM4F120H5QR TARGET_IS_BLIZZARD_RA1 + + ..;..\..\..; + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x00000000 + 0x20000000 + gpio_jtag.sct + + + --entry Reset_Handler + + + + + + + + Source + + + buttons.c + 1 + ..\drivers\buttons.c + + + gpio_jtag.c + 1 + .\gpio_jtag.c + + + startup_rvmdk.S + 2 + .\startup_rvmdk.S + + + uartstdio.c + 1 + ..\..\..\utils\uartstdio.c + + + + + Libraries + + + driverlib-cm4f.lib + 4 + ..\..\..\driverlib\rvmdk-cm4f\driverlib-cm4f.lib + + + + + Documentation + + + readme.txt + 5 + .\readme.txt + + + + + + + + diff --git a/boards/ek-lm4f120xl/gpio_jtag/gpio_jtag_ccs.cmd b/boards/ek-lm4f120xl/gpio_jtag/gpio_jtag_ccs.cmd new file mode 100644 index 0000000..4b96e94 --- /dev/null +++ b/boards/ek-lm4f120xl/gpio_jtag/gpio_jtag_ccs.cmd @@ -0,0 +1,70 @@ +/****************************************************************************** + * + * gpio_jtag_ccs.cmd - CCS linker configuration file for gpio_jtag. + * + * Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. + * Software License Agreement + * + * Texas Instruments (TI) is supplying this software for use solely and + * exclusively on TI's microcontroller products. The software is owned by + * TI and/or its suppliers, and is protected under applicable copyright + * laws. You may not combine this software with "viral" open-source + * software in order to form a larger program. + * + * THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. + * NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT + * NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY + * CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL + * DAMAGES, FOR ANY REASON WHATSOEVER. + * + * This is part of revision 9453 of the EK-LM4F120XL Firmware Package. + * + *****************************************************************************/ + +--retain=g_pfnVectors + +/* The following command line options are set as part of the CCS project. */ +/* If you are building using the command line, or for some reason want to */ +/* define them here, you can uncomment and modify these lines as needed. */ +/* If you are using CCS for building, it is probably better to make any such */ +/* modifications in your CCS project and leave this file alone. */ +/* */ +/* --heap_size=0 */ +/* --stack_size=256 */ +/* --library=rtsv7M3_T_le_eabi.lib */ + +/* The starting address of the application. Normally the interrupt vectors */ +/* must be located at the beginning of the application. */ +#define APP_BASE 0x00000000 +#define RAM_BASE 0x20000000 + +/* System memory map */ + +MEMORY +{ + /* Application stored in and executes from internal flash */ + FLASH (RX) : origin = APP_BASE, length = 0x00040000 + /* Application uses internal RAM for data */ + SRAM (RWX) : origin = 0x20000000, length = 0x00008000 +} + +/* Section allocation in memory */ + +SECTIONS +{ + .intvecs: > APP_BASE + .text : > FLASH + .const : > FLASH + .cinit : > FLASH + .pinit : > FLASH + .init_array : > FLASH + + .vtable : > RAM_BASE + .data : > SRAM + .bss : > SRAM + .sysmem : > SRAM + .stack : > SRAM +} + +__STACK_TOP = __stack + 256; diff --git a/boards/ek-lm4f120xl/gpio_jtag/gpio_jtag_sourcerygxx.ld b/boards/ek-lm4f120xl/gpio_jtag/gpio_jtag_sourcerygxx.ld new file mode 100644 index 0000000..6496d31 --- /dev/null +++ b/boards/ek-lm4f120xl/gpio_jtag/gpio_jtag_sourcerygxx.ld @@ -0,0 +1,39 @@ +/****************************************************************************** + * + * gpio_jtag_sourcerygxx.ld - Scatter file for Sourcery CodeBench + * + * Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. + * Software License Agreement + * + * Texas Instruments (TI) is supplying this software for use solely and + * exclusively on TI's microcontroller products. The software is owned by + * TI and/or its suppliers, and is protected under applicable copyright + * laws. You may not combine this software with "viral" open-source + * software in order to form a larger program. + * + * THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. + * NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT + * NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY + * CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL + * DAMAGES, FOR ANY REASON WHATSOEVER. + * + * This is part of revision 9453 of the EK-LM4F120XL Firmware Package. + * + *****************************************************************************/ + +/****************************************************************************** + * + * Define the end of the heap space, which determines the beginning of the + * stack space. + * + *****************************************************************************/ +__cs3_heap_end = __cs3_region_end_ram - 256; + +/****************************************************************************** + * + * Define the interrupt handlers used by the application. + * + *****************************************************************************/ +EXTERN(SysTickIntHandler) +__cs3_isr_systick = SysTickIntHandler; diff --git a/boards/ek-lm4f120xl/gpio_jtag/readme.txt b/boards/ek-lm4f120xl/gpio_jtag/readme.txt new file mode 100644 index 0000000..2214e93 --- /dev/null +++ b/boards/ek-lm4f120xl/gpio_jtag/readme.txt @@ -0,0 +1,33 @@ +GPIO JTAG Recovery + +This example demonstrates changing the JTAG pins into GPIOs, along with a +mechanism to revert them to JTAG pins. When first run, the pins remain in +JTAG mode. Pressing the left button will toggle the pins between JTAG mode +and GPIO mode. Because there is no debouncing of the push button (either +in hardware or software), a button press will occasionally result in more +than one mode change. + +In this example, four pins (PC0, PC1, PC2, and PC3) are switched. + +UART0, connected to the ICDI virtual COM port and running at 115,200, +8-N-1, is used to display messages from this application. + +------------------------------------------------------------------------------- + +Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +Software License Agreement + +Texas Instruments (TI) is supplying this software for use solely and +exclusively on TI's microcontroller products. The software is owned by +TI and/or its suppliers, and is protected under applicable copyright +laws. You may not combine this software with "viral" open-source +software in order to form a larger program. + +THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +DAMAGES, FOR ANY REASON WHATSOEVER. + +This is part of revision 9453 of the EK-LM4F120XL Firmware Package. diff --git a/boards/ek-lm4f120xl/gpio_jtag/rvmdk/gpio_jtag.axf b/boards/ek-lm4f120xl/gpio_jtag/rvmdk/gpio_jtag.axf new file mode 100644 index 0000000..1ba75d7 Binary files /dev/null and b/boards/ek-lm4f120xl/gpio_jtag/rvmdk/gpio_jtag.axf differ diff --git a/boards/ek-lm4f120xl/gpio_jtag/rvmdk/gpio_jtag.bin b/boards/ek-lm4f120xl/gpio_jtag/rvmdk/gpio_jtag.bin new file mode 100644 index 0000000..940a204 Binary files /dev/null and b/boards/ek-lm4f120xl/gpio_jtag/rvmdk/gpio_jtag.bin differ diff --git a/boards/ek-lm4f120xl/gpio_jtag/sourcerygxx/gpio_jtag.axf b/boards/ek-lm4f120xl/gpio_jtag/sourcerygxx/gpio_jtag.axf new file mode 100644 index 0000000..3ccceb4 Binary files /dev/null and b/boards/ek-lm4f120xl/gpio_jtag/sourcerygxx/gpio_jtag.axf differ diff --git a/boards/ek-lm4f120xl/gpio_jtag/sourcerygxx/gpio_jtag.bin b/boards/ek-lm4f120xl/gpio_jtag/sourcerygxx/gpio_jtag.bin new file mode 100644 index 0000000..5931b36 Binary files /dev/null and b/boards/ek-lm4f120xl/gpio_jtag/sourcerygxx/gpio_jtag.bin differ diff --git a/boards/ek-lm4f120xl/gpio_jtag/startup_ccs.c b/boards/ek-lm4f120xl/gpio_jtag/startup_ccs.c new file mode 100644 index 0000000..a686c79 --- /dev/null +++ b/boards/ek-lm4f120xl/gpio_jtag/startup_ccs.c @@ -0,0 +1,298 @@ +//***************************************************************************** +// +// startup_ccs.c - Startup code for use with TI's Code Composer Studio. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +//***************************************************************************** +// +// Forward declaration of the default fault handlers. +// +//***************************************************************************** +void ResetISR(void); +static void NmiSR(void); +static void FaultISR(void); +static void IntDefaultHandler(void); + +//***************************************************************************** +// +// External declaration for the reset handler that is to be called when the +// processor is started +// +//***************************************************************************** +extern void _c_int00(void); + +//***************************************************************************** +// +// Linker variable that marks the top of the stack. +// +//***************************************************************************** +extern unsigned long __STACK_TOP; + +//***************************************************************************** +// +// External declaration for the interrupt handler used by the application. +// +//***************************************************************************** +extern void SysTickIntHandler(void); + +//***************************************************************************** +// +// The vector table. Note that the proper constructs must be placed on this to +// ensure that it ends up at physical address 0x0000.0000 or at the start of +// the program if located at a start address other than 0. +// +//***************************************************************************** +#pragma DATA_SECTION(g_pfnVectors, ".intvecs") +void (* const g_pfnVectors[])(void) = +{ + (void (*)(void))((unsigned long)&__STACK_TOP), + // The initial stack pointer + ResetISR, // The reset handler + NmiSR, // The NMI handler + FaultISR, // The hard fault handler + IntDefaultHandler, // The MPU fault handler + IntDefaultHandler, // The bus fault handler + IntDefaultHandler, // The usage fault handler + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // SVCall handler + IntDefaultHandler, // Debug monitor handler + 0, // Reserved + IntDefaultHandler, // The PendSV handler + SysTickIntHandler, // The SysTick handler + IntDefaultHandler, // GPIO Port A + IntDefaultHandler, // GPIO Port B + IntDefaultHandler, // GPIO Port C + IntDefaultHandler, // GPIO Port D + IntDefaultHandler, // GPIO Port E + IntDefaultHandler, // UART0 Rx and Tx + IntDefaultHandler, // UART1 Rx and Tx + IntDefaultHandler, // SSI0 Rx and Tx + IntDefaultHandler, // I2C0 Master and Slave + IntDefaultHandler, // PWM Fault + IntDefaultHandler, // PWM Generator 0 + IntDefaultHandler, // PWM Generator 1 + IntDefaultHandler, // PWM Generator 2 + IntDefaultHandler, // Quadrature Encoder 0 + IntDefaultHandler, // ADC Sequence 0 + IntDefaultHandler, // ADC Sequence 1 + IntDefaultHandler, // ADC Sequence 2 + IntDefaultHandler, // ADC Sequence 3 + IntDefaultHandler, // Watchdog timer + IntDefaultHandler, // Timer 0 subtimer A + IntDefaultHandler, // Timer 0 subtimer B + IntDefaultHandler, // Timer 1 subtimer A + IntDefaultHandler, // Timer 1 subtimer B + IntDefaultHandler, // Timer 2 subtimer A + IntDefaultHandler, // Timer 2 subtimer B + IntDefaultHandler, // Analog Comparator 0 + IntDefaultHandler, // Analog Comparator 1 + IntDefaultHandler, // Analog Comparator 2 + IntDefaultHandler, // System Control (PLL, OSC, BO) + IntDefaultHandler, // FLASH Control + IntDefaultHandler, // GPIO Port F + IntDefaultHandler, // GPIO Port G + IntDefaultHandler, // GPIO Port H + IntDefaultHandler, // UART2 Rx and Tx + IntDefaultHandler, // SSI1 Rx and Tx + IntDefaultHandler, // Timer 3 subtimer A + IntDefaultHandler, // Timer 3 subtimer B + IntDefaultHandler, // I2C1 Master and Slave + IntDefaultHandler, // Quadrature Encoder 1 + IntDefaultHandler, // CAN0 + IntDefaultHandler, // CAN1 + IntDefaultHandler, // CAN2 + IntDefaultHandler, // Ethernet + IntDefaultHandler, // Hibernate + IntDefaultHandler, // USB0 + IntDefaultHandler, // PWM Generator 3 + IntDefaultHandler, // uDMA Software Transfer + IntDefaultHandler, // uDMA Error + IntDefaultHandler, // ADC1 Sequence 0 + IntDefaultHandler, // ADC1 Sequence 1 + IntDefaultHandler, // ADC1 Sequence 2 + IntDefaultHandler, // ADC1 Sequence 3 + IntDefaultHandler, // I2S0 + IntDefaultHandler, // External Bus Interface 0 + IntDefaultHandler, // GPIO Port J + IntDefaultHandler, // GPIO Port K + IntDefaultHandler, // GPIO Port L + IntDefaultHandler, // SSI2 Rx and Tx + IntDefaultHandler, // SSI3 Rx and Tx + IntDefaultHandler, // UART3 Rx and Tx + IntDefaultHandler, // UART4 Rx and Tx + IntDefaultHandler, // UART5 Rx and Tx + IntDefaultHandler, // UART6 Rx and Tx + IntDefaultHandler, // UART7 Rx and Tx + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // I2C2 Master and Slave + IntDefaultHandler, // I2C3 Master and Slave + IntDefaultHandler, // Timer 4 subtimer A + IntDefaultHandler, // Timer 4 subtimer B + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // Timer 5 subtimer A + IntDefaultHandler, // Timer 5 subtimer B + IntDefaultHandler, // Wide Timer 0 subtimer A + IntDefaultHandler, // Wide Timer 0 subtimer B + IntDefaultHandler, // Wide Timer 1 subtimer A + IntDefaultHandler, // Wide Timer 1 subtimer B + IntDefaultHandler, // Wide Timer 2 subtimer A + IntDefaultHandler, // Wide Timer 2 subtimer B + IntDefaultHandler, // Wide Timer 3 subtimer A + IntDefaultHandler, // Wide Timer 3 subtimer B + IntDefaultHandler, // Wide Timer 4 subtimer A + IntDefaultHandler, // Wide Timer 4 subtimer B + IntDefaultHandler, // Wide Timer 5 subtimer A + IntDefaultHandler, // Wide Timer 5 subtimer B + IntDefaultHandler, // FPU + IntDefaultHandler, // PECI 0 + IntDefaultHandler, // LPC 0 + IntDefaultHandler, // I2C4 Master and Slave + IntDefaultHandler, // I2C5 Master and Slave + IntDefaultHandler, // GPIO Port M + IntDefaultHandler, // GPIO Port N + IntDefaultHandler, // Quadrature Encoder 2 + IntDefaultHandler, // Fan 0 + 0, // Reserved + IntDefaultHandler, // GPIO Port P (Summary or P0) + IntDefaultHandler, // GPIO Port P1 + IntDefaultHandler, // GPIO Port P2 + IntDefaultHandler, // GPIO Port P3 + IntDefaultHandler, // GPIO Port P4 + IntDefaultHandler, // GPIO Port P5 + IntDefaultHandler, // GPIO Port P6 + IntDefaultHandler, // GPIO Port P7 + IntDefaultHandler, // GPIO Port Q (Summary or Q0) + IntDefaultHandler, // GPIO Port Q1 + IntDefaultHandler, // GPIO Port Q2 + IntDefaultHandler, // GPIO Port Q3 + IntDefaultHandler, // GPIO Port Q4 + IntDefaultHandler, // GPIO Port Q5 + IntDefaultHandler, // GPIO Port Q6 + IntDefaultHandler, // GPIO Port Q7 + IntDefaultHandler, // GPIO Port R + IntDefaultHandler, // GPIO Port S + IntDefaultHandler, // PWM 1 Generator 0 + IntDefaultHandler, // PWM 1 Generator 1 + IntDefaultHandler, // PWM 1 Generator 2 + IntDefaultHandler, // PWM 1 Generator 3 + IntDefaultHandler // PWM 1 Fault +}; + +//***************************************************************************** +// +// This is the code that gets called when the processor first starts execution +// following a reset event. Only the absolutely necessary set is performed, +// after which the application supplied entry() routine is called. Any fancy +// actions (such as making decisions based on the reset cause register, and +// resetting the bits in that register) are left solely in the hands of the +// application. +// +//***************************************************************************** +void +ResetISR(void) +{ + // + // Jump to the CCS C initialization routine. This will enable the + // floating-point unit as well, so that does not need to be done here. + // + __asm(" .global _c_int00\n" + " b.w _c_int00"); +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a NMI. This +// simply enters an infinite loop, preserving the system state for examination +// by a debugger. +// +//***************************************************************************** +static void +NmiSR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a fault +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +FaultISR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives an unexpected +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +IntDefaultHandler(void) +{ + // + // Go into an infinite loop. + // + while(1) + { + } +} diff --git a/boards/ek-lm4f120xl/gpio_jtag/startup_ewarm.c b/boards/ek-lm4f120xl/gpio_jtag/startup_ewarm.c new file mode 100644 index 0000000..6501c4d --- /dev/null +++ b/boards/ek-lm4f120xl/gpio_jtag/startup_ewarm.c @@ -0,0 +1,332 @@ +//***************************************************************************** +// +// startup_ewarm.c - Startup code for use with IAR's Embedded Workbench, +// version 5. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +#include "inc/hw_nvic.h" +#include "inc/hw_types.h" + +//***************************************************************************** +// +// Enable the IAR extensions for this source file. +// +//***************************************************************************** +#pragma language=extended + +//***************************************************************************** +// +// Forward declaration of the default fault handlers. +// +//***************************************************************************** +void ResetISR(void); +static void NmiSR(void); +static void FaultISR(void); +static void IntDefaultHandler(void); + +//***************************************************************************** +// +// External declaration for the interrupt handler used by the application. +// +//***************************************************************************** +extern void SysTickIntHandler(void); + +//***************************************************************************** +// +// The entry point for the application startup code. +// +//***************************************************************************** +extern void __iar_program_start(void); + +//***************************************************************************** +// +// Reserve space for the system stack. +// +//***************************************************************************** +static unsigned long pulStack[64] @ ".noinit"; + +//***************************************************************************** +// +// A union that describes the entries of the vector table. The union is needed +// since the first entry is the stack pointer and the remainder are function +// pointers. +// +//***************************************************************************** +typedef union +{ + void (*pfnHandler)(void); + unsigned long ulPtr; +} +uVectorEntry; + +//***************************************************************************** +// +// The vector table. Note that the proper constructs must be placed on this to +// ensure that it ends up at physical address 0x0000.0000. +// +//***************************************************************************** +__root const uVectorEntry __vector_table[] @ ".intvec" = +{ + { .ulPtr = (unsigned long)pulStack + sizeof(pulStack) }, + // The initial stack pointer + ResetISR, // The reset handler + NmiSR, // The NMI handler + FaultISR, // The hard fault handler + IntDefaultHandler, // The MPU fault handler + IntDefaultHandler, // The bus fault handler + IntDefaultHandler, // The usage fault handler + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // SVCall handler + IntDefaultHandler, // Debug monitor handler + 0, // Reserved + IntDefaultHandler, // The PendSV handler + SysTickIntHandler, // The SysTick handler + IntDefaultHandler, // GPIO Port A + IntDefaultHandler, // GPIO Port B + IntDefaultHandler, // GPIO Port C + IntDefaultHandler, // GPIO Port D + IntDefaultHandler, // GPIO Port E + IntDefaultHandler, // UART0 Rx and Tx + IntDefaultHandler, // UART1 Rx and Tx + IntDefaultHandler, // SSI0 Rx and Tx + IntDefaultHandler, // I2C0 Master and Slave + IntDefaultHandler, // PWM Fault + IntDefaultHandler, // PWM Generator 0 + IntDefaultHandler, // PWM Generator 1 + IntDefaultHandler, // PWM Generator 2 + IntDefaultHandler, // Quadrature Encoder 0 + IntDefaultHandler, // ADC Sequence 0 + IntDefaultHandler, // ADC Sequence 1 + IntDefaultHandler, // ADC Sequence 2 + IntDefaultHandler, // ADC Sequence 3 + IntDefaultHandler, // Watchdog timer + IntDefaultHandler, // Timer 0 subtimer A + IntDefaultHandler, // Timer 0 subtimer B + IntDefaultHandler, // Timer 1 subtimer A + IntDefaultHandler, // Timer 1 subtimer B + IntDefaultHandler, // Timer 2 subtimer A + IntDefaultHandler, // Timer 2 subtimer B + IntDefaultHandler, // Analog Comparator 0 + IntDefaultHandler, // Analog Comparator 1 + IntDefaultHandler, // Analog Comparator 2 + IntDefaultHandler, // System Control (PLL, OSC, BO) + IntDefaultHandler, // FLASH Control + IntDefaultHandler, // GPIO Port F + IntDefaultHandler, // GPIO Port G + IntDefaultHandler, // GPIO Port H + IntDefaultHandler, // UART2 Rx and Tx + IntDefaultHandler, // SSI1 Rx and Tx + IntDefaultHandler, // Timer 3 subtimer A + IntDefaultHandler, // Timer 3 subtimer B + IntDefaultHandler, // I2C1 Master and Slave + IntDefaultHandler, // Quadrature Encoder 1 + IntDefaultHandler, // CAN0 + IntDefaultHandler, // CAN1 + IntDefaultHandler, // CAN2 + IntDefaultHandler, // Ethernet + IntDefaultHandler, // Hibernate + IntDefaultHandler, // USB0 + IntDefaultHandler, // PWM Generator 3 + IntDefaultHandler, // uDMA Software Transfer + IntDefaultHandler, // uDMA Error + IntDefaultHandler, // ADC1 Sequence 0 + IntDefaultHandler, // ADC1 Sequence 1 + IntDefaultHandler, // ADC1 Sequence 2 + IntDefaultHandler, // ADC1 Sequence 3 + IntDefaultHandler, // I2S0 + IntDefaultHandler, // External Bus Interface 0 + IntDefaultHandler, // GPIO Port J + IntDefaultHandler, // GPIO Port K + IntDefaultHandler, // GPIO Port L + IntDefaultHandler, // SSI2 Rx and Tx + IntDefaultHandler, // SSI3 Rx and Tx + IntDefaultHandler, // UART3 Rx and Tx + IntDefaultHandler, // UART4 Rx and Tx + IntDefaultHandler, // UART5 Rx and Tx + IntDefaultHandler, // UART6 Rx and Tx + IntDefaultHandler, // UART7 Rx and Tx + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // I2C2 Master and Slave + IntDefaultHandler, // I2C3 Master and Slave + IntDefaultHandler, // Timer 4 subtimer A + IntDefaultHandler, // Timer 4 subtimer B + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // Timer 5 subtimer A + IntDefaultHandler, // Timer 5 subtimer B + IntDefaultHandler, // Wide Timer 0 subtimer A + IntDefaultHandler, // Wide Timer 0 subtimer B + IntDefaultHandler, // Wide Timer 1 subtimer A + IntDefaultHandler, // Wide Timer 1 subtimer B + IntDefaultHandler, // Wide Timer 2 subtimer A + IntDefaultHandler, // Wide Timer 2 subtimer B + IntDefaultHandler, // Wide Timer 3 subtimer A + IntDefaultHandler, // Wide Timer 3 subtimer B + IntDefaultHandler, // Wide Timer 4 subtimer A + IntDefaultHandler, // Wide Timer 4 subtimer B + IntDefaultHandler, // Wide Timer 5 subtimer A + IntDefaultHandler, // Wide Timer 5 subtimer B + IntDefaultHandler, // FPU + IntDefaultHandler, // PECI 0 + IntDefaultHandler, // LPC 0 + IntDefaultHandler, // I2C4 Master and Slave + IntDefaultHandler, // I2C5 Master and Slave + IntDefaultHandler, // GPIO Port M + IntDefaultHandler, // GPIO Port N + IntDefaultHandler, // Quadrature Encoder 2 + IntDefaultHandler, // Fan 0 + 0, // Reserved + IntDefaultHandler, // GPIO Port P (Summary or P0) + IntDefaultHandler, // GPIO Port P1 + IntDefaultHandler, // GPIO Port P2 + IntDefaultHandler, // GPIO Port P3 + IntDefaultHandler, // GPIO Port P4 + IntDefaultHandler, // GPIO Port P5 + IntDefaultHandler, // GPIO Port P6 + IntDefaultHandler, // GPIO Port P7 + IntDefaultHandler, // GPIO Port Q (Summary or Q0) + IntDefaultHandler, // GPIO Port Q1 + IntDefaultHandler, // GPIO Port Q2 + IntDefaultHandler, // GPIO Port Q3 + IntDefaultHandler, // GPIO Port Q4 + IntDefaultHandler, // GPIO Port Q5 + IntDefaultHandler, // GPIO Port Q6 + IntDefaultHandler, // GPIO Port Q7 + IntDefaultHandler, // GPIO Port R + IntDefaultHandler, // GPIO Port S + IntDefaultHandler, // PWM 1 Generator 0 + IntDefaultHandler, // PWM 1 Generator 1 + IntDefaultHandler, // PWM 1 Generator 2 + IntDefaultHandler, // PWM 1 Generator 3 + IntDefaultHandler // PWM 1 Fault +}; + +//***************************************************************************** +// +// This is the code that gets called when the processor first starts execution +// following a reset event. Only the absolutely necessary set is performed, +// after which the application supplied entry() routine is called. Any fancy +// actions (such as making decisions based on the reset cause register, and +// resetting the bits in that register) are left solely in the hands of the +// application. +// +//***************************************************************************** +void +ResetISR(void) +{ + // + // Enable the floating-point unit. This must be done here to handle the + // case where main() uses floating-point and the function prologue saves + // floating-point registers (which will fault if floating-point is not + // enabled). Any configuration of the floating-point unit using DriverLib + // APIs must be done here prior to the floating-point unit being enabled. + // + // Note that this does not use DriverLib since it might not be included in + // this project. + // + HWREG(NVIC_CPAC) = ((HWREG(NVIC_CPAC) & + ~(NVIC_CPAC_CP10_M | NVIC_CPAC_CP11_M)) | + NVIC_CPAC_CP10_FULL | NVIC_CPAC_CP11_FULL); + + // + // Call the application's entry point. + // + __iar_program_start(); +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a NMI. This +// simply enters an infinite loop, preserving the system state for examination +// by a debugger. +// +//***************************************************************************** +static void +NmiSR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a fault +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +FaultISR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives an unexpected +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +IntDefaultHandler(void) +{ + // + // Go into an infinite loop. + // + while(1) + { + } +} diff --git a/boards/ek-lm4f120xl/gpio_jtag/startup_gcc.c b/boards/ek-lm4f120xl/gpio_jtag/startup_gcc.c new file mode 100644 index 0000000..da40a55 --- /dev/null +++ b/boards/ek-lm4f120xl/gpio_jtag/startup_gcc.c @@ -0,0 +1,348 @@ +//***************************************************************************** +// +// startup_gcc.c - Startup code for use with GNU tools. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +#include "inc/hw_nvic.h" +#include "inc/hw_types.h" + +//***************************************************************************** +// +// Forward declaration of the default fault handlers. +// +//***************************************************************************** +void ResetISR(void); +static void NmiSR(void); +static void FaultISR(void); +static void IntDefaultHandler(void); + +//***************************************************************************** +// +// External declaration for the interrupt handler used by the application. +// +//***************************************************************************** +extern void SysTickIntHandler(void); + +//***************************************************************************** +// +// The entry point for the application. +// +//***************************************************************************** +extern int main(void); + +//***************************************************************************** +// +// Reserve space for the system stack. +// +//***************************************************************************** +static unsigned long pulStack[64]; + +//***************************************************************************** +// +// The vector table. Note that the proper constructs must be placed on this to +// ensure that it ends up at physical address 0x0000.0000. +// +//***************************************************************************** +__attribute__ ((section(".isr_vector"))) +void (* const g_pfnVectors[])(void) = +{ + (void (*)(void))((unsigned long)pulStack + sizeof(pulStack)), + // The initial stack pointer + ResetISR, // The reset handler + NmiSR, // The NMI handler + FaultISR, // The hard fault handler + IntDefaultHandler, // The MPU fault handler + IntDefaultHandler, // The bus fault handler + IntDefaultHandler, // The usage fault handler + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // SVCall handler + IntDefaultHandler, // Debug monitor handler + 0, // Reserved + IntDefaultHandler, // The PendSV handler + SysTickIntHandler, // The SysTick handler + IntDefaultHandler, // GPIO Port A + IntDefaultHandler, // GPIO Port B + IntDefaultHandler, // GPIO Port C + IntDefaultHandler, // GPIO Port D + IntDefaultHandler, // GPIO Port E + IntDefaultHandler, // UART0 Rx and Tx + IntDefaultHandler, // UART1 Rx and Tx + IntDefaultHandler, // SSI0 Rx and Tx + IntDefaultHandler, // I2C0 Master and Slave + IntDefaultHandler, // PWM Fault + IntDefaultHandler, // PWM Generator 0 + IntDefaultHandler, // PWM Generator 1 + IntDefaultHandler, // PWM Generator 2 + IntDefaultHandler, // Quadrature Encoder 0 + IntDefaultHandler, // ADC Sequence 0 + IntDefaultHandler, // ADC Sequence 1 + IntDefaultHandler, // ADC Sequence 2 + IntDefaultHandler, // ADC Sequence 3 + IntDefaultHandler, // Watchdog timer + IntDefaultHandler, // Timer 0 subtimer A + IntDefaultHandler, // Timer 0 subtimer B + IntDefaultHandler, // Timer 1 subtimer A + IntDefaultHandler, // Timer 1 subtimer B + IntDefaultHandler, // Timer 2 subtimer A + IntDefaultHandler, // Timer 2 subtimer B + IntDefaultHandler, // Analog Comparator 0 + IntDefaultHandler, // Analog Comparator 1 + IntDefaultHandler, // Analog Comparator 2 + IntDefaultHandler, // System Control (PLL, OSC, BO) + IntDefaultHandler, // FLASH Control + IntDefaultHandler, // GPIO Port F + IntDefaultHandler, // GPIO Port G + IntDefaultHandler, // GPIO Port H + IntDefaultHandler, // UART2 Rx and Tx + IntDefaultHandler, // SSI1 Rx and Tx + IntDefaultHandler, // Timer 3 subtimer A + IntDefaultHandler, // Timer 3 subtimer B + IntDefaultHandler, // I2C1 Master and Slave + IntDefaultHandler, // Quadrature Encoder 1 + IntDefaultHandler, // CAN0 + IntDefaultHandler, // CAN1 + IntDefaultHandler, // CAN2 + IntDefaultHandler, // Ethernet + IntDefaultHandler, // Hibernate + IntDefaultHandler, // USB0 + IntDefaultHandler, // PWM Generator 3 + IntDefaultHandler, // uDMA Software Transfer + IntDefaultHandler, // uDMA Error + IntDefaultHandler, // ADC1 Sequence 0 + IntDefaultHandler, // ADC1 Sequence 1 + IntDefaultHandler, // ADC1 Sequence 2 + IntDefaultHandler, // ADC1 Sequence 3 + IntDefaultHandler, // I2S0 + IntDefaultHandler, // External Bus Interface 0 + IntDefaultHandler, // GPIO Port J + IntDefaultHandler, // GPIO Port K + IntDefaultHandler, // GPIO Port L + IntDefaultHandler, // SSI2 Rx and Tx + IntDefaultHandler, // SSI3 Rx and Tx + IntDefaultHandler, // UART3 Rx and Tx + IntDefaultHandler, // UART4 Rx and Tx + IntDefaultHandler, // UART5 Rx and Tx + IntDefaultHandler, // UART6 Rx and Tx + IntDefaultHandler, // UART7 Rx and Tx + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // I2C2 Master and Slave + IntDefaultHandler, // I2C3 Master and Slave + IntDefaultHandler, // Timer 4 subtimer A + IntDefaultHandler, // Timer 4 subtimer B + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // Timer 5 subtimer A + IntDefaultHandler, // Timer 5 subtimer B + IntDefaultHandler, // Wide Timer 0 subtimer A + IntDefaultHandler, // Wide Timer 0 subtimer B + IntDefaultHandler, // Wide Timer 1 subtimer A + IntDefaultHandler, // Wide Timer 1 subtimer B + IntDefaultHandler, // Wide Timer 2 subtimer A + IntDefaultHandler, // Wide Timer 2 subtimer B + IntDefaultHandler, // Wide Timer 3 subtimer A + IntDefaultHandler, // Wide Timer 3 subtimer B + IntDefaultHandler, // Wide Timer 4 subtimer A + IntDefaultHandler, // Wide Timer 4 subtimer B + IntDefaultHandler, // Wide Timer 5 subtimer A + IntDefaultHandler, // Wide Timer 5 subtimer B + IntDefaultHandler, // FPU + IntDefaultHandler, // PECI 0 + IntDefaultHandler, // LPC 0 + IntDefaultHandler, // I2C4 Master and Slave + IntDefaultHandler, // I2C5 Master and Slave + IntDefaultHandler, // GPIO Port M + IntDefaultHandler, // GPIO Port N + IntDefaultHandler, // Quadrature Encoder 2 + IntDefaultHandler, // Fan 0 + 0, // Reserved + IntDefaultHandler, // GPIO Port P (Summary or P0) + IntDefaultHandler, // GPIO Port P1 + IntDefaultHandler, // GPIO Port P2 + IntDefaultHandler, // GPIO Port P3 + IntDefaultHandler, // GPIO Port P4 + IntDefaultHandler, // GPIO Port P5 + IntDefaultHandler, // GPIO Port P6 + IntDefaultHandler, // GPIO Port P7 + IntDefaultHandler, // GPIO Port Q (Summary or Q0) + IntDefaultHandler, // GPIO Port Q1 + IntDefaultHandler, // GPIO Port Q2 + IntDefaultHandler, // GPIO Port Q3 + IntDefaultHandler, // GPIO Port Q4 + IntDefaultHandler, // GPIO Port Q5 + IntDefaultHandler, // GPIO Port Q6 + IntDefaultHandler, // GPIO Port Q7 + IntDefaultHandler, // GPIO Port R + IntDefaultHandler, // GPIO Port S + IntDefaultHandler, // PWM 1 Generator 0 + IntDefaultHandler, // PWM 1 Generator 1 + IntDefaultHandler, // PWM 1 Generator 2 + IntDefaultHandler, // PWM 1 Generator 3 + IntDefaultHandler // PWM 1 Fault +}; + +//***************************************************************************** +// +// The following are constructs created by the linker, indicating where the +// the "data" and "bss" segments reside in memory. The initializers for the +// for the "data" segment resides immediately following the "text" segment. +// +//***************************************************************************** +extern unsigned long _etext; +extern unsigned long _data; +extern unsigned long _edata; +extern unsigned long _bss; +extern unsigned long _ebss; + +//***************************************************************************** +// +// This is the code that gets called when the processor first starts execution +// following a reset event. Only the absolutely necessary set is performed, +// after which the application supplied entry() routine is called. Any fancy +// actions (such as making decisions based on the reset cause register, and +// resetting the bits in that register) are left solely in the hands of the +// application. +// +//***************************************************************************** +void +ResetISR(void) +{ + unsigned long *pulSrc, *pulDest; + + // + // Copy the data segment initializers from flash to SRAM. + // + pulSrc = &_etext; + for(pulDest = &_data; pulDest < &_edata; ) + { + *pulDest++ = *pulSrc++; + } + + // + // Zero fill the bss segment. + // + __asm(" ldr r0, =_bss\n" + " ldr r1, =_ebss\n" + " mov r2, #0\n" + " .thumb_func\n" + "zero_loop:\n" + " cmp r0, r1\n" + " it lt\n" + " strlt r2, [r0], #4\n" + " blt zero_loop"); + + // + // Enable the floating-point unit. This must be done here to handle the + // case where main() uses floating-point and the function prologue saves + // floating-point registers (which will fault if floating-point is not + // enabled). Any configuration of the floating-point unit using DriverLib + // APIs must be done here prior to the floating-point unit being enabled. + // + // Note that this does not use DriverLib since it might not be included in + // this project. + // + HWREG(NVIC_CPAC) = ((HWREG(NVIC_CPAC) & + ~(NVIC_CPAC_CP10_M | NVIC_CPAC_CP11_M)) | + NVIC_CPAC_CP10_FULL | NVIC_CPAC_CP11_FULL); + + // + // Call the application's entry point. + // + main(); +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a NMI. This +// simply enters an infinite loop, preserving the system state for examination +// by a debugger. +// +//***************************************************************************** +static void +NmiSR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a fault +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +FaultISR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives an unexpected +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +IntDefaultHandler(void) +{ + // + // Go into an infinite loop. + // + while(1) + { + } +} diff --git a/boards/ek-lm4f120xl/gpio_jtag/startup_rvmdk.S b/boards/ek-lm4f120xl/gpio_jtag/startup_rvmdk.S new file mode 100644 index 0000000..feac8c0 --- /dev/null +++ b/boards/ek-lm4f120xl/gpio_jtag/startup_rvmdk.S @@ -0,0 +1,358 @@ +; <<< Use Configuration Wizard in Context Menu >>> +;****************************************************************************** +; +; startup_rvmdk.S - Startup code for use with Keil's uVision. +; +; Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +; Software License Agreement +; +; Texas Instruments (TI) is supplying this software for use solely and +; exclusively on TI's microcontroller products. The software is owned by +; TI and/or its suppliers, and is protected under applicable copyright +; laws. You may not combine this software with "viral" open-source +; software in order to form a larger program. +; +; THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +; NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +; NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +; A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +; CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +; DAMAGES, FOR ANY REASON WHATSOEVER. +; +; This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +; +;****************************************************************************** + +;****************************************************************************** +; +; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +; +;****************************************************************************** +Stack EQU 0x00000100 + +;****************************************************************************** +; +; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> +; +;****************************************************************************** +Heap EQU 0x00000000 + +;****************************************************************************** +; +; Allocate space for the stack. +; +;****************************************************************************** + AREA STACK, NOINIT, READWRITE, ALIGN=3 +StackMem + SPACE Stack +__initial_sp + +;****************************************************************************** +; +; Allocate space for the heap. +; +;****************************************************************************** + AREA HEAP, NOINIT, READWRITE, ALIGN=3 +__heap_base +HeapMem + SPACE Heap +__heap_limit + +;****************************************************************************** +; +; Indicate that the code in this file preserves 8-byte alignment of the stack. +; +;****************************************************************************** + PRESERVE8 + +;****************************************************************************** +; +; Place code into the reset code section. +; +;****************************************************************************** + AREA RESET, CODE, READONLY + THUMB + +;****************************************************************************** +; +; External declaration for the interrupt handler used by the application. +; +;****************************************************************************** + EXTERN SysTickIntHandler + +;****************************************************************************** +; +; The vector table. +; +;****************************************************************************** + EXPORT __Vectors +__Vectors + DCD StackMem + Stack ; Top of Stack + DCD Reset_Handler ; Reset Handler + DCD NmiSR ; NMI Handler + DCD FaultISR ; Hard Fault Handler + DCD IntDefaultHandler ; The MPU fault handler + DCD IntDefaultHandler ; The bus fault handler + DCD IntDefaultHandler ; The usage fault handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD IntDefaultHandler ; SVCall handler + DCD IntDefaultHandler ; Debug monitor handler + DCD 0 ; Reserved + DCD IntDefaultHandler ; The PendSV handler + DCD SysTickIntHandler ; The SysTick handler + DCD IntDefaultHandler ; GPIO Port A + DCD IntDefaultHandler ; GPIO Port B + DCD IntDefaultHandler ; GPIO Port C + DCD IntDefaultHandler ; GPIO Port D + DCD IntDefaultHandler ; GPIO Port E + DCD IntDefaultHandler ; UART0 Rx and Tx + DCD IntDefaultHandler ; UART1 Rx and Tx + DCD IntDefaultHandler ; SSI0 Rx and Tx + DCD IntDefaultHandler ; I2C0 Master and Slave + DCD IntDefaultHandler ; PWM Fault + DCD IntDefaultHandler ; PWM Generator 0 + DCD IntDefaultHandler ; PWM Generator 1 + DCD IntDefaultHandler ; PWM Generator 2 + DCD IntDefaultHandler ; Quadrature Encoder 0 + DCD IntDefaultHandler ; ADC Sequence 0 + DCD IntDefaultHandler ; ADC Sequence 1 + DCD IntDefaultHandler ; ADC Sequence 2 + DCD IntDefaultHandler ; ADC Sequence 3 + DCD IntDefaultHandler ; Watchdog timer + DCD IntDefaultHandler ; Timer 0 subtimer A + DCD IntDefaultHandler ; Timer 0 subtimer B + DCD IntDefaultHandler ; Timer 1 subtimer A + DCD IntDefaultHandler ; Timer 1 subtimer B + DCD IntDefaultHandler ; Timer 2 subtimer A + DCD IntDefaultHandler ; Timer 2 subtimer B + DCD IntDefaultHandler ; Analog Comparator 0 + DCD IntDefaultHandler ; Analog Comparator 1 + DCD IntDefaultHandler ; Analog Comparator 2 + DCD IntDefaultHandler ; System Control (PLL, OSC, BO) + DCD IntDefaultHandler ; FLASH Control + DCD IntDefaultHandler ; GPIO Port F + DCD IntDefaultHandler ; GPIO Port G + DCD IntDefaultHandler ; GPIO Port H + DCD IntDefaultHandler ; UART2 Rx and Tx + DCD IntDefaultHandler ; SSI1 Rx and Tx + DCD IntDefaultHandler ; Timer 3 subtimer A + DCD IntDefaultHandler ; Timer 3 subtimer B + DCD IntDefaultHandler ; I2C1 Master and Slave + DCD IntDefaultHandler ; Quadrature Encoder 1 + DCD IntDefaultHandler ; CAN0 + DCD IntDefaultHandler ; CAN1 + DCD IntDefaultHandler ; CAN2 + DCD IntDefaultHandler ; Ethernet + DCD IntDefaultHandler ; Hibernate + DCD IntDefaultHandler ; USB0 + DCD IntDefaultHandler ; PWM Generator 3 + DCD IntDefaultHandler ; uDMA Software Transfer + DCD IntDefaultHandler ; uDMA Error + DCD IntDefaultHandler ; ADC1 Sequence 0 + DCD IntDefaultHandler ; ADC1 Sequence 1 + DCD IntDefaultHandler ; ADC1 Sequence 2 + DCD IntDefaultHandler ; ADC1 Sequence 3 + DCD IntDefaultHandler ; I2S0 + DCD IntDefaultHandler ; External Bus Interface 0 + DCD IntDefaultHandler ; GPIO Port J + DCD IntDefaultHandler ; GPIO Port K + DCD IntDefaultHandler ; GPIO Port L + DCD IntDefaultHandler ; SSI2 Rx and Tx + DCD IntDefaultHandler ; SSI3 Rx and Tx + DCD IntDefaultHandler ; UART3 Rx and Tx + DCD IntDefaultHandler ; UART4 Rx and Tx + DCD IntDefaultHandler ; UART5 Rx and Tx + DCD IntDefaultHandler ; UART6 Rx and Tx + DCD IntDefaultHandler ; UART7 Rx and Tx + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD IntDefaultHandler ; I2C2 Master and Slave + DCD IntDefaultHandler ; I2C3 Master and Slave + DCD IntDefaultHandler ; Timer 4 subtimer A + DCD IntDefaultHandler ; Timer 4 subtimer B + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD IntDefaultHandler ; Timer 5 subtimer A + DCD IntDefaultHandler ; Timer 5 subtimer B + DCD IntDefaultHandler ; Wide Timer 0 subtimer A + DCD IntDefaultHandler ; Wide Timer 0 subtimer B + DCD IntDefaultHandler ; Wide Timer 1 subtimer A + DCD IntDefaultHandler ; Wide Timer 1 subtimer B + DCD IntDefaultHandler ; Wide Timer 2 subtimer A + DCD IntDefaultHandler ; Wide Timer 2 subtimer B + DCD IntDefaultHandler ; Wide Timer 3 subtimer A + DCD IntDefaultHandler ; Wide Timer 3 subtimer B + DCD IntDefaultHandler ; Wide Timer 4 subtimer A + DCD IntDefaultHandler ; Wide Timer 4 subtimer B + DCD IntDefaultHandler ; Wide Timer 5 subtimer A + DCD IntDefaultHandler ; Wide Timer 5 subtimer B + DCD IntDefaultHandler ; FPU + DCD IntDefaultHandler ; PECI 0 + DCD IntDefaultHandler ; LPC 0 + DCD IntDefaultHandler ; I2C4 Master and Slave + DCD IntDefaultHandler ; I2C5 Master and Slave + DCD IntDefaultHandler ; GPIO Port M + DCD IntDefaultHandler ; GPIO Port N + DCD IntDefaultHandler ; Quadrature Encoder 2 + DCD IntDefaultHandler ; Fan 0 + DCD 0 ; Reserved + DCD IntDefaultHandler ; GPIO Port P (Summary or P0) + DCD IntDefaultHandler ; GPIO Port P1 + DCD IntDefaultHandler ; GPIO Port P2 + DCD IntDefaultHandler ; GPIO Port P3 + DCD IntDefaultHandler ; GPIO Port P4 + DCD IntDefaultHandler ; GPIO Port P5 + DCD IntDefaultHandler ; GPIO Port P6 + DCD IntDefaultHandler ; GPIO Port P7 + DCD IntDefaultHandler ; GPIO Port Q (Summary or Q0) + DCD IntDefaultHandler ; GPIO Port Q1 + DCD IntDefaultHandler ; GPIO Port Q2 + DCD IntDefaultHandler ; GPIO Port Q3 + DCD IntDefaultHandler ; GPIO Port Q4 + DCD IntDefaultHandler ; GPIO Port Q5 + DCD IntDefaultHandler ; GPIO Port Q6 + DCD IntDefaultHandler ; GPIO Port Q7 + DCD IntDefaultHandler ; GPIO Port R + DCD IntDefaultHandler ; GPIO Port S + DCD IntDefaultHandler ; PWM 1 Generator 0 + DCD IntDefaultHandler ; PWM 1 Generator 1 + DCD IntDefaultHandler ; PWM 1 Generator 2 + DCD IntDefaultHandler ; PWM 1 Generator 3 + DCD IntDefaultHandler ; PWM 1 Fault + +;****************************************************************************** +; +; This is the code that gets called when the processor first starts execution +; following a reset event. +; +;****************************************************************************** + EXPORT Reset_Handler +Reset_Handler + ; + ; Enable the floating-point unit. This must be done here to handle the + ; case where main() uses floating-point and the function prologue saves + ; floating-point registers (which will fault if floating-point is not + ; enabled). Any configuration of the floating-point unit using + ; DriverLib APIs must be done here prior to the floating-point unit + ; being enabled. + ; + ; Note that this does not use DriverLib since it might not be included + ; in this project. + ; + MOVW R0, #0xED88 + MOVT R0, #0xE000 + LDR R1, [R0] + ORR R1, #0x00F00000 + STR R1, [R0] + + ; + ; Call the C library enty point that handles startup. This will copy + ; the .data section initializers from flash to SRAM and zero fill the + ; .bss section. + ; + IMPORT __main + B __main + +;****************************************************************************** +; +; This is the code that gets called when the processor receives a NMI. This +; simply enters an infinite loop, preserving the system state for examination +; by a debugger. +; +;****************************************************************************** +NmiSR + B NmiSR + +;****************************************************************************** +; +; This is the code that gets called when the processor receives a fault +; interrupt. This simply enters an infinite loop, preserving the system state +; for examination by a debugger. +; +;****************************************************************************** +FaultISR + B FaultISR + +;****************************************************************************** +; +; This is the code that gets called when the processor receives an unexpected +; interrupt. This simply enters an infinite loop, preserving the system state +; for examination by a debugger. +; +;****************************************************************************** +IntDefaultHandler + B IntDefaultHandler + +;****************************************************************************** +; +; Make sure the end of this section is aligned. +; +;****************************************************************************** + ALIGN + +;****************************************************************************** +; +; Some code in the normal code section for initializing the heap and stack. +; +;****************************************************************************** + AREA |.text|, CODE, READONLY + +;****************************************************************************** +; +; The function expected of the C library startup code for defining the stack +; and heap memory locations. For the C library version of the startup code, +; provide this function so that the C library initialization code can find out +; the location of the stack and heap. +; +;****************************************************************************** + IF :DEF: __MICROLIB + EXPORT __initial_sp + EXPORT __heap_base + EXPORT __heap_limit + ELSE + IMPORT __use_two_region_memory + EXPORT __user_initial_stackheap +__user_initial_stackheap + LDR R0, =HeapMem + LDR R1, =(StackMem + Stack) + LDR R2, =(HeapMem + Heap) + LDR R3, =StackMem + BX LR + ENDIF + +;****************************************************************************** +; +; Make sure the end of this section is aligned. +; +;****************************************************************************** + ALIGN + +;****************************************************************************** +; +; Tell the assembler that we're done. +; +;****************************************************************************** + END diff --git a/boards/ek-lm4f120xl/gpio_jtag/startup_sourcerygxx.S b/boards/ek-lm4f120xl/gpio_jtag/startup_sourcerygxx.S new file mode 100644 index 0000000..b720839 --- /dev/null +++ b/boards/ek-lm4f120xl/gpio_jtag/startup_sourcerygxx.S @@ -0,0 +1,75 @@ +//***************************************************************************** +// +// startup_sourcerygxx.S - Startup code for Sourcery CodeBench. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + + .syntax unified + .thumb + +//***************************************************************************** +// +// Place this code into the .cs3.reset section so that it can be executed prior +// to the startup code in Sourcery CodeBench. +// +//***************************************************************************** + .section .cs3.reset,"x" + +//***************************************************************************** +// +// The reset handler, which overrides the one provided by CS3. +// +//***************************************************************************** + .globl __cs3_reset + .thumb_func +__cs3_reset: + // + // Enable the floating-point unit. This must be done here to handle the + // case where main() uses floating-point and the function prologue saves + // floating-point registers (which will fault if floating-point is not + // enabled). Any configuration of the floating-point unit using DriverLib + // APIs must be done here prior to the floating-point unit being enabled. + // + // Note that this does not use DriverLib since it might not be included in + // this project. + // + movw r0, #0xed88 + movt r0, #0xe000 + ldr r1, [r0] + orr r1, #0x00f00000 + str r1, [r0] + + // + // Branch to the normal CS3 startup code. + // + .extern __cs3_reset_ekc_lm4f232 + ldr r0, =__cs3_reset_ekc_lm4f232 + bx r0 + + // + // Place the literal pool here. + // + .ltorg + + // + // The end of the file. + // + .end diff --git a/boards/ek-lm4f120xl/hello/Makefile b/boards/ek-lm4f120xl/hello/Makefile new file mode 100644 index 0000000..0330fe6 --- /dev/null +++ b/boards/ek-lm4f120xl/hello/Makefile @@ -0,0 +1,90 @@ +#****************************************************************************** +# +# Makefile - Rules for building the hello example. +# +# Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +# Software License Agreement +# +# Texas Instruments (TI) is supplying this software for use solely and +# exclusively on TI's microcontroller products. The software is owned by +# TI and/or its suppliers, and is protected under applicable copyright +# laws. You may not combine this software with "viral" open-source +# software in order to form a larger program. +# +# THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +# NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +# NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +# A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +# CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +# DAMAGES, FOR ANY REASON WHATSOEVER. +# +# This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +# +#****************************************************************************** + +# +# Defines the part type that this project uses. +# +PART=LM4F120H5QR + +# +# Set the processor variant. +# +VARIANT=cm4f + +# +# The base directory for StellarisWare. +# +ROOT=../../.. + +# +# Include the common make definitions. +# +include ${ROOT}/makedefs + +# +# Where to find source files that do not live in this directory. +# +VPATH=../../../utils + +# +# Where to find header files that do not live in the source directory. +# +IPATH=../../.. + +# +# The default rule, which causes the hello example to be built. +# +all: ${COMPILER} +all: ${COMPILER}/hello.axf + +# +# The rule to clean out all the build products. +# +clean: + @rm -rf ${COMPILER} ${wildcard *~} + +# +# The rule to create the target directory. +# +${COMPILER}: + @mkdir -p ${COMPILER} + +# +# Rules for building the hello example. +# +${COMPILER}/hello.axf: ${COMPILER}/hello.o +${COMPILER}/hello.axf: ${COMPILER}/startup_${COMPILER}.o +${COMPILER}/hello.axf: ${COMPILER}/uartstdio.o +${COMPILER}/hello.axf: ${ROOT}/driverlib/${COMPILER}-cm4f/libdriver-cm4f.a +${COMPILER}/hello.axf: hello.ld +SCATTERgcc_hello=hello.ld +ENTRY_hello=ResetISR +CFLAGSgcc=-DTARGET_IS_BLIZZARD_RA1 + +# +# Include the automatically generated dependency files. +# +ifneq (${MAKECMDGOALS},clean) +-include ${wildcard ${COMPILER}/*.d} __dummy__ +endif diff --git a/boards/ek-lm4f120xl/hello/ccs/.ccsimportspec b/boards/ek-lm4f120xl/hello/ccs/.ccsimportspec new file mode 100644 index 0000000..77b03f5 --- /dev/null +++ b/boards/ek-lm4f120xl/hello/ccs/.ccsimportspec @@ -0,0 +1,8 @@ + + + + + + + + diff --git a/boards/ek-lm4f120xl/hello/ccs/.ccsproject b/boards/ek-lm4f120xl/hello/ccs/.ccsproject new file mode 100644 index 0000000..56793f4 --- /dev/null +++ b/boards/ek-lm4f120xl/hello/ccs/.ccsproject @@ -0,0 +1,12 @@ + + + + + + + + + + + + diff --git a/boards/ek-lm4f120xl/hello/ccs/.cproject b/boards/ek-lm4f120xl/hello/ccs/.cproject new file mode 100644 index 0000000..8a44351 --- /dev/null +++ b/boards/ek-lm4f120xl/hello/ccs/.cproject @@ -0,0 +1,191 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/boards/ek-lm4f120xl/hello/ccs/.project b/boards/ek-lm4f120xl/hello/ccs/.project new file mode 100644 index 0000000..226002b --- /dev/null +++ b/boards/ek-lm4f120xl/hello/ccs/.project @@ -0,0 +1,111 @@ + + + hello + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + + + ?name? + + + + org.eclipse.cdt.make.core.append_environment + true + + + org.eclipse.cdt.make.core.autoBuildTarget + all + + + org.eclipse.cdt.make.core.buildArguments + -k + + + org.eclipse.cdt.make.core.buildCommand + ${CCS_UTILS_DIR}/bin/gmake + + + org.eclipse.cdt.make.core.buildLocation + ${BuildDirectory} + + + org.eclipse.cdt.make.core.cleanBuildTarget + clean + + + org.eclipse.cdt.make.core.contents + org.eclipse.cdt.make.core.activeConfigSettings + + + org.eclipse.cdt.make.core.enableAutoBuild + true + + + org.eclipse.cdt.make.core.enableCleanBuild + true + + + org.eclipse.cdt.make.core.enableFullBuild + true + + + org.eclipse.cdt.make.core.fullBuildTarget + all + + + org.eclipse.cdt.make.core.stopOnError + false + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + true + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + com.ti.ccstudio.core.ccsNature + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.core.ccnature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + hello.c + 1 + SW_ROOT/boards/ek-lm4f120xl/hello/hello.c + + + hello_ccs.cmd + 1 + SW_ROOT/boards/ek-lm4f120xl/hello/hello_ccs.cmd + + + startup_ccs.c + 1 + SW_ROOT/boards/ek-lm4f120xl/hello/startup_ccs.c + + + utils/uartstdio.c + 1 + SW_ROOT/utils/uartstdio.c + + + + + SW_ROOT + $%7BPARENT-4-PROJECT_LOC%7D + + + diff --git a/boards/ek-lm4f120xl/hello/ccs/.settings/org.eclipse.cdt.codan.core.prefs b/boards/ek-lm4f120xl/hello/ccs/.settings/org.eclipse.cdt.codan.core.prefs new file mode 100644 index 0000000..98b6350 --- /dev/null +++ b/boards/ek-lm4f120xl/hello/ccs/.settings/org.eclipse.cdt.codan.core.prefs @@ -0,0 +1,3 @@ +eclipse.preferences.version=1 +inEditor=false +onBuild=false diff --git a/boards/ek-lm4f120xl/hello/ccs/Debug/hello.bin b/boards/ek-lm4f120xl/hello/ccs/Debug/hello.bin new file mode 100644 index 0000000..2901344 Binary files /dev/null and b/boards/ek-lm4f120xl/hello/ccs/Debug/hello.bin differ diff --git a/boards/ek-lm4f120xl/hello/ccs/Debug/hello.out b/boards/ek-lm4f120xl/hello/ccs/Debug/hello.out new file mode 100644 index 0000000..2c5edc5 Binary files /dev/null and b/boards/ek-lm4f120xl/hello/ccs/Debug/hello.out differ diff --git a/boards/ek-lm4f120xl/hello/ccs/macros.ini_initial b/boards/ek-lm4f120xl/hello/ccs/macros.ini_initial new file mode 100644 index 0000000..588017d --- /dev/null +++ b/boards/ek-lm4f120xl/hello/ccs/macros.ini_initial @@ -0,0 +1 @@ +SW_ROOT = ../../../.. diff --git a/boards/ek-lm4f120xl/hello/ccs/target_config.ccxml b/boards/ek-lm4f120xl/hello/ccs/target_config.ccxml new file mode 100644 index 0000000..469eea0 --- /dev/null +++ b/boards/ek-lm4f120xl/hello/ccs/target_config.ccxml @@ -0,0 +1,13 @@ + + + + + + + + + + + + + diff --git a/boards/ek-lm4f120xl/hello/ewarm/Exe/hello.bin b/boards/ek-lm4f120xl/hello/ewarm/Exe/hello.bin new file mode 100644 index 0000000..cef6a9e Binary files /dev/null and b/boards/ek-lm4f120xl/hello/ewarm/Exe/hello.bin differ diff --git a/boards/ek-lm4f120xl/hello/ewarm/Exe/hello.out b/boards/ek-lm4f120xl/hello/ewarm/Exe/hello.out new file mode 100644 index 0000000..de87f20 Binary files /dev/null and b/boards/ek-lm4f120xl/hello/ewarm/Exe/hello.out differ diff --git a/boards/ek-lm4f120xl/hello/gcc/hello.axf b/boards/ek-lm4f120xl/hello/gcc/hello.axf new file mode 100644 index 0000000..07dc450 Binary files /dev/null and b/boards/ek-lm4f120xl/hello/gcc/hello.axf differ diff --git a/boards/ek-lm4f120xl/hello/gcc/hello.bin b/boards/ek-lm4f120xl/hello/gcc/hello.bin new file mode 100644 index 0000000..d41f7d6 Binary files /dev/null and b/boards/ek-lm4f120xl/hello/gcc/hello.bin differ diff --git a/boards/ek-lm4f120xl/hello/hello.c b/boards/ek-lm4f120xl/hello/hello.c new file mode 100644 index 0000000..d7a6ba1 --- /dev/null +++ b/boards/ek-lm4f120xl/hello/hello.c @@ -0,0 +1,135 @@ +//***************************************************************************** +// +// hello.c - Simple hello world example. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +#include "inc/hw_memmap.h" +#include "inc/hw_types.h" +#include "driverlib/debug.h" +#include "driverlib/fpu.h" +#include "driverlib/gpio.h" +#include "driverlib/pin_map.h" +#include "driverlib/rom.h" +#include "driverlib/sysctl.h" +#include "utils/uartstdio.h" + +//***************************************************************************** +// +//! \addtogroup example_list +//!

Hello World (hello)

+//! +//! A very simple ``hello world'' example. It simply displays ``Hello World!'' +//! on the UART and is a starting point for more complicated applications. +//! +//! UART0, connected to the Stellaris Virtual Serial Port and running at +//! 115,200, 8-N-1, is used to display messages from this application. +// +//***************************************************************************** + + +//***************************************************************************** +// +// The error routine that is called if the driver library encounters an error. +// +//***************************************************************************** +#ifdef DEBUG +void +__error__(char *pcFilename, unsigned long ulLine) +{ +} +#endif + +//***************************************************************************** +// +// Print "Hello World!" to the UART on the Stellaris evaluation board. +// +//***************************************************************************** +int +main(void) +{ + volatile unsigned long ulLoop; + + // + // Enable lazy stacking for interrupt handlers. This allows floating-point + // instructions to be used within interrupt handlers, but at the expense of + // extra stack usage. + // + ROM_FPULazyStackingEnable(); + + // + // Set the clocking to run directly from the crystal. + // + ROM_SysCtlClockSet(SYSCTL_SYSDIV_4 | SYSCTL_USE_PLL | SYSCTL_XTAL_16MHZ | + SYSCTL_OSC_MAIN); + + + // + // Enable the GPIO port that is used for the on-board LED. + // + ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOF); + + // + // Enable the GPIO pins for the LED (PF2 & PF3). + // + ROM_GPIOPinTypeGPIOOutput(GPIO_PORTF_BASE, GPIO_PIN_2); + + + // + // Initialize the UART. + // + ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA); + ROM_GPIOPinConfigure(GPIO_PA0_U0RX); + ROM_GPIOPinConfigure(GPIO_PA1_U0TX); + ROM_GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_1); + UARTStdioInit(0); + + // + // Hello! + // + UARTprintf("Hello, world!\n"); + + // + // We are finished. Hang around doing nothing. + // + while(1) + { + // + // Turn on the BLUE LED. + // + GPIOPinWrite(GPIO_PORTF_BASE, GPIO_PIN_2, GPIO_PIN_2); + + // + // Delay for a bit. + // + SysCtlDelay(SysCtlClockGet() / 10 / 3); + + // + // Turn off the BLUE LED. + // + GPIOPinWrite(GPIO_PORTF_BASE, GPIO_PIN_2, 0); + + // + // Delay for a bit. + // + SysCtlDelay(SysCtlClockGet() / 10 / 3); + } +} diff --git a/boards/ek-lm4f120xl/hello/hello.ewd b/boards/ek-lm4f120xl/hello/hello.ewd new file mode 100644 index 0000000..b8eeac7 --- /dev/null +++ b/boards/ek-lm4f120xl/hello/hello.ewd @@ -0,0 +1,614 @@ + + + + 1 + + Debug + + ARM + + 1 + + C-SPY + 2 + + 15 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + ARMSIM_ID + 2 + + 1 + 1 + 1 + + + + + + + + ANGEL_ID + 2 + + 0 + 1 + 1 + + + + + + + + + + + + GDBSERVER_ID + 2 + + 0 + 1 + 1 + + + + + + + + + + + IARROM_ID + 2 + + 0 + 1 + 1 + + + + + + + + + + JLINK_ID + 2 + + 9 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + LMIFTDI_ID + 2 + + 1 + 1 + 1 + + + + + + + + MACRAIGOR_ID + 2 + + 2 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + RDI_ID + 2 + + 1 + 1 + 1 + + + + + + + + + + + + + + + + + THIRDPARTY_ID + 2 + + 0 + 1 + 1 + + + + + + + + + $TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\OSE\OseEpsilonPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\PowerPac\PowerPacRTOS.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin + 0 + + + $EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin + 1 + + + $EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin + 0 + + + $EW_DIR$\common\plugins\Profiling\Profiling.ENU.ewplugin + 1 + + + $EW_DIR$\common\plugins\Stack\Stack.ENU.ewplugin + 1 + + + + diff --git a/boards/ek-lm4f120xl/hello/hello.ewp b/boards/ek-lm4f120xl/hello/hello.ewp new file mode 100644 index 0000000..7e728e0 --- /dev/null +++ b/boards/ek-lm4f120xl/hello/hello.ewp @@ -0,0 +1,787 @@ + + + + 1 + + Debug + + ARM + + 1 + + General + 3 + + 14 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCARM + 2 + + 19 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AARM + 2 + + 7 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + OBJCOPY + 0 + + 1 + 1 + 1 + + + + + + + + + CUSTOM + 3 + + + + + + + BICOMP + 0 + + + + BUILDACTION + 1 + + + + + + + ILINK + 0 + + 5 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + IARCHIVE + 0 + + 0 + 1 + 1 + + + + + + + BILINK + 0 + + + + + Libraries + + $PROJ_DIR$\..\..\..\driverlib\ewarm-cm4f\Exe\driverlib-cm4f.a + + + + Source + + $PROJ_DIR$\hello.c + + + $PROJ_DIR$\startup_ewarm.c + + + $PROJ_DIR$\..\..\..\utils\uartstdio.c + + + diff --git a/boards/ek-lm4f120xl/hello/hello.icf b/boards/ek-lm4f120xl/hello/hello.icf new file mode 100644 index 0000000..9a79d10 --- /dev/null +++ b/boards/ek-lm4f120xl/hello/hello.icf @@ -0,0 +1,78 @@ +//***************************************************************************** +// +// hello.icf - Linker configuration file for hello. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +// +// Define a memory region that covers the entire 4 GB addressible space of the +// processor. +// +define memory mem with size = 4G; + +// +// Define a region for the on-chip flash. +// +define region FLASH = mem:[from 0x00000000 to 0x0003ffff]; + +// +// Define a region for the on-chip SRAM. +// +define region SRAM = mem:[from 0x20000000 to 0x20007fff]; + +// +// Define a block for the heap. The size should be set to something other +// than zero if things in the C library that require the heap are used. +// +define block HEAP with alignment = 8, size = 0x00000000 { }; + +// +// Indicate that the read/write values should be initialized by copying from +// flash. +// +initialize by copy { readwrite }; + +// +// Indicate that the noinit values should be left alone. This includes the +// stack, which if initialized will destroy the return address from the +// initialization code, causing the processor to branch to zero and fault. +// +do not initialize { section .noinit }; + +// +// Place the interrupt vectors at the start of flash. +// +place at start of FLASH { readonly section .intvec }; + +// +// Place the remainder of the read-only items into flash. +// +place in FLASH { readonly }; + +// +// Place the RAM vector table at the start of SRAM. +// +place at start of SRAM { section VTABLE }; + +// +// Place all read/write items into SRAM. +// +place in SRAM { readwrite, block HEAP }; diff --git a/boards/ek-lm4f120xl/hello/hello.ld b/boards/ek-lm4f120xl/hello/hello.ld new file mode 100644 index 0000000..9d66d32 --- /dev/null +++ b/boards/ek-lm4f120xl/hello/hello.ld @@ -0,0 +1,57 @@ +/****************************************************************************** + * + * hello.ld - Linker configuration file for hello. + * + * Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. + * Software License Agreement + * + * Texas Instruments (TI) is supplying this software for use solely and + * exclusively on TI's microcontroller products. The software is owned by + * TI and/or its suppliers, and is protected under applicable copyright + * laws. You may not combine this software with "viral" open-source + * software in order to form a larger program. + * + * THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. + * NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT + * NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY + * CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL + * DAMAGES, FOR ANY REASON WHATSOEVER. + * + * This is part of revision 9453 of the EK-LM4F120XL Firmware Package. + * + *****************************************************************************/ + +MEMORY +{ + FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x00040000 + SRAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00008000 +} + +SECTIONS +{ + .text : + { + _text = .; + KEEP(*(.isr_vector)) + *(.text*) + *(.rodata*) + _etext = .; + } > FLASH + + .data : AT(ADDR(.text) + SIZEOF(.text)) + { + _data = .; + *(vtable) + *(.data*) + _edata = .; + } > SRAM + + .bss : + { + _bss = .; + *(.bss*) + *(COMMON) + _ebss = .; + } > SRAM +} diff --git a/boards/ek-lm4f120xl/hello/hello.sct b/boards/ek-lm4f120xl/hello/hello.sct new file mode 100644 index 0000000..092f746 --- /dev/null +++ b/boards/ek-lm4f120xl/hello/hello.sct @@ -0,0 +1,47 @@ +;****************************************************************************** +; +; hello.sct - Linker configuration file for hello. +; +; Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +; Software License Agreement +; +; Texas Instruments (TI) is supplying this software for use solely and +; exclusively on TI's microcontroller products. The software is owned by +; TI and/or its suppliers, and is protected under applicable copyright +; laws. You may not combine this software with "viral" open-source +; software in order to form a larger program. +; +; THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +; NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +; NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +; A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +; CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +; DAMAGES, FOR ANY REASON WHATSOEVER. +; +; This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +; +;****************************************************************************** + +LR_IROM 0x00000000 0x00040000 +{ + ; + ; Specify the Execution Address of the code and the size. + ; + ER_IROM 0x00000000 0x00040000 + { + *.o (RESET, +First) + * (InRoot$$Sections, +RO) + } + + ; + ; Specify the Execution Address of the data area. + ; + RW_IRAM 0x20000000 0x00008000 + { + ; + ; Uncomment the following line in order to use IntRegister(). + ; + ;* (vtable, +First) + * (+RW, +ZI) + } +} diff --git a/boards/ek-lm4f120xl/hello/hello.sgxx b/boards/ek-lm4f120xl/hello/hello.sgxx new file mode 100644 index 0000000..f2bc2e7 Binary files /dev/null and b/boards/ek-lm4f120xl/hello/hello.sgxx differ diff --git a/boards/ek-lm4f120xl/hello/hello.uvopt b/boards/ek-lm4f120xl/hello/hello.uvopt new file mode 100644 index 0000000..e2c94f6 --- /dev/null +++ b/boards/ek-lm4f120xl/hello/hello.uvopt @@ -0,0 +1,303 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + + + + 0 + 0 + + + + hello + 0x4 + ARM-ADS + + 8000000 + + 1 + 1 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\rvmdk\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 255 + + + 0 + Data Sheet + DATASHTS\Luminary\LM4F120H5QR.PDF + + + + SARMCM3.DLL + -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 0 + 1 + 0 + 0 + 4 + + + + + + + + + + + BIN\lmidk-agdi.dll + + + + 0 + lmidk-agdi + -O4614 -S3 -FO29 + + + 0 + DLGTARM + + + + 0 + ARMDBGFLAGS + + + + + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + Source + 1 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + .\hello.c + hello.c + + + 1 + 2 + 2 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + .\startup_rvmdk.S + startup_rvmdk.S + + + 1 + 3 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\utils\uartstdio.c + uartstdio.c + + + + + Libraries + 1 + 0 + 0 + + 2 + 4 + 4 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\driverlib\rvmdk-cm4f\driverlib-cm4f.lib + driverlib-cm4f.lib + + + + + Documentation + 1 + 0 + 0 + + 3 + 5 + 5 + 0 + 1 + 0 + 0 + 1 + 1 + 0 + .\readme.txt + readme.txt + + 44 + 0 + 1 + + -1 + -1 + + + -1 + -1 + + + 0 + 0 + 729 + 300 + + + + + + + 1 + 0 + + 100 + 0 + + + .\readme.txt + 0 + 1 + 1 + + + + + + diff --git a/boards/ek-lm4f120xl/hello/hello.uvproj b/boards/ek-lm4f120xl/hello/hello.uvproj new file mode 100644 index 0000000..702bb8f --- /dev/null +++ b/boards/ek-lm4f120xl/hello/hello.uvproj @@ -0,0 +1,429 @@ + + + + 1.1 + +
### uVision Project, (C) Keil Software
+ + + + hello + 0x4 + ARM-ADS + + + LM4F120H5QR + Texas Instruments + IRAM(0x20000000-0x20007FFF) IROM(0-0x3FFFF) CLOCK(8000000) CPUTYPE("Cortex-M4") FPU2 + + "STARTUP\Luminary\Startup.s" ("Luminary Startup Code") + UL2CM3(-O207 -S0 -C0 -FO7 -FD20000000 -FC800 -FN1 -FF0LM4F_256 -FS00 -FL040000) + 5919 + LM4Fxxxx.H + + + + + + + + + + 0 + + + + Luminary\ + Luminary\ + + 0 + 0 + 0 + 0 + 1 + + .\rvmdk\ + hello + 1 + 0 + 0 + 1 + 1 + .\rvmdk\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + + 1 + 0 + fromelf --bin --output .\rvmdk\hello.bin .\rvmdk\hello.axf + + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + + + SARMCM3.DLL + -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + + 1 + 0 + 0 + 0 + 16 + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + + + 1 + 1 + 0 + 1 + 1 + 1 + 0 + 1 + + 0 + 4 + + + + + + + + + + + + + + BIN\lmidk-agdi.dll + + + + + 1 + 0 + 0 + 0 + 1 + 4099 + + BIN\lmidk-agdi.dll + + + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M4" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 2 + 0 + 0 + 8 + 1 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x8000 + + + 1 + 0x0 + 0x40000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x40000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x8000 + + + 0 + 0x0 + 0x0 + + + + + + 0 + 3 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + + + rvmdk PART_LM4F120H5QR TARGET_IS_BLIZZARD_RA1 + + ..\..\..; + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x00000000 + 0x20000000 + hello.sct + + + --entry Reset_Handler + + + + + + + + Source + + + hello.c + 1 + .\hello.c + + + startup_rvmdk.S + 2 + .\startup_rvmdk.S + + + uartstdio.c + 1 + ..\..\..\utils\uartstdio.c + + + + + Libraries + + + driverlib-cm4f.lib + 4 + ..\..\..\driverlib\rvmdk-cm4f\driverlib-cm4f.lib + + + + + Documentation + + + readme.txt + 5 + .\readme.txt + + + + + + + + diff --git a/boards/ek-lm4f120xl/hello/hello_ccs.cmd b/boards/ek-lm4f120xl/hello/hello_ccs.cmd new file mode 100644 index 0000000..096c0a4 --- /dev/null +++ b/boards/ek-lm4f120xl/hello/hello_ccs.cmd @@ -0,0 +1,70 @@ +/****************************************************************************** + * + * hello_ccs.cmd - CCS linker configuration file for hello. + * + * Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. + * Software License Agreement + * + * Texas Instruments (TI) is supplying this software for use solely and + * exclusively on TI's microcontroller products. The software is owned by + * TI and/or its suppliers, and is protected under applicable copyright + * laws. You may not combine this software with "viral" open-source + * software in order to form a larger program. + * + * THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. + * NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT + * NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY + * CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL + * DAMAGES, FOR ANY REASON WHATSOEVER. + * + * This is part of revision 9453 of the EK-LM4F120XL Firmware Package. + * + *****************************************************************************/ + +--retain=g_pfnVectors + +/* The following command line options are set as part of the CCS project. */ +/* If you are building using the command line, or for some reason want to */ +/* define them here, you can uncomment and modify these lines as needed. */ +/* If you are using CCS for building, it is probably better to make any such */ +/* modifications in your CCS project and leave this file alone. */ +/* */ +/* --heap_size=0 */ +/* --stack_size=256 */ +/* --library=rtsv7M3_T_le_eabi.lib */ + +/* The starting address of the application. Normally the interrupt vectors */ +/* must be located at the beginning of the application. */ +#define APP_BASE 0x00000000 +#define RAM_BASE 0x20000000 + +/* System memory map */ + +MEMORY +{ + /* Application stored in and executes from internal flash */ + FLASH (RX) : origin = APP_BASE, length = 0x00040000 + /* Application uses internal RAM for data */ + SRAM (RWX) : origin = 0x20000000, length = 0x00008000 +} + +/* Section allocation in memory */ + +SECTIONS +{ + .intvecs: > APP_BASE + .text : > FLASH + .const : > FLASH + .cinit : > FLASH + .pinit : > FLASH + .init_array : > FLASH + + .vtable : > RAM_BASE + .data : > SRAM + .bss : > SRAM + .sysmem : > SRAM + .stack : > SRAM +} + +__STACK_TOP = __stack + 512; diff --git a/boards/ek-lm4f120xl/hello/hello_sourcerygxx.ld b/boards/ek-lm4f120xl/hello/hello_sourcerygxx.ld new file mode 100644 index 0000000..165a28e --- /dev/null +++ b/boards/ek-lm4f120xl/hello/hello_sourcerygxx.ld @@ -0,0 +1,31 @@ +/****************************************************************************** + * + * hello_sourcerygxx.ld - Scatter file for Sourcery CodeBench + * + * Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. + * Software License Agreement + * + * Texas Instruments (TI) is supplying this software for use solely and + * exclusively on TI's microcontroller products. The software is owned by + * TI and/or its suppliers, and is protected under applicable copyright + * laws. You may not combine this software with "viral" open-source + * software in order to form a larger program. + * + * THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. + * NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT + * NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY + * CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL + * DAMAGES, FOR ANY REASON WHATSOEVER. + * + * This is part of revision 9453 of the EK-LM4F120XL Firmware Package. + * + *****************************************************************************/ + +/****************************************************************************** + * + * Define the end of the heap space, which determines the beginning of the + * stack space. + * + *****************************************************************************/ +__cs3_heap_end = __cs3_region_end_ram - 512; diff --git a/boards/ek-lm4f120xl/hello/readme.txt b/boards/ek-lm4f120xl/hello/readme.txt new file mode 100644 index 0000000..a68f11a --- /dev/null +++ b/boards/ek-lm4f120xl/hello/readme.txt @@ -0,0 +1,27 @@ +Hello World + +A very simple ``hello world'' example. It simply displays ``Hello World!'' +on the UART and is a starting point for more complicated applications. + +UART0, connected to the Stellaris Virtual Serial Port and running at +115,200, 8-N-1, is used to display messages from this application. + +------------------------------------------------------------------------------- + +Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +Software License Agreement + +Texas Instruments (TI) is supplying this software for use solely and +exclusively on TI's microcontroller products. The software is owned by +TI and/or its suppliers, and is protected under applicable copyright +laws. You may not combine this software with "viral" open-source +software in order to form a larger program. + +THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +DAMAGES, FOR ANY REASON WHATSOEVER. + +This is part of revision 9453 of the EK-LM4F120XL Firmware Package. diff --git a/boards/ek-lm4f120xl/hello/rvmdk/hello.axf b/boards/ek-lm4f120xl/hello/rvmdk/hello.axf new file mode 100644 index 0000000..f080678 Binary files /dev/null and b/boards/ek-lm4f120xl/hello/rvmdk/hello.axf differ diff --git a/boards/ek-lm4f120xl/hello/rvmdk/hello.bin b/boards/ek-lm4f120xl/hello/rvmdk/hello.bin new file mode 100644 index 0000000..00f0b71 Binary files /dev/null and b/boards/ek-lm4f120xl/hello/rvmdk/hello.bin differ diff --git a/boards/ek-lm4f120xl/hello/sourcerygxx/hello.axf b/boards/ek-lm4f120xl/hello/sourcerygxx/hello.axf new file mode 100644 index 0000000..e812f53 Binary files /dev/null and b/boards/ek-lm4f120xl/hello/sourcerygxx/hello.axf differ diff --git a/boards/ek-lm4f120xl/hello/sourcerygxx/hello.bin b/boards/ek-lm4f120xl/hello/sourcerygxx/hello.bin new file mode 100644 index 0000000..dac089a Binary files /dev/null and b/boards/ek-lm4f120xl/hello/sourcerygxx/hello.bin differ diff --git a/boards/ek-lm4f120xl/hello/startup_ccs.c b/boards/ek-lm4f120xl/hello/startup_ccs.c new file mode 100644 index 0000000..9f15b47 --- /dev/null +++ b/boards/ek-lm4f120xl/hello/startup_ccs.c @@ -0,0 +1,291 @@ +//***************************************************************************** +// +// startup_ccs.c - Startup code for use with TI's Code Composer Studio. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +//***************************************************************************** +// +// Forward declaration of the default fault handlers. +// +//***************************************************************************** +void ResetISR(void); +static void NmiSR(void); +static void FaultISR(void); +static void IntDefaultHandler(void); + +//***************************************************************************** +// +// External declaration for the reset handler that is to be called when the +// processor is started +// +//***************************************************************************** +extern void _c_int00(void); + +//***************************************************************************** +// +// Linker variable that marks the top of the stack. +// +//***************************************************************************** +extern unsigned long __STACK_TOP; + +//***************************************************************************** +// +// The vector table. Note that the proper constructs must be placed on this to +// ensure that it ends up at physical address 0x0000.0000 or at the start of +// the program if located at a start address other than 0. +// +//***************************************************************************** +#pragma DATA_SECTION(g_pfnVectors, ".intvecs") +void (* const g_pfnVectors[])(void) = +{ + (void (*)(void))((unsigned long)&__STACK_TOP), + // The initial stack pointer + ResetISR, // The reset handler + NmiSR, // The NMI handler + FaultISR, // The hard fault handler + IntDefaultHandler, // The MPU fault handler + IntDefaultHandler, // The bus fault handler + IntDefaultHandler, // The usage fault handler + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // SVCall handler + IntDefaultHandler, // Debug monitor handler + 0, // Reserved + IntDefaultHandler, // The PendSV handler + IntDefaultHandler, // The SysTick handler + IntDefaultHandler, // GPIO Port A + IntDefaultHandler, // GPIO Port B + IntDefaultHandler, // GPIO Port C + IntDefaultHandler, // GPIO Port D + IntDefaultHandler, // GPIO Port E + IntDefaultHandler, // UART0 Rx and Tx + IntDefaultHandler, // UART1 Rx and Tx + IntDefaultHandler, // SSI0 Rx and Tx + IntDefaultHandler, // I2C0 Master and Slave + IntDefaultHandler, // PWM Fault + IntDefaultHandler, // PWM Generator 0 + IntDefaultHandler, // PWM Generator 1 + IntDefaultHandler, // PWM Generator 2 + IntDefaultHandler, // Quadrature Encoder 0 + IntDefaultHandler, // ADC Sequence 0 + IntDefaultHandler, // ADC Sequence 1 + IntDefaultHandler, // ADC Sequence 2 + IntDefaultHandler, // ADC Sequence 3 + IntDefaultHandler, // Watchdog timer + IntDefaultHandler, // Timer 0 subtimer A + IntDefaultHandler, // Timer 0 subtimer B + IntDefaultHandler, // Timer 1 subtimer A + IntDefaultHandler, // Timer 1 subtimer B + IntDefaultHandler, // Timer 2 subtimer A + IntDefaultHandler, // Timer 2 subtimer B + IntDefaultHandler, // Analog Comparator 0 + IntDefaultHandler, // Analog Comparator 1 + IntDefaultHandler, // Analog Comparator 2 + IntDefaultHandler, // System Control (PLL, OSC, BO) + IntDefaultHandler, // FLASH Control + IntDefaultHandler, // GPIO Port F + IntDefaultHandler, // GPIO Port G + IntDefaultHandler, // GPIO Port H + IntDefaultHandler, // UART2 Rx and Tx + IntDefaultHandler, // SSI1 Rx and Tx + IntDefaultHandler, // Timer 3 subtimer A + IntDefaultHandler, // Timer 3 subtimer B + IntDefaultHandler, // I2C1 Master and Slave + IntDefaultHandler, // Quadrature Encoder 1 + IntDefaultHandler, // CAN0 + IntDefaultHandler, // CAN1 + IntDefaultHandler, // CAN2 + IntDefaultHandler, // Ethernet + IntDefaultHandler, // Hibernate + IntDefaultHandler, // USB0 + IntDefaultHandler, // PWM Generator 3 + IntDefaultHandler, // uDMA Software Transfer + IntDefaultHandler, // uDMA Error + IntDefaultHandler, // ADC1 Sequence 0 + IntDefaultHandler, // ADC1 Sequence 1 + IntDefaultHandler, // ADC1 Sequence 2 + IntDefaultHandler, // ADC1 Sequence 3 + IntDefaultHandler, // I2S0 + IntDefaultHandler, // External Bus Interface 0 + IntDefaultHandler, // GPIO Port J + IntDefaultHandler, // GPIO Port K + IntDefaultHandler, // GPIO Port L + IntDefaultHandler, // SSI2 Rx and Tx + IntDefaultHandler, // SSI3 Rx and Tx + IntDefaultHandler, // UART3 Rx and Tx + IntDefaultHandler, // UART4 Rx and Tx + IntDefaultHandler, // UART5 Rx and Tx + IntDefaultHandler, // UART6 Rx and Tx + IntDefaultHandler, // UART7 Rx and Tx + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // I2C2 Master and Slave + IntDefaultHandler, // I2C3 Master and Slave + IntDefaultHandler, // Timer 4 subtimer A + IntDefaultHandler, // Timer 4 subtimer B + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // Timer 5 subtimer A + IntDefaultHandler, // Timer 5 subtimer B + IntDefaultHandler, // Wide Timer 0 subtimer A + IntDefaultHandler, // Wide Timer 0 subtimer B + IntDefaultHandler, // Wide Timer 1 subtimer A + IntDefaultHandler, // Wide Timer 1 subtimer B + IntDefaultHandler, // Wide Timer 2 subtimer A + IntDefaultHandler, // Wide Timer 2 subtimer B + IntDefaultHandler, // Wide Timer 3 subtimer A + IntDefaultHandler, // Wide Timer 3 subtimer B + IntDefaultHandler, // Wide Timer 4 subtimer A + IntDefaultHandler, // Wide Timer 4 subtimer B + IntDefaultHandler, // Wide Timer 5 subtimer A + IntDefaultHandler, // Wide Timer 5 subtimer B + IntDefaultHandler, // FPU + IntDefaultHandler, // PECI 0 + IntDefaultHandler, // LPC 0 + IntDefaultHandler, // I2C4 Master and Slave + IntDefaultHandler, // I2C5 Master and Slave + IntDefaultHandler, // GPIO Port M + IntDefaultHandler, // GPIO Port N + IntDefaultHandler, // Quadrature Encoder 2 + IntDefaultHandler, // Fan 0 + 0, // Reserved + IntDefaultHandler, // GPIO Port P (Summary or P0) + IntDefaultHandler, // GPIO Port P1 + IntDefaultHandler, // GPIO Port P2 + IntDefaultHandler, // GPIO Port P3 + IntDefaultHandler, // GPIO Port P4 + IntDefaultHandler, // GPIO Port P5 + IntDefaultHandler, // GPIO Port P6 + IntDefaultHandler, // GPIO Port P7 + IntDefaultHandler, // GPIO Port Q (Summary or Q0) + IntDefaultHandler, // GPIO Port Q1 + IntDefaultHandler, // GPIO Port Q2 + IntDefaultHandler, // GPIO Port Q3 + IntDefaultHandler, // GPIO Port Q4 + IntDefaultHandler, // GPIO Port Q5 + IntDefaultHandler, // GPIO Port Q6 + IntDefaultHandler, // GPIO Port Q7 + IntDefaultHandler, // GPIO Port R + IntDefaultHandler, // GPIO Port S + IntDefaultHandler, // PWM 1 Generator 0 + IntDefaultHandler, // PWM 1 Generator 1 + IntDefaultHandler, // PWM 1 Generator 2 + IntDefaultHandler, // PWM 1 Generator 3 + IntDefaultHandler // PWM 1 Fault +}; + +//***************************************************************************** +// +// This is the code that gets called when the processor first starts execution +// following a reset event. Only the absolutely necessary set is performed, +// after which the application supplied entry() routine is called. Any fancy +// actions (such as making decisions based on the reset cause register, and +// resetting the bits in that register) are left solely in the hands of the +// application. +// +//***************************************************************************** +void +ResetISR(void) +{ + // + // Jump to the CCS C initialization routine. This will enable the + // floating-point unit as well, so that does not need to be done here. + // + __asm(" .global _c_int00\n" + " b.w _c_int00"); +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a NMI. This +// simply enters an infinite loop, preserving the system state for examination +// by a debugger. +// +//***************************************************************************** +static void +NmiSR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a fault +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +FaultISR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives an unexpected +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +IntDefaultHandler(void) +{ + // + // Go into an infinite loop. + // + while(1) + { + } +} diff --git a/boards/ek-lm4f120xl/hello/startup_ewarm.c b/boards/ek-lm4f120xl/hello/startup_ewarm.c new file mode 100644 index 0000000..ea56618 --- /dev/null +++ b/boards/ek-lm4f120xl/hello/startup_ewarm.c @@ -0,0 +1,325 @@ +//***************************************************************************** +// +// startup_ewarm.c - Startup code for use with IAR's Embedded Workbench, +// version 5. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +#include "inc/hw_nvic.h" +#include "inc/hw_types.h" + +//***************************************************************************** +// +// Enable the IAR extensions for this source file. +// +//***************************************************************************** +#pragma language=extended + +//***************************************************************************** +// +// Forward declaration of the default fault handlers. +// +//***************************************************************************** +void ResetISR(void); +static void NmiSR(void); +static void FaultISR(void); +static void IntDefaultHandler(void); + +//***************************************************************************** +// +// The entry point for the application startup code. +// +//***************************************************************************** +extern void __iar_program_start(void); + +//***************************************************************************** +// +// Reserve space for the system stack. +// +//***************************************************************************** +static unsigned long pulStack[128] @ ".noinit"; + +//***************************************************************************** +// +// A union that describes the entries of the vector table. The union is needed +// since the first entry is the stack pointer and the remainder are function +// pointers. +// +//***************************************************************************** +typedef union +{ + void (*pfnHandler)(void); + unsigned long ulPtr; +} +uVectorEntry; + +//***************************************************************************** +// +// The vector table. Note that the proper constructs must be placed on this to +// ensure that it ends up at physical address 0x0000.0000. +// +//***************************************************************************** +__root const uVectorEntry __vector_table[] @ ".intvec" = +{ + { .ulPtr = (unsigned long)pulStack + sizeof(pulStack) }, + // The initial stack pointer + ResetISR, // The reset handler + NmiSR, // The NMI handler + FaultISR, // The hard fault handler + IntDefaultHandler, // The MPU fault handler + IntDefaultHandler, // The bus fault handler + IntDefaultHandler, // The usage fault handler + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // SVCall handler + IntDefaultHandler, // Debug monitor handler + 0, // Reserved + IntDefaultHandler, // The PendSV handler + IntDefaultHandler, // The SysTick handler + IntDefaultHandler, // GPIO Port A + IntDefaultHandler, // GPIO Port B + IntDefaultHandler, // GPIO Port C + IntDefaultHandler, // GPIO Port D + IntDefaultHandler, // GPIO Port E + IntDefaultHandler, // UART0 Rx and Tx + IntDefaultHandler, // UART1 Rx and Tx + IntDefaultHandler, // SSI0 Rx and Tx + IntDefaultHandler, // I2C0 Master and Slave + IntDefaultHandler, // PWM Fault + IntDefaultHandler, // PWM Generator 0 + IntDefaultHandler, // PWM Generator 1 + IntDefaultHandler, // PWM Generator 2 + IntDefaultHandler, // Quadrature Encoder 0 + IntDefaultHandler, // ADC Sequence 0 + IntDefaultHandler, // ADC Sequence 1 + IntDefaultHandler, // ADC Sequence 2 + IntDefaultHandler, // ADC Sequence 3 + IntDefaultHandler, // Watchdog timer + IntDefaultHandler, // Timer 0 subtimer A + IntDefaultHandler, // Timer 0 subtimer B + IntDefaultHandler, // Timer 1 subtimer A + IntDefaultHandler, // Timer 1 subtimer B + IntDefaultHandler, // Timer 2 subtimer A + IntDefaultHandler, // Timer 2 subtimer B + IntDefaultHandler, // Analog Comparator 0 + IntDefaultHandler, // Analog Comparator 1 + IntDefaultHandler, // Analog Comparator 2 + IntDefaultHandler, // System Control (PLL, OSC, BO) + IntDefaultHandler, // FLASH Control + IntDefaultHandler, // GPIO Port F + IntDefaultHandler, // GPIO Port G + IntDefaultHandler, // GPIO Port H + IntDefaultHandler, // UART2 Rx and Tx + IntDefaultHandler, // SSI1 Rx and Tx + IntDefaultHandler, // Timer 3 subtimer A + IntDefaultHandler, // Timer 3 subtimer B + IntDefaultHandler, // I2C1 Master and Slave + IntDefaultHandler, // Quadrature Encoder 1 + IntDefaultHandler, // CAN0 + IntDefaultHandler, // CAN1 + IntDefaultHandler, // CAN2 + IntDefaultHandler, // Ethernet + IntDefaultHandler, // Hibernate + IntDefaultHandler, // USB0 + IntDefaultHandler, // PWM Generator 3 + IntDefaultHandler, // uDMA Software Transfer + IntDefaultHandler, // uDMA Error + IntDefaultHandler, // ADC1 Sequence 0 + IntDefaultHandler, // ADC1 Sequence 1 + IntDefaultHandler, // ADC1 Sequence 2 + IntDefaultHandler, // ADC1 Sequence 3 + IntDefaultHandler, // I2S0 + IntDefaultHandler, // External Bus Interface 0 + IntDefaultHandler, // GPIO Port J + IntDefaultHandler, // GPIO Port K + IntDefaultHandler, // GPIO Port L + IntDefaultHandler, // SSI2 Rx and Tx + IntDefaultHandler, // SSI3 Rx and Tx + IntDefaultHandler, // UART3 Rx and Tx + IntDefaultHandler, // UART4 Rx and Tx + IntDefaultHandler, // UART5 Rx and Tx + IntDefaultHandler, // UART6 Rx and Tx + IntDefaultHandler, // UART7 Rx and Tx + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // I2C2 Master and Slave + IntDefaultHandler, // I2C3 Master and Slave + IntDefaultHandler, // Timer 4 subtimer A + IntDefaultHandler, // Timer 4 subtimer B + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // Timer 5 subtimer A + IntDefaultHandler, // Timer 5 subtimer B + IntDefaultHandler, // Wide Timer 0 subtimer A + IntDefaultHandler, // Wide Timer 0 subtimer B + IntDefaultHandler, // Wide Timer 1 subtimer A + IntDefaultHandler, // Wide Timer 1 subtimer B + IntDefaultHandler, // Wide Timer 2 subtimer A + IntDefaultHandler, // Wide Timer 2 subtimer B + IntDefaultHandler, // Wide Timer 3 subtimer A + IntDefaultHandler, // Wide Timer 3 subtimer B + IntDefaultHandler, // Wide Timer 4 subtimer A + IntDefaultHandler, // Wide Timer 4 subtimer B + IntDefaultHandler, // Wide Timer 5 subtimer A + IntDefaultHandler, // Wide Timer 5 subtimer B + IntDefaultHandler, // FPU + IntDefaultHandler, // PECI 0 + IntDefaultHandler, // LPC 0 + IntDefaultHandler, // I2C4 Master and Slave + IntDefaultHandler, // I2C5 Master and Slave + IntDefaultHandler, // GPIO Port M + IntDefaultHandler, // GPIO Port N + IntDefaultHandler, // Quadrature Encoder 2 + IntDefaultHandler, // Fan 0 + 0, // Reserved + IntDefaultHandler, // GPIO Port P (Summary or P0) + IntDefaultHandler, // GPIO Port P1 + IntDefaultHandler, // GPIO Port P2 + IntDefaultHandler, // GPIO Port P3 + IntDefaultHandler, // GPIO Port P4 + IntDefaultHandler, // GPIO Port P5 + IntDefaultHandler, // GPIO Port P6 + IntDefaultHandler, // GPIO Port P7 + IntDefaultHandler, // GPIO Port Q (Summary or Q0) + IntDefaultHandler, // GPIO Port Q1 + IntDefaultHandler, // GPIO Port Q2 + IntDefaultHandler, // GPIO Port Q3 + IntDefaultHandler, // GPIO Port Q4 + IntDefaultHandler, // GPIO Port Q5 + IntDefaultHandler, // GPIO Port Q6 + IntDefaultHandler, // GPIO Port Q7 + IntDefaultHandler, // GPIO Port R + IntDefaultHandler, // GPIO Port S + IntDefaultHandler, // PWM 1 Generator 0 + IntDefaultHandler, // PWM 1 Generator 1 + IntDefaultHandler, // PWM 1 Generator 2 + IntDefaultHandler, // PWM 1 Generator 3 + IntDefaultHandler // PWM 1 Fault +}; + +//***************************************************************************** +// +// This is the code that gets called when the processor first starts execution +// following a reset event. Only the absolutely necessary set is performed, +// after which the application supplied entry() routine is called. Any fancy +// actions (such as making decisions based on the reset cause register, and +// resetting the bits in that register) are left solely in the hands of the +// application. +// +//***************************************************************************** +void +ResetISR(void) +{ + // + // Enable the floating-point unit. This must be done here to handle the + // case where main() uses floating-point and the function prologue saves + // floating-point registers (which will fault if floating-point is not + // enabled). Any configuration of the floating-point unit using DriverLib + // APIs must be done here prior to the floating-point unit being enabled. + // + // Note that this does not use DriverLib since it might not be included in + // this project. + // + HWREG(NVIC_CPAC) = ((HWREG(NVIC_CPAC) & + ~(NVIC_CPAC_CP10_M | NVIC_CPAC_CP11_M)) | + NVIC_CPAC_CP10_FULL | NVIC_CPAC_CP11_FULL); + + // + // Call the application's entry point. + // + __iar_program_start(); +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a NMI. This +// simply enters an infinite loop, preserving the system state for examination +// by a debugger. +// +//***************************************************************************** +static void +NmiSR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a fault +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +FaultISR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives an unexpected +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +IntDefaultHandler(void) +{ + // + // Go into an infinite loop. + // + while(1) + { + } +} diff --git a/boards/ek-lm4f120xl/hello/startup_gcc.c b/boards/ek-lm4f120xl/hello/startup_gcc.c new file mode 100644 index 0000000..4c64cd2 --- /dev/null +++ b/boards/ek-lm4f120xl/hello/startup_gcc.c @@ -0,0 +1,341 @@ +//***************************************************************************** +// +// startup_gcc.c - Startup code for use with GNU tools. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +#include "inc/hw_nvic.h" +#include "inc/hw_types.h" + +//***************************************************************************** +// +// Forward declaration of the default fault handlers. +// +//***************************************************************************** +void ResetISR(void); +static void NmiSR(void); +static void FaultISR(void); +static void IntDefaultHandler(void); + +//***************************************************************************** +// +// The entry point for the application. +// +//***************************************************************************** +extern int main(void); + +//***************************************************************************** +// +// Reserve space for the system stack. +// +//***************************************************************************** +static unsigned long pulStack[128]; + +//***************************************************************************** +// +// The vector table. Note that the proper constructs must be placed on this to +// ensure that it ends up at physical address 0x0000.0000. +// +//***************************************************************************** +__attribute__ ((section(".isr_vector"))) +void (* const g_pfnVectors[])(void) = +{ + (void (*)(void))((unsigned long)pulStack + sizeof(pulStack)), + // The initial stack pointer + ResetISR, // The reset handler + NmiSR, // The NMI handler + FaultISR, // The hard fault handler + IntDefaultHandler, // The MPU fault handler + IntDefaultHandler, // The bus fault handler + IntDefaultHandler, // The usage fault handler + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // SVCall handler + IntDefaultHandler, // Debug monitor handler + 0, // Reserved + IntDefaultHandler, // The PendSV handler + IntDefaultHandler, // The SysTick handler + IntDefaultHandler, // GPIO Port A + IntDefaultHandler, // GPIO Port B + IntDefaultHandler, // GPIO Port C + IntDefaultHandler, // GPIO Port D + IntDefaultHandler, // GPIO Port E + IntDefaultHandler, // UART0 Rx and Tx + IntDefaultHandler, // UART1 Rx and Tx + IntDefaultHandler, // SSI0 Rx and Tx + IntDefaultHandler, // I2C0 Master and Slave + IntDefaultHandler, // PWM Fault + IntDefaultHandler, // PWM Generator 0 + IntDefaultHandler, // PWM Generator 1 + IntDefaultHandler, // PWM Generator 2 + IntDefaultHandler, // Quadrature Encoder 0 + IntDefaultHandler, // ADC Sequence 0 + IntDefaultHandler, // ADC Sequence 1 + IntDefaultHandler, // ADC Sequence 2 + IntDefaultHandler, // ADC Sequence 3 + IntDefaultHandler, // Watchdog timer + IntDefaultHandler, // Timer 0 subtimer A + IntDefaultHandler, // Timer 0 subtimer B + IntDefaultHandler, // Timer 1 subtimer A + IntDefaultHandler, // Timer 1 subtimer B + IntDefaultHandler, // Timer 2 subtimer A + IntDefaultHandler, // Timer 2 subtimer B + IntDefaultHandler, // Analog Comparator 0 + IntDefaultHandler, // Analog Comparator 1 + IntDefaultHandler, // Analog Comparator 2 + IntDefaultHandler, // System Control (PLL, OSC, BO) + IntDefaultHandler, // FLASH Control + IntDefaultHandler, // GPIO Port F + IntDefaultHandler, // GPIO Port G + IntDefaultHandler, // GPIO Port H + IntDefaultHandler, // UART2 Rx and Tx + IntDefaultHandler, // SSI1 Rx and Tx + IntDefaultHandler, // Timer 3 subtimer A + IntDefaultHandler, // Timer 3 subtimer B + IntDefaultHandler, // I2C1 Master and Slave + IntDefaultHandler, // Quadrature Encoder 1 + IntDefaultHandler, // CAN0 + IntDefaultHandler, // CAN1 + IntDefaultHandler, // CAN2 + IntDefaultHandler, // Ethernet + IntDefaultHandler, // Hibernate + IntDefaultHandler, // USB0 + IntDefaultHandler, // PWM Generator 3 + IntDefaultHandler, // uDMA Software Transfer + IntDefaultHandler, // uDMA Error + IntDefaultHandler, // ADC1 Sequence 0 + IntDefaultHandler, // ADC1 Sequence 1 + IntDefaultHandler, // ADC1 Sequence 2 + IntDefaultHandler, // ADC1 Sequence 3 + IntDefaultHandler, // I2S0 + IntDefaultHandler, // External Bus Interface 0 + IntDefaultHandler, // GPIO Port J + IntDefaultHandler, // GPIO Port K + IntDefaultHandler, // GPIO Port L + IntDefaultHandler, // SSI2 Rx and Tx + IntDefaultHandler, // SSI3 Rx and Tx + IntDefaultHandler, // UART3 Rx and Tx + IntDefaultHandler, // UART4 Rx and Tx + IntDefaultHandler, // UART5 Rx and Tx + IntDefaultHandler, // UART6 Rx and Tx + IntDefaultHandler, // UART7 Rx and Tx + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // I2C2 Master and Slave + IntDefaultHandler, // I2C3 Master and Slave + IntDefaultHandler, // Timer 4 subtimer A + IntDefaultHandler, // Timer 4 subtimer B + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // Timer 5 subtimer A + IntDefaultHandler, // Timer 5 subtimer B + IntDefaultHandler, // Wide Timer 0 subtimer A + IntDefaultHandler, // Wide Timer 0 subtimer B + IntDefaultHandler, // Wide Timer 1 subtimer A + IntDefaultHandler, // Wide Timer 1 subtimer B + IntDefaultHandler, // Wide Timer 2 subtimer A + IntDefaultHandler, // Wide Timer 2 subtimer B + IntDefaultHandler, // Wide Timer 3 subtimer A + IntDefaultHandler, // Wide Timer 3 subtimer B + IntDefaultHandler, // Wide Timer 4 subtimer A + IntDefaultHandler, // Wide Timer 4 subtimer B + IntDefaultHandler, // Wide Timer 5 subtimer A + IntDefaultHandler, // Wide Timer 5 subtimer B + IntDefaultHandler, // FPU + IntDefaultHandler, // PECI 0 + IntDefaultHandler, // LPC 0 + IntDefaultHandler, // I2C4 Master and Slave + IntDefaultHandler, // I2C5 Master and Slave + IntDefaultHandler, // GPIO Port M + IntDefaultHandler, // GPIO Port N + IntDefaultHandler, // Quadrature Encoder 2 + IntDefaultHandler, // Fan 0 + 0, // Reserved + IntDefaultHandler, // GPIO Port P (Summary or P0) + IntDefaultHandler, // GPIO Port P1 + IntDefaultHandler, // GPIO Port P2 + IntDefaultHandler, // GPIO Port P3 + IntDefaultHandler, // GPIO Port P4 + IntDefaultHandler, // GPIO Port P5 + IntDefaultHandler, // GPIO Port P6 + IntDefaultHandler, // GPIO Port P7 + IntDefaultHandler, // GPIO Port Q (Summary or Q0) + IntDefaultHandler, // GPIO Port Q1 + IntDefaultHandler, // GPIO Port Q2 + IntDefaultHandler, // GPIO Port Q3 + IntDefaultHandler, // GPIO Port Q4 + IntDefaultHandler, // GPIO Port Q5 + IntDefaultHandler, // GPIO Port Q6 + IntDefaultHandler, // GPIO Port Q7 + IntDefaultHandler, // GPIO Port R + IntDefaultHandler, // GPIO Port S + IntDefaultHandler, // PWM 1 Generator 0 + IntDefaultHandler, // PWM 1 Generator 1 + IntDefaultHandler, // PWM 1 Generator 2 + IntDefaultHandler, // PWM 1 Generator 3 + IntDefaultHandler // PWM 1 Fault +}; + +//***************************************************************************** +// +// The following are constructs created by the linker, indicating where the +// the "data" and "bss" segments reside in memory. The initializers for the +// for the "data" segment resides immediately following the "text" segment. +// +//***************************************************************************** +extern unsigned long _etext; +extern unsigned long _data; +extern unsigned long _edata; +extern unsigned long _bss; +extern unsigned long _ebss; + +//***************************************************************************** +// +// This is the code that gets called when the processor first starts execution +// following a reset event. Only the absolutely necessary set is performed, +// after which the application supplied entry() routine is called. Any fancy +// actions (such as making decisions based on the reset cause register, and +// resetting the bits in that register) are left solely in the hands of the +// application. +// +//***************************************************************************** +void +ResetISR(void) +{ + unsigned long *pulSrc, *pulDest; + + // + // Copy the data segment initializers from flash to SRAM. + // + pulSrc = &_etext; + for(pulDest = &_data; pulDest < &_edata; ) + { + *pulDest++ = *pulSrc++; + } + + // + // Zero fill the bss segment. + // + __asm(" ldr r0, =_bss\n" + " ldr r1, =_ebss\n" + " mov r2, #0\n" + " .thumb_func\n" + "zero_loop:\n" + " cmp r0, r1\n" + " it lt\n" + " strlt r2, [r0], #4\n" + " blt zero_loop"); + + // + // Enable the floating-point unit. This must be done here to handle the + // case where main() uses floating-point and the function prologue saves + // floating-point registers (which will fault if floating-point is not + // enabled). Any configuration of the floating-point unit using DriverLib + // APIs must be done here prior to the floating-point unit being enabled. + // + // Note that this does not use DriverLib since it might not be included in + // this project. + // + HWREG(NVIC_CPAC) = ((HWREG(NVIC_CPAC) & + ~(NVIC_CPAC_CP10_M | NVIC_CPAC_CP11_M)) | + NVIC_CPAC_CP10_FULL | NVIC_CPAC_CP11_FULL); + + // + // Call the application's entry point. + // + main(); +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a NMI. This +// simply enters an infinite loop, preserving the system state for examination +// by a debugger. +// +//***************************************************************************** +static void +NmiSR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a fault +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +FaultISR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives an unexpected +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +IntDefaultHandler(void) +{ + // + // Go into an infinite loop. + // + while(1) + { + } +} diff --git a/boards/ek-lm4f120xl/hello/startup_rvmdk.S b/boards/ek-lm4f120xl/hello/startup_rvmdk.S new file mode 100644 index 0000000..5de7fdc --- /dev/null +++ b/boards/ek-lm4f120xl/hello/startup_rvmdk.S @@ -0,0 +1,351 @@ +; <<< Use Configuration Wizard in Context Menu >>> +;****************************************************************************** +; +; startup_rvmdk.S - Startup code for use with Keil's uVision. +; +; Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +; Software License Agreement +; +; Texas Instruments (TI) is supplying this software for use solely and +; exclusively on TI's microcontroller products. The software is owned by +; TI and/or its suppliers, and is protected under applicable copyright +; laws. You may not combine this software with "viral" open-source +; software in order to form a larger program. +; +; THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +; NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +; NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +; A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +; CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +; DAMAGES, FOR ANY REASON WHATSOEVER. +; +; This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +; +;****************************************************************************** + +;****************************************************************************** +; +; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +; +;****************************************************************************** +Stack EQU 0x00000200 + +;****************************************************************************** +; +; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> +; +;****************************************************************************** +Heap EQU 0x00000000 + +;****************************************************************************** +; +; Allocate space for the stack. +; +;****************************************************************************** + AREA STACK, NOINIT, READWRITE, ALIGN=3 +StackMem + SPACE Stack +__initial_sp + +;****************************************************************************** +; +; Allocate space for the heap. +; +;****************************************************************************** + AREA HEAP, NOINIT, READWRITE, ALIGN=3 +__heap_base +HeapMem + SPACE Heap +__heap_limit + +;****************************************************************************** +; +; Indicate that the code in this file preserves 8-byte alignment of the stack. +; +;****************************************************************************** + PRESERVE8 + +;****************************************************************************** +; +; Place code into the reset code section. +; +;****************************************************************************** + AREA RESET, CODE, READONLY + THUMB + +;****************************************************************************** +; +; The vector table. +; +;****************************************************************************** + EXPORT __Vectors +__Vectors + DCD StackMem + Stack ; Top of Stack + DCD Reset_Handler ; Reset Handler + DCD NmiSR ; NMI Handler + DCD FaultISR ; Hard Fault Handler + DCD IntDefaultHandler ; The MPU fault handler + DCD IntDefaultHandler ; The bus fault handler + DCD IntDefaultHandler ; The usage fault handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD IntDefaultHandler ; SVCall handler + DCD IntDefaultHandler ; Debug monitor handler + DCD 0 ; Reserved + DCD IntDefaultHandler ; The PendSV handler + DCD IntDefaultHandler ; The SysTick handler + DCD IntDefaultHandler ; GPIO Port A + DCD IntDefaultHandler ; GPIO Port B + DCD IntDefaultHandler ; GPIO Port C + DCD IntDefaultHandler ; GPIO Port D + DCD IntDefaultHandler ; GPIO Port E + DCD IntDefaultHandler ; UART0 Rx and Tx + DCD IntDefaultHandler ; UART1 Rx and Tx + DCD IntDefaultHandler ; SSI0 Rx and Tx + DCD IntDefaultHandler ; I2C0 Master and Slave + DCD IntDefaultHandler ; PWM Fault + DCD IntDefaultHandler ; PWM Generator 0 + DCD IntDefaultHandler ; PWM Generator 1 + DCD IntDefaultHandler ; PWM Generator 2 + DCD IntDefaultHandler ; Quadrature Encoder 0 + DCD IntDefaultHandler ; ADC Sequence 0 + DCD IntDefaultHandler ; ADC Sequence 1 + DCD IntDefaultHandler ; ADC Sequence 2 + DCD IntDefaultHandler ; ADC Sequence 3 + DCD IntDefaultHandler ; Watchdog timer + DCD IntDefaultHandler ; Timer 0 subtimer A + DCD IntDefaultHandler ; Timer 0 subtimer B + DCD IntDefaultHandler ; Timer 1 subtimer A + DCD IntDefaultHandler ; Timer 1 subtimer B + DCD IntDefaultHandler ; Timer 2 subtimer A + DCD IntDefaultHandler ; Timer 2 subtimer B + DCD IntDefaultHandler ; Analog Comparator 0 + DCD IntDefaultHandler ; Analog Comparator 1 + DCD IntDefaultHandler ; Analog Comparator 2 + DCD IntDefaultHandler ; System Control (PLL, OSC, BO) + DCD IntDefaultHandler ; FLASH Control + DCD IntDefaultHandler ; GPIO Port F + DCD IntDefaultHandler ; GPIO Port G + DCD IntDefaultHandler ; GPIO Port H + DCD IntDefaultHandler ; UART2 Rx and Tx + DCD IntDefaultHandler ; SSI1 Rx and Tx + DCD IntDefaultHandler ; Timer 3 subtimer A + DCD IntDefaultHandler ; Timer 3 subtimer B + DCD IntDefaultHandler ; I2C1 Master and Slave + DCD IntDefaultHandler ; Quadrature Encoder 1 + DCD IntDefaultHandler ; CAN0 + DCD IntDefaultHandler ; CAN1 + DCD IntDefaultHandler ; CAN2 + DCD IntDefaultHandler ; Ethernet + DCD IntDefaultHandler ; Hibernate + DCD IntDefaultHandler ; USB0 + DCD IntDefaultHandler ; PWM Generator 3 + DCD IntDefaultHandler ; uDMA Software Transfer + DCD IntDefaultHandler ; uDMA Error + DCD IntDefaultHandler ; ADC1 Sequence 0 + DCD IntDefaultHandler ; ADC1 Sequence 1 + DCD IntDefaultHandler ; ADC1 Sequence 2 + DCD IntDefaultHandler ; ADC1 Sequence 3 + DCD IntDefaultHandler ; I2S0 + DCD IntDefaultHandler ; External Bus Interface 0 + DCD IntDefaultHandler ; GPIO Port J + DCD IntDefaultHandler ; GPIO Port K + DCD IntDefaultHandler ; GPIO Port L + DCD IntDefaultHandler ; SSI2 Rx and Tx + DCD IntDefaultHandler ; SSI3 Rx and Tx + DCD IntDefaultHandler ; UART3 Rx and Tx + DCD IntDefaultHandler ; UART4 Rx and Tx + DCD IntDefaultHandler ; UART5 Rx and Tx + DCD IntDefaultHandler ; UART6 Rx and Tx + DCD IntDefaultHandler ; UART7 Rx and Tx + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD IntDefaultHandler ; I2C2 Master and Slave + DCD IntDefaultHandler ; I2C3 Master and Slave + DCD IntDefaultHandler ; Timer 4 subtimer A + DCD IntDefaultHandler ; Timer 4 subtimer B + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD IntDefaultHandler ; Timer 5 subtimer A + DCD IntDefaultHandler ; Timer 5 subtimer B + DCD IntDefaultHandler ; Wide Timer 0 subtimer A + DCD IntDefaultHandler ; Wide Timer 0 subtimer B + DCD IntDefaultHandler ; Wide Timer 1 subtimer A + DCD IntDefaultHandler ; Wide Timer 1 subtimer B + DCD IntDefaultHandler ; Wide Timer 2 subtimer A + DCD IntDefaultHandler ; Wide Timer 2 subtimer B + DCD IntDefaultHandler ; Wide Timer 3 subtimer A + DCD IntDefaultHandler ; Wide Timer 3 subtimer B + DCD IntDefaultHandler ; Wide Timer 4 subtimer A + DCD IntDefaultHandler ; Wide Timer 4 subtimer B + DCD IntDefaultHandler ; Wide Timer 5 subtimer A + DCD IntDefaultHandler ; Wide Timer 5 subtimer B + DCD IntDefaultHandler ; FPU + DCD IntDefaultHandler ; PECI 0 + DCD IntDefaultHandler ; LPC 0 + DCD IntDefaultHandler ; I2C4 Master and Slave + DCD IntDefaultHandler ; I2C5 Master and Slave + DCD IntDefaultHandler ; GPIO Port M + DCD IntDefaultHandler ; GPIO Port N + DCD IntDefaultHandler ; Quadrature Encoder 2 + DCD IntDefaultHandler ; Fan 0 + DCD 0 ; Reserved + DCD IntDefaultHandler ; GPIO Port P (Summary or P0) + DCD IntDefaultHandler ; GPIO Port P1 + DCD IntDefaultHandler ; GPIO Port P2 + DCD IntDefaultHandler ; GPIO Port P3 + DCD IntDefaultHandler ; GPIO Port P4 + DCD IntDefaultHandler ; GPIO Port P5 + DCD IntDefaultHandler ; GPIO Port P6 + DCD IntDefaultHandler ; GPIO Port P7 + DCD IntDefaultHandler ; GPIO Port Q (Summary or Q0) + DCD IntDefaultHandler ; GPIO Port Q1 + DCD IntDefaultHandler ; GPIO Port Q2 + DCD IntDefaultHandler ; GPIO Port Q3 + DCD IntDefaultHandler ; GPIO Port Q4 + DCD IntDefaultHandler ; GPIO Port Q5 + DCD IntDefaultHandler ; GPIO Port Q6 + DCD IntDefaultHandler ; GPIO Port Q7 + DCD IntDefaultHandler ; GPIO Port R + DCD IntDefaultHandler ; GPIO Port S + DCD IntDefaultHandler ; PWM 1 Generator 0 + DCD IntDefaultHandler ; PWM 1 Generator 1 + DCD IntDefaultHandler ; PWM 1 Generator 2 + DCD IntDefaultHandler ; PWM 1 Generator 3 + DCD IntDefaultHandler ; PWM 1 Fault + +;****************************************************************************** +; +; This is the code that gets called when the processor first starts execution +; following a reset event. +; +;****************************************************************************** + EXPORT Reset_Handler +Reset_Handler + ; + ; Enable the floating-point unit. This must be done here to handle the + ; case where main() uses floating-point and the function prologue saves + ; floating-point registers (which will fault if floating-point is not + ; enabled). Any configuration of the floating-point unit using + ; DriverLib APIs must be done here prior to the floating-point unit + ; being enabled. + ; + ; Note that this does not use DriverLib since it might not be included + ; in this project. + ; + MOVW R0, #0xED88 + MOVT R0, #0xE000 + LDR R1, [R0] + ORR R1, #0x00F00000 + STR R1, [R0] + + ; + ; Call the C library enty point that handles startup. This will copy + ; the .data section initializers from flash to SRAM and zero fill the + ; .bss section. + ; + IMPORT __main + B __main + +;****************************************************************************** +; +; This is the code that gets called when the processor receives a NMI. This +; simply enters an infinite loop, preserving the system state for examination +; by a debugger. +; +;****************************************************************************** +NmiSR + B NmiSR + +;****************************************************************************** +; +; This is the code that gets called when the processor receives a fault +; interrupt. This simply enters an infinite loop, preserving the system state +; for examination by a debugger. +; +;****************************************************************************** +FaultISR + B FaultISR + +;****************************************************************************** +; +; This is the code that gets called when the processor receives an unexpected +; interrupt. This simply enters an infinite loop, preserving the system state +; for examination by a debugger. +; +;****************************************************************************** +IntDefaultHandler + B IntDefaultHandler + +;****************************************************************************** +; +; Make sure the end of this section is aligned. +; +;****************************************************************************** + ALIGN + +;****************************************************************************** +; +; Some code in the normal code section for initializing the heap and stack. +; +;****************************************************************************** + AREA |.text|, CODE, READONLY + +;****************************************************************************** +; +; The function expected of the C library startup code for defining the stack +; and heap memory locations. For the C library version of the startup code, +; provide this function so that the C library initialization code can find out +; the location of the stack and heap. +; +;****************************************************************************** + IF :DEF: __MICROLIB + EXPORT __initial_sp + EXPORT __heap_base + EXPORT __heap_limit + ELSE + IMPORT __use_two_region_memory + EXPORT __user_initial_stackheap +__user_initial_stackheap + LDR R0, =HeapMem + LDR R1, =(StackMem + Stack) + LDR R2, =(HeapMem + Heap) + LDR R3, =StackMem + BX LR + ENDIF + +;****************************************************************************** +; +; Make sure the end of this section is aligned. +; +;****************************************************************************** + ALIGN + +;****************************************************************************** +; +; Tell the assembler that we're done. +; +;****************************************************************************** + END diff --git a/boards/ek-lm4f120xl/hello/startup_sourcerygxx.S b/boards/ek-lm4f120xl/hello/startup_sourcerygxx.S new file mode 100644 index 0000000..b720839 --- /dev/null +++ b/boards/ek-lm4f120xl/hello/startup_sourcerygxx.S @@ -0,0 +1,75 @@ +//***************************************************************************** +// +// startup_sourcerygxx.S - Startup code for Sourcery CodeBench. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + + .syntax unified + .thumb + +//***************************************************************************** +// +// Place this code into the .cs3.reset section so that it can be executed prior +// to the startup code in Sourcery CodeBench. +// +//***************************************************************************** + .section .cs3.reset,"x" + +//***************************************************************************** +// +// The reset handler, which overrides the one provided by CS3. +// +//***************************************************************************** + .globl __cs3_reset + .thumb_func +__cs3_reset: + // + // Enable the floating-point unit. This must be done here to handle the + // case where main() uses floating-point and the function prologue saves + // floating-point registers (which will fault if floating-point is not + // enabled). Any configuration of the floating-point unit using DriverLib + // APIs must be done here prior to the floating-point unit being enabled. + // + // Note that this does not use DriverLib since it might not be included in + // this project. + // + movw r0, #0xed88 + movt r0, #0xe000 + ldr r1, [r0] + orr r1, #0x00f00000 + str r1, [r0] + + // + // Branch to the normal CS3 startup code. + // + .extern __cs3_reset_ekc_lm4f232 + ldr r0, =__cs3_reset_ekc_lm4f232 + bx r0 + + // + // Place the literal pool here. + // + .ltorg + + // + // The end of the file. + // + .end diff --git a/boards/ek-lm4f120xl/interrupts/Makefile b/boards/ek-lm4f120xl/interrupts/Makefile new file mode 100644 index 0000000..99f505f --- /dev/null +++ b/boards/ek-lm4f120xl/interrupts/Makefile @@ -0,0 +1,90 @@ +#****************************************************************************** +# +# Makefile - Rules for building the interrupts example. +# +# Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +# Software License Agreement +# +# Texas Instruments (TI) is supplying this software for use solely and +# exclusively on TI's microcontroller products. The software is owned by +# TI and/or its suppliers, and is protected under applicable copyright +# laws. You may not combine this software with "viral" open-source +# software in order to form a larger program. +# +# THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +# NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +# NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +# A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +# CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +# DAMAGES, FOR ANY REASON WHATSOEVER. +# +# This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +# +#****************************************************************************** + +# +# Defines the part type that this project uses. +# +PART=LM4F120H5QR + +# +# Set the processor variant. +# +VARIANT=cm4f + +# +# The base directory for StellarisWare. +# +ROOT=../../.. + +# +# Include the common make definitions. +# +include ${ROOT}/makedefs + +# +# Where to find source files that do not live in this directory. +# +VPATH=../../../utils + +# +# Where to find header files that do not live in the source directory. +# +IPATH=../../.. + +# +# The default rule, which causes the interrupts example to be built. +# +all: ${COMPILER} +all: ${COMPILER}/interrupts.axf + +# +# The rule to clean out all the build products. +# +clean: + @rm -rf ${COMPILER} ${wildcard *~} + +# +# The rule to create the target directory. +# +${COMPILER}: + @mkdir -p ${COMPILER} + +# +# Rules for building the interrupts example. +# +${COMPILER}/interrupts.axf: ${COMPILER}/interrupts.o +${COMPILER}/interrupts.axf: ${COMPILER}/startup_${COMPILER}.o +${COMPILER}/interrupts.axf: ${COMPILER}/uartstdio.o +${COMPILER}/interrupts.axf: ${ROOT}/driverlib/${COMPILER}-cm4f/libdriver-cm4f.a +${COMPILER}/interrupts.axf: interrupts.ld +SCATTERgcc_interrupts=interrupts.ld +ENTRY_interrupts=ResetISR +CFLAGSgcc=-DTARGET_IS_BLIZZARD_RA1 + +# +# Include the automatically generated dependency files. +# +ifneq (${MAKECMDGOALS},clean) +-include ${wildcard ${COMPILER}/*.d} __dummy__ +endif diff --git a/boards/ek-lm4f120xl/interrupts/ccs/.ccsimportspec b/boards/ek-lm4f120xl/interrupts/ccs/.ccsimportspec new file mode 100644 index 0000000..9033256 --- /dev/null +++ b/boards/ek-lm4f120xl/interrupts/ccs/.ccsimportspec @@ -0,0 +1,8 @@ + + + + + + + + diff --git a/boards/ek-lm4f120xl/interrupts/ccs/.ccsproject b/boards/ek-lm4f120xl/interrupts/ccs/.ccsproject new file mode 100644 index 0000000..56793f4 --- /dev/null +++ b/boards/ek-lm4f120xl/interrupts/ccs/.ccsproject @@ -0,0 +1,12 @@ + + + + + + + + + + + + diff --git a/boards/ek-lm4f120xl/interrupts/ccs/.cproject b/boards/ek-lm4f120xl/interrupts/ccs/.cproject new file mode 100644 index 0000000..35660f1 --- /dev/null +++ b/boards/ek-lm4f120xl/interrupts/ccs/.cproject @@ -0,0 +1,191 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/boards/ek-lm4f120xl/interrupts/ccs/.project b/boards/ek-lm4f120xl/interrupts/ccs/.project new file mode 100644 index 0000000..f1706a1 --- /dev/null +++ b/boards/ek-lm4f120xl/interrupts/ccs/.project @@ -0,0 +1,111 @@ + + + interrupts + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + + + ?name? + + + + org.eclipse.cdt.make.core.append_environment + true + + + org.eclipse.cdt.make.core.autoBuildTarget + all + + + org.eclipse.cdt.make.core.buildArguments + -k + + + org.eclipse.cdt.make.core.buildCommand + ${CCS_UTILS_DIR}/bin/gmake + + + org.eclipse.cdt.make.core.buildLocation + ${BuildDirectory} + + + org.eclipse.cdt.make.core.cleanBuildTarget + clean + + + org.eclipse.cdt.make.core.contents + org.eclipse.cdt.make.core.activeConfigSettings + + + org.eclipse.cdt.make.core.enableAutoBuild + true + + + org.eclipse.cdt.make.core.enableCleanBuild + true + + + org.eclipse.cdt.make.core.enableFullBuild + true + + + org.eclipse.cdt.make.core.fullBuildTarget + all + + + org.eclipse.cdt.make.core.stopOnError + false + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + true + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + com.ti.ccstudio.core.ccsNature + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.core.ccnature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + interrupts.c + 1 + SW_ROOT/boards/ek-lm4f120xl/interrupts/interrupts.c + + + interrupts_ccs.cmd + 1 + SW_ROOT/boards/ek-lm4f120xl/interrupts/interrupts_ccs.cmd + + + startup_ccs.c + 1 + SW_ROOT/boards/ek-lm4f120xl/interrupts/startup_ccs.c + + + utils/uartstdio.c + 1 + SW_ROOT/utils/uartstdio.c + + + + + SW_ROOT + $%7BPARENT-4-PROJECT_LOC%7D + + + diff --git a/boards/ek-lm4f120xl/interrupts/ccs/.settings/org.eclipse.cdt.codan.core.prefs b/boards/ek-lm4f120xl/interrupts/ccs/.settings/org.eclipse.cdt.codan.core.prefs new file mode 100644 index 0000000..98b6350 --- /dev/null +++ b/boards/ek-lm4f120xl/interrupts/ccs/.settings/org.eclipse.cdt.codan.core.prefs @@ -0,0 +1,3 @@ +eclipse.preferences.version=1 +inEditor=false +onBuild=false diff --git a/boards/ek-lm4f120xl/interrupts/ccs/Debug/interrupts.bin b/boards/ek-lm4f120xl/interrupts/ccs/Debug/interrupts.bin new file mode 100644 index 0000000..09b39ac Binary files /dev/null and b/boards/ek-lm4f120xl/interrupts/ccs/Debug/interrupts.bin differ diff --git a/boards/ek-lm4f120xl/interrupts/ccs/Debug/interrupts.out b/boards/ek-lm4f120xl/interrupts/ccs/Debug/interrupts.out new file mode 100644 index 0000000..e279fdb Binary files /dev/null and b/boards/ek-lm4f120xl/interrupts/ccs/Debug/interrupts.out differ diff --git a/boards/ek-lm4f120xl/interrupts/ccs/macros.ini_initial b/boards/ek-lm4f120xl/interrupts/ccs/macros.ini_initial new file mode 100644 index 0000000..588017d --- /dev/null +++ b/boards/ek-lm4f120xl/interrupts/ccs/macros.ini_initial @@ -0,0 +1 @@ +SW_ROOT = ../../../.. diff --git a/boards/ek-lm4f120xl/interrupts/ccs/target_config.ccxml b/boards/ek-lm4f120xl/interrupts/ccs/target_config.ccxml new file mode 100644 index 0000000..469eea0 --- /dev/null +++ b/boards/ek-lm4f120xl/interrupts/ccs/target_config.ccxml @@ -0,0 +1,13 @@ + + + + + + + + + + + + + diff --git a/boards/ek-lm4f120xl/interrupts/ewarm/Exe/interrupts.bin b/boards/ek-lm4f120xl/interrupts/ewarm/Exe/interrupts.bin new file mode 100644 index 0000000..2cc8970 Binary files /dev/null and b/boards/ek-lm4f120xl/interrupts/ewarm/Exe/interrupts.bin differ diff --git a/boards/ek-lm4f120xl/interrupts/ewarm/Exe/interrupts.out b/boards/ek-lm4f120xl/interrupts/ewarm/Exe/interrupts.out new file mode 100644 index 0000000..251227f Binary files /dev/null and b/boards/ek-lm4f120xl/interrupts/ewarm/Exe/interrupts.out differ diff --git a/boards/ek-lm4f120xl/interrupts/gcc/interrupts.axf b/boards/ek-lm4f120xl/interrupts/gcc/interrupts.axf new file mode 100644 index 0000000..102a67d Binary files /dev/null and b/boards/ek-lm4f120xl/interrupts/gcc/interrupts.axf differ diff --git a/boards/ek-lm4f120xl/interrupts/gcc/interrupts.bin b/boards/ek-lm4f120xl/interrupts/gcc/interrupts.bin new file mode 100644 index 0000000..beab1a7 Binary files /dev/null and b/boards/ek-lm4f120xl/interrupts/gcc/interrupts.bin differ diff --git a/boards/ek-lm4f120xl/interrupts/interrupts.c b/boards/ek-lm4f120xl/interrupts/interrupts.c new file mode 100644 index 0000000..b6f4622 --- /dev/null +++ b/boards/ek-lm4f120xl/interrupts/interrupts.c @@ -0,0 +1,514 @@ +//***************************************************************************** +// +// interrupts.c - Interrupt preemption and tail-chaining example. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +#include "inc/hw_ints.h" +#include "inc/hw_memmap.h" +#include "inc/hw_nvic.h" +#include "inc/hw_types.h" +#include "driverlib/debug.h" +#include "driverlib/fpu.h" +#include "driverlib/gpio.h" +#include "driverlib/interrupt.h" +#include "driverlib/pin_map.h" +#include "driverlib/rom.h" +#include "driverlib/sysctl.h" +#include "driverlib/systick.h" +#include "utils/uartstdio.h" + +//***************************************************************************** +// +//! \addtogroup example_list +//!

Interrupts (interrupts)

+//! +//! This example application demonstrates the interrupt preemption and +//! tail-chaining capabilities of Cortex-M4 microprocessor and NVIC. Nested +//! interrupts are synthesized when the interrupts have the same priority, +//! increasing priorities, and decreasing priorities. With increasing +//! priorities, preemption will occur; in the other two cases tail-chaining +//! will occur. The currently pending interrupts and the currently executing +//! interrupt will be displayed on the display; GPIO pins E1, E2 and E3 will +//! be asserted upon interrupt handler entry and de-asserted before interrupt +//! handler exit so that the off-to-on time can be observed with a scope or +//! logic analyzer to see the speed of tail-chaining (for the two cases where +//! tail-chaining is occurring). +// +//***************************************************************************** + + +//***************************************************************************** +// +// The count of interrupts received. This is incremented as each interrupt +// handler runs, and its value saved into interrupt handler specific values to +// determine the order in which the interrupt handlers were executed. +// +//***************************************************************************** +volatile unsigned long g_ulIndex; + +//***************************************************************************** +// +// The value of g_ulIndex when the INT_GPIOA interrupt was processed. +// +//***************************************************************************** +volatile unsigned long g_ulGPIOa; + +//***************************************************************************** +// +// The value of g_ulIndex when the INT_GPIOB interrupt was processed. +// +//***************************************************************************** +volatile unsigned long g_ulGPIOb; + +//***************************************************************************** +// +// The value of g_ulIndex when the INT_GPIOC interrupt was processed. +// +//***************************************************************************** +volatile unsigned long g_ulGPIOc; + +//***************************************************************************** +// +// The error routine that is called if the driver library encounters an error. +// +//***************************************************************************** +#ifdef DEBUG +void +__error__(char *pcFilename, unsigned long ulLine) +{ +} +#endif + +//***************************************************************************** +// +// Delay for the specified number of seconds. Depending upon the current +// SysTick value, the delay will be between N-1 and N seconds (i.e. N-1 full +// seconds are guaranteed, along with the remainder of the current second). +// +//***************************************************************************** +void +Delay(unsigned long ulSeconds) +{ + // + // Loop while there are more seconds to wait. + // + while(ulSeconds--) + { + // + // Wait until the SysTick value is less than 1000. + // + while(ROM_SysTickValueGet() > 1000) + { + } + + // + // Wait until the SysTick value is greater than 1000. + // + while(ROM_SysTickValueGet() < 1000) + { + } + } +} + +//***************************************************************************** +// +// Display the interrupt state on the UART. The currently active and pending +// interrupts are displayed. +// +//***************************************************************************** +void +DisplayIntStatus(void) +{ + unsigned long ulTemp; + + // + // Display the currently active interrupts. + // + ulTemp = HWREG(NVIC_ACTIVE0); + UARTprintf("\rActive: %c%c%c ", (ulTemp & 1) ? '1' : ' ', + (ulTemp & 2) ? '2' : ' ', (ulTemp & 4) ? '3' : ' '); + + // + // Display the currently pending interrupts. + // + ulTemp = HWREG(NVIC_PEND0); + UARTprintf("Pending: %c%c%c", (ulTemp & 1) ? '1' : ' ', + (ulTemp & 2) ? '2' : ' ', (ulTemp & 4) ? '3' : ' '); +} + +//***************************************************************************** +// +// This is the handler for INT_GPIOA. It simply saves the interrupt sequence +// number. +// +//***************************************************************************** +void +IntGPIOa(void) +{ + // + // Set PE1 high to indicate entry to this interrupt handler. + // + ROM_GPIOPinWrite(GPIO_PORTE_BASE, GPIO_PIN_1, GPIO_PIN_1); + + // + // Put the current interrupt state on the display. + // + DisplayIntStatus(); + + // + // Wait two seconds. + // + Delay(2); + + // + // Save and increment the interrupt sequence number. + // + g_ulGPIOa = g_ulIndex++; + + // + // Set PE1 low to indicate exit from this interrupt handler. + // + ROM_GPIOPinWrite(GPIO_PORTE_BASE, GPIO_PIN_1, 0); +} + +//***************************************************************************** +// +// This is the handler for INT_GPIOB. It triggers INT_GPIOA and saves the +// interrupt sequence number. +// +//***************************************************************************** +void +IntGPIOb(void) +{ + // + // Set PE2 high to indicate entry to this interrupt handler. + // + ROM_GPIOPinWrite(GPIO_PORTE_BASE, GPIO_PIN_2, GPIO_PIN_2); + + // + // Put the current interrupt state on the display. + // + DisplayIntStatus(); + + // + // Trigger the INT_GPIOA interrupt. + // + HWREG(NVIC_SW_TRIG) = INT_GPIOA - 16; + + // + // Put the current interrupt state on the display. + // + DisplayIntStatus(); + + // + // Wait two seconds. + // + Delay(2); + + // + // Save and increment the interrupt sequence number. + // + g_ulGPIOb = g_ulIndex++; + + // + // Set PE2 low to indicate exit from this interrupt handler. + // + ROM_GPIOPinWrite(GPIO_PORTE_BASE, GPIO_PIN_2, 0); +} + +//***************************************************************************** +// +// This is the handler for INT_GPIOC. It triggers INT_GPIOB and saves the +// interrupt sequence number. +// +//***************************************************************************** +void +IntGPIOc(void) +{ + // + // Set PE3 high to indicate entry to this interrupt handler. + // + ROM_GPIOPinWrite(GPIO_PORTE_BASE, GPIO_PIN_3, GPIO_PIN_3); + + // + // Put the current interrupt state on the display. + // + DisplayIntStatus(); + + // + // Trigger the INT_GPIOB interrupt. + // + HWREG(NVIC_SW_TRIG) = INT_GPIOB - 16; + + // + // Put the current interrupt state on the display. + // + DisplayIntStatus(); + + // + // Wait two seconds. + // + Delay(2); + + // + // Save and increment the interrupt sequence number. + // + g_ulGPIOc = g_ulIndex++; + + // + // Set PE3 low to indicate exit from this interrupt handler. + // + ROM_GPIOPinWrite(GPIO_PORTE_BASE, GPIO_PIN_3, 0); +} + +//***************************************************************************** +// +// This is the main example program. It checks to see that the interrupts are +// processed in the correct order when they have identical priorities, +// increasing priorities, and decreasing priorities. This exercises interrupt +// preemption and tail chaining. +// +//***************************************************************************** +int +main(void) +{ + unsigned long ulError; + + // + // Enable lazy stacking for interrupt handlers. This allows floating-point + // instructions to be used within interrupt handlers, but at the expense of + // extra stack usage. + // + ROM_FPULazyStackingEnable(); + + // + // Set the clocking to run directly from the crystal. + // + ROM_SysCtlClockSet(SYSCTL_SYSDIV_1 | SYSCTL_USE_OSC | SYSCTL_OSC_MAIN | + SYSCTL_XTAL_16MHZ); + + // + // Enable the peripherals used by this example. + // + ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOE); + + // + // Initialize the UART. + // + ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA); + GPIOPinConfigure(GPIO_PA0_U0RX); + GPIOPinConfigure(GPIO_PA1_U0TX); + ROM_GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_1); + UARTStdioInit(0); + UARTprintf("\033[2JInterrupts\n"); + + // + // Configure the PB0-PB2 to be outputs to indicate entry/exit of one + // of the interrupt handlers. + // + ROM_GPIOPinTypeGPIOOutput(GPIO_PORTE_BASE, GPIO_PIN_1 | GPIO_PIN_2 | + GPIO_PIN_3); + ROM_GPIOPinWrite(GPIO_PORTE_BASE, GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_3, 0); + + // + // Set up and enable the SysTick timer. It will be used as a reference + // for delay loops in the interrupt handlers. The SysTick timer period + // will be set up for one second. + // + ROM_SysTickPeriodSet(ROM_SysCtlClockGet()); + ROM_SysTickEnable(); + + // + // Reset the error indicator. + // + ulError = 0; + + // + // Enable interrupts to the processor. + // + ROM_IntMasterEnable(); + + // + // Enable the interrupts. + // + ROM_IntEnable(INT_GPIOA); + ROM_IntEnable(INT_GPIOB); + ROM_IntEnable(INT_GPIOC); + + // + // Indicate that the equal interrupt priority test is beginning. + // + UARTprintf("\nEqual Priority\n"); + + // + // Set the interrupt priorities so they are all equal. + // + ROM_IntPrioritySet(INT_GPIOA, 0x00); + ROM_IntPrioritySet(INT_GPIOB, 0x00); + ROM_IntPrioritySet(INT_GPIOC, 0x00); + + // + // Reset the interrupt flags. + // + g_ulGPIOa = 0; + g_ulGPIOb = 0; + g_ulGPIOc = 0; + g_ulIndex = 1; + + // + // Trigger the interrupt for GPIO C. + // + HWREG(NVIC_SW_TRIG) = INT_GPIOC - 16; + + // + // Put the current interrupt state on the LCD. + // + DisplayIntStatus(); + + // + // Verify that the interrupts were processed in the correct order. + // + if((g_ulGPIOa != 3) || (g_ulGPIOb != 2) || (g_ulGPIOc != 1)) + { + ulError |= 1; + } + + // + // Wait two seconds. + // + Delay(2); + + // + // Indicate that the decreasing interrupt priority test is beginning. + // + UARTprintf("\nDecreasing Priority\n"); + + // + // Set the interrupt priorities so that they are decreasing (i.e. C > B > + // A). + // + ROM_IntPrioritySet(INT_GPIOA, 0x80); + ROM_IntPrioritySet(INT_GPIOB, 0x40); + ROM_IntPrioritySet(INT_GPIOC, 0x00); + + // + // Reset the interrupt flags. + // + g_ulGPIOa = 0; + g_ulGPIOb = 0; + g_ulGPIOc = 0; + g_ulIndex = 1; + + // + // Trigger the interrupt for GPIO C. + // + HWREG(NVIC_SW_TRIG) = INT_GPIOC - 16; + + // + // Put the current interrupt state on the UART. + // + DisplayIntStatus(); + + // + // Verify that the interrupts were processed in the correct order. + // + if((g_ulGPIOa != 3) || (g_ulGPIOb != 2) || (g_ulGPIOc != 1)) + { + ulError |= 2; + } + + // + // Wait two seconds. + // + Delay(2); + + // + // Indicate that the increasing interrupt priority test is beginning. + // + UARTprintf("\nIncreasing Priority\n"); + + // + // Set the interrupt priorities so that they are increasing (i.e. C < B < + // A). + // + ROM_IntPrioritySet(INT_GPIOA, 0x00); + ROM_IntPrioritySet(INT_GPIOB, 0x40); + ROM_IntPrioritySet(INT_GPIOC, 0x80); + + // + // Reset the interrupt flags. + // + g_ulGPIOa = 0; + g_ulGPIOb = 0; + g_ulGPIOc = 0; + g_ulIndex = 1; + + // + // Trigger the interrupt for GPIO C. + // + HWREG(NVIC_SW_TRIG) = INT_GPIOC - 16; + + // + // Put the current interrupt state on the UART. + // + DisplayIntStatus(); + + // + // Verify that the interrupts were processed in the correct order. + // + if((g_ulGPIOa != 1) || (g_ulGPIOb != 2) || (g_ulGPIOc != 3)) + { + ulError |= 4; + } + + // + // Wait two seconds. + // + Delay(2); + + // + // Disable the interrupts. + // + ROM_IntDisable(INT_GPIOA); + ROM_IntDisable(INT_GPIOB); + ROM_IntDisable(INT_GPIOC); + + // + // Disable interrupts to the processor. + // + ROM_IntMasterDisable(); + + // + // Print out the test results. + // + UARTprintf("\nInterrupt Priority =: %s >: %s <: %s\n", + (ulError & 1) ? "Fail" : "Pass", + (ulError & 2) ? "Fail" : "Pass", + (ulError & 4) ? "Fail" : "Pass"); + + // + // Loop forever. + // + while(1) + { + } +} diff --git a/boards/ek-lm4f120xl/interrupts/interrupts.ewd b/boards/ek-lm4f120xl/interrupts/interrupts.ewd new file mode 100644 index 0000000..b8eeac7 --- /dev/null +++ b/boards/ek-lm4f120xl/interrupts/interrupts.ewd @@ -0,0 +1,614 @@ + + + + 1 + + Debug + + ARM + + 1 + + C-SPY + 2 + + 15 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + ARMSIM_ID + 2 + + 1 + 1 + 1 + + + + + + + + ANGEL_ID + 2 + + 0 + 1 + 1 + + + + + + + + + + + + GDBSERVER_ID + 2 + + 0 + 1 + 1 + + + + + + + + + + + IARROM_ID + 2 + + 0 + 1 + 1 + + + + + + + + + + JLINK_ID + 2 + + 9 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + LMIFTDI_ID + 2 + + 1 + 1 + 1 + + + + + + + + MACRAIGOR_ID + 2 + + 2 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + RDI_ID + 2 + + 1 + 1 + 1 + + + + + + + + + + + + + + + + + THIRDPARTY_ID + 2 + + 0 + 1 + 1 + + + + + + + + + $TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\OSE\OseEpsilonPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\PowerPac\PowerPacRTOS.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin + 0 + + + $EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin + 1 + + + $EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin + 0 + + + $EW_DIR$\common\plugins\Profiling\Profiling.ENU.ewplugin + 1 + + + $EW_DIR$\common\plugins\Stack\Stack.ENU.ewplugin + 1 + + + + diff --git a/boards/ek-lm4f120xl/interrupts/interrupts.ewp b/boards/ek-lm4f120xl/interrupts/interrupts.ewp new file mode 100644 index 0000000..b7382d0 --- /dev/null +++ b/boards/ek-lm4f120xl/interrupts/interrupts.ewp @@ -0,0 +1,787 @@ + + + + 1 + + Debug + + ARM + + 1 + + General + 3 + + 14 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCARM + 2 + + 19 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AARM + 2 + + 7 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + OBJCOPY + 0 + + 1 + 1 + 1 + + + + + + + + + CUSTOM + 3 + + + + + + + BICOMP + 0 + + + + BUILDACTION + 1 + + + + + + + ILINK + 0 + + 5 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + IARCHIVE + 0 + + 0 + 1 + 1 + + + + + + + BILINK + 0 + + + + + Libraries + + $PROJ_DIR$\..\..\..\driverlib\ewarm-cm4f\Exe\driverlib-cm4f.a + + + + Source + + $PROJ_DIR$\interrupts.c + + + $PROJ_DIR$\startup_ewarm.c + + + $PROJ_DIR$\..\..\..\utils\uartstdio.c + + + diff --git a/boards/ek-lm4f120xl/interrupts/interrupts.icf b/boards/ek-lm4f120xl/interrupts/interrupts.icf new file mode 100644 index 0000000..dc1931b --- /dev/null +++ b/boards/ek-lm4f120xl/interrupts/interrupts.icf @@ -0,0 +1,78 @@ +//***************************************************************************** +// +// interrupts.icf - Linker configuration file for interrupts. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +// +// Define a memory region that covers the entire 4 GB addressible space of the +// processor. +// +define memory mem with size = 4G; + +// +// Define a region for the on-chip flash. +// +define region FLASH = mem:[from 0x00000000 to 0x0003ffff]; + +// +// Define a region for the on-chip SRAM. +// +define region SRAM = mem:[from 0x20000000 to 0x20007fff]; + +// +// Define a block for the heap. The size should be set to something other +// than zero if things in the C library that require the heap are used. +// +define block HEAP with alignment = 8, size = 0x00000000 { }; + +// +// Indicate that the read/write values should be initialized by copying from +// flash. +// +initialize by copy { readwrite }; + +// +// Indicate that the noinit values should be left alone. This includes the +// stack, which if initialized will destroy the return address from the +// initialization code, causing the processor to branch to zero and fault. +// +do not initialize { section .noinit }; + +// +// Place the interrupt vectors at the start of flash. +// +place at start of FLASH { readonly section .intvec }; + +// +// Place the remainder of the read-only items into flash. +// +place in FLASH { readonly }; + +// +// Place the RAM vector table at the start of SRAM. +// +place at start of SRAM { section VTABLE }; + +// +// Place all read/write items into SRAM. +// +place in SRAM { readwrite, block HEAP }; diff --git a/boards/ek-lm4f120xl/interrupts/interrupts.ld b/boards/ek-lm4f120xl/interrupts/interrupts.ld new file mode 100644 index 0000000..c5f28db --- /dev/null +++ b/boards/ek-lm4f120xl/interrupts/interrupts.ld @@ -0,0 +1,57 @@ +/****************************************************************************** + * + * interrupts.ld - Linker configuration file for interrupts. + * + * Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. + * Software License Agreement + * + * Texas Instruments (TI) is supplying this software for use solely and + * exclusively on TI's microcontroller products. The software is owned by + * TI and/or its suppliers, and is protected under applicable copyright + * laws. You may not combine this software with "viral" open-source + * software in order to form a larger program. + * + * THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. + * NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT + * NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY + * CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL + * DAMAGES, FOR ANY REASON WHATSOEVER. + * + * This is part of revision 9453 of the EK-LM4F120XL Firmware Package. + * + *****************************************************************************/ + +MEMORY +{ + FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x00040000 + SRAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00008000 +} + +SECTIONS +{ + .text : + { + _text = .; + KEEP(*(.isr_vector)) + *(.text*) + *(.rodata*) + _etext = .; + } > FLASH + + .data : AT(ADDR(.text) + SIZEOF(.text)) + { + _data = .; + *(vtable) + *(.data*) + _edata = .; + } > SRAM + + .bss : + { + _bss = .; + *(.bss*) + *(COMMON) + _ebss = .; + } > SRAM +} diff --git a/boards/ek-lm4f120xl/interrupts/interrupts.sct b/boards/ek-lm4f120xl/interrupts/interrupts.sct new file mode 100644 index 0000000..863cbfc --- /dev/null +++ b/boards/ek-lm4f120xl/interrupts/interrupts.sct @@ -0,0 +1,47 @@ +;****************************************************************************** +; +; interrupts.sct - Linker configuration file for interrupts. +; +; Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +; Software License Agreement +; +; Texas Instruments (TI) is supplying this software for use solely and +; exclusively on TI's microcontroller products. The software is owned by +; TI and/or its suppliers, and is protected under applicable copyright +; laws. You may not combine this software with "viral" open-source +; software in order to form a larger program. +; +; THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +; NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +; NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +; A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +; CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +; DAMAGES, FOR ANY REASON WHATSOEVER. +; +; This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +; +;****************************************************************************** + +LR_IROM 0x00000000 0x00040000 +{ + ; + ; Specify the Execution Address of the code and the size. + ; + ER_IROM 0x00000000 0x00040000 + { + *.o (RESET, +First) + * (InRoot$$Sections, +RO) + } + + ; + ; Specify the Execution Address of the data area. + ; + RW_IRAM 0x20000000 0x00008000 + { + ; + ; Uncomment the following line in order to use IntRegister(). + ; + ;* (vtable, +First) + * (+RW, +ZI) + } +} diff --git a/boards/ek-lm4f120xl/interrupts/interrupts.sgxx b/boards/ek-lm4f120xl/interrupts/interrupts.sgxx new file mode 100644 index 0000000..a63617e Binary files /dev/null and b/boards/ek-lm4f120xl/interrupts/interrupts.sgxx differ diff --git a/boards/ek-lm4f120xl/interrupts/interrupts.uvopt b/boards/ek-lm4f120xl/interrupts/interrupts.uvopt new file mode 100644 index 0000000..890e2f2 --- /dev/null +++ b/boards/ek-lm4f120xl/interrupts/interrupts.uvopt @@ -0,0 +1,303 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + + + + 0 + 0 + + + + interrupts + 0x4 + ARM-ADS + + 8000000 + + 1 + 1 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\rvmdk\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 255 + + + 0 + Data Sheet + DATASHTS\Luminary\LM4F120H5QR.PDF + + + + SARMCM3.DLL + -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 0 + 1 + 0 + 0 + 4 + + + + + + + + + + + BIN\lmidk-agdi.dll + + + + 0 + lmidk-agdi + -O4614 -S3 -FO29 + + + 0 + DLGTARM + + + + 0 + ARMDBGFLAGS + + + + + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + Source + 1 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + .\interrupts.c + interrupts.c + + + 1 + 2 + 2 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + .\startup_rvmdk.S + startup_rvmdk.S + + + 1 + 3 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\utils\uartstdio.c + uartstdio.c + + + + + Libraries + 1 + 0 + 0 + + 2 + 4 + 4 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\driverlib\rvmdk-cm4f\driverlib-cm4f.lib + driverlib-cm4f.lib + + + + + Documentation + 1 + 0 + 0 + + 3 + 5 + 5 + 0 + 1 + 0 + 0 + 1 + 1 + 0 + .\readme.txt + readme.txt + + 44 + 0 + 1 + + -1 + -1 + + + -1 + -1 + + + 0 + 0 + 729 + 300 + + + + + + + 1 + 0 + + 100 + 0 + + + .\readme.txt + 0 + 1 + 1 + + + + + + diff --git a/boards/ek-lm4f120xl/interrupts/interrupts.uvproj b/boards/ek-lm4f120xl/interrupts/interrupts.uvproj new file mode 100644 index 0000000..fdef23a --- /dev/null +++ b/boards/ek-lm4f120xl/interrupts/interrupts.uvproj @@ -0,0 +1,429 @@ + + + + 1.1 + +
### uVision Project, (C) Keil Software
+ + + + interrupts + 0x4 + ARM-ADS + + + LM4F120H5QR + Texas Instruments + IRAM(0x20000000-0x20007FFF) IROM(0-0x3FFFF) CLOCK(8000000) CPUTYPE("Cortex-M4") FPU2 + + "STARTUP\Luminary\Startup.s" ("Luminary Startup Code") + UL2CM3(-O207 -S0 -C0 -FO7 -FD20000000 -FC800 -FN1 -FF0LM4F_256 -FS00 -FL040000) + 5919 + LM4Fxxxx.H + + + + + + + + + + 0 + + + + Luminary\ + Luminary\ + + 0 + 0 + 0 + 0 + 1 + + .\rvmdk\ + interrupts + 1 + 0 + 0 + 1 + 1 + .\rvmdk\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + + 1 + 0 + fromelf --bin --output .\rvmdk\interrupts.bin .\rvmdk\interrupts.axf + + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + + + SARMCM3.DLL + -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + + 1 + 0 + 0 + 0 + 16 + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + + + 1 + 1 + 0 + 1 + 1 + 1 + 0 + 1 + + 0 + 4 + + + + + + + + + + + + + + BIN\lmidk-agdi.dll + + + + + 1 + 0 + 0 + 0 + 1 + 4099 + + BIN\lmidk-agdi.dll + + + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M4" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 2 + 0 + 0 + 8 + 1 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x8000 + + + 1 + 0x0 + 0x40000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x40000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x8000 + + + 0 + 0x0 + 0x0 + + + + + + 0 + 3 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + + + rvmdk PART_LM4F120H5QR TARGET_IS_BLIZZARD_RA1 + + ..\..\..; + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x00000000 + 0x20000000 + interrupts.sct + + + --entry Reset_Handler + + + + + + + + Source + + + interrupts.c + 1 + .\interrupts.c + + + startup_rvmdk.S + 2 + .\startup_rvmdk.S + + + uartstdio.c + 1 + ..\..\..\utils\uartstdio.c + + + + + Libraries + + + driverlib-cm4f.lib + 4 + ..\..\..\driverlib\rvmdk-cm4f\driverlib-cm4f.lib + + + + + Documentation + + + readme.txt + 5 + .\readme.txt + + + + + + + + diff --git a/boards/ek-lm4f120xl/interrupts/interrupts_ccs.cmd b/boards/ek-lm4f120xl/interrupts/interrupts_ccs.cmd new file mode 100644 index 0000000..cc2e2d0 --- /dev/null +++ b/boards/ek-lm4f120xl/interrupts/interrupts_ccs.cmd @@ -0,0 +1,70 @@ +/****************************************************************************** + * + * interrupts_ccs.cmd - CCS linker configuration file for interrupts. + * + * Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. + * Software License Agreement + * + * Texas Instruments (TI) is supplying this software for use solely and + * exclusively on TI's microcontroller products. The software is owned by + * TI and/or its suppliers, and is protected under applicable copyright + * laws. You may not combine this software with "viral" open-source + * software in order to form a larger program. + * + * THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. + * NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT + * NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY + * CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL + * DAMAGES, FOR ANY REASON WHATSOEVER. + * + * This is part of revision 9453 of the EK-LM4F120XL Firmware Package. + * + *****************************************************************************/ + +--retain=g_pfnVectors + +/* The following command line options are set as part of the CCS project. */ +/* If you are building using the command line, or for some reason want to */ +/* define them here, you can uncomment and modify these lines as needed. */ +/* If you are using CCS for building, it is probably better to make any such */ +/* modifications in your CCS project and leave this file alone. */ +/* */ +/* --heap_size=0 */ +/* --stack_size=256 */ +/* --library=rtsv7M3_T_le_eabi.lib */ + +/* The starting address of the application. Normally the interrupt vectors */ +/* must be located at the beginning of the application. */ +#define APP_BASE 0x00000000 +#define RAM_BASE 0x20000000 + +/* System memory map */ + +MEMORY +{ + /* Application stored in and executes from internal flash */ + FLASH (RX) : origin = APP_BASE, length = 0x00040000 + /* Application uses internal RAM for data */ + SRAM (RWX) : origin = 0x20000000, length = 0x00008000 +} + +/* Section allocation in memory */ + +SECTIONS +{ + .intvecs: > APP_BASE + .text : > FLASH + .const : > FLASH + .cinit : > FLASH + .pinit : > FLASH + .init_array : > FLASH + + .vtable : > RAM_BASE + .data : > SRAM + .bss : > SRAM + .sysmem : > SRAM + .stack : > SRAM +} + +__STACK_TOP = __stack + 512; diff --git a/boards/ek-lm4f120xl/interrupts/interrupts_sourcerygxx.ld b/boards/ek-lm4f120xl/interrupts/interrupts_sourcerygxx.ld new file mode 100644 index 0000000..18ce9c9 --- /dev/null +++ b/boards/ek-lm4f120xl/interrupts/interrupts_sourcerygxx.ld @@ -0,0 +1,43 @@ +/****************************************************************************** + * + * interrupts_sourcerygxx.ld - Scatter file for Sourcery CodeBench + * + * Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. + * Software License Agreement + * + * Texas Instruments (TI) is supplying this software for use solely and + * exclusively on TI's microcontroller products. The software is owned by + * TI and/or its suppliers, and is protected under applicable copyright + * laws. You may not combine this software with "viral" open-source + * software in order to form a larger program. + * + * THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. + * NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT + * NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY + * CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL + * DAMAGES, FOR ANY REASON WHATSOEVER. + * + * This is part of revision 9453 of the EK-LM4F120XL Firmware Package. + * + *****************************************************************************/ + +/****************************************************************************** + * + * Define the end of the heap space, which determines the beginning of the + * stack space. + * + *****************************************************************************/ +__cs3_heap_end = __cs3_region_end_ram - 512; + +/****************************************************************************** + * + * Define the interrupt handlers used by the application. + * + *****************************************************************************/ +EXTERN(IntGPIOa) +__cs3_isr_gpio_a = IntGPIOa; +EXTERN(IntGPIOb) +__cs3_isr_gpio_b = IntGPIOb; +EXTERN(IntGPIOc) +__cs3_isr_gpio_c = IntGPIOc; diff --git a/boards/ek-lm4f120xl/interrupts/readme.txt b/boards/ek-lm4f120xl/interrupts/readme.txt new file mode 100644 index 0000000..791d00d --- /dev/null +++ b/boards/ek-lm4f120xl/interrupts/readme.txt @@ -0,0 +1,33 @@ +Interrupts + +This example application demonstrates the interrupt preemption and +tail-chaining capabilities of Cortex-M4 microprocessor and NVIC. Nested +interrupts are synthesized when the interrupts have the same priority, +increasing priorities, and decreasing priorities. With increasing +priorities, preemption will occur; in the other two cases tail-chaining +will occur. The currently pending interrupts and the currently executing +interrupt will be displayed on the display; GPIO pins E1, E2 and E3 will +be asserted upon interrupt handler entry and de-asserted before interrupt +handler exit so that the off-to-on time can be observed with a scope or +logic analyzer to see the speed of tail-chaining (for the two cases where +tail-chaining is occurring). + +------------------------------------------------------------------------------- + +Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +Software License Agreement + +Texas Instruments (TI) is supplying this software for use solely and +exclusively on TI's microcontroller products. The software is owned by +TI and/or its suppliers, and is protected under applicable copyright +laws. You may not combine this software with "viral" open-source +software in order to form a larger program. + +THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +DAMAGES, FOR ANY REASON WHATSOEVER. + +This is part of revision 9453 of the EK-LM4F120XL Firmware Package. diff --git a/boards/ek-lm4f120xl/interrupts/rvmdk/interrupts.axf b/boards/ek-lm4f120xl/interrupts/rvmdk/interrupts.axf new file mode 100644 index 0000000..f770098 Binary files /dev/null and b/boards/ek-lm4f120xl/interrupts/rvmdk/interrupts.axf differ diff --git a/boards/ek-lm4f120xl/interrupts/rvmdk/interrupts.bin b/boards/ek-lm4f120xl/interrupts/rvmdk/interrupts.bin new file mode 100644 index 0000000..3ffc34b Binary files /dev/null and b/boards/ek-lm4f120xl/interrupts/rvmdk/interrupts.bin differ diff --git a/boards/ek-lm4f120xl/interrupts/sourcerygxx/interrupts.axf b/boards/ek-lm4f120xl/interrupts/sourcerygxx/interrupts.axf new file mode 100644 index 0000000..e352eef Binary files /dev/null and b/boards/ek-lm4f120xl/interrupts/sourcerygxx/interrupts.axf differ diff --git a/boards/ek-lm4f120xl/interrupts/sourcerygxx/interrupts.bin b/boards/ek-lm4f120xl/interrupts/sourcerygxx/interrupts.bin new file mode 100644 index 0000000..4855391 Binary files /dev/null and b/boards/ek-lm4f120xl/interrupts/sourcerygxx/interrupts.bin differ diff --git a/boards/ek-lm4f120xl/interrupts/startup_ccs.c b/boards/ek-lm4f120xl/interrupts/startup_ccs.c new file mode 100644 index 0000000..e5fb30b --- /dev/null +++ b/boards/ek-lm4f120xl/interrupts/startup_ccs.c @@ -0,0 +1,300 @@ +//***************************************************************************** +// +// startup_ccs.c - Startup code for use with TI's Code Composer Studio. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +//***************************************************************************** +// +// Forward declaration of the default fault handlers. +// +//***************************************************************************** +void ResetISR(void); +static void NmiSR(void); +static void FaultISR(void); +static void IntDefaultHandler(void); + +//***************************************************************************** +// +// External declaration for the reset handler that is to be called when the +// processor is started +// +//***************************************************************************** +extern void _c_int00(void); + +//***************************************************************************** +// +// Linker variable that marks the top of the stack. +// +//***************************************************************************** +extern unsigned long __STACK_TOP; + +//***************************************************************************** +// +// External declarations for the interrupt handlers used by the application. +// +//***************************************************************************** +extern void IntGPIOa(void); +extern void IntGPIOb(void); +extern void IntGPIOc(void); + +//***************************************************************************** +// +// The vector table. Note that the proper constructs must be placed on this to +// ensure that it ends up at physical address 0x0000.0000 or at the start of +// the program if located at a start address other than 0. +// +//***************************************************************************** +#pragma DATA_SECTION(g_pfnVectors, ".intvecs") +void (* const g_pfnVectors[])(void) = +{ + (void (*)(void))((unsigned long)&__STACK_TOP), + // The initial stack pointer + ResetISR, // The reset handler + NmiSR, // The NMI handler + FaultISR, // The hard fault handler + IntDefaultHandler, // The MPU fault handler + IntDefaultHandler, // The bus fault handler + IntDefaultHandler, // The usage fault handler + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // SVCall handler + IntDefaultHandler, // Debug monitor handler + 0, // Reserved + IntDefaultHandler, // The PendSV handler + IntDefaultHandler, // The SysTick handler + IntGPIOa, // GPIO Port A + IntGPIOb, // GPIO Port B + IntGPIOc, // GPIO Port C + IntDefaultHandler, // GPIO Port D + IntDefaultHandler, // GPIO Port E + IntDefaultHandler, // UART0 Rx and Tx + IntDefaultHandler, // UART1 Rx and Tx + IntDefaultHandler, // SSI0 Rx and Tx + IntDefaultHandler, // I2C0 Master and Slave + IntDefaultHandler, // PWM Fault + IntDefaultHandler, // PWM Generator 0 + IntDefaultHandler, // PWM Generator 1 + IntDefaultHandler, // PWM Generator 2 + IntDefaultHandler, // Quadrature Encoder 0 + IntDefaultHandler, // ADC Sequence 0 + IntDefaultHandler, // ADC Sequence 1 + IntDefaultHandler, // ADC Sequence 2 + IntDefaultHandler, // ADC Sequence 3 + IntDefaultHandler, // Watchdog timer + IntDefaultHandler, // Timer 0 subtimer A + IntDefaultHandler, // Timer 0 subtimer B + IntDefaultHandler, // Timer 1 subtimer A + IntDefaultHandler, // Timer 1 subtimer B + IntDefaultHandler, // Timer 2 subtimer A + IntDefaultHandler, // Timer 2 subtimer B + IntDefaultHandler, // Analog Comparator 0 + IntDefaultHandler, // Analog Comparator 1 + IntDefaultHandler, // Analog Comparator 2 + IntDefaultHandler, // System Control (PLL, OSC, BO) + IntDefaultHandler, // FLASH Control + IntDefaultHandler, // GPIO Port F + IntDefaultHandler, // GPIO Port G + IntDefaultHandler, // GPIO Port H + IntDefaultHandler, // UART2 Rx and Tx + IntDefaultHandler, // SSI1 Rx and Tx + IntDefaultHandler, // Timer 3 subtimer A + IntDefaultHandler, // Timer 3 subtimer B + IntDefaultHandler, // I2C1 Master and Slave + IntDefaultHandler, // Quadrature Encoder 1 + IntDefaultHandler, // CAN0 + IntDefaultHandler, // CAN1 + IntDefaultHandler, // CAN2 + IntDefaultHandler, // Ethernet + IntDefaultHandler, // Hibernate + IntDefaultHandler, // USB0 + IntDefaultHandler, // PWM Generator 3 + IntDefaultHandler, // uDMA Software Transfer + IntDefaultHandler, // uDMA Error + IntDefaultHandler, // ADC1 Sequence 0 + IntDefaultHandler, // ADC1 Sequence 1 + IntDefaultHandler, // ADC1 Sequence 2 + IntDefaultHandler, // ADC1 Sequence 3 + IntDefaultHandler, // I2S0 + IntDefaultHandler, // External Bus Interface 0 + IntDefaultHandler, // GPIO Port J + IntDefaultHandler, // GPIO Port K + IntDefaultHandler, // GPIO Port L + IntDefaultHandler, // SSI2 Rx and Tx + IntDefaultHandler, // SSI3 Rx and Tx + IntDefaultHandler, // UART3 Rx and Tx + IntDefaultHandler, // UART4 Rx and Tx + IntDefaultHandler, // UART5 Rx and Tx + IntDefaultHandler, // UART6 Rx and Tx + IntDefaultHandler, // UART7 Rx and Tx + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // I2C2 Master and Slave + IntDefaultHandler, // I2C3 Master and Slave + IntDefaultHandler, // Timer 4 subtimer A + IntDefaultHandler, // Timer 4 subtimer B + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // Timer 5 subtimer A + IntDefaultHandler, // Timer 5 subtimer B + IntDefaultHandler, // Wide Timer 0 subtimer A + IntDefaultHandler, // Wide Timer 0 subtimer B + IntDefaultHandler, // Wide Timer 1 subtimer A + IntDefaultHandler, // Wide Timer 1 subtimer B + IntDefaultHandler, // Wide Timer 2 subtimer A + IntDefaultHandler, // Wide Timer 2 subtimer B + IntDefaultHandler, // Wide Timer 3 subtimer A + IntDefaultHandler, // Wide Timer 3 subtimer B + IntDefaultHandler, // Wide Timer 4 subtimer A + IntDefaultHandler, // Wide Timer 4 subtimer B + IntDefaultHandler, // Wide Timer 5 subtimer A + IntDefaultHandler, // Wide Timer 5 subtimer B + IntDefaultHandler, // FPU + IntDefaultHandler, // PECI 0 + IntDefaultHandler, // LPC 0 + IntDefaultHandler, // I2C4 Master and Slave + IntDefaultHandler, // I2C5 Master and Slave + IntDefaultHandler, // GPIO Port M + IntDefaultHandler, // GPIO Port N + IntDefaultHandler, // Quadrature Encoder 2 + IntDefaultHandler, // Fan 0 + 0, // Reserved + IntDefaultHandler, // GPIO Port P (Summary or P0) + IntDefaultHandler, // GPIO Port P1 + IntDefaultHandler, // GPIO Port P2 + IntDefaultHandler, // GPIO Port P3 + IntDefaultHandler, // GPIO Port P4 + IntDefaultHandler, // GPIO Port P5 + IntDefaultHandler, // GPIO Port P6 + IntDefaultHandler, // GPIO Port P7 + IntDefaultHandler, // GPIO Port Q (Summary or Q0) + IntDefaultHandler, // GPIO Port Q1 + IntDefaultHandler, // GPIO Port Q2 + IntDefaultHandler, // GPIO Port Q3 + IntDefaultHandler, // GPIO Port Q4 + IntDefaultHandler, // GPIO Port Q5 + IntDefaultHandler, // GPIO Port Q6 + IntDefaultHandler, // GPIO Port Q7 + IntDefaultHandler, // GPIO Port R + IntDefaultHandler, // GPIO Port S + IntDefaultHandler, // PWM 1 Generator 0 + IntDefaultHandler, // PWM 1 Generator 1 + IntDefaultHandler, // PWM 1 Generator 2 + IntDefaultHandler, // PWM 1 Generator 3 + IntDefaultHandler // PWM 1 Fault +}; + +//***************************************************************************** +// +// This is the code that gets called when the processor first starts execution +// following a reset event. Only the absolutely necessary set is performed, +// after which the application supplied entry() routine is called. Any fancy +// actions (such as making decisions based on the reset cause register, and +// resetting the bits in that register) are left solely in the hands of the +// application. +// +//***************************************************************************** +void +ResetISR(void) +{ + // + // Jump to the CCS C initialization routine. This will enable the + // floating-point unit as well, so that does not need to be done here. + // + __asm(" .global _c_int00\n" + " b.w _c_int00"); +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a NMI. This +// simply enters an infinite loop, preserving the system state for examination +// by a debugger. +// +//***************************************************************************** +static void +NmiSR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a fault +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +FaultISR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives an unexpected +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +IntDefaultHandler(void) +{ + // + // Go into an infinite loop. + // + while(1) + { + } +} diff --git a/boards/ek-lm4f120xl/interrupts/startup_ewarm.c b/boards/ek-lm4f120xl/interrupts/startup_ewarm.c new file mode 100644 index 0000000..b54fcd5 --- /dev/null +++ b/boards/ek-lm4f120xl/interrupts/startup_ewarm.c @@ -0,0 +1,334 @@ +//***************************************************************************** +// +// startup_ewarm.c - Startup code for use with IAR's Embedded Workbench, +// version 5. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +#include "inc/hw_nvic.h" +#include "inc/hw_types.h" + +//***************************************************************************** +// +// Enable the IAR extensions for this source file. +// +//***************************************************************************** +#pragma language=extended + +//***************************************************************************** +// +// Forward declaration of the default fault handlers. +// +//***************************************************************************** +void ResetISR(void); +static void NmiSR(void); +static void FaultISR(void); +static void IntDefaultHandler(void); + +//***************************************************************************** +// +// External declarations for the interrupt handlers used by the application. +// +//***************************************************************************** +extern void IntGPIOa(void); +extern void IntGPIOb(void); +extern void IntGPIOc(void); + +//***************************************************************************** +// +// The entry point for the application startup code. +// +//***************************************************************************** +extern void __iar_program_start(void); + +//***************************************************************************** +// +// Reserve space for the system stack. +// +//***************************************************************************** +static unsigned long pulStack[128] @ ".noinit"; + +//***************************************************************************** +// +// A union that describes the entries of the vector table. The union is needed +// since the first entry is the stack pointer and the remainder are function +// pointers. +// +//***************************************************************************** +typedef union +{ + void (*pfnHandler)(void); + unsigned long ulPtr; +} +uVectorEntry; + +//***************************************************************************** +// +// The vector table. Note that the proper constructs must be placed on this to +// ensure that it ends up at physical address 0x0000.0000. +// +//***************************************************************************** +__root const uVectorEntry __vector_table[] @ ".intvec" = +{ + { .ulPtr = (unsigned long)pulStack + sizeof(pulStack) }, + // The initial stack pointer + ResetISR, // The reset handler + NmiSR, // The NMI handler + FaultISR, // The hard fault handler + IntDefaultHandler, // The MPU fault handler + IntDefaultHandler, // The bus fault handler + IntDefaultHandler, // The usage fault handler + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // SVCall handler + IntDefaultHandler, // Debug monitor handler + 0, // Reserved + IntDefaultHandler, // The PendSV handler + IntDefaultHandler, // The SysTick handler + IntGPIOa, // GPIO Port A + IntGPIOb, // GPIO Port B + IntGPIOc, // GPIO Port C + IntDefaultHandler, // GPIO Port D + IntDefaultHandler, // GPIO Port E + IntDefaultHandler, // UART0 Rx and Tx + IntDefaultHandler, // UART1 Rx and Tx + IntDefaultHandler, // SSI0 Rx and Tx + IntDefaultHandler, // I2C0 Master and Slave + IntDefaultHandler, // PWM Fault + IntDefaultHandler, // PWM Generator 0 + IntDefaultHandler, // PWM Generator 1 + IntDefaultHandler, // PWM Generator 2 + IntDefaultHandler, // Quadrature Encoder 0 + IntDefaultHandler, // ADC Sequence 0 + IntDefaultHandler, // ADC Sequence 1 + IntDefaultHandler, // ADC Sequence 2 + IntDefaultHandler, // ADC Sequence 3 + IntDefaultHandler, // Watchdog timer + IntDefaultHandler, // Timer 0 subtimer A + IntDefaultHandler, // Timer 0 subtimer B + IntDefaultHandler, // Timer 1 subtimer A + IntDefaultHandler, // Timer 1 subtimer B + IntDefaultHandler, // Timer 2 subtimer A + IntDefaultHandler, // Timer 2 subtimer B + IntDefaultHandler, // Analog Comparator 0 + IntDefaultHandler, // Analog Comparator 1 + IntDefaultHandler, // Analog Comparator 2 + IntDefaultHandler, // System Control (PLL, OSC, BO) + IntDefaultHandler, // FLASH Control + IntDefaultHandler, // GPIO Port F + IntDefaultHandler, // GPIO Port G + IntDefaultHandler, // GPIO Port H + IntDefaultHandler, // UART2 Rx and Tx + IntDefaultHandler, // SSI1 Rx and Tx + IntDefaultHandler, // Timer 3 subtimer A + IntDefaultHandler, // Timer 3 subtimer B + IntDefaultHandler, // I2C1 Master and Slave + IntDefaultHandler, // Quadrature Encoder 1 + IntDefaultHandler, // CAN0 + IntDefaultHandler, // CAN1 + IntDefaultHandler, // CAN2 + IntDefaultHandler, // Ethernet + IntDefaultHandler, // Hibernate + IntDefaultHandler, // USB0 + IntDefaultHandler, // PWM Generator 3 + IntDefaultHandler, // uDMA Software Transfer + IntDefaultHandler, // uDMA Error + IntDefaultHandler, // ADC1 Sequence 0 + IntDefaultHandler, // ADC1 Sequence 1 + IntDefaultHandler, // ADC1 Sequence 2 + IntDefaultHandler, // ADC1 Sequence 3 + IntDefaultHandler, // I2S0 + IntDefaultHandler, // External Bus Interface 0 + IntDefaultHandler, // GPIO Port J + IntDefaultHandler, // GPIO Port K + IntDefaultHandler, // GPIO Port L + IntDefaultHandler, // SSI2 Rx and Tx + IntDefaultHandler, // SSI3 Rx and Tx + IntDefaultHandler, // UART3 Rx and Tx + IntDefaultHandler, // UART4 Rx and Tx + IntDefaultHandler, // UART5 Rx and Tx + IntDefaultHandler, // UART6 Rx and Tx + IntDefaultHandler, // UART7 Rx and Tx + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // I2C2 Master and Slave + IntDefaultHandler, // I2C3 Master and Slave + IntDefaultHandler, // Timer 4 subtimer A + IntDefaultHandler, // Timer 4 subtimer B + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // Timer 5 subtimer A + IntDefaultHandler, // Timer 5 subtimer B + IntDefaultHandler, // Wide Timer 0 subtimer A + IntDefaultHandler, // Wide Timer 0 subtimer B + IntDefaultHandler, // Wide Timer 1 subtimer A + IntDefaultHandler, // Wide Timer 1 subtimer B + IntDefaultHandler, // Wide Timer 2 subtimer A + IntDefaultHandler, // Wide Timer 2 subtimer B + IntDefaultHandler, // Wide Timer 3 subtimer A + IntDefaultHandler, // Wide Timer 3 subtimer B + IntDefaultHandler, // Wide Timer 4 subtimer A + IntDefaultHandler, // Wide Timer 4 subtimer B + IntDefaultHandler, // Wide Timer 5 subtimer A + IntDefaultHandler, // Wide Timer 5 subtimer B + IntDefaultHandler, // FPU + IntDefaultHandler, // PECI 0 + IntDefaultHandler, // LPC 0 + IntDefaultHandler, // I2C4 Master and Slave + IntDefaultHandler, // I2C5 Master and Slave + IntDefaultHandler, // GPIO Port M + IntDefaultHandler, // GPIO Port N + IntDefaultHandler, // Quadrature Encoder 2 + IntDefaultHandler, // Fan 0 + 0, // Reserved + IntDefaultHandler, // GPIO Port P (Summary or P0) + IntDefaultHandler, // GPIO Port P1 + IntDefaultHandler, // GPIO Port P2 + IntDefaultHandler, // GPIO Port P3 + IntDefaultHandler, // GPIO Port P4 + IntDefaultHandler, // GPIO Port P5 + IntDefaultHandler, // GPIO Port P6 + IntDefaultHandler, // GPIO Port P7 + IntDefaultHandler, // GPIO Port Q (Summary or Q0) + IntDefaultHandler, // GPIO Port Q1 + IntDefaultHandler, // GPIO Port Q2 + IntDefaultHandler, // GPIO Port Q3 + IntDefaultHandler, // GPIO Port Q4 + IntDefaultHandler, // GPIO Port Q5 + IntDefaultHandler, // GPIO Port Q6 + IntDefaultHandler, // GPIO Port Q7 + IntDefaultHandler, // GPIO Port R + IntDefaultHandler, // GPIO Port S + IntDefaultHandler, // PWM 1 Generator 0 + IntDefaultHandler, // PWM 1 Generator 1 + IntDefaultHandler, // PWM 1 Generator 2 + IntDefaultHandler, // PWM 1 Generator 3 + IntDefaultHandler // PWM 1 Fault +}; + +//***************************************************************************** +// +// This is the code that gets called when the processor first starts execution +// following a reset event. Only the absolutely necessary set is performed, +// after which the application supplied entry() routine is called. Any fancy +// actions (such as making decisions based on the reset cause register, and +// resetting the bits in that register) are left solely in the hands of the +// application. +// +//***************************************************************************** +void +ResetISR(void) +{ + // + // Enable the floating-point unit. This must be done here to handle the + // case where main() uses floating-point and the function prologue saves + // floating-point registers (which will fault if floating-point is not + // enabled). Any configuration of the floating-point unit using DriverLib + // APIs must be done here prior to the floating-point unit being enabled. + // + // Note that this does not use DriverLib since it might not be included in + // this project. + // + HWREG(NVIC_CPAC) = ((HWREG(NVIC_CPAC) & + ~(NVIC_CPAC_CP10_M | NVIC_CPAC_CP11_M)) | + NVIC_CPAC_CP10_FULL | NVIC_CPAC_CP11_FULL); + + // + // Call the application's entry point. + // + __iar_program_start(); +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a NMI. This +// simply enters an infinite loop, preserving the system state for examination +// by a debugger. +// +//***************************************************************************** +static void +NmiSR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a fault +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +FaultISR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives an unexpected +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +IntDefaultHandler(void) +{ + // + // Go into an infinite loop. + // + while(1) + { + } +} diff --git a/boards/ek-lm4f120xl/interrupts/startup_gcc.c b/boards/ek-lm4f120xl/interrupts/startup_gcc.c new file mode 100644 index 0000000..61b4bd0 --- /dev/null +++ b/boards/ek-lm4f120xl/interrupts/startup_gcc.c @@ -0,0 +1,350 @@ +//***************************************************************************** +// +// startup_gcc.c - Startup code for use with GNU tools. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +#include "inc/hw_nvic.h" +#include "inc/hw_types.h" + +//***************************************************************************** +// +// Forward declaration of the default fault handlers. +// +//***************************************************************************** +void ResetISR(void); +static void NmiSR(void); +static void FaultISR(void); +static void IntDefaultHandler(void); + +//***************************************************************************** +// +// External declarations for the interrupt handlers used by the application. +// +//***************************************************************************** +extern void IntGPIOa(void); +extern void IntGPIOb(void); +extern void IntGPIOc(void); + +//***************************************************************************** +// +// The entry point for the application. +// +//***************************************************************************** +extern int main(void); + +//***************************************************************************** +// +// Reserve space for the system stack. +// +//***************************************************************************** +static unsigned long pulStack[128]; + +//***************************************************************************** +// +// The vector table. Note that the proper constructs must be placed on this to +// ensure that it ends up at physical address 0x0000.0000. +// +//***************************************************************************** +__attribute__ ((section(".isr_vector"))) +void (* const g_pfnVectors[])(void) = +{ + (void (*)(void))((unsigned long)pulStack + sizeof(pulStack)), + // The initial stack pointer + ResetISR, // The reset handler + NmiSR, // The NMI handler + FaultISR, // The hard fault handler + IntDefaultHandler, // The MPU fault handler + IntDefaultHandler, // The bus fault handler + IntDefaultHandler, // The usage fault handler + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // SVCall handler + IntDefaultHandler, // Debug monitor handler + 0, // Reserved + IntDefaultHandler, // The PendSV handler + IntDefaultHandler, // The SysTick handler + IntGPIOa, // GPIO Port A + IntGPIOb, // GPIO Port B + IntGPIOc, // GPIO Port C + IntDefaultHandler, // GPIO Port D + IntDefaultHandler, // GPIO Port E + IntDefaultHandler, // UART0 Rx and Tx + IntDefaultHandler, // UART1 Rx and Tx + IntDefaultHandler, // SSI0 Rx and Tx + IntDefaultHandler, // I2C0 Master and Slave + IntDefaultHandler, // PWM Fault + IntDefaultHandler, // PWM Generator 0 + IntDefaultHandler, // PWM Generator 1 + IntDefaultHandler, // PWM Generator 2 + IntDefaultHandler, // Quadrature Encoder 0 + IntDefaultHandler, // ADC Sequence 0 + IntDefaultHandler, // ADC Sequence 1 + IntDefaultHandler, // ADC Sequence 2 + IntDefaultHandler, // ADC Sequence 3 + IntDefaultHandler, // Watchdog timer + IntDefaultHandler, // Timer 0 subtimer A + IntDefaultHandler, // Timer 0 subtimer B + IntDefaultHandler, // Timer 1 subtimer A + IntDefaultHandler, // Timer 1 subtimer B + IntDefaultHandler, // Timer 2 subtimer A + IntDefaultHandler, // Timer 2 subtimer B + IntDefaultHandler, // Analog Comparator 0 + IntDefaultHandler, // Analog Comparator 1 + IntDefaultHandler, // Analog Comparator 2 + IntDefaultHandler, // System Control (PLL, OSC, BO) + IntDefaultHandler, // FLASH Control + IntDefaultHandler, // GPIO Port F + IntDefaultHandler, // GPIO Port G + IntDefaultHandler, // GPIO Port H + IntDefaultHandler, // UART2 Rx and Tx + IntDefaultHandler, // SSI1 Rx and Tx + IntDefaultHandler, // Timer 3 subtimer A + IntDefaultHandler, // Timer 3 subtimer B + IntDefaultHandler, // I2C1 Master and Slave + IntDefaultHandler, // Quadrature Encoder 1 + IntDefaultHandler, // CAN0 + IntDefaultHandler, // CAN1 + IntDefaultHandler, // CAN2 + IntDefaultHandler, // Ethernet + IntDefaultHandler, // Hibernate + IntDefaultHandler, // USB0 + IntDefaultHandler, // PWM Generator 3 + IntDefaultHandler, // uDMA Software Transfer + IntDefaultHandler, // uDMA Error + IntDefaultHandler, // ADC1 Sequence 0 + IntDefaultHandler, // ADC1 Sequence 1 + IntDefaultHandler, // ADC1 Sequence 2 + IntDefaultHandler, // ADC1 Sequence 3 + IntDefaultHandler, // I2S0 + IntDefaultHandler, // External Bus Interface 0 + IntDefaultHandler, // GPIO Port J + IntDefaultHandler, // GPIO Port K + IntDefaultHandler, // GPIO Port L + IntDefaultHandler, // SSI2 Rx and Tx + IntDefaultHandler, // SSI3 Rx and Tx + IntDefaultHandler, // UART3 Rx and Tx + IntDefaultHandler, // UART4 Rx and Tx + IntDefaultHandler, // UART5 Rx and Tx + IntDefaultHandler, // UART6 Rx and Tx + IntDefaultHandler, // UART7 Rx and Tx + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // I2C2 Master and Slave + IntDefaultHandler, // I2C3 Master and Slave + IntDefaultHandler, // Timer 4 subtimer A + IntDefaultHandler, // Timer 4 subtimer B + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // Timer 5 subtimer A + IntDefaultHandler, // Timer 5 subtimer B + IntDefaultHandler, // Wide Timer 0 subtimer A + IntDefaultHandler, // Wide Timer 0 subtimer B + IntDefaultHandler, // Wide Timer 1 subtimer A + IntDefaultHandler, // Wide Timer 1 subtimer B + IntDefaultHandler, // Wide Timer 2 subtimer A + IntDefaultHandler, // Wide Timer 2 subtimer B + IntDefaultHandler, // Wide Timer 3 subtimer A + IntDefaultHandler, // Wide Timer 3 subtimer B + IntDefaultHandler, // Wide Timer 4 subtimer A + IntDefaultHandler, // Wide Timer 4 subtimer B + IntDefaultHandler, // Wide Timer 5 subtimer A + IntDefaultHandler, // Wide Timer 5 subtimer B + IntDefaultHandler, // FPU + IntDefaultHandler, // PECI 0 + IntDefaultHandler, // LPC 0 + IntDefaultHandler, // I2C4 Master and Slave + IntDefaultHandler, // I2C5 Master and Slave + IntDefaultHandler, // GPIO Port M + IntDefaultHandler, // GPIO Port N + IntDefaultHandler, // Quadrature Encoder 2 + IntDefaultHandler, // Fan 0 + 0, // Reserved + IntDefaultHandler, // GPIO Port P (Summary or P0) + IntDefaultHandler, // GPIO Port P1 + IntDefaultHandler, // GPIO Port P2 + IntDefaultHandler, // GPIO Port P3 + IntDefaultHandler, // GPIO Port P4 + IntDefaultHandler, // GPIO Port P5 + IntDefaultHandler, // GPIO Port P6 + IntDefaultHandler, // GPIO Port P7 + IntDefaultHandler, // GPIO Port Q (Summary or Q0) + IntDefaultHandler, // GPIO Port Q1 + IntDefaultHandler, // GPIO Port Q2 + IntDefaultHandler, // GPIO Port Q3 + IntDefaultHandler, // GPIO Port Q4 + IntDefaultHandler, // GPIO Port Q5 + IntDefaultHandler, // GPIO Port Q6 + IntDefaultHandler, // GPIO Port Q7 + IntDefaultHandler, // GPIO Port R + IntDefaultHandler, // GPIO Port S + IntDefaultHandler, // PWM 1 Generator 0 + IntDefaultHandler, // PWM 1 Generator 1 + IntDefaultHandler, // PWM 1 Generator 2 + IntDefaultHandler, // PWM 1 Generator 3 + IntDefaultHandler // PWM 1 Fault +}; + +//***************************************************************************** +// +// The following are constructs created by the linker, indicating where the +// the "data" and "bss" segments reside in memory. The initializers for the +// for the "data" segment resides immediately following the "text" segment. +// +//***************************************************************************** +extern unsigned long _etext; +extern unsigned long _data; +extern unsigned long _edata; +extern unsigned long _bss; +extern unsigned long _ebss; + +//***************************************************************************** +// +// This is the code that gets called when the processor first starts execution +// following a reset event. Only the absolutely necessary set is performed, +// after which the application supplied entry() routine is called. Any fancy +// actions (such as making decisions based on the reset cause register, and +// resetting the bits in that register) are left solely in the hands of the +// application. +// +//***************************************************************************** +void +ResetISR(void) +{ + unsigned long *pulSrc, *pulDest; + + // + // Copy the data segment initializers from flash to SRAM. + // + pulSrc = &_etext; + for(pulDest = &_data; pulDest < &_edata; ) + { + *pulDest++ = *pulSrc++; + } + + // + // Zero fill the bss segment. + // + __asm(" ldr r0, =_bss\n" + " ldr r1, =_ebss\n" + " mov r2, #0\n" + " .thumb_func\n" + "zero_loop:\n" + " cmp r0, r1\n" + " it lt\n" + " strlt r2, [r0], #4\n" + " blt zero_loop"); + + // + // Enable the floating-point unit. This must be done here to handle the + // case where main() uses floating-point and the function prologue saves + // floating-point registers (which will fault if floating-point is not + // enabled). Any configuration of the floating-point unit using DriverLib + // APIs must be done here prior to the floating-point unit being enabled. + // + // Note that this does not use DriverLib since it might not be included in + // this project. + // + HWREG(NVIC_CPAC) = ((HWREG(NVIC_CPAC) & + ~(NVIC_CPAC_CP10_M | NVIC_CPAC_CP11_M)) | + NVIC_CPAC_CP10_FULL | NVIC_CPAC_CP11_FULL); + + // + // Call the application's entry point. + // + main(); +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a NMI. This +// simply enters an infinite loop, preserving the system state for examination +// by a debugger. +// +//***************************************************************************** +static void +NmiSR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a fault +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +FaultISR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives an unexpected +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +IntDefaultHandler(void) +{ + // + // Go into an infinite loop. + // + while(1) + { + } +} diff --git a/boards/ek-lm4f120xl/interrupts/startup_rvmdk.S b/boards/ek-lm4f120xl/interrupts/startup_rvmdk.S new file mode 100644 index 0000000..3856568 --- /dev/null +++ b/boards/ek-lm4f120xl/interrupts/startup_rvmdk.S @@ -0,0 +1,360 @@ +; <<< Use Configuration Wizard in Context Menu >>> +;****************************************************************************** +; +; startup_rvmdk.S - Startup code for use with Keil's uVision. +; +; Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +; Software License Agreement +; +; Texas Instruments (TI) is supplying this software for use solely and +; exclusively on TI's microcontroller products. The software is owned by +; TI and/or its suppliers, and is protected under applicable copyright +; laws. You may not combine this software with "viral" open-source +; software in order to form a larger program. +; +; THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +; NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +; NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +; A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +; CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +; DAMAGES, FOR ANY REASON WHATSOEVER. +; +; This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +; +;****************************************************************************** + +;****************************************************************************** +; +; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +; +;****************************************************************************** +Stack EQU 0x00000200 + +;****************************************************************************** +; +; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> +; +;****************************************************************************** +Heap EQU 0x00000000 + +;****************************************************************************** +; +; Allocate space for the stack. +; +;****************************************************************************** + AREA STACK, NOINIT, READWRITE, ALIGN=3 +StackMem + SPACE Stack +__initial_sp + +;****************************************************************************** +; +; Allocate space for the heap. +; +;****************************************************************************** + AREA HEAP, NOINIT, READWRITE, ALIGN=3 +__heap_base +HeapMem + SPACE Heap +__heap_limit + +;****************************************************************************** +; +; Indicate that the code in this file preserves 8-byte alignment of the stack. +; +;****************************************************************************** + PRESERVE8 + +;****************************************************************************** +; +; Place code into the reset code section. +; +;****************************************************************************** + AREA RESET, CODE, READONLY + THUMB + +;****************************************************************************** +; +; External declarations for the interrupt handlers used by the application. +; +;****************************************************************************** + EXTERN IntGPIOa + EXTERN IntGPIOb + EXTERN IntGPIOc + +;****************************************************************************** +; +; The vector table. +; +;****************************************************************************** + EXPORT __Vectors +__Vectors + DCD StackMem + Stack ; Top of Stack + DCD Reset_Handler ; Reset Handler + DCD NmiSR ; NMI Handler + DCD FaultISR ; Hard Fault Handler + DCD IntDefaultHandler ; The MPU fault handler + DCD IntDefaultHandler ; The bus fault handler + DCD IntDefaultHandler ; The usage fault handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD IntDefaultHandler ; SVCall handler + DCD IntDefaultHandler ; Debug monitor handler + DCD 0 ; Reserved + DCD IntDefaultHandler ; The PendSV handler + DCD IntDefaultHandler ; The SysTick handler + DCD IntGPIOa ; GPIO Port A + DCD IntGPIOb ; GPIO Port B + DCD IntGPIOc ; GPIO Port C + DCD IntDefaultHandler ; GPIO Port D + DCD IntDefaultHandler ; GPIO Port E + DCD IntDefaultHandler ; UART0 Rx and Tx + DCD IntDefaultHandler ; UART1 Rx and Tx + DCD IntDefaultHandler ; SSI0 Rx and Tx + DCD IntDefaultHandler ; I2C0 Master and Slave + DCD IntDefaultHandler ; PWM Fault + DCD IntDefaultHandler ; PWM Generator 0 + DCD IntDefaultHandler ; PWM Generator 1 + DCD IntDefaultHandler ; PWM Generator 2 + DCD IntDefaultHandler ; Quadrature Encoder 0 + DCD IntDefaultHandler ; ADC Sequence 0 + DCD IntDefaultHandler ; ADC Sequence 1 + DCD IntDefaultHandler ; ADC Sequence 2 + DCD IntDefaultHandler ; ADC Sequence 3 + DCD IntDefaultHandler ; Watchdog timer + DCD IntDefaultHandler ; Timer 0 subtimer A + DCD IntDefaultHandler ; Timer 0 subtimer B + DCD IntDefaultHandler ; Timer 1 subtimer A + DCD IntDefaultHandler ; Timer 1 subtimer B + DCD IntDefaultHandler ; Timer 2 subtimer A + DCD IntDefaultHandler ; Timer 2 subtimer B + DCD IntDefaultHandler ; Analog Comparator 0 + DCD IntDefaultHandler ; Analog Comparator 1 + DCD IntDefaultHandler ; Analog Comparator 2 + DCD IntDefaultHandler ; System Control (PLL, OSC, BO) + DCD IntDefaultHandler ; FLASH Control + DCD IntDefaultHandler ; GPIO Port F + DCD IntDefaultHandler ; GPIO Port G + DCD IntDefaultHandler ; GPIO Port H + DCD IntDefaultHandler ; UART2 Rx and Tx + DCD IntDefaultHandler ; SSI1 Rx and Tx + DCD IntDefaultHandler ; Timer 3 subtimer A + DCD IntDefaultHandler ; Timer 3 subtimer B + DCD IntDefaultHandler ; I2C1 Master and Slave + DCD IntDefaultHandler ; Quadrature Encoder 1 + DCD IntDefaultHandler ; CAN0 + DCD IntDefaultHandler ; CAN1 + DCD IntDefaultHandler ; CAN2 + DCD IntDefaultHandler ; Ethernet + DCD IntDefaultHandler ; Hibernate + DCD IntDefaultHandler ; USB0 + DCD IntDefaultHandler ; PWM Generator 3 + DCD IntDefaultHandler ; uDMA Software Transfer + DCD IntDefaultHandler ; uDMA Error + DCD IntDefaultHandler ; ADC1 Sequence 0 + DCD IntDefaultHandler ; ADC1 Sequence 1 + DCD IntDefaultHandler ; ADC1 Sequence 2 + DCD IntDefaultHandler ; ADC1 Sequence 3 + DCD IntDefaultHandler ; I2S0 + DCD IntDefaultHandler ; External Bus Interface 0 + DCD IntDefaultHandler ; GPIO Port J + DCD IntDefaultHandler ; GPIO Port K + DCD IntDefaultHandler ; GPIO Port L + DCD IntDefaultHandler ; SSI2 Rx and Tx + DCD IntDefaultHandler ; SSI3 Rx and Tx + DCD IntDefaultHandler ; UART3 Rx and Tx + DCD IntDefaultHandler ; UART4 Rx and Tx + DCD IntDefaultHandler ; UART5 Rx and Tx + DCD IntDefaultHandler ; UART6 Rx and Tx + DCD IntDefaultHandler ; UART7 Rx and Tx + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD IntDefaultHandler ; I2C2 Master and Slave + DCD IntDefaultHandler ; I2C3 Master and Slave + DCD IntDefaultHandler ; Timer 4 subtimer A + DCD IntDefaultHandler ; Timer 4 subtimer B + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD IntDefaultHandler ; Timer 5 subtimer A + DCD IntDefaultHandler ; Timer 5 subtimer B + DCD IntDefaultHandler ; Wide Timer 0 subtimer A + DCD IntDefaultHandler ; Wide Timer 0 subtimer B + DCD IntDefaultHandler ; Wide Timer 1 subtimer A + DCD IntDefaultHandler ; Wide Timer 1 subtimer B + DCD IntDefaultHandler ; Wide Timer 2 subtimer A + DCD IntDefaultHandler ; Wide Timer 2 subtimer B + DCD IntDefaultHandler ; Wide Timer 3 subtimer A + DCD IntDefaultHandler ; Wide Timer 3 subtimer B + DCD IntDefaultHandler ; Wide Timer 4 subtimer A + DCD IntDefaultHandler ; Wide Timer 4 subtimer B + DCD IntDefaultHandler ; Wide Timer 5 subtimer A + DCD IntDefaultHandler ; Wide Timer 5 subtimer B + DCD IntDefaultHandler ; FPU + DCD IntDefaultHandler ; PECI 0 + DCD IntDefaultHandler ; LPC 0 + DCD IntDefaultHandler ; I2C4 Master and Slave + DCD IntDefaultHandler ; I2C5 Master and Slave + DCD IntDefaultHandler ; GPIO Port M + DCD IntDefaultHandler ; GPIO Port N + DCD IntDefaultHandler ; Quadrature Encoder 2 + DCD IntDefaultHandler ; Fan 0 + DCD 0 ; Reserved + DCD IntDefaultHandler ; GPIO Port P (Summary or P0) + DCD IntDefaultHandler ; GPIO Port P1 + DCD IntDefaultHandler ; GPIO Port P2 + DCD IntDefaultHandler ; GPIO Port P3 + DCD IntDefaultHandler ; GPIO Port P4 + DCD IntDefaultHandler ; GPIO Port P5 + DCD IntDefaultHandler ; GPIO Port P6 + DCD IntDefaultHandler ; GPIO Port P7 + DCD IntDefaultHandler ; GPIO Port Q (Summary or Q0) + DCD IntDefaultHandler ; GPIO Port Q1 + DCD IntDefaultHandler ; GPIO Port Q2 + DCD IntDefaultHandler ; GPIO Port Q3 + DCD IntDefaultHandler ; GPIO Port Q4 + DCD IntDefaultHandler ; GPIO Port Q5 + DCD IntDefaultHandler ; GPIO Port Q6 + DCD IntDefaultHandler ; GPIO Port Q7 + DCD IntDefaultHandler ; GPIO Port R + DCD IntDefaultHandler ; GPIO Port S + DCD IntDefaultHandler ; PWM 1 Generator 0 + DCD IntDefaultHandler ; PWM 1 Generator 1 + DCD IntDefaultHandler ; PWM 1 Generator 2 + DCD IntDefaultHandler ; PWM 1 Generator 3 + DCD IntDefaultHandler ; PWM 1 Fault + +;****************************************************************************** +; +; This is the code that gets called when the processor first starts execution +; following a reset event. +; +;****************************************************************************** + EXPORT Reset_Handler +Reset_Handler + ; + ; Enable the floating-point unit. This must be done here to handle the + ; case where main() uses floating-point and the function prologue saves + ; floating-point registers (which will fault if floating-point is not + ; enabled). Any configuration of the floating-point unit using + ; DriverLib APIs must be done here prior to the floating-point unit + ; being enabled. + ; + ; Note that this does not use DriverLib since it might not be included + ; in this project. + ; + MOVW R0, #0xED88 + MOVT R0, #0xE000 + LDR R1, [R0] + ORR R1, #0x00F00000 + STR R1, [R0] + + ; + ; Call the C library enty point that handles startup. This will copy + ; the .data section initializers from flash to SRAM and zero fill the + ; .bss section. + ; + IMPORT __main + B __main + +;****************************************************************************** +; +; This is the code that gets called when the processor receives a NMI. This +; simply enters an infinite loop, preserving the system state for examination +; by a debugger. +; +;****************************************************************************** +NmiSR + B NmiSR + +;****************************************************************************** +; +; This is the code that gets called when the processor receives a fault +; interrupt. This simply enters an infinite loop, preserving the system state +; for examination by a debugger. +; +;****************************************************************************** +FaultISR + B FaultISR + +;****************************************************************************** +; +; This is the code that gets called when the processor receives an unexpected +; interrupt. This simply enters an infinite loop, preserving the system state +; for examination by a debugger. +; +;****************************************************************************** +IntDefaultHandler + B IntDefaultHandler + +;****************************************************************************** +; +; Make sure the end of this section is aligned. +; +;****************************************************************************** + ALIGN + +;****************************************************************************** +; +; Some code in the normal code section for initializing the heap and stack. +; +;****************************************************************************** + AREA |.text|, CODE, READONLY + +;****************************************************************************** +; +; The function expected of the C library startup code for defining the stack +; and heap memory locations. For the C library version of the startup code, +; provide this function so that the C library initialization code can find out +; the location of the stack and heap. +; +;****************************************************************************** + IF :DEF: __MICROLIB + EXPORT __initial_sp + EXPORT __heap_base + EXPORT __heap_limit + ELSE + IMPORT __use_two_region_memory + EXPORT __user_initial_stackheap +__user_initial_stackheap + LDR R0, =HeapMem + LDR R1, =(StackMem + Stack) + LDR R2, =(HeapMem + Heap) + LDR R3, =StackMem + BX LR + ENDIF + +;****************************************************************************** +; +; Make sure the end of this section is aligned. +; +;****************************************************************************** + ALIGN + +;****************************************************************************** +; +; Tell the assembler that we're done. +; +;****************************************************************************** + END diff --git a/boards/ek-lm4f120xl/interrupts/startup_sourcerygxx.S b/boards/ek-lm4f120xl/interrupts/startup_sourcerygxx.S new file mode 100644 index 0000000..b720839 --- /dev/null +++ b/boards/ek-lm4f120xl/interrupts/startup_sourcerygxx.S @@ -0,0 +1,75 @@ +//***************************************************************************** +// +// startup_sourcerygxx.S - Startup code for Sourcery CodeBench. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + + .syntax unified + .thumb + +//***************************************************************************** +// +// Place this code into the .cs3.reset section so that it can be executed prior +// to the startup code in Sourcery CodeBench. +// +//***************************************************************************** + .section .cs3.reset,"x" + +//***************************************************************************** +// +// The reset handler, which overrides the one provided by CS3. +// +//***************************************************************************** + .globl __cs3_reset + .thumb_func +__cs3_reset: + // + // Enable the floating-point unit. This must be done here to handle the + // case where main() uses floating-point and the function prologue saves + // floating-point registers (which will fault if floating-point is not + // enabled). Any configuration of the floating-point unit using DriverLib + // APIs must be done here prior to the floating-point unit being enabled. + // + // Note that this does not use DriverLib since it might not be included in + // this project. + // + movw r0, #0xed88 + movt r0, #0xe000 + ldr r1, [r0] + orr r1, #0x00f00000 + str r1, [r0] + + // + // Branch to the normal CS3 startup code. + // + .extern __cs3_reset_ekc_lm4f232 + ldr r0, =__cs3_reset_ekc_lm4f232 + bx r0 + + // + // Place the literal pool here. + // + .ltorg + + // + // The end of the file. + // + .end diff --git a/boards/ek-lm4f120xl/mpu_fault/Makefile b/boards/ek-lm4f120xl/mpu_fault/Makefile new file mode 100644 index 0000000..14bdeab --- /dev/null +++ b/boards/ek-lm4f120xl/mpu_fault/Makefile @@ -0,0 +1,91 @@ +#****************************************************************************** +# +# Makefile - Rules for building the MPU example. +# +# Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +# Software License Agreement +# +# Texas Instruments (TI) is supplying this software for use solely and +# exclusively on TI's microcontroller products. The software is owned by +# TI and/or its suppliers, and is protected under applicable copyright +# laws. You may not combine this software with "viral" open-source +# software in order to form a larger program. +# +# THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +# NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +# NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +# A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +# CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +# DAMAGES, FOR ANY REASON WHATSOEVER. +# +# This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +# +#****************************************************************************** + +# +# Defines the part type that this project uses. +# +PART=LM4F120H5QR + +# +# Set the processor variant. +# +VARIANT=cm4f + +# +# The base directory for StellarisWare. +# +ROOT=../../.. + +# +# Include the common make definitions. +# +include ${ROOT}/makedefs + +# +# Where to find source files that do not live in this directory. +# +VPATH=../../../utils + +# +# Where to find header files that do not live in the source directory. +# +IPATH=../../.. +IPATH+=../../.. + +# +# The default rule, which causes the MPU example to be built. +# +all: ${COMPILER} +all: ${COMPILER}/mpu_fault.axf + +# +# The rule to clean out all the build products. +# +clean: + @rm -rf ${COMPILER} ${wildcard *~} + +# +# The rule to create the target directory. +# +${COMPILER}: + @mkdir -p ${COMPILER} + +# +# Rules for building the MPU example. +# +${COMPILER}/mpu_fault.axf: ${COMPILER}/mpu_fault.o +${COMPILER}/mpu_fault.axf: ${COMPILER}/startup_${COMPILER}.o +${COMPILER}/mpu_fault.axf: ${COMPILER}/uartstdio.o +${COMPILER}/mpu_fault.axf: ${ROOT}/driverlib/${COMPILER}-cm4f/libdriver-cm4f.a +${COMPILER}/mpu_fault.axf: mpu_fault.ld +SCATTERgcc_mpu_fault=mpu_fault.ld +ENTRY_mpu_fault=ResetISR +CFLAGSgcc=-DTARGET_IS_BLIZZARD_RA1 + +# +# Include the automatically generated dependency files. +# +ifneq (${MAKECMDGOALS},clean) +-include ${wildcard ${COMPILER}/*.d} __dummy__ +endif diff --git a/boards/ek-lm4f120xl/mpu_fault/ccs/.ccsimportspec b/boards/ek-lm4f120xl/mpu_fault/ccs/.ccsimportspec new file mode 100644 index 0000000..2bef69c --- /dev/null +++ b/boards/ek-lm4f120xl/mpu_fault/ccs/.ccsimportspec @@ -0,0 +1,8 @@ + + + + + + + + diff --git a/boards/ek-lm4f120xl/mpu_fault/ccs/.ccsproject b/boards/ek-lm4f120xl/mpu_fault/ccs/.ccsproject new file mode 100644 index 0000000..56793f4 --- /dev/null +++ b/boards/ek-lm4f120xl/mpu_fault/ccs/.ccsproject @@ -0,0 +1,12 @@ + + + + + + + + + + + + diff --git a/boards/ek-lm4f120xl/mpu_fault/ccs/.cproject b/boards/ek-lm4f120xl/mpu_fault/ccs/.cproject new file mode 100644 index 0000000..6322c5f --- /dev/null +++ b/boards/ek-lm4f120xl/mpu_fault/ccs/.cproject @@ -0,0 +1,191 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/boards/ek-lm4f120xl/mpu_fault/ccs/.project b/boards/ek-lm4f120xl/mpu_fault/ccs/.project new file mode 100644 index 0000000..2893d12 --- /dev/null +++ b/boards/ek-lm4f120xl/mpu_fault/ccs/.project @@ -0,0 +1,111 @@ + + + mpu_fault + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + + + ?name? + + + + org.eclipse.cdt.make.core.append_environment + true + + + org.eclipse.cdt.make.core.autoBuildTarget + all + + + org.eclipse.cdt.make.core.buildArguments + -k + + + org.eclipse.cdt.make.core.buildCommand + ${CCS_UTILS_DIR}/bin/gmake + + + org.eclipse.cdt.make.core.buildLocation + ${BuildDirectory} + + + org.eclipse.cdt.make.core.cleanBuildTarget + clean + + + org.eclipse.cdt.make.core.contents + org.eclipse.cdt.make.core.activeConfigSettings + + + org.eclipse.cdt.make.core.enableAutoBuild + true + + + org.eclipse.cdt.make.core.enableCleanBuild + true + + + org.eclipse.cdt.make.core.enableFullBuild + true + + + org.eclipse.cdt.make.core.fullBuildTarget + all + + + org.eclipse.cdt.make.core.stopOnError + false + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + true + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + com.ti.ccstudio.core.ccsNature + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.core.ccnature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + mpu_fault.c + 1 + SW_ROOT/boards/ek-lm4f120xl/mpu_fault/mpu_fault.c + + + mpu_fault_ccs.cmd + 1 + SW_ROOT/boards/ek-lm4f120xl/mpu_fault/mpu_fault_ccs.cmd + + + startup_ccs.c + 1 + SW_ROOT/boards/ek-lm4f120xl/mpu_fault/startup_ccs.c + + + utils/uartstdio.c + 1 + SW_ROOT/utils/uartstdio.c + + + + + SW_ROOT + $%7BPARENT-4-PROJECT_LOC%7D + + + diff --git a/boards/ek-lm4f120xl/mpu_fault/ccs/.settings/org.eclipse.cdt.codan.core.prefs b/boards/ek-lm4f120xl/mpu_fault/ccs/.settings/org.eclipse.cdt.codan.core.prefs new file mode 100644 index 0000000..98b6350 --- /dev/null +++ b/boards/ek-lm4f120xl/mpu_fault/ccs/.settings/org.eclipse.cdt.codan.core.prefs @@ -0,0 +1,3 @@ +eclipse.preferences.version=1 +inEditor=false +onBuild=false diff --git a/boards/ek-lm4f120xl/mpu_fault/ccs/Debug/mpu_fault.bin b/boards/ek-lm4f120xl/mpu_fault/ccs/Debug/mpu_fault.bin new file mode 100644 index 0000000..9eda234 Binary files /dev/null and b/boards/ek-lm4f120xl/mpu_fault/ccs/Debug/mpu_fault.bin differ diff --git a/boards/ek-lm4f120xl/mpu_fault/ccs/Debug/mpu_fault.out b/boards/ek-lm4f120xl/mpu_fault/ccs/Debug/mpu_fault.out new file mode 100644 index 0000000..a3d5fb9 Binary files /dev/null and b/boards/ek-lm4f120xl/mpu_fault/ccs/Debug/mpu_fault.out differ diff --git a/boards/ek-lm4f120xl/mpu_fault/ccs/macros.ini_initial b/boards/ek-lm4f120xl/mpu_fault/ccs/macros.ini_initial new file mode 100644 index 0000000..588017d --- /dev/null +++ b/boards/ek-lm4f120xl/mpu_fault/ccs/macros.ini_initial @@ -0,0 +1 @@ +SW_ROOT = ../../../.. diff --git a/boards/ek-lm4f120xl/mpu_fault/ccs/target_config.ccxml b/boards/ek-lm4f120xl/mpu_fault/ccs/target_config.ccxml new file mode 100644 index 0000000..469eea0 --- /dev/null +++ b/boards/ek-lm4f120xl/mpu_fault/ccs/target_config.ccxml @@ -0,0 +1,13 @@ + + + + + + + + + + + + + diff --git a/boards/ek-lm4f120xl/mpu_fault/ewarm/Exe/mpu_fault.bin b/boards/ek-lm4f120xl/mpu_fault/ewarm/Exe/mpu_fault.bin new file mode 100644 index 0000000..88938a4 Binary files /dev/null and b/boards/ek-lm4f120xl/mpu_fault/ewarm/Exe/mpu_fault.bin differ diff --git a/boards/ek-lm4f120xl/mpu_fault/ewarm/Exe/mpu_fault.out b/boards/ek-lm4f120xl/mpu_fault/ewarm/Exe/mpu_fault.out new file mode 100644 index 0000000..dfac41d Binary files /dev/null and b/boards/ek-lm4f120xl/mpu_fault/ewarm/Exe/mpu_fault.out differ diff --git a/boards/ek-lm4f120xl/mpu_fault/gcc/mpu_fault.axf b/boards/ek-lm4f120xl/mpu_fault/gcc/mpu_fault.axf new file mode 100644 index 0000000..3f757d7 Binary files /dev/null and b/boards/ek-lm4f120xl/mpu_fault/gcc/mpu_fault.axf differ diff --git a/boards/ek-lm4f120xl/mpu_fault/gcc/mpu_fault.bin b/boards/ek-lm4f120xl/mpu_fault/gcc/mpu_fault.bin new file mode 100644 index 0000000..bd10968 Binary files /dev/null and b/boards/ek-lm4f120xl/mpu_fault/gcc/mpu_fault.bin differ diff --git a/boards/ek-lm4f120xl/mpu_fault/mpu_fault.c b/boards/ek-lm4f120xl/mpu_fault/mpu_fault.c new file mode 100644 index 0000000..38ab1aa --- /dev/null +++ b/boards/ek-lm4f120xl/mpu_fault/mpu_fault.c @@ -0,0 +1,383 @@ +//***************************************************************************** +// +// mpu_fault.c - MPU example. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +#include "inc/hw_ints.h" +#include "inc/hw_memmap.h" +#include "inc/hw_nvic.h" +#include "inc/hw_types.h" +#include "driverlib/debug.h" +#include "driverlib/fpu.h" +#include "driverlib/gpio.h" +#include "driverlib/interrupt.h" +#include "driverlib/mpu.h" +#include "driverlib/pin_map.h" +#include "driverlib/rom.h" +#include "driverlib/sysctl.h" +#include "utils/uartstdio.h" + +//***************************************************************************** +// +//! \addtogroup example_list +//!

MPU (mpu_fault)

+//! +//! This example application demonstrates the use of the MPU to protect a +//! region of memory from access, and to generate a memory management fault +//! when there is an access violation. +//! +//! UART0, connected to the Stellaris virtual serial port and running at +//! 115,200, 8-N-1, is used to display messages from this application. +// +//***************************************************************************** + + +//***************************************************************************** +// +// Variables to hold the state of the fault status when the fault occurs and +// the faulting address. +// +//***************************************************************************** +static volatile unsigned long g_ulMMAR; +static volatile unsigned long g_ulFaultStatus; + +//***************************************************************************** +// +// A counter to track the number of times the fault handler has been entered. +// +//***************************************************************************** +static volatile unsigned long g_ulMPUFaultCount; + +//***************************************************************************** +// +// A location for storing data read from various addresses. Volatile forces +// the compiler to use it and not optimize the access away. +// +//***************************************************************************** +static volatile unsigned long g_ulValue; + +//***************************************************************************** +// +// The error routine that is called if the driver library encounters an error. +// +//***************************************************************************** +#ifdef DEBUG +void +__error__(char *pcFilename, unsigned long ulLine) +{ +} +#endif + +//***************************************************************************** +// +// The exception handler for memory management faults, which are caused by MPU +// access violations. This handler will verify the cause of the fault and +// clear the NVIC fault status register. +// +//***************************************************************************** +void +MPUFaultHandler(void) +{ + // + // Preserve the value of the MMAR (the address causing the fault). + // Preserve the fault status register value, then clear it. + // + g_ulMMAR = HWREG(NVIC_MM_ADDR); + g_ulFaultStatus = HWREG(NVIC_FAULT_STAT); + HWREG(NVIC_FAULT_STAT) = g_ulFaultStatus; + + // + // Increment a counter to indicate the fault occurred. + // + g_ulMPUFaultCount++; + + // + // Disable the MPU so that this handler can return and cause no more + // faults. The actual instruction that faulted will be re-executed. + // + ROM_MPUDisable(); +} + +//***************************************************************************** +// +// This example demonstrates how to configure MPU regions for different levels +// of memory protection. The following memory map is set up: +// +// 0000.0000 - 0000.1C00 - rgn 0: executable read-only, flash +// 0000.1C00 - 0000.2000 - rgn 0: no access, flash (disabled sub-region 7) +// 2000.0000 - 2000.4000 - rgn 1: read-write, RAM +// 2000.4000 - 2000.6000 - rgn 2: read-only, RAM (disabled sub-rgn 4 of rgn 1) +// 2000.6000 - 2000.7FFF - rgn 1: read-write, RAM +// 4000.0000 - 4001.0000 - rgn 3: read-write, peripherals +// 4001.0000 - 4002.0000 - rgn 3: no access (disabled sub-region 1) +// 4002.0000 - 4006.0000 - rgn 3: read-write, peripherals +// 4006.0000 - 4008.0000 - rgn 3: no access (disabled sub-region 6, 7) +// E000.E000 - E000.F000 - rgn 4: read-write, NVIC +// 0100.0000 - 0100.FFFF - rgn 5: executable read-only, ROM +// +// The example code will attempt to perform the following operations and check +// the faulting behavior: +// +// - write to flash (should fault) +// - read from the disabled area of flash (should fault) +// - read from the read-only area of RAM (should not fault) +// - write to the read-only section of RAM (should fault) +// +//***************************************************************************** +int +main(void) +{ + unsigned int bFail = 0; + + // + // Enable lazy stacking for interrupt handlers. This allows floating-point + // instructions to be used within interrupt handlers, but at the expense of + // extra stack usage. + // + ROM_FPULazyStackingEnable(); + + // + // Set the clocking to run directly from the crystal. + // + ROM_SysCtlClockSet(SYSCTL_SYSDIV_1 | SYSCTL_USE_OSC | SYSCTL_OSC_MAIN | + SYSCTL_XTAL_16MHZ); + + // + // Initialize the UART and write status. + // + ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA); + GPIOPinConfigure(GPIO_PA0_U0RX); + GPIOPinConfigure(GPIO_PA1_U0TX); + ROM_GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_1); + UARTStdioInit(0); + UARTprintf("\033[2JMPU example\n"); + + // + // Configure an executable, read-only MPU region for flash. It is a 16 KB + // region with the last 2 KB disabled to result in a 14 KB executable + // region. This region is needed so that the program can execute from + // flash. + // + ROM_MPURegionSet(0, FLASH_BASE, + MPU_RGN_SIZE_16K | MPU_RGN_PERM_EXEC | + MPU_RGN_PERM_PRV_RO_USR_RO | MPU_SUB_RGN_DISABLE_7 | + MPU_RGN_ENABLE); + + // + // Configure a read-write MPU region for RAM. It is a 32 KB region. There + // is a 4 KB sub-region in the middle that is disabled in order to open up + // a hole in which different permissions can be applied. + // + ROM_MPURegionSet(1, SRAM_BASE, + MPU_RGN_SIZE_32K | MPU_RGN_PERM_NOEXEC | + MPU_RGN_PERM_PRV_RW_USR_RW | MPU_SUB_RGN_DISABLE_4 | + MPU_RGN_ENABLE); + + // + // Configure a read-only MPU region for the 4 KB of RAM that is disabled in + // the previous region. This region is used for demonstrating read-only + // permissions. + // + ROM_MPURegionSet(2, SRAM_BASE + 0x4000, + MPU_RGN_SIZE_2K | MPU_RGN_PERM_NOEXEC | + MPU_RGN_PERM_PRV_RO_USR_RO | MPU_RGN_ENABLE); + + // + // Configure a read-write MPU region for peripherals. The region is 512 KB + // total size, with several sub-regions disabled to prevent access to areas + // where there are no peripherals. This region is needed because the + // program needs access to some peripherals. + // + ROM_MPURegionSet(3, 0x40000000, + MPU_RGN_SIZE_512K | MPU_RGN_PERM_NOEXEC | + MPU_RGN_PERM_PRV_RW_USR_RW | MPU_SUB_RGN_DISABLE_1 | + MPU_SUB_RGN_DISABLE_6 | MPU_SUB_RGN_DISABLE_7 | + MPU_RGN_ENABLE); + + // + // Configure a read-write MPU region for access to the NVIC. The region is + // 4 KB in size. This region is needed because NVIC registers are needed + // in order to control the MPU. + // + ROM_MPURegionSet(4, NVIC_BASE, + MPU_RGN_SIZE_4K | MPU_RGN_PERM_NOEXEC | + MPU_RGN_PERM_PRV_RW_USR_RW | MPU_RGN_ENABLE); + + // + // Configure an executable, read-only MPU region for ROM. It is a 64 KB + // region. This region is needed so that ROM library calls work. + // + ROM_MPURegionSet(5, (unsigned long)ROM_APITABLE & 0xFFFF0000, + MPU_RGN_SIZE_64K | MPU_RGN_PERM_EXEC | + MPU_RGN_PERM_PRV_RO_USR_RO | MPU_RGN_ENABLE); + + // + // Need to clear the NVIC fault status register to make sure there is no + // status hanging around from a previous program. + // + g_ulFaultStatus = HWREG(NVIC_FAULT_STAT); + HWREG(NVIC_FAULT_STAT) = g_ulFaultStatus; + + // + // Enable the MPU fault. + // + ROM_IntEnable(FAULT_MPU); + + // + // Enable the MPU. This will begin to enforce the memory protection + // regions. The MPU is configured so that when in the hard fault or NMI + // exceptions, a default map will be used. Neither of these should occur + // in this example program. + // + ROM_MPUEnable(MPU_CONFIG_HARDFLT_NMI); + + // + // Attempt to write to the flash. This should cause a protection fault due + // to the fact that this region is read-only. + // + UARTprintf("Flash write... "); + g_ulMPUFaultCount = 0; + HWREG(0x100) = 0x12345678; + + // + // Verify that the fault occurred, at the expected address. + // + if((g_ulMPUFaultCount == 1) && (g_ulFaultStatus == 0x82) && + (g_ulMMAR == 0x100)) + { + UARTprintf(" OK\n"); + } + else + { + bFail = 1; + UARTprintf("NOK\n"); + } + + // + // The MPU was disabled when the previous fault occurred, so it needs to be + // re-enabled. + // + ROM_MPUEnable(MPU_CONFIG_HARDFLT_NMI); + + // + // Attempt to read from the disabled section of flash, the upper 2 KB of + // the 16 KB region. + // + UARTprintf("Flash read... "); + g_ulMPUFaultCount = 0; + g_ulValue = HWREG(0x3820); + + // + // Verify that the fault occurred, at the expected address. + // + if((g_ulMPUFaultCount == 1) && (g_ulFaultStatus == 0x82) && + (g_ulMMAR == 0x3820)) + { + UARTprintf(" OK\n"); + } + else + { + bFail = 1; + UARTprintf("NOK\n"); + } + + // + // The MPU was disabled when the previous fault occurred, so it needs to be + // re-enabled. + // + ROM_MPUEnable(MPU_CONFIG_HARDFLT_NMI); + + // + // Attempt to read from the read-only area of RAM, the middle 4 KB of the + // 32 KB region. + // + UARTprintf("RAM read... "); + g_ulMPUFaultCount = 0; + g_ulValue = HWREG(0x20004440); + + // + // Verify that the RAM read did not cause a fault. + // + if(g_ulMPUFaultCount == 0) + { + UARTprintf(" OK\n"); + } + else + { + bFail = 1; + UARTprintf("NOK\n"); + } + + // + // The MPU should not have been disabled since the last access was not + // supposed to cause a fault. But if it did cause a fault, then the MPU + // will be disabled, so re-enable it here anyway, just in case. + // + ROM_MPUEnable(MPU_CONFIG_HARDFLT_NMI); + + // + // Attempt to write to the read-only area of RAM, the middle 4 KB of the + // 32 KB region. + // + UARTprintf("RAM write... "); + g_ulMPUFaultCount = 0; + HWREG(0x20004460) = 0xabcdef00; + + // + // Verify that the RAM write caused a fault. + // + if((g_ulMPUFaultCount == 1) && (g_ulFaultStatus == 0x82) && + (g_ulMMAR == 0x20004460)) + { + UARTprintf(" OK\n"); + } + else + { + bFail = 1; + UARTprintf("NOK\n"); + } + + // + // Display the results of the example program. + // + if(bFail) + { + UARTprintf("Failure!\n"); + } + else + { + UARTprintf("Success!\n"); + } + + // + // Disable the MPU, so there are no lingering side effects if another + // program is run. + // + ROM_MPUDisable(); + + // + // Loop forever. + // + while(1) + { + } +} diff --git a/boards/ek-lm4f120xl/mpu_fault/mpu_fault.ewd b/boards/ek-lm4f120xl/mpu_fault/mpu_fault.ewd new file mode 100644 index 0000000..b8eeac7 --- /dev/null +++ b/boards/ek-lm4f120xl/mpu_fault/mpu_fault.ewd @@ -0,0 +1,614 @@ + + + + 1 + + Debug + + ARM + + 1 + + C-SPY + 2 + + 15 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + ARMSIM_ID + 2 + + 1 + 1 + 1 + + + + + + + + ANGEL_ID + 2 + + 0 + 1 + 1 + + + + + + + + + + + + GDBSERVER_ID + 2 + + 0 + 1 + 1 + + + + + + + + + + + IARROM_ID + 2 + + 0 + 1 + 1 + + + + + + + + + + JLINK_ID + 2 + + 9 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + LMIFTDI_ID + 2 + + 1 + 1 + 1 + + + + + + + + MACRAIGOR_ID + 2 + + 2 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + RDI_ID + 2 + + 1 + 1 + 1 + + + + + + + + + + + + + + + + + THIRDPARTY_ID + 2 + + 0 + 1 + 1 + + + + + + + + + $TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\OSE\OseEpsilonPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\PowerPac\PowerPacRTOS.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin + 0 + + + $EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin + 1 + + + $EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin + 0 + + + $EW_DIR$\common\plugins\Profiling\Profiling.ENU.ewplugin + 1 + + + $EW_DIR$\common\plugins\Stack\Stack.ENU.ewplugin + 1 + + + + diff --git a/boards/ek-lm4f120xl/mpu_fault/mpu_fault.ewp b/boards/ek-lm4f120xl/mpu_fault/mpu_fault.ewp new file mode 100644 index 0000000..218dedd --- /dev/null +++ b/boards/ek-lm4f120xl/mpu_fault/mpu_fault.ewp @@ -0,0 +1,789 @@ + + + + 1 + + Debug + + ARM + + 1 + + General + 3 + + 14 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCARM + 2 + + 19 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AARM + 2 + + 7 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + OBJCOPY + 0 + + 1 + 1 + 1 + + + + + + + + + CUSTOM + 3 + + + + + + + BICOMP + 0 + + + + BUILDACTION + 1 + + + + + + + ILINK + 0 + + 5 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + IARCHIVE + 0 + + 0 + 1 + 1 + + + + + + + BILINK + 0 + + + + + Libraries + + $PROJ_DIR$\..\..\..\driverlib\ewarm-cm4f\Exe\driverlib-cm4f.a + + + + Source + + $PROJ_DIR$\mpu_fault.c + + + $PROJ_DIR$\startup_ewarm.c + + + $PROJ_DIR$\..\..\..\utils\uartstdio.c + + + diff --git a/boards/ek-lm4f120xl/mpu_fault/mpu_fault.icf b/boards/ek-lm4f120xl/mpu_fault/mpu_fault.icf new file mode 100644 index 0000000..ccee9c4 --- /dev/null +++ b/boards/ek-lm4f120xl/mpu_fault/mpu_fault.icf @@ -0,0 +1,78 @@ +//***************************************************************************** +// +// mpu_fault.icf - Linker configuration file for mpu_fault. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +// +// Define a memory region that covers the entire 4 GB addressible space of the +// processor. +// +define memory mem with size = 4G; + +// +// Define a region for the on-chip flash. +// +define region FLASH = mem:[from 0x00000000 to 0x0003ffff]; + +// +// Define a region for the on-chip SRAM. +// +define region SRAM = mem:[from 0x20000000 to 0x20007fff]; + +// +// Define a block for the heap. The size should be set to something other +// than zero if things in the C library that require the heap are used. +// +define block HEAP with alignment = 8, size = 0x00000000 { }; + +// +// Indicate that the read/write values should be initialized by copying from +// flash. +// +initialize by copy { readwrite }; + +// +// Indicate that the noinit values should be left alone. This includes the +// stack, which if initialized will destroy the return address from the +// initialization code, causing the processor to branch to zero and fault. +// +do not initialize { section .noinit }; + +// +// Place the interrupt vectors at the start of flash. +// +place at start of FLASH { readonly section .intvec }; + +// +// Place the remainder of the read-only items into flash. +// +place in FLASH { readonly }; + +// +// Place the RAM vector table at the start of SRAM. +// +place at start of SRAM { section VTABLE }; + +// +// Place all read/write items into SRAM. +// +place in SRAM { readwrite, block HEAP }; diff --git a/boards/ek-lm4f120xl/mpu_fault/mpu_fault.ld b/boards/ek-lm4f120xl/mpu_fault/mpu_fault.ld new file mode 100644 index 0000000..5d0fbcb --- /dev/null +++ b/boards/ek-lm4f120xl/mpu_fault/mpu_fault.ld @@ -0,0 +1,57 @@ +/****************************************************************************** + * + * mpu_fault.ld - Linker configuration file for mpu_fault. + * + * Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. + * Software License Agreement + * + * Texas Instruments (TI) is supplying this software for use solely and + * exclusively on TI's microcontroller products. The software is owned by + * TI and/or its suppliers, and is protected under applicable copyright + * laws. You may not combine this software with "viral" open-source + * software in order to form a larger program. + * + * THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. + * NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT + * NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY + * CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL + * DAMAGES, FOR ANY REASON WHATSOEVER. + * + * This is part of revision 9453 of the EK-LM4F120XL Firmware Package. + * + *****************************************************************************/ + +MEMORY +{ + FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x00040000 + SRAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00008000 +} + +SECTIONS +{ + .text : + { + _text = .; + KEEP(*(.isr_vector)) + *(.text*) + *(.rodata*) + _etext = .; + } > FLASH + + .data : AT(ADDR(.text) + SIZEOF(.text)) + { + _data = .; + *(vtable) + *(.data*) + _edata = .; + } > SRAM + + .bss : + { + _bss = .; + *(.bss*) + *(COMMON) + _ebss = .; + } > SRAM +} diff --git a/boards/ek-lm4f120xl/mpu_fault/mpu_fault.sct b/boards/ek-lm4f120xl/mpu_fault/mpu_fault.sct new file mode 100644 index 0000000..9fa08ac --- /dev/null +++ b/boards/ek-lm4f120xl/mpu_fault/mpu_fault.sct @@ -0,0 +1,47 @@ +;****************************************************************************** +; +; mpu_fault.sct - Linker configuration file for mpu_fault. +; +; Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +; Software License Agreement +; +; Texas Instruments (TI) is supplying this software for use solely and +; exclusively on TI's microcontroller products. The software is owned by +; TI and/or its suppliers, and is protected under applicable copyright +; laws. You may not combine this software with "viral" open-source +; software in order to form a larger program. +; +; THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +; NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +; NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +; A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +; CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +; DAMAGES, FOR ANY REASON WHATSOEVER. +; +; This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +; +;****************************************************************************** + +LR_IROM 0x00000000 0x00040000 +{ + ; + ; Specify the Execution Address of the code and the size. + ; + ER_IROM 0x00000000 0x00040000 + { + *.o (RESET, +First) + * (InRoot$$Sections, +RO) + } + + ; + ; Specify the Execution Address of the data area. + ; + RW_IRAM 0x20000000 0x00008000 + { + ; + ; Uncomment the following line in order to use IntRegister(). + ; + ;* (vtable, +First) + * (+RW, +ZI) + } +} diff --git a/boards/ek-lm4f120xl/mpu_fault/mpu_fault.sgxx b/boards/ek-lm4f120xl/mpu_fault/mpu_fault.sgxx new file mode 100644 index 0000000..2c79b62 Binary files /dev/null and b/boards/ek-lm4f120xl/mpu_fault/mpu_fault.sgxx differ diff --git a/boards/ek-lm4f120xl/mpu_fault/mpu_fault.uvopt b/boards/ek-lm4f120xl/mpu_fault/mpu_fault.uvopt new file mode 100644 index 0000000..7ea7e45 --- /dev/null +++ b/boards/ek-lm4f120xl/mpu_fault/mpu_fault.uvopt @@ -0,0 +1,303 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + + + + 0 + 0 + + + + mpu_fault + 0x4 + ARM-ADS + + 8000000 + + 1 + 1 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\rvmdk\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 255 + + + 0 + Data Sheet + DATASHTS\Luminary\LM4F120H5QR.PDF + + + + SARMCM3.DLL + -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 0 + 1 + 0 + 0 + 4 + + + + + + + + + + + BIN\lmidk-agdi.dll + + + + 0 + lmidk-agdi + -O4614 -S3 -FO29 + + + 0 + DLGTARM + + + + 0 + ARMDBGFLAGS + + + + + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + Source + 1 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + .\mpu_fault.c + mpu_fault.c + + + 1 + 2 + 2 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + .\startup_rvmdk.S + startup_rvmdk.S + + + 1 + 3 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\utils\uartstdio.c + uartstdio.c + + + + + Libraries + 1 + 0 + 0 + + 2 + 4 + 4 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\driverlib\rvmdk-cm4f\driverlib-cm4f.lib + driverlib-cm4f.lib + + + + + Documentation + 1 + 0 + 0 + + 3 + 5 + 5 + 0 + 1 + 0 + 0 + 1 + 1 + 0 + .\readme.txt + readme.txt + + 44 + 0 + 1 + + -1 + -1 + + + -1 + -1 + + + 0 + 0 + 729 + 300 + + + + + + + 1 + 0 + + 100 + 0 + + + .\readme.txt + 0 + 1 + 1 + + + + + + diff --git a/boards/ek-lm4f120xl/mpu_fault/mpu_fault.uvproj b/boards/ek-lm4f120xl/mpu_fault/mpu_fault.uvproj new file mode 100644 index 0000000..acf5a41 --- /dev/null +++ b/boards/ek-lm4f120xl/mpu_fault/mpu_fault.uvproj @@ -0,0 +1,429 @@ + + + + 1.1 + +
### uVision Project, (C) Keil Software
+ + + + mpu_fault + 0x4 + ARM-ADS + + + LM4F120H5QR + Texas Instruments + IRAM(0x20000000-0x20007FFF) IROM(0-0x3FFFF) CLOCK(8000000) CPUTYPE("Cortex-M4") FPU2 + + "STARTUP\Luminary\Startup.s" ("Luminary Startup Code") + UL2CM3(-O207 -S0 -C0 -FO7 -FD20000000 -FC800 -FN1 -FF0LM4F_256 -FS00 -FL040000) + 5919 + LM4Fxxxx.H + + + + + + + + + + 0 + + + + Luminary\ + Luminary\ + + 0 + 0 + 0 + 0 + 1 + + .\rvmdk\ + mpu_fault + 1 + 0 + 0 + 1 + 1 + .\rvmdk\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + + 1 + 0 + fromelf --bin --output .\rvmdk\mpu_fault.bin .\rvmdk\mpu_fault.axf + + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + + + SARMCM3.DLL + -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + + 1 + 0 + 0 + 0 + 16 + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + + + 1 + 1 + 0 + 1 + 1 + 1 + 0 + 1 + + 0 + 4 + + + + + + + + + + + + + + BIN\lmidk-agdi.dll + + + + + 1 + 0 + 0 + 0 + 1 + 4099 + + BIN\lmidk-agdi.dll + + + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M4" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 2 + 0 + 0 + 8 + 1 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x8000 + + + 1 + 0x0 + 0x40000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x40000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x8000 + + + 0 + 0x0 + 0x0 + + + + + + 0 + 3 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + + + rvmdk PART_LM4F120H5QR TARGET_IS_BLIZZARD_RA1 + + ..\..\..;..\..\..; + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x00000000 + 0x20000000 + mpu_fault.sct + + + --entry Reset_Handler + + + + + + + + Source + + + mpu_fault.c + 1 + .\mpu_fault.c + + + startup_rvmdk.S + 2 + .\startup_rvmdk.S + + + uartstdio.c + 1 + ..\..\..\utils\uartstdio.c + + + + + Libraries + + + driverlib-cm4f.lib + 4 + ..\..\..\driverlib\rvmdk-cm4f\driverlib-cm4f.lib + + + + + Documentation + + + readme.txt + 5 + .\readme.txt + + + + + + + + diff --git a/boards/ek-lm4f120xl/mpu_fault/mpu_fault_ccs.cmd b/boards/ek-lm4f120xl/mpu_fault/mpu_fault_ccs.cmd new file mode 100644 index 0000000..89e020e --- /dev/null +++ b/boards/ek-lm4f120xl/mpu_fault/mpu_fault_ccs.cmd @@ -0,0 +1,70 @@ +/****************************************************************************** + * + * mpu_fault_ccs.cmd - CCS linker configuration file for mpu_fault. + * + * Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. + * Software License Agreement + * + * Texas Instruments (TI) is supplying this software for use solely and + * exclusively on TI's microcontroller products. The software is owned by + * TI and/or its suppliers, and is protected under applicable copyright + * laws. You may not combine this software with "viral" open-source + * software in order to form a larger program. + * + * THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. + * NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT + * NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY + * CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL + * DAMAGES, FOR ANY REASON WHATSOEVER. + * + * This is part of revision 9453 of the EK-LM4F120XL Firmware Package. + * + *****************************************************************************/ + +--retain=g_pfnVectors + +/* The following command line options are set as part of the CCS project. */ +/* If you are building using the command line, or for some reason want to */ +/* define them here, you can uncomment and modify these lines as needed. */ +/* If you are using CCS for building, it is probably better to make any such */ +/* modifications in your CCS project and leave this file alone. */ +/* */ +/* --heap_size=0 */ +/* --stack_size=256 */ +/* --library=rtsv7M3_T_le_eabi.lib */ + +/* The starting address of the application. Normally the interrupt vectors */ +/* must be located at the beginning of the application. */ +#define APP_BASE 0x00000000 +#define RAM_BASE 0x20000000 + +/* System memory map */ + +MEMORY +{ + /* Application stored in and executes from internal flash */ + FLASH (RX) : origin = APP_BASE, length = 0x00040000 + /* Application uses internal RAM for data */ + SRAM (RWX) : origin = 0x20000000, length = 0x00008000 +} + +/* Section allocation in memory */ + +SECTIONS +{ + .intvecs: > APP_BASE + .text : > FLASH + .const : > FLASH + .cinit : > FLASH + .pinit : > FLASH + .init_array : > FLASH + + .vtable : > RAM_BASE + .data : > SRAM + .bss : > SRAM + .sysmem : > SRAM + .stack : > SRAM +} + +__STACK_TOP = __stack + 256; diff --git a/boards/ek-lm4f120xl/mpu_fault/mpu_fault_sourcerygxx.ld b/boards/ek-lm4f120xl/mpu_fault/mpu_fault_sourcerygxx.ld new file mode 100644 index 0000000..fb09767 --- /dev/null +++ b/boards/ek-lm4f120xl/mpu_fault/mpu_fault_sourcerygxx.ld @@ -0,0 +1,39 @@ +/****************************************************************************** + * + * mpu_fault_sourcerygxx.ld - Scatter file for Sourcery CodeBench + * + * Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. + * Software License Agreement + * + * Texas Instruments (TI) is supplying this software for use solely and + * exclusively on TI's microcontroller products. The software is owned by + * TI and/or its suppliers, and is protected under applicable copyright + * laws. You may not combine this software with "viral" open-source + * software in order to form a larger program. + * + * THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. + * NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT + * NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY + * CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL + * DAMAGES, FOR ANY REASON WHATSOEVER. + * + * This is part of revision 9453 of the EK-LM4F120XL Firmware Package. + * + *****************************************************************************/ + +/****************************************************************************** + * + * Define the end of the heap space, which determines the beginning of the + * stack space. + * + *****************************************************************************/ +__cs3_heap_end = __cs3_region_end_ram - 256; + +/****************************************************************************** + * + * Define the interrupt handlers used by the application. + * + *****************************************************************************/ +EXTERN(MPUFaultHandler) +__cs3_isr_mpu_fault = MPUFaultHandler; diff --git a/boards/ek-lm4f120xl/mpu_fault/readme.txt b/boards/ek-lm4f120xl/mpu_fault/readme.txt new file mode 100644 index 0000000..2b9f716 --- /dev/null +++ b/boards/ek-lm4f120xl/mpu_fault/readme.txt @@ -0,0 +1,28 @@ +MPU + +This example application demonstrates the use of the MPU to protect a +region of memory from access, and to generate a memory management fault +when there is an access violation. + +UART0, connected to the Stellaris virtual serial port and running at +115,200, 8-N-1, is used to display messages from this application. + +------------------------------------------------------------------------------- + +Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +Software License Agreement + +Texas Instruments (TI) is supplying this software for use solely and +exclusively on TI's microcontroller products. The software is owned by +TI and/or its suppliers, and is protected under applicable copyright +laws. You may not combine this software with "viral" open-source +software in order to form a larger program. + +THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +DAMAGES, FOR ANY REASON WHATSOEVER. + +This is part of revision 9453 of the EK-LM4F120XL Firmware Package. diff --git a/boards/ek-lm4f120xl/mpu_fault/rvmdk/mpu_fault.axf b/boards/ek-lm4f120xl/mpu_fault/rvmdk/mpu_fault.axf new file mode 100644 index 0000000..02cb5ec Binary files /dev/null and b/boards/ek-lm4f120xl/mpu_fault/rvmdk/mpu_fault.axf differ diff --git a/boards/ek-lm4f120xl/mpu_fault/rvmdk/mpu_fault.bin b/boards/ek-lm4f120xl/mpu_fault/rvmdk/mpu_fault.bin new file mode 100644 index 0000000..514c805 Binary files /dev/null and b/boards/ek-lm4f120xl/mpu_fault/rvmdk/mpu_fault.bin differ diff --git a/boards/ek-lm4f120xl/mpu_fault/sourcerygxx/mpu_fault.axf b/boards/ek-lm4f120xl/mpu_fault/sourcerygxx/mpu_fault.axf new file mode 100644 index 0000000..68c9216 Binary files /dev/null and b/boards/ek-lm4f120xl/mpu_fault/sourcerygxx/mpu_fault.axf differ diff --git a/boards/ek-lm4f120xl/mpu_fault/sourcerygxx/mpu_fault.bin b/boards/ek-lm4f120xl/mpu_fault/sourcerygxx/mpu_fault.bin new file mode 100644 index 0000000..dac317e Binary files /dev/null and b/boards/ek-lm4f120xl/mpu_fault/sourcerygxx/mpu_fault.bin differ diff --git a/boards/ek-lm4f120xl/mpu_fault/startup_ccs.c b/boards/ek-lm4f120xl/mpu_fault/startup_ccs.c new file mode 100644 index 0000000..eeaa019 --- /dev/null +++ b/boards/ek-lm4f120xl/mpu_fault/startup_ccs.c @@ -0,0 +1,298 @@ +//***************************************************************************** +// +// startup_ccs.c - Startup code for use with TI's Code Composer Studio. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +//***************************************************************************** +// +// Forward declaration of the default fault handlers. +// +//***************************************************************************** +void ResetISR(void); +static void NmiSR(void); +static void FaultISR(void); +static void IntDefaultHandler(void); + +//***************************************************************************** +// +// External declaration for the reset handler that is to be called when the +// processor is started +// +//***************************************************************************** +extern void _c_int00(void); + +//***************************************************************************** +// +// Linker variable that marks the top of the stack. +// +//***************************************************************************** +extern unsigned long __STACK_TOP; + +//***************************************************************************** +// +// External declaration for the interrupt handler used by the application. +// +//***************************************************************************** +extern void MPUFaultHandler(void); + +//***************************************************************************** +// +// The vector table. Note that the proper constructs must be placed on this to +// ensure that it ends up at physical address 0x0000.0000 or at the start of +// the program if located at a start address other than 0. +// +//***************************************************************************** +#pragma DATA_SECTION(g_pfnVectors, ".intvecs") +void (* const g_pfnVectors[])(void) = +{ + (void (*)(void))((unsigned long)&__STACK_TOP), + // The initial stack pointer + ResetISR, // The reset handler + NmiSR, // The NMI handler + FaultISR, // The hard fault handler + MPUFaultHandler, // The MPU fault handler + IntDefaultHandler, // The bus fault handler + IntDefaultHandler, // The usage fault handler + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // SVCall handler + IntDefaultHandler, // Debug monitor handler + 0, // Reserved + IntDefaultHandler, // The PendSV handler + IntDefaultHandler, // The SysTick handler + IntDefaultHandler, // GPIO Port A + IntDefaultHandler, // GPIO Port B + IntDefaultHandler, // GPIO Port C + IntDefaultHandler, // GPIO Port D + IntDefaultHandler, // GPIO Port E + IntDefaultHandler, // UART0 Rx and Tx + IntDefaultHandler, // UART1 Rx and Tx + IntDefaultHandler, // SSI0 Rx and Tx + IntDefaultHandler, // I2C0 Master and Slave + IntDefaultHandler, // PWM Fault + IntDefaultHandler, // PWM Generator 0 + IntDefaultHandler, // PWM Generator 1 + IntDefaultHandler, // PWM Generator 2 + IntDefaultHandler, // Quadrature Encoder 0 + IntDefaultHandler, // ADC Sequence 0 + IntDefaultHandler, // ADC Sequence 1 + IntDefaultHandler, // ADC Sequence 2 + IntDefaultHandler, // ADC Sequence 3 + IntDefaultHandler, // Watchdog timer + IntDefaultHandler, // Timer 0 subtimer A + IntDefaultHandler, // Timer 0 subtimer B + IntDefaultHandler, // Timer 1 subtimer A + IntDefaultHandler, // Timer 1 subtimer B + IntDefaultHandler, // Timer 2 subtimer A + IntDefaultHandler, // Timer 2 subtimer B + IntDefaultHandler, // Analog Comparator 0 + IntDefaultHandler, // Analog Comparator 1 + IntDefaultHandler, // Analog Comparator 2 + IntDefaultHandler, // System Control (PLL, OSC, BO) + IntDefaultHandler, // FLASH Control + IntDefaultHandler, // GPIO Port F + IntDefaultHandler, // GPIO Port G + IntDefaultHandler, // GPIO Port H + IntDefaultHandler, // UART2 Rx and Tx + IntDefaultHandler, // SSI1 Rx and Tx + IntDefaultHandler, // Timer 3 subtimer A + IntDefaultHandler, // Timer 3 subtimer B + IntDefaultHandler, // I2C1 Master and Slave + IntDefaultHandler, // Quadrature Encoder 1 + IntDefaultHandler, // CAN0 + IntDefaultHandler, // CAN1 + IntDefaultHandler, // CAN2 + IntDefaultHandler, // Ethernet + IntDefaultHandler, // Hibernate + IntDefaultHandler, // USB0 + IntDefaultHandler, // PWM Generator 3 + IntDefaultHandler, // uDMA Software Transfer + IntDefaultHandler, // uDMA Error + IntDefaultHandler, // ADC1 Sequence 0 + IntDefaultHandler, // ADC1 Sequence 1 + IntDefaultHandler, // ADC1 Sequence 2 + IntDefaultHandler, // ADC1 Sequence 3 + IntDefaultHandler, // I2S0 + IntDefaultHandler, // External Bus Interface 0 + IntDefaultHandler, // GPIO Port J + IntDefaultHandler, // GPIO Port K + IntDefaultHandler, // GPIO Port L + IntDefaultHandler, // SSI2 Rx and Tx + IntDefaultHandler, // SSI3 Rx and Tx + IntDefaultHandler, // UART3 Rx and Tx + IntDefaultHandler, // UART4 Rx and Tx + IntDefaultHandler, // UART5 Rx and Tx + IntDefaultHandler, // UART6 Rx and Tx + IntDefaultHandler, // UART7 Rx and Tx + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // I2C2 Master and Slave + IntDefaultHandler, // I2C3 Master and Slave + IntDefaultHandler, // Timer 4 subtimer A + IntDefaultHandler, // Timer 4 subtimer B + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // Timer 5 subtimer A + IntDefaultHandler, // Timer 5 subtimer B + IntDefaultHandler, // Wide Timer 0 subtimer A + IntDefaultHandler, // Wide Timer 0 subtimer B + IntDefaultHandler, // Wide Timer 1 subtimer A + IntDefaultHandler, // Wide Timer 1 subtimer B + IntDefaultHandler, // Wide Timer 2 subtimer A + IntDefaultHandler, // Wide Timer 2 subtimer B + IntDefaultHandler, // Wide Timer 3 subtimer A + IntDefaultHandler, // Wide Timer 3 subtimer B + IntDefaultHandler, // Wide Timer 4 subtimer A + IntDefaultHandler, // Wide Timer 4 subtimer B + IntDefaultHandler, // Wide Timer 5 subtimer A + IntDefaultHandler, // Wide Timer 5 subtimer B + IntDefaultHandler, // FPU + IntDefaultHandler, // PECI 0 + IntDefaultHandler, // LPC 0 + IntDefaultHandler, // I2C4 Master and Slave + IntDefaultHandler, // I2C5 Master and Slave + IntDefaultHandler, // GPIO Port M + IntDefaultHandler, // GPIO Port N + IntDefaultHandler, // Quadrature Encoder 2 + IntDefaultHandler, // Fan 0 + 0, // Reserved + IntDefaultHandler, // GPIO Port P (Summary or P0) + IntDefaultHandler, // GPIO Port P1 + IntDefaultHandler, // GPIO Port P2 + IntDefaultHandler, // GPIO Port P3 + IntDefaultHandler, // GPIO Port P4 + IntDefaultHandler, // GPIO Port P5 + IntDefaultHandler, // GPIO Port P6 + IntDefaultHandler, // GPIO Port P7 + IntDefaultHandler, // GPIO Port Q (Summary or Q0) + IntDefaultHandler, // GPIO Port Q1 + IntDefaultHandler, // GPIO Port Q2 + IntDefaultHandler, // GPIO Port Q3 + IntDefaultHandler, // GPIO Port Q4 + IntDefaultHandler, // GPIO Port Q5 + IntDefaultHandler, // GPIO Port Q6 + IntDefaultHandler, // GPIO Port Q7 + IntDefaultHandler, // GPIO Port R + IntDefaultHandler, // GPIO Port S + IntDefaultHandler, // PWM 1 Generator 0 + IntDefaultHandler, // PWM 1 Generator 1 + IntDefaultHandler, // PWM 1 Generator 2 + IntDefaultHandler, // PWM 1 Generator 3 + IntDefaultHandler // PWM 1 Fault +}; + +//***************************************************************************** +// +// This is the code that gets called when the processor first starts execution +// following a reset event. Only the absolutely necessary set is performed, +// after which the application supplied entry() routine is called. Any fancy +// actions (such as making decisions based on the reset cause register, and +// resetting the bits in that register) are left solely in the hands of the +// application. +// +//***************************************************************************** +void +ResetISR(void) +{ + // + // Jump to the CCS C initialization routine. This will enable the + // floating-point unit as well, so that does not need to be done here. + // + __asm(" .global _c_int00\n" + " b.w _c_int00"); +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a NMI. This +// simply enters an infinite loop, preserving the system state for examination +// by a debugger. +// +//***************************************************************************** +static void +NmiSR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a fault +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +FaultISR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives an unexpected +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +IntDefaultHandler(void) +{ + // + // Go into an infinite loop. + // + while(1) + { + } +} diff --git a/boards/ek-lm4f120xl/mpu_fault/startup_ewarm.c b/boards/ek-lm4f120xl/mpu_fault/startup_ewarm.c new file mode 100644 index 0000000..243b4d4 --- /dev/null +++ b/boards/ek-lm4f120xl/mpu_fault/startup_ewarm.c @@ -0,0 +1,332 @@ +//***************************************************************************** +// +// startup_ewarm.c - Startup code for use with IAR's Embedded Workbench, +// version 5. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +#include "inc/hw_nvic.h" +#include "inc/hw_types.h" + +//***************************************************************************** +// +// Enable the IAR extensions for this source file. +// +//***************************************************************************** +#pragma language=extended + +//***************************************************************************** +// +// Forward declaration of the default fault handlers. +// +//***************************************************************************** +void ResetISR(void); +static void NmiSR(void); +static void FaultISR(void); +static void IntDefaultHandler(void); + +//***************************************************************************** +// +// External declaration for the interrupt handler used by the application. +// +//***************************************************************************** +extern void MPUFaultHandler(void); + +//***************************************************************************** +// +// The entry point for the application startup code. +// +//***************************************************************************** +extern void __iar_program_start(void); + +//***************************************************************************** +// +// Reserve space for the system stack. +// +//***************************************************************************** +static unsigned long pulStack[64] @ ".noinit"; + +//***************************************************************************** +// +// A union that describes the entries of the vector table. The union is needed +// since the first entry is the stack pointer and the remainder are function +// pointers. +// +//***************************************************************************** +typedef union +{ + void (*pfnHandler)(void); + unsigned long ulPtr; +} +uVectorEntry; + +//***************************************************************************** +// +// The vector table. Note that the proper constructs must be placed on this to +// ensure that it ends up at physical address 0x0000.0000. +// +//***************************************************************************** +__root const uVectorEntry __vector_table[] @ ".intvec" = +{ + { .ulPtr = (unsigned long)pulStack + sizeof(pulStack) }, + // The initial stack pointer + ResetISR, // The reset handler + NmiSR, // The NMI handler + FaultISR, // The hard fault handler + MPUFaultHandler, // The MPU fault handler + IntDefaultHandler, // The bus fault handler + IntDefaultHandler, // The usage fault handler + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // SVCall handler + IntDefaultHandler, // Debug monitor handler + 0, // Reserved + IntDefaultHandler, // The PendSV handler + IntDefaultHandler, // The SysTick handler + IntDefaultHandler, // GPIO Port A + IntDefaultHandler, // GPIO Port B + IntDefaultHandler, // GPIO Port C + IntDefaultHandler, // GPIO Port D + IntDefaultHandler, // GPIO Port E + IntDefaultHandler, // UART0 Rx and Tx + IntDefaultHandler, // UART1 Rx and Tx + IntDefaultHandler, // SSI0 Rx and Tx + IntDefaultHandler, // I2C0 Master and Slave + IntDefaultHandler, // PWM Fault + IntDefaultHandler, // PWM Generator 0 + IntDefaultHandler, // PWM Generator 1 + IntDefaultHandler, // PWM Generator 2 + IntDefaultHandler, // Quadrature Encoder 0 + IntDefaultHandler, // ADC Sequence 0 + IntDefaultHandler, // ADC Sequence 1 + IntDefaultHandler, // ADC Sequence 2 + IntDefaultHandler, // ADC Sequence 3 + IntDefaultHandler, // Watchdog timer + IntDefaultHandler, // Timer 0 subtimer A + IntDefaultHandler, // Timer 0 subtimer B + IntDefaultHandler, // Timer 1 subtimer A + IntDefaultHandler, // Timer 1 subtimer B + IntDefaultHandler, // Timer 2 subtimer A + IntDefaultHandler, // Timer 2 subtimer B + IntDefaultHandler, // Analog Comparator 0 + IntDefaultHandler, // Analog Comparator 1 + IntDefaultHandler, // Analog Comparator 2 + IntDefaultHandler, // System Control (PLL, OSC, BO) + IntDefaultHandler, // FLASH Control + IntDefaultHandler, // GPIO Port F + IntDefaultHandler, // GPIO Port G + IntDefaultHandler, // GPIO Port H + IntDefaultHandler, // UART2 Rx and Tx + IntDefaultHandler, // SSI1 Rx and Tx + IntDefaultHandler, // Timer 3 subtimer A + IntDefaultHandler, // Timer 3 subtimer B + IntDefaultHandler, // I2C1 Master and Slave + IntDefaultHandler, // Quadrature Encoder 1 + IntDefaultHandler, // CAN0 + IntDefaultHandler, // CAN1 + IntDefaultHandler, // CAN2 + IntDefaultHandler, // Ethernet + IntDefaultHandler, // Hibernate + IntDefaultHandler, // USB0 + IntDefaultHandler, // PWM Generator 3 + IntDefaultHandler, // uDMA Software Transfer + IntDefaultHandler, // uDMA Error + IntDefaultHandler, // ADC1 Sequence 0 + IntDefaultHandler, // ADC1 Sequence 1 + IntDefaultHandler, // ADC1 Sequence 2 + IntDefaultHandler, // ADC1 Sequence 3 + IntDefaultHandler, // I2S0 + IntDefaultHandler, // External Bus Interface 0 + IntDefaultHandler, // GPIO Port J + IntDefaultHandler, // GPIO Port K + IntDefaultHandler, // GPIO Port L + IntDefaultHandler, // SSI2 Rx and Tx + IntDefaultHandler, // SSI3 Rx and Tx + IntDefaultHandler, // UART3 Rx and Tx + IntDefaultHandler, // UART4 Rx and Tx + IntDefaultHandler, // UART5 Rx and Tx + IntDefaultHandler, // UART6 Rx and Tx + IntDefaultHandler, // UART7 Rx and Tx + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // I2C2 Master and Slave + IntDefaultHandler, // I2C3 Master and Slave + IntDefaultHandler, // Timer 4 subtimer A + IntDefaultHandler, // Timer 4 subtimer B + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // Timer 5 subtimer A + IntDefaultHandler, // Timer 5 subtimer B + IntDefaultHandler, // Wide Timer 0 subtimer A + IntDefaultHandler, // Wide Timer 0 subtimer B + IntDefaultHandler, // Wide Timer 1 subtimer A + IntDefaultHandler, // Wide Timer 1 subtimer B + IntDefaultHandler, // Wide Timer 2 subtimer A + IntDefaultHandler, // Wide Timer 2 subtimer B + IntDefaultHandler, // Wide Timer 3 subtimer A + IntDefaultHandler, // Wide Timer 3 subtimer B + IntDefaultHandler, // Wide Timer 4 subtimer A + IntDefaultHandler, // Wide Timer 4 subtimer B + IntDefaultHandler, // Wide Timer 5 subtimer A + IntDefaultHandler, // Wide Timer 5 subtimer B + IntDefaultHandler, // FPU + IntDefaultHandler, // PECI 0 + IntDefaultHandler, // LPC 0 + IntDefaultHandler, // I2C4 Master and Slave + IntDefaultHandler, // I2C5 Master and Slave + IntDefaultHandler, // GPIO Port M + IntDefaultHandler, // GPIO Port N + IntDefaultHandler, // Quadrature Encoder 2 + IntDefaultHandler, // Fan 0 + 0, // Reserved + IntDefaultHandler, // GPIO Port P (Summary or P0) + IntDefaultHandler, // GPIO Port P1 + IntDefaultHandler, // GPIO Port P2 + IntDefaultHandler, // GPIO Port P3 + IntDefaultHandler, // GPIO Port P4 + IntDefaultHandler, // GPIO Port P5 + IntDefaultHandler, // GPIO Port P6 + IntDefaultHandler, // GPIO Port P7 + IntDefaultHandler, // GPIO Port Q (Summary or Q0) + IntDefaultHandler, // GPIO Port Q1 + IntDefaultHandler, // GPIO Port Q2 + IntDefaultHandler, // GPIO Port Q3 + IntDefaultHandler, // GPIO Port Q4 + IntDefaultHandler, // GPIO Port Q5 + IntDefaultHandler, // GPIO Port Q6 + IntDefaultHandler, // GPIO Port Q7 + IntDefaultHandler, // GPIO Port R + IntDefaultHandler, // GPIO Port S + IntDefaultHandler, // PWM 1 Generator 0 + IntDefaultHandler, // PWM 1 Generator 1 + IntDefaultHandler, // PWM 1 Generator 2 + IntDefaultHandler, // PWM 1 Generator 3 + IntDefaultHandler // PWM 1 Fault +}; + +//***************************************************************************** +// +// This is the code that gets called when the processor first starts execution +// following a reset event. Only the absolutely necessary set is performed, +// after which the application supplied entry() routine is called. Any fancy +// actions (such as making decisions based on the reset cause register, and +// resetting the bits in that register) are left solely in the hands of the +// application. +// +//***************************************************************************** +void +ResetISR(void) +{ + // + // Enable the floating-point unit. This must be done here to handle the + // case where main() uses floating-point and the function prologue saves + // floating-point registers (which will fault if floating-point is not + // enabled). Any configuration of the floating-point unit using DriverLib + // APIs must be done here prior to the floating-point unit being enabled. + // + // Note that this does not use DriverLib since it might not be included in + // this project. + // + HWREG(NVIC_CPAC) = ((HWREG(NVIC_CPAC) & + ~(NVIC_CPAC_CP10_M | NVIC_CPAC_CP11_M)) | + NVIC_CPAC_CP10_FULL | NVIC_CPAC_CP11_FULL); + + // + // Call the application's entry point. + // + __iar_program_start(); +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a NMI. This +// simply enters an infinite loop, preserving the system state for examination +// by a debugger. +// +//***************************************************************************** +static void +NmiSR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a fault +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +FaultISR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives an unexpected +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +IntDefaultHandler(void) +{ + // + // Go into an infinite loop. + // + while(1) + { + } +} diff --git a/boards/ek-lm4f120xl/mpu_fault/startup_gcc.c b/boards/ek-lm4f120xl/mpu_fault/startup_gcc.c new file mode 100644 index 0000000..751397a --- /dev/null +++ b/boards/ek-lm4f120xl/mpu_fault/startup_gcc.c @@ -0,0 +1,348 @@ +//***************************************************************************** +// +// startup_gcc.c - Startup code for use with GNU tools. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +#include "inc/hw_nvic.h" +#include "inc/hw_types.h" + +//***************************************************************************** +// +// Forward declaration of the default fault handlers. +// +//***************************************************************************** +void ResetISR(void); +static void NmiSR(void); +static void FaultISR(void); +static void IntDefaultHandler(void); + +//***************************************************************************** +// +// External declaration for the interrupt handler used by the application. +// +//***************************************************************************** +extern void MPUFaultHandler(void); + +//***************************************************************************** +// +// The entry point for the application. +// +//***************************************************************************** +extern int main(void); + +//***************************************************************************** +// +// Reserve space for the system stack. +// +//***************************************************************************** +static unsigned long pulStack[64]; + +//***************************************************************************** +// +// The vector table. Note that the proper constructs must be placed on this to +// ensure that it ends up at physical address 0x0000.0000. +// +//***************************************************************************** +__attribute__ ((section(".isr_vector"))) +void (* const g_pfnVectors[])(void) = +{ + (void (*)(void))((unsigned long)pulStack + sizeof(pulStack)), + // The initial stack pointer + ResetISR, // The reset handler + NmiSR, // The NMI handler + FaultISR, // The hard fault handler + MPUFaultHandler, // The MPU fault handler + IntDefaultHandler, // The bus fault handler + IntDefaultHandler, // The usage fault handler + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // SVCall handler + IntDefaultHandler, // Debug monitor handler + 0, // Reserved + IntDefaultHandler, // The PendSV handler + IntDefaultHandler, // The SysTick handler + IntDefaultHandler, // GPIO Port A + IntDefaultHandler, // GPIO Port B + IntDefaultHandler, // GPIO Port C + IntDefaultHandler, // GPIO Port D + IntDefaultHandler, // GPIO Port E + IntDefaultHandler, // UART0 Rx and Tx + IntDefaultHandler, // UART1 Rx and Tx + IntDefaultHandler, // SSI0 Rx and Tx + IntDefaultHandler, // I2C0 Master and Slave + IntDefaultHandler, // PWM Fault + IntDefaultHandler, // PWM Generator 0 + IntDefaultHandler, // PWM Generator 1 + IntDefaultHandler, // PWM Generator 2 + IntDefaultHandler, // Quadrature Encoder 0 + IntDefaultHandler, // ADC Sequence 0 + IntDefaultHandler, // ADC Sequence 1 + IntDefaultHandler, // ADC Sequence 2 + IntDefaultHandler, // ADC Sequence 3 + IntDefaultHandler, // Watchdog timer + IntDefaultHandler, // Timer 0 subtimer A + IntDefaultHandler, // Timer 0 subtimer B + IntDefaultHandler, // Timer 1 subtimer A + IntDefaultHandler, // Timer 1 subtimer B + IntDefaultHandler, // Timer 2 subtimer A + IntDefaultHandler, // Timer 2 subtimer B + IntDefaultHandler, // Analog Comparator 0 + IntDefaultHandler, // Analog Comparator 1 + IntDefaultHandler, // Analog Comparator 2 + IntDefaultHandler, // System Control (PLL, OSC, BO) + IntDefaultHandler, // FLASH Control + IntDefaultHandler, // GPIO Port F + IntDefaultHandler, // GPIO Port G + IntDefaultHandler, // GPIO Port H + IntDefaultHandler, // UART2 Rx and Tx + IntDefaultHandler, // SSI1 Rx and Tx + IntDefaultHandler, // Timer 3 subtimer A + IntDefaultHandler, // Timer 3 subtimer B + IntDefaultHandler, // I2C1 Master and Slave + IntDefaultHandler, // Quadrature Encoder 1 + IntDefaultHandler, // CAN0 + IntDefaultHandler, // CAN1 + IntDefaultHandler, // CAN2 + IntDefaultHandler, // Ethernet + IntDefaultHandler, // Hibernate + IntDefaultHandler, // USB0 + IntDefaultHandler, // PWM Generator 3 + IntDefaultHandler, // uDMA Software Transfer + IntDefaultHandler, // uDMA Error + IntDefaultHandler, // ADC1 Sequence 0 + IntDefaultHandler, // ADC1 Sequence 1 + IntDefaultHandler, // ADC1 Sequence 2 + IntDefaultHandler, // ADC1 Sequence 3 + IntDefaultHandler, // I2S0 + IntDefaultHandler, // External Bus Interface 0 + IntDefaultHandler, // GPIO Port J + IntDefaultHandler, // GPIO Port K + IntDefaultHandler, // GPIO Port L + IntDefaultHandler, // SSI2 Rx and Tx + IntDefaultHandler, // SSI3 Rx and Tx + IntDefaultHandler, // UART3 Rx and Tx + IntDefaultHandler, // UART4 Rx and Tx + IntDefaultHandler, // UART5 Rx and Tx + IntDefaultHandler, // UART6 Rx and Tx + IntDefaultHandler, // UART7 Rx and Tx + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // I2C2 Master and Slave + IntDefaultHandler, // I2C3 Master and Slave + IntDefaultHandler, // Timer 4 subtimer A + IntDefaultHandler, // Timer 4 subtimer B + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // Timer 5 subtimer A + IntDefaultHandler, // Timer 5 subtimer B + IntDefaultHandler, // Wide Timer 0 subtimer A + IntDefaultHandler, // Wide Timer 0 subtimer B + IntDefaultHandler, // Wide Timer 1 subtimer A + IntDefaultHandler, // Wide Timer 1 subtimer B + IntDefaultHandler, // Wide Timer 2 subtimer A + IntDefaultHandler, // Wide Timer 2 subtimer B + IntDefaultHandler, // Wide Timer 3 subtimer A + IntDefaultHandler, // Wide Timer 3 subtimer B + IntDefaultHandler, // Wide Timer 4 subtimer A + IntDefaultHandler, // Wide Timer 4 subtimer B + IntDefaultHandler, // Wide Timer 5 subtimer A + IntDefaultHandler, // Wide Timer 5 subtimer B + IntDefaultHandler, // FPU + IntDefaultHandler, // PECI 0 + IntDefaultHandler, // LPC 0 + IntDefaultHandler, // I2C4 Master and Slave + IntDefaultHandler, // I2C5 Master and Slave + IntDefaultHandler, // GPIO Port M + IntDefaultHandler, // GPIO Port N + IntDefaultHandler, // Quadrature Encoder 2 + IntDefaultHandler, // Fan 0 + 0, // Reserved + IntDefaultHandler, // GPIO Port P (Summary or P0) + IntDefaultHandler, // GPIO Port P1 + IntDefaultHandler, // GPIO Port P2 + IntDefaultHandler, // GPIO Port P3 + IntDefaultHandler, // GPIO Port P4 + IntDefaultHandler, // GPIO Port P5 + IntDefaultHandler, // GPIO Port P6 + IntDefaultHandler, // GPIO Port P7 + IntDefaultHandler, // GPIO Port Q (Summary or Q0) + IntDefaultHandler, // GPIO Port Q1 + IntDefaultHandler, // GPIO Port Q2 + IntDefaultHandler, // GPIO Port Q3 + IntDefaultHandler, // GPIO Port Q4 + IntDefaultHandler, // GPIO Port Q5 + IntDefaultHandler, // GPIO Port Q6 + IntDefaultHandler, // GPIO Port Q7 + IntDefaultHandler, // GPIO Port R + IntDefaultHandler, // GPIO Port S + IntDefaultHandler, // PWM 1 Generator 0 + IntDefaultHandler, // PWM 1 Generator 1 + IntDefaultHandler, // PWM 1 Generator 2 + IntDefaultHandler, // PWM 1 Generator 3 + IntDefaultHandler // PWM 1 Fault +}; + +//***************************************************************************** +// +// The following are constructs created by the linker, indicating where the +// the "data" and "bss" segments reside in memory. The initializers for the +// for the "data" segment resides immediately following the "text" segment. +// +//***************************************************************************** +extern unsigned long _etext; +extern unsigned long _data; +extern unsigned long _edata; +extern unsigned long _bss; +extern unsigned long _ebss; + +//***************************************************************************** +// +// This is the code that gets called when the processor first starts execution +// following a reset event. Only the absolutely necessary set is performed, +// after which the application supplied entry() routine is called. Any fancy +// actions (such as making decisions based on the reset cause register, and +// resetting the bits in that register) are left solely in the hands of the +// application. +// +//***************************************************************************** +void +ResetISR(void) +{ + unsigned long *pulSrc, *pulDest; + + // + // Copy the data segment initializers from flash to SRAM. + // + pulSrc = &_etext; + for(pulDest = &_data; pulDest < &_edata; ) + { + *pulDest++ = *pulSrc++; + } + + // + // Zero fill the bss segment. + // + __asm(" ldr r0, =_bss\n" + " ldr r1, =_ebss\n" + " mov r2, #0\n" + " .thumb_func\n" + "zero_loop:\n" + " cmp r0, r1\n" + " it lt\n" + " strlt r2, [r0], #4\n" + " blt zero_loop"); + + // + // Enable the floating-point unit. This must be done here to handle the + // case where main() uses floating-point and the function prologue saves + // floating-point registers (which will fault if floating-point is not + // enabled). Any configuration of the floating-point unit using DriverLib + // APIs must be done here prior to the floating-point unit being enabled. + // + // Note that this does not use DriverLib since it might not be included in + // this project. + // + HWREG(NVIC_CPAC) = ((HWREG(NVIC_CPAC) & + ~(NVIC_CPAC_CP10_M | NVIC_CPAC_CP11_M)) | + NVIC_CPAC_CP10_FULL | NVIC_CPAC_CP11_FULL); + + // + // Call the application's entry point. + // + main(); +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a NMI. This +// simply enters an infinite loop, preserving the system state for examination +// by a debugger. +// +//***************************************************************************** +static void +NmiSR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a fault +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +FaultISR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives an unexpected +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +IntDefaultHandler(void) +{ + // + // Go into an infinite loop. + // + while(1) + { + } +} diff --git a/boards/ek-lm4f120xl/mpu_fault/startup_rvmdk.S b/boards/ek-lm4f120xl/mpu_fault/startup_rvmdk.S new file mode 100644 index 0000000..d13b6a0 --- /dev/null +++ b/boards/ek-lm4f120xl/mpu_fault/startup_rvmdk.S @@ -0,0 +1,358 @@ +; <<< Use Configuration Wizard in Context Menu >>> +;****************************************************************************** +; +; startup_rvmdk.S - Startup code for use with Keil's uVision. +; +; Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +; Software License Agreement +; +; Texas Instruments (TI) is supplying this software for use solely and +; exclusively on TI's microcontroller products. The software is owned by +; TI and/or its suppliers, and is protected under applicable copyright +; laws. You may not combine this software with "viral" open-source +; software in order to form a larger program. +; +; THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +; NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +; NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +; A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +; CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +; DAMAGES, FOR ANY REASON WHATSOEVER. +; +; This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +; +;****************************************************************************** + +;****************************************************************************** +; +; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +; +;****************************************************************************** +Stack EQU 0x00000100 + +;****************************************************************************** +; +; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> +; +;****************************************************************************** +Heap EQU 0x00000000 + +;****************************************************************************** +; +; Allocate space for the stack. +; +;****************************************************************************** + AREA STACK, NOINIT, READWRITE, ALIGN=3 +StackMem + SPACE Stack +__initial_sp + +;****************************************************************************** +; +; Allocate space for the heap. +; +;****************************************************************************** + AREA HEAP, NOINIT, READWRITE, ALIGN=3 +__heap_base +HeapMem + SPACE Heap +__heap_limit + +;****************************************************************************** +; +; Indicate that the code in this file preserves 8-byte alignment of the stack. +; +;****************************************************************************** + PRESERVE8 + +;****************************************************************************** +; +; Place code into the reset code section. +; +;****************************************************************************** + AREA RESET, CODE, READONLY + THUMB + +;****************************************************************************** +; +; External declaration for the interrupt handler used by the application. +; +;****************************************************************************** + EXTERN MPUFaultHandler + +;****************************************************************************** +; +; The vector table. +; +;****************************************************************************** + EXPORT __Vectors +__Vectors + DCD StackMem + Stack ; Top of Stack + DCD Reset_Handler ; Reset Handler + DCD NmiSR ; NMI Handler + DCD FaultISR ; Hard Fault Handler + DCD MPUFaultHandler ; The MPU fault handler + DCD IntDefaultHandler ; The bus fault handler + DCD IntDefaultHandler ; The usage fault handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD IntDefaultHandler ; SVCall handler + DCD IntDefaultHandler ; Debug monitor handler + DCD 0 ; Reserved + DCD IntDefaultHandler ; The PendSV handler + DCD IntDefaultHandler ; The SysTick handler + DCD IntDefaultHandler ; GPIO Port A + DCD IntDefaultHandler ; GPIO Port B + DCD IntDefaultHandler ; GPIO Port C + DCD IntDefaultHandler ; GPIO Port D + DCD IntDefaultHandler ; GPIO Port E + DCD IntDefaultHandler ; UART0 Rx and Tx + DCD IntDefaultHandler ; UART1 Rx and Tx + DCD IntDefaultHandler ; SSI0 Rx and Tx + DCD IntDefaultHandler ; I2C0 Master and Slave + DCD IntDefaultHandler ; PWM Fault + DCD IntDefaultHandler ; PWM Generator 0 + DCD IntDefaultHandler ; PWM Generator 1 + DCD IntDefaultHandler ; PWM Generator 2 + DCD IntDefaultHandler ; Quadrature Encoder 0 + DCD IntDefaultHandler ; ADC Sequence 0 + DCD IntDefaultHandler ; ADC Sequence 1 + DCD IntDefaultHandler ; ADC Sequence 2 + DCD IntDefaultHandler ; ADC Sequence 3 + DCD IntDefaultHandler ; Watchdog timer + DCD IntDefaultHandler ; Timer 0 subtimer A + DCD IntDefaultHandler ; Timer 0 subtimer B + DCD IntDefaultHandler ; Timer 1 subtimer A + DCD IntDefaultHandler ; Timer 1 subtimer B + DCD IntDefaultHandler ; Timer 2 subtimer A + DCD IntDefaultHandler ; Timer 2 subtimer B + DCD IntDefaultHandler ; Analog Comparator 0 + DCD IntDefaultHandler ; Analog Comparator 1 + DCD IntDefaultHandler ; Analog Comparator 2 + DCD IntDefaultHandler ; System Control (PLL, OSC, BO) + DCD IntDefaultHandler ; FLASH Control + DCD IntDefaultHandler ; GPIO Port F + DCD IntDefaultHandler ; GPIO Port G + DCD IntDefaultHandler ; GPIO Port H + DCD IntDefaultHandler ; UART2 Rx and Tx + DCD IntDefaultHandler ; SSI1 Rx and Tx + DCD IntDefaultHandler ; Timer 3 subtimer A + DCD IntDefaultHandler ; Timer 3 subtimer B + DCD IntDefaultHandler ; I2C1 Master and Slave + DCD IntDefaultHandler ; Quadrature Encoder 1 + DCD IntDefaultHandler ; CAN0 + DCD IntDefaultHandler ; CAN1 + DCD IntDefaultHandler ; CAN2 + DCD IntDefaultHandler ; Ethernet + DCD IntDefaultHandler ; Hibernate + DCD IntDefaultHandler ; USB0 + DCD IntDefaultHandler ; PWM Generator 3 + DCD IntDefaultHandler ; uDMA Software Transfer + DCD IntDefaultHandler ; uDMA Error + DCD IntDefaultHandler ; ADC1 Sequence 0 + DCD IntDefaultHandler ; ADC1 Sequence 1 + DCD IntDefaultHandler ; ADC1 Sequence 2 + DCD IntDefaultHandler ; ADC1 Sequence 3 + DCD IntDefaultHandler ; I2S0 + DCD IntDefaultHandler ; External Bus Interface 0 + DCD IntDefaultHandler ; GPIO Port J + DCD IntDefaultHandler ; GPIO Port K + DCD IntDefaultHandler ; GPIO Port L + DCD IntDefaultHandler ; SSI2 Rx and Tx + DCD IntDefaultHandler ; SSI3 Rx and Tx + DCD IntDefaultHandler ; UART3 Rx and Tx + DCD IntDefaultHandler ; UART4 Rx and Tx + DCD IntDefaultHandler ; UART5 Rx and Tx + DCD IntDefaultHandler ; UART6 Rx and Tx + DCD IntDefaultHandler ; UART7 Rx and Tx + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD IntDefaultHandler ; I2C2 Master and Slave + DCD IntDefaultHandler ; I2C3 Master and Slave + DCD IntDefaultHandler ; Timer 4 subtimer A + DCD IntDefaultHandler ; Timer 4 subtimer B + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD IntDefaultHandler ; Timer 5 subtimer A + DCD IntDefaultHandler ; Timer 5 subtimer B + DCD IntDefaultHandler ; Wide Timer 0 subtimer A + DCD IntDefaultHandler ; Wide Timer 0 subtimer B + DCD IntDefaultHandler ; Wide Timer 1 subtimer A + DCD IntDefaultHandler ; Wide Timer 1 subtimer B + DCD IntDefaultHandler ; Wide Timer 2 subtimer A + DCD IntDefaultHandler ; Wide Timer 2 subtimer B + DCD IntDefaultHandler ; Wide Timer 3 subtimer A + DCD IntDefaultHandler ; Wide Timer 3 subtimer B + DCD IntDefaultHandler ; Wide Timer 4 subtimer A + DCD IntDefaultHandler ; Wide Timer 4 subtimer B + DCD IntDefaultHandler ; Wide Timer 5 subtimer A + DCD IntDefaultHandler ; Wide Timer 5 subtimer B + DCD IntDefaultHandler ; FPU + DCD IntDefaultHandler ; PECI 0 + DCD IntDefaultHandler ; LPC 0 + DCD IntDefaultHandler ; I2C4 Master and Slave + DCD IntDefaultHandler ; I2C5 Master and Slave + DCD IntDefaultHandler ; GPIO Port M + DCD IntDefaultHandler ; GPIO Port N + DCD IntDefaultHandler ; Quadrature Encoder 2 + DCD IntDefaultHandler ; Fan 0 + DCD 0 ; Reserved + DCD IntDefaultHandler ; GPIO Port P (Summary or P0) + DCD IntDefaultHandler ; GPIO Port P1 + DCD IntDefaultHandler ; GPIO Port P2 + DCD IntDefaultHandler ; GPIO Port P3 + DCD IntDefaultHandler ; GPIO Port P4 + DCD IntDefaultHandler ; GPIO Port P5 + DCD IntDefaultHandler ; GPIO Port P6 + DCD IntDefaultHandler ; GPIO Port P7 + DCD IntDefaultHandler ; GPIO Port Q (Summary or Q0) + DCD IntDefaultHandler ; GPIO Port Q1 + DCD IntDefaultHandler ; GPIO Port Q2 + DCD IntDefaultHandler ; GPIO Port Q3 + DCD IntDefaultHandler ; GPIO Port Q4 + DCD IntDefaultHandler ; GPIO Port Q5 + DCD IntDefaultHandler ; GPIO Port Q6 + DCD IntDefaultHandler ; GPIO Port Q7 + DCD IntDefaultHandler ; GPIO Port R + DCD IntDefaultHandler ; GPIO Port S + DCD IntDefaultHandler ; PWM 1 Generator 0 + DCD IntDefaultHandler ; PWM 1 Generator 1 + DCD IntDefaultHandler ; PWM 1 Generator 2 + DCD IntDefaultHandler ; PWM 1 Generator 3 + DCD IntDefaultHandler ; PWM 1 Fault + +;****************************************************************************** +; +; This is the code that gets called when the processor first starts execution +; following a reset event. +; +;****************************************************************************** + EXPORT Reset_Handler +Reset_Handler + ; + ; Enable the floating-point unit. This must be done here to handle the + ; case where main() uses floating-point and the function prologue saves + ; floating-point registers (which will fault if floating-point is not + ; enabled). Any configuration of the floating-point unit using + ; DriverLib APIs must be done here prior to the floating-point unit + ; being enabled. + ; + ; Note that this does not use DriverLib since it might not be included + ; in this project. + ; + MOVW R0, #0xED88 + MOVT R0, #0xE000 + LDR R1, [R0] + ORR R1, #0x00F00000 + STR R1, [R0] + + ; + ; Call the C library enty point that handles startup. This will copy + ; the .data section initializers from flash to SRAM and zero fill the + ; .bss section. + ; + IMPORT __main + B __main + +;****************************************************************************** +; +; This is the code that gets called when the processor receives a NMI. This +; simply enters an infinite loop, preserving the system state for examination +; by a debugger. +; +;****************************************************************************** +NmiSR + B NmiSR + +;****************************************************************************** +; +; This is the code that gets called when the processor receives a fault +; interrupt. This simply enters an infinite loop, preserving the system state +; for examination by a debugger. +; +;****************************************************************************** +FaultISR + B FaultISR + +;****************************************************************************** +; +; This is the code that gets called when the processor receives an unexpected +; interrupt. This simply enters an infinite loop, preserving the system state +; for examination by a debugger. +; +;****************************************************************************** +IntDefaultHandler + B IntDefaultHandler + +;****************************************************************************** +; +; Make sure the end of this section is aligned. +; +;****************************************************************************** + ALIGN + +;****************************************************************************** +; +; Some code in the normal code section for initializing the heap and stack. +; +;****************************************************************************** + AREA |.text|, CODE, READONLY + +;****************************************************************************** +; +; The function expected of the C library startup code for defining the stack +; and heap memory locations. For the C library version of the startup code, +; provide this function so that the C library initialization code can find out +; the location of the stack and heap. +; +;****************************************************************************** + IF :DEF: __MICROLIB + EXPORT __initial_sp + EXPORT __heap_base + EXPORT __heap_limit + ELSE + IMPORT __use_two_region_memory + EXPORT __user_initial_stackheap +__user_initial_stackheap + LDR R0, =HeapMem + LDR R1, =(StackMem + Stack) + LDR R2, =(HeapMem + Heap) + LDR R3, =StackMem + BX LR + ENDIF + +;****************************************************************************** +; +; Make sure the end of this section is aligned. +; +;****************************************************************************** + ALIGN + +;****************************************************************************** +; +; Tell the assembler that we're done. +; +;****************************************************************************** + END diff --git a/boards/ek-lm4f120xl/mpu_fault/startup_sourcerygxx.S b/boards/ek-lm4f120xl/mpu_fault/startup_sourcerygxx.S new file mode 100644 index 0000000..b720839 --- /dev/null +++ b/boards/ek-lm4f120xl/mpu_fault/startup_sourcerygxx.S @@ -0,0 +1,75 @@ +//***************************************************************************** +// +// startup_sourcerygxx.S - Startup code for Sourcery CodeBench. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + + .syntax unified + .thumb + +//***************************************************************************** +// +// Place this code into the .cs3.reset section so that it can be executed prior +// to the startup code in Sourcery CodeBench. +// +//***************************************************************************** + .section .cs3.reset,"x" + +//***************************************************************************** +// +// The reset handler, which overrides the one provided by CS3. +// +//***************************************************************************** + .globl __cs3_reset + .thumb_func +__cs3_reset: + // + // Enable the floating-point unit. This must be done here to handle the + // case where main() uses floating-point and the function prologue saves + // floating-point registers (which will fault if floating-point is not + // enabled). Any configuration of the floating-point unit using DriverLib + // APIs must be done here prior to the floating-point unit being enabled. + // + // Note that this does not use DriverLib since it might not be included in + // this project. + // + movw r0, #0xed88 + movt r0, #0xe000 + ldr r1, [r0] + orr r1, #0x00f00000 + str r1, [r0] + + // + // Branch to the normal CS3 startup code. + // + .extern __cs3_reset_ekc_lm4f232 + ldr r0, =__cs3_reset_ekc_lm4f232 + bx r0 + + // + // Place the literal pool here. + // + .ltorg + + // + // The end of the file. + // + .end diff --git a/boards/ek-lm4f120xl/project0/Makefile b/boards/ek-lm4f120xl/project0/Makefile new file mode 100644 index 0000000..657d281 --- /dev/null +++ b/boards/ek-lm4f120xl/project0/Makefile @@ -0,0 +1,91 @@ +#****************************************************************************** +# +# Makefile - Rules for building the Project Zero Example. +# +# Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +# Software License Agreement +# +# Texas Instruments (TI) is supplying this software for use solely and +# exclusively on TI's microcontroller products. The software is owned by +# TI and/or its suppliers, and is protected under applicable copyright +# laws. You may not combine this software with "viral" open-source +# software in order to form a larger program. +# +# THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +# NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +# NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +# A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +# CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +# DAMAGES, FOR ANY REASON WHATSOEVER. +# +# This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +# +#****************************************************************************** + +# +# Defines the part type that this project uses. +# +PART=LM4F120H5QR + +# +# Set the processor variant. +# +VARIANT=cm4f + +# +# The base directory for StellarisWare. +# +ROOT=../../.. + +# +# Include the common make definitions. +# +include ${ROOT}/makedefs + +# +# Where to find source files that do not live in this directory. +# +VPATH=../drivers +VPATH+=../../../utils + +# +# Where to find header files that do not live in the source directory. +# +IPATH=.. +IPATH+=../../.. + +# +# The default rule, which causes the Project Zero Example to be built. +# +all: ${COMPILER} +all: ${COMPILER}/project0.axf + +# +# The rule to clean out all the build products. +# +clean: + @rm -rf ${COMPILER} ${wildcard *~} + +# +# The rule to create the target directory. +# +${COMPILER}: + @mkdir -p ${COMPILER} + +# +# Rules for building the Project Zero Example. +# +${COMPILER}/project0.axf: ${COMPILER}/project0.o +${COMPILER}/project0.axf: ${COMPILER}/startup_${COMPILER}.o +${COMPILER}/project0.axf: ${ROOT}/driverlib/${COMPILER}-cm4f/libdriver-cm4f.a +${COMPILER}/project0.axf: project0.ld +SCATTERgcc_project0=project0.ld +ENTRY_project0=ResetISR +CFLAGSgcc=-DTARGET_IS_BLIZZARD_RA2 + +# +# Include the automatically generated dependency files. +# +ifneq (${MAKECMDGOALS},clean) +-include ${wildcard ${COMPILER}/*.d} __dummy__ +endif diff --git a/boards/ek-lm4f120xl/project0/ccs/.ccsimportspec b/boards/ek-lm4f120xl/project0/ccs/.ccsimportspec new file mode 100644 index 0000000..a3940d4 --- /dev/null +++ b/boards/ek-lm4f120xl/project0/ccs/.ccsimportspec @@ -0,0 +1,8 @@ + + + + + + + + diff --git a/boards/ek-lm4f120xl/project0/ccs/.ccsproject b/boards/ek-lm4f120xl/project0/ccs/.ccsproject new file mode 100644 index 0000000..56793f4 --- /dev/null +++ b/boards/ek-lm4f120xl/project0/ccs/.ccsproject @@ -0,0 +1,12 @@ + + + + + + + + + + + + diff --git a/boards/ek-lm4f120xl/project0/ccs/.cproject b/boards/ek-lm4f120xl/project0/ccs/.cproject new file mode 100644 index 0000000..7e60e98 --- /dev/null +++ b/boards/ek-lm4f120xl/project0/ccs/.cproject @@ -0,0 +1,193 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/boards/ek-lm4f120xl/project0/ccs/.project b/boards/ek-lm4f120xl/project0/ccs/.project new file mode 100644 index 0000000..37096d0 --- /dev/null +++ b/boards/ek-lm4f120xl/project0/ccs/.project @@ -0,0 +1,106 @@ + + + project0 + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + + + ?name? + + + + org.eclipse.cdt.make.core.append_environment + true + + + org.eclipse.cdt.make.core.autoBuildTarget + all + + + org.eclipse.cdt.make.core.buildArguments + -k + + + org.eclipse.cdt.make.core.buildCommand + ${CCS_UTILS_DIR}/bin/gmake + + + org.eclipse.cdt.make.core.buildLocation + ${BuildDirectory} + + + org.eclipse.cdt.make.core.cleanBuildTarget + clean + + + org.eclipse.cdt.make.core.contents + org.eclipse.cdt.make.core.activeConfigSettings + + + org.eclipse.cdt.make.core.enableAutoBuild + true + + + org.eclipse.cdt.make.core.enableCleanBuild + true + + + org.eclipse.cdt.make.core.enableFullBuild + true + + + org.eclipse.cdt.make.core.fullBuildTarget + all + + + org.eclipse.cdt.make.core.stopOnError + false + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + true + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + com.ti.ccstudio.core.ccsNature + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.core.ccnature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + project0.c + 1 + SW_ROOT/boards/ek-lm4f120xl/project0/project0.c + + + project0_ccs.cmd + 1 + SW_ROOT/boards/ek-lm4f120xl/project0/project0_ccs.cmd + + + startup_ccs.c + 1 + SW_ROOT/boards/ek-lm4f120xl/project0/startup_ccs.c + + + + + SW_ROOT + $%7BPARENT-4-PROJECT_LOC%7D + + + diff --git a/boards/ek-lm4f120xl/project0/ccs/.settings/org.eclipse.cdt.codan.core.prefs b/boards/ek-lm4f120xl/project0/ccs/.settings/org.eclipse.cdt.codan.core.prefs new file mode 100644 index 0000000..98b6350 --- /dev/null +++ b/boards/ek-lm4f120xl/project0/ccs/.settings/org.eclipse.cdt.codan.core.prefs @@ -0,0 +1,3 @@ +eclipse.preferences.version=1 +inEditor=false +onBuild=false diff --git a/boards/ek-lm4f120xl/project0/ccs/Debug/project0.bin b/boards/ek-lm4f120xl/project0/ccs/Debug/project0.bin new file mode 100644 index 0000000..1516fbb Binary files /dev/null and b/boards/ek-lm4f120xl/project0/ccs/Debug/project0.bin differ diff --git a/boards/ek-lm4f120xl/project0/ccs/Debug/project0.out b/boards/ek-lm4f120xl/project0/ccs/Debug/project0.out new file mode 100644 index 0000000..824a460 Binary files /dev/null and b/boards/ek-lm4f120xl/project0/ccs/Debug/project0.out differ diff --git a/boards/ek-lm4f120xl/project0/ccs/macros.ini_initial b/boards/ek-lm4f120xl/project0/ccs/macros.ini_initial new file mode 100644 index 0000000..588017d --- /dev/null +++ b/boards/ek-lm4f120xl/project0/ccs/macros.ini_initial @@ -0,0 +1 @@ +SW_ROOT = ../../../.. diff --git a/boards/ek-lm4f120xl/project0/ccs/target_config.ccxml b/boards/ek-lm4f120xl/project0/ccs/target_config.ccxml new file mode 100644 index 0000000..469eea0 --- /dev/null +++ b/boards/ek-lm4f120xl/project0/ccs/target_config.ccxml @@ -0,0 +1,13 @@ + + + + + + + + + + + + + diff --git a/boards/ek-lm4f120xl/project0/ewarm/Exe/project0.bin b/boards/ek-lm4f120xl/project0/ewarm/Exe/project0.bin new file mode 100644 index 0000000..178c12d Binary files /dev/null and b/boards/ek-lm4f120xl/project0/ewarm/Exe/project0.bin differ diff --git a/boards/ek-lm4f120xl/project0/ewarm/Exe/project0.out b/boards/ek-lm4f120xl/project0/ewarm/Exe/project0.out new file mode 100644 index 0000000..df3dbdf Binary files /dev/null and b/boards/ek-lm4f120xl/project0/ewarm/Exe/project0.out differ diff --git a/boards/ek-lm4f120xl/project0/gcc/project0.axf b/boards/ek-lm4f120xl/project0/gcc/project0.axf new file mode 100644 index 0000000..6cb392a Binary files /dev/null and b/boards/ek-lm4f120xl/project0/gcc/project0.axf differ diff --git a/boards/ek-lm4f120xl/project0/gcc/project0.bin b/boards/ek-lm4f120xl/project0/gcc/project0.bin new file mode 100644 index 0000000..90b32f8 Binary files /dev/null and b/boards/ek-lm4f120xl/project0/gcc/project0.bin differ diff --git a/boards/ek-lm4f120xl/project0/project0.c b/boards/ek-lm4f120xl/project0/project0.c new file mode 100644 index 0000000..1a485fe --- /dev/null +++ b/boards/ek-lm4f120xl/project0/project0.c @@ -0,0 +1,102 @@ +//***************************************************************************** +// +// project0.c - Example to demonstrate minimal StellarisWare setup +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +#include "inc/hw_types.h" +#include "inc/hw_memmap.h" +#include "driverlib/sysctl.h" +#include "driverlib/gpio.h" + +//***************************************************************************** +// +// Define pin to LED color mapping. +// +//***************************************************************************** + +#define RED_LED GPIO_PIN_1 +#define BLUE_LED GPIO_PIN_2 +#define GREEN_LED GPIO_PIN_3 + +//***************************************************************************** +// +//! \addtogroup example_list +//!

Project Zero (project0)

+//! +//! This example demonstrates the use of StellarisWare to setup the clocks +//! and toggle GPIO pins to make the LED's blink. This is a good place to +//! start understanding your launchpad and the tools that can be used to +//! program it. See http://www.ti.com/stellaris-launchpad/project0 for more +//! information and tutorial videos. +//! +// +//***************************************************************************** + + +//***************************************************************************** +// +// Main 'C' Language entry point. Toggle an LED using StellarisWare. +// See www.ti.com/stellaris-launchpad/project0 for more information and +// tutorial videos. +// +//***************************************************************************** +int +main(void) +{ + // + // Setup the system clock to run at 50 Mhz from PLL with crystal reference + // + SysCtlClockSet(SYSCTL_SYSDIV_4|SYSCTL_USE_PLL|SYSCTL_XTAL_16MHZ| + SYSCTL_OSC_MAIN); + + // + // Enable and configure the GPIO port for the LED operation. + // + SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOF); + GPIOPinTypeGPIOOutput(GPIO_PORTF_BASE, RED_LED|BLUE_LED|GREEN_LED); + + // + // Loop Forever + // + while(1) + { + // + // Turn on the LED + // + GPIOPinWrite(GPIO_PORTF_BASE, RED_LED|BLUE_LED|GREEN_LED, RED_LED); + + // + // Delay for a bit + // + SysCtlDelay(2000000); + + // + // Turn on the LED + // + GPIOPinWrite(GPIO_PORTF_BASE, RED_LED|BLUE_LED|GREEN_LED, BLUE_LED); + + // + // Delay for a bit + // + SysCtlDelay(2000000); + } +} diff --git a/boards/ek-lm4f120xl/project0/project0.ewd b/boards/ek-lm4f120xl/project0/project0.ewd new file mode 100644 index 0000000..b8eeac7 --- /dev/null +++ b/boards/ek-lm4f120xl/project0/project0.ewd @@ -0,0 +1,614 @@ + + + + 1 + + Debug + + ARM + + 1 + + C-SPY + 2 + + 15 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + ARMSIM_ID + 2 + + 1 + 1 + 1 + + + + + + + + ANGEL_ID + 2 + + 0 + 1 + 1 + + + + + + + + + + + + GDBSERVER_ID + 2 + + 0 + 1 + 1 + + + + + + + + + + + IARROM_ID + 2 + + 0 + 1 + 1 + + + + + + + + + + JLINK_ID + 2 + + 9 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + LMIFTDI_ID + 2 + + 1 + 1 + 1 + + + + + + + + MACRAIGOR_ID + 2 + + 2 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + RDI_ID + 2 + + 1 + 1 + 1 + + + + + + + + + + + + + + + + + THIRDPARTY_ID + 2 + + 0 + 1 + 1 + + + + + + + + + $TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\OSE\OseEpsilonPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\PowerPac\PowerPacRTOS.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin + 0 + + + $EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin + 1 + + + $EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin + 0 + + + $EW_DIR$\common\plugins\Profiling\Profiling.ENU.ewplugin + 1 + + + $EW_DIR$\common\plugins\Stack\Stack.ENU.ewplugin + 1 + + + + diff --git a/boards/ek-lm4f120xl/project0/project0.ewp b/boards/ek-lm4f120xl/project0/project0.ewp new file mode 100644 index 0000000..f88099b --- /dev/null +++ b/boards/ek-lm4f120xl/project0/project0.ewp @@ -0,0 +1,786 @@ + + + + 1 + + Debug + + ARM + + 1 + + General + 3 + + 14 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCARM + 2 + + 19 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AARM + 2 + + 7 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + OBJCOPY + 0 + + 1 + 1 + 1 + + + + + + + + + CUSTOM + 3 + + + + + + + BICOMP + 0 + + + + BUILDACTION + 1 + + + + + + + ILINK + 0 + + 5 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + IARCHIVE + 0 + + 0 + 1 + 1 + + + + + + + BILINK + 0 + + + + + Libraries + + $PROJ_DIR$\..\..\..\driverlib\ewarm-cm4f\Exe\driverlib-cm4f.a + + + + Source + + $PROJ_DIR$\project0.c + + + $PROJ_DIR$\startup_ewarm.c + + + diff --git a/boards/ek-lm4f120xl/project0/project0.icf b/boards/ek-lm4f120xl/project0/project0.icf new file mode 100644 index 0000000..980a972 --- /dev/null +++ b/boards/ek-lm4f120xl/project0/project0.icf @@ -0,0 +1,78 @@ +//***************************************************************************** +// +// project0.icf - Linker configuration file for project0. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +// +// Define a memory region that covers the entire 4 GB addressible space of the +// processor. +// +define memory mem with size = 4G; + +// +// Define a region for the on-chip flash. +// +define region FLASH = mem:[from 0x00000000 to 0x0003ffff]; + +// +// Define a region for the on-chip SRAM. +// +define region SRAM = mem:[from 0x20000000 to 0x20007fff]; + +// +// Define a block for the heap. The size should be set to something other +// than zero if things in the C library that require the heap are used. +// +define block HEAP with alignment = 8, size = 0x00000000 { }; + +// +// Indicate that the read/write values should be initialized by copying from +// flash. +// +initialize by copy { readwrite }; + +// +// Indicate that the noinit values should be left alone. This includes the +// stack, which if initialized will destroy the return address from the +// initialization code, causing the processor to branch to zero and fault. +// +do not initialize { section .noinit }; + +// +// Place the interrupt vectors at the start of flash. +// +place at start of FLASH { readonly section .intvec }; + +// +// Place the remainder of the read-only items into flash. +// +place in FLASH { readonly }; + +// +// Place the RAM vector table at the start of SRAM. +// +place at start of SRAM { section VTABLE }; + +// +// Place all read/write items into SRAM. +// +place in SRAM { readwrite, block HEAP }; diff --git a/boards/ek-lm4f120xl/project0/project0.ld b/boards/ek-lm4f120xl/project0/project0.ld new file mode 100644 index 0000000..1e3b975 --- /dev/null +++ b/boards/ek-lm4f120xl/project0/project0.ld @@ -0,0 +1,57 @@ +/****************************************************************************** + * + * project0.ld - Linker configuration file for project0. + * + * Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. + * Software License Agreement + * + * Texas Instruments (TI) is supplying this software for use solely and + * exclusively on TI's microcontroller products. The software is owned by + * TI and/or its suppliers, and is protected under applicable copyright + * laws. You may not combine this software with "viral" open-source + * software in order to form a larger program. + * + * THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. + * NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT + * NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY + * CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL + * DAMAGES, FOR ANY REASON WHATSOEVER. + * + * This is part of revision 9453 of the EK-LM4F120XL Firmware Package. + * + *****************************************************************************/ + +MEMORY +{ + FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x00040000 + SRAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00008000 +} + +SECTIONS +{ + .text : + { + _text = .; + KEEP(*(.isr_vector)) + *(.text*) + *(.rodata*) + _etext = .; + } > FLASH + + .data : AT(ADDR(.text) + SIZEOF(.text)) + { + _data = .; + *(vtable) + *(.data*) + _edata = .; + } > SRAM + + .bss : + { + _bss = .; + *(.bss*) + *(COMMON) + _ebss = .; + } > SRAM +} diff --git a/boards/ek-lm4f120xl/project0/project0.sct b/boards/ek-lm4f120xl/project0/project0.sct new file mode 100644 index 0000000..a4da7fd --- /dev/null +++ b/boards/ek-lm4f120xl/project0/project0.sct @@ -0,0 +1,47 @@ +;****************************************************************************** +; +; project0.sct - Linker configuration file for project0. +; +; Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +; Software License Agreement +; +; Texas Instruments (TI) is supplying this software for use solely and +; exclusively on TI's microcontroller products. The software is owned by +; TI and/or its suppliers, and is protected under applicable copyright +; laws. You may not combine this software with "viral" open-source +; software in order to form a larger program. +; +; THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +; NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +; NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +; A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +; CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +; DAMAGES, FOR ANY REASON WHATSOEVER. +; +; This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +; +;****************************************************************************** + +LR_IROM 0x00000000 0x00040000 +{ + ; + ; Specify the Execution Address of the code and the size. + ; + ER_IROM 0x00000000 0x00040000 + { + *.o (RESET, +First) + * (InRoot$$Sections, +RO) + } + + ; + ; Specify the Execution Address of the data area. + ; + RW_IRAM 0x20000000 0x00008000 + { + ; + ; Uncomment the following line in order to use IntRegister(). + ; + ;* (vtable, +First) + * (+RW, +ZI) + } +} diff --git a/boards/ek-lm4f120xl/project0/project0.sgxx b/boards/ek-lm4f120xl/project0/project0.sgxx new file mode 100644 index 0000000..541e44e Binary files /dev/null and b/boards/ek-lm4f120xl/project0/project0.sgxx differ diff --git a/boards/ek-lm4f120xl/project0/project0.uvopt b/boards/ek-lm4f120xl/project0/project0.uvopt new file mode 100644 index 0000000..f86df0f --- /dev/null +++ b/boards/ek-lm4f120xl/project0/project0.uvopt @@ -0,0 +1,289 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + + + + 0 + 0 + + + + project0 + 0x4 + ARM-ADS + + 8000000 + + 1 + 1 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\rvmdk\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 255 + + + 0 + Data Sheet + DATASHTS\Luminary\LM4F120H5QR.PDF + + + + SARMCM3.DLL + -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 0 + 1 + 0 + 0 + 4 + + + + + + + + + + + BIN\lmidk-agdi.dll + + + + 0 + lmidk-agdi + -O4614 -S3 -FO29 + + + 0 + DLGTARM + + + + 0 + ARMDBGFLAGS + + + + + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + Source + 1 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + .\project0.c + project0.c + + + 1 + 2 + 2 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + .\startup_rvmdk.S + startup_rvmdk.S + + + + + Libraries + 1 + 0 + 0 + + 2 + 3 + 4 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\driverlib\rvmdk-cm4f\driverlib-cm4f.lib + driverlib-cm4f.lib + + + + + Documentation + 1 + 0 + 0 + + 3 + 4 + 5 + 0 + 1 + 0 + 0 + 1 + 1 + 0 + .\readme.txt + readme.txt + + 44 + 0 + 1 + + -1 + -1 + + + -1 + -1 + + + 0 + 0 + 729 + 300 + + + + + + + 1 + 0 + + 100 + 0 + + + .\readme.txt + 0 + 1 + 1 + + + + + + diff --git a/boards/ek-lm4f120xl/project0/project0.uvproj b/boards/ek-lm4f120xl/project0/project0.uvproj new file mode 100644 index 0000000..31c0d5b --- /dev/null +++ b/boards/ek-lm4f120xl/project0/project0.uvproj @@ -0,0 +1,424 @@ + + + + 1.1 + +
### uVision Project, (C) Keil Software
+ + + + project0 + 0x4 + ARM-ADS + + + LM4F120H5QR + Texas Instruments + IRAM(0x20000000-0x20007FFF) IROM(0-0x3FFFF) CLOCK(8000000) CPUTYPE("Cortex-M4") FPU2 + + "STARTUP\Luminary\Startup.s" ("Luminary Startup Code") + UL2CM3(-O207 -S0 -C0 -FO7 -FD20000000 -FC800 -FN1 -FF0LM4F_256 -FS00 -FL040000) + 5919 + LM4Fxxxx.H + + + + + + + + + + 0 + + + + Luminary\ + Luminary\ + + 0 + 0 + 0 + 0 + 1 + + .\rvmdk\ + project0 + 1 + 0 + 0 + 1 + 1 + .\rvmdk\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + + 1 + 0 + fromelf --bin --output .\rvmdk\project0.bin .\rvmdk\project0.axf + + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + + + SARMCM3.DLL + -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + + 1 + 0 + 0 + 0 + 16 + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + + + 1 + 1 + 0 + 1 + 1 + 1 + 0 + 1 + + 0 + 4 + + + + + + + + + + + + + + BIN\lmidk-agdi.dll + + + + + 1 + 0 + 0 + 0 + 1 + 4099 + + BIN\lmidk-agdi.dll + + + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M4" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 2 + 0 + 0 + 8 + 1 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x8000 + + + 1 + 0x0 + 0x40000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x40000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x8000 + + + 0 + 0x0 + 0x0 + + + + + + 0 + 3 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + + + rvmdk PART_LM4F120H5QR TARGET_IS_BLIZZARD_RA2 + + ..;..\..\..; + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x00000000 + 0x20000000 + project0.sct + + + --entry Reset_Handler + + + + + + + + Source + + + project0.c + 1 + .\project0.c + + + startup_rvmdk.S + 2 + .\startup_rvmdk.S + + + + + Libraries + + + driverlib-cm4f.lib + 4 + ..\..\..\driverlib\rvmdk-cm4f\driverlib-cm4f.lib + + + + + Documentation + + + readme.txt + 5 + .\readme.txt + + + + + + + + diff --git a/boards/ek-lm4f120xl/project0/project0_ccs.cmd b/boards/ek-lm4f120xl/project0/project0_ccs.cmd new file mode 100644 index 0000000..94f8933 --- /dev/null +++ b/boards/ek-lm4f120xl/project0/project0_ccs.cmd @@ -0,0 +1,70 @@ +/****************************************************************************** + * + * project0_ccs.cmd - CCS linker configuration file for project0. + * + * Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. + * Software License Agreement + * + * Texas Instruments (TI) is supplying this software for use solely and + * exclusively on TI's microcontroller products. The software is owned by + * TI and/or its suppliers, and is protected under applicable copyright + * laws. You may not combine this software with "viral" open-source + * software in order to form a larger program. + * + * THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. + * NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT + * NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY + * CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL + * DAMAGES, FOR ANY REASON WHATSOEVER. + * + * This is part of revision 9453 of the EK-LM4F120XL Firmware Package. + * + *****************************************************************************/ + +--retain=g_pfnVectors + +/* The following command line options are set as part of the CCS project. */ +/* If you are building using the command line, or for some reason want to */ +/* define them here, you can uncomment and modify these lines as needed. */ +/* If you are using CCS for building, it is probably better to make any such */ +/* modifications in your CCS project and leave this file alone. */ +/* */ +/* --heap_size=0 */ +/* --stack_size=256 */ +/* --library=rtsv7M3_T_le_eabi.lib */ + +/* The starting address of the application. Normally the interrupt vectors */ +/* must be located at the beginning of the application. */ +#define APP_BASE 0x00000000 +#define RAM_BASE 0x20000000 + +/* System memory map */ + +MEMORY +{ + /* Application stored in and executes from internal flash */ + FLASH (RX) : origin = APP_BASE, length = 0x00040000 + /* Application uses internal RAM for data */ + SRAM (RWX) : origin = 0x20000000, length = 0x00008000 +} + +/* Section allocation in memory */ + +SECTIONS +{ + .intvecs: > APP_BASE + .text : > FLASH + .const : > FLASH + .cinit : > FLASH + .pinit : > FLASH + .init_array : > FLASH + + .vtable : > RAM_BASE + .data : > SRAM + .bss : > SRAM + .sysmem : > SRAM + .stack : > SRAM +} + +__STACK_TOP = __stack + 256; diff --git a/boards/ek-lm4f120xl/project0/project0_sourcerygxx.ld b/boards/ek-lm4f120xl/project0/project0_sourcerygxx.ld new file mode 100644 index 0000000..0a3e316 --- /dev/null +++ b/boards/ek-lm4f120xl/project0/project0_sourcerygxx.ld @@ -0,0 +1,31 @@ +/****************************************************************************** + * + * project0_sourcerygxx.ld - Scatter file for Sourcery CodeBench + * + * Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. + * Software License Agreement + * + * Texas Instruments (TI) is supplying this software for use solely and + * exclusively on TI's microcontroller products. The software is owned by + * TI and/or its suppliers, and is protected under applicable copyright + * laws. You may not combine this software with "viral" open-source + * software in order to form a larger program. + * + * THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. + * NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT + * NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY + * CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL + * DAMAGES, FOR ANY REASON WHATSOEVER. + * + * This is part of revision 9453 of the EK-LM4F120XL Firmware Package. + * + *****************************************************************************/ + +/****************************************************************************** + * + * Define the end of the heap space, which determines the beginning of the + * stack space. + * + *****************************************************************************/ +__cs3_heap_end = __cs3_region_end_ram - 256; diff --git a/boards/ek-lm4f120xl/project0/readme.txt b/boards/ek-lm4f120xl/project0/readme.txt new file mode 100644 index 0000000..390355d --- /dev/null +++ b/boards/ek-lm4f120xl/project0/readme.txt @@ -0,0 +1,28 @@ +Project Zero + +This example demonstrates the use of StellarisWare to setup the clocks +and toggle GPIO pins to make the LED's blink. This is a good place to +start understanding your launchpad and the tools that can be used to +program it. See http://www.ti.com/stellaris-launchpad/project0 for more +information and tutorial videos. + + +------------------------------------------------------------------------------- + +Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +Software License Agreement + +Texas Instruments (TI) is supplying this software for use solely and +exclusively on TI's microcontroller products. The software is owned by +TI and/or its suppliers, and is protected under applicable copyright +laws. You may not combine this software with "viral" open-source +software in order to form a larger program. + +THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +DAMAGES, FOR ANY REASON WHATSOEVER. + +This is part of revision 9453 of the EK-LM4F120XL Firmware Package. diff --git a/boards/ek-lm4f120xl/project0/rvmdk/project0.axf b/boards/ek-lm4f120xl/project0/rvmdk/project0.axf new file mode 100644 index 0000000..118732a Binary files /dev/null and b/boards/ek-lm4f120xl/project0/rvmdk/project0.axf differ diff --git a/boards/ek-lm4f120xl/project0/rvmdk/project0.bin b/boards/ek-lm4f120xl/project0/rvmdk/project0.bin new file mode 100644 index 0000000..c889517 Binary files /dev/null and b/boards/ek-lm4f120xl/project0/rvmdk/project0.bin differ diff --git a/boards/ek-lm4f120xl/project0/sourcerygxx/project0.axf b/boards/ek-lm4f120xl/project0/sourcerygxx/project0.axf new file mode 100644 index 0000000..1150349 Binary files /dev/null and b/boards/ek-lm4f120xl/project0/sourcerygxx/project0.axf differ diff --git a/boards/ek-lm4f120xl/project0/sourcerygxx/project0.bin b/boards/ek-lm4f120xl/project0/sourcerygxx/project0.bin new file mode 100644 index 0000000..867049c Binary files /dev/null and b/boards/ek-lm4f120xl/project0/sourcerygxx/project0.bin differ diff --git a/boards/ek-lm4f120xl/project0/startup_ccs.c b/boards/ek-lm4f120xl/project0/startup_ccs.c new file mode 100644 index 0000000..9f15b47 --- /dev/null +++ b/boards/ek-lm4f120xl/project0/startup_ccs.c @@ -0,0 +1,291 @@ +//***************************************************************************** +// +// startup_ccs.c - Startup code for use with TI's Code Composer Studio. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +//***************************************************************************** +// +// Forward declaration of the default fault handlers. +// +//***************************************************************************** +void ResetISR(void); +static void NmiSR(void); +static void FaultISR(void); +static void IntDefaultHandler(void); + +//***************************************************************************** +// +// External declaration for the reset handler that is to be called when the +// processor is started +// +//***************************************************************************** +extern void _c_int00(void); + +//***************************************************************************** +// +// Linker variable that marks the top of the stack. +// +//***************************************************************************** +extern unsigned long __STACK_TOP; + +//***************************************************************************** +// +// The vector table. Note that the proper constructs must be placed on this to +// ensure that it ends up at physical address 0x0000.0000 or at the start of +// the program if located at a start address other than 0. +// +//***************************************************************************** +#pragma DATA_SECTION(g_pfnVectors, ".intvecs") +void (* const g_pfnVectors[])(void) = +{ + (void (*)(void))((unsigned long)&__STACK_TOP), + // The initial stack pointer + ResetISR, // The reset handler + NmiSR, // The NMI handler + FaultISR, // The hard fault handler + IntDefaultHandler, // The MPU fault handler + IntDefaultHandler, // The bus fault handler + IntDefaultHandler, // The usage fault handler + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // SVCall handler + IntDefaultHandler, // Debug monitor handler + 0, // Reserved + IntDefaultHandler, // The PendSV handler + IntDefaultHandler, // The SysTick handler + IntDefaultHandler, // GPIO Port A + IntDefaultHandler, // GPIO Port B + IntDefaultHandler, // GPIO Port C + IntDefaultHandler, // GPIO Port D + IntDefaultHandler, // GPIO Port E + IntDefaultHandler, // UART0 Rx and Tx + IntDefaultHandler, // UART1 Rx and Tx + IntDefaultHandler, // SSI0 Rx and Tx + IntDefaultHandler, // I2C0 Master and Slave + IntDefaultHandler, // PWM Fault + IntDefaultHandler, // PWM Generator 0 + IntDefaultHandler, // PWM Generator 1 + IntDefaultHandler, // PWM Generator 2 + IntDefaultHandler, // Quadrature Encoder 0 + IntDefaultHandler, // ADC Sequence 0 + IntDefaultHandler, // ADC Sequence 1 + IntDefaultHandler, // ADC Sequence 2 + IntDefaultHandler, // ADC Sequence 3 + IntDefaultHandler, // Watchdog timer + IntDefaultHandler, // Timer 0 subtimer A + IntDefaultHandler, // Timer 0 subtimer B + IntDefaultHandler, // Timer 1 subtimer A + IntDefaultHandler, // Timer 1 subtimer B + IntDefaultHandler, // Timer 2 subtimer A + IntDefaultHandler, // Timer 2 subtimer B + IntDefaultHandler, // Analog Comparator 0 + IntDefaultHandler, // Analog Comparator 1 + IntDefaultHandler, // Analog Comparator 2 + IntDefaultHandler, // System Control (PLL, OSC, BO) + IntDefaultHandler, // FLASH Control + IntDefaultHandler, // GPIO Port F + IntDefaultHandler, // GPIO Port G + IntDefaultHandler, // GPIO Port H + IntDefaultHandler, // UART2 Rx and Tx + IntDefaultHandler, // SSI1 Rx and Tx + IntDefaultHandler, // Timer 3 subtimer A + IntDefaultHandler, // Timer 3 subtimer B + IntDefaultHandler, // I2C1 Master and Slave + IntDefaultHandler, // Quadrature Encoder 1 + IntDefaultHandler, // CAN0 + IntDefaultHandler, // CAN1 + IntDefaultHandler, // CAN2 + IntDefaultHandler, // Ethernet + IntDefaultHandler, // Hibernate + IntDefaultHandler, // USB0 + IntDefaultHandler, // PWM Generator 3 + IntDefaultHandler, // uDMA Software Transfer + IntDefaultHandler, // uDMA Error + IntDefaultHandler, // ADC1 Sequence 0 + IntDefaultHandler, // ADC1 Sequence 1 + IntDefaultHandler, // ADC1 Sequence 2 + IntDefaultHandler, // ADC1 Sequence 3 + IntDefaultHandler, // I2S0 + IntDefaultHandler, // External Bus Interface 0 + IntDefaultHandler, // GPIO Port J + IntDefaultHandler, // GPIO Port K + IntDefaultHandler, // GPIO Port L + IntDefaultHandler, // SSI2 Rx and Tx + IntDefaultHandler, // SSI3 Rx and Tx + IntDefaultHandler, // UART3 Rx and Tx + IntDefaultHandler, // UART4 Rx and Tx + IntDefaultHandler, // UART5 Rx and Tx + IntDefaultHandler, // UART6 Rx and Tx + IntDefaultHandler, // UART7 Rx and Tx + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // I2C2 Master and Slave + IntDefaultHandler, // I2C3 Master and Slave + IntDefaultHandler, // Timer 4 subtimer A + IntDefaultHandler, // Timer 4 subtimer B + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // Timer 5 subtimer A + IntDefaultHandler, // Timer 5 subtimer B + IntDefaultHandler, // Wide Timer 0 subtimer A + IntDefaultHandler, // Wide Timer 0 subtimer B + IntDefaultHandler, // Wide Timer 1 subtimer A + IntDefaultHandler, // Wide Timer 1 subtimer B + IntDefaultHandler, // Wide Timer 2 subtimer A + IntDefaultHandler, // Wide Timer 2 subtimer B + IntDefaultHandler, // Wide Timer 3 subtimer A + IntDefaultHandler, // Wide Timer 3 subtimer B + IntDefaultHandler, // Wide Timer 4 subtimer A + IntDefaultHandler, // Wide Timer 4 subtimer B + IntDefaultHandler, // Wide Timer 5 subtimer A + IntDefaultHandler, // Wide Timer 5 subtimer B + IntDefaultHandler, // FPU + IntDefaultHandler, // PECI 0 + IntDefaultHandler, // LPC 0 + IntDefaultHandler, // I2C4 Master and Slave + IntDefaultHandler, // I2C5 Master and Slave + IntDefaultHandler, // GPIO Port M + IntDefaultHandler, // GPIO Port N + IntDefaultHandler, // Quadrature Encoder 2 + IntDefaultHandler, // Fan 0 + 0, // Reserved + IntDefaultHandler, // GPIO Port P (Summary or P0) + IntDefaultHandler, // GPIO Port P1 + IntDefaultHandler, // GPIO Port P2 + IntDefaultHandler, // GPIO Port P3 + IntDefaultHandler, // GPIO Port P4 + IntDefaultHandler, // GPIO Port P5 + IntDefaultHandler, // GPIO Port P6 + IntDefaultHandler, // GPIO Port P7 + IntDefaultHandler, // GPIO Port Q (Summary or Q0) + IntDefaultHandler, // GPIO Port Q1 + IntDefaultHandler, // GPIO Port Q2 + IntDefaultHandler, // GPIO Port Q3 + IntDefaultHandler, // GPIO Port Q4 + IntDefaultHandler, // GPIO Port Q5 + IntDefaultHandler, // GPIO Port Q6 + IntDefaultHandler, // GPIO Port Q7 + IntDefaultHandler, // GPIO Port R + IntDefaultHandler, // GPIO Port S + IntDefaultHandler, // PWM 1 Generator 0 + IntDefaultHandler, // PWM 1 Generator 1 + IntDefaultHandler, // PWM 1 Generator 2 + IntDefaultHandler, // PWM 1 Generator 3 + IntDefaultHandler // PWM 1 Fault +}; + +//***************************************************************************** +// +// This is the code that gets called when the processor first starts execution +// following a reset event. Only the absolutely necessary set is performed, +// after which the application supplied entry() routine is called. Any fancy +// actions (such as making decisions based on the reset cause register, and +// resetting the bits in that register) are left solely in the hands of the +// application. +// +//***************************************************************************** +void +ResetISR(void) +{ + // + // Jump to the CCS C initialization routine. This will enable the + // floating-point unit as well, so that does not need to be done here. + // + __asm(" .global _c_int00\n" + " b.w _c_int00"); +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a NMI. This +// simply enters an infinite loop, preserving the system state for examination +// by a debugger. +// +//***************************************************************************** +static void +NmiSR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a fault +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +FaultISR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives an unexpected +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +IntDefaultHandler(void) +{ + // + // Go into an infinite loop. + // + while(1) + { + } +} diff --git a/boards/ek-lm4f120xl/project0/startup_ewarm.c b/boards/ek-lm4f120xl/project0/startup_ewarm.c new file mode 100644 index 0000000..d7c43dd --- /dev/null +++ b/boards/ek-lm4f120xl/project0/startup_ewarm.c @@ -0,0 +1,325 @@ +//***************************************************************************** +// +// startup_ewarm.c - Startup code for use with IAR's Embedded Workbench, +// version 5. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +#include "inc/hw_nvic.h" +#include "inc/hw_types.h" + +//***************************************************************************** +// +// Enable the IAR extensions for this source file. +// +//***************************************************************************** +#pragma language=extended + +//***************************************************************************** +// +// Forward declaration of the default fault handlers. +// +//***************************************************************************** +void ResetISR(void); +static void NmiSR(void); +static void FaultISR(void); +static void IntDefaultHandler(void); + +//***************************************************************************** +// +// The entry point for the application startup code. +// +//***************************************************************************** +extern void __iar_program_start(void); + +//***************************************************************************** +// +// Reserve space for the system stack. +// +//***************************************************************************** +static unsigned long pulStack[64] @ ".noinit"; + +//***************************************************************************** +// +// A union that describes the entries of the vector table. The union is needed +// since the first entry is the stack pointer and the remainder are function +// pointers. +// +//***************************************************************************** +typedef union +{ + void (*pfnHandler)(void); + unsigned long ulPtr; +} +uVectorEntry; + +//***************************************************************************** +// +// The vector table. Note that the proper constructs must be placed on this to +// ensure that it ends up at physical address 0x0000.0000. +// +//***************************************************************************** +__root const uVectorEntry __vector_table[] @ ".intvec" = +{ + { .ulPtr = (unsigned long)pulStack + sizeof(pulStack) }, + // The initial stack pointer + ResetISR, // The reset handler + NmiSR, // The NMI handler + FaultISR, // The hard fault handler + IntDefaultHandler, // The MPU fault handler + IntDefaultHandler, // The bus fault handler + IntDefaultHandler, // The usage fault handler + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // SVCall handler + IntDefaultHandler, // Debug monitor handler + 0, // Reserved + IntDefaultHandler, // The PendSV handler + IntDefaultHandler, // The SysTick handler + IntDefaultHandler, // GPIO Port A + IntDefaultHandler, // GPIO Port B + IntDefaultHandler, // GPIO Port C + IntDefaultHandler, // GPIO Port D + IntDefaultHandler, // GPIO Port E + IntDefaultHandler, // UART0 Rx and Tx + IntDefaultHandler, // UART1 Rx and Tx + IntDefaultHandler, // SSI0 Rx and Tx + IntDefaultHandler, // I2C0 Master and Slave + IntDefaultHandler, // PWM Fault + IntDefaultHandler, // PWM Generator 0 + IntDefaultHandler, // PWM Generator 1 + IntDefaultHandler, // PWM Generator 2 + IntDefaultHandler, // Quadrature Encoder 0 + IntDefaultHandler, // ADC Sequence 0 + IntDefaultHandler, // ADC Sequence 1 + IntDefaultHandler, // ADC Sequence 2 + IntDefaultHandler, // ADC Sequence 3 + IntDefaultHandler, // Watchdog timer + IntDefaultHandler, // Timer 0 subtimer A + IntDefaultHandler, // Timer 0 subtimer B + IntDefaultHandler, // Timer 1 subtimer A + IntDefaultHandler, // Timer 1 subtimer B + IntDefaultHandler, // Timer 2 subtimer A + IntDefaultHandler, // Timer 2 subtimer B + IntDefaultHandler, // Analog Comparator 0 + IntDefaultHandler, // Analog Comparator 1 + IntDefaultHandler, // Analog Comparator 2 + IntDefaultHandler, // System Control (PLL, OSC, BO) + IntDefaultHandler, // FLASH Control + IntDefaultHandler, // GPIO Port F + IntDefaultHandler, // GPIO Port G + IntDefaultHandler, // GPIO Port H + IntDefaultHandler, // UART2 Rx and Tx + IntDefaultHandler, // SSI1 Rx and Tx + IntDefaultHandler, // Timer 3 subtimer A + IntDefaultHandler, // Timer 3 subtimer B + IntDefaultHandler, // I2C1 Master and Slave + IntDefaultHandler, // Quadrature Encoder 1 + IntDefaultHandler, // CAN0 + IntDefaultHandler, // CAN1 + IntDefaultHandler, // CAN2 + IntDefaultHandler, // Ethernet + IntDefaultHandler, // Hibernate + IntDefaultHandler, // USB0 + IntDefaultHandler, // PWM Generator 3 + IntDefaultHandler, // uDMA Software Transfer + IntDefaultHandler, // uDMA Error + IntDefaultHandler, // ADC1 Sequence 0 + IntDefaultHandler, // ADC1 Sequence 1 + IntDefaultHandler, // ADC1 Sequence 2 + IntDefaultHandler, // ADC1 Sequence 3 + IntDefaultHandler, // I2S0 + IntDefaultHandler, // External Bus Interface 0 + IntDefaultHandler, // GPIO Port J + IntDefaultHandler, // GPIO Port K + IntDefaultHandler, // GPIO Port L + IntDefaultHandler, // SSI2 Rx and Tx + IntDefaultHandler, // SSI3 Rx and Tx + IntDefaultHandler, // UART3 Rx and Tx + IntDefaultHandler, // UART4 Rx and Tx + IntDefaultHandler, // UART5 Rx and Tx + IntDefaultHandler, // UART6 Rx and Tx + IntDefaultHandler, // UART7 Rx and Tx + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // I2C2 Master and Slave + IntDefaultHandler, // I2C3 Master and Slave + IntDefaultHandler, // Timer 4 subtimer A + IntDefaultHandler, // Timer 4 subtimer B + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // Timer 5 subtimer A + IntDefaultHandler, // Timer 5 subtimer B + IntDefaultHandler, // Wide Timer 0 subtimer A + IntDefaultHandler, // Wide Timer 0 subtimer B + IntDefaultHandler, // Wide Timer 1 subtimer A + IntDefaultHandler, // Wide Timer 1 subtimer B + IntDefaultHandler, // Wide Timer 2 subtimer A + IntDefaultHandler, // Wide Timer 2 subtimer B + IntDefaultHandler, // Wide Timer 3 subtimer A + IntDefaultHandler, // Wide Timer 3 subtimer B + IntDefaultHandler, // Wide Timer 4 subtimer A + IntDefaultHandler, // Wide Timer 4 subtimer B + IntDefaultHandler, // Wide Timer 5 subtimer A + IntDefaultHandler, // Wide Timer 5 subtimer B + IntDefaultHandler, // FPU + IntDefaultHandler, // PECI 0 + IntDefaultHandler, // LPC 0 + IntDefaultHandler, // I2C4 Master and Slave + IntDefaultHandler, // I2C5 Master and Slave + IntDefaultHandler, // GPIO Port M + IntDefaultHandler, // GPIO Port N + IntDefaultHandler, // Quadrature Encoder 2 + IntDefaultHandler, // Fan 0 + 0, // Reserved + IntDefaultHandler, // GPIO Port P (Summary or P0) + IntDefaultHandler, // GPIO Port P1 + IntDefaultHandler, // GPIO Port P2 + IntDefaultHandler, // GPIO Port P3 + IntDefaultHandler, // GPIO Port P4 + IntDefaultHandler, // GPIO Port P5 + IntDefaultHandler, // GPIO Port P6 + IntDefaultHandler, // GPIO Port P7 + IntDefaultHandler, // GPIO Port Q (Summary or Q0) + IntDefaultHandler, // GPIO Port Q1 + IntDefaultHandler, // GPIO Port Q2 + IntDefaultHandler, // GPIO Port Q3 + IntDefaultHandler, // GPIO Port Q4 + IntDefaultHandler, // GPIO Port Q5 + IntDefaultHandler, // GPIO Port Q6 + IntDefaultHandler, // GPIO Port Q7 + IntDefaultHandler, // GPIO Port R + IntDefaultHandler, // GPIO Port S + IntDefaultHandler, // PWM 1 Generator 0 + IntDefaultHandler, // PWM 1 Generator 1 + IntDefaultHandler, // PWM 1 Generator 2 + IntDefaultHandler, // PWM 1 Generator 3 + IntDefaultHandler // PWM 1 Fault +}; + +//***************************************************************************** +// +// This is the code that gets called when the processor first starts execution +// following a reset event. Only the absolutely necessary set is performed, +// after which the application supplied entry() routine is called. Any fancy +// actions (such as making decisions based on the reset cause register, and +// resetting the bits in that register) are left solely in the hands of the +// application. +// +//***************************************************************************** +void +ResetISR(void) +{ + // + // Enable the floating-point unit. This must be done here to handle the + // case where main() uses floating-point and the function prologue saves + // floating-point registers (which will fault if floating-point is not + // enabled). Any configuration of the floating-point unit using DriverLib + // APIs must be done here prior to the floating-point unit being enabled. + // + // Note that this does not use DriverLib since it might not be included in + // this project. + // + HWREG(NVIC_CPAC) = ((HWREG(NVIC_CPAC) & + ~(NVIC_CPAC_CP10_M | NVIC_CPAC_CP11_M)) | + NVIC_CPAC_CP10_FULL | NVIC_CPAC_CP11_FULL); + + // + // Call the application's entry point. + // + __iar_program_start(); +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a NMI. This +// simply enters an infinite loop, preserving the system state for examination +// by a debugger. +// +//***************************************************************************** +static void +NmiSR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a fault +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +FaultISR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives an unexpected +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +IntDefaultHandler(void) +{ + // + // Go into an infinite loop. + // + while(1) + { + } +} diff --git a/boards/ek-lm4f120xl/project0/startup_gcc.c b/boards/ek-lm4f120xl/project0/startup_gcc.c new file mode 100644 index 0000000..85b7513 --- /dev/null +++ b/boards/ek-lm4f120xl/project0/startup_gcc.c @@ -0,0 +1,341 @@ +//***************************************************************************** +// +// startup_gcc.c - Startup code for use with GNU tools. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +#include "inc/hw_nvic.h" +#include "inc/hw_types.h" + +//***************************************************************************** +// +// Forward declaration of the default fault handlers. +// +//***************************************************************************** +void ResetISR(void); +static void NmiSR(void); +static void FaultISR(void); +static void IntDefaultHandler(void); + +//***************************************************************************** +// +// The entry point for the application. +// +//***************************************************************************** +extern int main(void); + +//***************************************************************************** +// +// Reserve space for the system stack. +// +//***************************************************************************** +static unsigned long pulStack[64]; + +//***************************************************************************** +// +// The vector table. Note that the proper constructs must be placed on this to +// ensure that it ends up at physical address 0x0000.0000. +// +//***************************************************************************** +__attribute__ ((section(".isr_vector"))) +void (* const g_pfnVectors[])(void) = +{ + (void (*)(void))((unsigned long)pulStack + sizeof(pulStack)), + // The initial stack pointer + ResetISR, // The reset handler + NmiSR, // The NMI handler + FaultISR, // The hard fault handler + IntDefaultHandler, // The MPU fault handler + IntDefaultHandler, // The bus fault handler + IntDefaultHandler, // The usage fault handler + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // SVCall handler + IntDefaultHandler, // Debug monitor handler + 0, // Reserved + IntDefaultHandler, // The PendSV handler + IntDefaultHandler, // The SysTick handler + IntDefaultHandler, // GPIO Port A + IntDefaultHandler, // GPIO Port B + IntDefaultHandler, // GPIO Port C + IntDefaultHandler, // GPIO Port D + IntDefaultHandler, // GPIO Port E + IntDefaultHandler, // UART0 Rx and Tx + IntDefaultHandler, // UART1 Rx and Tx + IntDefaultHandler, // SSI0 Rx and Tx + IntDefaultHandler, // I2C0 Master and Slave + IntDefaultHandler, // PWM Fault + IntDefaultHandler, // PWM Generator 0 + IntDefaultHandler, // PWM Generator 1 + IntDefaultHandler, // PWM Generator 2 + IntDefaultHandler, // Quadrature Encoder 0 + IntDefaultHandler, // ADC Sequence 0 + IntDefaultHandler, // ADC Sequence 1 + IntDefaultHandler, // ADC Sequence 2 + IntDefaultHandler, // ADC Sequence 3 + IntDefaultHandler, // Watchdog timer + IntDefaultHandler, // Timer 0 subtimer A + IntDefaultHandler, // Timer 0 subtimer B + IntDefaultHandler, // Timer 1 subtimer A + IntDefaultHandler, // Timer 1 subtimer B + IntDefaultHandler, // Timer 2 subtimer A + IntDefaultHandler, // Timer 2 subtimer B + IntDefaultHandler, // Analog Comparator 0 + IntDefaultHandler, // Analog Comparator 1 + IntDefaultHandler, // Analog Comparator 2 + IntDefaultHandler, // System Control (PLL, OSC, BO) + IntDefaultHandler, // FLASH Control + IntDefaultHandler, // GPIO Port F + IntDefaultHandler, // GPIO Port G + IntDefaultHandler, // GPIO Port H + IntDefaultHandler, // UART2 Rx and Tx + IntDefaultHandler, // SSI1 Rx and Tx + IntDefaultHandler, // Timer 3 subtimer A + IntDefaultHandler, // Timer 3 subtimer B + IntDefaultHandler, // I2C1 Master and Slave + IntDefaultHandler, // Quadrature Encoder 1 + IntDefaultHandler, // CAN0 + IntDefaultHandler, // CAN1 + IntDefaultHandler, // CAN2 + IntDefaultHandler, // Ethernet + IntDefaultHandler, // Hibernate + IntDefaultHandler, // USB0 + IntDefaultHandler, // PWM Generator 3 + IntDefaultHandler, // uDMA Software Transfer + IntDefaultHandler, // uDMA Error + IntDefaultHandler, // ADC1 Sequence 0 + IntDefaultHandler, // ADC1 Sequence 1 + IntDefaultHandler, // ADC1 Sequence 2 + IntDefaultHandler, // ADC1 Sequence 3 + IntDefaultHandler, // I2S0 + IntDefaultHandler, // External Bus Interface 0 + IntDefaultHandler, // GPIO Port J + IntDefaultHandler, // GPIO Port K + IntDefaultHandler, // GPIO Port L + IntDefaultHandler, // SSI2 Rx and Tx + IntDefaultHandler, // SSI3 Rx and Tx + IntDefaultHandler, // UART3 Rx and Tx + IntDefaultHandler, // UART4 Rx and Tx + IntDefaultHandler, // UART5 Rx and Tx + IntDefaultHandler, // UART6 Rx and Tx + IntDefaultHandler, // UART7 Rx and Tx + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // I2C2 Master and Slave + IntDefaultHandler, // I2C3 Master and Slave + IntDefaultHandler, // Timer 4 subtimer A + IntDefaultHandler, // Timer 4 subtimer B + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // Timer 5 subtimer A + IntDefaultHandler, // Timer 5 subtimer B + IntDefaultHandler, // Wide Timer 0 subtimer A + IntDefaultHandler, // Wide Timer 0 subtimer B + IntDefaultHandler, // Wide Timer 1 subtimer A + IntDefaultHandler, // Wide Timer 1 subtimer B + IntDefaultHandler, // Wide Timer 2 subtimer A + IntDefaultHandler, // Wide Timer 2 subtimer B + IntDefaultHandler, // Wide Timer 3 subtimer A + IntDefaultHandler, // Wide Timer 3 subtimer B + IntDefaultHandler, // Wide Timer 4 subtimer A + IntDefaultHandler, // Wide Timer 4 subtimer B + IntDefaultHandler, // Wide Timer 5 subtimer A + IntDefaultHandler, // Wide Timer 5 subtimer B + IntDefaultHandler, // FPU + IntDefaultHandler, // PECI 0 + IntDefaultHandler, // LPC 0 + IntDefaultHandler, // I2C4 Master and Slave + IntDefaultHandler, // I2C5 Master and Slave + IntDefaultHandler, // GPIO Port M + IntDefaultHandler, // GPIO Port N + IntDefaultHandler, // Quadrature Encoder 2 + IntDefaultHandler, // Fan 0 + 0, // Reserved + IntDefaultHandler, // GPIO Port P (Summary or P0) + IntDefaultHandler, // GPIO Port P1 + IntDefaultHandler, // GPIO Port P2 + IntDefaultHandler, // GPIO Port P3 + IntDefaultHandler, // GPIO Port P4 + IntDefaultHandler, // GPIO Port P5 + IntDefaultHandler, // GPIO Port P6 + IntDefaultHandler, // GPIO Port P7 + IntDefaultHandler, // GPIO Port Q (Summary or Q0) + IntDefaultHandler, // GPIO Port Q1 + IntDefaultHandler, // GPIO Port Q2 + IntDefaultHandler, // GPIO Port Q3 + IntDefaultHandler, // GPIO Port Q4 + IntDefaultHandler, // GPIO Port Q5 + IntDefaultHandler, // GPIO Port Q6 + IntDefaultHandler, // GPIO Port Q7 + IntDefaultHandler, // GPIO Port R + IntDefaultHandler, // GPIO Port S + IntDefaultHandler, // PWM 1 Generator 0 + IntDefaultHandler, // PWM 1 Generator 1 + IntDefaultHandler, // PWM 1 Generator 2 + IntDefaultHandler, // PWM 1 Generator 3 + IntDefaultHandler // PWM 1 Fault +}; + +//***************************************************************************** +// +// The following are constructs created by the linker, indicating where the +// the "data" and "bss" segments reside in memory. The initializers for the +// for the "data" segment resides immediately following the "text" segment. +// +//***************************************************************************** +extern unsigned long _etext; +extern unsigned long _data; +extern unsigned long _edata; +extern unsigned long _bss; +extern unsigned long _ebss; + +//***************************************************************************** +// +// This is the code that gets called when the processor first starts execution +// following a reset event. Only the absolutely necessary set is performed, +// after which the application supplied entry() routine is called. Any fancy +// actions (such as making decisions based on the reset cause register, and +// resetting the bits in that register) are left solely in the hands of the +// application. +// +//***************************************************************************** +void +ResetISR(void) +{ + unsigned long *pulSrc, *pulDest; + + // + // Copy the data segment initializers from flash to SRAM. + // + pulSrc = &_etext; + for(pulDest = &_data; pulDest < &_edata; ) + { + *pulDest++ = *pulSrc++; + } + + // + // Zero fill the bss segment. + // + __asm(" ldr r0, =_bss\n" + " ldr r1, =_ebss\n" + " mov r2, #0\n" + " .thumb_func\n" + "zero_loop:\n" + " cmp r0, r1\n" + " it lt\n" + " strlt r2, [r0], #4\n" + " blt zero_loop"); + + // + // Enable the floating-point unit. This must be done here to handle the + // case where main() uses floating-point and the function prologue saves + // floating-point registers (which will fault if floating-point is not + // enabled). Any configuration of the floating-point unit using DriverLib + // APIs must be done here prior to the floating-point unit being enabled. + // + // Note that this does not use DriverLib since it might not be included in + // this project. + // + HWREG(NVIC_CPAC) = ((HWREG(NVIC_CPAC) & + ~(NVIC_CPAC_CP10_M | NVIC_CPAC_CP11_M)) | + NVIC_CPAC_CP10_FULL | NVIC_CPAC_CP11_FULL); + + // + // Call the application's entry point. + // + main(); +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a NMI. This +// simply enters an infinite loop, preserving the system state for examination +// by a debugger. +// +//***************************************************************************** +static void +NmiSR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a fault +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +FaultISR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives an unexpected +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +IntDefaultHandler(void) +{ + // + // Go into an infinite loop. + // + while(1) + { + } +} diff --git a/boards/ek-lm4f120xl/project0/startup_rvmdk.S b/boards/ek-lm4f120xl/project0/startup_rvmdk.S new file mode 100644 index 0000000..53d4dc9 --- /dev/null +++ b/boards/ek-lm4f120xl/project0/startup_rvmdk.S @@ -0,0 +1,351 @@ +; <<< Use Configuration Wizard in Context Menu >>> +;****************************************************************************** +; +; startup_rvmdk.S - Startup code for use with Keil's uVision. +; +; Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +; Software License Agreement +; +; Texas Instruments (TI) is supplying this software for use solely and +; exclusively on TI's microcontroller products. The software is owned by +; TI and/or its suppliers, and is protected under applicable copyright +; laws. You may not combine this software with "viral" open-source +; software in order to form a larger program. +; +; THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +; NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +; NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +; A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +; CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +; DAMAGES, FOR ANY REASON WHATSOEVER. +; +; This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +; +;****************************************************************************** + +;****************************************************************************** +; +; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +; +;****************************************************************************** +Stack EQU 0x00000100 + +;****************************************************************************** +; +; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> +; +;****************************************************************************** +Heap EQU 0x00000000 + +;****************************************************************************** +; +; Allocate space for the stack. +; +;****************************************************************************** + AREA STACK, NOINIT, READWRITE, ALIGN=3 +StackMem + SPACE Stack +__initial_sp + +;****************************************************************************** +; +; Allocate space for the heap. +; +;****************************************************************************** + AREA HEAP, NOINIT, READWRITE, ALIGN=3 +__heap_base +HeapMem + SPACE Heap +__heap_limit + +;****************************************************************************** +; +; Indicate that the code in this file preserves 8-byte alignment of the stack. +; +;****************************************************************************** + PRESERVE8 + +;****************************************************************************** +; +; Place code into the reset code section. +; +;****************************************************************************** + AREA RESET, CODE, READONLY + THUMB + +;****************************************************************************** +; +; The vector table. +; +;****************************************************************************** + EXPORT __Vectors +__Vectors + DCD StackMem + Stack ; Top of Stack + DCD Reset_Handler ; Reset Handler + DCD NmiSR ; NMI Handler + DCD FaultISR ; Hard Fault Handler + DCD IntDefaultHandler ; The MPU fault handler + DCD IntDefaultHandler ; The bus fault handler + DCD IntDefaultHandler ; The usage fault handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD IntDefaultHandler ; SVCall handler + DCD IntDefaultHandler ; Debug monitor handler + DCD 0 ; Reserved + DCD IntDefaultHandler ; The PendSV handler + DCD IntDefaultHandler ; The SysTick handler + DCD IntDefaultHandler ; GPIO Port A + DCD IntDefaultHandler ; GPIO Port B + DCD IntDefaultHandler ; GPIO Port C + DCD IntDefaultHandler ; GPIO Port D + DCD IntDefaultHandler ; GPIO Port E + DCD IntDefaultHandler ; UART0 Rx and Tx + DCD IntDefaultHandler ; UART1 Rx and Tx + DCD IntDefaultHandler ; SSI0 Rx and Tx + DCD IntDefaultHandler ; I2C0 Master and Slave + DCD IntDefaultHandler ; PWM Fault + DCD IntDefaultHandler ; PWM Generator 0 + DCD IntDefaultHandler ; PWM Generator 1 + DCD IntDefaultHandler ; PWM Generator 2 + DCD IntDefaultHandler ; Quadrature Encoder 0 + DCD IntDefaultHandler ; ADC Sequence 0 + DCD IntDefaultHandler ; ADC Sequence 1 + DCD IntDefaultHandler ; ADC Sequence 2 + DCD IntDefaultHandler ; ADC Sequence 3 + DCD IntDefaultHandler ; Watchdog timer + DCD IntDefaultHandler ; Timer 0 subtimer A + DCD IntDefaultHandler ; Timer 0 subtimer B + DCD IntDefaultHandler ; Timer 1 subtimer A + DCD IntDefaultHandler ; Timer 1 subtimer B + DCD IntDefaultHandler ; Timer 2 subtimer A + DCD IntDefaultHandler ; Timer 2 subtimer B + DCD IntDefaultHandler ; Analog Comparator 0 + DCD IntDefaultHandler ; Analog Comparator 1 + DCD IntDefaultHandler ; Analog Comparator 2 + DCD IntDefaultHandler ; System Control (PLL, OSC, BO) + DCD IntDefaultHandler ; FLASH Control + DCD IntDefaultHandler ; GPIO Port F + DCD IntDefaultHandler ; GPIO Port G + DCD IntDefaultHandler ; GPIO Port H + DCD IntDefaultHandler ; UART2 Rx and Tx + DCD IntDefaultHandler ; SSI1 Rx and Tx + DCD IntDefaultHandler ; Timer 3 subtimer A + DCD IntDefaultHandler ; Timer 3 subtimer B + DCD IntDefaultHandler ; I2C1 Master and Slave + DCD IntDefaultHandler ; Quadrature Encoder 1 + DCD IntDefaultHandler ; CAN0 + DCD IntDefaultHandler ; CAN1 + DCD IntDefaultHandler ; CAN2 + DCD IntDefaultHandler ; Ethernet + DCD IntDefaultHandler ; Hibernate + DCD IntDefaultHandler ; USB0 + DCD IntDefaultHandler ; PWM Generator 3 + DCD IntDefaultHandler ; uDMA Software Transfer + DCD IntDefaultHandler ; uDMA Error + DCD IntDefaultHandler ; ADC1 Sequence 0 + DCD IntDefaultHandler ; ADC1 Sequence 1 + DCD IntDefaultHandler ; ADC1 Sequence 2 + DCD IntDefaultHandler ; ADC1 Sequence 3 + DCD IntDefaultHandler ; I2S0 + DCD IntDefaultHandler ; External Bus Interface 0 + DCD IntDefaultHandler ; GPIO Port J + DCD IntDefaultHandler ; GPIO Port K + DCD IntDefaultHandler ; GPIO Port L + DCD IntDefaultHandler ; SSI2 Rx and Tx + DCD IntDefaultHandler ; SSI3 Rx and Tx + DCD IntDefaultHandler ; UART3 Rx and Tx + DCD IntDefaultHandler ; UART4 Rx and Tx + DCD IntDefaultHandler ; UART5 Rx and Tx + DCD IntDefaultHandler ; UART6 Rx and Tx + DCD IntDefaultHandler ; UART7 Rx and Tx + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD IntDefaultHandler ; I2C2 Master and Slave + DCD IntDefaultHandler ; I2C3 Master and Slave + DCD IntDefaultHandler ; Timer 4 subtimer A + DCD IntDefaultHandler ; Timer 4 subtimer B + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD IntDefaultHandler ; Timer 5 subtimer A + DCD IntDefaultHandler ; Timer 5 subtimer B + DCD IntDefaultHandler ; Wide Timer 0 subtimer A + DCD IntDefaultHandler ; Wide Timer 0 subtimer B + DCD IntDefaultHandler ; Wide Timer 1 subtimer A + DCD IntDefaultHandler ; Wide Timer 1 subtimer B + DCD IntDefaultHandler ; Wide Timer 2 subtimer A + DCD IntDefaultHandler ; Wide Timer 2 subtimer B + DCD IntDefaultHandler ; Wide Timer 3 subtimer A + DCD IntDefaultHandler ; Wide Timer 3 subtimer B + DCD IntDefaultHandler ; Wide Timer 4 subtimer A + DCD IntDefaultHandler ; Wide Timer 4 subtimer B + DCD IntDefaultHandler ; Wide Timer 5 subtimer A + DCD IntDefaultHandler ; Wide Timer 5 subtimer B + DCD IntDefaultHandler ; FPU + DCD IntDefaultHandler ; PECI 0 + DCD IntDefaultHandler ; LPC 0 + DCD IntDefaultHandler ; I2C4 Master and Slave + DCD IntDefaultHandler ; I2C5 Master and Slave + DCD IntDefaultHandler ; GPIO Port M + DCD IntDefaultHandler ; GPIO Port N + DCD IntDefaultHandler ; Quadrature Encoder 2 + DCD IntDefaultHandler ; Fan 0 + DCD 0 ; Reserved + DCD IntDefaultHandler ; GPIO Port P (Summary or P0) + DCD IntDefaultHandler ; GPIO Port P1 + DCD IntDefaultHandler ; GPIO Port P2 + DCD IntDefaultHandler ; GPIO Port P3 + DCD IntDefaultHandler ; GPIO Port P4 + DCD IntDefaultHandler ; GPIO Port P5 + DCD IntDefaultHandler ; GPIO Port P6 + DCD IntDefaultHandler ; GPIO Port P7 + DCD IntDefaultHandler ; GPIO Port Q (Summary or Q0) + DCD IntDefaultHandler ; GPIO Port Q1 + DCD IntDefaultHandler ; GPIO Port Q2 + DCD IntDefaultHandler ; GPIO Port Q3 + DCD IntDefaultHandler ; GPIO Port Q4 + DCD IntDefaultHandler ; GPIO Port Q5 + DCD IntDefaultHandler ; GPIO Port Q6 + DCD IntDefaultHandler ; GPIO Port Q7 + DCD IntDefaultHandler ; GPIO Port R + DCD IntDefaultHandler ; GPIO Port S + DCD IntDefaultHandler ; PWM 1 Generator 0 + DCD IntDefaultHandler ; PWM 1 Generator 1 + DCD IntDefaultHandler ; PWM 1 Generator 2 + DCD IntDefaultHandler ; PWM 1 Generator 3 + DCD IntDefaultHandler ; PWM 1 Fault + +;****************************************************************************** +; +; This is the code that gets called when the processor first starts execution +; following a reset event. +; +;****************************************************************************** + EXPORT Reset_Handler +Reset_Handler + ; + ; Enable the floating-point unit. This must be done here to handle the + ; case where main() uses floating-point and the function prologue saves + ; floating-point registers (which will fault if floating-point is not + ; enabled). Any configuration of the floating-point unit using + ; DriverLib APIs must be done here prior to the floating-point unit + ; being enabled. + ; + ; Note that this does not use DriverLib since it might not be included + ; in this project. + ; + MOVW R0, #0xED88 + MOVT R0, #0xE000 + LDR R1, [R0] + ORR R1, #0x00F00000 + STR R1, [R0] + + ; + ; Call the C library enty point that handles startup. This will copy + ; the .data section initializers from flash to SRAM and zero fill the + ; .bss section. + ; + IMPORT __main + B __main + +;****************************************************************************** +; +; This is the code that gets called when the processor receives a NMI. This +; simply enters an infinite loop, preserving the system state for examination +; by a debugger. +; +;****************************************************************************** +NmiSR + B NmiSR + +;****************************************************************************** +; +; This is the code that gets called when the processor receives a fault +; interrupt. This simply enters an infinite loop, preserving the system state +; for examination by a debugger. +; +;****************************************************************************** +FaultISR + B FaultISR + +;****************************************************************************** +; +; This is the code that gets called when the processor receives an unexpected +; interrupt. This simply enters an infinite loop, preserving the system state +; for examination by a debugger. +; +;****************************************************************************** +IntDefaultHandler + B IntDefaultHandler + +;****************************************************************************** +; +; Make sure the end of this section is aligned. +; +;****************************************************************************** + ALIGN + +;****************************************************************************** +; +; Some code in the normal code section for initializing the heap and stack. +; +;****************************************************************************** + AREA |.text|, CODE, READONLY + +;****************************************************************************** +; +; The function expected of the C library startup code for defining the stack +; and heap memory locations. For the C library version of the startup code, +; provide this function so that the C library initialization code can find out +; the location of the stack and heap. +; +;****************************************************************************** + IF :DEF: __MICROLIB + EXPORT __initial_sp + EXPORT __heap_base + EXPORT __heap_limit + ELSE + IMPORT __use_two_region_memory + EXPORT __user_initial_stackheap +__user_initial_stackheap + LDR R0, =HeapMem + LDR R1, =(StackMem + Stack) + LDR R2, =(HeapMem + Heap) + LDR R3, =StackMem + BX LR + ENDIF + +;****************************************************************************** +; +; Make sure the end of this section is aligned. +; +;****************************************************************************** + ALIGN + +;****************************************************************************** +; +; Tell the assembler that we're done. +; +;****************************************************************************** + END diff --git a/boards/ek-lm4f120xl/project0/startup_sourcerygxx.S b/boards/ek-lm4f120xl/project0/startup_sourcerygxx.S new file mode 100644 index 0000000..b720839 --- /dev/null +++ b/boards/ek-lm4f120xl/project0/startup_sourcerygxx.S @@ -0,0 +1,75 @@ +//***************************************************************************** +// +// startup_sourcerygxx.S - Startup code for Sourcery CodeBench. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + + .syntax unified + .thumb + +//***************************************************************************** +// +// Place this code into the .cs3.reset section so that it can be executed prior +// to the startup code in Sourcery CodeBench. +// +//***************************************************************************** + .section .cs3.reset,"x" + +//***************************************************************************** +// +// The reset handler, which overrides the one provided by CS3. +// +//***************************************************************************** + .globl __cs3_reset + .thumb_func +__cs3_reset: + // + // Enable the floating-point unit. This must be done here to handle the + // case where main() uses floating-point and the function prologue saves + // floating-point registers (which will fault if floating-point is not + // enabled). Any configuration of the floating-point unit using DriverLib + // APIs must be done here prior to the floating-point unit being enabled. + // + // Note that this does not use DriverLib since it might not be included in + // this project. + // + movw r0, #0xed88 + movt r0, #0xe000 + ldr r1, [r0] + orr r1, #0x00f00000 + str r1, [r0] + + // + // Branch to the normal CS3 startup code. + // + .extern __cs3_reset_ekc_lm4f232 + ldr r0, =__cs3_reset_ekc_lm4f232 + bx r0 + + // + // Place the literal pool here. + // + .ltorg + + // + // The end of the file. + // + .end diff --git a/boards/ek-lm4f120xl/qs-rgb/Makefile b/boards/ek-lm4f120xl/qs-rgb/Makefile new file mode 100644 index 0000000..931b560 --- /dev/null +++ b/boards/ek-lm4f120xl/qs-rgb/Makefile @@ -0,0 +1,98 @@ +#****************************************************************************** +# +# Makefile - Rules for building the Quickstart RGB. +# +# Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +# Software License Agreement +# +# Texas Instruments (TI) is supplying this software for use solely and +# exclusively on TI's microcontroller products. The software is owned by +# TI and/or its suppliers, and is protected under applicable copyright +# laws. You may not combine this software with "viral" open-source +# software in order to form a larger program. +# +# THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +# NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +# NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +# A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +# CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +# DAMAGES, FOR ANY REASON WHATSOEVER. +# +# This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +# +#****************************************************************************** + +# +# Defines the part type that this project uses. +# +PART=LM4F120H5QR + +# +# Set the processor variant. +# +VARIANT=cm4f + +# +# The base directory for StellarisWare. +# +ROOT=../../.. + +# +# Include the common make definitions. +# +include ${ROOT}/makedefs + +# +# Where to find source files that do not live in this directory. +# +VPATH=../drivers +VPATH+=../../../utils + +# +# Where to find header files that do not live in the source directory. +# +IPATH=.. +IPATH+=../../.. + +# +# The default rule, which causes the Quickstart RGB to be built. +# +all: ${COMPILER} +all: ${COMPILER}/qs-rgb.axf + +# +# The rule to clean out all the build products. +# +clean: + @rm -rf ${COMPILER} ${wildcard *~} + +# +# The rule to create the target directory. +# +${COMPILER}: + @mkdir -p ${COMPILER} + +# +# Rules for building the Quickstart RGB. +# +${COMPILER}/qs-rgb.axf: ${COMPILER}/buttons.o +${COMPILER}/qs-rgb.axf: ${COMPILER}/cmdline.o +${COMPILER}/qs-rgb.axf: ${COMPILER}/qs-rgb.o +${COMPILER}/qs-rgb.axf: ${COMPILER}/rgb.o +${COMPILER}/qs-rgb.axf: ${COMPILER}/rgb_commands.o +${COMPILER}/qs-rgb.axf: ${COMPILER}/startup_${COMPILER}.o +${COMPILER}/qs-rgb.axf: ${COMPILER}/uartstdio.o +${COMPILER}/qs-rgb.axf: ${COMPILER}/ustdlib.o +${COMPILER}/qs-rgb.axf: ${ROOT}/usblib/${COMPILER}-cm4f/libusb-cm4f.a +${COMPILER}/qs-rgb.axf: ${ROOT}/driverlib/${COMPILER}-cm4f/libdriver-cm4f.a +${COMPILER}/qs-rgb.axf: qs-rgb.ld +SCATTERgcc_qs-rgb=qs-rgb.ld +ENTRY_qs-rgb=ResetISR +CFLAGSgcc=-DTARGET_IS_BLIZZARD_RA2 -DUART_BUFFERED + +# +# Include the automatically generated dependency files. +# +ifneq (${MAKECMDGOALS},clean) +-include ${wildcard ${COMPILER}/*.d} __dummy__ +endif diff --git a/boards/ek-lm4f120xl/qs-rgb/ccs/.ccsimportspec b/boards/ek-lm4f120xl/qs-rgb/ccs/.ccsimportspec new file mode 100644 index 0000000..f2960bb --- /dev/null +++ b/boards/ek-lm4f120xl/qs-rgb/ccs/.ccsimportspec @@ -0,0 +1,11 @@ + + + + + + + + + + + diff --git a/boards/ek-lm4f120xl/qs-rgb/ccs/.ccsproject b/boards/ek-lm4f120xl/qs-rgb/ccs/.ccsproject new file mode 100644 index 0000000..56793f4 --- /dev/null +++ b/boards/ek-lm4f120xl/qs-rgb/ccs/.ccsproject @@ -0,0 +1,12 @@ + + + + + + + + + + + + diff --git a/boards/ek-lm4f120xl/qs-rgb/ccs/.cproject b/boards/ek-lm4f120xl/qs-rgb/ccs/.cproject new file mode 100644 index 0000000..97fef1f --- /dev/null +++ b/boards/ek-lm4f120xl/qs-rgb/ccs/.cproject @@ -0,0 +1,197 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/boards/ek-lm4f120xl/qs-rgb/ccs/.project b/boards/ek-lm4f120xl/qs-rgb/ccs/.project new file mode 100644 index 0000000..fee2a9e --- /dev/null +++ b/boards/ek-lm4f120xl/qs-rgb/ccs/.project @@ -0,0 +1,136 @@ + + + qs-rgb + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + + + ?name? + + + + org.eclipse.cdt.make.core.append_environment + true + + + org.eclipse.cdt.make.core.autoBuildTarget + all + + + org.eclipse.cdt.make.core.buildArguments + -k + + + org.eclipse.cdt.make.core.buildCommand + ${CCS_UTILS_DIR}/bin/gmake + + + org.eclipse.cdt.make.core.buildLocation + ${BuildDirectory} + + + org.eclipse.cdt.make.core.cleanBuildTarget + clean + + + org.eclipse.cdt.make.core.contents + org.eclipse.cdt.make.core.activeConfigSettings + + + org.eclipse.cdt.make.core.enableAutoBuild + true + + + org.eclipse.cdt.make.core.enableCleanBuild + true + + + org.eclipse.cdt.make.core.enableFullBuild + true + + + org.eclipse.cdt.make.core.fullBuildTarget + all + + + org.eclipse.cdt.make.core.stopOnError + false + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + true + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + com.ti.ccstudio.core.ccsNature + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.core.ccnature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + qs-rgb.c + 1 + SW_ROOT/boards/ek-lm4f120xl/qs-rgb/qs-rgb.c + + + qs-rgb_ccs.cmd + 1 + SW_ROOT/boards/ek-lm4f120xl/qs-rgb/qs-rgb_ccs.cmd + + + rgb_commands.c + 1 + SW_ROOT/boards/ek-lm4f120xl/qs-rgb/rgb_commands.c + + + startup_ccs.c + 1 + SW_ROOT/boards/ek-lm4f120xl/qs-rgb/startup_ccs.c + + + drivers/buttons.c + 1 + SW_ROOT/boards/ek-lm4f120xl/drivers/buttons.c + + + drivers/rgb.c + 1 + SW_ROOT/boards/ek-lm4f120xl/drivers/rgb.c + + + utils/cmdline.c + 1 + SW_ROOT/utils/cmdline.c + + + utils/uartstdio.c + 1 + SW_ROOT/utils/uartstdio.c + + + utils/ustdlib.c + 1 + SW_ROOT/utils/ustdlib.c + + + + + SW_ROOT + $%7BPARENT-4-PROJECT_LOC%7D + + + diff --git a/boards/ek-lm4f120xl/qs-rgb/ccs/.settings/org.eclipse.cdt.codan.core.prefs b/boards/ek-lm4f120xl/qs-rgb/ccs/.settings/org.eclipse.cdt.codan.core.prefs new file mode 100644 index 0000000..98b6350 --- /dev/null +++ b/boards/ek-lm4f120xl/qs-rgb/ccs/.settings/org.eclipse.cdt.codan.core.prefs @@ -0,0 +1,3 @@ +eclipse.preferences.version=1 +inEditor=false +onBuild=false diff --git a/boards/ek-lm4f120xl/qs-rgb/ccs/Debug/qs-rgb.bin b/boards/ek-lm4f120xl/qs-rgb/ccs/Debug/qs-rgb.bin new file mode 100644 index 0000000..aedb8d3 Binary files /dev/null and b/boards/ek-lm4f120xl/qs-rgb/ccs/Debug/qs-rgb.bin differ diff --git a/boards/ek-lm4f120xl/qs-rgb/ccs/Debug/qs-rgb.out b/boards/ek-lm4f120xl/qs-rgb/ccs/Debug/qs-rgb.out new file mode 100644 index 0000000..c4b4d1d Binary files /dev/null and b/boards/ek-lm4f120xl/qs-rgb/ccs/Debug/qs-rgb.out differ diff --git a/boards/ek-lm4f120xl/qs-rgb/ccs/macros.ini_initial b/boards/ek-lm4f120xl/qs-rgb/ccs/macros.ini_initial new file mode 100644 index 0000000..588017d --- /dev/null +++ b/boards/ek-lm4f120xl/qs-rgb/ccs/macros.ini_initial @@ -0,0 +1 @@ +SW_ROOT = ../../../.. diff --git a/boards/ek-lm4f120xl/qs-rgb/ccs/target_config.ccxml b/boards/ek-lm4f120xl/qs-rgb/ccs/target_config.ccxml new file mode 100644 index 0000000..469eea0 --- /dev/null +++ b/boards/ek-lm4f120xl/qs-rgb/ccs/target_config.ccxml @@ -0,0 +1,13 @@ + + + + + + + + + + + + + diff --git a/boards/ek-lm4f120xl/qs-rgb/ewarm/Exe/qs-rgb.bin b/boards/ek-lm4f120xl/qs-rgb/ewarm/Exe/qs-rgb.bin new file mode 100644 index 0000000..c41e3fa Binary files /dev/null and b/boards/ek-lm4f120xl/qs-rgb/ewarm/Exe/qs-rgb.bin differ diff --git a/boards/ek-lm4f120xl/qs-rgb/ewarm/Exe/qs-rgb.out b/boards/ek-lm4f120xl/qs-rgb/ewarm/Exe/qs-rgb.out new file mode 100644 index 0000000..f03bfe2 Binary files /dev/null and b/boards/ek-lm4f120xl/qs-rgb/ewarm/Exe/qs-rgb.out differ diff --git a/boards/ek-lm4f120xl/qs-rgb/gcc/qs-rgb.axf b/boards/ek-lm4f120xl/qs-rgb/gcc/qs-rgb.axf new file mode 100644 index 0000000..be67b80 Binary files /dev/null and b/boards/ek-lm4f120xl/qs-rgb/gcc/qs-rgb.axf differ diff --git a/boards/ek-lm4f120xl/qs-rgb/gcc/qs-rgb.bin b/boards/ek-lm4f120xl/qs-rgb/gcc/qs-rgb.bin new file mode 100644 index 0000000..a9f46a2 Binary files /dev/null and b/boards/ek-lm4f120xl/qs-rgb/gcc/qs-rgb.bin differ diff --git a/boards/ek-lm4f120xl/qs-rgb/qs-rgb.c b/boards/ek-lm4f120xl/qs-rgb/qs-rgb.c new file mode 100644 index 0000000..44ff533 --- /dev/null +++ b/boards/ek-lm4f120xl/qs-rgb/qs-rgb.c @@ -0,0 +1,675 @@ +//***************************************************************************** +// +// qs-rgb.c - Quickstart for the EK-LM4F120XL Stellaris LaunchPad +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +#include +#include "inc/hw_types.h" +#include "inc/hw_memmap.h" +#include "inc/hw_hibernate.h" +#include "driverlib/fpu.h" +#include "driverlib/sysctl.h" +#include "driverlib/rom.h" +#include "driverlib/pin_map.h" +#include "driverlib/gpio.h" +#include "driverlib/systick.h" +#include "driverlib/interrupt.h" +#include "driverlib/hibernate.h" +#include "utils/uartstdio.h" +#include "utils/cmdline.h" +#include "drivers/rgb.h" +#include "drivers/buttons.h" +#include "rgb_commands.h" +#include "qs-rgb.h" + +//***************************************************************************** +// +//! \addtogroup example_list +//!

EK-LM4F120XL Quickstart Application (qs-rgb)

+//! +//! A demonstration of the Stellaris LaunchPad (EK-LM4F120XL) capabilities. +//! +//! Press and/or hold the left button traverse toward the red end of the +//! ROYGBIV color spectrum. Press and/or hold the right button to traverse +//! toward the violet end of the ROYGBIV color spectrum. +//! +//! Leave idle for 5 seconds to see a automatically changing color display +//! +//! Press and hold both left and right buttons for 3 seconds to enter +//! hibernation. During hibernation last color on screen will blink on the +//! LED for 0.5 seconds every 3 seconds. +//! +//! Command line UART protocol can also control the system. +//! +//! Command 'help' to generate list of commands and helpful information. +//! Command 'hib' will place the device into hibernation mode. +//! Command 'rand' will initiate the pseudo-random sequence. +//! Command 'intensity' followed by a number between 0.0 and 1.0 will scale +//! the brightness of the LED by that factor. +//! Command 'rgb' followed by a six character hex value will set the color. For +//! example 'rgb FF0000' will produce a red color. +// +//***************************************************************************** + + +//***************************************************************************** +// +// Entry counter to track how long to stay in certain staging states before +// making transition into hibernate. +// +//***************************************************************************** +static volatile unsigned long ulHibModeEntryCount; + +//***************************************************************************** +// +// Array of pre-defined colors for use when buttons cause manual color steps. +// +//***************************************************************************** +static float fManualColors[7] = {0.0f, .214f, .428f, .642f, .856f, 1.07f, + 1.284f}; + +//***************************************************************************** +// +// Input buffer for the command line interpreter. +// +//***************************************************************************** +static char g_cInput[APP_INPUT_BUF_SIZE]; + +//***************************************************************************** +// +// Application state structure. Gets stored to hibernate memory for +// preservation across hibernate events. +// +//***************************************************************************** +volatile sAppState_t g_sAppState; + +//***************************************************************************** +// +// The error routine that is called if the driver library encounters an error. +// +//***************************************************************************** +#ifdef DEBUG +void +__error__(char *pcFilename, unsigned long ulLine) +{ +} +#endif + + +//***************************************************************************** +// +// Handler to manage the button press events and state machine transitions +// that result from those button events. +// +// This function is called by the SysTickIntHandler if a button event is +// detected. Function will determine which button was pressed and tweak various +// elements of the global state structure accordingly. +// +//***************************************************************************** +void +AppButtonHandler(void) +{ + static unsigned long ulTickCounter; + + ulTickCounter++; + + // + // Switch statement to adjust the color wheel position based on buttons + // + switch(g_sAppState.ulButtons & ALL_BUTTONS) + { + + case LEFT_BUTTON: + + // + // Check if the button has been held long enough to peform another + // color wheel increment. + // + if((ulTickCounter % APP_BUTTON_POLL_DIVIDER) == 0) + { + // + // Perform the increment and index wrap around. + // + g_sAppState.ulManualIndex++; + if(g_sAppState.ulManualIndex >= APP_NUM_MANUAL_COLORS) + { + g_sAppState.ulManualIndex = 0; + } + g_sAppState.fColorWheelPos = APP_PI * + fManualColors[g_sAppState.ulManualIndex]; + } + + // + // Reset some state counts and system mode so that we know the user + // is present and actively engaging with the application. + // + ulHibModeEntryCount = 0; + g_sAppState.ulModeTimer = 0; + g_sAppState.ulMode = APP_MODE_NORMAL; + break; + + case RIGHT_BUTTON: + + // + // Check if the button has been held long enough to perform another + // color wheel decrement. + // + if((ulTickCounter % APP_BUTTON_POLL_DIVIDER) == 0) + { + // + // Perform the decrement and index wrap around. + // + if(g_sAppState.ulManualIndex == 0) + { + // + // set to one greater than the last color so that we decrement + // back into range with next instruction. + // + g_sAppState.ulManualIndex = APP_NUM_MANUAL_COLORS; + } + g_sAppState.ulManualIndex--; + g_sAppState.fColorWheelPos = APP_PI * + fManualColors[g_sAppState.ulManualIndex]; + } + // + // Reset some state counts and system mode so that we know the user + // is present and actively engaging with the application. + // + ulHibModeEntryCount = 0; + g_sAppState.ulModeTimer = 0; + g_sAppState.ulMode = APP_MODE_NORMAL; + break; + + case ALL_BUTTONS: + + // + // Both buttons for longer than debounce time will cause hibernation + // + if(ulHibModeEntryCount < APP_HIB_BUTTON_DEBOUNCE) + { + ulHibModeEntryCount++; + g_sAppState.ulMode = APP_MODE_NORMAL; + } + else + { + g_sAppState.ulMode = APP_MODE_HIB; + } + g_sAppState.ulModeTimer = 0; + break; + + default: + if(g_sAppState.ulMode == APP_MODE_HIB_FLASH) + { + // + // Waking from hibernate RTC just do a quick flash then back to + // hibernation. + // + if(ulHibModeEntryCount < APP_HIB_FLASH_DURATION) + { + ulHibModeEntryCount++; + } + else + { + g_sAppState.ulMode = APP_MODE_HIB; + } + } + else + { + // + // Normal or remote mode and no user action will cause transition + // to automatic scrolling mode. + // + ulHibModeEntryCount = 0; + if(g_sAppState.ulModeTimer < APP_AUTO_MODE_TIMEOUT) + { + g_sAppState.ulModeTimer++; + } + else + { + g_sAppState.ulMode = APP_MODE_AUTO; + } + + // + // reset the tick counter when no buttons are pressed + // this makes the first button reaction speed quicker + // + ulTickCounter = APP_BUTTON_POLL_DIVIDER - 1; + } + break; + } +} + +//***************************************************************************** +// +// Uses the fColorWheelPos variable to update the color mix shown on the RGB +// +// ulForceUpdate when set forces a color update even if a color change +// has not been detected. Used primarily at startup to init the color after +// a hibernate. +// +// This function is called by the SysTickIntHandler to update the colors on +// the RGB LED whenever a button or timeout event has changed the color wheel +// position. Color is determined by a series of sine functions and conditions +// +//***************************************************************************** +void +AppRainbow(unsigned long ulForceUpdate) +{ + static float fPrevPos; + float fCurPos; + float fTemp; + volatile unsigned long * pulColors; + + pulColors = g_sAppState.ulColors; + fCurPos = g_sAppState.fColorWheelPos; + + + if((fCurPos != fPrevPos) || ulForceUpdate) + { + // + // Preserve the new color wheel position + // + fPrevPos = fCurPos; + + // + // Adjust the BLUE value based on the control state + // + fTemp = 65535.0f * sinf(fCurPos); + if(fTemp < 0) + { + pulColors[GREEN] = 0; + } + else + { + pulColors[GREEN] = (unsigned long) fTemp; + } + + + // + // Adjust the RED value based on the control state + // + fTemp = 65535.0f * sinf(fCurPos - APP_PI / 2.0f); + if(fTemp < 0) + { + pulColors[BLUE] = 0; + } + else + { + pulColors[BLUE] = (unsigned long) fTemp; + } + + + // + // Adjust the GREEN value based on the control state + // + if(fCurPos < APP_PI) + { + fTemp = 65535.0f * sinf(fCurPos + APP_PI * 0.5f); + } + else + { + fTemp = 65535.0f * sinf(fCurPos + APP_PI); + } + if(fTemp < 0) + { + pulColors[RED] = 0; + } + else + { + pulColors[RED] = (unsigned long) fTemp; + } + + // + // Update the actual LED state + // + RGBColorSet(pulColors); + } + +} + +//***************************************************************************** +// +// Called by the NVIC as a result of SysTick Timer rollover interrupt flag +// +// Checks buttons and calls AppButtonHandler to manage button events. +// Tracks time and auto mode color stepping. Calls AppRainbow to implement +// RGB color changes. +// +//***************************************************************************** +void +SysTickIntHandler(void) +{ + + static float x; + + g_sAppState.ulButtons = ButtonsPoll(0,0); + AppButtonHandler(); + + // + // Auto increment the color wheel if in the AUTO mode. AUTO mode is when + // device is active but user interaction has timed out. + // + if(g_sAppState.ulMode == APP_MODE_AUTO) + { + g_sAppState.fColorWheelPos += APP_AUTO_COLOR_STEP; + } + + // + // Provide wrap around of the control variable from 0 to 1.5 times PI + // + if(g_sAppState.fColorWheelPos > (APP_PI * 1.5f)) + { + g_sAppState.fColorWheelPos = 0.0f; + } + if(x < 0.0f) + { + g_sAppState.fColorWheelPos = APP_PI * 1.5f; + } + + // + // Set the RGB Color based on current control variable value. + // + AppRainbow(0); + + +} + +//***************************************************************************** +// +// Uses the fColorWheelPos variable to update the color mix shown on the RGB +// +// This function is called when system has decided it is time to enter +// Hibernate. This will prepare the hibernate peripheral, save the system +// state and then enter hibernate mode. +// +//***************************************************************************** +void +AppHibernateEnter(void) +{ + // + // Alert UART command line users that we are going to hibernate + // + UARTprintf("Entering Hibernate...\n"); + + // + // Prepare Hibernation Module + // + HibernateGPIORetentionEnable(); + HibernateRTCSet(0); + HibernateRTCEnable(); + HibernateRTCMatch0Set(5); + HibernateWakeSet(HIBERNATE_WAKE_PIN | HIBERNATE_WAKE_RTC); + + // + // Store state information to battery backed memory + // since sizeof returns number of bytes we convert to words and force + // a rounding up to next whole word. + // + HibernateDataSet((unsigned long*)&g_sAppState, sizeof(sAppState_t)/4+1); + + // + // Disable the LED for 100 milliseconds to let user know we are + // ready for hibernate and will hibernate on relase of buttons + // + RGBDisable(); + SysCtlDelay(SysCtlClockGet()/3/10); + RGBEnable(); + + // + // Wait for wake button to be released prior to going into hibernate + // + while(g_sAppState.ulButtons & RIGHT_BUTTON) + { + // + //Delay for about 300 clock ticks to allow time for interrupts to + //sense that button is released + // + SysCtlDelay(100); + } + + // + // Disable the LED for power savings and go to hibernate mode + // + RGBDisable(); + HibernateRequest(); + + +} + +//***************************************************************************** +// +// Main function performs init and manages system. +// +// Called automatically after the system and compiler pre-init sequences. +// Performs system init calls, restores state from hibernate if needed and +// then manages the application context duties of the system. +// +//***************************************************************************** +int +main(void) +{ + unsigned long ulStatus; + unsigned long ulResetCause; + long lCommandStatus; + + // + // Enable stacking for interrupt handlers. This allows floating-point + // instructions to be used within interrupt handlers, but at the expense of + // extra stack usage. + // + ROM_FPUEnable(); + ROM_FPUStackingEnable(); + + // + // Set the system clock to run at 40Mhz off PLL with external crystal as + // reference. + // + ROM_SysCtlClockSet(SYSCTL_SYSDIV_5 | SYSCTL_USE_PLL | SYSCTL_XTAL_16MHZ | + SYSCTL_OSC_MAIN); + + // + // Enable the hibernate module + // + SysCtlPeripheralEnable(SYSCTL_PERIPH_HIBERNATE); + + // + // Enable and Initialize the UART. + // + ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA); + ROM_GPIOPinConfigure(GPIO_PA0_U0RX); + ROM_GPIOPinConfigure(GPIO_PA1_U0TX); + ROM_GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_1); + UARTStdioInit(0); + + UARTprintf("Welcome to the Stellaris LM4F120 LaunchPad!\n"); + UARTprintf("Type 'help' for a list of commands\n"); + UARTprintf("> "); + + // + // Determine why system reset occurred and respond accordingly. + // + ulResetCause = SysCtlResetCauseGet(); + SysCtlResetCauseClear(ulResetCause); + if(ulResetCause == SYSCTL_CAUSE_POR) + { + if(HibernateIsActive()) + { + // + // Read the status bits to see what caused the wake. + // + ulStatus = HibernateIntStatus(0); + HibernateIntClear(ulStatus); + + // + // Wake was due to the push button. + // + if(ulStatus & HIBERNATE_INT_PIN_WAKE) + { + UARTprintf("Hibernate Wake Pin Wake Event\n"); + UARTprintf("> "); + + // + // Recover the application state variables from battery backed + // hibernate memory. Set ulMode to normal. + // + HibernateDataGet((unsigned long*) &g_sAppState, + sizeof(sAppState_t) / 4 + 1); + g_sAppState.ulMode = APP_MODE_NORMAL; + } + + // + // Wake was due to RTC match + // + else if(ulStatus & HIBERNATE_INT_RTC_MATCH_0) + { + UARTprintf("Hibernate RTC Wake Event\n"); + UARTprintf("> "); + // + // Recover the application state variables from battery backed + // hibernate memory. Set ulMode to briefly flash the RGB. + // + HibernateDataGet((unsigned long*) &g_sAppState, + sizeof(sAppState_t) / 4 + 1); + g_sAppState.ulMode = APP_MODE_HIB_FLASH; + } + } + + else + { + // + // Reset was do to a cold first time power up. + // + UARTprintf("Power on reset. Hibernate not active.\n"); + UARTprintf("> "); + + g_sAppState.ulMode = APP_MODE_NORMAL; + g_sAppState.fColorWheelPos = 0; + g_sAppState.fIntensity = APP_INTENSITY_DEFAULT; + g_sAppState.ulButtons = 0; + } + } + else + { + // + // External Pin reset or other reset event occured. + // + UARTprintf("External or other reset\n"); + UARTprintf("> "); + + // + // Treat this as a cold power up reset without restore from hibernate. + // + g_sAppState.ulMode = APP_MODE_NORMAL; + g_sAppState.fColorWheelPos = APP_PI; + g_sAppState.fIntensity = APP_INTENSITY_DEFAULT; + g_sAppState.ulButtons = 0; + + // + // colors get a default initialization later when we call AppRainbow. + // + } + + // + // Initialize clocking for the Hibernate module + // + HibernateEnableExpClk(SysCtlClockGet()); + + // + // Initialize the RGB LED. AppRainbow typically only called from interrupt + // context. Safe to call here to force initial color update because + // interrupts are not yet enabled. + // + RGBInit(0); + RGBIntensitySet(g_sAppState.fIntensity); + AppRainbow(1); + RGBEnable(); + + // + // Initialize the buttons + // + ButtonsInit(); + + // + // Initialize the SysTick interrupt to process colors and buttons. + // + SysTickPeriodSet(SysCtlClockGet() / APP_SYSTICKS_PER_SEC); + SysTickEnable(); + SysTickIntEnable(); + IntMasterEnable(); + + // + // spin forever and wait for carriage returns or state changes. + // + while(1) + { + + UARTprintf("\n>"); + + + // + // Peek to see if a full command is ready for processing + // + while(UARTPeek('\r') == -1) + { + // + // millisecond delay. A SysCtlSleep() here would also be OK. + // + SysCtlDelay(SysCtlClockGet() / (1000 / 3)); + + // + // Check for change of mode and enter hibernate if requested. + // all other mode changes handled in interrupt context. + // + if(g_sAppState.ulMode == APP_MODE_HIB) + { + AppHibernateEnter(); + } + } + + // + // a '\r' was detected get the line of text from the user. + // + UARTgets(g_cInput,sizeof(g_cInput)); + + // + // Pass the line from the user to the command processor. + // It will be parsed and valid commands executed. + // + lCommandStatus = CmdLineProcess(g_cInput); + + // + // Handle the case of bad command. + // + if(lCommandStatus == CMDLINE_BAD_CMD) + { + UARTprintf("Bad command!\n"); + } + + // + // Handle the case of too many arguments. + // + else if(lCommandStatus == CMDLINE_TOO_MANY_ARGS) + { + UARTprintf("Too many arguments for command processor!\n"); + } + } +} diff --git a/boards/ek-lm4f120xl/qs-rgb/qs-rgb.ewd b/boards/ek-lm4f120xl/qs-rgb/qs-rgb.ewd new file mode 100644 index 0000000..b8eeac7 --- /dev/null +++ b/boards/ek-lm4f120xl/qs-rgb/qs-rgb.ewd @@ -0,0 +1,614 @@ + + + + 1 + + Debug + + ARM + + 1 + + C-SPY + 2 + + 15 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + ARMSIM_ID + 2 + + 1 + 1 + 1 + + + + + + + + ANGEL_ID + 2 + + 0 + 1 + 1 + + + + + + + + + + + + GDBSERVER_ID + 2 + + 0 + 1 + 1 + + + + + + + + + + + IARROM_ID + 2 + + 0 + 1 + 1 + + + + + + + + + + JLINK_ID + 2 + + 9 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + LMIFTDI_ID + 2 + + 1 + 1 + 1 + + + + + + + + MACRAIGOR_ID + 2 + + 2 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + RDI_ID + 2 + + 1 + 1 + 1 + + + + + + + + + + + + + + + + + THIRDPARTY_ID + 2 + + 0 + 1 + 1 + + + + + + + + + $TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\OSE\OseEpsilonPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\PowerPac\PowerPacRTOS.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin + 0 + + + $EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin + 1 + + + $EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin + 0 + + + $EW_DIR$\common\plugins\Profiling\Profiling.ENU.ewplugin + 1 + + + $EW_DIR$\common\plugins\Stack\Stack.ENU.ewplugin + 1 + + + + diff --git a/boards/ek-lm4f120xl/qs-rgb/qs-rgb.ewp b/boards/ek-lm4f120xl/qs-rgb/qs-rgb.ewp new file mode 100644 index 0000000..88c732a --- /dev/null +++ b/boards/ek-lm4f120xl/qs-rgb/qs-rgb.ewp @@ -0,0 +1,808 @@ + + + + 1 + + Debug + + ARM + + 1 + + General + 3 + + 14 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCARM + 2 + + 19 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AARM + 2 + + 7 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + OBJCOPY + 0 + + 1 + 1 + 1 + + + + + + + + + CUSTOM + 3 + + + + + + + BICOMP + 0 + + + + BUILDACTION + 1 + + + + + + + ILINK + 0 + + 5 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + IARCHIVE + 0 + + 0 + 1 + 1 + + + + + + + BILINK + 0 + + + + + Libraries + + $PROJ_DIR$\..\..\..\driverlib\ewarm-cm4f\Exe\driverlib-cm4f.a + + + $PROJ_DIR$\..\..\..\usblib\ewarm-cm4f\Exe\usblib-cm4f.a + + + + Source + + $PROJ_DIR$\..\drivers\buttons.c + + + $PROJ_DIR$\..\..\..\utils\cmdline.c + + + $PROJ_DIR$\qs-rgb.c + + + $PROJ_DIR$\..\drivers\rgb.c + + + $PROJ_DIR$\rgb_commands.c + + + $PROJ_DIR$\startup_ewarm.c + + + $PROJ_DIR$\..\..\..\utils\uartstdio.c + + + $PROJ_DIR$\..\..\..\utils\ustdlib.c + + + diff --git a/boards/ek-lm4f120xl/qs-rgb/qs-rgb.h b/boards/ek-lm4f120xl/qs-rgb/qs-rgb.h new file mode 100644 index 0000000..c1c840c --- /dev/null +++ b/boards/ek-lm4f120xl/qs-rgb/qs-rgb.h @@ -0,0 +1,90 @@ +//***************************************************************************** +// +// qs-rgb.h - EK-LM4F120XL Stellaris LM4F120 Launchpad Quick Start Application +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + + + +//***************************************************************************** +// +// Globally defined constants +// +//***************************************************************************** +#define APP_SYSTICKS_PER_SEC 32 +#define APP_BUTTON_POLL_DIVIDER 8 +#define APP_NUM_MANUAL_COLORS 7 +#define APP_PI 3.1415926535897932384626433832795f +#define APP_AUTO_COLOR_STEP (APP_PI/ 48.0f) +#define APP_INTENSITY_DEFAULT 0.3f +#define APP_AUTO_MODE_TIMEOUT (APP_SYSTICKS_PER_SEC * 3) +#define APP_HIB_BUTTON_DEBOUNCE (APP_SYSTICKS_PER_SEC * 3) +#define APP_HIB_FLASH_DURATION 2 + +#define APP_MODE_NORMAL 0 +#define APP_MODE_HIB 1 +#define APP_MODE_HIB_FLASH 2 +#define APP_MODE_AUTO 3 +#define APP_MODE_REMOTE 4 + +#define APP_INPUT_BUF_SIZE 128 + +//***************************************************************************** +// +// Structure typedef to make storing application state data to and from the +// hibernate battery backed memory simpler. +// ulColors: [R, G, B] range is 0 to 0xFFFF per color. +// ulMode: The current application mode, system state variable. +// ulButtons: bit map representation of buttons being pressed +// ulManualIndex: Control variable for manual color increment/decrement +// fColorWheelPos: Control variable to govern color mixing +// fIntensity: Control variable to govern overall brightness of LED +// +//***************************************************************************** +typedef struct +{ + unsigned long ulColors[3]; + unsigned long ulMode; + unsigned long ulButtons; + unsigned long ulManualIndex; + unsigned long ulModeTimer; + float fColorWheelPos; + float fIntensity; + +}sAppState_t; + +//***************************************************************************** +// +// Global variables originally defined in qs-rgb.c that are made available to +// functions in other files. +// +//***************************************************************************** +extern volatile sAppState_t g_sAppState; + +//***************************************************************************** +// +// Functions defined in qs-rgb.c that are made available to other files. +// +//***************************************************************************** +extern void AppButtonHandler(void); +extern void AppRainbow(unsigned long ulForceUpdate); +extern void AppHibernateEnter(void); + diff --git a/boards/ek-lm4f120xl/qs-rgb/qs-rgb.icf b/boards/ek-lm4f120xl/qs-rgb/qs-rgb.icf new file mode 100644 index 0000000..e3afffb --- /dev/null +++ b/boards/ek-lm4f120xl/qs-rgb/qs-rgb.icf @@ -0,0 +1,78 @@ +//***************************************************************************** +// +// qs-rgb.icf - Linker configuration file for qs-rgb. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +// +// Define a memory region that covers the entire 4 GB addressible space of the +// processor. +// +define memory mem with size = 4G; + +// +// Define a region for the on-chip flash. +// +define region FLASH = mem:[from 0x00000000 to 0x0003ffff]; + +// +// Define a region for the on-chip SRAM. +// +define region SRAM = mem:[from 0x20000000 to 0x20007fff]; + +// +// Define a block for the heap. The size should be set to something other +// than zero if things in the C library that require the heap are used. +// +define block HEAP with alignment = 8, size = 0x00000000 { }; + +// +// Indicate that the read/write values should be initialized by copying from +// flash. +// +initialize by copy { readwrite }; + +// +// Indicate that the noinit values should be left alone. This includes the +// stack, which if initialized will destroy the return address from the +// initialization code, causing the processor to branch to zero and fault. +// +do not initialize { section .noinit }; + +// +// Place the interrupt vectors at the start of flash. +// +place at start of FLASH { readonly section .intvec }; + +// +// Place the remainder of the read-only items into flash. +// +place in FLASH { readonly }; + +// +// Place the RAM vector table at the start of SRAM. +// +place at start of SRAM { section VTABLE }; + +// +// Place all read/write items into SRAM. +// +place in SRAM { readwrite, block HEAP }; diff --git a/boards/ek-lm4f120xl/qs-rgb/qs-rgb.ld b/boards/ek-lm4f120xl/qs-rgb/qs-rgb.ld new file mode 100644 index 0000000..0654fd7 --- /dev/null +++ b/boards/ek-lm4f120xl/qs-rgb/qs-rgb.ld @@ -0,0 +1,57 @@ +/****************************************************************************** + * + * qs-rgb.ld - Linker configuration file for qs-rgb. + * + * Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. + * Software License Agreement + * + * Texas Instruments (TI) is supplying this software for use solely and + * exclusively on TI's microcontroller products. The software is owned by + * TI and/or its suppliers, and is protected under applicable copyright + * laws. You may not combine this software with "viral" open-source + * software in order to form a larger program. + * + * THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. + * NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT + * NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY + * CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL + * DAMAGES, FOR ANY REASON WHATSOEVER. + * + * This is part of revision 9453 of the EK-LM4F120XL Firmware Package. + * + *****************************************************************************/ + +MEMORY +{ + FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x00040000 + SRAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00008000 +} + +SECTIONS +{ + .text : + { + _text = .; + KEEP(*(.isr_vector)) + *(.text*) + *(.rodata*) + _etext = .; + } > FLASH + + .data : AT(ADDR(.text) + SIZEOF(.text)) + { + _data = .; + *(vtable) + *(.data*) + _edata = .; + } > SRAM + + .bss : + { + _bss = .; + *(.bss*) + *(COMMON) + _ebss = .; + } > SRAM +} diff --git a/boards/ek-lm4f120xl/qs-rgb/qs-rgb.sct b/boards/ek-lm4f120xl/qs-rgb/qs-rgb.sct new file mode 100644 index 0000000..c856a70 --- /dev/null +++ b/boards/ek-lm4f120xl/qs-rgb/qs-rgb.sct @@ -0,0 +1,47 @@ +;****************************************************************************** +; +; qs-rgb.sct - Linker configuration file for qs-rgb. +; +; Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +; Software License Agreement +; +; Texas Instruments (TI) is supplying this software for use solely and +; exclusively on TI's microcontroller products. The software is owned by +; TI and/or its suppliers, and is protected under applicable copyright +; laws. You may not combine this software with "viral" open-source +; software in order to form a larger program. +; +; THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +; NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +; NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +; A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +; CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +; DAMAGES, FOR ANY REASON WHATSOEVER. +; +; This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +; +;****************************************************************************** + +LR_IROM 0x00000000 0x00040000 +{ + ; + ; Specify the Execution Address of the code and the size. + ; + ER_IROM 0x00000000 0x00040000 + { + *.o (RESET, +First) + * (InRoot$$Sections, +RO) + } + + ; + ; Specify the Execution Address of the data area. + ; + RW_IRAM 0x20000000 0x00008000 + { + ; + ; Uncomment the following line in order to use IntRegister(). + ; + ;* (vtable, +First) + * (+RW, +ZI) + } +} diff --git a/boards/ek-lm4f120xl/qs-rgb/qs-rgb.sgxx b/boards/ek-lm4f120xl/qs-rgb/qs-rgb.sgxx new file mode 100644 index 0000000..70b2c71 Binary files /dev/null and b/boards/ek-lm4f120xl/qs-rgb/qs-rgb.sgxx differ diff --git a/boards/ek-lm4f120xl/qs-rgb/qs-rgb.uvopt b/boards/ek-lm4f120xl/qs-rgb/qs-rgb.uvopt new file mode 100644 index 0000000..99e9008 --- /dev/null +++ b/boards/ek-lm4f120xl/qs-rgb/qs-rgb.uvopt @@ -0,0 +1,387 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + + + + 0 + 0 + + + + qs-rgb + 0x4 + ARM-ADS + + 8000000 + + 1 + 1 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\rvmdk\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 255 + + + 0 + Data Sheet + DATASHTS\Luminary\LM4F120H5QR.PDF + + + + SARMCM3.DLL + -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 0 + 1 + 0 + 0 + 4 + + + + + + + + + + + BIN\lmidk-agdi.dll + + + + 0 + lmidk-agdi + -O4614 -S3 -FO29 + + + 0 + DLGTARM + + + + 0 + ARMDBGFLAGS + + + + + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + Source + 1 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\drivers\buttons.c + buttons.c + + + 1 + 2 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\utils\cmdline.c + cmdline.c + + + 1 + 3 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + .\qs-rgb.c + qs-rgb.c + + + 1 + 4 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\drivers\rgb.c + rgb.c + + + 1 + 5 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + .\rgb_commands.c + rgb_commands.c + + + 1 + 6 + 2 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + .\startup_rvmdk.S + startup_rvmdk.S + + + 1 + 7 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\utils\uartstdio.c + uartstdio.c + + + 1 + 8 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\utils\ustdlib.c + ustdlib.c + + + + + Libraries + 1 + 0 + 0 + + 2 + 9 + 4 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\driverlib\rvmdk-cm4f\driverlib-cm4f.lib + driverlib-cm4f.lib + + + 2 + 10 + 4 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\usblib\rvmdk-cm4f\usblib-cm4f.lib + usblib-cm4f.lib + + + + + Documentation + 1 + 0 + 0 + + 3 + 11 + 5 + 0 + 1 + 0 + 0 + 1 + 1 + 0 + .\readme.txt + readme.txt + + 44 + 0 + 1 + + -1 + -1 + + + -1 + -1 + + + 0 + 0 + 729 + 300 + + + + + + + 1 + 0 + + 100 + 0 + + + .\readme.txt + 0 + 1 + 1 + + + + + + diff --git a/boards/ek-lm4f120xl/qs-rgb/qs-rgb.uvproj b/boards/ek-lm4f120xl/qs-rgb/qs-rgb.uvproj new file mode 100644 index 0000000..6791ebd --- /dev/null +++ b/boards/ek-lm4f120xl/qs-rgb/qs-rgb.uvproj @@ -0,0 +1,459 @@ + + + + 1.1 + +
### uVision Project, (C) Keil Software
+ + + + qs-rgb + 0x4 + ARM-ADS + + + LM4F120H5QR + Texas Instruments + IRAM(0x20000000-0x20007FFF) IROM(0-0x3FFFF) CLOCK(8000000) CPUTYPE("Cortex-M4") FPU2 + + "STARTUP\Luminary\Startup.s" ("Luminary Startup Code") + UL2CM3(-O207 -S0 -C0 -FO7 -FD20000000 -FC800 -FN1 -FF0LM4F_256 -FS00 -FL040000) + 5919 + LM4Fxxxx.H + + + + + + + + + + 0 + + + + Luminary\ + Luminary\ + + 0 + 0 + 0 + 0 + 1 + + .\rvmdk\ + qs-rgb + 1 + 0 + 0 + 1 + 1 + .\rvmdk\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + + 1 + 0 + fromelf --bin --output .\rvmdk\qs-rgb.bin .\rvmdk\qs-rgb.axf + + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + + + SARMCM3.DLL + -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + + 1 + 0 + 0 + 0 + 16 + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + + + 1 + 1 + 0 + 1 + 1 + 1 + 0 + 1 + + 0 + 4 + + + + + + + + + + + + + + BIN\lmidk-agdi.dll + + + + + 1 + 0 + 0 + 0 + 1 + 4099 + + BIN\lmidk-agdi.dll + + + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M4" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 2 + 0 + 0 + 8 + 1 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x8000 + + + 1 + 0x0 + 0x40000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x40000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x8000 + + + 0 + 0x0 + 0x0 + + + + + + 0 + 3 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + + + rvmdk PART_LM4F120H5QR TARGET_IS_BLIZZARD_RA2 UART_BUFFERED + + ..;..\..\..; + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x00000000 + 0x20000000 + qs-rgb.sct + + + --entry Reset_Handler + + + + + + + + Source + + + buttons.c + 1 + ..\drivers\buttons.c + + + cmdline.c + 1 + ..\..\..\utils\cmdline.c + + + qs-rgb.c + 1 + .\qs-rgb.c + + + rgb.c + 1 + ..\drivers\rgb.c + + + rgb_commands.c + 1 + .\rgb_commands.c + + + startup_rvmdk.S + 2 + .\startup_rvmdk.S + + + uartstdio.c + 1 + ..\..\..\utils\uartstdio.c + + + ustdlib.c + 1 + ..\..\..\utils\ustdlib.c + + + + + Libraries + + + driverlib-cm4f.lib + 4 + ..\..\..\driverlib\rvmdk-cm4f\driverlib-cm4f.lib + + + usblib-cm4f.lib + 4 + ..\..\..\usblib\rvmdk-cm4f\usblib-cm4f.lib + + + + + Documentation + + + readme.txt + 5 + .\readme.txt + + + + + + + + diff --git a/boards/ek-lm4f120xl/qs-rgb/qs-rgb_ccs.cmd b/boards/ek-lm4f120xl/qs-rgb/qs-rgb_ccs.cmd new file mode 100644 index 0000000..12be512 --- /dev/null +++ b/boards/ek-lm4f120xl/qs-rgb/qs-rgb_ccs.cmd @@ -0,0 +1,70 @@ +/****************************************************************************** + * + * qs-rgb_ccs.cmd - CCS linker configuration file for qs-rgb. + * + * Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. + * Software License Agreement + * + * Texas Instruments (TI) is supplying this software for use solely and + * exclusively on TI's microcontroller products. The software is owned by + * TI and/or its suppliers, and is protected under applicable copyright + * laws. You may not combine this software with "viral" open-source + * software in order to form a larger program. + * + * THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. + * NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT + * NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY + * CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL + * DAMAGES, FOR ANY REASON WHATSOEVER. + * + * This is part of revision 9453 of the EK-LM4F120XL Firmware Package. + * + *****************************************************************************/ + +--retain=g_pfnVectors + +/* The following command line options are set as part of the CCS project. */ +/* If you are building using the command line, or for some reason want to */ +/* define them here, you can uncomment and modify these lines as needed. */ +/* If you are using CCS for building, it is probably better to make any such */ +/* modifications in your CCS project and leave this file alone. */ +/* */ +/* --heap_size=0 */ +/* --stack_size=256 */ +/* --library=rtsv7M3_T_le_eabi.lib */ + +/* The starting address of the application. Normally the interrupt vectors */ +/* must be located at the beginning of the application. */ +#define APP_BASE 0x00000000 +#define RAM_BASE 0x20000000 + +/* System memory map */ + +MEMORY +{ + /* Application stored in and executes from internal flash */ + FLASH (RX) : origin = APP_BASE, length = 0x00040000 + /* Application uses internal RAM for data */ + SRAM (RWX) : origin = 0x20000000, length = 0x00008000 +} + +/* Section allocation in memory */ + +SECTIONS +{ + .intvecs: > APP_BASE + .text : > FLASH + .const : > FLASH + .cinit : > FLASH + .pinit : > FLASH + .init_array : > FLASH + + .vtable : > RAM_BASE + .data : > SRAM + .bss : > SRAM + .sysmem : > SRAM + .stack : > SRAM +} + +__STACK_TOP = __stack + 2048; diff --git a/boards/ek-lm4f120xl/qs-rgb/qs-rgb_sourcerygxx.ld b/boards/ek-lm4f120xl/qs-rgb/qs-rgb_sourcerygxx.ld new file mode 100644 index 0000000..377fcb4 --- /dev/null +++ b/boards/ek-lm4f120xl/qs-rgb/qs-rgb_sourcerygxx.ld @@ -0,0 +1,41 @@ +/****************************************************************************** + * + * qs-rgb_sourcerygxx.ld - Scatter file for Sourcery CodeBench + * + * Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. + * Software License Agreement + * + * Texas Instruments (TI) is supplying this software for use solely and + * exclusively on TI's microcontroller products. The software is owned by + * TI and/or its suppliers, and is protected under applicable copyright + * laws. You may not combine this software with "viral" open-source + * software in order to form a larger program. + * + * THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. + * NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT + * NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY + * CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL + * DAMAGES, FOR ANY REASON WHATSOEVER. + * + * This is part of revision 9453 of the EK-LM4F120XL Firmware Package. + * + *****************************************************************************/ + +/****************************************************************************** + * + * Define the end of the heap space, which determines the beginning of the + * stack space. + * + *****************************************************************************/ +__cs3_heap_end = __cs3_region_end_ram - 2048; + +/****************************************************************************** + * + * Define the interrupt handlers used by the application. + * + *****************************************************************************/ +EXTERN(SysTickIntHandler) +__cs3_isr_systick = SysTickIntHandler; +EXTERN(UARTStdioIntHandler) +__cs3_isr_uart0 = UARTStdioIntHandler; diff --git a/boards/ek-lm4f120xl/qs-rgb/readme.txt b/boards/ek-lm4f120xl/qs-rgb/readme.txt new file mode 100644 index 0000000..2ca6b72 --- /dev/null +++ b/boards/ek-lm4f120xl/qs-rgb/readme.txt @@ -0,0 +1,43 @@ +EK-LM4F120XL Quickstart Application + +A demonstration of the Stellaris LaunchPad (EK-LM4F120XL) capabilities. + +Press and/or hold the left button traverse toward the red end of the +ROYGBIV color spectrum. Press and/or hold the right button to traverse +toward the violet end of the ROYGBIV color spectrum. + +Leave idle for 5 seconds to see a automatically changing color display + +Press and hold both left and right buttons for 3 seconds to enter +hibernation. During hibernation last color on screen will blink on the +LED for 0.5 seconds every 3 seconds. + +Command line UART protocol can also control the system. + +Command 'help' to generate list of commands and helpful information. +Command 'hib' will place the device into hibernation mode. +Command 'rand' will initiate the pseudo-random sequence. +Command 'intensity' followed by a number between 0.0 and 1.0 will scale +the brightness of the LED by that factor. +Command 'rgb' followed by a six character hex value will set the color. For +example 'rgb FF0000' will produce a red color. + +------------------------------------------------------------------------------- + +Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +Software License Agreement + +Texas Instruments (TI) is supplying this software for use solely and +exclusively on TI's microcontroller products. The software is owned by +TI and/or its suppliers, and is protected under applicable copyright +laws. You may not combine this software with "viral" open-source +software in order to form a larger program. + +THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +DAMAGES, FOR ANY REASON WHATSOEVER. + +This is part of revision 9453 of the EK-LM4F120XL Firmware Package. diff --git a/boards/ek-lm4f120xl/qs-rgb/rgb_commands.c b/boards/ek-lm4f120xl/qs-rgb/rgb_commands.c new file mode 100644 index 0000000..d798c34 --- /dev/null +++ b/boards/ek-lm4f120xl/qs-rgb/rgb_commands.c @@ -0,0 +1,165 @@ +//***************************************************************************** +// +// rgb_commands.c - Command line functionality implementation +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +#include "qs-rgb.h" +#include "drivers/rgb.h" +#include "inc/hw_types.h" +#include "utils/ustdlib.h" +#include "utils/uartstdio.h" +#include "utils/cmdline.h" +#include "rgb_commands.h" + +//***************************************************************************** +// +// Table of valid command strings, callback functions and help messages. +// +//***************************************************************************** +tCmdLineEntry g_sCmdTable[] = +{ + {"help", CMD_help, " : Display list of commands" }, + {"hib", CMD_hib, " : Place system into hibernate mode"}, + {"rand", CMD_rand, " : Start automatic color sequencing"}, + {"intensity",CMD_intensity, " : Adjust brightness 0 to 100 percent"}, + {"rgb", CMD_rgb, " : Adjust color 000000-FFFFFF HTML notation"}, + { 0, 0, 0 } +}; + +const int NUM_CMD = sizeof(g_sCmdTable)/sizeof(tCmdLineEntry); + +//***************************************************************************** +// +// Command: help +// +// Print the help strings for all commands. +// +//***************************************************************************** +int +CMD_help (int argc, char **argv) +{ + int index; + + (void)argc; + (void)argv; + + UARTprintf("\n"); + for (index = 0; index < NUM_CMD; index++) + { + UARTprintf("%17s %s\n\n", + g_sCmdTable[index].pcCmd, + g_sCmdTable[index].pcHelp); + } + UARTprintf("\n"); + + return (0); +} + +//***************************************************************************** +// +// Command: hib +// +// Force the device into hibernate mode now. +// +//***************************************************************************** +int +CMD_hib (int argc, char **argv) +{ + (void) argc; + (void) argv; + AppHibernateEnter(); + + return (0); +} + +//***************************************************************************** +// +// Command: rand +// +// Starts the automatic light sequence immediately. +// +//***************************************************************************** +int +CMD_rand (int argc, char **argv) +{ + (void) argc; + (void) argv; + g_sAppState.ulMode = APP_MODE_AUTO; + + return (0); +} + +//***************************************************************************** +// +// Command: intensity +// +// Takes a single argument that is between zero and one hundred. The argument +// must be an integer. This is interpreted as the percentage of maximum +// brightness with which to display the current color. +// +//***************************************************************************** +int +CMD_intensity (int argc, char **argv) +{ + unsigned long ulIntensity; + + + if(argc == 2) + { + ulIntensity = ustrtoul(argv[1], 0, 10); + g_sAppState.fIntensity = ((float) ulIntensity) / 100.0f; + RGBIntensitySet(g_sAppState.fIntensity); + } + + return(0); + +} + +//***************************************************************************** +// +// Command: rgb +// +// Takes a single argument that is a string between 000000 and FFFFFF. +// This is the HTML color code that should be used to set the RGB LED color. +// +// http://www.w3schools.com/html/html_colors.asp +// +//***************************************************************************** +int +CMD_rgb (int argc, char **argv) +{ + unsigned long ulHTMLColor; + + if(argc == 2) + { + ulHTMLColor = ustrtoul(argv[1], 0, 16); + g_sAppState.ulColors[RED] = (ulHTMLColor & 0xFF0000) >> 8; + g_sAppState.ulColors[GREEN] = (ulHTMLColor & 0x00FF00); + g_sAppState.ulColors[BLUE] = (ulHTMLColor & 0x0000FF) << 8; + g_sAppState.ulMode = APP_MODE_REMOTE; + g_sAppState.ulModeTimer = 0; + RGBColorSet(g_sAppState.ulColors); + } + + return (0); + +} diff --git a/boards/ek-lm4f120xl/qs-rgb/rgb_commands.h b/boards/ek-lm4f120xl/qs-rgb/rgb_commands.h new file mode 100644 index 0000000..94b2a31 --- /dev/null +++ b/boards/ek-lm4f120xl/qs-rgb/rgb_commands.h @@ -0,0 +1,51 @@ +//***************************************************************************** +// +// buttons.h - Prototypes for the evaluation board buttons driver. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +#ifndef __RGB_COMMANDS_H__ +#define __RGB_COMMANDS_H__ + +//***************************************************************************** +// +// Defines for the command line argument parser provided as a standard part of +// StellarisWare. qs-rgb application uses the command line parser to extend +// functionality to the serial port. +// +//***************************************************************************** + +#define CMDLINE_MAX_ARGS 3 + +//***************************************************************************** +// +// Declaration for the callback functions that will implement the command line +// functionality. These functions get called by the command line interpreter +// when the corresponding command is typed into the command line. +// +//***************************************************************************** +extern int CMD_help (int argc, char **argv); +extern int CMD_hib (int argc, char **argv); +extern int CMD_rand (int argc, char **argv); +extern int CMD_intensity (int argc, char **argv); +extern int CMD_rgb (int argc, char **argv); + +#endif //__RGB_COMMANDS_H__ diff --git a/boards/ek-lm4f120xl/qs-rgb/rvmdk/qs-rgb.axf b/boards/ek-lm4f120xl/qs-rgb/rvmdk/qs-rgb.axf new file mode 100644 index 0000000..e639d6f Binary files /dev/null and b/boards/ek-lm4f120xl/qs-rgb/rvmdk/qs-rgb.axf differ diff --git a/boards/ek-lm4f120xl/qs-rgb/rvmdk/qs-rgb.bin b/boards/ek-lm4f120xl/qs-rgb/rvmdk/qs-rgb.bin new file mode 100644 index 0000000..790365d Binary files /dev/null and b/boards/ek-lm4f120xl/qs-rgb/rvmdk/qs-rgb.bin differ diff --git a/boards/ek-lm4f120xl/qs-rgb/sourcerygxx/qs-rgb.axf b/boards/ek-lm4f120xl/qs-rgb/sourcerygxx/qs-rgb.axf new file mode 100644 index 0000000..41a2775 Binary files /dev/null and b/boards/ek-lm4f120xl/qs-rgb/sourcerygxx/qs-rgb.axf differ diff --git a/boards/ek-lm4f120xl/qs-rgb/sourcerygxx/qs-rgb.bin b/boards/ek-lm4f120xl/qs-rgb/sourcerygxx/qs-rgb.bin new file mode 100644 index 0000000..cfc7eb4 Binary files /dev/null and b/boards/ek-lm4f120xl/qs-rgb/sourcerygxx/qs-rgb.bin differ diff --git a/boards/ek-lm4f120xl/qs-rgb/startup_ccs.c b/boards/ek-lm4f120xl/qs-rgb/startup_ccs.c new file mode 100644 index 0000000..70c132d --- /dev/null +++ b/boards/ek-lm4f120xl/qs-rgb/startup_ccs.c @@ -0,0 +1,299 @@ +//***************************************************************************** +// +// startup_ccs.c - Startup code for use with TI's Code Composer Studio. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +//***************************************************************************** +// +// Forward declaration of the default fault handlers. +// +//***************************************************************************** +void ResetISR(void); +static void NmiSR(void); +static void FaultISR(void); +static void IntDefaultHandler(void); + +//***************************************************************************** +// +// External declaration for the reset handler that is to be called when the +// processor is started +// +//***************************************************************************** +extern void _c_int00(void); + +//***************************************************************************** +// +// Linker variable that marks the top of the stack. +// +//***************************************************************************** +extern unsigned long __STACK_TOP; + +//***************************************************************************** +// +// External declarations for the interrupt handlers used by the application. +// +//***************************************************************************** +extern void SysTickIntHandler(void); +extern void UARTStdioIntHandler(void); + +//***************************************************************************** +// +// The vector table. Note that the proper constructs must be placed on this to +// ensure that it ends up at physical address 0x0000.0000 or at the start of +// the program if located at a start address other than 0. +// +//***************************************************************************** +#pragma DATA_SECTION(g_pfnVectors, ".intvecs") +void (* const g_pfnVectors[])(void) = +{ + (void (*)(void))((unsigned long)&__STACK_TOP), + // The initial stack pointer + ResetISR, // The reset handler + NmiSR, // The NMI handler + FaultISR, // The hard fault handler + IntDefaultHandler, // The MPU fault handler + IntDefaultHandler, // The bus fault handler + IntDefaultHandler, // The usage fault handler + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // SVCall handler + IntDefaultHandler, // Debug monitor handler + 0, // Reserved + IntDefaultHandler, // The PendSV handler + SysTickIntHandler, // The SysTick handler + IntDefaultHandler, // GPIO Port A + IntDefaultHandler, // GPIO Port B + IntDefaultHandler, // GPIO Port C + IntDefaultHandler, // GPIO Port D + IntDefaultHandler, // GPIO Port E + UARTStdioIntHandler, // UART0 Rx and Tx + IntDefaultHandler, // UART1 Rx and Tx + IntDefaultHandler, // SSI0 Rx and Tx + IntDefaultHandler, // I2C0 Master and Slave + IntDefaultHandler, // PWM Fault + IntDefaultHandler, // PWM Generator 0 + IntDefaultHandler, // PWM Generator 1 + IntDefaultHandler, // PWM Generator 2 + IntDefaultHandler, // Quadrature Encoder 0 + IntDefaultHandler, // ADC Sequence 0 + IntDefaultHandler, // ADC Sequence 1 + IntDefaultHandler, // ADC Sequence 2 + IntDefaultHandler, // ADC Sequence 3 + IntDefaultHandler, // Watchdog timer + IntDefaultHandler, // Timer 0 subtimer A + IntDefaultHandler, // Timer 0 subtimer B + IntDefaultHandler, // Timer 1 subtimer A + IntDefaultHandler, // Timer 1 subtimer B + IntDefaultHandler, // Timer 2 subtimer A + IntDefaultHandler, // Timer 2 subtimer B + IntDefaultHandler, // Analog Comparator 0 + IntDefaultHandler, // Analog Comparator 1 + IntDefaultHandler, // Analog Comparator 2 + IntDefaultHandler, // System Control (PLL, OSC, BO) + IntDefaultHandler, // FLASH Control + IntDefaultHandler, // GPIO Port F + IntDefaultHandler, // GPIO Port G + IntDefaultHandler, // GPIO Port H + IntDefaultHandler, // UART2 Rx and Tx + IntDefaultHandler, // SSI1 Rx and Tx + IntDefaultHandler, // Timer 3 subtimer A + IntDefaultHandler, // Timer 3 subtimer B + IntDefaultHandler, // I2C1 Master and Slave + IntDefaultHandler, // Quadrature Encoder 1 + IntDefaultHandler, // CAN0 + IntDefaultHandler, // CAN1 + IntDefaultHandler, // CAN2 + IntDefaultHandler, // Ethernet + IntDefaultHandler, // Hibernate + IntDefaultHandler, // USB0 + IntDefaultHandler, // PWM Generator 3 + IntDefaultHandler, // uDMA Software Transfer + IntDefaultHandler, // uDMA Error + IntDefaultHandler, // ADC1 Sequence 0 + IntDefaultHandler, // ADC1 Sequence 1 + IntDefaultHandler, // ADC1 Sequence 2 + IntDefaultHandler, // ADC1 Sequence 3 + IntDefaultHandler, // I2S0 + IntDefaultHandler, // External Bus Interface 0 + IntDefaultHandler, // GPIO Port J + IntDefaultHandler, // GPIO Port K + IntDefaultHandler, // GPIO Port L + IntDefaultHandler, // SSI2 Rx and Tx + IntDefaultHandler, // SSI3 Rx and Tx + IntDefaultHandler, // UART3 Rx and Tx + IntDefaultHandler, // UART4 Rx and Tx + IntDefaultHandler, // UART5 Rx and Tx + IntDefaultHandler, // UART6 Rx and Tx + IntDefaultHandler, // UART7 Rx and Tx + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // I2C2 Master and Slave + IntDefaultHandler, // I2C3 Master and Slave + IntDefaultHandler, // Timer 4 subtimer A + IntDefaultHandler, // Timer 4 subtimer B + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // Timer 5 subtimer A + IntDefaultHandler, // Timer 5 subtimer B + IntDefaultHandler, // Wide Timer 0 subtimer A + IntDefaultHandler, // Wide Timer 0 subtimer B + IntDefaultHandler, // Wide Timer 1 subtimer A + IntDefaultHandler, // Wide Timer 1 subtimer B + IntDefaultHandler, // Wide Timer 2 subtimer A + IntDefaultHandler, // Wide Timer 2 subtimer B + IntDefaultHandler, // Wide Timer 3 subtimer A + IntDefaultHandler, // Wide Timer 3 subtimer B + IntDefaultHandler, // Wide Timer 4 subtimer A + IntDefaultHandler, // Wide Timer 4 subtimer B + IntDefaultHandler, // Wide Timer 5 subtimer A + IntDefaultHandler, // Wide Timer 5 subtimer B + IntDefaultHandler, // FPU + IntDefaultHandler, // PECI 0 + IntDefaultHandler, // LPC 0 + IntDefaultHandler, // I2C4 Master and Slave + IntDefaultHandler, // I2C5 Master and Slave + IntDefaultHandler, // GPIO Port M + IntDefaultHandler, // GPIO Port N + IntDefaultHandler, // Quadrature Encoder 2 + IntDefaultHandler, // Fan 0 + 0, // Reserved + IntDefaultHandler, // GPIO Port P (Summary or P0) + IntDefaultHandler, // GPIO Port P1 + IntDefaultHandler, // GPIO Port P2 + IntDefaultHandler, // GPIO Port P3 + IntDefaultHandler, // GPIO Port P4 + IntDefaultHandler, // GPIO Port P5 + IntDefaultHandler, // GPIO Port P6 + IntDefaultHandler, // GPIO Port P7 + IntDefaultHandler, // GPIO Port Q (Summary or Q0) + IntDefaultHandler, // GPIO Port Q1 + IntDefaultHandler, // GPIO Port Q2 + IntDefaultHandler, // GPIO Port Q3 + IntDefaultHandler, // GPIO Port Q4 + IntDefaultHandler, // GPIO Port Q5 + IntDefaultHandler, // GPIO Port Q6 + IntDefaultHandler, // GPIO Port Q7 + IntDefaultHandler, // GPIO Port R + IntDefaultHandler, // GPIO Port S + IntDefaultHandler, // PWM 1 Generator 0 + IntDefaultHandler, // PWM 1 Generator 1 + IntDefaultHandler, // PWM 1 Generator 2 + IntDefaultHandler, // PWM 1 Generator 3 + IntDefaultHandler // PWM 1 Fault +}; + +//***************************************************************************** +// +// This is the code that gets called when the processor first starts execution +// following a reset event. Only the absolutely necessary set is performed, +// after which the application supplied entry() routine is called. Any fancy +// actions (such as making decisions based on the reset cause register, and +// resetting the bits in that register) are left solely in the hands of the +// application. +// +//***************************************************************************** +void +ResetISR(void) +{ + // + // Jump to the CCS C initialization routine. This will enable the + // floating-point unit as well, so that does not need to be done here. + // + __asm(" .global _c_int00\n" + " b.w _c_int00"); +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a NMI. This +// simply enters an infinite loop, preserving the system state for examination +// by a debugger. +// +//***************************************************************************** +static void +NmiSR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a fault +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +FaultISR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives an unexpected +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +IntDefaultHandler(void) +{ + // + // Go into an infinite loop. + // + while(1) + { + } +} diff --git a/boards/ek-lm4f120xl/qs-rgb/startup_ewarm.c b/boards/ek-lm4f120xl/qs-rgb/startup_ewarm.c new file mode 100644 index 0000000..110a189 --- /dev/null +++ b/boards/ek-lm4f120xl/qs-rgb/startup_ewarm.c @@ -0,0 +1,333 @@ +//***************************************************************************** +// +// startup_ewarm.c - Startup code for use with IAR's Embedded Workbench, +// version 5. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +#include "inc/hw_nvic.h" +#include "inc/hw_types.h" + +//***************************************************************************** +// +// Enable the IAR extensions for this source file. +// +//***************************************************************************** +#pragma language=extended + +//***************************************************************************** +// +// Forward declaration of the default fault handlers. +// +//***************************************************************************** +void ResetISR(void); +static void NmiSR(void); +static void FaultISR(void); +static void IntDefaultHandler(void); + +//***************************************************************************** +// +// External declarations for the interrupt handlers used by the application. +// +//***************************************************************************** +extern void SysTickIntHandler(void); +extern void UARTStdioIntHandler(void); + +//***************************************************************************** +// +// The entry point for the application startup code. +// +//***************************************************************************** +extern void __iar_program_start(void); + +//***************************************************************************** +// +// Reserve space for the system stack. +// +//***************************************************************************** +static unsigned long pulStack[512] @ ".noinit"; + +//***************************************************************************** +// +// A union that describes the entries of the vector table. The union is needed +// since the first entry is the stack pointer and the remainder are function +// pointers. +// +//***************************************************************************** +typedef union +{ + void (*pfnHandler)(void); + unsigned long ulPtr; +} +uVectorEntry; + +//***************************************************************************** +// +// The vector table. Note that the proper constructs must be placed on this to +// ensure that it ends up at physical address 0x0000.0000. +// +//***************************************************************************** +__root const uVectorEntry __vector_table[] @ ".intvec" = +{ + { .ulPtr = (unsigned long)pulStack + sizeof(pulStack) }, + // The initial stack pointer + ResetISR, // The reset handler + NmiSR, // The NMI handler + FaultISR, // The hard fault handler + IntDefaultHandler, // The MPU fault handler + IntDefaultHandler, // The bus fault handler + IntDefaultHandler, // The usage fault handler + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // SVCall handler + IntDefaultHandler, // Debug monitor handler + 0, // Reserved + IntDefaultHandler, // The PendSV handler + SysTickIntHandler, // The SysTick handler + IntDefaultHandler, // GPIO Port A + IntDefaultHandler, // GPIO Port B + IntDefaultHandler, // GPIO Port C + IntDefaultHandler, // GPIO Port D + IntDefaultHandler, // GPIO Port E + UARTStdioIntHandler, // UART0 Rx and Tx + IntDefaultHandler, // UART1 Rx and Tx + IntDefaultHandler, // SSI0 Rx and Tx + IntDefaultHandler, // I2C0 Master and Slave + IntDefaultHandler, // PWM Fault + IntDefaultHandler, // PWM Generator 0 + IntDefaultHandler, // PWM Generator 1 + IntDefaultHandler, // PWM Generator 2 + IntDefaultHandler, // Quadrature Encoder 0 + IntDefaultHandler, // ADC Sequence 0 + IntDefaultHandler, // ADC Sequence 1 + IntDefaultHandler, // ADC Sequence 2 + IntDefaultHandler, // ADC Sequence 3 + IntDefaultHandler, // Watchdog timer + IntDefaultHandler, // Timer 0 subtimer A + IntDefaultHandler, // Timer 0 subtimer B + IntDefaultHandler, // Timer 1 subtimer A + IntDefaultHandler, // Timer 1 subtimer B + IntDefaultHandler, // Timer 2 subtimer A + IntDefaultHandler, // Timer 2 subtimer B + IntDefaultHandler, // Analog Comparator 0 + IntDefaultHandler, // Analog Comparator 1 + IntDefaultHandler, // Analog Comparator 2 + IntDefaultHandler, // System Control (PLL, OSC, BO) + IntDefaultHandler, // FLASH Control + IntDefaultHandler, // GPIO Port F + IntDefaultHandler, // GPIO Port G + IntDefaultHandler, // GPIO Port H + IntDefaultHandler, // UART2 Rx and Tx + IntDefaultHandler, // SSI1 Rx and Tx + IntDefaultHandler, // Timer 3 subtimer A + IntDefaultHandler, // Timer 3 subtimer B + IntDefaultHandler, // I2C1 Master and Slave + IntDefaultHandler, // Quadrature Encoder 1 + IntDefaultHandler, // CAN0 + IntDefaultHandler, // CAN1 + IntDefaultHandler, // CAN2 + IntDefaultHandler, // Ethernet + IntDefaultHandler, // Hibernate + IntDefaultHandler, // USB0 + IntDefaultHandler, // PWM Generator 3 + IntDefaultHandler, // uDMA Software Transfer + IntDefaultHandler, // uDMA Error + IntDefaultHandler, // ADC1 Sequence 0 + IntDefaultHandler, // ADC1 Sequence 1 + IntDefaultHandler, // ADC1 Sequence 2 + IntDefaultHandler, // ADC1 Sequence 3 + IntDefaultHandler, // I2S0 + IntDefaultHandler, // External Bus Interface 0 + IntDefaultHandler, // GPIO Port J + IntDefaultHandler, // GPIO Port K + IntDefaultHandler, // GPIO Port L + IntDefaultHandler, // SSI2 Rx and Tx + IntDefaultHandler, // SSI3 Rx and Tx + IntDefaultHandler, // UART3 Rx and Tx + IntDefaultHandler, // UART4 Rx and Tx + IntDefaultHandler, // UART5 Rx and Tx + IntDefaultHandler, // UART6 Rx and Tx + IntDefaultHandler, // UART7 Rx and Tx + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // I2C2 Master and Slave + IntDefaultHandler, // I2C3 Master and Slave + IntDefaultHandler, // Timer 4 subtimer A + IntDefaultHandler, // Timer 4 subtimer B + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // Timer 5 subtimer A + IntDefaultHandler, // Timer 5 subtimer B + IntDefaultHandler, // Wide Timer 0 subtimer A + IntDefaultHandler, // Wide Timer 0 subtimer B + IntDefaultHandler, // Wide Timer 1 subtimer A + IntDefaultHandler, // Wide Timer 1 subtimer B + IntDefaultHandler, // Wide Timer 2 subtimer A + IntDefaultHandler, // Wide Timer 2 subtimer B + IntDefaultHandler, // Wide Timer 3 subtimer A + IntDefaultHandler, // Wide Timer 3 subtimer B + IntDefaultHandler, // Wide Timer 4 subtimer A + IntDefaultHandler, // Wide Timer 4 subtimer B + IntDefaultHandler, // Wide Timer 5 subtimer A + IntDefaultHandler, // Wide Timer 5 subtimer B + IntDefaultHandler, // FPU + IntDefaultHandler, // PECI 0 + IntDefaultHandler, // LPC 0 + IntDefaultHandler, // I2C4 Master and Slave + IntDefaultHandler, // I2C5 Master and Slave + IntDefaultHandler, // GPIO Port M + IntDefaultHandler, // GPIO Port N + IntDefaultHandler, // Quadrature Encoder 2 + IntDefaultHandler, // Fan 0 + 0, // Reserved + IntDefaultHandler, // GPIO Port P (Summary or P0) + IntDefaultHandler, // GPIO Port P1 + IntDefaultHandler, // GPIO Port P2 + IntDefaultHandler, // GPIO Port P3 + IntDefaultHandler, // GPIO Port P4 + IntDefaultHandler, // GPIO Port P5 + IntDefaultHandler, // GPIO Port P6 + IntDefaultHandler, // GPIO Port P7 + IntDefaultHandler, // GPIO Port Q (Summary or Q0) + IntDefaultHandler, // GPIO Port Q1 + IntDefaultHandler, // GPIO Port Q2 + IntDefaultHandler, // GPIO Port Q3 + IntDefaultHandler, // GPIO Port Q4 + IntDefaultHandler, // GPIO Port Q5 + IntDefaultHandler, // GPIO Port Q6 + IntDefaultHandler, // GPIO Port Q7 + IntDefaultHandler, // GPIO Port R + IntDefaultHandler, // GPIO Port S + IntDefaultHandler, // PWM 1 Generator 0 + IntDefaultHandler, // PWM 1 Generator 1 + IntDefaultHandler, // PWM 1 Generator 2 + IntDefaultHandler, // PWM 1 Generator 3 + IntDefaultHandler // PWM 1 Fault +}; + +//***************************************************************************** +// +// This is the code that gets called when the processor first starts execution +// following a reset event. Only the absolutely necessary set is performed, +// after which the application supplied entry() routine is called. Any fancy +// actions (such as making decisions based on the reset cause register, and +// resetting the bits in that register) are left solely in the hands of the +// application. +// +//***************************************************************************** +void +ResetISR(void) +{ + // + // Enable the floating-point unit. This must be done here to handle the + // case where main() uses floating-point and the function prologue saves + // floating-point registers (which will fault if floating-point is not + // enabled). Any configuration of the floating-point unit using DriverLib + // APIs must be done here prior to the floating-point unit being enabled. + // + // Note that this does not use DriverLib since it might not be included in + // this project. + // + HWREG(NVIC_CPAC) = ((HWREG(NVIC_CPAC) & + ~(NVIC_CPAC_CP10_M | NVIC_CPAC_CP11_M)) | + NVIC_CPAC_CP10_FULL | NVIC_CPAC_CP11_FULL); + + // + // Call the application's entry point. + // + __iar_program_start(); +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a NMI. This +// simply enters an infinite loop, preserving the system state for examination +// by a debugger. +// +//***************************************************************************** +static void +NmiSR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a fault +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +FaultISR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives an unexpected +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +IntDefaultHandler(void) +{ + // + // Go into an infinite loop. + // + while(1) + { + } +} diff --git a/boards/ek-lm4f120xl/qs-rgb/startup_gcc.c b/boards/ek-lm4f120xl/qs-rgb/startup_gcc.c new file mode 100644 index 0000000..fbd9f00 --- /dev/null +++ b/boards/ek-lm4f120xl/qs-rgb/startup_gcc.c @@ -0,0 +1,349 @@ +//***************************************************************************** +// +// startup_gcc.c - Startup code for use with GNU tools. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +#include "inc/hw_nvic.h" +#include "inc/hw_types.h" + +//***************************************************************************** +// +// Forward declaration of the default fault handlers. +// +//***************************************************************************** +void ResetISR(void); +static void NmiSR(void); +static void FaultISR(void); +static void IntDefaultHandler(void); + +//***************************************************************************** +// +// External declarations for the interrupt handlers used by the application. +// +//***************************************************************************** +extern void SysTickIntHandler(void); +extern void UARTStdioIntHandler(void); + +//***************************************************************************** +// +// The entry point for the application. +// +//***************************************************************************** +extern int main(void); + +//***************************************************************************** +// +// Reserve space for the system stack. +// +//***************************************************************************** +static unsigned long pulStack[512]; + +//***************************************************************************** +// +// The vector table. Note that the proper constructs must be placed on this to +// ensure that it ends up at physical address 0x0000.0000. +// +//***************************************************************************** +__attribute__ ((section(".isr_vector"))) +void (* const g_pfnVectors[])(void) = +{ + (void (*)(void))((unsigned long)pulStack + sizeof(pulStack)), + // The initial stack pointer + ResetISR, // The reset handler + NmiSR, // The NMI handler + FaultISR, // The hard fault handler + IntDefaultHandler, // The MPU fault handler + IntDefaultHandler, // The bus fault handler + IntDefaultHandler, // The usage fault handler + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // SVCall handler + IntDefaultHandler, // Debug monitor handler + 0, // Reserved + IntDefaultHandler, // The PendSV handler + SysTickIntHandler, // The SysTick handler + IntDefaultHandler, // GPIO Port A + IntDefaultHandler, // GPIO Port B + IntDefaultHandler, // GPIO Port C + IntDefaultHandler, // GPIO Port D + IntDefaultHandler, // GPIO Port E + UARTStdioIntHandler, // UART0 Rx and Tx + IntDefaultHandler, // UART1 Rx and Tx + IntDefaultHandler, // SSI0 Rx and Tx + IntDefaultHandler, // I2C0 Master and Slave + IntDefaultHandler, // PWM Fault + IntDefaultHandler, // PWM Generator 0 + IntDefaultHandler, // PWM Generator 1 + IntDefaultHandler, // PWM Generator 2 + IntDefaultHandler, // Quadrature Encoder 0 + IntDefaultHandler, // ADC Sequence 0 + IntDefaultHandler, // ADC Sequence 1 + IntDefaultHandler, // ADC Sequence 2 + IntDefaultHandler, // ADC Sequence 3 + IntDefaultHandler, // Watchdog timer + IntDefaultHandler, // Timer 0 subtimer A + IntDefaultHandler, // Timer 0 subtimer B + IntDefaultHandler, // Timer 1 subtimer A + IntDefaultHandler, // Timer 1 subtimer B + IntDefaultHandler, // Timer 2 subtimer A + IntDefaultHandler, // Timer 2 subtimer B + IntDefaultHandler, // Analog Comparator 0 + IntDefaultHandler, // Analog Comparator 1 + IntDefaultHandler, // Analog Comparator 2 + IntDefaultHandler, // System Control (PLL, OSC, BO) + IntDefaultHandler, // FLASH Control + IntDefaultHandler, // GPIO Port F + IntDefaultHandler, // GPIO Port G + IntDefaultHandler, // GPIO Port H + IntDefaultHandler, // UART2 Rx and Tx + IntDefaultHandler, // SSI1 Rx and Tx + IntDefaultHandler, // Timer 3 subtimer A + IntDefaultHandler, // Timer 3 subtimer B + IntDefaultHandler, // I2C1 Master and Slave + IntDefaultHandler, // Quadrature Encoder 1 + IntDefaultHandler, // CAN0 + IntDefaultHandler, // CAN1 + IntDefaultHandler, // CAN2 + IntDefaultHandler, // Ethernet + IntDefaultHandler, // Hibernate + IntDefaultHandler, // USB0 + IntDefaultHandler, // PWM Generator 3 + IntDefaultHandler, // uDMA Software Transfer + IntDefaultHandler, // uDMA Error + IntDefaultHandler, // ADC1 Sequence 0 + IntDefaultHandler, // ADC1 Sequence 1 + IntDefaultHandler, // ADC1 Sequence 2 + IntDefaultHandler, // ADC1 Sequence 3 + IntDefaultHandler, // I2S0 + IntDefaultHandler, // External Bus Interface 0 + IntDefaultHandler, // GPIO Port J + IntDefaultHandler, // GPIO Port K + IntDefaultHandler, // GPIO Port L + IntDefaultHandler, // SSI2 Rx and Tx + IntDefaultHandler, // SSI3 Rx and Tx + IntDefaultHandler, // UART3 Rx and Tx + IntDefaultHandler, // UART4 Rx and Tx + IntDefaultHandler, // UART5 Rx and Tx + IntDefaultHandler, // UART6 Rx and Tx + IntDefaultHandler, // UART7 Rx and Tx + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // I2C2 Master and Slave + IntDefaultHandler, // I2C3 Master and Slave + IntDefaultHandler, // Timer 4 subtimer A + IntDefaultHandler, // Timer 4 subtimer B + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // Timer 5 subtimer A + IntDefaultHandler, // Timer 5 subtimer B + IntDefaultHandler, // Wide Timer 0 subtimer A + IntDefaultHandler, // Wide Timer 0 subtimer B + IntDefaultHandler, // Wide Timer 1 subtimer A + IntDefaultHandler, // Wide Timer 1 subtimer B + IntDefaultHandler, // Wide Timer 2 subtimer A + IntDefaultHandler, // Wide Timer 2 subtimer B + IntDefaultHandler, // Wide Timer 3 subtimer A + IntDefaultHandler, // Wide Timer 3 subtimer B + IntDefaultHandler, // Wide Timer 4 subtimer A + IntDefaultHandler, // Wide Timer 4 subtimer B + IntDefaultHandler, // Wide Timer 5 subtimer A + IntDefaultHandler, // Wide Timer 5 subtimer B + IntDefaultHandler, // FPU + IntDefaultHandler, // PECI 0 + IntDefaultHandler, // LPC 0 + IntDefaultHandler, // I2C4 Master and Slave + IntDefaultHandler, // I2C5 Master and Slave + IntDefaultHandler, // GPIO Port M + IntDefaultHandler, // GPIO Port N + IntDefaultHandler, // Quadrature Encoder 2 + IntDefaultHandler, // Fan 0 + 0, // Reserved + IntDefaultHandler, // GPIO Port P (Summary or P0) + IntDefaultHandler, // GPIO Port P1 + IntDefaultHandler, // GPIO Port P2 + IntDefaultHandler, // GPIO Port P3 + IntDefaultHandler, // GPIO Port P4 + IntDefaultHandler, // GPIO Port P5 + IntDefaultHandler, // GPIO Port P6 + IntDefaultHandler, // GPIO Port P7 + IntDefaultHandler, // GPIO Port Q (Summary or Q0) + IntDefaultHandler, // GPIO Port Q1 + IntDefaultHandler, // GPIO Port Q2 + IntDefaultHandler, // GPIO Port Q3 + IntDefaultHandler, // GPIO Port Q4 + IntDefaultHandler, // GPIO Port Q5 + IntDefaultHandler, // GPIO Port Q6 + IntDefaultHandler, // GPIO Port Q7 + IntDefaultHandler, // GPIO Port R + IntDefaultHandler, // GPIO Port S + IntDefaultHandler, // PWM 1 Generator 0 + IntDefaultHandler, // PWM 1 Generator 1 + IntDefaultHandler, // PWM 1 Generator 2 + IntDefaultHandler, // PWM 1 Generator 3 + IntDefaultHandler // PWM 1 Fault +}; + +//***************************************************************************** +// +// The following are constructs created by the linker, indicating where the +// the "data" and "bss" segments reside in memory. The initializers for the +// for the "data" segment resides immediately following the "text" segment. +// +//***************************************************************************** +extern unsigned long _etext; +extern unsigned long _data; +extern unsigned long _edata; +extern unsigned long _bss; +extern unsigned long _ebss; + +//***************************************************************************** +// +// This is the code that gets called when the processor first starts execution +// following a reset event. Only the absolutely necessary set is performed, +// after which the application supplied entry() routine is called. Any fancy +// actions (such as making decisions based on the reset cause register, and +// resetting the bits in that register) are left solely in the hands of the +// application. +// +//***************************************************************************** +void +ResetISR(void) +{ + unsigned long *pulSrc, *pulDest; + + // + // Copy the data segment initializers from flash to SRAM. + // + pulSrc = &_etext; + for(pulDest = &_data; pulDest < &_edata; ) + { + *pulDest++ = *pulSrc++; + } + + // + // Zero fill the bss segment. + // + __asm(" ldr r0, =_bss\n" + " ldr r1, =_ebss\n" + " mov r2, #0\n" + " .thumb_func\n" + "zero_loop:\n" + " cmp r0, r1\n" + " it lt\n" + " strlt r2, [r0], #4\n" + " blt zero_loop"); + + // + // Enable the floating-point unit. This must be done here to handle the + // case where main() uses floating-point and the function prologue saves + // floating-point registers (which will fault if floating-point is not + // enabled). Any configuration of the floating-point unit using DriverLib + // APIs must be done here prior to the floating-point unit being enabled. + // + // Note that this does not use DriverLib since it might not be included in + // this project. + // + HWREG(NVIC_CPAC) = ((HWREG(NVIC_CPAC) & + ~(NVIC_CPAC_CP10_M | NVIC_CPAC_CP11_M)) | + NVIC_CPAC_CP10_FULL | NVIC_CPAC_CP11_FULL); + + // + // Call the application's entry point. + // + main(); +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a NMI. This +// simply enters an infinite loop, preserving the system state for examination +// by a debugger. +// +//***************************************************************************** +static void +NmiSR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a fault +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +FaultISR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives an unexpected +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +IntDefaultHandler(void) +{ + // + // Go into an infinite loop. + // + while(1) + { + } +} diff --git a/boards/ek-lm4f120xl/qs-rgb/startup_rvmdk.S b/boards/ek-lm4f120xl/qs-rgb/startup_rvmdk.S new file mode 100644 index 0000000..da49736 --- /dev/null +++ b/boards/ek-lm4f120xl/qs-rgb/startup_rvmdk.S @@ -0,0 +1,359 @@ +; <<< Use Configuration Wizard in Context Menu >>> +;****************************************************************************** +; +; startup_rvmdk.S - Startup code for use with Keil's uVision. +; +; Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +; Software License Agreement +; +; Texas Instruments (TI) is supplying this software for use solely and +; exclusively on TI's microcontroller products. The software is owned by +; TI and/or its suppliers, and is protected under applicable copyright +; laws. You may not combine this software with "viral" open-source +; software in order to form a larger program. +; +; THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +; NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +; NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +; A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +; CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +; DAMAGES, FOR ANY REASON WHATSOEVER. +; +; This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +; +;****************************************************************************** + +;****************************************************************************** +; +; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +; +;****************************************************************************** +Stack EQU 0x00000800 + +;****************************************************************************** +; +; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> +; +;****************************************************************************** +Heap EQU 0x00000000 + +;****************************************************************************** +; +; Allocate space for the stack. +; +;****************************************************************************** + AREA STACK, NOINIT, READWRITE, ALIGN=3 +StackMem + SPACE Stack +__initial_sp + +;****************************************************************************** +; +; Allocate space for the heap. +; +;****************************************************************************** + AREA HEAP, NOINIT, READWRITE, ALIGN=3 +__heap_base +HeapMem + SPACE Heap +__heap_limit + +;****************************************************************************** +; +; Indicate that the code in this file preserves 8-byte alignment of the stack. +; +;****************************************************************************** + PRESERVE8 + +;****************************************************************************** +; +; Place code into the reset code section. +; +;****************************************************************************** + AREA RESET, CODE, READONLY + THUMB + +;****************************************************************************** +; +; External declarations for the interrupt handlers used by the application. +; +;****************************************************************************** + EXTERN SysTickIntHandler + EXTERN UARTStdioIntHandler + +;****************************************************************************** +; +; The vector table. +; +;****************************************************************************** + EXPORT __Vectors +__Vectors + DCD StackMem + Stack ; Top of Stack + DCD Reset_Handler ; Reset Handler + DCD NmiSR ; NMI Handler + DCD FaultISR ; Hard Fault Handler + DCD IntDefaultHandler ; The MPU fault handler + DCD IntDefaultHandler ; The bus fault handler + DCD IntDefaultHandler ; The usage fault handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD IntDefaultHandler ; SVCall handler + DCD IntDefaultHandler ; Debug monitor handler + DCD 0 ; Reserved + DCD IntDefaultHandler ; The PendSV handler + DCD SysTickIntHandler ; The SysTick handler + DCD IntDefaultHandler ; GPIO Port A + DCD IntDefaultHandler ; GPIO Port B + DCD IntDefaultHandler ; GPIO Port C + DCD IntDefaultHandler ; GPIO Port D + DCD IntDefaultHandler ; GPIO Port E + DCD UARTStdioIntHandler ; UART0 Rx and Tx + DCD IntDefaultHandler ; UART1 Rx and Tx + DCD IntDefaultHandler ; SSI0 Rx and Tx + DCD IntDefaultHandler ; I2C0 Master and Slave + DCD IntDefaultHandler ; PWM Fault + DCD IntDefaultHandler ; PWM Generator 0 + DCD IntDefaultHandler ; PWM Generator 1 + DCD IntDefaultHandler ; PWM Generator 2 + DCD IntDefaultHandler ; Quadrature Encoder 0 + DCD IntDefaultHandler ; ADC Sequence 0 + DCD IntDefaultHandler ; ADC Sequence 1 + DCD IntDefaultHandler ; ADC Sequence 2 + DCD IntDefaultHandler ; ADC Sequence 3 + DCD IntDefaultHandler ; Watchdog timer + DCD IntDefaultHandler ; Timer 0 subtimer A + DCD IntDefaultHandler ; Timer 0 subtimer B + DCD IntDefaultHandler ; Timer 1 subtimer A + DCD IntDefaultHandler ; Timer 1 subtimer B + DCD IntDefaultHandler ; Timer 2 subtimer A + DCD IntDefaultHandler ; Timer 2 subtimer B + DCD IntDefaultHandler ; Analog Comparator 0 + DCD IntDefaultHandler ; Analog Comparator 1 + DCD IntDefaultHandler ; Analog Comparator 2 + DCD IntDefaultHandler ; System Control (PLL, OSC, BO) + DCD IntDefaultHandler ; FLASH Control + DCD IntDefaultHandler ; GPIO Port F + DCD IntDefaultHandler ; GPIO Port G + DCD IntDefaultHandler ; GPIO Port H + DCD IntDefaultHandler ; UART2 Rx and Tx + DCD IntDefaultHandler ; SSI1 Rx and Tx + DCD IntDefaultHandler ; Timer 3 subtimer A + DCD IntDefaultHandler ; Timer 3 subtimer B + DCD IntDefaultHandler ; I2C1 Master and Slave + DCD IntDefaultHandler ; Quadrature Encoder 1 + DCD IntDefaultHandler ; CAN0 + DCD IntDefaultHandler ; CAN1 + DCD IntDefaultHandler ; CAN2 + DCD IntDefaultHandler ; Ethernet + DCD IntDefaultHandler ; Hibernate + DCD IntDefaultHandler ; USB0 + DCD IntDefaultHandler ; PWM Generator 3 + DCD IntDefaultHandler ; uDMA Software Transfer + DCD IntDefaultHandler ; uDMA Error + DCD IntDefaultHandler ; ADC1 Sequence 0 + DCD IntDefaultHandler ; ADC1 Sequence 1 + DCD IntDefaultHandler ; ADC1 Sequence 2 + DCD IntDefaultHandler ; ADC1 Sequence 3 + DCD IntDefaultHandler ; I2S0 + DCD IntDefaultHandler ; External Bus Interface 0 + DCD IntDefaultHandler ; GPIO Port J + DCD IntDefaultHandler ; GPIO Port K + DCD IntDefaultHandler ; GPIO Port L + DCD IntDefaultHandler ; SSI2 Rx and Tx + DCD IntDefaultHandler ; SSI3 Rx and Tx + DCD IntDefaultHandler ; UART3 Rx and Tx + DCD IntDefaultHandler ; UART4 Rx and Tx + DCD IntDefaultHandler ; UART5 Rx and Tx + DCD IntDefaultHandler ; UART6 Rx and Tx + DCD IntDefaultHandler ; UART7 Rx and Tx + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD IntDefaultHandler ; I2C2 Master and Slave + DCD IntDefaultHandler ; I2C3 Master and Slave + DCD IntDefaultHandler ; Timer 4 subtimer A + DCD IntDefaultHandler ; Timer 4 subtimer B + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD IntDefaultHandler ; Timer 5 subtimer A + DCD IntDefaultHandler ; Timer 5 subtimer B + DCD IntDefaultHandler ; Wide Timer 0 subtimer A + DCD IntDefaultHandler ; Wide Timer 0 subtimer B + DCD IntDefaultHandler ; Wide Timer 1 subtimer A + DCD IntDefaultHandler ; Wide Timer 1 subtimer B + DCD IntDefaultHandler ; Wide Timer 2 subtimer A + DCD IntDefaultHandler ; Wide Timer 2 subtimer B + DCD IntDefaultHandler ; Wide Timer 3 subtimer A + DCD IntDefaultHandler ; Wide Timer 3 subtimer B + DCD IntDefaultHandler ; Wide Timer 4 subtimer A + DCD IntDefaultHandler ; Wide Timer 4 subtimer B + DCD IntDefaultHandler ; Wide Timer 5 subtimer A + DCD IntDefaultHandler ; Wide Timer 5 subtimer B + DCD IntDefaultHandler ; FPU + DCD IntDefaultHandler ; PECI 0 + DCD IntDefaultHandler ; LPC 0 + DCD IntDefaultHandler ; I2C4 Master and Slave + DCD IntDefaultHandler ; I2C5 Master and Slave + DCD IntDefaultHandler ; GPIO Port M + DCD IntDefaultHandler ; GPIO Port N + DCD IntDefaultHandler ; Quadrature Encoder 2 + DCD IntDefaultHandler ; Fan 0 + DCD 0 ; Reserved + DCD IntDefaultHandler ; GPIO Port P (Summary or P0) + DCD IntDefaultHandler ; GPIO Port P1 + DCD IntDefaultHandler ; GPIO Port P2 + DCD IntDefaultHandler ; GPIO Port P3 + DCD IntDefaultHandler ; GPIO Port P4 + DCD IntDefaultHandler ; GPIO Port P5 + DCD IntDefaultHandler ; GPIO Port P6 + DCD IntDefaultHandler ; GPIO Port P7 + DCD IntDefaultHandler ; GPIO Port Q (Summary or Q0) + DCD IntDefaultHandler ; GPIO Port Q1 + DCD IntDefaultHandler ; GPIO Port Q2 + DCD IntDefaultHandler ; GPIO Port Q3 + DCD IntDefaultHandler ; GPIO Port Q4 + DCD IntDefaultHandler ; GPIO Port Q5 + DCD IntDefaultHandler ; GPIO Port Q6 + DCD IntDefaultHandler ; GPIO Port Q7 + DCD IntDefaultHandler ; GPIO Port R + DCD IntDefaultHandler ; GPIO Port S + DCD IntDefaultHandler ; PWM 1 Generator 0 + DCD IntDefaultHandler ; PWM 1 Generator 1 + DCD IntDefaultHandler ; PWM 1 Generator 2 + DCD IntDefaultHandler ; PWM 1 Generator 3 + DCD IntDefaultHandler ; PWM 1 Fault + +;****************************************************************************** +; +; This is the code that gets called when the processor first starts execution +; following a reset event. +; +;****************************************************************************** + EXPORT Reset_Handler +Reset_Handler + ; + ; Enable the floating-point unit. This must be done here to handle the + ; case where main() uses floating-point and the function prologue saves + ; floating-point registers (which will fault if floating-point is not + ; enabled). Any configuration of the floating-point unit using + ; DriverLib APIs must be done here prior to the floating-point unit + ; being enabled. + ; + ; Note that this does not use DriverLib since it might not be included + ; in this project. + ; + MOVW R0, #0xED88 + MOVT R0, #0xE000 + LDR R1, [R0] + ORR R1, #0x00F00000 + STR R1, [R0] + + ; + ; Call the C library enty point that handles startup. This will copy + ; the .data section initializers from flash to SRAM and zero fill the + ; .bss section. + ; + IMPORT __main + B __main + +;****************************************************************************** +; +; This is the code that gets called when the processor receives a NMI. This +; simply enters an infinite loop, preserving the system state for examination +; by a debugger. +; +;****************************************************************************** +NmiSR + B NmiSR + +;****************************************************************************** +; +; This is the code that gets called when the processor receives a fault +; interrupt. This simply enters an infinite loop, preserving the system state +; for examination by a debugger. +; +;****************************************************************************** +FaultISR + B FaultISR + +;****************************************************************************** +; +; This is the code that gets called when the processor receives an unexpected +; interrupt. This simply enters an infinite loop, preserving the system state +; for examination by a debugger. +; +;****************************************************************************** +IntDefaultHandler + B IntDefaultHandler + +;****************************************************************************** +; +; Make sure the end of this section is aligned. +; +;****************************************************************************** + ALIGN + +;****************************************************************************** +; +; Some code in the normal code section for initializing the heap and stack. +; +;****************************************************************************** + AREA |.text|, CODE, READONLY + +;****************************************************************************** +; +; The function expected of the C library startup code for defining the stack +; and heap memory locations. For the C library version of the startup code, +; provide this function so that the C library initialization code can find out +; the location of the stack and heap. +; +;****************************************************************************** + IF :DEF: __MICROLIB + EXPORT __initial_sp + EXPORT __heap_base + EXPORT __heap_limit + ELSE + IMPORT __use_two_region_memory + EXPORT __user_initial_stackheap +__user_initial_stackheap + LDR R0, =HeapMem + LDR R1, =(StackMem + Stack) + LDR R2, =(HeapMem + Heap) + LDR R3, =StackMem + BX LR + ENDIF + +;****************************************************************************** +; +; Make sure the end of this section is aligned. +; +;****************************************************************************** + ALIGN + +;****************************************************************************** +; +; Tell the assembler that we're done. +; +;****************************************************************************** + END diff --git a/boards/ek-lm4f120xl/qs-rgb/startup_sourcerygxx.S b/boards/ek-lm4f120xl/qs-rgb/startup_sourcerygxx.S new file mode 100644 index 0000000..b720839 --- /dev/null +++ b/boards/ek-lm4f120xl/qs-rgb/startup_sourcerygxx.S @@ -0,0 +1,75 @@ +//***************************************************************************** +// +// startup_sourcerygxx.S - Startup code for Sourcery CodeBench. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + + .syntax unified + .thumb + +//***************************************************************************** +// +// Place this code into the .cs3.reset section so that it can be executed prior +// to the startup code in Sourcery CodeBench. +// +//***************************************************************************** + .section .cs3.reset,"x" + +//***************************************************************************** +// +// The reset handler, which overrides the one provided by CS3. +// +//***************************************************************************** + .globl __cs3_reset + .thumb_func +__cs3_reset: + // + // Enable the floating-point unit. This must be done here to handle the + // case where main() uses floating-point and the function prologue saves + // floating-point registers (which will fault if floating-point is not + // enabled). Any configuration of the floating-point unit using DriverLib + // APIs must be done here prior to the floating-point unit being enabled. + // + // Note that this does not use DriverLib since it might not be included in + // this project. + // + movw r0, #0xed88 + movt r0, #0xe000 + ldr r1, [r0] + orr r1, #0x00f00000 + str r1, [r0] + + // + // Branch to the normal CS3 startup code. + // + .extern __cs3_reset_ekc_lm4f232 + ldr r0, =__cs3_reset_ekc_lm4f232 + bx r0 + + // + // Place the literal pool here. + // + .ltorg + + // + // The end of the file. + // + .end diff --git a/boards/ek-lm4f120xl/timers/Makefile b/boards/ek-lm4f120xl/timers/Makefile new file mode 100644 index 0000000..dcc4752 --- /dev/null +++ b/boards/ek-lm4f120xl/timers/Makefile @@ -0,0 +1,90 @@ +#****************************************************************************** +# +# Makefile - Rules for building the timers example. +# +# Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +# Software License Agreement +# +# Texas Instruments (TI) is supplying this software for use solely and +# exclusively on TI's microcontroller products. The software is owned by +# TI and/or its suppliers, and is protected under applicable copyright +# laws. You may not combine this software with "viral" open-source +# software in order to form a larger program. +# +# THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +# NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +# NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +# A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +# CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +# DAMAGES, FOR ANY REASON WHATSOEVER. +# +# This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +# +#****************************************************************************** + +# +# Defines the part type that this project uses. +# +PART=LM4F120H5QR + +# +# Set the processor variant. +# +VARIANT=cm4f + +# +# The base directory for StellarisWare. +# +ROOT=../../.. + +# +# Include the common make definitions. +# +include ${ROOT}/makedefs + +# +# Where to find source files that do not live in this directory. +# +VPATH=../../../utils + +# +# Where to find header files that do not live in the source directory. +# +IPATH=../../.. + +# +# The default rule, which causes the timers example to be built. +# +all: ${COMPILER} +all: ${COMPILER}/timers.axf + +# +# The rule to clean out all the build products. +# +clean: + @rm -rf ${COMPILER} ${wildcard *~} + +# +# The rule to create the target directory. +# +${COMPILER}: + @mkdir -p ${COMPILER} + +# +# Rules for building the timers example. +# +${COMPILER}/timers.axf: ${COMPILER}/startup_${COMPILER}.o +${COMPILER}/timers.axf: ${COMPILER}/timers.o +${COMPILER}/timers.axf: ${COMPILER}/uartstdio.o +${COMPILER}/timers.axf: ${ROOT}/driverlib/${COMPILER}-cm4f/libdriver-cm4f.a +${COMPILER}/timers.axf: timers.ld +SCATTERgcc_timers=timers.ld +ENTRY_timers=ResetISR +CFLAGSgcc=-DTARGET_IS_BLIZZARD_RA1 + +# +# Include the automatically generated dependency files. +# +ifneq (${MAKECMDGOALS},clean) +-include ${wildcard ${COMPILER}/*.d} __dummy__ +endif diff --git a/boards/ek-lm4f120xl/timers/ccs/.ccsimportspec b/boards/ek-lm4f120xl/timers/ccs/.ccsimportspec new file mode 100644 index 0000000..e61983c --- /dev/null +++ b/boards/ek-lm4f120xl/timers/ccs/.ccsimportspec @@ -0,0 +1,8 @@ + + + + + + + + diff --git a/boards/ek-lm4f120xl/timers/ccs/.ccsproject b/boards/ek-lm4f120xl/timers/ccs/.ccsproject new file mode 100644 index 0000000..56793f4 --- /dev/null +++ b/boards/ek-lm4f120xl/timers/ccs/.ccsproject @@ -0,0 +1,12 @@ + + + + + + + + + + + + diff --git a/boards/ek-lm4f120xl/timers/ccs/.cproject b/boards/ek-lm4f120xl/timers/ccs/.cproject new file mode 100644 index 0000000..cc63d9a --- /dev/null +++ b/boards/ek-lm4f120xl/timers/ccs/.cproject @@ -0,0 +1,191 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/boards/ek-lm4f120xl/timers/ccs/.project b/boards/ek-lm4f120xl/timers/ccs/.project new file mode 100644 index 0000000..d52025b --- /dev/null +++ b/boards/ek-lm4f120xl/timers/ccs/.project @@ -0,0 +1,111 @@ + + + timers + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + + + ?name? + + + + org.eclipse.cdt.make.core.append_environment + true + + + org.eclipse.cdt.make.core.autoBuildTarget + all + + + org.eclipse.cdt.make.core.buildArguments + -k + + + org.eclipse.cdt.make.core.buildCommand + ${CCS_UTILS_DIR}/bin/gmake + + + org.eclipse.cdt.make.core.buildLocation + ${BuildDirectory} + + + org.eclipse.cdt.make.core.cleanBuildTarget + clean + + + org.eclipse.cdt.make.core.contents + org.eclipse.cdt.make.core.activeConfigSettings + + + org.eclipse.cdt.make.core.enableAutoBuild + true + + + org.eclipse.cdt.make.core.enableCleanBuild + true + + + org.eclipse.cdt.make.core.enableFullBuild + true + + + org.eclipse.cdt.make.core.fullBuildTarget + all + + + org.eclipse.cdt.make.core.stopOnError + false + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + true + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + com.ti.ccstudio.core.ccsNature + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.core.ccnature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + startup_ccs.c + 1 + SW_ROOT/boards/ek-lm4f120xl/timers/startup_ccs.c + + + timers.c + 1 + SW_ROOT/boards/ek-lm4f120xl/timers/timers.c + + + timers_ccs.cmd + 1 + SW_ROOT/boards/ek-lm4f120xl/timers/timers_ccs.cmd + + + utils/uartstdio.c + 1 + SW_ROOT/utils/uartstdio.c + + + + + SW_ROOT + $%7BPARENT-4-PROJECT_LOC%7D + + + diff --git a/boards/ek-lm4f120xl/timers/ccs/.settings/org.eclipse.cdt.codan.core.prefs b/boards/ek-lm4f120xl/timers/ccs/.settings/org.eclipse.cdt.codan.core.prefs new file mode 100644 index 0000000..98b6350 --- /dev/null +++ b/boards/ek-lm4f120xl/timers/ccs/.settings/org.eclipse.cdt.codan.core.prefs @@ -0,0 +1,3 @@ +eclipse.preferences.version=1 +inEditor=false +onBuild=false diff --git a/boards/ek-lm4f120xl/timers/ccs/Debug/timers.bin b/boards/ek-lm4f120xl/timers/ccs/Debug/timers.bin new file mode 100644 index 0000000..d56b4af Binary files /dev/null and b/boards/ek-lm4f120xl/timers/ccs/Debug/timers.bin differ diff --git a/boards/ek-lm4f120xl/timers/ccs/Debug/timers.out b/boards/ek-lm4f120xl/timers/ccs/Debug/timers.out new file mode 100644 index 0000000..2da1bfb Binary files /dev/null and b/boards/ek-lm4f120xl/timers/ccs/Debug/timers.out differ diff --git a/boards/ek-lm4f120xl/timers/ccs/macros.ini_initial b/boards/ek-lm4f120xl/timers/ccs/macros.ini_initial new file mode 100644 index 0000000..588017d --- /dev/null +++ b/boards/ek-lm4f120xl/timers/ccs/macros.ini_initial @@ -0,0 +1 @@ +SW_ROOT = ../../../.. diff --git a/boards/ek-lm4f120xl/timers/ccs/target_config.ccxml b/boards/ek-lm4f120xl/timers/ccs/target_config.ccxml new file mode 100644 index 0000000..469eea0 --- /dev/null +++ b/boards/ek-lm4f120xl/timers/ccs/target_config.ccxml @@ -0,0 +1,13 @@ + + + + + + + + + + + + + diff --git a/boards/ek-lm4f120xl/timers/ewarm/Exe/timers.bin b/boards/ek-lm4f120xl/timers/ewarm/Exe/timers.bin new file mode 100644 index 0000000..14b142f Binary files /dev/null and b/boards/ek-lm4f120xl/timers/ewarm/Exe/timers.bin differ diff --git a/boards/ek-lm4f120xl/timers/ewarm/Exe/timers.out b/boards/ek-lm4f120xl/timers/ewarm/Exe/timers.out new file mode 100644 index 0000000..f1b8d43 Binary files /dev/null and b/boards/ek-lm4f120xl/timers/ewarm/Exe/timers.out differ diff --git a/boards/ek-lm4f120xl/timers/gcc/timers.axf b/boards/ek-lm4f120xl/timers/gcc/timers.axf new file mode 100644 index 0000000..57e35f5 Binary files /dev/null and b/boards/ek-lm4f120xl/timers/gcc/timers.axf differ diff --git a/boards/ek-lm4f120xl/timers/gcc/timers.bin b/boards/ek-lm4f120xl/timers/gcc/timers.bin new file mode 100644 index 0000000..9526806 Binary files /dev/null and b/boards/ek-lm4f120xl/timers/gcc/timers.bin differ diff --git a/boards/ek-lm4f120xl/timers/readme.txt b/boards/ek-lm4f120xl/timers/readme.txt new file mode 100644 index 0000000..59253bc --- /dev/null +++ b/boards/ek-lm4f120xl/timers/readme.txt @@ -0,0 +1,29 @@ +Timer + +This example application demonstrates the use of the timers to generate +periodic interrupts. One timer is set up to interrupt once per second and +the other to interrupt twice per second; each interrupt handler will toggle +its own indicator on the display. + +UART0, connected to the Stellaris Virtual Serial Port and running at 115,200, +8-N-1, is used to display messages from this application. + +------------------------------------------------------------------------------- + +Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +Software License Agreement + +Texas Instruments (TI) is supplying this software for use solely and +exclusively on TI's microcontroller products. The software is owned by +TI and/or its suppliers, and is protected under applicable copyright +laws. You may not combine this software with "viral" open-source +software in order to form a larger program. + +THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +DAMAGES, FOR ANY REASON WHATSOEVER. + +This is part of revision 9453 of the EK-LM4F120XL Firmware Package. diff --git a/boards/ek-lm4f120xl/timers/rvmdk/timers.axf b/boards/ek-lm4f120xl/timers/rvmdk/timers.axf new file mode 100644 index 0000000..c1aa6a2 Binary files /dev/null and b/boards/ek-lm4f120xl/timers/rvmdk/timers.axf differ diff --git a/boards/ek-lm4f120xl/timers/rvmdk/timers.bin b/boards/ek-lm4f120xl/timers/rvmdk/timers.bin new file mode 100644 index 0000000..60312aa Binary files /dev/null and b/boards/ek-lm4f120xl/timers/rvmdk/timers.bin differ diff --git a/boards/ek-lm4f120xl/timers/sourcerygxx/timers.axf b/boards/ek-lm4f120xl/timers/sourcerygxx/timers.axf new file mode 100644 index 0000000..ece033c Binary files /dev/null and b/boards/ek-lm4f120xl/timers/sourcerygxx/timers.axf differ diff --git a/boards/ek-lm4f120xl/timers/sourcerygxx/timers.bin b/boards/ek-lm4f120xl/timers/sourcerygxx/timers.bin new file mode 100644 index 0000000..d719ca2 Binary files /dev/null and b/boards/ek-lm4f120xl/timers/sourcerygxx/timers.bin differ diff --git a/boards/ek-lm4f120xl/timers/startup_ccs.c b/boards/ek-lm4f120xl/timers/startup_ccs.c new file mode 100644 index 0000000..64372ec --- /dev/null +++ b/boards/ek-lm4f120xl/timers/startup_ccs.c @@ -0,0 +1,299 @@ +//***************************************************************************** +// +// startup_ccs.c - Startup code for use with TI's Code Composer Studio. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +//***************************************************************************** +// +// Forward declaration of the default fault handlers. +// +//***************************************************************************** +void ResetISR(void); +static void NmiSR(void); +static void FaultISR(void); +static void IntDefaultHandler(void); + +//***************************************************************************** +// +// External declaration for the reset handler that is to be called when the +// processor is started +// +//***************************************************************************** +extern void _c_int00(void); + +//***************************************************************************** +// +// Linker variable that marks the top of the stack. +// +//***************************************************************************** +extern unsigned long __STACK_TOP; + +//***************************************************************************** +// +// External declarations for the interrupt handlers used by the application. +// +//***************************************************************************** +extern void Timer0IntHandler(void); +extern void Timer1IntHandler(void); + +//***************************************************************************** +// +// The vector table. Note that the proper constructs must be placed on this to +// ensure that it ends up at physical address 0x0000.0000 or at the start of +// the program if located at a start address other than 0. +// +//***************************************************************************** +#pragma DATA_SECTION(g_pfnVectors, ".intvecs") +void (* const g_pfnVectors[])(void) = +{ + (void (*)(void))((unsigned long)&__STACK_TOP), + // The initial stack pointer + ResetISR, // The reset handler + NmiSR, // The NMI handler + FaultISR, // The hard fault handler + IntDefaultHandler, // The MPU fault handler + IntDefaultHandler, // The bus fault handler + IntDefaultHandler, // The usage fault handler + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // SVCall handler + IntDefaultHandler, // Debug monitor handler + 0, // Reserved + IntDefaultHandler, // The PendSV handler + IntDefaultHandler, // The SysTick handler + IntDefaultHandler, // GPIO Port A + IntDefaultHandler, // GPIO Port B + IntDefaultHandler, // GPIO Port C + IntDefaultHandler, // GPIO Port D + IntDefaultHandler, // GPIO Port E + IntDefaultHandler, // UART0 Rx and Tx + IntDefaultHandler, // UART1 Rx and Tx + IntDefaultHandler, // SSI0 Rx and Tx + IntDefaultHandler, // I2C0 Master and Slave + IntDefaultHandler, // PWM Fault + IntDefaultHandler, // PWM Generator 0 + IntDefaultHandler, // PWM Generator 1 + IntDefaultHandler, // PWM Generator 2 + IntDefaultHandler, // Quadrature Encoder 0 + IntDefaultHandler, // ADC Sequence 0 + IntDefaultHandler, // ADC Sequence 1 + IntDefaultHandler, // ADC Sequence 2 + IntDefaultHandler, // ADC Sequence 3 + IntDefaultHandler, // Watchdog timer + Timer0IntHandler, // Timer 0 subtimer A + IntDefaultHandler, // Timer 0 subtimer B + Timer1IntHandler, // Timer 1 subtimer A + IntDefaultHandler, // Timer 1 subtimer B + IntDefaultHandler, // Timer 2 subtimer A + IntDefaultHandler, // Timer 2 subtimer B + IntDefaultHandler, // Analog Comparator 0 + IntDefaultHandler, // Analog Comparator 1 + IntDefaultHandler, // Analog Comparator 2 + IntDefaultHandler, // System Control (PLL, OSC, BO) + IntDefaultHandler, // FLASH Control + IntDefaultHandler, // GPIO Port F + IntDefaultHandler, // GPIO Port G + IntDefaultHandler, // GPIO Port H + IntDefaultHandler, // UART2 Rx and Tx + IntDefaultHandler, // SSI1 Rx and Tx + IntDefaultHandler, // Timer 3 subtimer A + IntDefaultHandler, // Timer 3 subtimer B + IntDefaultHandler, // I2C1 Master and Slave + IntDefaultHandler, // Quadrature Encoder 1 + IntDefaultHandler, // CAN0 + IntDefaultHandler, // CAN1 + IntDefaultHandler, // CAN2 + IntDefaultHandler, // Ethernet + IntDefaultHandler, // Hibernate + IntDefaultHandler, // USB0 + IntDefaultHandler, // PWM Generator 3 + IntDefaultHandler, // uDMA Software Transfer + IntDefaultHandler, // uDMA Error + IntDefaultHandler, // ADC1 Sequence 0 + IntDefaultHandler, // ADC1 Sequence 1 + IntDefaultHandler, // ADC1 Sequence 2 + IntDefaultHandler, // ADC1 Sequence 3 + IntDefaultHandler, // I2S0 + IntDefaultHandler, // External Bus Interface 0 + IntDefaultHandler, // GPIO Port J + IntDefaultHandler, // GPIO Port K + IntDefaultHandler, // GPIO Port L + IntDefaultHandler, // SSI2 Rx and Tx + IntDefaultHandler, // SSI3 Rx and Tx + IntDefaultHandler, // UART3 Rx and Tx + IntDefaultHandler, // UART4 Rx and Tx + IntDefaultHandler, // UART5 Rx and Tx + IntDefaultHandler, // UART6 Rx and Tx + IntDefaultHandler, // UART7 Rx and Tx + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // I2C2 Master and Slave + IntDefaultHandler, // I2C3 Master and Slave + IntDefaultHandler, // Timer 4 subtimer A + IntDefaultHandler, // Timer 4 subtimer B + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // Timer 5 subtimer A + IntDefaultHandler, // Timer 5 subtimer B + IntDefaultHandler, // Wide Timer 0 subtimer A + IntDefaultHandler, // Wide Timer 0 subtimer B + IntDefaultHandler, // Wide Timer 1 subtimer A + IntDefaultHandler, // Wide Timer 1 subtimer B + IntDefaultHandler, // Wide Timer 2 subtimer A + IntDefaultHandler, // Wide Timer 2 subtimer B + IntDefaultHandler, // Wide Timer 3 subtimer A + IntDefaultHandler, // Wide Timer 3 subtimer B + IntDefaultHandler, // Wide Timer 4 subtimer A + IntDefaultHandler, // Wide Timer 4 subtimer B + IntDefaultHandler, // Wide Timer 5 subtimer A + IntDefaultHandler, // Wide Timer 5 subtimer B + IntDefaultHandler, // FPU + IntDefaultHandler, // PECI 0 + IntDefaultHandler, // LPC 0 + IntDefaultHandler, // I2C4 Master and Slave + IntDefaultHandler, // I2C5 Master and Slave + IntDefaultHandler, // GPIO Port M + IntDefaultHandler, // GPIO Port N + IntDefaultHandler, // Quadrature Encoder 2 + IntDefaultHandler, // Fan 0 + 0, // Reserved + IntDefaultHandler, // GPIO Port P (Summary or P0) + IntDefaultHandler, // GPIO Port P1 + IntDefaultHandler, // GPIO Port P2 + IntDefaultHandler, // GPIO Port P3 + IntDefaultHandler, // GPIO Port P4 + IntDefaultHandler, // GPIO Port P5 + IntDefaultHandler, // GPIO Port P6 + IntDefaultHandler, // GPIO Port P7 + IntDefaultHandler, // GPIO Port Q (Summary or Q0) + IntDefaultHandler, // GPIO Port Q1 + IntDefaultHandler, // GPIO Port Q2 + IntDefaultHandler, // GPIO Port Q3 + IntDefaultHandler, // GPIO Port Q4 + IntDefaultHandler, // GPIO Port Q5 + IntDefaultHandler, // GPIO Port Q6 + IntDefaultHandler, // GPIO Port Q7 + IntDefaultHandler, // GPIO Port R + IntDefaultHandler, // GPIO Port S + IntDefaultHandler, // PWM 1 Generator 0 + IntDefaultHandler, // PWM 1 Generator 1 + IntDefaultHandler, // PWM 1 Generator 2 + IntDefaultHandler, // PWM 1 Generator 3 + IntDefaultHandler // PWM 1 Fault +}; + +//***************************************************************************** +// +// This is the code that gets called when the processor first starts execution +// following a reset event. Only the absolutely necessary set is performed, +// after which the application supplied entry() routine is called. Any fancy +// actions (such as making decisions based on the reset cause register, and +// resetting the bits in that register) are left solely in the hands of the +// application. +// +//***************************************************************************** +void +ResetISR(void) +{ + // + // Jump to the CCS C initialization routine. This will enable the + // floating-point unit as well, so that does not need to be done here. + // + __asm(" .global _c_int00\n" + " b.w _c_int00"); +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a NMI. This +// simply enters an infinite loop, preserving the system state for examination +// by a debugger. +// +//***************************************************************************** +static void +NmiSR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a fault +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +FaultISR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives an unexpected +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +IntDefaultHandler(void) +{ + // + // Go into an infinite loop. + // + while(1) + { + } +} diff --git a/boards/ek-lm4f120xl/timers/startup_ewarm.c b/boards/ek-lm4f120xl/timers/startup_ewarm.c new file mode 100644 index 0000000..870d46f --- /dev/null +++ b/boards/ek-lm4f120xl/timers/startup_ewarm.c @@ -0,0 +1,333 @@ +//***************************************************************************** +// +// startup_ewarm.c - Startup code for use with IAR's Embedded Workbench, +// version 5. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +#include "inc/hw_nvic.h" +#include "inc/hw_types.h" + +//***************************************************************************** +// +// Enable the IAR extensions for this source file. +// +//***************************************************************************** +#pragma language=extended + +//***************************************************************************** +// +// Forward declaration of the default fault handlers. +// +//***************************************************************************** +void ResetISR(void); +static void NmiSR(void); +static void FaultISR(void); +static void IntDefaultHandler(void); + +//***************************************************************************** +// +// External declarations for the interrupt handlers used by the application. +// +//***************************************************************************** +extern void Timer0IntHandler(void); +extern void Timer1IntHandler(void); + +//***************************************************************************** +// +// The entry point for the application startup code. +// +//***************************************************************************** +extern void __iar_program_start(void); + +//***************************************************************************** +// +// Reserve space for the system stack. +// +//***************************************************************************** +static unsigned long pulStack[64] @ ".noinit"; + +//***************************************************************************** +// +// A union that describes the entries of the vector table. The union is needed +// since the first entry is the stack pointer and the remainder are function +// pointers. +// +//***************************************************************************** +typedef union +{ + void (*pfnHandler)(void); + unsigned long ulPtr; +} +uVectorEntry; + +//***************************************************************************** +// +// The vector table. Note that the proper constructs must be placed on this to +// ensure that it ends up at physical address 0x0000.0000. +// +//***************************************************************************** +__root const uVectorEntry __vector_table[] @ ".intvec" = +{ + { .ulPtr = (unsigned long)pulStack + sizeof(pulStack) }, + // The initial stack pointer + ResetISR, // The reset handler + NmiSR, // The NMI handler + FaultISR, // The hard fault handler + IntDefaultHandler, // The MPU fault handler + IntDefaultHandler, // The bus fault handler + IntDefaultHandler, // The usage fault handler + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // SVCall handler + IntDefaultHandler, // Debug monitor handler + 0, // Reserved + IntDefaultHandler, // The PendSV handler + IntDefaultHandler, // The SysTick handler + IntDefaultHandler, // GPIO Port A + IntDefaultHandler, // GPIO Port B + IntDefaultHandler, // GPIO Port C + IntDefaultHandler, // GPIO Port D + IntDefaultHandler, // GPIO Port E + IntDefaultHandler, // UART0 Rx and Tx + IntDefaultHandler, // UART1 Rx and Tx + IntDefaultHandler, // SSI0 Rx and Tx + IntDefaultHandler, // I2C0 Master and Slave + IntDefaultHandler, // PWM Fault + IntDefaultHandler, // PWM Generator 0 + IntDefaultHandler, // PWM Generator 1 + IntDefaultHandler, // PWM Generator 2 + IntDefaultHandler, // Quadrature Encoder 0 + IntDefaultHandler, // ADC Sequence 0 + IntDefaultHandler, // ADC Sequence 1 + IntDefaultHandler, // ADC Sequence 2 + IntDefaultHandler, // ADC Sequence 3 + IntDefaultHandler, // Watchdog timer + Timer0IntHandler, // Timer 0 subtimer A + IntDefaultHandler, // Timer 0 subtimer B + Timer1IntHandler, // Timer 1 subtimer A + IntDefaultHandler, // Timer 1 subtimer B + IntDefaultHandler, // Timer 2 subtimer A + IntDefaultHandler, // Timer 2 subtimer B + IntDefaultHandler, // Analog Comparator 0 + IntDefaultHandler, // Analog Comparator 1 + IntDefaultHandler, // Analog Comparator 2 + IntDefaultHandler, // System Control (PLL, OSC, BO) + IntDefaultHandler, // FLASH Control + IntDefaultHandler, // GPIO Port F + IntDefaultHandler, // GPIO Port G + IntDefaultHandler, // GPIO Port H + IntDefaultHandler, // UART2 Rx and Tx + IntDefaultHandler, // SSI1 Rx and Tx + IntDefaultHandler, // Timer 3 subtimer A + IntDefaultHandler, // Timer 3 subtimer B + IntDefaultHandler, // I2C1 Master and Slave + IntDefaultHandler, // Quadrature Encoder 1 + IntDefaultHandler, // CAN0 + IntDefaultHandler, // CAN1 + IntDefaultHandler, // CAN2 + IntDefaultHandler, // Ethernet + IntDefaultHandler, // Hibernate + IntDefaultHandler, // USB0 + IntDefaultHandler, // PWM Generator 3 + IntDefaultHandler, // uDMA Software Transfer + IntDefaultHandler, // uDMA Error + IntDefaultHandler, // ADC1 Sequence 0 + IntDefaultHandler, // ADC1 Sequence 1 + IntDefaultHandler, // ADC1 Sequence 2 + IntDefaultHandler, // ADC1 Sequence 3 + IntDefaultHandler, // I2S0 + IntDefaultHandler, // External Bus Interface 0 + IntDefaultHandler, // GPIO Port J + IntDefaultHandler, // GPIO Port K + IntDefaultHandler, // GPIO Port L + IntDefaultHandler, // SSI2 Rx and Tx + IntDefaultHandler, // SSI3 Rx and Tx + IntDefaultHandler, // UART3 Rx and Tx + IntDefaultHandler, // UART4 Rx and Tx + IntDefaultHandler, // UART5 Rx and Tx + IntDefaultHandler, // UART6 Rx and Tx + IntDefaultHandler, // UART7 Rx and Tx + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // I2C2 Master and Slave + IntDefaultHandler, // I2C3 Master and Slave + IntDefaultHandler, // Timer 4 subtimer A + IntDefaultHandler, // Timer 4 subtimer B + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // Timer 5 subtimer A + IntDefaultHandler, // Timer 5 subtimer B + IntDefaultHandler, // Wide Timer 0 subtimer A + IntDefaultHandler, // Wide Timer 0 subtimer B + IntDefaultHandler, // Wide Timer 1 subtimer A + IntDefaultHandler, // Wide Timer 1 subtimer B + IntDefaultHandler, // Wide Timer 2 subtimer A + IntDefaultHandler, // Wide Timer 2 subtimer B + IntDefaultHandler, // Wide Timer 3 subtimer A + IntDefaultHandler, // Wide Timer 3 subtimer B + IntDefaultHandler, // Wide Timer 4 subtimer A + IntDefaultHandler, // Wide Timer 4 subtimer B + IntDefaultHandler, // Wide Timer 5 subtimer A + IntDefaultHandler, // Wide Timer 5 subtimer B + IntDefaultHandler, // FPU + IntDefaultHandler, // PECI 0 + IntDefaultHandler, // LPC 0 + IntDefaultHandler, // I2C4 Master and Slave + IntDefaultHandler, // I2C5 Master and Slave + IntDefaultHandler, // GPIO Port M + IntDefaultHandler, // GPIO Port N + IntDefaultHandler, // Quadrature Encoder 2 + IntDefaultHandler, // Fan 0 + 0, // Reserved + IntDefaultHandler, // GPIO Port P (Summary or P0) + IntDefaultHandler, // GPIO Port P1 + IntDefaultHandler, // GPIO Port P2 + IntDefaultHandler, // GPIO Port P3 + IntDefaultHandler, // GPIO Port P4 + IntDefaultHandler, // GPIO Port P5 + IntDefaultHandler, // GPIO Port P6 + IntDefaultHandler, // GPIO Port P7 + IntDefaultHandler, // GPIO Port Q (Summary or Q0) + IntDefaultHandler, // GPIO Port Q1 + IntDefaultHandler, // GPIO Port Q2 + IntDefaultHandler, // GPIO Port Q3 + IntDefaultHandler, // GPIO Port Q4 + IntDefaultHandler, // GPIO Port Q5 + IntDefaultHandler, // GPIO Port Q6 + IntDefaultHandler, // GPIO Port Q7 + IntDefaultHandler, // GPIO Port R + IntDefaultHandler, // GPIO Port S + IntDefaultHandler, // PWM 1 Generator 0 + IntDefaultHandler, // PWM 1 Generator 1 + IntDefaultHandler, // PWM 1 Generator 2 + IntDefaultHandler, // PWM 1 Generator 3 + IntDefaultHandler // PWM 1 Fault +}; + +//***************************************************************************** +// +// This is the code that gets called when the processor first starts execution +// following a reset event. Only the absolutely necessary set is performed, +// after which the application supplied entry() routine is called. Any fancy +// actions (such as making decisions based on the reset cause register, and +// resetting the bits in that register) are left solely in the hands of the +// application. +// +//***************************************************************************** +void +ResetISR(void) +{ + // + // Enable the floating-point unit. This must be done here to handle the + // case where main() uses floating-point and the function prologue saves + // floating-point registers (which will fault if floating-point is not + // enabled). Any configuration of the floating-point unit using DriverLib + // APIs must be done here prior to the floating-point unit being enabled. + // + // Note that this does not use DriverLib since it might not be included in + // this project. + // + HWREG(NVIC_CPAC) = ((HWREG(NVIC_CPAC) & + ~(NVIC_CPAC_CP10_M | NVIC_CPAC_CP11_M)) | + NVIC_CPAC_CP10_FULL | NVIC_CPAC_CP11_FULL); + + // + // Call the application's entry point. + // + __iar_program_start(); +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a NMI. This +// simply enters an infinite loop, preserving the system state for examination +// by a debugger. +// +//***************************************************************************** +static void +NmiSR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a fault +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +FaultISR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives an unexpected +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +IntDefaultHandler(void) +{ + // + // Go into an infinite loop. + // + while(1) + { + } +} diff --git a/boards/ek-lm4f120xl/timers/startup_gcc.c b/boards/ek-lm4f120xl/timers/startup_gcc.c new file mode 100644 index 0000000..a36147c --- /dev/null +++ b/boards/ek-lm4f120xl/timers/startup_gcc.c @@ -0,0 +1,349 @@ +//***************************************************************************** +// +// startup_gcc.c - Startup code for use with GNU tools. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +#include "inc/hw_nvic.h" +#include "inc/hw_types.h" + +//***************************************************************************** +// +// Forward declaration of the default fault handlers. +// +//***************************************************************************** +void ResetISR(void); +static void NmiSR(void); +static void FaultISR(void); +static void IntDefaultHandler(void); + +//***************************************************************************** +// +// External declarations for the interrupt handlers used by the application. +// +//***************************************************************************** +extern void Timer0IntHandler(void); +extern void Timer1IntHandler(void); + +//***************************************************************************** +// +// The entry point for the application. +// +//***************************************************************************** +extern int main(void); + +//***************************************************************************** +// +// Reserve space for the system stack. +// +//***************************************************************************** +static unsigned long pulStack[64]; + +//***************************************************************************** +// +// The vector table. Note that the proper constructs must be placed on this to +// ensure that it ends up at physical address 0x0000.0000. +// +//***************************************************************************** +__attribute__ ((section(".isr_vector"))) +void (* const g_pfnVectors[])(void) = +{ + (void (*)(void))((unsigned long)pulStack + sizeof(pulStack)), + // The initial stack pointer + ResetISR, // The reset handler + NmiSR, // The NMI handler + FaultISR, // The hard fault handler + IntDefaultHandler, // The MPU fault handler + IntDefaultHandler, // The bus fault handler + IntDefaultHandler, // The usage fault handler + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // SVCall handler + IntDefaultHandler, // Debug monitor handler + 0, // Reserved + IntDefaultHandler, // The PendSV handler + IntDefaultHandler, // The SysTick handler + IntDefaultHandler, // GPIO Port A + IntDefaultHandler, // GPIO Port B + IntDefaultHandler, // GPIO Port C + IntDefaultHandler, // GPIO Port D + IntDefaultHandler, // GPIO Port E + IntDefaultHandler, // UART0 Rx and Tx + IntDefaultHandler, // UART1 Rx and Tx + IntDefaultHandler, // SSI0 Rx and Tx + IntDefaultHandler, // I2C0 Master and Slave + IntDefaultHandler, // PWM Fault + IntDefaultHandler, // PWM Generator 0 + IntDefaultHandler, // PWM Generator 1 + IntDefaultHandler, // PWM Generator 2 + IntDefaultHandler, // Quadrature Encoder 0 + IntDefaultHandler, // ADC Sequence 0 + IntDefaultHandler, // ADC Sequence 1 + IntDefaultHandler, // ADC Sequence 2 + IntDefaultHandler, // ADC Sequence 3 + IntDefaultHandler, // Watchdog timer + Timer0IntHandler, // Timer 0 subtimer A + IntDefaultHandler, // Timer 0 subtimer B + Timer1IntHandler, // Timer 1 subtimer A + IntDefaultHandler, // Timer 1 subtimer B + IntDefaultHandler, // Timer 2 subtimer A + IntDefaultHandler, // Timer 2 subtimer B + IntDefaultHandler, // Analog Comparator 0 + IntDefaultHandler, // Analog Comparator 1 + IntDefaultHandler, // Analog Comparator 2 + IntDefaultHandler, // System Control (PLL, OSC, BO) + IntDefaultHandler, // FLASH Control + IntDefaultHandler, // GPIO Port F + IntDefaultHandler, // GPIO Port G + IntDefaultHandler, // GPIO Port H + IntDefaultHandler, // UART2 Rx and Tx + IntDefaultHandler, // SSI1 Rx and Tx + IntDefaultHandler, // Timer 3 subtimer A + IntDefaultHandler, // Timer 3 subtimer B + IntDefaultHandler, // I2C1 Master and Slave + IntDefaultHandler, // Quadrature Encoder 1 + IntDefaultHandler, // CAN0 + IntDefaultHandler, // CAN1 + IntDefaultHandler, // CAN2 + IntDefaultHandler, // Ethernet + IntDefaultHandler, // Hibernate + IntDefaultHandler, // USB0 + IntDefaultHandler, // PWM Generator 3 + IntDefaultHandler, // uDMA Software Transfer + IntDefaultHandler, // uDMA Error + IntDefaultHandler, // ADC1 Sequence 0 + IntDefaultHandler, // ADC1 Sequence 1 + IntDefaultHandler, // ADC1 Sequence 2 + IntDefaultHandler, // ADC1 Sequence 3 + IntDefaultHandler, // I2S0 + IntDefaultHandler, // External Bus Interface 0 + IntDefaultHandler, // GPIO Port J + IntDefaultHandler, // GPIO Port K + IntDefaultHandler, // GPIO Port L + IntDefaultHandler, // SSI2 Rx and Tx + IntDefaultHandler, // SSI3 Rx and Tx + IntDefaultHandler, // UART3 Rx and Tx + IntDefaultHandler, // UART4 Rx and Tx + IntDefaultHandler, // UART5 Rx and Tx + IntDefaultHandler, // UART6 Rx and Tx + IntDefaultHandler, // UART7 Rx and Tx + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // I2C2 Master and Slave + IntDefaultHandler, // I2C3 Master and Slave + IntDefaultHandler, // Timer 4 subtimer A + IntDefaultHandler, // Timer 4 subtimer B + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // Timer 5 subtimer A + IntDefaultHandler, // Timer 5 subtimer B + IntDefaultHandler, // Wide Timer 0 subtimer A + IntDefaultHandler, // Wide Timer 0 subtimer B + IntDefaultHandler, // Wide Timer 1 subtimer A + IntDefaultHandler, // Wide Timer 1 subtimer B + IntDefaultHandler, // Wide Timer 2 subtimer A + IntDefaultHandler, // Wide Timer 2 subtimer B + IntDefaultHandler, // Wide Timer 3 subtimer A + IntDefaultHandler, // Wide Timer 3 subtimer B + IntDefaultHandler, // Wide Timer 4 subtimer A + IntDefaultHandler, // Wide Timer 4 subtimer B + IntDefaultHandler, // Wide Timer 5 subtimer A + IntDefaultHandler, // Wide Timer 5 subtimer B + IntDefaultHandler, // FPU + IntDefaultHandler, // PECI 0 + IntDefaultHandler, // LPC 0 + IntDefaultHandler, // I2C4 Master and Slave + IntDefaultHandler, // I2C5 Master and Slave + IntDefaultHandler, // GPIO Port M + IntDefaultHandler, // GPIO Port N + IntDefaultHandler, // Quadrature Encoder 2 + IntDefaultHandler, // Fan 0 + 0, // Reserved + IntDefaultHandler, // GPIO Port P (Summary or P0) + IntDefaultHandler, // GPIO Port P1 + IntDefaultHandler, // GPIO Port P2 + IntDefaultHandler, // GPIO Port P3 + IntDefaultHandler, // GPIO Port P4 + IntDefaultHandler, // GPIO Port P5 + IntDefaultHandler, // GPIO Port P6 + IntDefaultHandler, // GPIO Port P7 + IntDefaultHandler, // GPIO Port Q (Summary or Q0) + IntDefaultHandler, // GPIO Port Q1 + IntDefaultHandler, // GPIO Port Q2 + IntDefaultHandler, // GPIO Port Q3 + IntDefaultHandler, // GPIO Port Q4 + IntDefaultHandler, // GPIO Port Q5 + IntDefaultHandler, // GPIO Port Q6 + IntDefaultHandler, // GPIO Port Q7 + IntDefaultHandler, // GPIO Port R + IntDefaultHandler, // GPIO Port S + IntDefaultHandler, // PWM 1 Generator 0 + IntDefaultHandler, // PWM 1 Generator 1 + IntDefaultHandler, // PWM 1 Generator 2 + IntDefaultHandler, // PWM 1 Generator 3 + IntDefaultHandler // PWM 1 Fault +}; + +//***************************************************************************** +// +// The following are constructs created by the linker, indicating where the +// the "data" and "bss" segments reside in memory. The initializers for the +// for the "data" segment resides immediately following the "text" segment. +// +//***************************************************************************** +extern unsigned long _etext; +extern unsigned long _data; +extern unsigned long _edata; +extern unsigned long _bss; +extern unsigned long _ebss; + +//***************************************************************************** +// +// This is the code that gets called when the processor first starts execution +// following a reset event. Only the absolutely necessary set is performed, +// after which the application supplied entry() routine is called. Any fancy +// actions (such as making decisions based on the reset cause register, and +// resetting the bits in that register) are left solely in the hands of the +// application. +// +//***************************************************************************** +void +ResetISR(void) +{ + unsigned long *pulSrc, *pulDest; + + // + // Copy the data segment initializers from flash to SRAM. + // + pulSrc = &_etext; + for(pulDest = &_data; pulDest < &_edata; ) + { + *pulDest++ = *pulSrc++; + } + + // + // Zero fill the bss segment. + // + __asm(" ldr r0, =_bss\n" + " ldr r1, =_ebss\n" + " mov r2, #0\n" + " .thumb_func\n" + "zero_loop:\n" + " cmp r0, r1\n" + " it lt\n" + " strlt r2, [r0], #4\n" + " blt zero_loop"); + + // + // Enable the floating-point unit. This must be done here to handle the + // case where main() uses floating-point and the function prologue saves + // floating-point registers (which will fault if floating-point is not + // enabled). Any configuration of the floating-point unit using DriverLib + // APIs must be done here prior to the floating-point unit being enabled. + // + // Note that this does not use DriverLib since it might not be included in + // this project. + // + HWREG(NVIC_CPAC) = ((HWREG(NVIC_CPAC) & + ~(NVIC_CPAC_CP10_M | NVIC_CPAC_CP11_M)) | + NVIC_CPAC_CP10_FULL | NVIC_CPAC_CP11_FULL); + + // + // Call the application's entry point. + // + main(); +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a NMI. This +// simply enters an infinite loop, preserving the system state for examination +// by a debugger. +// +//***************************************************************************** +static void +NmiSR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a fault +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +FaultISR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives an unexpected +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +IntDefaultHandler(void) +{ + // + // Go into an infinite loop. + // + while(1) + { + } +} diff --git a/boards/ek-lm4f120xl/timers/startup_rvmdk.S b/boards/ek-lm4f120xl/timers/startup_rvmdk.S new file mode 100644 index 0000000..82856c0 --- /dev/null +++ b/boards/ek-lm4f120xl/timers/startup_rvmdk.S @@ -0,0 +1,359 @@ +; <<< Use Configuration Wizard in Context Menu >>> +;****************************************************************************** +; +; startup_rvmdk.S - Startup code for use with Keil's uVision. +; +; Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +; Software License Agreement +; +; Texas Instruments (TI) is supplying this software for use solely and +; exclusively on TI's microcontroller products. The software is owned by +; TI and/or its suppliers, and is protected under applicable copyright +; laws. You may not combine this software with "viral" open-source +; software in order to form a larger program. +; +; THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +; NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +; NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +; A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +; CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +; DAMAGES, FOR ANY REASON WHATSOEVER. +; +; This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +; +;****************************************************************************** + +;****************************************************************************** +; +; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +; +;****************************************************************************** +Stack EQU 0x00000100 + +;****************************************************************************** +; +; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> +; +;****************************************************************************** +Heap EQU 0x00000000 + +;****************************************************************************** +; +; Allocate space for the stack. +; +;****************************************************************************** + AREA STACK, NOINIT, READWRITE, ALIGN=3 +StackMem + SPACE Stack +__initial_sp + +;****************************************************************************** +; +; Allocate space for the heap. +; +;****************************************************************************** + AREA HEAP, NOINIT, READWRITE, ALIGN=3 +__heap_base +HeapMem + SPACE Heap +__heap_limit + +;****************************************************************************** +; +; Indicate that the code in this file preserves 8-byte alignment of the stack. +; +;****************************************************************************** + PRESERVE8 + +;****************************************************************************** +; +; Place code into the reset code section. +; +;****************************************************************************** + AREA RESET, CODE, READONLY + THUMB + +;****************************************************************************** +; +; External declarations for the interrupt handlers used by the application. +; +;****************************************************************************** + EXTERN Timer0IntHandler + EXTERN Timer1IntHandler + +;****************************************************************************** +; +; The vector table. +; +;****************************************************************************** + EXPORT __Vectors +__Vectors + DCD StackMem + Stack ; Top of Stack + DCD Reset_Handler ; Reset Handler + DCD NmiSR ; NMI Handler + DCD FaultISR ; Hard Fault Handler + DCD IntDefaultHandler ; The MPU fault handler + DCD IntDefaultHandler ; The bus fault handler + DCD IntDefaultHandler ; The usage fault handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD IntDefaultHandler ; SVCall handler + DCD IntDefaultHandler ; Debug monitor handler + DCD 0 ; Reserved + DCD IntDefaultHandler ; The PendSV handler + DCD IntDefaultHandler ; The SysTick handler + DCD IntDefaultHandler ; GPIO Port A + DCD IntDefaultHandler ; GPIO Port B + DCD IntDefaultHandler ; GPIO Port C + DCD IntDefaultHandler ; GPIO Port D + DCD IntDefaultHandler ; GPIO Port E + DCD IntDefaultHandler ; UART0 Rx and Tx + DCD IntDefaultHandler ; UART1 Rx and Tx + DCD IntDefaultHandler ; SSI0 Rx and Tx + DCD IntDefaultHandler ; I2C0 Master and Slave + DCD IntDefaultHandler ; PWM Fault + DCD IntDefaultHandler ; PWM Generator 0 + DCD IntDefaultHandler ; PWM Generator 1 + DCD IntDefaultHandler ; PWM Generator 2 + DCD IntDefaultHandler ; Quadrature Encoder 0 + DCD IntDefaultHandler ; ADC Sequence 0 + DCD IntDefaultHandler ; ADC Sequence 1 + DCD IntDefaultHandler ; ADC Sequence 2 + DCD IntDefaultHandler ; ADC Sequence 3 + DCD IntDefaultHandler ; Watchdog timer + DCD Timer0IntHandler ; Timer 0 subtimer A + DCD IntDefaultHandler ; Timer 0 subtimer B + DCD Timer1IntHandler ; Timer 1 subtimer A + DCD IntDefaultHandler ; Timer 1 subtimer B + DCD IntDefaultHandler ; Timer 2 subtimer A + DCD IntDefaultHandler ; Timer 2 subtimer B + DCD IntDefaultHandler ; Analog Comparator 0 + DCD IntDefaultHandler ; Analog Comparator 1 + DCD IntDefaultHandler ; Analog Comparator 2 + DCD IntDefaultHandler ; System Control (PLL, OSC, BO) + DCD IntDefaultHandler ; FLASH Control + DCD IntDefaultHandler ; GPIO Port F + DCD IntDefaultHandler ; GPIO Port G + DCD IntDefaultHandler ; GPIO Port H + DCD IntDefaultHandler ; UART2 Rx and Tx + DCD IntDefaultHandler ; SSI1 Rx and Tx + DCD IntDefaultHandler ; Timer 3 subtimer A + DCD IntDefaultHandler ; Timer 3 subtimer B + DCD IntDefaultHandler ; I2C1 Master and Slave + DCD IntDefaultHandler ; Quadrature Encoder 1 + DCD IntDefaultHandler ; CAN0 + DCD IntDefaultHandler ; CAN1 + DCD IntDefaultHandler ; CAN2 + DCD IntDefaultHandler ; Ethernet + DCD IntDefaultHandler ; Hibernate + DCD IntDefaultHandler ; USB0 + DCD IntDefaultHandler ; PWM Generator 3 + DCD IntDefaultHandler ; uDMA Software Transfer + DCD IntDefaultHandler ; uDMA Error + DCD IntDefaultHandler ; ADC1 Sequence 0 + DCD IntDefaultHandler ; ADC1 Sequence 1 + DCD IntDefaultHandler ; ADC1 Sequence 2 + DCD IntDefaultHandler ; ADC1 Sequence 3 + DCD IntDefaultHandler ; I2S0 + DCD IntDefaultHandler ; External Bus Interface 0 + DCD IntDefaultHandler ; GPIO Port J + DCD IntDefaultHandler ; GPIO Port K + DCD IntDefaultHandler ; GPIO Port L + DCD IntDefaultHandler ; SSI2 Rx and Tx + DCD IntDefaultHandler ; SSI3 Rx and Tx + DCD IntDefaultHandler ; UART3 Rx and Tx + DCD IntDefaultHandler ; UART4 Rx and Tx + DCD IntDefaultHandler ; UART5 Rx and Tx + DCD IntDefaultHandler ; UART6 Rx and Tx + DCD IntDefaultHandler ; UART7 Rx and Tx + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD IntDefaultHandler ; I2C2 Master and Slave + DCD IntDefaultHandler ; I2C3 Master and Slave + DCD IntDefaultHandler ; Timer 4 subtimer A + DCD IntDefaultHandler ; Timer 4 subtimer B + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD IntDefaultHandler ; Timer 5 subtimer A + DCD IntDefaultHandler ; Timer 5 subtimer B + DCD IntDefaultHandler ; Wide Timer 0 subtimer A + DCD IntDefaultHandler ; Wide Timer 0 subtimer B + DCD IntDefaultHandler ; Wide Timer 1 subtimer A + DCD IntDefaultHandler ; Wide Timer 1 subtimer B + DCD IntDefaultHandler ; Wide Timer 2 subtimer A + DCD IntDefaultHandler ; Wide Timer 2 subtimer B + DCD IntDefaultHandler ; Wide Timer 3 subtimer A + DCD IntDefaultHandler ; Wide Timer 3 subtimer B + DCD IntDefaultHandler ; Wide Timer 4 subtimer A + DCD IntDefaultHandler ; Wide Timer 4 subtimer B + DCD IntDefaultHandler ; Wide Timer 5 subtimer A + DCD IntDefaultHandler ; Wide Timer 5 subtimer B + DCD IntDefaultHandler ; FPU + DCD IntDefaultHandler ; PECI 0 + DCD IntDefaultHandler ; LPC 0 + DCD IntDefaultHandler ; I2C4 Master and Slave + DCD IntDefaultHandler ; I2C5 Master and Slave + DCD IntDefaultHandler ; GPIO Port M + DCD IntDefaultHandler ; GPIO Port N + DCD IntDefaultHandler ; Quadrature Encoder 2 + DCD IntDefaultHandler ; Fan 0 + DCD 0 ; Reserved + DCD IntDefaultHandler ; GPIO Port P (Summary or P0) + DCD IntDefaultHandler ; GPIO Port P1 + DCD IntDefaultHandler ; GPIO Port P2 + DCD IntDefaultHandler ; GPIO Port P3 + DCD IntDefaultHandler ; GPIO Port P4 + DCD IntDefaultHandler ; GPIO Port P5 + DCD IntDefaultHandler ; GPIO Port P6 + DCD IntDefaultHandler ; GPIO Port P7 + DCD IntDefaultHandler ; GPIO Port Q (Summary or Q0) + DCD IntDefaultHandler ; GPIO Port Q1 + DCD IntDefaultHandler ; GPIO Port Q2 + DCD IntDefaultHandler ; GPIO Port Q3 + DCD IntDefaultHandler ; GPIO Port Q4 + DCD IntDefaultHandler ; GPIO Port Q5 + DCD IntDefaultHandler ; GPIO Port Q6 + DCD IntDefaultHandler ; GPIO Port Q7 + DCD IntDefaultHandler ; GPIO Port R + DCD IntDefaultHandler ; GPIO Port S + DCD IntDefaultHandler ; PWM 1 Generator 0 + DCD IntDefaultHandler ; PWM 1 Generator 1 + DCD IntDefaultHandler ; PWM 1 Generator 2 + DCD IntDefaultHandler ; PWM 1 Generator 3 + DCD IntDefaultHandler ; PWM 1 Fault + +;****************************************************************************** +; +; This is the code that gets called when the processor first starts execution +; following a reset event. +; +;****************************************************************************** + EXPORT Reset_Handler +Reset_Handler + ; + ; Enable the floating-point unit. This must be done here to handle the + ; case where main() uses floating-point and the function prologue saves + ; floating-point registers (which will fault if floating-point is not + ; enabled). Any configuration of the floating-point unit using + ; DriverLib APIs must be done here prior to the floating-point unit + ; being enabled. + ; + ; Note that this does not use DriverLib since it might not be included + ; in this project. + ; + MOVW R0, #0xED88 + MOVT R0, #0xE000 + LDR R1, [R0] + ORR R1, #0x00F00000 + STR R1, [R0] + + ; + ; Call the C library enty point that handles startup. This will copy + ; the .data section initializers from flash to SRAM and zero fill the + ; .bss section. + ; + IMPORT __main + B __main + +;****************************************************************************** +; +; This is the code that gets called when the processor receives a NMI. This +; simply enters an infinite loop, preserving the system state for examination +; by a debugger. +; +;****************************************************************************** +NmiSR + B NmiSR + +;****************************************************************************** +; +; This is the code that gets called when the processor receives a fault +; interrupt. This simply enters an infinite loop, preserving the system state +; for examination by a debugger. +; +;****************************************************************************** +FaultISR + B FaultISR + +;****************************************************************************** +; +; This is the code that gets called when the processor receives an unexpected +; interrupt. This simply enters an infinite loop, preserving the system state +; for examination by a debugger. +; +;****************************************************************************** +IntDefaultHandler + B IntDefaultHandler + +;****************************************************************************** +; +; Make sure the end of this section is aligned. +; +;****************************************************************************** + ALIGN + +;****************************************************************************** +; +; Some code in the normal code section for initializing the heap and stack. +; +;****************************************************************************** + AREA |.text|, CODE, READONLY + +;****************************************************************************** +; +; The function expected of the C library startup code for defining the stack +; and heap memory locations. For the C library version of the startup code, +; provide this function so that the C library initialization code can find out +; the location of the stack and heap. +; +;****************************************************************************** + IF :DEF: __MICROLIB + EXPORT __initial_sp + EXPORT __heap_base + EXPORT __heap_limit + ELSE + IMPORT __use_two_region_memory + EXPORT __user_initial_stackheap +__user_initial_stackheap + LDR R0, =HeapMem + LDR R1, =(StackMem + Stack) + LDR R2, =(HeapMem + Heap) + LDR R3, =StackMem + BX LR + ENDIF + +;****************************************************************************** +; +; Make sure the end of this section is aligned. +; +;****************************************************************************** + ALIGN + +;****************************************************************************** +; +; Tell the assembler that we're done. +; +;****************************************************************************** + END diff --git a/boards/ek-lm4f120xl/timers/startup_sourcerygxx.S b/boards/ek-lm4f120xl/timers/startup_sourcerygxx.S new file mode 100644 index 0000000..b720839 --- /dev/null +++ b/boards/ek-lm4f120xl/timers/startup_sourcerygxx.S @@ -0,0 +1,75 @@ +//***************************************************************************** +// +// startup_sourcerygxx.S - Startup code for Sourcery CodeBench. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + + .syntax unified + .thumb + +//***************************************************************************** +// +// Place this code into the .cs3.reset section so that it can be executed prior +// to the startup code in Sourcery CodeBench. +// +//***************************************************************************** + .section .cs3.reset,"x" + +//***************************************************************************** +// +// The reset handler, which overrides the one provided by CS3. +// +//***************************************************************************** + .globl __cs3_reset + .thumb_func +__cs3_reset: + // + // Enable the floating-point unit. This must be done here to handle the + // case where main() uses floating-point and the function prologue saves + // floating-point registers (which will fault if floating-point is not + // enabled). Any configuration of the floating-point unit using DriverLib + // APIs must be done here prior to the floating-point unit being enabled. + // + // Note that this does not use DriverLib since it might not be included in + // this project. + // + movw r0, #0xed88 + movt r0, #0xe000 + ldr r1, [r0] + orr r1, #0x00f00000 + str r1, [r0] + + // + // Branch to the normal CS3 startup code. + // + .extern __cs3_reset_ekc_lm4f232 + ldr r0, =__cs3_reset_ekc_lm4f232 + bx r0 + + // + // Place the literal pool here. + // + .ltorg + + // + // The end of the file. + // + .end diff --git a/boards/ek-lm4f120xl/timers/timers.c b/boards/ek-lm4f120xl/timers/timers.c new file mode 100644 index 0000000..6aad202 --- /dev/null +++ b/boards/ek-lm4f120xl/timers/timers.c @@ -0,0 +1,221 @@ +//***************************************************************************** +// +// timers.c - Timers example. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +#include "inc/hw_ints.h" +#include "inc/hw_memmap.h" +#include "inc/hw_types.h" +#include "driverlib/debug.h" +#include "driverlib/fpu.h" +#include "driverlib/gpio.h" +#include "driverlib/interrupt.h" +#include "driverlib/pin_map.h" +#include "driverlib/rom.h" +#include "driverlib/sysctl.h" +#include "driverlib/timer.h" +#include "utils/uartstdio.h" + +//***************************************************************************** +// +//! \addtogroup example_list +//!

Timer (timers)

+//! +//! This example application demonstrates the use of the timers to generate +//! periodic interrupts. One timer is set up to interrupt once per second and +//! the other to interrupt twice per second; each interrupt handler will toggle +//! its own indicator on the display. +//! +//! UART0, connected to the Stellaris Virtual Serial Port and running at 115,200, +//! 8-N-1, is used to display messages from this application. +// +//***************************************************************************** + + +//***************************************************************************** +// +// Flags that contain the current value of the interrupt indicator as displayed +// on the UART. +// +//***************************************************************************** +unsigned long g_ulFlags; + +//***************************************************************************** +// +// The error routine that is called if the driver library encounters an error. +// +//***************************************************************************** +#ifdef DEBUG +void +__error__(char *pcFilename, unsigned long ulLine) +{ +} +#endif + +//***************************************************************************** +// +// The interrupt handler for the first timer interrupt. +// +//***************************************************************************** +void +Timer0IntHandler(void) +{ + // + // Clear the timer interrupt. + // + ROM_TimerIntClear(TIMER0_BASE, TIMER_TIMA_TIMEOUT); + + // + // Toggle the flag for the first timer. + // + HWREGBITW(&g_ulFlags, 0) ^= 1; + + // + // Use the flags to Toggle the LED for this timer + // + GPIOPinWrite(GPIO_PORTF_BASE, GPIO_PIN_1, g_ulFlags << 1); + + // + // Update the interrupt status on the display. + // + ROM_IntMasterDisable(); + UARTprintf("\rT1: %d T2: %d", HWREGBITW(&g_ulFlags, 0) ? 1 : 0, + HWREGBITW(&g_ulFlags, 1) ? 1 : 0); + ROM_IntMasterEnable(); +} + +//***************************************************************************** +// +// The interrupt handler for the second timer interrupt. +// +//***************************************************************************** +void +Timer1IntHandler(void) +{ + // + // Clear the timer interrupt. + // + ROM_TimerIntClear(TIMER1_BASE, TIMER_TIMA_TIMEOUT); + + // + // Toggle the flag for the second timer. + // + HWREGBITW(&g_ulFlags, 1) ^= 1; + + // + // Use the flags to Toggle the LED for this timer + // + GPIOPinWrite(GPIO_PORTF_BASE, GPIO_PIN_2, g_ulFlags << 1); + + // + // Update the interrupt status on the display. + // + ROM_IntMasterDisable(); + UARTprintf("\rT1: %d T2: %d", HWREGBITW(&g_ulFlags, 0) ? 1 : 0, + HWREGBITW(&g_ulFlags, 1) ? 1 : 0); + ROM_IntMasterEnable(); +} + +//***************************************************************************** +// +// This example application demonstrates the use of the timers to generate +// periodic interrupts. +// +//***************************************************************************** +int +main(void) +{ + // + // Enable lazy stacking for interrupt handlers. This allows floating-point + // instructions to be used within interrupt handlers, but at the expense of + // extra stack usage. + // + ROM_FPULazyStackingEnable(); + + // + // Set the clocking to run directly from the crystal. + // + ROM_SysCtlClockSet(SYSCTL_SYSDIV_1 | SYSCTL_USE_OSC | SYSCTL_OSC_MAIN | + SYSCTL_XTAL_16MHZ); + + // + // Initialize the UART and write status. + // + ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA); + GPIOPinConfigure(GPIO_PA0_U0RX); + GPIOPinConfigure(GPIO_PA1_U0TX); + ROM_GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_1); + UARTStdioInit(0); + UARTprintf("\033[2JTimers example\n"); + UARTprintf("T1: 0 T2: 0"); + + // + // Enable the GPIO port that is used for the on-board LED. + // + ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOF); + + // + // Enable the GPIO pins for the LED (PF1 & PF2). + // + ROM_GPIOPinTypeGPIOOutput(GPIO_PORTF_BASE, GPIO_PIN_2 | GPIO_PIN_1); + + + // + // Enable the peripherals used by this example. + // + ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_TIMER0); + ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_TIMER1); + + // + // Enable processor interrupts. + // + ROM_IntMasterEnable(); + + // + // Configure the two 32-bit periodic timers. + // + ROM_TimerConfigure(TIMER0_BASE, TIMER_CFG_PERIODIC); + ROM_TimerConfigure(TIMER1_BASE, TIMER_CFG_PERIODIC); + ROM_TimerLoadSet(TIMER0_BASE, TIMER_A, ROM_SysCtlClockGet()); + ROM_TimerLoadSet(TIMER1_BASE, TIMER_A, ROM_SysCtlClockGet() / 2); + + // + // Setup the interrupts for the timer timeouts. + // + ROM_IntEnable(INT_TIMER0A); + ROM_IntEnable(INT_TIMER1A); + ROM_TimerIntEnable(TIMER0_BASE, TIMER_TIMA_TIMEOUT); + ROM_TimerIntEnable(TIMER1_BASE, TIMER_TIMA_TIMEOUT); + + // + // Enable the timers. + // + ROM_TimerEnable(TIMER0_BASE, TIMER_A); + ROM_TimerEnable(TIMER1_BASE, TIMER_A); + + // + // Loop forever while the timers run. + // + while(1) + { + } +} diff --git a/boards/ek-lm4f120xl/timers/timers.ewd b/boards/ek-lm4f120xl/timers/timers.ewd new file mode 100644 index 0000000..b8eeac7 --- /dev/null +++ b/boards/ek-lm4f120xl/timers/timers.ewd @@ -0,0 +1,614 @@ + + + + 1 + + Debug + + ARM + + 1 + + C-SPY + 2 + + 15 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + ARMSIM_ID + 2 + + 1 + 1 + 1 + + + + + + + + ANGEL_ID + 2 + + 0 + 1 + 1 + + + + + + + + + + + + GDBSERVER_ID + 2 + + 0 + 1 + 1 + + + + + + + + + + + IARROM_ID + 2 + + 0 + 1 + 1 + + + + + + + + + + JLINK_ID + 2 + + 9 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + LMIFTDI_ID + 2 + + 1 + 1 + 1 + + + + + + + + MACRAIGOR_ID + 2 + + 2 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + RDI_ID + 2 + + 1 + 1 + 1 + + + + + + + + + + + + + + + + + THIRDPARTY_ID + 2 + + 0 + 1 + 1 + + + + + + + + + $TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\OSE\OseEpsilonPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\PowerPac\PowerPacRTOS.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin + 0 + + + $EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin + 1 + + + $EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin + 0 + + + $EW_DIR$\common\plugins\Profiling\Profiling.ENU.ewplugin + 1 + + + $EW_DIR$\common\plugins\Stack\Stack.ENU.ewplugin + 1 + + + + diff --git a/boards/ek-lm4f120xl/timers/timers.ewp b/boards/ek-lm4f120xl/timers/timers.ewp new file mode 100644 index 0000000..a734174 --- /dev/null +++ b/boards/ek-lm4f120xl/timers/timers.ewp @@ -0,0 +1,787 @@ + + + + 1 + + Debug + + ARM + + 1 + + General + 3 + + 14 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCARM + 2 + + 19 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AARM + 2 + + 7 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + OBJCOPY + 0 + + 1 + 1 + 1 + + + + + + + + + CUSTOM + 3 + + + + + + + BICOMP + 0 + + + + BUILDACTION + 1 + + + + + + + ILINK + 0 + + 5 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + IARCHIVE + 0 + + 0 + 1 + 1 + + + + + + + BILINK + 0 + + + + + Libraries + + $PROJ_DIR$\..\..\..\driverlib\ewarm-cm4f\Exe\driverlib-cm4f.a + + + + Source + + $PROJ_DIR$\startup_ewarm.c + + + $PROJ_DIR$\timers.c + + + $PROJ_DIR$\..\..\..\utils\uartstdio.c + + + diff --git a/boards/ek-lm4f120xl/timers/timers.icf b/boards/ek-lm4f120xl/timers/timers.icf new file mode 100644 index 0000000..43cabce --- /dev/null +++ b/boards/ek-lm4f120xl/timers/timers.icf @@ -0,0 +1,78 @@ +//***************************************************************************** +// +// timers.icf - Linker configuration file for timers. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +// +// Define a memory region that covers the entire 4 GB addressible space of the +// processor. +// +define memory mem with size = 4G; + +// +// Define a region for the on-chip flash. +// +define region FLASH = mem:[from 0x00000000 to 0x0003ffff]; + +// +// Define a region for the on-chip SRAM. +// +define region SRAM = mem:[from 0x20000000 to 0x20007fff]; + +// +// Define a block for the heap. The size should be set to something other +// than zero if things in the C library that require the heap are used. +// +define block HEAP with alignment = 8, size = 0x00000000 { }; + +// +// Indicate that the read/write values should be initialized by copying from +// flash. +// +initialize by copy { readwrite }; + +// +// Indicate that the noinit values should be left alone. This includes the +// stack, which if initialized will destroy the return address from the +// initialization code, causing the processor to branch to zero and fault. +// +do not initialize { section .noinit }; + +// +// Place the interrupt vectors at the start of flash. +// +place at start of FLASH { readonly section .intvec }; + +// +// Place the remainder of the read-only items into flash. +// +place in FLASH { readonly }; + +// +// Place the RAM vector table at the start of SRAM. +// +place at start of SRAM { section VTABLE }; + +// +// Place all read/write items into SRAM. +// +place in SRAM { readwrite, block HEAP }; diff --git a/boards/ek-lm4f120xl/timers/timers.ld b/boards/ek-lm4f120xl/timers/timers.ld new file mode 100644 index 0000000..01d3424 --- /dev/null +++ b/boards/ek-lm4f120xl/timers/timers.ld @@ -0,0 +1,57 @@ +/****************************************************************************** + * + * timers.ld - Linker configuration file for timers. + * + * Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. + * Software License Agreement + * + * Texas Instruments (TI) is supplying this software for use solely and + * exclusively on TI's microcontroller products. The software is owned by + * TI and/or its suppliers, and is protected under applicable copyright + * laws. You may not combine this software with "viral" open-source + * software in order to form a larger program. + * + * THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. + * NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT + * NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY + * CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL + * DAMAGES, FOR ANY REASON WHATSOEVER. + * + * This is part of revision 9453 of the EK-LM4F120XL Firmware Package. + * + *****************************************************************************/ + +MEMORY +{ + FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x00040000 + SRAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00008000 +} + +SECTIONS +{ + .text : + { + _text = .; + KEEP(*(.isr_vector)) + *(.text*) + *(.rodata*) + _etext = .; + } > FLASH + + .data : AT(ADDR(.text) + SIZEOF(.text)) + { + _data = .; + *(vtable) + *(.data*) + _edata = .; + } > SRAM + + .bss : + { + _bss = .; + *(.bss*) + *(COMMON) + _ebss = .; + } > SRAM +} diff --git a/boards/ek-lm4f120xl/timers/timers.sct b/boards/ek-lm4f120xl/timers/timers.sct new file mode 100644 index 0000000..add0d3b --- /dev/null +++ b/boards/ek-lm4f120xl/timers/timers.sct @@ -0,0 +1,47 @@ +;****************************************************************************** +; +; timers.sct - Linker configuration file for timers. +; +; Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +; Software License Agreement +; +; Texas Instruments (TI) is supplying this software for use solely and +; exclusively on TI's microcontroller products. The software is owned by +; TI and/or its suppliers, and is protected under applicable copyright +; laws. You may not combine this software with "viral" open-source +; software in order to form a larger program. +; +; THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +; NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +; NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +; A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +; CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +; DAMAGES, FOR ANY REASON WHATSOEVER. +; +; This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +; +;****************************************************************************** + +LR_IROM 0x00000000 0x00040000 +{ + ; + ; Specify the Execution Address of the code and the size. + ; + ER_IROM 0x00000000 0x00040000 + { + *.o (RESET, +First) + * (InRoot$$Sections, +RO) + } + + ; + ; Specify the Execution Address of the data area. + ; + RW_IRAM 0x20000000 0x00008000 + { + ; + ; Uncomment the following line in order to use IntRegister(). + ; + ;* (vtable, +First) + * (+RW, +ZI) + } +} diff --git a/boards/ek-lm4f120xl/timers/timers.sgxx b/boards/ek-lm4f120xl/timers/timers.sgxx new file mode 100644 index 0000000..e624753 Binary files /dev/null and b/boards/ek-lm4f120xl/timers/timers.sgxx differ diff --git a/boards/ek-lm4f120xl/timers/timers.uvopt b/boards/ek-lm4f120xl/timers/timers.uvopt new file mode 100644 index 0000000..bef3741 --- /dev/null +++ b/boards/ek-lm4f120xl/timers/timers.uvopt @@ -0,0 +1,303 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + + + + 0 + 0 + + + + timers + 0x4 + ARM-ADS + + 8000000 + + 1 + 1 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\rvmdk\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 255 + + + 0 + Data Sheet + DATASHTS\Luminary\LM4F120H5QR.PDF + + + + SARMCM3.DLL + -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 0 + 1 + 0 + 0 + 4 + + + + + + + + + + + BIN\lmidk-agdi.dll + + + + 0 + lmidk-agdi + -O4614 -S3 -FO29 + + + 0 + DLGTARM + + + + 0 + ARMDBGFLAGS + + + + + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + Source + 1 + 0 + 0 + + 1 + 1 + 2 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + .\startup_rvmdk.S + startup_rvmdk.S + + + 1 + 2 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + .\timers.c + timers.c + + + 1 + 3 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\utils\uartstdio.c + uartstdio.c + + + + + Libraries + 1 + 0 + 0 + + 2 + 4 + 4 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\driverlib\rvmdk-cm4f\driverlib-cm4f.lib + driverlib-cm4f.lib + + + + + Documentation + 1 + 0 + 0 + + 3 + 5 + 5 + 0 + 1 + 0 + 0 + 1 + 1 + 0 + .\readme.txt + readme.txt + + 44 + 0 + 1 + + -1 + -1 + + + -1 + -1 + + + 0 + 0 + 729 + 300 + + + + + + + 1 + 0 + + 100 + 0 + + + .\readme.txt + 0 + 1 + 1 + + + + + + diff --git a/boards/ek-lm4f120xl/timers/timers.uvproj b/boards/ek-lm4f120xl/timers/timers.uvproj new file mode 100644 index 0000000..55afab8 --- /dev/null +++ b/boards/ek-lm4f120xl/timers/timers.uvproj @@ -0,0 +1,429 @@ + + + + 1.1 + +
### uVision Project, (C) Keil Software
+ + + + timers + 0x4 + ARM-ADS + + + LM4F120H5QR + Texas Instruments + IRAM(0x20000000-0x20007FFF) IROM(0-0x3FFFF) CLOCK(8000000) CPUTYPE("Cortex-M4") FPU2 + + "STARTUP\Luminary\Startup.s" ("Luminary Startup Code") + UL2CM3(-O207 -S0 -C0 -FO7 -FD20000000 -FC800 -FN1 -FF0LM4F_256 -FS00 -FL040000) + 5919 + LM4Fxxxx.H + + + + + + + + + + 0 + + + + Luminary\ + Luminary\ + + 0 + 0 + 0 + 0 + 1 + + .\rvmdk\ + timers + 1 + 0 + 0 + 1 + 1 + .\rvmdk\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + + 1 + 0 + fromelf --bin --output .\rvmdk\timers.bin .\rvmdk\timers.axf + + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + + + SARMCM3.DLL + -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + + 1 + 0 + 0 + 0 + 16 + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + + + 1 + 1 + 0 + 1 + 1 + 1 + 0 + 1 + + 0 + 4 + + + + + + + + + + + + + + BIN\lmidk-agdi.dll + + + + + 1 + 0 + 0 + 0 + 1 + 4099 + + BIN\lmidk-agdi.dll + + + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M4" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 2 + 0 + 0 + 8 + 1 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x8000 + + + 1 + 0x0 + 0x40000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x40000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x8000 + + + 0 + 0x0 + 0x0 + + + + + + 0 + 3 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + + + rvmdk PART_LM4F120H5QR TARGET_IS_BLIZZARD_RA1 + + ..\..\..; + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x00000000 + 0x20000000 + timers.sct + + + --entry Reset_Handler + + + + + + + + Source + + + startup_rvmdk.S + 2 + .\startup_rvmdk.S + + + timers.c + 1 + .\timers.c + + + uartstdio.c + 1 + ..\..\..\utils\uartstdio.c + + + + + Libraries + + + driverlib-cm4f.lib + 4 + ..\..\..\driverlib\rvmdk-cm4f\driverlib-cm4f.lib + + + + + Documentation + + + readme.txt + 5 + .\readme.txt + + + + + + + + diff --git a/boards/ek-lm4f120xl/timers/timers_ccs.cmd b/boards/ek-lm4f120xl/timers/timers_ccs.cmd new file mode 100644 index 0000000..54d2b49 --- /dev/null +++ b/boards/ek-lm4f120xl/timers/timers_ccs.cmd @@ -0,0 +1,70 @@ +/****************************************************************************** + * + * timers_ccs.cmd - CCS linker configuration file for timers. + * + * Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. + * Software License Agreement + * + * Texas Instruments (TI) is supplying this software for use solely and + * exclusively on TI's microcontroller products. The software is owned by + * TI and/or its suppliers, and is protected under applicable copyright + * laws. You may not combine this software with "viral" open-source + * software in order to form a larger program. + * + * THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. + * NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT + * NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY + * CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL + * DAMAGES, FOR ANY REASON WHATSOEVER. + * + * This is part of revision 9453 of the EK-LM4F120XL Firmware Package. + * + *****************************************************************************/ + +--retain=g_pfnVectors + +/* The following command line options are set as part of the CCS project. */ +/* If you are building using the command line, or for some reason want to */ +/* define them here, you can uncomment and modify these lines as needed. */ +/* If you are using CCS for building, it is probably better to make any such */ +/* modifications in your CCS project and leave this file alone. */ +/* */ +/* --heap_size=0 */ +/* --stack_size=256 */ +/* --library=rtsv7M3_T_le_eabi.lib */ + +/* The starting address of the application. Normally the interrupt vectors */ +/* must be located at the beginning of the application. */ +#define APP_BASE 0x00000000 +#define RAM_BASE 0x20000000 + +/* System memory map */ + +MEMORY +{ + /* Application stored in and executes from internal flash */ + FLASH (RX) : origin = APP_BASE, length = 0x00040000 + /* Application uses internal RAM for data */ + SRAM (RWX) : origin = 0x20000000, length = 0x00008000 +} + +/* Section allocation in memory */ + +SECTIONS +{ + .intvecs: > APP_BASE + .text : > FLASH + .const : > FLASH + .cinit : > FLASH + .pinit : > FLASH + .init_array : > FLASH + + .vtable : > RAM_BASE + .data : > SRAM + .bss : > SRAM + .sysmem : > SRAM + .stack : > SRAM +} + +__STACK_TOP = __stack + 256; diff --git a/boards/ek-lm4f120xl/timers/timers_sourcerygxx.ld b/boards/ek-lm4f120xl/timers/timers_sourcerygxx.ld new file mode 100644 index 0000000..8d1f748 --- /dev/null +++ b/boards/ek-lm4f120xl/timers/timers_sourcerygxx.ld @@ -0,0 +1,41 @@ +/****************************************************************************** + * + * timers_sourcerygxx.ld - Scatter file for Sourcery CodeBench + * + * Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. + * Software License Agreement + * + * Texas Instruments (TI) is supplying this software for use solely and + * exclusively on TI's microcontroller products. The software is owned by + * TI and/or its suppliers, and is protected under applicable copyright + * laws. You may not combine this software with "viral" open-source + * software in order to form a larger program. + * + * THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. + * NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT + * NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY + * CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL + * DAMAGES, FOR ANY REASON WHATSOEVER. + * + * This is part of revision 9453 of the EK-LM4F120XL Firmware Package. + * + *****************************************************************************/ + +/****************************************************************************** + * + * Define the end of the heap space, which determines the beginning of the + * stack space. + * + *****************************************************************************/ +__cs3_heap_end = __cs3_region_end_ram - 256; + +/****************************************************************************** + * + * Define the interrupt handlers used by the application. + * + *****************************************************************************/ +EXTERN(Timer0IntHandler) +__cs3_isr_timer0a = Timer0IntHandler; +EXTERN(Timer1IntHandler) +__cs3_isr_timer1a = Timer1IntHandler; diff --git a/boards/ek-lm4f120xl/uart_echo/Makefile b/boards/ek-lm4f120xl/uart_echo/Makefile new file mode 100644 index 0000000..77ab48f --- /dev/null +++ b/boards/ek-lm4f120xl/uart_echo/Makefile @@ -0,0 +1,84 @@ +#****************************************************************************** +# +# Makefile - Rules for building the uart_echo example. +# +# Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +# Software License Agreement +# +# Texas Instruments (TI) is supplying this software for use solely and +# exclusively on TI's microcontroller products. The software is owned by +# TI and/or its suppliers, and is protected under applicable copyright +# laws. You may not combine this software with "viral" open-source +# software in order to form a larger program. +# +# THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +# NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +# NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +# A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +# CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +# DAMAGES, FOR ANY REASON WHATSOEVER. +# +# This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +# +#****************************************************************************** + +# +# Defines the part type that this project uses. +# +PART=LM4F120H5QR + +# +# Set the processor variant. +# +VARIANT=cm4f + +# +# The base directory for StellarisWare. +# +ROOT=../../.. + +# +# Include the common make definitions. +# +include ${ROOT}/makedefs + +# +# Where to find header files that do not live in the source directory. +# +IPATH=../../.. + +# +# The default rule, which causes the uart_echo example to be built. +# +all: ${COMPILER} +all: ${COMPILER}/uart_echo.axf + +# +# The rule to clean out all the build products. +# +clean: + @rm -rf ${COMPILER} ${wildcard *~} + +# +# The rule to create the target directory. +# +${COMPILER}: + @mkdir -p ${COMPILER} + +# +# Rules for building the uart_echo example. +# +${COMPILER}/uart_echo.axf: ${COMPILER}/startup_${COMPILER}.o +${COMPILER}/uart_echo.axf: ${COMPILER}/uart_echo.o +${COMPILER}/uart_echo.axf: ${ROOT}/driverlib/${COMPILER}-cm4f/libdriver-cm4f.a +${COMPILER}/uart_echo.axf: uart_echo.ld +SCATTERgcc_uart_echo=uart_echo.ld +ENTRY_uart_echo=ResetISR +CFLAGSgcc=-DTARGET_IS_BLIZZARD_RA1 + +# +# Include the automatically generated dependency files. +# +ifneq (${MAKECMDGOALS},clean) +-include ${wildcard ${COMPILER}/*.d} __dummy__ +endif diff --git a/boards/ek-lm4f120xl/uart_echo/ccs/.ccsimportspec b/boards/ek-lm4f120xl/uart_echo/ccs/.ccsimportspec new file mode 100644 index 0000000..9a02fa9 --- /dev/null +++ b/boards/ek-lm4f120xl/uart_echo/ccs/.ccsimportspec @@ -0,0 +1,8 @@ + + + + + + + + diff --git a/boards/ek-lm4f120xl/uart_echo/ccs/.ccsproject b/boards/ek-lm4f120xl/uart_echo/ccs/.ccsproject new file mode 100644 index 0000000..56793f4 --- /dev/null +++ b/boards/ek-lm4f120xl/uart_echo/ccs/.ccsproject @@ -0,0 +1,12 @@ + + + + + + + + + + + + diff --git a/boards/ek-lm4f120xl/uart_echo/ccs/.cproject b/boards/ek-lm4f120xl/uart_echo/ccs/.cproject new file mode 100644 index 0000000..a24775b --- /dev/null +++ b/boards/ek-lm4f120xl/uart_echo/ccs/.cproject @@ -0,0 +1,191 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/boards/ek-lm4f120xl/uart_echo/ccs/.project b/boards/ek-lm4f120xl/uart_echo/ccs/.project new file mode 100644 index 0000000..3149bdb --- /dev/null +++ b/boards/ek-lm4f120xl/uart_echo/ccs/.project @@ -0,0 +1,106 @@ + + + uart_echo + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + + + ?name? + + + + org.eclipse.cdt.make.core.append_environment + true + + + org.eclipse.cdt.make.core.autoBuildTarget + all + + + org.eclipse.cdt.make.core.buildArguments + -k + + + org.eclipse.cdt.make.core.buildCommand + ${CCS_UTILS_DIR}/bin/gmake + + + org.eclipse.cdt.make.core.buildLocation + ${BuildDirectory} + + + org.eclipse.cdt.make.core.cleanBuildTarget + clean + + + org.eclipse.cdt.make.core.contents + org.eclipse.cdt.make.core.activeConfigSettings + + + org.eclipse.cdt.make.core.enableAutoBuild + true + + + org.eclipse.cdt.make.core.enableCleanBuild + true + + + org.eclipse.cdt.make.core.enableFullBuild + true + + + org.eclipse.cdt.make.core.fullBuildTarget + all + + + org.eclipse.cdt.make.core.stopOnError + false + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + true + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + com.ti.ccstudio.core.ccsNature + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.core.ccnature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + startup_ccs.c + 1 + SW_ROOT/boards/ek-lm4f120xl/uart_echo/startup_ccs.c + + + uart_echo.c + 1 + SW_ROOT/boards/ek-lm4f120xl/uart_echo/uart_echo.c + + + uart_echo_ccs.cmd + 1 + SW_ROOT/boards/ek-lm4f120xl/uart_echo/uart_echo_ccs.cmd + + + + + SW_ROOT + $%7BPARENT-4-PROJECT_LOC%7D + + + diff --git a/boards/ek-lm4f120xl/uart_echo/ccs/.settings/org.eclipse.cdt.codan.core.prefs b/boards/ek-lm4f120xl/uart_echo/ccs/.settings/org.eclipse.cdt.codan.core.prefs new file mode 100644 index 0000000..98b6350 --- /dev/null +++ b/boards/ek-lm4f120xl/uart_echo/ccs/.settings/org.eclipse.cdt.codan.core.prefs @@ -0,0 +1,3 @@ +eclipse.preferences.version=1 +inEditor=false +onBuild=false diff --git a/boards/ek-lm4f120xl/uart_echo/ccs/Debug/uart_echo.bin b/boards/ek-lm4f120xl/uart_echo/ccs/Debug/uart_echo.bin new file mode 100644 index 0000000..a2f484e Binary files /dev/null and b/boards/ek-lm4f120xl/uart_echo/ccs/Debug/uart_echo.bin differ diff --git a/boards/ek-lm4f120xl/uart_echo/ccs/Debug/uart_echo.out b/boards/ek-lm4f120xl/uart_echo/ccs/Debug/uart_echo.out new file mode 100644 index 0000000..7015bdd Binary files /dev/null and b/boards/ek-lm4f120xl/uart_echo/ccs/Debug/uart_echo.out differ diff --git a/boards/ek-lm4f120xl/uart_echo/ccs/macros.ini_initial b/boards/ek-lm4f120xl/uart_echo/ccs/macros.ini_initial new file mode 100644 index 0000000..588017d --- /dev/null +++ b/boards/ek-lm4f120xl/uart_echo/ccs/macros.ini_initial @@ -0,0 +1 @@ +SW_ROOT = ../../../.. diff --git a/boards/ek-lm4f120xl/uart_echo/ccs/target_config.ccxml b/boards/ek-lm4f120xl/uart_echo/ccs/target_config.ccxml new file mode 100644 index 0000000..469eea0 --- /dev/null +++ b/boards/ek-lm4f120xl/uart_echo/ccs/target_config.ccxml @@ -0,0 +1,13 @@ + + + + + + + + + + + + + diff --git a/boards/ek-lm4f120xl/uart_echo/ewarm/Exe/uart_echo.bin b/boards/ek-lm4f120xl/uart_echo/ewarm/Exe/uart_echo.bin new file mode 100644 index 0000000..bf2e984 Binary files /dev/null and b/boards/ek-lm4f120xl/uart_echo/ewarm/Exe/uart_echo.bin differ diff --git a/boards/ek-lm4f120xl/uart_echo/ewarm/Exe/uart_echo.out b/boards/ek-lm4f120xl/uart_echo/ewarm/Exe/uart_echo.out new file mode 100644 index 0000000..09fcdbf Binary files /dev/null and b/boards/ek-lm4f120xl/uart_echo/ewarm/Exe/uart_echo.out differ diff --git a/boards/ek-lm4f120xl/uart_echo/gcc/uart_echo.axf b/boards/ek-lm4f120xl/uart_echo/gcc/uart_echo.axf new file mode 100644 index 0000000..a443afd Binary files /dev/null and b/boards/ek-lm4f120xl/uart_echo/gcc/uart_echo.axf differ diff --git a/boards/ek-lm4f120xl/uart_echo/gcc/uart_echo.bin b/boards/ek-lm4f120xl/uart_echo/gcc/uart_echo.bin new file mode 100644 index 0000000..6c5335c Binary files /dev/null and b/boards/ek-lm4f120xl/uart_echo/gcc/uart_echo.bin differ diff --git a/boards/ek-lm4f120xl/uart_echo/readme.txt b/boards/ek-lm4f120xl/uart_echo/readme.txt new file mode 100644 index 0000000..f219061 --- /dev/null +++ b/boards/ek-lm4f120xl/uart_echo/readme.txt @@ -0,0 +1,26 @@ +UART Echo + +This example application utilizes the UART to echo text. The first UART +(connected to the USB debug virtual serial port on the evaluation board) +will be configured in 115,200 baud, 8-n-1 mode. All characters received on +the UART are transmitted back to the UART. + +------------------------------------------------------------------------------- + +Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +Software License Agreement + +Texas Instruments (TI) is supplying this software for use solely and +exclusively on TI's microcontroller products. The software is owned by +TI and/or its suppliers, and is protected under applicable copyright +laws. You may not combine this software with "viral" open-source +software in order to form a larger program. + +THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +DAMAGES, FOR ANY REASON WHATSOEVER. + +This is part of revision 9453 of the EK-LM4F120XL Firmware Package. diff --git a/boards/ek-lm4f120xl/uart_echo/rvmdk/uart_echo.axf b/boards/ek-lm4f120xl/uart_echo/rvmdk/uart_echo.axf new file mode 100644 index 0000000..deff0e4 Binary files /dev/null and b/boards/ek-lm4f120xl/uart_echo/rvmdk/uart_echo.axf differ diff --git a/boards/ek-lm4f120xl/uart_echo/rvmdk/uart_echo.bin b/boards/ek-lm4f120xl/uart_echo/rvmdk/uart_echo.bin new file mode 100644 index 0000000..6ab974b Binary files /dev/null and b/boards/ek-lm4f120xl/uart_echo/rvmdk/uart_echo.bin differ diff --git a/boards/ek-lm4f120xl/uart_echo/sourcerygxx/uart_echo.axf b/boards/ek-lm4f120xl/uart_echo/sourcerygxx/uart_echo.axf new file mode 100644 index 0000000..93204b1 Binary files /dev/null and b/boards/ek-lm4f120xl/uart_echo/sourcerygxx/uart_echo.axf differ diff --git a/boards/ek-lm4f120xl/uart_echo/sourcerygxx/uart_echo.bin b/boards/ek-lm4f120xl/uart_echo/sourcerygxx/uart_echo.bin new file mode 100644 index 0000000..c04069f Binary files /dev/null and b/boards/ek-lm4f120xl/uart_echo/sourcerygxx/uart_echo.bin differ diff --git a/boards/ek-lm4f120xl/uart_echo/startup_ccs.c b/boards/ek-lm4f120xl/uart_echo/startup_ccs.c new file mode 100644 index 0000000..77faf23 --- /dev/null +++ b/boards/ek-lm4f120xl/uart_echo/startup_ccs.c @@ -0,0 +1,298 @@ +//***************************************************************************** +// +// startup_ccs.c - Startup code for use with TI's Code Composer Studio. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +//***************************************************************************** +// +// Forward declaration of the default fault handlers. +// +//***************************************************************************** +void ResetISR(void); +static void NmiSR(void); +static void FaultISR(void); +static void IntDefaultHandler(void); + +//***************************************************************************** +// +// External declaration for the reset handler that is to be called when the +// processor is started +// +//***************************************************************************** +extern void _c_int00(void); + +//***************************************************************************** +// +// Linker variable that marks the top of the stack. +// +//***************************************************************************** +extern unsigned long __STACK_TOP; + +//***************************************************************************** +// +// External declaration for the interrupt handler used by the application. +// +//***************************************************************************** +extern void UARTIntHandler(void); + +//***************************************************************************** +// +// The vector table. Note that the proper constructs must be placed on this to +// ensure that it ends up at physical address 0x0000.0000 or at the start of +// the program if located at a start address other than 0. +// +//***************************************************************************** +#pragma DATA_SECTION(g_pfnVectors, ".intvecs") +void (* const g_pfnVectors[])(void) = +{ + (void (*)(void))((unsigned long)&__STACK_TOP), + // The initial stack pointer + ResetISR, // The reset handler + NmiSR, // The NMI handler + FaultISR, // The hard fault handler + IntDefaultHandler, // The MPU fault handler + IntDefaultHandler, // The bus fault handler + IntDefaultHandler, // The usage fault handler + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // SVCall handler + IntDefaultHandler, // Debug monitor handler + 0, // Reserved + IntDefaultHandler, // The PendSV handler + IntDefaultHandler, // The SysTick handler + IntDefaultHandler, // GPIO Port A + IntDefaultHandler, // GPIO Port B + IntDefaultHandler, // GPIO Port C + IntDefaultHandler, // GPIO Port D + IntDefaultHandler, // GPIO Port E + UARTIntHandler, // UART0 Rx and Tx + IntDefaultHandler, // UART1 Rx and Tx + IntDefaultHandler, // SSI0 Rx and Tx + IntDefaultHandler, // I2C0 Master and Slave + IntDefaultHandler, // PWM Fault + IntDefaultHandler, // PWM Generator 0 + IntDefaultHandler, // PWM Generator 1 + IntDefaultHandler, // PWM Generator 2 + IntDefaultHandler, // Quadrature Encoder 0 + IntDefaultHandler, // ADC Sequence 0 + IntDefaultHandler, // ADC Sequence 1 + IntDefaultHandler, // ADC Sequence 2 + IntDefaultHandler, // ADC Sequence 3 + IntDefaultHandler, // Watchdog timer + IntDefaultHandler, // Timer 0 subtimer A + IntDefaultHandler, // Timer 0 subtimer B + IntDefaultHandler, // Timer 1 subtimer A + IntDefaultHandler, // Timer 1 subtimer B + IntDefaultHandler, // Timer 2 subtimer A + IntDefaultHandler, // Timer 2 subtimer B + IntDefaultHandler, // Analog Comparator 0 + IntDefaultHandler, // Analog Comparator 1 + IntDefaultHandler, // Analog Comparator 2 + IntDefaultHandler, // System Control (PLL, OSC, BO) + IntDefaultHandler, // FLASH Control + IntDefaultHandler, // GPIO Port F + IntDefaultHandler, // GPIO Port G + IntDefaultHandler, // GPIO Port H + IntDefaultHandler, // UART2 Rx and Tx + IntDefaultHandler, // SSI1 Rx and Tx + IntDefaultHandler, // Timer 3 subtimer A + IntDefaultHandler, // Timer 3 subtimer B + IntDefaultHandler, // I2C1 Master and Slave + IntDefaultHandler, // Quadrature Encoder 1 + IntDefaultHandler, // CAN0 + IntDefaultHandler, // CAN1 + IntDefaultHandler, // CAN2 + IntDefaultHandler, // Ethernet + IntDefaultHandler, // Hibernate + IntDefaultHandler, // USB0 + IntDefaultHandler, // PWM Generator 3 + IntDefaultHandler, // uDMA Software Transfer + IntDefaultHandler, // uDMA Error + IntDefaultHandler, // ADC1 Sequence 0 + IntDefaultHandler, // ADC1 Sequence 1 + IntDefaultHandler, // ADC1 Sequence 2 + IntDefaultHandler, // ADC1 Sequence 3 + IntDefaultHandler, // I2S0 + IntDefaultHandler, // External Bus Interface 0 + IntDefaultHandler, // GPIO Port J + IntDefaultHandler, // GPIO Port K + IntDefaultHandler, // GPIO Port L + IntDefaultHandler, // SSI2 Rx and Tx + IntDefaultHandler, // SSI3 Rx and Tx + IntDefaultHandler, // UART3 Rx and Tx + IntDefaultHandler, // UART4 Rx and Tx + IntDefaultHandler, // UART5 Rx and Tx + IntDefaultHandler, // UART6 Rx and Tx + IntDefaultHandler, // UART7 Rx and Tx + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // I2C2 Master and Slave + IntDefaultHandler, // I2C3 Master and Slave + IntDefaultHandler, // Timer 4 subtimer A + IntDefaultHandler, // Timer 4 subtimer B + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // Timer 5 subtimer A + IntDefaultHandler, // Timer 5 subtimer B + IntDefaultHandler, // Wide Timer 0 subtimer A + IntDefaultHandler, // Wide Timer 0 subtimer B + IntDefaultHandler, // Wide Timer 1 subtimer A + IntDefaultHandler, // Wide Timer 1 subtimer B + IntDefaultHandler, // Wide Timer 2 subtimer A + IntDefaultHandler, // Wide Timer 2 subtimer B + IntDefaultHandler, // Wide Timer 3 subtimer A + IntDefaultHandler, // Wide Timer 3 subtimer B + IntDefaultHandler, // Wide Timer 4 subtimer A + IntDefaultHandler, // Wide Timer 4 subtimer B + IntDefaultHandler, // Wide Timer 5 subtimer A + IntDefaultHandler, // Wide Timer 5 subtimer B + IntDefaultHandler, // FPU + IntDefaultHandler, // PECI 0 + IntDefaultHandler, // LPC 0 + IntDefaultHandler, // I2C4 Master and Slave + IntDefaultHandler, // I2C5 Master and Slave + IntDefaultHandler, // GPIO Port M + IntDefaultHandler, // GPIO Port N + IntDefaultHandler, // Quadrature Encoder 2 + IntDefaultHandler, // Fan 0 + 0, // Reserved + IntDefaultHandler, // GPIO Port P (Summary or P0) + IntDefaultHandler, // GPIO Port P1 + IntDefaultHandler, // GPIO Port P2 + IntDefaultHandler, // GPIO Port P3 + IntDefaultHandler, // GPIO Port P4 + IntDefaultHandler, // GPIO Port P5 + IntDefaultHandler, // GPIO Port P6 + IntDefaultHandler, // GPIO Port P7 + IntDefaultHandler, // GPIO Port Q (Summary or Q0) + IntDefaultHandler, // GPIO Port Q1 + IntDefaultHandler, // GPIO Port Q2 + IntDefaultHandler, // GPIO Port Q3 + IntDefaultHandler, // GPIO Port Q4 + IntDefaultHandler, // GPIO Port Q5 + IntDefaultHandler, // GPIO Port Q6 + IntDefaultHandler, // GPIO Port Q7 + IntDefaultHandler, // GPIO Port R + IntDefaultHandler, // GPIO Port S + IntDefaultHandler, // PWM 1 Generator 0 + IntDefaultHandler, // PWM 1 Generator 1 + IntDefaultHandler, // PWM 1 Generator 2 + IntDefaultHandler, // PWM 1 Generator 3 + IntDefaultHandler // PWM 1 Fault +}; + +//***************************************************************************** +// +// This is the code that gets called when the processor first starts execution +// following a reset event. Only the absolutely necessary set is performed, +// after which the application supplied entry() routine is called. Any fancy +// actions (such as making decisions based on the reset cause register, and +// resetting the bits in that register) are left solely in the hands of the +// application. +// +//***************************************************************************** +void +ResetISR(void) +{ + // + // Jump to the CCS C initialization routine. This will enable the + // floating-point unit as well, so that does not need to be done here. + // + __asm(" .global _c_int00\n" + " b.w _c_int00"); +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a NMI. This +// simply enters an infinite loop, preserving the system state for examination +// by a debugger. +// +//***************************************************************************** +static void +NmiSR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a fault +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +FaultISR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives an unexpected +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +IntDefaultHandler(void) +{ + // + // Go into an infinite loop. + // + while(1) + { + } +} diff --git a/boards/ek-lm4f120xl/uart_echo/startup_ewarm.c b/boards/ek-lm4f120xl/uart_echo/startup_ewarm.c new file mode 100644 index 0000000..a7fc2c8 --- /dev/null +++ b/boards/ek-lm4f120xl/uart_echo/startup_ewarm.c @@ -0,0 +1,332 @@ +//***************************************************************************** +// +// startup_ewarm.c - Startup code for use with IAR's Embedded Workbench, +// version 5. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +#include "inc/hw_nvic.h" +#include "inc/hw_types.h" + +//***************************************************************************** +// +// Enable the IAR extensions for this source file. +// +//***************************************************************************** +#pragma language=extended + +//***************************************************************************** +// +// Forward declaration of the default fault handlers. +// +//***************************************************************************** +void ResetISR(void); +static void NmiSR(void); +static void FaultISR(void); +static void IntDefaultHandler(void); + +//***************************************************************************** +// +// External declaration for the interrupt handler used by the application. +// +//***************************************************************************** +extern void UARTIntHandler(void); + +//***************************************************************************** +// +// The entry point for the application startup code. +// +//***************************************************************************** +extern void __iar_program_start(void); + +//***************************************************************************** +// +// Reserve space for the system stack. +// +//***************************************************************************** +static unsigned long pulStack[64] @ ".noinit"; + +//***************************************************************************** +// +// A union that describes the entries of the vector table. The union is needed +// since the first entry is the stack pointer and the remainder are function +// pointers. +// +//***************************************************************************** +typedef union +{ + void (*pfnHandler)(void); + unsigned long ulPtr; +} +uVectorEntry; + +//***************************************************************************** +// +// The vector table. Note that the proper constructs must be placed on this to +// ensure that it ends up at physical address 0x0000.0000. +// +//***************************************************************************** +__root const uVectorEntry __vector_table[] @ ".intvec" = +{ + { .ulPtr = (unsigned long)pulStack + sizeof(pulStack) }, + // The initial stack pointer + ResetISR, // The reset handler + NmiSR, // The NMI handler + FaultISR, // The hard fault handler + IntDefaultHandler, // The MPU fault handler + IntDefaultHandler, // The bus fault handler + IntDefaultHandler, // The usage fault handler + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // SVCall handler + IntDefaultHandler, // Debug monitor handler + 0, // Reserved + IntDefaultHandler, // The PendSV handler + IntDefaultHandler, // The SysTick handler + IntDefaultHandler, // GPIO Port A + IntDefaultHandler, // GPIO Port B + IntDefaultHandler, // GPIO Port C + IntDefaultHandler, // GPIO Port D + IntDefaultHandler, // GPIO Port E + UARTIntHandler, // UART0 Rx and Tx + IntDefaultHandler, // UART1 Rx and Tx + IntDefaultHandler, // SSI0 Rx and Tx + IntDefaultHandler, // I2C0 Master and Slave + IntDefaultHandler, // PWM Fault + IntDefaultHandler, // PWM Generator 0 + IntDefaultHandler, // PWM Generator 1 + IntDefaultHandler, // PWM Generator 2 + IntDefaultHandler, // Quadrature Encoder 0 + IntDefaultHandler, // ADC Sequence 0 + IntDefaultHandler, // ADC Sequence 1 + IntDefaultHandler, // ADC Sequence 2 + IntDefaultHandler, // ADC Sequence 3 + IntDefaultHandler, // Watchdog timer + IntDefaultHandler, // Timer 0 subtimer A + IntDefaultHandler, // Timer 0 subtimer B + IntDefaultHandler, // Timer 1 subtimer A + IntDefaultHandler, // Timer 1 subtimer B + IntDefaultHandler, // Timer 2 subtimer A + IntDefaultHandler, // Timer 2 subtimer B + IntDefaultHandler, // Analog Comparator 0 + IntDefaultHandler, // Analog Comparator 1 + IntDefaultHandler, // Analog Comparator 2 + IntDefaultHandler, // System Control (PLL, OSC, BO) + IntDefaultHandler, // FLASH Control + IntDefaultHandler, // GPIO Port F + IntDefaultHandler, // GPIO Port G + IntDefaultHandler, // GPIO Port H + IntDefaultHandler, // UART2 Rx and Tx + IntDefaultHandler, // SSI1 Rx and Tx + IntDefaultHandler, // Timer 3 subtimer A + IntDefaultHandler, // Timer 3 subtimer B + IntDefaultHandler, // I2C1 Master and Slave + IntDefaultHandler, // Quadrature Encoder 1 + IntDefaultHandler, // CAN0 + IntDefaultHandler, // CAN1 + IntDefaultHandler, // CAN2 + IntDefaultHandler, // Ethernet + IntDefaultHandler, // Hibernate + IntDefaultHandler, // USB0 + IntDefaultHandler, // PWM Generator 3 + IntDefaultHandler, // uDMA Software Transfer + IntDefaultHandler, // uDMA Error + IntDefaultHandler, // ADC1 Sequence 0 + IntDefaultHandler, // ADC1 Sequence 1 + IntDefaultHandler, // ADC1 Sequence 2 + IntDefaultHandler, // ADC1 Sequence 3 + IntDefaultHandler, // I2S0 + IntDefaultHandler, // External Bus Interface 0 + IntDefaultHandler, // GPIO Port J + IntDefaultHandler, // GPIO Port K + IntDefaultHandler, // GPIO Port L + IntDefaultHandler, // SSI2 Rx and Tx + IntDefaultHandler, // SSI3 Rx and Tx + IntDefaultHandler, // UART3 Rx and Tx + IntDefaultHandler, // UART4 Rx and Tx + IntDefaultHandler, // UART5 Rx and Tx + IntDefaultHandler, // UART6 Rx and Tx + IntDefaultHandler, // UART7 Rx and Tx + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // I2C2 Master and Slave + IntDefaultHandler, // I2C3 Master and Slave + IntDefaultHandler, // Timer 4 subtimer A + IntDefaultHandler, // Timer 4 subtimer B + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // Timer 5 subtimer A + IntDefaultHandler, // Timer 5 subtimer B + IntDefaultHandler, // Wide Timer 0 subtimer A + IntDefaultHandler, // Wide Timer 0 subtimer B + IntDefaultHandler, // Wide Timer 1 subtimer A + IntDefaultHandler, // Wide Timer 1 subtimer B + IntDefaultHandler, // Wide Timer 2 subtimer A + IntDefaultHandler, // Wide Timer 2 subtimer B + IntDefaultHandler, // Wide Timer 3 subtimer A + IntDefaultHandler, // Wide Timer 3 subtimer B + IntDefaultHandler, // Wide Timer 4 subtimer A + IntDefaultHandler, // Wide Timer 4 subtimer B + IntDefaultHandler, // Wide Timer 5 subtimer A + IntDefaultHandler, // Wide Timer 5 subtimer B + IntDefaultHandler, // FPU + IntDefaultHandler, // PECI 0 + IntDefaultHandler, // LPC 0 + IntDefaultHandler, // I2C4 Master and Slave + IntDefaultHandler, // I2C5 Master and Slave + IntDefaultHandler, // GPIO Port M + IntDefaultHandler, // GPIO Port N + IntDefaultHandler, // Quadrature Encoder 2 + IntDefaultHandler, // Fan 0 + 0, // Reserved + IntDefaultHandler, // GPIO Port P (Summary or P0) + IntDefaultHandler, // GPIO Port P1 + IntDefaultHandler, // GPIO Port P2 + IntDefaultHandler, // GPIO Port P3 + IntDefaultHandler, // GPIO Port P4 + IntDefaultHandler, // GPIO Port P5 + IntDefaultHandler, // GPIO Port P6 + IntDefaultHandler, // GPIO Port P7 + IntDefaultHandler, // GPIO Port Q (Summary or Q0) + IntDefaultHandler, // GPIO Port Q1 + IntDefaultHandler, // GPIO Port Q2 + IntDefaultHandler, // GPIO Port Q3 + IntDefaultHandler, // GPIO Port Q4 + IntDefaultHandler, // GPIO Port Q5 + IntDefaultHandler, // GPIO Port Q6 + IntDefaultHandler, // GPIO Port Q7 + IntDefaultHandler, // GPIO Port R + IntDefaultHandler, // GPIO Port S + IntDefaultHandler, // PWM 1 Generator 0 + IntDefaultHandler, // PWM 1 Generator 1 + IntDefaultHandler, // PWM 1 Generator 2 + IntDefaultHandler, // PWM 1 Generator 3 + IntDefaultHandler // PWM 1 Fault +}; + +//***************************************************************************** +// +// This is the code that gets called when the processor first starts execution +// following a reset event. Only the absolutely necessary set is performed, +// after which the application supplied entry() routine is called. Any fancy +// actions (such as making decisions based on the reset cause register, and +// resetting the bits in that register) are left solely in the hands of the +// application. +// +//***************************************************************************** +void +ResetISR(void) +{ + // + // Enable the floating-point unit. This must be done here to handle the + // case where main() uses floating-point and the function prologue saves + // floating-point registers (which will fault if floating-point is not + // enabled). Any configuration of the floating-point unit using DriverLib + // APIs must be done here prior to the floating-point unit being enabled. + // + // Note that this does not use DriverLib since it might not be included in + // this project. + // + HWREG(NVIC_CPAC) = ((HWREG(NVIC_CPAC) & + ~(NVIC_CPAC_CP10_M | NVIC_CPAC_CP11_M)) | + NVIC_CPAC_CP10_FULL | NVIC_CPAC_CP11_FULL); + + // + // Call the application's entry point. + // + __iar_program_start(); +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a NMI. This +// simply enters an infinite loop, preserving the system state for examination +// by a debugger. +// +//***************************************************************************** +static void +NmiSR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a fault +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +FaultISR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives an unexpected +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +IntDefaultHandler(void) +{ + // + // Go into an infinite loop. + // + while(1) + { + } +} diff --git a/boards/ek-lm4f120xl/uart_echo/startup_gcc.c b/boards/ek-lm4f120xl/uart_echo/startup_gcc.c new file mode 100644 index 0000000..68d5502 --- /dev/null +++ b/boards/ek-lm4f120xl/uart_echo/startup_gcc.c @@ -0,0 +1,348 @@ +//***************************************************************************** +// +// startup_gcc.c - Startup code for use with GNU tools. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +#include "inc/hw_nvic.h" +#include "inc/hw_types.h" + +//***************************************************************************** +// +// Forward declaration of the default fault handlers. +// +//***************************************************************************** +void ResetISR(void); +static void NmiSR(void); +static void FaultISR(void); +static void IntDefaultHandler(void); + +//***************************************************************************** +// +// External declaration for the interrupt handler used by the application. +// +//***************************************************************************** +extern void UARTIntHandler(void); + +//***************************************************************************** +// +// The entry point for the application. +// +//***************************************************************************** +extern int main(void); + +//***************************************************************************** +// +// Reserve space for the system stack. +// +//***************************************************************************** +static unsigned long pulStack[64]; + +//***************************************************************************** +// +// The vector table. Note that the proper constructs must be placed on this to +// ensure that it ends up at physical address 0x0000.0000. +// +//***************************************************************************** +__attribute__ ((section(".isr_vector"))) +void (* const g_pfnVectors[])(void) = +{ + (void (*)(void))((unsigned long)pulStack + sizeof(pulStack)), + // The initial stack pointer + ResetISR, // The reset handler + NmiSR, // The NMI handler + FaultISR, // The hard fault handler + IntDefaultHandler, // The MPU fault handler + IntDefaultHandler, // The bus fault handler + IntDefaultHandler, // The usage fault handler + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // SVCall handler + IntDefaultHandler, // Debug monitor handler + 0, // Reserved + IntDefaultHandler, // The PendSV handler + IntDefaultHandler, // The SysTick handler + IntDefaultHandler, // GPIO Port A + IntDefaultHandler, // GPIO Port B + IntDefaultHandler, // GPIO Port C + IntDefaultHandler, // GPIO Port D + IntDefaultHandler, // GPIO Port E + UARTIntHandler, // UART0 Rx and Tx + IntDefaultHandler, // UART1 Rx and Tx + IntDefaultHandler, // SSI0 Rx and Tx + IntDefaultHandler, // I2C0 Master and Slave + IntDefaultHandler, // PWM Fault + IntDefaultHandler, // PWM Generator 0 + IntDefaultHandler, // PWM Generator 1 + IntDefaultHandler, // PWM Generator 2 + IntDefaultHandler, // Quadrature Encoder 0 + IntDefaultHandler, // ADC Sequence 0 + IntDefaultHandler, // ADC Sequence 1 + IntDefaultHandler, // ADC Sequence 2 + IntDefaultHandler, // ADC Sequence 3 + IntDefaultHandler, // Watchdog timer + IntDefaultHandler, // Timer 0 subtimer A + IntDefaultHandler, // Timer 0 subtimer B + IntDefaultHandler, // Timer 1 subtimer A + IntDefaultHandler, // Timer 1 subtimer B + IntDefaultHandler, // Timer 2 subtimer A + IntDefaultHandler, // Timer 2 subtimer B + IntDefaultHandler, // Analog Comparator 0 + IntDefaultHandler, // Analog Comparator 1 + IntDefaultHandler, // Analog Comparator 2 + IntDefaultHandler, // System Control (PLL, OSC, BO) + IntDefaultHandler, // FLASH Control + IntDefaultHandler, // GPIO Port F + IntDefaultHandler, // GPIO Port G + IntDefaultHandler, // GPIO Port H + IntDefaultHandler, // UART2 Rx and Tx + IntDefaultHandler, // SSI1 Rx and Tx + IntDefaultHandler, // Timer 3 subtimer A + IntDefaultHandler, // Timer 3 subtimer B + IntDefaultHandler, // I2C1 Master and Slave + IntDefaultHandler, // Quadrature Encoder 1 + IntDefaultHandler, // CAN0 + IntDefaultHandler, // CAN1 + IntDefaultHandler, // CAN2 + IntDefaultHandler, // Ethernet + IntDefaultHandler, // Hibernate + IntDefaultHandler, // USB0 + IntDefaultHandler, // PWM Generator 3 + IntDefaultHandler, // uDMA Software Transfer + IntDefaultHandler, // uDMA Error + IntDefaultHandler, // ADC1 Sequence 0 + IntDefaultHandler, // ADC1 Sequence 1 + IntDefaultHandler, // ADC1 Sequence 2 + IntDefaultHandler, // ADC1 Sequence 3 + IntDefaultHandler, // I2S0 + IntDefaultHandler, // External Bus Interface 0 + IntDefaultHandler, // GPIO Port J + IntDefaultHandler, // GPIO Port K + IntDefaultHandler, // GPIO Port L + IntDefaultHandler, // SSI2 Rx and Tx + IntDefaultHandler, // SSI3 Rx and Tx + IntDefaultHandler, // UART3 Rx and Tx + IntDefaultHandler, // UART4 Rx and Tx + IntDefaultHandler, // UART5 Rx and Tx + IntDefaultHandler, // UART6 Rx and Tx + IntDefaultHandler, // UART7 Rx and Tx + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // I2C2 Master and Slave + IntDefaultHandler, // I2C3 Master and Slave + IntDefaultHandler, // Timer 4 subtimer A + IntDefaultHandler, // Timer 4 subtimer B + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // Timer 5 subtimer A + IntDefaultHandler, // Timer 5 subtimer B + IntDefaultHandler, // Wide Timer 0 subtimer A + IntDefaultHandler, // Wide Timer 0 subtimer B + IntDefaultHandler, // Wide Timer 1 subtimer A + IntDefaultHandler, // Wide Timer 1 subtimer B + IntDefaultHandler, // Wide Timer 2 subtimer A + IntDefaultHandler, // Wide Timer 2 subtimer B + IntDefaultHandler, // Wide Timer 3 subtimer A + IntDefaultHandler, // Wide Timer 3 subtimer B + IntDefaultHandler, // Wide Timer 4 subtimer A + IntDefaultHandler, // Wide Timer 4 subtimer B + IntDefaultHandler, // Wide Timer 5 subtimer A + IntDefaultHandler, // Wide Timer 5 subtimer B + IntDefaultHandler, // FPU + IntDefaultHandler, // PECI 0 + IntDefaultHandler, // LPC 0 + IntDefaultHandler, // I2C4 Master and Slave + IntDefaultHandler, // I2C5 Master and Slave + IntDefaultHandler, // GPIO Port M + IntDefaultHandler, // GPIO Port N + IntDefaultHandler, // Quadrature Encoder 2 + IntDefaultHandler, // Fan 0 + 0, // Reserved + IntDefaultHandler, // GPIO Port P (Summary or P0) + IntDefaultHandler, // GPIO Port P1 + IntDefaultHandler, // GPIO Port P2 + IntDefaultHandler, // GPIO Port P3 + IntDefaultHandler, // GPIO Port P4 + IntDefaultHandler, // GPIO Port P5 + IntDefaultHandler, // GPIO Port P6 + IntDefaultHandler, // GPIO Port P7 + IntDefaultHandler, // GPIO Port Q (Summary or Q0) + IntDefaultHandler, // GPIO Port Q1 + IntDefaultHandler, // GPIO Port Q2 + IntDefaultHandler, // GPIO Port Q3 + IntDefaultHandler, // GPIO Port Q4 + IntDefaultHandler, // GPIO Port Q5 + IntDefaultHandler, // GPIO Port Q6 + IntDefaultHandler, // GPIO Port Q7 + IntDefaultHandler, // GPIO Port R + IntDefaultHandler, // GPIO Port S + IntDefaultHandler, // PWM 1 Generator 0 + IntDefaultHandler, // PWM 1 Generator 1 + IntDefaultHandler, // PWM 1 Generator 2 + IntDefaultHandler, // PWM 1 Generator 3 + IntDefaultHandler // PWM 1 Fault +}; + +//***************************************************************************** +// +// The following are constructs created by the linker, indicating where the +// the "data" and "bss" segments reside in memory. The initializers for the +// for the "data" segment resides immediately following the "text" segment. +// +//***************************************************************************** +extern unsigned long _etext; +extern unsigned long _data; +extern unsigned long _edata; +extern unsigned long _bss; +extern unsigned long _ebss; + +//***************************************************************************** +// +// This is the code that gets called when the processor first starts execution +// following a reset event. Only the absolutely necessary set is performed, +// after which the application supplied entry() routine is called. Any fancy +// actions (such as making decisions based on the reset cause register, and +// resetting the bits in that register) are left solely in the hands of the +// application. +// +//***************************************************************************** +void +ResetISR(void) +{ + unsigned long *pulSrc, *pulDest; + + // + // Copy the data segment initializers from flash to SRAM. + // + pulSrc = &_etext; + for(pulDest = &_data; pulDest < &_edata; ) + { + *pulDest++ = *pulSrc++; + } + + // + // Zero fill the bss segment. + // + __asm(" ldr r0, =_bss\n" + " ldr r1, =_ebss\n" + " mov r2, #0\n" + " .thumb_func\n" + "zero_loop:\n" + " cmp r0, r1\n" + " it lt\n" + " strlt r2, [r0], #4\n" + " blt zero_loop"); + + // + // Enable the floating-point unit. This must be done here to handle the + // case where main() uses floating-point and the function prologue saves + // floating-point registers (which will fault if floating-point is not + // enabled). Any configuration of the floating-point unit using DriverLib + // APIs must be done here prior to the floating-point unit being enabled. + // + // Note that this does not use DriverLib since it might not be included in + // this project. + // + HWREG(NVIC_CPAC) = ((HWREG(NVIC_CPAC) & + ~(NVIC_CPAC_CP10_M | NVIC_CPAC_CP11_M)) | + NVIC_CPAC_CP10_FULL | NVIC_CPAC_CP11_FULL); + + // + // Call the application's entry point. + // + main(); +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a NMI. This +// simply enters an infinite loop, preserving the system state for examination +// by a debugger. +// +//***************************************************************************** +static void +NmiSR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a fault +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +FaultISR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives an unexpected +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +IntDefaultHandler(void) +{ + // + // Go into an infinite loop. + // + while(1) + { + } +} diff --git a/boards/ek-lm4f120xl/uart_echo/startup_rvmdk.S b/boards/ek-lm4f120xl/uart_echo/startup_rvmdk.S new file mode 100644 index 0000000..4dedad9 --- /dev/null +++ b/boards/ek-lm4f120xl/uart_echo/startup_rvmdk.S @@ -0,0 +1,358 @@ +; <<< Use Configuration Wizard in Context Menu >>> +;****************************************************************************** +; +; startup_rvmdk.S - Startup code for use with Keil's uVision. +; +; Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +; Software License Agreement +; +; Texas Instruments (TI) is supplying this software for use solely and +; exclusively on TI's microcontroller products. The software is owned by +; TI and/or its suppliers, and is protected under applicable copyright +; laws. You may not combine this software with "viral" open-source +; software in order to form a larger program. +; +; THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +; NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +; NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +; A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +; CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +; DAMAGES, FOR ANY REASON WHATSOEVER. +; +; This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +; +;****************************************************************************** + +;****************************************************************************** +; +; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +; +;****************************************************************************** +Stack EQU 0x00000100 + +;****************************************************************************** +; +; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> +; +;****************************************************************************** +Heap EQU 0x00000000 + +;****************************************************************************** +; +; Allocate space for the stack. +; +;****************************************************************************** + AREA STACK, NOINIT, READWRITE, ALIGN=3 +StackMem + SPACE Stack +__initial_sp + +;****************************************************************************** +; +; Allocate space for the heap. +; +;****************************************************************************** + AREA HEAP, NOINIT, READWRITE, ALIGN=3 +__heap_base +HeapMem + SPACE Heap +__heap_limit + +;****************************************************************************** +; +; Indicate that the code in this file preserves 8-byte alignment of the stack. +; +;****************************************************************************** + PRESERVE8 + +;****************************************************************************** +; +; Place code into the reset code section. +; +;****************************************************************************** + AREA RESET, CODE, READONLY + THUMB + +;****************************************************************************** +; +; External declaration for the interrupt handler used by the application. +; +;****************************************************************************** + EXTERN UARTIntHandler + +;****************************************************************************** +; +; The vector table. +; +;****************************************************************************** + EXPORT __Vectors +__Vectors + DCD StackMem + Stack ; Top of Stack + DCD Reset_Handler ; Reset Handler + DCD NmiSR ; NMI Handler + DCD FaultISR ; Hard Fault Handler + DCD IntDefaultHandler ; The MPU fault handler + DCD IntDefaultHandler ; The bus fault handler + DCD IntDefaultHandler ; The usage fault handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD IntDefaultHandler ; SVCall handler + DCD IntDefaultHandler ; Debug monitor handler + DCD 0 ; Reserved + DCD IntDefaultHandler ; The PendSV handler + DCD IntDefaultHandler ; The SysTick handler + DCD IntDefaultHandler ; GPIO Port A + DCD IntDefaultHandler ; GPIO Port B + DCD IntDefaultHandler ; GPIO Port C + DCD IntDefaultHandler ; GPIO Port D + DCD IntDefaultHandler ; GPIO Port E + DCD UARTIntHandler ; UART0 Rx and Tx + DCD IntDefaultHandler ; UART1 Rx and Tx + DCD IntDefaultHandler ; SSI0 Rx and Tx + DCD IntDefaultHandler ; I2C0 Master and Slave + DCD IntDefaultHandler ; PWM Fault + DCD IntDefaultHandler ; PWM Generator 0 + DCD IntDefaultHandler ; PWM Generator 1 + DCD IntDefaultHandler ; PWM Generator 2 + DCD IntDefaultHandler ; Quadrature Encoder 0 + DCD IntDefaultHandler ; ADC Sequence 0 + DCD IntDefaultHandler ; ADC Sequence 1 + DCD IntDefaultHandler ; ADC Sequence 2 + DCD IntDefaultHandler ; ADC Sequence 3 + DCD IntDefaultHandler ; Watchdog timer + DCD IntDefaultHandler ; Timer 0 subtimer A + DCD IntDefaultHandler ; Timer 0 subtimer B + DCD IntDefaultHandler ; Timer 1 subtimer A + DCD IntDefaultHandler ; Timer 1 subtimer B + DCD IntDefaultHandler ; Timer 2 subtimer A + DCD IntDefaultHandler ; Timer 2 subtimer B + DCD IntDefaultHandler ; Analog Comparator 0 + DCD IntDefaultHandler ; Analog Comparator 1 + DCD IntDefaultHandler ; Analog Comparator 2 + DCD IntDefaultHandler ; System Control (PLL, OSC, BO) + DCD IntDefaultHandler ; FLASH Control + DCD IntDefaultHandler ; GPIO Port F + DCD IntDefaultHandler ; GPIO Port G + DCD IntDefaultHandler ; GPIO Port H + DCD IntDefaultHandler ; UART2 Rx and Tx + DCD IntDefaultHandler ; SSI1 Rx and Tx + DCD IntDefaultHandler ; Timer 3 subtimer A + DCD IntDefaultHandler ; Timer 3 subtimer B + DCD IntDefaultHandler ; I2C1 Master and Slave + DCD IntDefaultHandler ; Quadrature Encoder 1 + DCD IntDefaultHandler ; CAN0 + DCD IntDefaultHandler ; CAN1 + DCD IntDefaultHandler ; CAN2 + DCD IntDefaultHandler ; Ethernet + DCD IntDefaultHandler ; Hibernate + DCD IntDefaultHandler ; USB0 + DCD IntDefaultHandler ; PWM Generator 3 + DCD IntDefaultHandler ; uDMA Software Transfer + DCD IntDefaultHandler ; uDMA Error + DCD IntDefaultHandler ; ADC1 Sequence 0 + DCD IntDefaultHandler ; ADC1 Sequence 1 + DCD IntDefaultHandler ; ADC1 Sequence 2 + DCD IntDefaultHandler ; ADC1 Sequence 3 + DCD IntDefaultHandler ; I2S0 + DCD IntDefaultHandler ; External Bus Interface 0 + DCD IntDefaultHandler ; GPIO Port J + DCD IntDefaultHandler ; GPIO Port K + DCD IntDefaultHandler ; GPIO Port L + DCD IntDefaultHandler ; SSI2 Rx and Tx + DCD IntDefaultHandler ; SSI3 Rx and Tx + DCD IntDefaultHandler ; UART3 Rx and Tx + DCD IntDefaultHandler ; UART4 Rx and Tx + DCD IntDefaultHandler ; UART5 Rx and Tx + DCD IntDefaultHandler ; UART6 Rx and Tx + DCD IntDefaultHandler ; UART7 Rx and Tx + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD IntDefaultHandler ; I2C2 Master and Slave + DCD IntDefaultHandler ; I2C3 Master and Slave + DCD IntDefaultHandler ; Timer 4 subtimer A + DCD IntDefaultHandler ; Timer 4 subtimer B + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD IntDefaultHandler ; Timer 5 subtimer A + DCD IntDefaultHandler ; Timer 5 subtimer B + DCD IntDefaultHandler ; Wide Timer 0 subtimer A + DCD IntDefaultHandler ; Wide Timer 0 subtimer B + DCD IntDefaultHandler ; Wide Timer 1 subtimer A + DCD IntDefaultHandler ; Wide Timer 1 subtimer B + DCD IntDefaultHandler ; Wide Timer 2 subtimer A + DCD IntDefaultHandler ; Wide Timer 2 subtimer B + DCD IntDefaultHandler ; Wide Timer 3 subtimer A + DCD IntDefaultHandler ; Wide Timer 3 subtimer B + DCD IntDefaultHandler ; Wide Timer 4 subtimer A + DCD IntDefaultHandler ; Wide Timer 4 subtimer B + DCD IntDefaultHandler ; Wide Timer 5 subtimer A + DCD IntDefaultHandler ; Wide Timer 5 subtimer B + DCD IntDefaultHandler ; FPU + DCD IntDefaultHandler ; PECI 0 + DCD IntDefaultHandler ; LPC 0 + DCD IntDefaultHandler ; I2C4 Master and Slave + DCD IntDefaultHandler ; I2C5 Master and Slave + DCD IntDefaultHandler ; GPIO Port M + DCD IntDefaultHandler ; GPIO Port N + DCD IntDefaultHandler ; Quadrature Encoder 2 + DCD IntDefaultHandler ; Fan 0 + DCD 0 ; Reserved + DCD IntDefaultHandler ; GPIO Port P (Summary or P0) + DCD IntDefaultHandler ; GPIO Port P1 + DCD IntDefaultHandler ; GPIO Port P2 + DCD IntDefaultHandler ; GPIO Port P3 + DCD IntDefaultHandler ; GPIO Port P4 + DCD IntDefaultHandler ; GPIO Port P5 + DCD IntDefaultHandler ; GPIO Port P6 + DCD IntDefaultHandler ; GPIO Port P7 + DCD IntDefaultHandler ; GPIO Port Q (Summary or Q0) + DCD IntDefaultHandler ; GPIO Port Q1 + DCD IntDefaultHandler ; GPIO Port Q2 + DCD IntDefaultHandler ; GPIO Port Q3 + DCD IntDefaultHandler ; GPIO Port Q4 + DCD IntDefaultHandler ; GPIO Port Q5 + DCD IntDefaultHandler ; GPIO Port Q6 + DCD IntDefaultHandler ; GPIO Port Q7 + DCD IntDefaultHandler ; GPIO Port R + DCD IntDefaultHandler ; GPIO Port S + DCD IntDefaultHandler ; PWM 1 Generator 0 + DCD IntDefaultHandler ; PWM 1 Generator 1 + DCD IntDefaultHandler ; PWM 1 Generator 2 + DCD IntDefaultHandler ; PWM 1 Generator 3 + DCD IntDefaultHandler ; PWM 1 Fault + +;****************************************************************************** +; +; This is the code that gets called when the processor first starts execution +; following a reset event. +; +;****************************************************************************** + EXPORT Reset_Handler +Reset_Handler + ; + ; Enable the floating-point unit. This must be done here to handle the + ; case where main() uses floating-point and the function prologue saves + ; floating-point registers (which will fault if floating-point is not + ; enabled). Any configuration of the floating-point unit using + ; DriverLib APIs must be done here prior to the floating-point unit + ; being enabled. + ; + ; Note that this does not use DriverLib since it might not be included + ; in this project. + ; + MOVW R0, #0xED88 + MOVT R0, #0xE000 + LDR R1, [R0] + ORR R1, #0x00F00000 + STR R1, [R0] + + ; + ; Call the C library enty point that handles startup. This will copy + ; the .data section initializers from flash to SRAM and zero fill the + ; .bss section. + ; + IMPORT __main + B __main + +;****************************************************************************** +; +; This is the code that gets called when the processor receives a NMI. This +; simply enters an infinite loop, preserving the system state for examination +; by a debugger. +; +;****************************************************************************** +NmiSR + B NmiSR + +;****************************************************************************** +; +; This is the code that gets called when the processor receives a fault +; interrupt. This simply enters an infinite loop, preserving the system state +; for examination by a debugger. +; +;****************************************************************************** +FaultISR + B FaultISR + +;****************************************************************************** +; +; This is the code that gets called when the processor receives an unexpected +; interrupt. This simply enters an infinite loop, preserving the system state +; for examination by a debugger. +; +;****************************************************************************** +IntDefaultHandler + B IntDefaultHandler + +;****************************************************************************** +; +; Make sure the end of this section is aligned. +; +;****************************************************************************** + ALIGN + +;****************************************************************************** +; +; Some code in the normal code section for initializing the heap and stack. +; +;****************************************************************************** + AREA |.text|, CODE, READONLY + +;****************************************************************************** +; +; The function expected of the C library startup code for defining the stack +; and heap memory locations. For the C library version of the startup code, +; provide this function so that the C library initialization code can find out +; the location of the stack and heap. +; +;****************************************************************************** + IF :DEF: __MICROLIB + EXPORT __initial_sp + EXPORT __heap_base + EXPORT __heap_limit + ELSE + IMPORT __use_two_region_memory + EXPORT __user_initial_stackheap +__user_initial_stackheap + LDR R0, =HeapMem + LDR R1, =(StackMem + Stack) + LDR R2, =(HeapMem + Heap) + LDR R3, =StackMem + BX LR + ENDIF + +;****************************************************************************** +; +; Make sure the end of this section is aligned. +; +;****************************************************************************** + ALIGN + +;****************************************************************************** +; +; Tell the assembler that we're done. +; +;****************************************************************************** + END diff --git a/boards/ek-lm4f120xl/uart_echo/startup_sourcerygxx.S b/boards/ek-lm4f120xl/uart_echo/startup_sourcerygxx.S new file mode 100644 index 0000000..b720839 --- /dev/null +++ b/boards/ek-lm4f120xl/uart_echo/startup_sourcerygxx.S @@ -0,0 +1,75 @@ +//***************************************************************************** +// +// startup_sourcerygxx.S - Startup code for Sourcery CodeBench. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + + .syntax unified + .thumb + +//***************************************************************************** +// +// Place this code into the .cs3.reset section so that it can be executed prior +// to the startup code in Sourcery CodeBench. +// +//***************************************************************************** + .section .cs3.reset,"x" + +//***************************************************************************** +// +// The reset handler, which overrides the one provided by CS3. +// +//***************************************************************************** + .globl __cs3_reset + .thumb_func +__cs3_reset: + // + // Enable the floating-point unit. This must be done here to handle the + // case where main() uses floating-point and the function prologue saves + // floating-point registers (which will fault if floating-point is not + // enabled). Any configuration of the floating-point unit using DriverLib + // APIs must be done here prior to the floating-point unit being enabled. + // + // Note that this does not use DriverLib since it might not be included in + // this project. + // + movw r0, #0xed88 + movt r0, #0xe000 + ldr r1, [r0] + orr r1, #0x00f00000 + str r1, [r0] + + // + // Branch to the normal CS3 startup code. + // + .extern __cs3_reset_ekc_lm4f232 + ldr r0, =__cs3_reset_ekc_lm4f232 + bx r0 + + // + // Place the literal pool here. + // + .ltorg + + // + // The end of the file. + // + .end diff --git a/boards/ek-lm4f120xl/uart_echo/uart_echo.c b/boards/ek-lm4f120xl/uart_echo/uart_echo.c new file mode 100644 index 0000000..f9527a2 --- /dev/null +++ b/boards/ek-lm4f120xl/uart_echo/uart_echo.c @@ -0,0 +1,206 @@ +//***************************************************************************** +// +// uart_echo.c - Example for reading data from and writing data to the UART in +// an interrupt driven fashion. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +#include "inc/hw_ints.h" +#include "inc/hw_memmap.h" +#include "inc/hw_types.h" +#include "driverlib/debug.h" +#include "driverlib/fpu.h" +#include "driverlib/gpio.h" +#include "driverlib/interrupt.h" +#include "driverlib/pin_map.h" +#include "driverlib/rom.h" +#include "driverlib/sysctl.h" +#include "driverlib/uart.h" + +//***************************************************************************** +// +//! \addtogroup example_list +//!

UART Echo (uart_echo)

+//! +//! This example application utilizes the UART to echo text. The first UART +//! (connected to the USB debug virtual serial port on the evaluation board) +//! will be configured in 115,200 baud, 8-n-1 mode. All characters received on +//! the UART are transmitted back to the UART. +// +//***************************************************************************** + + +//***************************************************************************** +// +// The error routine that is called if the driver library encounters an error. +// +//***************************************************************************** +#ifdef DEBUG +void +__error__(char *pcFilename, unsigned long ulLine) +{ +} +#endif + +//***************************************************************************** +// +// The UART interrupt handler. +// +//***************************************************************************** +void +UARTIntHandler(void) +{ + unsigned long ulStatus; + + // + // Get the interrrupt status. + // + ulStatus = ROM_UARTIntStatus(UART0_BASE, true); + + // + // Clear the asserted interrupts. + // + ROM_UARTIntClear(UART0_BASE, ulStatus); + + // + // Loop while there are characters in the receive FIFO. + // + while(ROM_UARTCharsAvail(UART0_BASE)) + { + // + // Read the next character from the UART and write it back to the UART. + // + ROM_UARTCharPutNonBlocking(UART0_BASE, + ROM_UARTCharGetNonBlocking(UART0_BASE)); + + // + // Blink the LED to show a character transfer is occuring. + // + GPIOPinWrite(GPIO_PORTF_BASE, GPIO_PIN_2, GPIO_PIN_2); + + // + // Delay for 1 millisecond. Each SysCtlDelay is about 3 clocks. + // + SysCtlDelay(SysCtlClockGet() / (1000 * 3)); + + // + // Turn off the LED + // + GPIOPinWrite(GPIO_PORTF_BASE, GPIO_PIN_2, 0); + + } +} + +//***************************************************************************** +// +// Send a string to the UART. +// +//***************************************************************************** +void +UARTSend(const unsigned char *pucBuffer, unsigned long ulCount) +{ + // + // Loop while there are more characters to send. + // + while(ulCount--) + { + // + // Write the next character to the UART. + // + ROM_UARTCharPutNonBlocking(UART0_BASE, *pucBuffer++); + } +} + +//***************************************************************************** +// +// This example demonstrates how to send a string of data to the UART. +// +//***************************************************************************** +int +main(void) +{ + // + // Enable lazy stacking for interrupt handlers. This allows floating-point + // instructions to be used within interrupt handlers, but at the expense of + // extra stack usage. + // + ROM_FPUEnable(); + ROM_FPULazyStackingEnable(); + + // + // Set the clocking to run directly from the crystal. + // + ROM_SysCtlClockSet(SYSCTL_SYSDIV_1 | SYSCTL_USE_OSC | SYSCTL_OSC_MAIN | + SYSCTL_XTAL_16MHZ); + + // + // Enable the GPIO port that is used for the on-board LED. + // + ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOF); + + // + // Enable the GPIO pins for the LED (PF2). + // + ROM_GPIOPinTypeGPIOOutput(GPIO_PORTF_BASE, GPIO_PIN_2); + + // + // Enable the peripherals used by this example. + // + ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_UART0); + ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA); + + // + // Enable processor interrupts. + // + ROM_IntMasterEnable(); + + // + // Set GPIO A0 and A1 as UART pins. + // + GPIOPinConfigure(GPIO_PA0_U0RX); + GPIOPinConfigure(GPIO_PA1_U0TX); + ROM_GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_1); + + // + // Configure the UART for 115,200, 8-N-1 operation. + // + ROM_UARTConfigSetExpClk(UART0_BASE, ROM_SysCtlClockGet(), 115200, + (UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE | + UART_CONFIG_PAR_NONE)); + + // + // Enable the UART interrupt. + // + ROM_IntEnable(INT_UART0); + ROM_UARTIntEnable(UART0_BASE, UART_INT_RX | UART_INT_RT); + + // + // Prompt for text to be entered. + // + UARTSend((unsigned char *)"\033[2JEnter text: ", 16); + + // + // Loop forever echoing data through the UART. + // + while(1) + { + } +} diff --git a/boards/ek-lm4f120xl/uart_echo/uart_echo.ewd b/boards/ek-lm4f120xl/uart_echo/uart_echo.ewd new file mode 100644 index 0000000..b8eeac7 --- /dev/null +++ b/boards/ek-lm4f120xl/uart_echo/uart_echo.ewd @@ -0,0 +1,614 @@ + + + + 1 + + Debug + + ARM + + 1 + + C-SPY + 2 + + 15 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + ARMSIM_ID + 2 + + 1 + 1 + 1 + + + + + + + + ANGEL_ID + 2 + + 0 + 1 + 1 + + + + + + + + + + + + GDBSERVER_ID + 2 + + 0 + 1 + 1 + + + + + + + + + + + IARROM_ID + 2 + + 0 + 1 + 1 + + + + + + + + + + JLINK_ID + 2 + + 9 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + LMIFTDI_ID + 2 + + 1 + 1 + 1 + + + + + + + + MACRAIGOR_ID + 2 + + 2 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + RDI_ID + 2 + + 1 + 1 + 1 + + + + + + + + + + + + + + + + + THIRDPARTY_ID + 2 + + 0 + 1 + 1 + + + + + + + + + $TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\OSE\OseEpsilonPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\PowerPac\PowerPacRTOS.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin + 0 + + + $EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin + 1 + + + $EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin + 0 + + + $EW_DIR$\common\plugins\Profiling\Profiling.ENU.ewplugin + 1 + + + $EW_DIR$\common\plugins\Stack\Stack.ENU.ewplugin + 1 + + + + diff --git a/boards/ek-lm4f120xl/uart_echo/uart_echo.ewp b/boards/ek-lm4f120xl/uart_echo/uart_echo.ewp new file mode 100644 index 0000000..430d99c --- /dev/null +++ b/boards/ek-lm4f120xl/uart_echo/uart_echo.ewp @@ -0,0 +1,784 @@ + + + + 1 + + Debug + + ARM + + 1 + + General + 3 + + 14 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCARM + 2 + + 19 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AARM + 2 + + 7 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + OBJCOPY + 0 + + 1 + 1 + 1 + + + + + + + + + CUSTOM + 3 + + + + + + + BICOMP + 0 + + + + BUILDACTION + 1 + + + + + + + ILINK + 0 + + 5 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + IARCHIVE + 0 + + 0 + 1 + 1 + + + + + + + BILINK + 0 + + + + + Libraries + + $PROJ_DIR$\..\..\..\driverlib\ewarm-cm4f\Exe\driverlib-cm4f.a + + + + Source + + $PROJ_DIR$\startup_ewarm.c + + + $PROJ_DIR$\uart_echo.c + + + diff --git a/boards/ek-lm4f120xl/uart_echo/uart_echo.icf b/boards/ek-lm4f120xl/uart_echo/uart_echo.icf new file mode 100644 index 0000000..135fb76 --- /dev/null +++ b/boards/ek-lm4f120xl/uart_echo/uart_echo.icf @@ -0,0 +1,78 @@ +//***************************************************************************** +// +// uart_echo.icf - Linker configuration file for uart_echo. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +// +// Define a memory region that covers the entire 4 GB addressible space of the +// processor. +// +define memory mem with size = 4G; + +// +// Define a region for the on-chip flash. +// +define region FLASH = mem:[from 0x00000000 to 0x0003ffff]; + +// +// Define a region for the on-chip SRAM. +// +define region SRAM = mem:[from 0x20000000 to 0x20007fff]; + +// +// Define a block for the heap. The size should be set to something other +// than zero if things in the C library that require the heap are used. +// +define block HEAP with alignment = 8, size = 0x00000000 { }; + +// +// Indicate that the read/write values should be initialized by copying from +// flash. +// +initialize by copy { readwrite }; + +// +// Indicate that the noinit values should be left alone. This includes the +// stack, which if initialized will destroy the return address from the +// initialization code, causing the processor to branch to zero and fault. +// +do not initialize { section .noinit }; + +// +// Place the interrupt vectors at the start of flash. +// +place at start of FLASH { readonly section .intvec }; + +// +// Place the remainder of the read-only items into flash. +// +place in FLASH { readonly }; + +// +// Place the RAM vector table at the start of SRAM. +// +place at start of SRAM { section VTABLE }; + +// +// Place all read/write items into SRAM. +// +place in SRAM { readwrite, block HEAP }; diff --git a/boards/ek-lm4f120xl/uart_echo/uart_echo.ld b/boards/ek-lm4f120xl/uart_echo/uart_echo.ld new file mode 100644 index 0000000..998dde6 --- /dev/null +++ b/boards/ek-lm4f120xl/uart_echo/uart_echo.ld @@ -0,0 +1,57 @@ +/****************************************************************************** + * + * uart_echo.ld - Linker configuration file for uart_echo. + * + * Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. + * Software License Agreement + * + * Texas Instruments (TI) is supplying this software for use solely and + * exclusively on TI's microcontroller products. The software is owned by + * TI and/or its suppliers, and is protected under applicable copyright + * laws. You may not combine this software with "viral" open-source + * software in order to form a larger program. + * + * THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. + * NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT + * NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY + * CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL + * DAMAGES, FOR ANY REASON WHATSOEVER. + * + * This is part of revision 9453 of the EK-LM4F120XL Firmware Package. + * + *****************************************************************************/ + +MEMORY +{ + FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x00040000 + SRAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00008000 +} + +SECTIONS +{ + .text : + { + _text = .; + KEEP(*(.isr_vector)) + *(.text*) + *(.rodata*) + _etext = .; + } > FLASH + + .data : AT(ADDR(.text) + SIZEOF(.text)) + { + _data = .; + *(vtable) + *(.data*) + _edata = .; + } > SRAM + + .bss : + { + _bss = .; + *(.bss*) + *(COMMON) + _ebss = .; + } > SRAM +} diff --git a/boards/ek-lm4f120xl/uart_echo/uart_echo.sct b/boards/ek-lm4f120xl/uart_echo/uart_echo.sct new file mode 100644 index 0000000..4ddc46b --- /dev/null +++ b/boards/ek-lm4f120xl/uart_echo/uart_echo.sct @@ -0,0 +1,47 @@ +;****************************************************************************** +; +; uart_echo.sct - Linker configuration file for uart_echo. +; +; Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +; Software License Agreement +; +; Texas Instruments (TI) is supplying this software for use solely and +; exclusively on TI's microcontroller products. The software is owned by +; TI and/or its suppliers, and is protected under applicable copyright +; laws. You may not combine this software with "viral" open-source +; software in order to form a larger program. +; +; THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +; NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +; NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +; A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +; CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +; DAMAGES, FOR ANY REASON WHATSOEVER. +; +; This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +; +;****************************************************************************** + +LR_IROM 0x00000000 0x00040000 +{ + ; + ; Specify the Execution Address of the code and the size. + ; + ER_IROM 0x00000000 0x00040000 + { + *.o (RESET, +First) + * (InRoot$$Sections, +RO) + } + + ; + ; Specify the Execution Address of the data area. + ; + RW_IRAM 0x20000000 0x00008000 + { + ; + ; Uncomment the following line in order to use IntRegister(). + ; + ;* (vtable, +First) + * (+RW, +ZI) + } +} diff --git a/boards/ek-lm4f120xl/uart_echo/uart_echo.sgxx b/boards/ek-lm4f120xl/uart_echo/uart_echo.sgxx new file mode 100644 index 0000000..5ee9c03 Binary files /dev/null and b/boards/ek-lm4f120xl/uart_echo/uart_echo.sgxx differ diff --git a/boards/ek-lm4f120xl/uart_echo/uart_echo.uvopt b/boards/ek-lm4f120xl/uart_echo/uart_echo.uvopt new file mode 100644 index 0000000..e1d2d82 --- /dev/null +++ b/boards/ek-lm4f120xl/uart_echo/uart_echo.uvopt @@ -0,0 +1,289 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + + + + 0 + 0 + + + + uart_echo + 0x4 + ARM-ADS + + 8000000 + + 1 + 1 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\rvmdk\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 255 + + + 0 + Data Sheet + DATASHTS\Luminary\LM4F120H5QR.PDF + + + + SARMCM3.DLL + -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 0 + 1 + 0 + 0 + 4 + + + + + + + + + + + BIN\lmidk-agdi.dll + + + + 0 + lmidk-agdi + -O4614 -S3 -FO29 + + + 0 + DLGTARM + + + + 0 + ARMDBGFLAGS + + + + + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + Source + 1 + 0 + 0 + + 1 + 1 + 2 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + .\startup_rvmdk.S + startup_rvmdk.S + + + 1 + 2 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + .\uart_echo.c + uart_echo.c + + + + + Libraries + 1 + 0 + 0 + + 2 + 3 + 4 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\driverlib\rvmdk-cm4f\driverlib-cm4f.lib + driverlib-cm4f.lib + + + + + Documentation + 1 + 0 + 0 + + 3 + 4 + 5 + 0 + 1 + 0 + 0 + 1 + 1 + 0 + .\readme.txt + readme.txt + + 44 + 0 + 1 + + -1 + -1 + + + -1 + -1 + + + 0 + 0 + 729 + 300 + + + + + + + 1 + 0 + + 100 + 0 + + + .\readme.txt + 0 + 1 + 1 + + + + + + diff --git a/boards/ek-lm4f120xl/uart_echo/uart_echo.uvproj b/boards/ek-lm4f120xl/uart_echo/uart_echo.uvproj new file mode 100644 index 0000000..cb68de6 --- /dev/null +++ b/boards/ek-lm4f120xl/uart_echo/uart_echo.uvproj @@ -0,0 +1,424 @@ + + + + 1.1 + +
### uVision Project, (C) Keil Software
+ + + + uart_echo + 0x4 + ARM-ADS + + + LM4F120H5QR + Texas Instruments + IRAM(0x20000000-0x20007FFF) IROM(0-0x3FFFF) CLOCK(8000000) CPUTYPE("Cortex-M4") FPU2 + + "STARTUP\Luminary\Startup.s" ("Luminary Startup Code") + UL2CM3(-O207 -S0 -C0 -FO7 -FD20000000 -FC800 -FN1 -FF0LM4F_256 -FS00 -FL040000) + 5919 + LM4Fxxxx.H + + + + + + + + + + 0 + + + + Luminary\ + Luminary\ + + 0 + 0 + 0 + 0 + 1 + + .\rvmdk\ + uart_echo + 1 + 0 + 0 + 1 + 1 + .\rvmdk\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + + 1 + 0 + fromelf --bin --output .\rvmdk\uart_echo.bin .\rvmdk\uart_echo.axf + + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + + + SARMCM3.DLL + -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + + 1 + 0 + 0 + 0 + 16 + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + + + 1 + 1 + 0 + 1 + 1 + 1 + 0 + 1 + + 0 + 4 + + + + + + + + + + + + + + BIN\lmidk-agdi.dll + + + + + 1 + 0 + 0 + 0 + 1 + 4099 + + BIN\lmidk-agdi.dll + + + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M4" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 2 + 0 + 0 + 8 + 1 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x8000 + + + 1 + 0x0 + 0x40000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x40000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x8000 + + + 0 + 0x0 + 0x0 + + + + + + 0 + 3 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + + + rvmdk PART_LM4F120H5QR TARGET_IS_BLIZZARD_RA1 + + ..\..\..; + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x00000000 + 0x20000000 + uart_echo.sct + + + --entry Reset_Handler + + + + + + + + Source + + + startup_rvmdk.S + 2 + .\startup_rvmdk.S + + + uart_echo.c + 1 + .\uart_echo.c + + + + + Libraries + + + driverlib-cm4f.lib + 4 + ..\..\..\driverlib\rvmdk-cm4f\driverlib-cm4f.lib + + + + + Documentation + + + readme.txt + 5 + .\readme.txt + + + + + + + + diff --git a/boards/ek-lm4f120xl/uart_echo/uart_echo_ccs.cmd b/boards/ek-lm4f120xl/uart_echo/uart_echo_ccs.cmd new file mode 100644 index 0000000..016ced0 --- /dev/null +++ b/boards/ek-lm4f120xl/uart_echo/uart_echo_ccs.cmd @@ -0,0 +1,70 @@ +/****************************************************************************** + * + * uart_echo_ccs.cmd - CCS linker configuration file for uart_echo. + * + * Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. + * Software License Agreement + * + * Texas Instruments (TI) is supplying this software for use solely and + * exclusively on TI's microcontroller products. The software is owned by + * TI and/or its suppliers, and is protected under applicable copyright + * laws. You may not combine this software with "viral" open-source + * software in order to form a larger program. + * + * THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. + * NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT + * NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY + * CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL + * DAMAGES, FOR ANY REASON WHATSOEVER. + * + * This is part of revision 9453 of the EK-LM4F120XL Firmware Package. + * + *****************************************************************************/ + +--retain=g_pfnVectors + +/* The following command line options are set as part of the CCS project. */ +/* If you are building using the command line, or for some reason want to */ +/* define them here, you can uncomment and modify these lines as needed. */ +/* If you are using CCS for building, it is probably better to make any such */ +/* modifications in your CCS project and leave this file alone. */ +/* */ +/* --heap_size=0 */ +/* --stack_size=256 */ +/* --library=rtsv7M3_T_le_eabi.lib */ + +/* The starting address of the application. Normally the interrupt vectors */ +/* must be located at the beginning of the application. */ +#define APP_BASE 0x00000000 +#define RAM_BASE 0x20000000 + +/* System memory map */ + +MEMORY +{ + /* Application stored in and executes from internal flash */ + FLASH (RX) : origin = APP_BASE, length = 0x00040000 + /* Application uses internal RAM for data */ + SRAM (RWX) : origin = 0x20000000, length = 0x00008000 +} + +/* Section allocation in memory */ + +SECTIONS +{ + .intvecs: > APP_BASE + .text : > FLASH + .const : > FLASH + .cinit : > FLASH + .pinit : > FLASH + .init_array : > FLASH + + .vtable : > RAM_BASE + .data : > SRAM + .bss : > SRAM + .sysmem : > SRAM + .stack : > SRAM +} + +__STACK_TOP = __stack + 256; diff --git a/boards/ek-lm4f120xl/uart_echo/uart_echo_sourcerygxx.ld b/boards/ek-lm4f120xl/uart_echo/uart_echo_sourcerygxx.ld new file mode 100644 index 0000000..26dab30 --- /dev/null +++ b/boards/ek-lm4f120xl/uart_echo/uart_echo_sourcerygxx.ld @@ -0,0 +1,39 @@ +/****************************************************************************** + * + * uart_echo_sourcerygxx.ld - Scatter file for Sourcery CodeBench + * + * Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. + * Software License Agreement + * + * Texas Instruments (TI) is supplying this software for use solely and + * exclusively on TI's microcontroller products. The software is owned by + * TI and/or its suppliers, and is protected under applicable copyright + * laws. You may not combine this software with "viral" open-source + * software in order to form a larger program. + * + * THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. + * NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT + * NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY + * CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL + * DAMAGES, FOR ANY REASON WHATSOEVER. + * + * This is part of revision 9453 of the EK-LM4F120XL Firmware Package. + * + *****************************************************************************/ + +/****************************************************************************** + * + * Define the end of the heap space, which determines the beginning of the + * stack space. + * + *****************************************************************************/ +__cs3_heap_end = __cs3_region_end_ram - 256; + +/****************************************************************************** + * + * Define the interrupt handlers used by the application. + * + *****************************************************************************/ +EXTERN(UARTIntHandler) +__cs3_isr_uart0 = UARTIntHandler; diff --git a/boards/ek-lm4f120xl/udma_demo/Makefile b/boards/ek-lm4f120xl/udma_demo/Makefile new file mode 100644 index 0000000..bdd0342 --- /dev/null +++ b/boards/ek-lm4f120xl/udma_demo/Makefile @@ -0,0 +1,92 @@ +#****************************************************************************** +# +# Makefile - Rules for building the uDMA example. +# +# Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +# Software License Agreement +# +# Texas Instruments (TI) is supplying this software for use solely and +# exclusively on TI's microcontroller products. The software is owned by +# TI and/or its suppliers, and is protected under applicable copyright +# laws. You may not combine this software with "viral" open-source +# software in order to form a larger program. +# +# THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +# NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +# NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +# A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +# CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +# DAMAGES, FOR ANY REASON WHATSOEVER. +# +# This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +# +#****************************************************************************** + +# +# Defines the part type that this project uses. +# +PART=LM4F120H5QR + +# +# Set the processor variant. +# +VARIANT=cm4f + +# +# The base directory for StellarisWare. +# +ROOT=../../.. + +# +# Include the common make definitions. +# +include ${ROOT}/makedefs + +# +# Where to find source files that do not live in this directory. +# +VPATH=../../../utils + +# +# Where to find header files that do not live in the source directory. +# +IPATH=../../.. + +# +# The default rule, which causes the uDMA example to be built. +# +all: ${COMPILER} +all: ${COMPILER}/udma_demo.axf + +# +# The rule to clean out all the build products. +# +clean: + @rm -rf ${COMPILER} ${wildcard *~} + +# +# The rule to create the target directory. +# +${COMPILER}: + @mkdir -p ${COMPILER} + +# +# Rules for building the uDMA example. +# +${COMPILER}/udma_demo.axf: ${COMPILER}/cpu_usage.o +${COMPILER}/udma_demo.axf: ${COMPILER}/startup_${COMPILER}.o +${COMPILER}/udma_demo.axf: ${COMPILER}/uartstdio.o +${COMPILER}/udma_demo.axf: ${COMPILER}/udma_demo.o +${COMPILER}/udma_demo.axf: ${COMPILER}/ustdlib.o +${COMPILER}/udma_demo.axf: ${ROOT}/driverlib/${COMPILER}-cm4f/libdriver-cm4f.a +${COMPILER}/udma_demo.axf: udma_demo.ld +SCATTERgcc_udma_demo=udma_demo.ld +ENTRY_udma_demo=ResetISR +CFLAGSgcc=-DTARGET_IS_BLIZZARD_RA1 + +# +# Include the automatically generated dependency files. +# +ifneq (${MAKECMDGOALS},clean) +-include ${wildcard ${COMPILER}/*.d} __dummy__ +endif diff --git a/boards/ek-lm4f120xl/udma_demo/ccs/.ccsimportspec b/boards/ek-lm4f120xl/udma_demo/ccs/.ccsimportspec new file mode 100644 index 0000000..aea8941 --- /dev/null +++ b/boards/ek-lm4f120xl/udma_demo/ccs/.ccsimportspec @@ -0,0 +1,8 @@ + + + + + + + + diff --git a/boards/ek-lm4f120xl/udma_demo/ccs/.ccsproject b/boards/ek-lm4f120xl/udma_demo/ccs/.ccsproject new file mode 100644 index 0000000..56793f4 --- /dev/null +++ b/boards/ek-lm4f120xl/udma_demo/ccs/.ccsproject @@ -0,0 +1,12 @@ + + + + + + + + + + + + diff --git a/boards/ek-lm4f120xl/udma_demo/ccs/.cproject b/boards/ek-lm4f120xl/udma_demo/ccs/.cproject new file mode 100644 index 0000000..c620990 --- /dev/null +++ b/boards/ek-lm4f120xl/udma_demo/ccs/.cproject @@ -0,0 +1,191 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/boards/ek-lm4f120xl/udma_demo/ccs/.project b/boards/ek-lm4f120xl/udma_demo/ccs/.project new file mode 100644 index 0000000..8b44508 --- /dev/null +++ b/boards/ek-lm4f120xl/udma_demo/ccs/.project @@ -0,0 +1,121 @@ + + + udma_demo + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + + + ?name? + + + + org.eclipse.cdt.make.core.append_environment + true + + + org.eclipse.cdt.make.core.autoBuildTarget + all + + + org.eclipse.cdt.make.core.buildArguments + -k + + + org.eclipse.cdt.make.core.buildCommand + ${CCS_UTILS_DIR}/bin/gmake + + + org.eclipse.cdt.make.core.buildLocation + ${BuildDirectory} + + + org.eclipse.cdt.make.core.cleanBuildTarget + clean + + + org.eclipse.cdt.make.core.contents + org.eclipse.cdt.make.core.activeConfigSettings + + + org.eclipse.cdt.make.core.enableAutoBuild + true + + + org.eclipse.cdt.make.core.enableCleanBuild + true + + + org.eclipse.cdt.make.core.enableFullBuild + true + + + org.eclipse.cdt.make.core.fullBuildTarget + all + + + org.eclipse.cdt.make.core.stopOnError + false + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + true + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + com.ti.ccstudio.core.ccsNature + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.core.ccnature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + startup_ccs.c + 1 + SW_ROOT/boards/ek-lm4f120xl/udma_demo/startup_ccs.c + + + udma_demo.c + 1 + SW_ROOT/boards/ek-lm4f120xl/udma_demo/udma_demo.c + + + udma_demo_ccs.cmd + 1 + SW_ROOT/boards/ek-lm4f120xl/udma_demo/udma_demo_ccs.cmd + + + utils/cpu_usage.c + 1 + SW_ROOT/utils/cpu_usage.c + + + utils/uartstdio.c + 1 + SW_ROOT/utils/uartstdio.c + + + utils/ustdlib.c + 1 + SW_ROOT/utils/ustdlib.c + + + + + SW_ROOT + $%7BPARENT-4-PROJECT_LOC%7D + + + diff --git a/boards/ek-lm4f120xl/udma_demo/ccs/.settings/org.eclipse.cdt.codan.core.prefs b/boards/ek-lm4f120xl/udma_demo/ccs/.settings/org.eclipse.cdt.codan.core.prefs new file mode 100644 index 0000000..98b6350 --- /dev/null +++ b/boards/ek-lm4f120xl/udma_demo/ccs/.settings/org.eclipse.cdt.codan.core.prefs @@ -0,0 +1,3 @@ +eclipse.preferences.version=1 +inEditor=false +onBuild=false diff --git a/boards/ek-lm4f120xl/udma_demo/ccs/Debug/udma_demo.bin b/boards/ek-lm4f120xl/udma_demo/ccs/Debug/udma_demo.bin new file mode 100644 index 0000000..c15a143 Binary files /dev/null and b/boards/ek-lm4f120xl/udma_demo/ccs/Debug/udma_demo.bin differ diff --git a/boards/ek-lm4f120xl/udma_demo/ccs/Debug/udma_demo.out b/boards/ek-lm4f120xl/udma_demo/ccs/Debug/udma_demo.out new file mode 100644 index 0000000..b21b3a3 Binary files /dev/null and b/boards/ek-lm4f120xl/udma_demo/ccs/Debug/udma_demo.out differ diff --git a/boards/ek-lm4f120xl/udma_demo/ccs/macros.ini_initial b/boards/ek-lm4f120xl/udma_demo/ccs/macros.ini_initial new file mode 100644 index 0000000..588017d --- /dev/null +++ b/boards/ek-lm4f120xl/udma_demo/ccs/macros.ini_initial @@ -0,0 +1 @@ +SW_ROOT = ../../../.. diff --git a/boards/ek-lm4f120xl/udma_demo/ccs/target_config.ccxml b/boards/ek-lm4f120xl/udma_demo/ccs/target_config.ccxml new file mode 100644 index 0000000..469eea0 --- /dev/null +++ b/boards/ek-lm4f120xl/udma_demo/ccs/target_config.ccxml @@ -0,0 +1,13 @@ + + + + + + + + + + + + + diff --git a/boards/ek-lm4f120xl/udma_demo/ewarm/Exe/udma_demo.bin b/boards/ek-lm4f120xl/udma_demo/ewarm/Exe/udma_demo.bin new file mode 100644 index 0000000..59839a6 Binary files /dev/null and b/boards/ek-lm4f120xl/udma_demo/ewarm/Exe/udma_demo.bin differ diff --git a/boards/ek-lm4f120xl/udma_demo/ewarm/Exe/udma_demo.out b/boards/ek-lm4f120xl/udma_demo/ewarm/Exe/udma_demo.out new file mode 100644 index 0000000..33be40a Binary files /dev/null and b/boards/ek-lm4f120xl/udma_demo/ewarm/Exe/udma_demo.out differ diff --git a/boards/ek-lm4f120xl/udma_demo/gcc/udma_demo.axf b/boards/ek-lm4f120xl/udma_demo/gcc/udma_demo.axf new file mode 100644 index 0000000..c062f3b Binary files /dev/null and b/boards/ek-lm4f120xl/udma_demo/gcc/udma_demo.axf differ diff --git a/boards/ek-lm4f120xl/udma_demo/gcc/udma_demo.bin b/boards/ek-lm4f120xl/udma_demo/gcc/udma_demo.bin new file mode 100644 index 0000000..34bf263 Binary files /dev/null and b/boards/ek-lm4f120xl/udma_demo/gcc/udma_demo.bin differ diff --git a/boards/ek-lm4f120xl/udma_demo/readme.txt b/boards/ek-lm4f120xl/udma_demo/readme.txt new file mode 100644 index 0000000..e3c44e8 --- /dev/null +++ b/boards/ek-lm4f120xl/udma_demo/readme.txt @@ -0,0 +1,28 @@ +uDMA + +This example application demonstrates the use of the uDMA controller to +transfer data between memory buffers, and to transfer data to and from a +UART. The test runs for 10 seconds before exiting. + +UART0, connected to the FTDI virtual COM port and running at 115,200, +8-N-1, is used to display messages from this application. + +------------------------------------------------------------------------------- + +Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +Software License Agreement + +Texas Instruments (TI) is supplying this software for use solely and +exclusively on TI's microcontroller products. The software is owned by +TI and/or its suppliers, and is protected under applicable copyright +laws. You may not combine this software with "viral" open-source +software in order to form a larger program. + +THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +DAMAGES, FOR ANY REASON WHATSOEVER. + +This is part of revision 9453 of the EK-LM4F120XL Firmware Package. diff --git a/boards/ek-lm4f120xl/udma_demo/rvmdk/udma_demo.axf b/boards/ek-lm4f120xl/udma_demo/rvmdk/udma_demo.axf new file mode 100644 index 0000000..50cfae6 Binary files /dev/null and b/boards/ek-lm4f120xl/udma_demo/rvmdk/udma_demo.axf differ diff --git a/boards/ek-lm4f120xl/udma_demo/rvmdk/udma_demo.bin b/boards/ek-lm4f120xl/udma_demo/rvmdk/udma_demo.bin new file mode 100644 index 0000000..16b56c1 Binary files /dev/null and b/boards/ek-lm4f120xl/udma_demo/rvmdk/udma_demo.bin differ diff --git a/boards/ek-lm4f120xl/udma_demo/sourcerygxx/udma_demo.axf b/boards/ek-lm4f120xl/udma_demo/sourcerygxx/udma_demo.axf new file mode 100644 index 0000000..7d27d0e Binary files /dev/null and b/boards/ek-lm4f120xl/udma_demo/sourcerygxx/udma_demo.axf differ diff --git a/boards/ek-lm4f120xl/udma_demo/sourcerygxx/udma_demo.bin b/boards/ek-lm4f120xl/udma_demo/sourcerygxx/udma_demo.bin new file mode 100644 index 0000000..0bcca96 Binary files /dev/null and b/boards/ek-lm4f120xl/udma_demo/sourcerygxx/udma_demo.bin differ diff --git a/boards/ek-lm4f120xl/udma_demo/startup_ccs.c b/boards/ek-lm4f120xl/udma_demo/startup_ccs.c new file mode 100644 index 0000000..1c439d7 --- /dev/null +++ b/boards/ek-lm4f120xl/udma_demo/startup_ccs.c @@ -0,0 +1,301 @@ +//***************************************************************************** +// +// startup_ccs.c - Startup code for use with TI's Code Composer Studio. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +//***************************************************************************** +// +// Forward declaration of the default fault handlers. +// +//***************************************************************************** +void ResetISR(void); +static void NmiSR(void); +static void FaultISR(void); +static void IntDefaultHandler(void); + +//***************************************************************************** +// +// External declaration for the reset handler that is to be called when the +// processor is started +// +//***************************************************************************** +extern void _c_int00(void); + +//***************************************************************************** +// +// Linker variable that marks the top of the stack. +// +//***************************************************************************** +extern unsigned long __STACK_TOP; + +//***************************************************************************** +// +// External declarations for the interrupt handlers used by the application. +// +//***************************************************************************** +extern void SysTickHandler(void); +extern void UART1IntHandler(void); +extern void uDMAIntHandler(void); +extern void uDMAErrorHandler(void); + +//***************************************************************************** +// +// The vector table. Note that the proper constructs must be placed on this to +// ensure that it ends up at physical address 0x0000.0000 or at the start of +// the program if located at a start address other than 0. +// +//***************************************************************************** +#pragma DATA_SECTION(g_pfnVectors, ".intvecs") +void (* const g_pfnVectors[])(void) = +{ + (void (*)(void))((unsigned long)&__STACK_TOP), + // The initial stack pointer + ResetISR, // The reset handler + NmiSR, // The NMI handler + FaultISR, // The hard fault handler + IntDefaultHandler, // The MPU fault handler + IntDefaultHandler, // The bus fault handler + IntDefaultHandler, // The usage fault handler + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // SVCall handler + IntDefaultHandler, // Debug monitor handler + 0, // Reserved + IntDefaultHandler, // The PendSV handler + SysTickHandler, // The SysTick handler + IntDefaultHandler, // GPIO Port A + IntDefaultHandler, // GPIO Port B + IntDefaultHandler, // GPIO Port C + IntDefaultHandler, // GPIO Port D + IntDefaultHandler, // GPIO Port E + IntDefaultHandler, // UART0 Rx and Tx + UART1IntHandler, // UART1 Rx and Tx + IntDefaultHandler, // SSI0 Rx and Tx + IntDefaultHandler, // I2C0 Master and Slave + IntDefaultHandler, // PWM Fault + IntDefaultHandler, // PWM Generator 0 + IntDefaultHandler, // PWM Generator 1 + IntDefaultHandler, // PWM Generator 2 + IntDefaultHandler, // Quadrature Encoder 0 + IntDefaultHandler, // ADC Sequence 0 + IntDefaultHandler, // ADC Sequence 1 + IntDefaultHandler, // ADC Sequence 2 + IntDefaultHandler, // ADC Sequence 3 + IntDefaultHandler, // Watchdog timer + IntDefaultHandler, // Timer 0 subtimer A + IntDefaultHandler, // Timer 0 subtimer B + IntDefaultHandler, // Timer 1 subtimer A + IntDefaultHandler, // Timer 1 subtimer B + IntDefaultHandler, // Timer 2 subtimer A + IntDefaultHandler, // Timer 2 subtimer B + IntDefaultHandler, // Analog Comparator 0 + IntDefaultHandler, // Analog Comparator 1 + IntDefaultHandler, // Analog Comparator 2 + IntDefaultHandler, // System Control (PLL, OSC, BO) + IntDefaultHandler, // FLASH Control + IntDefaultHandler, // GPIO Port F + IntDefaultHandler, // GPIO Port G + IntDefaultHandler, // GPIO Port H + IntDefaultHandler, // UART2 Rx and Tx + IntDefaultHandler, // SSI1 Rx and Tx + IntDefaultHandler, // Timer 3 subtimer A + IntDefaultHandler, // Timer 3 subtimer B + IntDefaultHandler, // I2C1 Master and Slave + IntDefaultHandler, // Quadrature Encoder 1 + IntDefaultHandler, // CAN0 + IntDefaultHandler, // CAN1 + IntDefaultHandler, // CAN2 + IntDefaultHandler, // Ethernet + IntDefaultHandler, // Hibernate + IntDefaultHandler, // USB0 + IntDefaultHandler, // PWM Generator 3 + uDMAIntHandler, // uDMA Software Transfer + uDMAErrorHandler, // uDMA Error + IntDefaultHandler, // ADC1 Sequence 0 + IntDefaultHandler, // ADC1 Sequence 1 + IntDefaultHandler, // ADC1 Sequence 2 + IntDefaultHandler, // ADC1 Sequence 3 + IntDefaultHandler, // I2S0 + IntDefaultHandler, // External Bus Interface 0 + IntDefaultHandler, // GPIO Port J + IntDefaultHandler, // GPIO Port K + IntDefaultHandler, // GPIO Port L + IntDefaultHandler, // SSI2 Rx and Tx + IntDefaultHandler, // SSI3 Rx and Tx + IntDefaultHandler, // UART3 Rx and Tx + IntDefaultHandler, // UART4 Rx and Tx + IntDefaultHandler, // UART5 Rx and Tx + IntDefaultHandler, // UART6 Rx and Tx + IntDefaultHandler, // UART7 Rx and Tx + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // I2C2 Master and Slave + IntDefaultHandler, // I2C3 Master and Slave + IntDefaultHandler, // Timer 4 subtimer A + IntDefaultHandler, // Timer 4 subtimer B + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // Timer 5 subtimer A + IntDefaultHandler, // Timer 5 subtimer B + IntDefaultHandler, // Wide Timer 0 subtimer A + IntDefaultHandler, // Wide Timer 0 subtimer B + IntDefaultHandler, // Wide Timer 1 subtimer A + IntDefaultHandler, // Wide Timer 1 subtimer B + IntDefaultHandler, // Wide Timer 2 subtimer A + IntDefaultHandler, // Wide Timer 2 subtimer B + IntDefaultHandler, // Wide Timer 3 subtimer A + IntDefaultHandler, // Wide Timer 3 subtimer B + IntDefaultHandler, // Wide Timer 4 subtimer A + IntDefaultHandler, // Wide Timer 4 subtimer B + IntDefaultHandler, // Wide Timer 5 subtimer A + IntDefaultHandler, // Wide Timer 5 subtimer B + IntDefaultHandler, // FPU + IntDefaultHandler, // PECI 0 + IntDefaultHandler, // LPC 0 + IntDefaultHandler, // I2C4 Master and Slave + IntDefaultHandler, // I2C5 Master and Slave + IntDefaultHandler, // GPIO Port M + IntDefaultHandler, // GPIO Port N + IntDefaultHandler, // Quadrature Encoder 2 + IntDefaultHandler, // Fan 0 + 0, // Reserved + IntDefaultHandler, // GPIO Port P (Summary or P0) + IntDefaultHandler, // GPIO Port P1 + IntDefaultHandler, // GPIO Port P2 + IntDefaultHandler, // GPIO Port P3 + IntDefaultHandler, // GPIO Port P4 + IntDefaultHandler, // GPIO Port P5 + IntDefaultHandler, // GPIO Port P6 + IntDefaultHandler, // GPIO Port P7 + IntDefaultHandler, // GPIO Port Q (Summary or Q0) + IntDefaultHandler, // GPIO Port Q1 + IntDefaultHandler, // GPIO Port Q2 + IntDefaultHandler, // GPIO Port Q3 + IntDefaultHandler, // GPIO Port Q4 + IntDefaultHandler, // GPIO Port Q5 + IntDefaultHandler, // GPIO Port Q6 + IntDefaultHandler, // GPIO Port Q7 + IntDefaultHandler, // GPIO Port R + IntDefaultHandler, // GPIO Port S + IntDefaultHandler, // PWM 1 Generator 0 + IntDefaultHandler, // PWM 1 Generator 1 + IntDefaultHandler, // PWM 1 Generator 2 + IntDefaultHandler, // PWM 1 Generator 3 + IntDefaultHandler // PWM 1 Fault +}; + +//***************************************************************************** +// +// This is the code that gets called when the processor first starts execution +// following a reset event. Only the absolutely necessary set is performed, +// after which the application supplied entry() routine is called. Any fancy +// actions (such as making decisions based on the reset cause register, and +// resetting the bits in that register) are left solely in the hands of the +// application. +// +//***************************************************************************** +void +ResetISR(void) +{ + // + // Jump to the CCS C initialization routine. This will enable the + // floating-point unit as well, so that does not need to be done here. + // + __asm(" .global _c_int00\n" + " b.w _c_int00"); +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a NMI. This +// simply enters an infinite loop, preserving the system state for examination +// by a debugger. +// +//***************************************************************************** +static void +NmiSR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a fault +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +FaultISR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives an unexpected +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +IntDefaultHandler(void) +{ + // + // Go into an infinite loop. + // + while(1) + { + } +} diff --git a/boards/ek-lm4f120xl/udma_demo/startup_ewarm.c b/boards/ek-lm4f120xl/udma_demo/startup_ewarm.c new file mode 100644 index 0000000..1c9f6e6 --- /dev/null +++ b/boards/ek-lm4f120xl/udma_demo/startup_ewarm.c @@ -0,0 +1,335 @@ +//***************************************************************************** +// +// startup_ewarm.c - Startup code for use with IAR's Embedded Workbench, +// version 5. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +#include "inc/hw_nvic.h" +#include "inc/hw_types.h" + +//***************************************************************************** +// +// Enable the IAR extensions for this source file. +// +//***************************************************************************** +#pragma language=extended + +//***************************************************************************** +// +// Forward declaration of the default fault handlers. +// +//***************************************************************************** +void ResetISR(void); +static void NmiSR(void); +static void FaultISR(void); +static void IntDefaultHandler(void); + +//***************************************************************************** +// +// External declarations for the interrupt handlers used by the application. +// +//***************************************************************************** +extern void SysTickHandler(void); +extern void UART1IntHandler(void); +extern void uDMAIntHandler(void); +extern void uDMAErrorHandler(void); + +//***************************************************************************** +// +// The entry point for the application startup code. +// +//***************************************************************************** +extern void __iar_program_start(void); + +//***************************************************************************** +// +// Reserve space for the system stack. +// +//***************************************************************************** +static unsigned long pulStack[256] @ ".noinit"; + +//***************************************************************************** +// +// A union that describes the entries of the vector table. The union is needed +// since the first entry is the stack pointer and the remainder are function +// pointers. +// +//***************************************************************************** +typedef union +{ + void (*pfnHandler)(void); + unsigned long ulPtr; +} +uVectorEntry; + +//***************************************************************************** +// +// The vector table. Note that the proper constructs must be placed on this to +// ensure that it ends up at physical address 0x0000.0000. +// +//***************************************************************************** +__root const uVectorEntry __vector_table[] @ ".intvec" = +{ + { .ulPtr = (unsigned long)pulStack + sizeof(pulStack) }, + // The initial stack pointer + ResetISR, // The reset handler + NmiSR, // The NMI handler + FaultISR, // The hard fault handler + IntDefaultHandler, // The MPU fault handler + IntDefaultHandler, // The bus fault handler + IntDefaultHandler, // The usage fault handler + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // SVCall handler + IntDefaultHandler, // Debug monitor handler + 0, // Reserved + IntDefaultHandler, // The PendSV handler + SysTickHandler, // The SysTick handler + IntDefaultHandler, // GPIO Port A + IntDefaultHandler, // GPIO Port B + IntDefaultHandler, // GPIO Port C + IntDefaultHandler, // GPIO Port D + IntDefaultHandler, // GPIO Port E + IntDefaultHandler, // UART0 Rx and Tx + UART1IntHandler, // UART1 Rx and Tx + IntDefaultHandler, // SSI0 Rx and Tx + IntDefaultHandler, // I2C0 Master and Slave + IntDefaultHandler, // PWM Fault + IntDefaultHandler, // PWM Generator 0 + IntDefaultHandler, // PWM Generator 1 + IntDefaultHandler, // PWM Generator 2 + IntDefaultHandler, // Quadrature Encoder 0 + IntDefaultHandler, // ADC Sequence 0 + IntDefaultHandler, // ADC Sequence 1 + IntDefaultHandler, // ADC Sequence 2 + IntDefaultHandler, // ADC Sequence 3 + IntDefaultHandler, // Watchdog timer + IntDefaultHandler, // Timer 0 subtimer A + IntDefaultHandler, // Timer 0 subtimer B + IntDefaultHandler, // Timer 1 subtimer A + IntDefaultHandler, // Timer 1 subtimer B + IntDefaultHandler, // Timer 2 subtimer A + IntDefaultHandler, // Timer 2 subtimer B + IntDefaultHandler, // Analog Comparator 0 + IntDefaultHandler, // Analog Comparator 1 + IntDefaultHandler, // Analog Comparator 2 + IntDefaultHandler, // System Control (PLL, OSC, BO) + IntDefaultHandler, // FLASH Control + IntDefaultHandler, // GPIO Port F + IntDefaultHandler, // GPIO Port G + IntDefaultHandler, // GPIO Port H + IntDefaultHandler, // UART2 Rx and Tx + IntDefaultHandler, // SSI1 Rx and Tx + IntDefaultHandler, // Timer 3 subtimer A + IntDefaultHandler, // Timer 3 subtimer B + IntDefaultHandler, // I2C1 Master and Slave + IntDefaultHandler, // Quadrature Encoder 1 + IntDefaultHandler, // CAN0 + IntDefaultHandler, // CAN1 + IntDefaultHandler, // CAN2 + IntDefaultHandler, // Ethernet + IntDefaultHandler, // Hibernate + IntDefaultHandler, // USB0 + IntDefaultHandler, // PWM Generator 3 + uDMAIntHandler, // uDMA Software Transfer + uDMAErrorHandler, // uDMA Error + IntDefaultHandler, // ADC1 Sequence 0 + IntDefaultHandler, // ADC1 Sequence 1 + IntDefaultHandler, // ADC1 Sequence 2 + IntDefaultHandler, // ADC1 Sequence 3 + IntDefaultHandler, // I2S0 + IntDefaultHandler, // External Bus Interface 0 + IntDefaultHandler, // GPIO Port J + IntDefaultHandler, // GPIO Port K + IntDefaultHandler, // GPIO Port L + IntDefaultHandler, // SSI2 Rx and Tx + IntDefaultHandler, // SSI3 Rx and Tx + IntDefaultHandler, // UART3 Rx and Tx + IntDefaultHandler, // UART4 Rx and Tx + IntDefaultHandler, // UART5 Rx and Tx + IntDefaultHandler, // UART6 Rx and Tx + IntDefaultHandler, // UART7 Rx and Tx + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // I2C2 Master and Slave + IntDefaultHandler, // I2C3 Master and Slave + IntDefaultHandler, // Timer 4 subtimer A + IntDefaultHandler, // Timer 4 subtimer B + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // Timer 5 subtimer A + IntDefaultHandler, // Timer 5 subtimer B + IntDefaultHandler, // Wide Timer 0 subtimer A + IntDefaultHandler, // Wide Timer 0 subtimer B + IntDefaultHandler, // Wide Timer 1 subtimer A + IntDefaultHandler, // Wide Timer 1 subtimer B + IntDefaultHandler, // Wide Timer 2 subtimer A + IntDefaultHandler, // Wide Timer 2 subtimer B + IntDefaultHandler, // Wide Timer 3 subtimer A + IntDefaultHandler, // Wide Timer 3 subtimer B + IntDefaultHandler, // Wide Timer 4 subtimer A + IntDefaultHandler, // Wide Timer 4 subtimer B + IntDefaultHandler, // Wide Timer 5 subtimer A + IntDefaultHandler, // Wide Timer 5 subtimer B + IntDefaultHandler, // FPU + IntDefaultHandler, // PECI 0 + IntDefaultHandler, // LPC 0 + IntDefaultHandler, // I2C4 Master and Slave + IntDefaultHandler, // I2C5 Master and Slave + IntDefaultHandler, // GPIO Port M + IntDefaultHandler, // GPIO Port N + IntDefaultHandler, // Quadrature Encoder 2 + IntDefaultHandler, // Fan 0 + 0, // Reserved + IntDefaultHandler, // GPIO Port P (Summary or P0) + IntDefaultHandler, // GPIO Port P1 + IntDefaultHandler, // GPIO Port P2 + IntDefaultHandler, // GPIO Port P3 + IntDefaultHandler, // GPIO Port P4 + IntDefaultHandler, // GPIO Port P5 + IntDefaultHandler, // GPIO Port P6 + IntDefaultHandler, // GPIO Port P7 + IntDefaultHandler, // GPIO Port Q (Summary or Q0) + IntDefaultHandler, // GPIO Port Q1 + IntDefaultHandler, // GPIO Port Q2 + IntDefaultHandler, // GPIO Port Q3 + IntDefaultHandler, // GPIO Port Q4 + IntDefaultHandler, // GPIO Port Q5 + IntDefaultHandler, // GPIO Port Q6 + IntDefaultHandler, // GPIO Port Q7 + IntDefaultHandler, // GPIO Port R + IntDefaultHandler, // GPIO Port S + IntDefaultHandler, // PWM 1 Generator 0 + IntDefaultHandler, // PWM 1 Generator 1 + IntDefaultHandler, // PWM 1 Generator 2 + IntDefaultHandler, // PWM 1 Generator 3 + IntDefaultHandler // PWM 1 Fault +}; + +//***************************************************************************** +// +// This is the code that gets called when the processor first starts execution +// following a reset event. Only the absolutely necessary set is performed, +// after which the application supplied entry() routine is called. Any fancy +// actions (such as making decisions based on the reset cause register, and +// resetting the bits in that register) are left solely in the hands of the +// application. +// +//***************************************************************************** +void +ResetISR(void) +{ + // + // Enable the floating-point unit. This must be done here to handle the + // case where main() uses floating-point and the function prologue saves + // floating-point registers (which will fault if floating-point is not + // enabled). Any configuration of the floating-point unit using DriverLib + // APIs must be done here prior to the floating-point unit being enabled. + // + // Note that this does not use DriverLib since it might not be included in + // this project. + // + HWREG(NVIC_CPAC) = ((HWREG(NVIC_CPAC) & + ~(NVIC_CPAC_CP10_M | NVIC_CPAC_CP11_M)) | + NVIC_CPAC_CP10_FULL | NVIC_CPAC_CP11_FULL); + + // + // Call the application's entry point. + // + __iar_program_start(); +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a NMI. This +// simply enters an infinite loop, preserving the system state for examination +// by a debugger. +// +//***************************************************************************** +static void +NmiSR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a fault +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +FaultISR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives an unexpected +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +IntDefaultHandler(void) +{ + // + // Go into an infinite loop. + // + while(1) + { + } +} diff --git a/boards/ek-lm4f120xl/udma_demo/startup_gcc.c b/boards/ek-lm4f120xl/udma_demo/startup_gcc.c new file mode 100644 index 0000000..44df395 --- /dev/null +++ b/boards/ek-lm4f120xl/udma_demo/startup_gcc.c @@ -0,0 +1,351 @@ +//***************************************************************************** +// +// startup_gcc.c - Startup code for use with GNU tools. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +#include "inc/hw_nvic.h" +#include "inc/hw_types.h" + +//***************************************************************************** +// +// Forward declaration of the default fault handlers. +// +//***************************************************************************** +void ResetISR(void); +static void NmiSR(void); +static void FaultISR(void); +static void IntDefaultHandler(void); + +//***************************************************************************** +// +// External declarations for the interrupt handlers used by the application. +// +//***************************************************************************** +extern void SysTickHandler(void); +extern void UART1IntHandler(void); +extern void uDMAIntHandler(void); +extern void uDMAErrorHandler(void); + +//***************************************************************************** +// +// The entry point for the application. +// +//***************************************************************************** +extern int main(void); + +//***************************************************************************** +// +// Reserve space for the system stack. +// +//***************************************************************************** +static unsigned long pulStack[256]; + +//***************************************************************************** +// +// The vector table. Note that the proper constructs must be placed on this to +// ensure that it ends up at physical address 0x0000.0000. +// +//***************************************************************************** +__attribute__ ((section(".isr_vector"))) +void (* const g_pfnVectors[])(void) = +{ + (void (*)(void))((unsigned long)pulStack + sizeof(pulStack)), + // The initial stack pointer + ResetISR, // The reset handler + NmiSR, // The NMI handler + FaultISR, // The hard fault handler + IntDefaultHandler, // The MPU fault handler + IntDefaultHandler, // The bus fault handler + IntDefaultHandler, // The usage fault handler + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // SVCall handler + IntDefaultHandler, // Debug monitor handler + 0, // Reserved + IntDefaultHandler, // The PendSV handler + SysTickHandler, // The SysTick handler + IntDefaultHandler, // GPIO Port A + IntDefaultHandler, // GPIO Port B + IntDefaultHandler, // GPIO Port C + IntDefaultHandler, // GPIO Port D + IntDefaultHandler, // GPIO Port E + IntDefaultHandler, // UART0 Rx and Tx + UART1IntHandler, // UART1 Rx and Tx + IntDefaultHandler, // SSI0 Rx and Tx + IntDefaultHandler, // I2C0 Master and Slave + IntDefaultHandler, // PWM Fault + IntDefaultHandler, // PWM Generator 0 + IntDefaultHandler, // PWM Generator 1 + IntDefaultHandler, // PWM Generator 2 + IntDefaultHandler, // Quadrature Encoder 0 + IntDefaultHandler, // ADC Sequence 0 + IntDefaultHandler, // ADC Sequence 1 + IntDefaultHandler, // ADC Sequence 2 + IntDefaultHandler, // ADC Sequence 3 + IntDefaultHandler, // Watchdog timer + IntDefaultHandler, // Timer 0 subtimer A + IntDefaultHandler, // Timer 0 subtimer B + IntDefaultHandler, // Timer 1 subtimer A + IntDefaultHandler, // Timer 1 subtimer B + IntDefaultHandler, // Timer 2 subtimer A + IntDefaultHandler, // Timer 2 subtimer B + IntDefaultHandler, // Analog Comparator 0 + IntDefaultHandler, // Analog Comparator 1 + IntDefaultHandler, // Analog Comparator 2 + IntDefaultHandler, // System Control (PLL, OSC, BO) + IntDefaultHandler, // FLASH Control + IntDefaultHandler, // GPIO Port F + IntDefaultHandler, // GPIO Port G + IntDefaultHandler, // GPIO Port H + IntDefaultHandler, // UART2 Rx and Tx + IntDefaultHandler, // SSI1 Rx and Tx + IntDefaultHandler, // Timer 3 subtimer A + IntDefaultHandler, // Timer 3 subtimer B + IntDefaultHandler, // I2C1 Master and Slave + IntDefaultHandler, // Quadrature Encoder 1 + IntDefaultHandler, // CAN0 + IntDefaultHandler, // CAN1 + IntDefaultHandler, // CAN2 + IntDefaultHandler, // Ethernet + IntDefaultHandler, // Hibernate + IntDefaultHandler, // USB0 + IntDefaultHandler, // PWM Generator 3 + uDMAIntHandler, // uDMA Software Transfer + uDMAErrorHandler, // uDMA Error + IntDefaultHandler, // ADC1 Sequence 0 + IntDefaultHandler, // ADC1 Sequence 1 + IntDefaultHandler, // ADC1 Sequence 2 + IntDefaultHandler, // ADC1 Sequence 3 + IntDefaultHandler, // I2S0 + IntDefaultHandler, // External Bus Interface 0 + IntDefaultHandler, // GPIO Port J + IntDefaultHandler, // GPIO Port K + IntDefaultHandler, // GPIO Port L + IntDefaultHandler, // SSI2 Rx and Tx + IntDefaultHandler, // SSI3 Rx and Tx + IntDefaultHandler, // UART3 Rx and Tx + IntDefaultHandler, // UART4 Rx and Tx + IntDefaultHandler, // UART5 Rx and Tx + IntDefaultHandler, // UART6 Rx and Tx + IntDefaultHandler, // UART7 Rx and Tx + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // I2C2 Master and Slave + IntDefaultHandler, // I2C3 Master and Slave + IntDefaultHandler, // Timer 4 subtimer A + IntDefaultHandler, // Timer 4 subtimer B + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // Timer 5 subtimer A + IntDefaultHandler, // Timer 5 subtimer B + IntDefaultHandler, // Wide Timer 0 subtimer A + IntDefaultHandler, // Wide Timer 0 subtimer B + IntDefaultHandler, // Wide Timer 1 subtimer A + IntDefaultHandler, // Wide Timer 1 subtimer B + IntDefaultHandler, // Wide Timer 2 subtimer A + IntDefaultHandler, // Wide Timer 2 subtimer B + IntDefaultHandler, // Wide Timer 3 subtimer A + IntDefaultHandler, // Wide Timer 3 subtimer B + IntDefaultHandler, // Wide Timer 4 subtimer A + IntDefaultHandler, // Wide Timer 4 subtimer B + IntDefaultHandler, // Wide Timer 5 subtimer A + IntDefaultHandler, // Wide Timer 5 subtimer B + IntDefaultHandler, // FPU + IntDefaultHandler, // PECI 0 + IntDefaultHandler, // LPC 0 + IntDefaultHandler, // I2C4 Master and Slave + IntDefaultHandler, // I2C5 Master and Slave + IntDefaultHandler, // GPIO Port M + IntDefaultHandler, // GPIO Port N + IntDefaultHandler, // Quadrature Encoder 2 + IntDefaultHandler, // Fan 0 + 0, // Reserved + IntDefaultHandler, // GPIO Port P (Summary or P0) + IntDefaultHandler, // GPIO Port P1 + IntDefaultHandler, // GPIO Port P2 + IntDefaultHandler, // GPIO Port P3 + IntDefaultHandler, // GPIO Port P4 + IntDefaultHandler, // GPIO Port P5 + IntDefaultHandler, // GPIO Port P6 + IntDefaultHandler, // GPIO Port P7 + IntDefaultHandler, // GPIO Port Q (Summary or Q0) + IntDefaultHandler, // GPIO Port Q1 + IntDefaultHandler, // GPIO Port Q2 + IntDefaultHandler, // GPIO Port Q3 + IntDefaultHandler, // GPIO Port Q4 + IntDefaultHandler, // GPIO Port Q5 + IntDefaultHandler, // GPIO Port Q6 + IntDefaultHandler, // GPIO Port Q7 + IntDefaultHandler, // GPIO Port R + IntDefaultHandler, // GPIO Port S + IntDefaultHandler, // PWM 1 Generator 0 + IntDefaultHandler, // PWM 1 Generator 1 + IntDefaultHandler, // PWM 1 Generator 2 + IntDefaultHandler, // PWM 1 Generator 3 + IntDefaultHandler // PWM 1 Fault +}; + +//***************************************************************************** +// +// The following are constructs created by the linker, indicating where the +// the "data" and "bss" segments reside in memory. The initializers for the +// for the "data" segment resides immediately following the "text" segment. +// +//***************************************************************************** +extern unsigned long _etext; +extern unsigned long _data; +extern unsigned long _edata; +extern unsigned long _bss; +extern unsigned long _ebss; + +//***************************************************************************** +// +// This is the code that gets called when the processor first starts execution +// following a reset event. Only the absolutely necessary set is performed, +// after which the application supplied entry() routine is called. Any fancy +// actions (such as making decisions based on the reset cause register, and +// resetting the bits in that register) are left solely in the hands of the +// application. +// +//***************************************************************************** +void +ResetISR(void) +{ + unsigned long *pulSrc, *pulDest; + + // + // Copy the data segment initializers from flash to SRAM. + // + pulSrc = &_etext; + for(pulDest = &_data; pulDest < &_edata; ) + { + *pulDest++ = *pulSrc++; + } + + // + // Zero fill the bss segment. + // + __asm(" ldr r0, =_bss\n" + " ldr r1, =_ebss\n" + " mov r2, #0\n" + " .thumb_func\n" + "zero_loop:\n" + " cmp r0, r1\n" + " it lt\n" + " strlt r2, [r0], #4\n" + " blt zero_loop"); + + // + // Enable the floating-point unit. This must be done here to handle the + // case where main() uses floating-point and the function prologue saves + // floating-point registers (which will fault if floating-point is not + // enabled). Any configuration of the floating-point unit using DriverLib + // APIs must be done here prior to the floating-point unit being enabled. + // + // Note that this does not use DriverLib since it might not be included in + // this project. + // + HWREG(NVIC_CPAC) = ((HWREG(NVIC_CPAC) & + ~(NVIC_CPAC_CP10_M | NVIC_CPAC_CP11_M)) | + NVIC_CPAC_CP10_FULL | NVIC_CPAC_CP11_FULL); + + // + // Call the application's entry point. + // + main(); +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a NMI. This +// simply enters an infinite loop, preserving the system state for examination +// by a debugger. +// +//***************************************************************************** +static void +NmiSR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a fault +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +FaultISR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives an unexpected +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +IntDefaultHandler(void) +{ + // + // Go into an infinite loop. + // + while(1) + { + } +} diff --git a/boards/ek-lm4f120xl/udma_demo/startup_rvmdk.S b/boards/ek-lm4f120xl/udma_demo/startup_rvmdk.S new file mode 100644 index 0000000..6cfe8a2 --- /dev/null +++ b/boards/ek-lm4f120xl/udma_demo/startup_rvmdk.S @@ -0,0 +1,361 @@ +; <<< Use Configuration Wizard in Context Menu >>> +;****************************************************************************** +; +; startup_rvmdk.S - Startup code for use with Keil's uVision. +; +; Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +; Software License Agreement +; +; Texas Instruments (TI) is supplying this software for use solely and +; exclusively on TI's microcontroller products. The software is owned by +; TI and/or its suppliers, and is protected under applicable copyright +; laws. You may not combine this software with "viral" open-source +; software in order to form a larger program. +; +; THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +; NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +; NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +; A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +; CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +; DAMAGES, FOR ANY REASON WHATSOEVER. +; +; This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +; +;****************************************************************************** + +;****************************************************************************** +; +; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +; +;****************************************************************************** +Stack EQU 0x00000400 + +;****************************************************************************** +; +; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> +; +;****************************************************************************** +Heap EQU 0x00000000 + +;****************************************************************************** +; +; Allocate space for the stack. +; +;****************************************************************************** + AREA STACK, NOINIT, READWRITE, ALIGN=3 +StackMem + SPACE Stack +__initial_sp + +;****************************************************************************** +; +; Allocate space for the heap. +; +;****************************************************************************** + AREA HEAP, NOINIT, READWRITE, ALIGN=3 +__heap_base +HeapMem + SPACE Heap +__heap_limit + +;****************************************************************************** +; +; Indicate that the code in this file preserves 8-byte alignment of the stack. +; +;****************************************************************************** + PRESERVE8 + +;****************************************************************************** +; +; Place code into the reset code section. +; +;****************************************************************************** + AREA RESET, CODE, READONLY + THUMB + +;****************************************************************************** +; +; External declarations for the interrupt handlers used by the application. +; +;****************************************************************************** + EXTERN SysTickHandler + EXTERN UART1IntHandler + EXTERN uDMAIntHandler + EXTERN uDMAErrorHandler + +;****************************************************************************** +; +; The vector table. +; +;****************************************************************************** + EXPORT __Vectors +__Vectors + DCD StackMem + Stack ; Top of Stack + DCD Reset_Handler ; Reset Handler + DCD NmiSR ; NMI Handler + DCD FaultISR ; Hard Fault Handler + DCD IntDefaultHandler ; The MPU fault handler + DCD IntDefaultHandler ; The bus fault handler + DCD IntDefaultHandler ; The usage fault handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD IntDefaultHandler ; SVCall handler + DCD IntDefaultHandler ; Debug monitor handler + DCD 0 ; Reserved + DCD IntDefaultHandler ; The PendSV handler + DCD SysTickHandler ; The SysTick handler + DCD IntDefaultHandler ; GPIO Port A + DCD IntDefaultHandler ; GPIO Port B + DCD IntDefaultHandler ; GPIO Port C + DCD IntDefaultHandler ; GPIO Port D + DCD IntDefaultHandler ; GPIO Port E + DCD IntDefaultHandler ; UART0 Rx and Tx + DCD UART1IntHandler ; UART1 Rx and Tx + DCD IntDefaultHandler ; SSI0 Rx and Tx + DCD IntDefaultHandler ; I2C0 Master and Slave + DCD IntDefaultHandler ; PWM Fault + DCD IntDefaultHandler ; PWM Generator 0 + DCD IntDefaultHandler ; PWM Generator 1 + DCD IntDefaultHandler ; PWM Generator 2 + DCD IntDefaultHandler ; Quadrature Encoder 0 + DCD IntDefaultHandler ; ADC Sequence 0 + DCD IntDefaultHandler ; ADC Sequence 1 + DCD IntDefaultHandler ; ADC Sequence 2 + DCD IntDefaultHandler ; ADC Sequence 3 + DCD IntDefaultHandler ; Watchdog timer + DCD IntDefaultHandler ; Timer 0 subtimer A + DCD IntDefaultHandler ; Timer 0 subtimer B + DCD IntDefaultHandler ; Timer 1 subtimer A + DCD IntDefaultHandler ; Timer 1 subtimer B + DCD IntDefaultHandler ; Timer 2 subtimer A + DCD IntDefaultHandler ; Timer 2 subtimer B + DCD IntDefaultHandler ; Analog Comparator 0 + DCD IntDefaultHandler ; Analog Comparator 1 + DCD IntDefaultHandler ; Analog Comparator 2 + DCD IntDefaultHandler ; System Control (PLL, OSC, BO) + DCD IntDefaultHandler ; FLASH Control + DCD IntDefaultHandler ; GPIO Port F + DCD IntDefaultHandler ; GPIO Port G + DCD IntDefaultHandler ; GPIO Port H + DCD IntDefaultHandler ; UART2 Rx and Tx + DCD IntDefaultHandler ; SSI1 Rx and Tx + DCD IntDefaultHandler ; Timer 3 subtimer A + DCD IntDefaultHandler ; Timer 3 subtimer B + DCD IntDefaultHandler ; I2C1 Master and Slave + DCD IntDefaultHandler ; Quadrature Encoder 1 + DCD IntDefaultHandler ; CAN0 + DCD IntDefaultHandler ; CAN1 + DCD IntDefaultHandler ; CAN2 + DCD IntDefaultHandler ; Ethernet + DCD IntDefaultHandler ; Hibernate + DCD IntDefaultHandler ; USB0 + DCD IntDefaultHandler ; PWM Generator 3 + DCD uDMAIntHandler ; uDMA Software Transfer + DCD uDMAErrorHandler ; uDMA Error + DCD IntDefaultHandler ; ADC1 Sequence 0 + DCD IntDefaultHandler ; ADC1 Sequence 1 + DCD IntDefaultHandler ; ADC1 Sequence 2 + DCD IntDefaultHandler ; ADC1 Sequence 3 + DCD IntDefaultHandler ; I2S0 + DCD IntDefaultHandler ; External Bus Interface 0 + DCD IntDefaultHandler ; GPIO Port J + DCD IntDefaultHandler ; GPIO Port K + DCD IntDefaultHandler ; GPIO Port L + DCD IntDefaultHandler ; SSI2 Rx and Tx + DCD IntDefaultHandler ; SSI3 Rx and Tx + DCD IntDefaultHandler ; UART3 Rx and Tx + DCD IntDefaultHandler ; UART4 Rx and Tx + DCD IntDefaultHandler ; UART5 Rx and Tx + DCD IntDefaultHandler ; UART6 Rx and Tx + DCD IntDefaultHandler ; UART7 Rx and Tx + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD IntDefaultHandler ; I2C2 Master and Slave + DCD IntDefaultHandler ; I2C3 Master and Slave + DCD IntDefaultHandler ; Timer 4 subtimer A + DCD IntDefaultHandler ; Timer 4 subtimer B + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD IntDefaultHandler ; Timer 5 subtimer A + DCD IntDefaultHandler ; Timer 5 subtimer B + DCD IntDefaultHandler ; Wide Timer 0 subtimer A + DCD IntDefaultHandler ; Wide Timer 0 subtimer B + DCD IntDefaultHandler ; Wide Timer 1 subtimer A + DCD IntDefaultHandler ; Wide Timer 1 subtimer B + DCD IntDefaultHandler ; Wide Timer 2 subtimer A + DCD IntDefaultHandler ; Wide Timer 2 subtimer B + DCD IntDefaultHandler ; Wide Timer 3 subtimer A + DCD IntDefaultHandler ; Wide Timer 3 subtimer B + DCD IntDefaultHandler ; Wide Timer 4 subtimer A + DCD IntDefaultHandler ; Wide Timer 4 subtimer B + DCD IntDefaultHandler ; Wide Timer 5 subtimer A + DCD IntDefaultHandler ; Wide Timer 5 subtimer B + DCD IntDefaultHandler ; FPU + DCD IntDefaultHandler ; PECI 0 + DCD IntDefaultHandler ; LPC 0 + DCD IntDefaultHandler ; I2C4 Master and Slave + DCD IntDefaultHandler ; I2C5 Master and Slave + DCD IntDefaultHandler ; GPIO Port M + DCD IntDefaultHandler ; GPIO Port N + DCD IntDefaultHandler ; Quadrature Encoder 2 + DCD IntDefaultHandler ; Fan 0 + DCD 0 ; Reserved + DCD IntDefaultHandler ; GPIO Port P (Summary or P0) + DCD IntDefaultHandler ; GPIO Port P1 + DCD IntDefaultHandler ; GPIO Port P2 + DCD IntDefaultHandler ; GPIO Port P3 + DCD IntDefaultHandler ; GPIO Port P4 + DCD IntDefaultHandler ; GPIO Port P5 + DCD IntDefaultHandler ; GPIO Port P6 + DCD IntDefaultHandler ; GPIO Port P7 + DCD IntDefaultHandler ; GPIO Port Q (Summary or Q0) + DCD IntDefaultHandler ; GPIO Port Q1 + DCD IntDefaultHandler ; GPIO Port Q2 + DCD IntDefaultHandler ; GPIO Port Q3 + DCD IntDefaultHandler ; GPIO Port Q4 + DCD IntDefaultHandler ; GPIO Port Q5 + DCD IntDefaultHandler ; GPIO Port Q6 + DCD IntDefaultHandler ; GPIO Port Q7 + DCD IntDefaultHandler ; GPIO Port R + DCD IntDefaultHandler ; GPIO Port S + DCD IntDefaultHandler ; PWM 1 Generator 0 + DCD IntDefaultHandler ; PWM 1 Generator 1 + DCD IntDefaultHandler ; PWM 1 Generator 2 + DCD IntDefaultHandler ; PWM 1 Generator 3 + DCD IntDefaultHandler ; PWM 1 Fault + +;****************************************************************************** +; +; This is the code that gets called when the processor first starts execution +; following a reset event. +; +;****************************************************************************** + EXPORT Reset_Handler +Reset_Handler + ; + ; Enable the floating-point unit. This must be done here to handle the + ; case where main() uses floating-point and the function prologue saves + ; floating-point registers (which will fault if floating-point is not + ; enabled). Any configuration of the floating-point unit using + ; DriverLib APIs must be done here prior to the floating-point unit + ; being enabled. + ; + ; Note that this does not use DriverLib since it might not be included + ; in this project. + ; + MOVW R0, #0xED88 + MOVT R0, #0xE000 + LDR R1, [R0] + ORR R1, #0x00F00000 + STR R1, [R0] + + ; + ; Call the C library enty point that handles startup. This will copy + ; the .data section initializers from flash to SRAM and zero fill the + ; .bss section. + ; + IMPORT __main + B __main + +;****************************************************************************** +; +; This is the code that gets called when the processor receives a NMI. This +; simply enters an infinite loop, preserving the system state for examination +; by a debugger. +; +;****************************************************************************** +NmiSR + B NmiSR + +;****************************************************************************** +; +; This is the code that gets called when the processor receives a fault +; interrupt. This simply enters an infinite loop, preserving the system state +; for examination by a debugger. +; +;****************************************************************************** +FaultISR + B FaultISR + +;****************************************************************************** +; +; This is the code that gets called when the processor receives an unexpected +; interrupt. This simply enters an infinite loop, preserving the system state +; for examination by a debugger. +; +;****************************************************************************** +IntDefaultHandler + B IntDefaultHandler + +;****************************************************************************** +; +; Make sure the end of this section is aligned. +; +;****************************************************************************** + ALIGN + +;****************************************************************************** +; +; Some code in the normal code section for initializing the heap and stack. +; +;****************************************************************************** + AREA |.text|, CODE, READONLY + +;****************************************************************************** +; +; The function expected of the C library startup code for defining the stack +; and heap memory locations. For the C library version of the startup code, +; provide this function so that the C library initialization code can find out +; the location of the stack and heap. +; +;****************************************************************************** + IF :DEF: __MICROLIB + EXPORT __initial_sp + EXPORT __heap_base + EXPORT __heap_limit + ELSE + IMPORT __use_two_region_memory + EXPORT __user_initial_stackheap +__user_initial_stackheap + LDR R0, =HeapMem + LDR R1, =(StackMem + Stack) + LDR R2, =(HeapMem + Heap) + LDR R3, =StackMem + BX LR + ENDIF + +;****************************************************************************** +; +; Make sure the end of this section is aligned. +; +;****************************************************************************** + ALIGN + +;****************************************************************************** +; +; Tell the assembler that we're done. +; +;****************************************************************************** + END diff --git a/boards/ek-lm4f120xl/udma_demo/startup_sourcerygxx.S b/boards/ek-lm4f120xl/udma_demo/startup_sourcerygxx.S new file mode 100644 index 0000000..b720839 --- /dev/null +++ b/boards/ek-lm4f120xl/udma_demo/startup_sourcerygxx.S @@ -0,0 +1,75 @@ +//***************************************************************************** +// +// startup_sourcerygxx.S - Startup code for Sourcery CodeBench. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + + .syntax unified + .thumb + +//***************************************************************************** +// +// Place this code into the .cs3.reset section so that it can be executed prior +// to the startup code in Sourcery CodeBench. +// +//***************************************************************************** + .section .cs3.reset,"x" + +//***************************************************************************** +// +// The reset handler, which overrides the one provided by CS3. +// +//***************************************************************************** + .globl __cs3_reset + .thumb_func +__cs3_reset: + // + // Enable the floating-point unit. This must be done here to handle the + // case where main() uses floating-point and the function prologue saves + // floating-point registers (which will fault if floating-point is not + // enabled). Any configuration of the floating-point unit using DriverLib + // APIs must be done here prior to the floating-point unit being enabled. + // + // Note that this does not use DriverLib since it might not be included in + // this project. + // + movw r0, #0xed88 + movt r0, #0xe000 + ldr r1, [r0] + orr r1, #0x00f00000 + str r1, [r0] + + // + // Branch to the normal CS3 startup code. + // + .extern __cs3_reset_ekc_lm4f232 + ldr r0, =__cs3_reset_ekc_lm4f232 + bx r0 + + // + // Place the literal pool here. + // + .ltorg + + // + // The end of the file. + // + .end diff --git a/boards/ek-lm4f120xl/udma_demo/udma_demo.c b/boards/ek-lm4f120xl/udma_demo/udma_demo.c new file mode 100644 index 0000000..cb3466a --- /dev/null +++ b/boards/ek-lm4f120xl/udma_demo/udma_demo.c @@ -0,0 +1,979 @@ +//***************************************************************************** +// +// udma_demo.c - uDMA example. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +#include "inc/hw_ints.h" +#include "inc/hw_memmap.h" +#include "inc/hw_types.h" +#include "inc/hw_uart.h" +#include "driverlib/fpu.h" +#include "driverlib/gpio.h" +#include "driverlib/interrupt.h" +#include "driverlib/pin_map.h" +#include "driverlib/rom.h" +#include "driverlib/sysctl.h" +#include "driverlib/systick.h" +#include "driverlib/uart.h" +#include "driverlib/udma.h" +#include "utils/cpu_usage.h" +#include "utils/uartstdio.h" +#include "utils/ustdlib.h" + +//***************************************************************************** +// +//! \addtogroup example_list +//!

uDMA (udma_demo)

+//! +//! This example application demonstrates the use of the uDMA controller to +//! transfer data between memory buffers, and to transfer data to and from a +//! UART. The test runs for 10 seconds before exiting. +//! +//! UART0, connected to the FTDI virtual COM port and running at 115,200, +//! 8-N-1, is used to display messages from this application. +// +//***************************************************************************** + + +//***************************************************************************** +// +// The number of SysTick ticks per second used for the SysTick interrupt. +// +//***************************************************************************** +#define SYSTICKS_PER_SECOND 100 + +//***************************************************************************** +// +// The size of the memory transfer source and destination buffers (in words). +// +//***************************************************************************** +#define MEM_BUFFER_SIZE 1024 + +//***************************************************************************** +// +// The size of the UART transmit and receive buffers. They do not need to be +// the same size. +// +//***************************************************************************** +#define UART_TXBUF_SIZE 256 +#define UART_RXBUF_SIZE 256 + +//***************************************************************************** +// +// The source and destination buffers used for memory transfers. +// +//***************************************************************************** +static unsigned long g_ulSrcBuf[MEM_BUFFER_SIZE]; +static unsigned long g_ulDstBuf[MEM_BUFFER_SIZE]; + +//***************************************************************************** +// +// The transmit and receive buffers used for the UART transfers. There is one +// transmit buffer and a pair of recieve ping-pong buffers. +// +//***************************************************************************** +static unsigned char g_ucTxBuf[UART_TXBUF_SIZE]; +static unsigned char g_ucRxBufA[UART_RXBUF_SIZE]; +static unsigned char g_ucRxBufB[UART_RXBUF_SIZE]; + +//***************************************************************************** +// +// The count of uDMA errors. This value is incremented by the uDMA error +// handler. +// +//***************************************************************************** +static unsigned long g_uluDMAErrCount = 0; + +//***************************************************************************** +// +// The count of times the uDMA interrupt occurred but the uDMA transfer was not +// complete. This should remain 0. +// +//***************************************************************************** +static unsigned long g_ulBadISR = 0; + +//***************************************************************************** +// +// The count of UART buffers filled, one for each ping-pong buffer. +// +//***************************************************************************** +static unsigned long g_ulRxBufACount = 0; +static unsigned long g_ulRxBufBCount = 0; + +//***************************************************************************** +// +// The count of memory uDMA transfer blocks. This value is incremented by the +// uDMA interrupt handler whenever a memory block transfer is completed. +// +//***************************************************************************** +static unsigned long g_ulMemXferCount = 0; + +//***************************************************************************** +// +// The CPU usage in percent, in 16.16 fixed point format. +// +//***************************************************************************** +static unsigned long g_ulCPUUsage; + +//***************************************************************************** +// +// The number of seconds elapsed since the start of the program. This value is +// maintained by the SysTick interrupt handler. +// +//***************************************************************************** +static unsigned long g_ulSeconds = 0; + +//***************************************************************************** +// +// A spinning line that is used to indicate that the application is running. +// +//***************************************************************************** +//static const char g_pcTwirl[4] = { '\\', '|', '/', '-' }; + +//***************************************************************************** +// +// The control table used by the uDMA controller. This table must be aligned +// to a 1024 byte boundary. +// +//***************************************************************************** +#if defined(ewarm) +#pragma data_alignment=1024 +unsigned char ucControlTable[1024]; +#elif defined(ccs) +#pragma DATA_ALIGN(ucControlTable, 1024) +unsigned char ucControlTable[1024]; +#else +unsigned char ucControlTable[1024] __attribute__ ((aligned(1024))); +#endif + +//***************************************************************************** +// +// The error routine that is called if the driver library encounters an error. +// +//***************************************************************************** +#ifdef DEBUG +void +__error__(char *pcFilename, unsigned long ulLine) +{ +} +#endif + +//***************************************************************************** +// +// The interrupt handler for the SysTick timer. This handler will increment a +// seconds counter whenever the appropriate number of ticks has occurred. It +// will also call the CPU usage tick function to find the CPU usage percent. +// +//***************************************************************************** +void +SysTickHandler(void) +{ + static unsigned long ulTickCount = 0; + + // + // Increment the tick counter. + // + ulTickCount++; + + // + // If the number of ticks per second has occurred, then increment the + // seconds counter. + // + if(!(ulTickCount % SYSTICKS_PER_SECOND)) + { + g_ulSeconds++; + } + + // + // Call the CPU usage tick function. This function will compute the amount + // of cycles used by the CPU since the last call and return the result in + // percent in fixed point 16.16 format. + // + g_ulCPUUsage = CPUUsageTick(); +} + +//***************************************************************************** +// +// The interrupt handler for uDMA errors. This interrupt will occur if the +// uDMA encounters a bus error while trying to perform a transfer. This +// handler just increments a counter if an error occurs. +// +//***************************************************************************** +void +uDMAErrorHandler(void) +{ + unsigned long ulStatus; + + // + // Check for uDMA error bit + // + ulStatus = ROM_uDMAErrorStatusGet(); + + // + // If there is a uDMA error, then clear the error and increment + // the error counter. + // + if(ulStatus) + { + ROM_uDMAErrorStatusClear(); + g_uluDMAErrCount++; + } +} + +//***************************************************************************** +// +// The interrupt handler for uDMA interrupts from the memory channel. This +// interrupt will increment a counter, and then restart another memory +// transfer. +// +//***************************************************************************** +void +uDMAIntHandler(void) +{ + unsigned long ulMode; + + // + // Check for the primary control structure to indicate complete. + // + ulMode = ROM_uDMAChannelModeGet(UDMA_CHANNEL_SW); + if(ulMode == UDMA_MODE_STOP) + { + // + // Increment the count of completed transfers. + // + g_ulMemXferCount++; + + // + // Configure it for another transfer. + // + ROM_uDMAChannelTransferSet(UDMA_CHANNEL_SW, UDMA_MODE_AUTO, + g_ulSrcBuf, g_ulDstBuf, MEM_BUFFER_SIZE); + + // + // Initiate another transfer. + // + ROM_uDMAChannelEnable(UDMA_CHANNEL_SW); + ROM_uDMAChannelRequest(UDMA_CHANNEL_SW); + } + + // + // If the channel is not stopped, then something is wrong. + // + else + { + g_ulBadISR++; + } +} + +//***************************************************************************** +// +// The interrupt handler for UART1. This interrupt will occur when a DMA +// transfer is complete using the UART1 uDMA channel. It will also be +// triggered if the peripheral signals an error. This interrupt handler will +// switch between receive ping-pong buffers A and B. It will also restart a TX +// uDMA transfer if the prior transfer is complete. This will keep the UART +// running continuously (looping TX data back to RX). +// +//***************************************************************************** +void +UART1IntHandler(void) +{ + unsigned long ulStatus; + unsigned long ulMode; + + // + // Read the interrupt status of the UART. + // + ulStatus = ROM_UARTIntStatus(UART1_BASE, 1); + + // + // Clear any pending status, even though there should be none since no UART + // interrupts were enabled. If UART error interrupts were enabled, then + // those interrupts could occur here and should be handled. Since uDMA is + // used for both the RX and TX, then neither of those interrupts should be + // enabled. + // + ROM_UARTIntClear(UART1_BASE, ulStatus); + + // + // Check the DMA control table to see if the ping-pong "A" transfer is + // complete. The "A" transfer uses receive buffer "A", and the primary + // control structure. + // + ulMode = ROM_uDMAChannelModeGet(UDMA_CHANNEL_UART1RX | UDMA_PRI_SELECT); + + // + // If the primary control structure indicates stop, that means the "A" + // receive buffer is done. The uDMA controller should still be receiving + // data into the "B" buffer. + // + if(ulMode == UDMA_MODE_STOP) + { + // + // Increment a counter to indicate data was received into buffer A. In + // a real application this would be used to signal the main thread that + // data was received so the main thread can process the data. + // + g_ulRxBufACount++; + + // + // Set up the next transfer for the "A" buffer, using the primary + // control structure. When the ongoing receive into the "B" buffer is + // done, the uDMA controller will switch back to this one. This + // example re-uses buffer A, but a more sophisticated application could + // use a rotating set of buffers to increase the amount of time that + // the main thread has to process the data in the buffer before it is + // reused. + // + ROM_uDMAChannelTransferSet(UDMA_CHANNEL_UART1RX | UDMA_PRI_SELECT, + UDMA_MODE_PINGPONG, + (void *)(UART1_BASE + UART_O_DR), + g_ucRxBufA, sizeof(g_ucRxBufA)); + } + + // + // Check the DMA control table to see if the ping-pong "B" transfer is + // complete. The "B" transfer uses receive buffer "B", and the alternate + // control structure. + // + ulMode = ROM_uDMAChannelModeGet(UDMA_CHANNEL_UART1RX | UDMA_ALT_SELECT); + + // + // If the alternate control structure indicates stop, that means the "B" + // receive buffer is done. The uDMA controller should still be receiving + // data into the "A" buffer. + // + if(ulMode == UDMA_MODE_STOP) + { + // + // Increment a counter to indicate data was received into buffer A. In + // a real application this would be used to signal the main thread that + // data was received so the main thread can process the data. + // + g_ulRxBufBCount++; + + // + // Set up the next transfer for the "B" buffer, using the alternate + // control structure. When the ongoing receive into the "A" buffer is + // done, the uDMA controller will switch back to this one. This + // example re-uses buffer B, but a more sophisticated application could + // use a rotating set of buffers to increase the amount of time that + // the main thread has to process the data in the buffer before it is + // reused. + // + ROM_uDMAChannelTransferSet(UDMA_CHANNEL_UART1RX | UDMA_ALT_SELECT, + UDMA_MODE_PINGPONG, + (void *)(UART1_BASE + UART_O_DR), + g_ucRxBufB, sizeof(g_ucRxBufB)); + } + + // + // If the UART1 DMA TX channel is disabled, that means the TX DMA transfer + // is done. + // + if(!ROM_uDMAChannelIsEnabled(UDMA_CHANNEL_UART1TX)) + { + // + // Start another DMA transfer to UART1 TX. + // + ROM_uDMAChannelTransferSet(UDMA_CHANNEL_UART1TX | UDMA_PRI_SELECT, + UDMA_MODE_BASIC, g_ucTxBuf, + (void *)(UART1_BASE + UART_O_DR), + sizeof(g_ucTxBuf)); + + // + // The uDMA TX channel must be re-enabled. + // + ROM_uDMAChannelEnable(UDMA_CHANNEL_UART1TX); + } +} + +//***************************************************************************** +// +// Initializes the UART1 peripheral and sets up the TX and RX uDMA channels. +// The UART is configured for loopback mode so that any data sent on TX will be +// received on RX. The uDMA channels are configured so that the TX channel +// will copy data from a buffer to the UART TX output. And the uDMA RX channel +// will receive any incoming data into a pair of buffers in ping-pong mode. +// +//***************************************************************************** +void +InitUART1Transfer(void) +{ + unsigned int uIdx; + + // + // Fill the TX buffer with a simple data pattern. + // + for(uIdx = 0; uIdx < UART_TXBUF_SIZE; uIdx++) + { + g_ucTxBuf[uIdx] = uIdx; + } + + // + // Enable the UART peripheral, and configure it to operate even if the CPU + // is in sleep. + // + ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_UART1); + ROM_SysCtlPeripheralSleepEnable(SYSCTL_PERIPH_UART1); + + // + // Configure the UART communication parameters. + // + ROM_UARTConfigSetExpClk(UART1_BASE, ROM_SysCtlClockGet(), 115200, + UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE | + UART_CONFIG_PAR_NONE); + + // + // Set both the TX and RX trigger thresholds to 4. This will be used by + // the uDMA controller to signal when more data should be transferred. The + // uDMA TX and RX channels will be configured so that it can transfer 4 + // bytes in a burst when the UART is ready to transfer more data. + // + ROM_UARTFIFOLevelSet(UART1_BASE, UART_FIFO_TX4_8, UART_FIFO_RX4_8); + + // + // Enable the UART for operation, and enable the uDMA interface for both TX + // and RX channels. + // + ROM_UARTEnable(UART1_BASE); + ROM_UARTDMAEnable(UART1_BASE, UART_DMA_RX | UART_DMA_TX); + + // + // This register write will set the UART to operate in loopback mode. Any + // data sent on the TX output will be received on the RX input. + // + HWREG(UART1_BASE + UART_O_CTL) |= UART_CTL_LBE; + + // + // Enable the UART peripheral interrupts. Note that no UART interrupts + // were enabled, but the uDMA controller will cause an interrupt on the + // UART interrupt signal when a uDMA transfer is complete. + // + ROM_IntEnable(INT_UART1); + + // + // Put the attributes in a known state for the uDMA UART1RX channel. These + // should already be disabled by default. + // + ROM_uDMAChannelAttributeDisable(UDMA_CHANNEL_UART1RX, + UDMA_ATTR_ALTSELECT | UDMA_ATTR_USEBURST | + UDMA_ATTR_HIGH_PRIORITY | + UDMA_ATTR_REQMASK); + + // + // Configure the control parameters for the primary control structure for + // the UART RX channel. The primary contol structure is used for the "A" + // part of the ping-pong receive. The transfer data size is 8 bits, the + // source address does not increment since it will be reading from a + // register. The destination address increment is byte 8-bit bytes. The + // arbitration size is set to 4 to match the RX FIFO trigger threshold. + // The uDMA controller will use a 4 byte burst transfer if possible. This + // will be somewhat more effecient that single byte transfers. + // + ROM_uDMAChannelControlSet(UDMA_CHANNEL_UART1RX | UDMA_PRI_SELECT, + UDMA_SIZE_8 | UDMA_SRC_INC_NONE | UDMA_DST_INC_8 | + UDMA_ARB_4); + + // + // Configure the control parameters for the alternate control structure for + // the UART RX channel. The alternate contol structure is used for the "B" + // part of the ping-pong receive. The configuration is identical to the + // primary/A control structure. + // + ROM_uDMAChannelControlSet(UDMA_CHANNEL_UART1RX | UDMA_ALT_SELECT, + UDMA_SIZE_8 | UDMA_SRC_INC_NONE | UDMA_DST_INC_8 | + UDMA_ARB_4); + + // + // Set up the transfer parameters for the UART RX primary control + // structure. The mode is set to ping-pong, the transfer source is the + // UART data register, and the destination is the receive "A" buffer. The + // transfer size is set to match the size of the buffer. + // + ROM_uDMAChannelTransferSet(UDMA_CHANNEL_UART1RX | UDMA_PRI_SELECT, + UDMA_MODE_PINGPONG, + (void *)(UART1_BASE + UART_O_DR), + g_ucRxBufA, sizeof(g_ucRxBufA)); + + // + // Set up the transfer parameters for the UART RX alternate control + // structure. The mode is set to ping-pong, the transfer source is the + // UART data register, and the destination is the receive "B" buffer. The + // transfer size is set to match the size of the buffer. + // + ROM_uDMAChannelTransferSet(UDMA_CHANNEL_UART1RX | UDMA_ALT_SELECT, + UDMA_MODE_PINGPONG, + (void *)(UART1_BASE + UART_O_DR), + g_ucRxBufB, sizeof(g_ucRxBufB)); + + // + // Put the attributes in a known state for the uDMA UART1TX channel. These + // should already be disabled by default. + // + ROM_uDMAChannelAttributeDisable(UDMA_CHANNEL_UART1TX, + UDMA_ATTR_ALTSELECT | + UDMA_ATTR_HIGH_PRIORITY | + UDMA_ATTR_REQMASK); + + // + // Set the USEBURST attribute for the uDMA UART TX channel. This will + // force the controller to always use a burst when transferring data from + // the TX buffer to the UART. This is somewhat more effecient bus usage + // than the default which allows single or burst transfers. + // + ROM_uDMAChannelAttributeEnable(UDMA_CHANNEL_UART1TX, UDMA_ATTR_USEBURST); + + // + // Configure the control parameters for the UART TX. The uDMA UART TX + // channel is used to transfer a block of data from a buffer to the UART. + // The data size is 8 bits. The source address increment is 8-bit bytes + // since the data is coming from a buffer. The destination increment is + // none since the data is to be written to the UART data register. The + // arbitration size is set to 4, which matches the UART TX FIFO trigger + // threshold. + // + ROM_uDMAChannelControlSet(UDMA_CHANNEL_UART1TX | UDMA_PRI_SELECT, + UDMA_SIZE_8 | UDMA_SRC_INC_8 | UDMA_DST_INC_NONE | + UDMA_ARB_4); + + // + // Set up the transfer parameters for the uDMA UART TX channel. This will + // configure the transfer source and destination and the transfer size. + // Basic mode is used because the peripheral is making the uDMA transfer + // request. The source is the TX buffer and the destination is the UART + // data register. + // + ROM_uDMAChannelTransferSet(UDMA_CHANNEL_UART1TX | UDMA_PRI_SELECT, + UDMA_MODE_BASIC, g_ucTxBuf, + (void *)(UART1_BASE + UART_O_DR), + sizeof(g_ucTxBuf)); + + // + // Now both the uDMA UART TX and RX channels are primed to start a + // transfer. As soon as the channels are enabled, the peripheral will + // issue a transfer request and the data transfers will begin. + // + ROM_uDMAChannelEnable(UDMA_CHANNEL_UART1RX); + ROM_uDMAChannelEnable(UDMA_CHANNEL_UART1TX); +} + +//***************************************************************************** +// +// Initializes the uDMA software channel to perform a memory to memory uDMA +// transfer. +// +//***************************************************************************** +void +InitSWTransfer(void) +{ + unsigned int uIdx; + + // + // Fill the source memory buffer with a simple incrementing pattern. + // + for(uIdx = 0; uIdx < MEM_BUFFER_SIZE; uIdx++) + { + g_ulSrcBuf[uIdx] = uIdx; + } + + // + // Enable interrupts from the uDMA software channel. + // + ROM_IntEnable(INT_UDMA); + + // + // Put the attributes in a known state for the uDMA software channel. + // These should already be disabled by default. + // + ROM_uDMAChannelAttributeDisable(UDMA_CHANNEL_SW, + UDMA_ATTR_USEBURST | UDMA_ATTR_ALTSELECT | + (UDMA_ATTR_HIGH_PRIORITY | + UDMA_ATTR_REQMASK)); + + // + // Configure the control parameters for the SW channel. The SW channel + // will be used to transfer between two memory buffers, 32 bits at a time. + // Therefore the data size is 32 bits, and the address increment is 32 bits + // for both source and destination. The arbitration size will be set to 8, + // which causes the uDMA controller to rearbitrate after 8 items are + // transferred. This keeps this channel from hogging the uDMA controller + // once the transfer is started, and allows other channels cycles if they + // are higher priority. + // + ROM_uDMAChannelControlSet(UDMA_CHANNEL_SW | UDMA_PRI_SELECT, + UDMA_SIZE_32 | UDMA_SRC_INC_32 | UDMA_DST_INC_32 | + UDMA_ARB_8); + + // + // Set up the transfer parameters for the software channel. This will + // configure the transfer buffers and the transfer size. Auto mode must be + // used for software transfers. + // + ROM_uDMAChannelTransferSet(UDMA_CHANNEL_SW | UDMA_PRI_SELECT, + UDMA_MODE_AUTO, g_ulSrcBuf, g_ulDstBuf, + MEM_BUFFER_SIZE); + + // + // Now the software channel is primed to start a transfer. The channel + // must be enabled. For software based transfers, a request must be + // issued. After this, the uDMA memory transfer begins. + // + ROM_uDMAChannelEnable(UDMA_CHANNEL_SW); + ROM_uDMAChannelRequest(UDMA_CHANNEL_SW); +} + +//***************************************************************************** +// +// This example demonstrates how to use the uDMA controller to transfer data +// between memory buffers and to and from a peripheral, in this case a UART. +// The uDMA controller is configured to repeatedly transfer a block of data +// from one memory buffer to another. It is also set up to repeatedly copy a +// block of data from a buffer to the UART output. The UART data is looped +// back so the same data is received, and the uDMA controlled is configured to +// continuously receive the UART data using ping-pong buffers. +// +// The processor is put to sleep when it is not doing anything, and this allows +// collection of CPU usage data to see how much CPU is being used while the +// data transfers are ongoing. +// +//***************************************************************************** +int +main(void) +{ + static unsigned long ulPrevSeconds; + static unsigned long ulPrevXferCount; + static unsigned long ulPrevUARTCount = 0; + unsigned long ulXfersCompleted; + unsigned long ulBytesTransferred; + volatile unsigned long ulLoop; + + // + // Enable lazy stacking for interrupt handlers. This allows floating-point + // instructions to be used within interrupt handlers, but at the expense of + // extra stack usage. + // + ROM_FPULazyStackingEnable(); + + // + // Set the clocking to run from the PLL at 50 MHz. + // + ROM_SysCtlClockSet(SYSCTL_SYSDIV_4 | SYSCTL_USE_PLL | SYSCTL_OSC_MAIN | + SYSCTL_XTAL_16MHZ); + + // + // Enable peripherals to operate when CPU is in sleep. + // + ROM_SysCtlPeripheralClockGating(true); + + // + // Enable the GPIO port that is used for the on-board LED. + // + ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOF); + + // + // Enable the GPIO pins for the LED (PF2). + // + ROM_GPIOPinTypeGPIOOutput(GPIO_PORTF_BASE, GPIO_PIN_2); + + // + // Initialize the UART. + // + ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA); + ROM_SysCtlPeripheralSleepEnable(SYSCTL_PERIPH_UART0); + GPIOPinConfigure(GPIO_PA0_U0RX); + GPIOPinConfigure(GPIO_PA1_U0TX); + ROM_GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_1); + UARTStdioInit(0); + UARTprintf("\033[2JuDMA Example\n"); + + // + // Show the clock frequency on the display. + // + UARTprintf("Stellaris @ %u MHz\n\n", ROM_SysCtlClockGet() / 1000000); + + // + // Show statistics headings. + // + UARTprintf("CPU Memory UART Remaining\n"); + UARTprintf("Usage Transfers Transfers Time\n"); + + // + // Configure SysTick to occur 100 times per second, to use as a time + // reference. Enable SysTick to generate interrupts. + // + ROM_SysTickPeriodSet(ROM_SysCtlClockGet() / SYSTICKS_PER_SECOND); + ROM_SysTickIntEnable(); + ROM_SysTickEnable(); + + // + // Initialize the CPU usage measurement routine. + // + CPUUsageInit(ROM_SysCtlClockGet(), SYSTICKS_PER_SECOND, 2); + + // + // Enable the uDMA controller at the system level. Enable it to continue + // to run while the processor is in sleep. + // + ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_UDMA); + ROM_SysCtlPeripheralSleepEnable(SYSCTL_PERIPH_UDMA); + + // + // Enable the uDMA controller error interrupt. This interrupt will occur + // if there is a bus error during a transfer. + // + ROM_IntEnable(INT_UDMAERR); + + // + // Enable the uDMA controller. + // + ROM_uDMAEnable(); + + // + // Point at the control table to use for channel control structures. + // + ROM_uDMAControlBaseSet(ucControlTable); + + // + // Initialize the uDMA memory to memory transfers. + // + InitSWTransfer(); + + // + // Initialize the uDMA UART transfers. + // + InitUART1Transfer(); + + // + // Remember the current SysTick seconds count. + // + ulPrevSeconds = g_ulSeconds; + + // + // Remember the current count of memory buffer transfers. + // + ulPrevXferCount = g_ulMemXferCount; + + // + // Loop until the button is pressed. The processor is put to sleep + // in this loop so that CPU utilization can be measured. + // + while(1) + { + // + // Check to see if one second has elapsed. If so, the make some + // updates. + // + if(g_ulSeconds != ulPrevSeconds) + { + // + // Turn on the LED as a heartbeat + // + GPIOPinWrite(GPIO_PORTF_BASE, GPIO_PIN_2, GPIO_PIN_2); + + // + // Print a message to the display showing the CPU usage percent. + // The fractional part of the percent value is ignored. + // + UARTprintf("\r%3d%% ", g_ulCPUUsage >> 16); + + // + // Remember the new seconds count. + // + ulPrevSeconds = g_ulSeconds; + + // + // Calculate how many memory transfers have occurred since the last + // second. + // + ulXfersCompleted = g_ulMemXferCount - ulPrevXferCount; + + // + // Remember the new transfer count. + // + ulPrevXferCount = g_ulMemXferCount; + + // + // Compute how many bytes were transferred in the memory transfer + // since the last second. + // + ulBytesTransferred = ulXfersCompleted * MEM_BUFFER_SIZE * 4; + + // + // Print a message showing the memory transfer rate. + // + if(ulBytesTransferred >= 100000000) + { + UARTprintf("%3d MB/s ", ulBytesTransferred / 1000000); + } + else if(ulBytesTransferred >= 10000000) + { + UARTprintf("%2d.%01d MB/s ", ulBytesTransferred / 1000000, + (ulBytesTransferred % 1000000) / 100000); + } + else if(ulBytesTransferred >= 1000000) + { + UARTprintf("%1d.%02d MB/s ", ulBytesTransferred / 1000000, + (ulBytesTransferred % 1000000) / 10000); + } + else if(ulBytesTransferred >= 100000) + { + UARTprintf("%3d KB/s ", ulBytesTransferred / 1000); + } + else if(ulBytesTransferred >= 10000) + { + UARTprintf("%2d.%01d KB/s ", ulBytesTransferred / 1000, + (ulBytesTransferred % 1000) / 100); + } + else if(ulBytesTransferred >= 1000) + { + UARTprintf("%1d.%02d KB/s ", ulBytesTransferred / 1000, + (ulBytesTransferred % 1000) / 10); + } + else if(ulBytesTransferred >= 100) + { + UARTprintf("%3d B/s ", ulBytesTransferred); + } + else if(ulBytesTransferred >= 10) + { + UARTprintf("%2d B/s ", ulBytesTransferred); + } + else + { + UARTprintf("%1d B/s ", ulBytesTransferred); + } + + // + // Calculate how many UART transfers have occurred since the last + // second. + // + ulXfersCompleted = (g_ulRxBufACount + g_ulRxBufBCount - + ulPrevUARTCount); + + // + // Remember the new UART transfer count. + // + ulPrevUARTCount = g_ulRxBufACount + g_ulRxBufBCount; + + // + // Compute how many bytes were transferred by the UART. The number + // of bytes received is multiplied by 2 so that the TX bytes + // transferred are also accounted for. + // + ulBytesTransferred = ulXfersCompleted * UART_RXBUF_SIZE * 2; + + // + // Print a message showing the UART transfer rate. + // + if(ulBytesTransferred >= 1000000) + { + UARTprintf("%1d.%02d MB/s ", ulBytesTransferred / 1000000, + (ulBytesTransferred % 1000000) / 10000); + } + else if(ulBytesTransferred >= 100000) + { + UARTprintf("%3d KB/s ", ulBytesTransferred / 1000); + } + else if(ulBytesTransferred >= 10000) + { + UARTprintf("%2d.%01d KB/s ", ulBytesTransferred / 1000, + (ulBytesTransferred % 1000) / 100); + } + else if(ulBytesTransferred >= 1000) + { + UARTprintf("%1d.%02d KB/s ", ulBytesTransferred / 1000, + (ulBytesTransferred % 1000) / 10); + } + else if(ulBytesTransferred >= 100) + { + UARTprintf("%3d B/s ", ulBytesTransferred); + } + else if(ulBytesTransferred >= 10) + { + UARTprintf("%2d B/s ", ulBytesTransferred); + } + else + { + UARTprintf("%1d B/s ", ulBytesTransferred); + } + + // + // Print a spinning line to make it more apparent that there is + // something happening. + // + UARTprintf("%2ds", 10 - ulPrevSeconds); + + // + // Turn off the LED. + // + GPIOPinWrite(GPIO_PORTF_BASE, GPIO_PIN_2, 0); + } + + // + // Put the processor to sleep if there is nothing to do. This allows + // the CPU usage routine to measure the number of free CPU cycles. + // If the processor is sleeping a lot, it can be hard to connect to + // the target with the debugger. + // + ROM_SysCtlSleep(); + + // + // See if we have run long enough and exit the loop if so. + // + if(g_ulSeconds >= 10) + { + break; + } + } + + // + // Indicate on the display that the example is stopped. + // + UARTprintf("\nStopped\n"); + + // + // Loop forever with the CPU not sleeping, so the debugger can connect. + // + while(1) + { + // + // Turn on the GREEN LED. + // + GPIOPinWrite(GPIO_PORTF_BASE, GPIO_PIN_2, GPIO_PIN_2); + + // + // Delay for a bit. + // + SysCtlDelay(SysCtlClockGet() / 20 / 3); + + // + // Turn off the GREEN LED. + // + GPIOPinWrite(GPIO_PORTF_BASE, GPIO_PIN_2, 0); + + // + // Delay for a bit. + // + SysCtlDelay(SysCtlClockGet() / 20 / 3); + + } +} diff --git a/boards/ek-lm4f120xl/udma_demo/udma_demo.ewd b/boards/ek-lm4f120xl/udma_demo/udma_demo.ewd new file mode 100644 index 0000000..b8eeac7 --- /dev/null +++ b/boards/ek-lm4f120xl/udma_demo/udma_demo.ewd @@ -0,0 +1,614 @@ + + + + 1 + + Debug + + ARM + + 1 + + C-SPY + 2 + + 15 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + ARMSIM_ID + 2 + + 1 + 1 + 1 + + + + + + + + ANGEL_ID + 2 + + 0 + 1 + 1 + + + + + + + + + + + + GDBSERVER_ID + 2 + + 0 + 1 + 1 + + + + + + + + + + + IARROM_ID + 2 + + 0 + 1 + 1 + + + + + + + + + + JLINK_ID + 2 + + 9 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + LMIFTDI_ID + 2 + + 1 + 1 + 1 + + + + + + + + MACRAIGOR_ID + 2 + + 2 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + RDI_ID + 2 + + 1 + 1 + 1 + + + + + + + + + + + + + + + + + THIRDPARTY_ID + 2 + + 0 + 1 + 1 + + + + + + + + + $TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\OSE\OseEpsilonPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\PowerPac\PowerPacRTOS.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin + 0 + + + $EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin + 1 + + + $EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin + 0 + + + $EW_DIR$\common\plugins\Profiling\Profiling.ENU.ewplugin + 1 + + + $EW_DIR$\common\plugins\Stack\Stack.ENU.ewplugin + 1 + + + + diff --git a/boards/ek-lm4f120xl/udma_demo/udma_demo.ewp b/boards/ek-lm4f120xl/udma_demo/udma_demo.ewp new file mode 100644 index 0000000..ea6c097 --- /dev/null +++ b/boards/ek-lm4f120xl/udma_demo/udma_demo.ewp @@ -0,0 +1,793 @@ + + + + 1 + + Debug + + ARM + + 1 + + General + 3 + + 14 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCARM + 2 + + 19 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AARM + 2 + + 7 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + OBJCOPY + 0 + + 1 + 1 + 1 + + + + + + + + + CUSTOM + 3 + + + + + + + BICOMP + 0 + + + + BUILDACTION + 1 + + + + + + + ILINK + 0 + + 5 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + IARCHIVE + 0 + + 0 + 1 + 1 + + + + + + + BILINK + 0 + + + + + Libraries + + $PROJ_DIR$\..\..\..\driverlib\ewarm-cm4f\Exe\driverlib-cm4f.a + + + + Source + + $PROJ_DIR$\..\..\..\utils\cpu_usage.c + + + $PROJ_DIR$\startup_ewarm.c + + + $PROJ_DIR$\..\..\..\utils\uartstdio.c + + + $PROJ_DIR$\udma_demo.c + + + $PROJ_DIR$\..\..\..\utils\ustdlib.c + + + diff --git a/boards/ek-lm4f120xl/udma_demo/udma_demo.icf b/boards/ek-lm4f120xl/udma_demo/udma_demo.icf new file mode 100644 index 0000000..bae8491 --- /dev/null +++ b/boards/ek-lm4f120xl/udma_demo/udma_demo.icf @@ -0,0 +1,78 @@ +//***************************************************************************** +// +// udma_demo.icf - Linker configuration file for udma_demo. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +// +// Define a memory region that covers the entire 4 GB addressible space of the +// processor. +// +define memory mem with size = 4G; + +// +// Define a region for the on-chip flash. +// +define region FLASH = mem:[from 0x00000000 to 0x0003ffff]; + +// +// Define a region for the on-chip SRAM. +// +define region SRAM = mem:[from 0x20000000 to 0x20007fff]; + +// +// Define a block for the heap. The size should be set to something other +// than zero if things in the C library that require the heap are used. +// +define block HEAP with alignment = 8, size = 0x00000000 { }; + +// +// Indicate that the read/write values should be initialized by copying from +// flash. +// +initialize by copy { readwrite }; + +// +// Indicate that the noinit values should be left alone. This includes the +// stack, which if initialized will destroy the return address from the +// initialization code, causing the processor to branch to zero and fault. +// +do not initialize { section .noinit }; + +// +// Place the interrupt vectors at the start of flash. +// +place at start of FLASH { readonly section .intvec }; + +// +// Place the remainder of the read-only items into flash. +// +place in FLASH { readonly }; + +// +// Place the RAM vector table at the start of SRAM. +// +place at start of SRAM { section VTABLE }; + +// +// Place all read/write items into SRAM. +// +place in SRAM { readwrite, block HEAP }; diff --git a/boards/ek-lm4f120xl/udma_demo/udma_demo.ld b/boards/ek-lm4f120xl/udma_demo/udma_demo.ld new file mode 100644 index 0000000..77e0c4a --- /dev/null +++ b/boards/ek-lm4f120xl/udma_demo/udma_demo.ld @@ -0,0 +1,57 @@ +/****************************************************************************** + * + * udma_demo.ld - Linker configuration file for udma_demo. + * + * Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. + * Software License Agreement + * + * Texas Instruments (TI) is supplying this software for use solely and + * exclusively on TI's microcontroller products. The software is owned by + * TI and/or its suppliers, and is protected under applicable copyright + * laws. You may not combine this software with "viral" open-source + * software in order to form a larger program. + * + * THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. + * NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT + * NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY + * CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL + * DAMAGES, FOR ANY REASON WHATSOEVER. + * + * This is part of revision 9453 of the EK-LM4F120XL Firmware Package. + * + *****************************************************************************/ + +MEMORY +{ + FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x00040000 + SRAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00008000 +} + +SECTIONS +{ + .text : + { + _text = .; + KEEP(*(.isr_vector)) + *(.text*) + *(.rodata*) + _etext = .; + } > FLASH + + .data : AT(ADDR(.text) + SIZEOF(.text)) + { + _data = .; + *(vtable) + *(.data*) + _edata = .; + } > SRAM + + .bss : + { + _bss = .; + *(.bss*) + *(COMMON) + _ebss = .; + } > SRAM +} diff --git a/boards/ek-lm4f120xl/udma_demo/udma_demo.sct b/boards/ek-lm4f120xl/udma_demo/udma_demo.sct new file mode 100644 index 0000000..e1fcdc9 --- /dev/null +++ b/boards/ek-lm4f120xl/udma_demo/udma_demo.sct @@ -0,0 +1,47 @@ +;****************************************************************************** +; +; udma_demo.sct - Linker configuration file for udma_demo. +; +; Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +; Software License Agreement +; +; Texas Instruments (TI) is supplying this software for use solely and +; exclusively on TI's microcontroller products. The software is owned by +; TI and/or its suppliers, and is protected under applicable copyright +; laws. You may not combine this software with "viral" open-source +; software in order to form a larger program. +; +; THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +; NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +; NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +; A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +; CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +; DAMAGES, FOR ANY REASON WHATSOEVER. +; +; This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +; +;****************************************************************************** + +LR_IROM 0x00000000 0x00040000 +{ + ; + ; Specify the Execution Address of the code and the size. + ; + ER_IROM 0x00000000 0x00040000 + { + *.o (RESET, +First) + * (InRoot$$Sections, +RO) + } + + ; + ; Specify the Execution Address of the data area. + ; + RW_IRAM 0x20000000 0x00008000 + { + ; + ; Uncomment the following line in order to use IntRegister(). + ; + ;* (vtable, +First) + * (+RW, +ZI) + } +} diff --git a/boards/ek-lm4f120xl/udma_demo/udma_demo.sgxx b/boards/ek-lm4f120xl/udma_demo/udma_demo.sgxx new file mode 100644 index 0000000..ca027c6 Binary files /dev/null and b/boards/ek-lm4f120xl/udma_demo/udma_demo.sgxx differ diff --git a/boards/ek-lm4f120xl/udma_demo/udma_demo.uvopt b/boards/ek-lm4f120xl/udma_demo/udma_demo.uvopt new file mode 100644 index 0000000..5cee5c3 --- /dev/null +++ b/boards/ek-lm4f120xl/udma_demo/udma_demo.uvopt @@ -0,0 +1,331 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + + + + 0 + 0 + + + + udma_demo + 0x4 + ARM-ADS + + 8000000 + + 1 + 1 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\rvmdk\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 255 + + + 0 + Data Sheet + DATASHTS\Luminary\LM4F120H5QR.PDF + + + + SARMCM3.DLL + -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 0 + 1 + 0 + 0 + 4 + + + + + + + + + + + BIN\lmidk-agdi.dll + + + + 0 + lmidk-agdi + -O4614 -S3 -FO29 + + + 0 + DLGTARM + + + + 0 + ARMDBGFLAGS + + + + + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + Source + 1 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\utils\cpu_usage.c + cpu_usage.c + + + 1 + 2 + 2 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + .\startup_rvmdk.S + startup_rvmdk.S + + + 1 + 3 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\utils\uartstdio.c + uartstdio.c + + + 1 + 4 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + .\udma_demo.c + udma_demo.c + + + 1 + 5 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\utils\ustdlib.c + ustdlib.c + + + + + Libraries + 1 + 0 + 0 + + 2 + 6 + 4 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\driverlib\rvmdk-cm4f\driverlib-cm4f.lib + driverlib-cm4f.lib + + + + + Documentation + 1 + 0 + 0 + + 3 + 7 + 5 + 0 + 1 + 0 + 0 + 1 + 1 + 0 + .\readme.txt + readme.txt + + 44 + 0 + 1 + + -1 + -1 + + + -1 + -1 + + + 0 + 0 + 729 + 300 + + + + + + + 1 + 0 + + 100 + 0 + + + .\readme.txt + 0 + 1 + 1 + + + + + + diff --git a/boards/ek-lm4f120xl/udma_demo/udma_demo.uvproj b/boards/ek-lm4f120xl/udma_demo/udma_demo.uvproj new file mode 100644 index 0000000..ff1236b --- /dev/null +++ b/boards/ek-lm4f120xl/udma_demo/udma_demo.uvproj @@ -0,0 +1,439 @@ + + + + 1.1 + +
### uVision Project, (C) Keil Software
+ + + + udma_demo + 0x4 + ARM-ADS + + + LM4F120H5QR + Texas Instruments + IRAM(0x20000000-0x20007FFF) IROM(0-0x3FFFF) CLOCK(8000000) CPUTYPE("Cortex-M4") FPU2 + + "STARTUP\Luminary\Startup.s" ("Luminary Startup Code") + UL2CM3(-O207 -S0 -C0 -FO7 -FD20000000 -FC800 -FN1 -FF0LM4F_256 -FS00 -FL040000) + 5919 + LM4Fxxxx.H + + + + + + + + + + 0 + + + + Luminary\ + Luminary\ + + 0 + 0 + 0 + 0 + 1 + + .\rvmdk\ + udma_demo + 1 + 0 + 0 + 1 + 1 + .\rvmdk\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + + 1 + 0 + fromelf --bin --output .\rvmdk\udma_demo.bin .\rvmdk\udma_demo.axf + + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + + + SARMCM3.DLL + -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + + 1 + 0 + 0 + 0 + 16 + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + + + 1 + 1 + 0 + 1 + 1 + 1 + 0 + 1 + + 0 + 4 + + + + + + + + + + + + + + BIN\lmidk-agdi.dll + + + + + 1 + 0 + 0 + 0 + 1 + 4099 + + BIN\lmidk-agdi.dll + + + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M4" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 2 + 0 + 0 + 8 + 1 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x8000 + + + 1 + 0x0 + 0x40000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x40000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x8000 + + + 0 + 0x0 + 0x0 + + + + + + 0 + 3 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + + + rvmdk PART_LM4F120H5QR TARGET_IS_BLIZZARD_RA1 + + ..\..\..; + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x00000000 + 0x20000000 + udma_demo.sct + + + --entry Reset_Handler + + + + + + + + Source + + + cpu_usage.c + 1 + ..\..\..\utils\cpu_usage.c + + + startup_rvmdk.S + 2 + .\startup_rvmdk.S + + + uartstdio.c + 1 + ..\..\..\utils\uartstdio.c + + + udma_demo.c + 1 + .\udma_demo.c + + + ustdlib.c + 1 + ..\..\..\utils\ustdlib.c + + + + + Libraries + + + driverlib-cm4f.lib + 4 + ..\..\..\driverlib\rvmdk-cm4f\driverlib-cm4f.lib + + + + + Documentation + + + readme.txt + 5 + .\readme.txt + + + + + + + + diff --git a/boards/ek-lm4f120xl/udma_demo/udma_demo_ccs.cmd b/boards/ek-lm4f120xl/udma_demo/udma_demo_ccs.cmd new file mode 100644 index 0000000..343a05a --- /dev/null +++ b/boards/ek-lm4f120xl/udma_demo/udma_demo_ccs.cmd @@ -0,0 +1,70 @@ +/****************************************************************************** + * + * udma_demo_ccs.cmd - CCS linker configuration file for udma_demo. + * + * Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. + * Software License Agreement + * + * Texas Instruments (TI) is supplying this software for use solely and + * exclusively on TI's microcontroller products. The software is owned by + * TI and/or its suppliers, and is protected under applicable copyright + * laws. You may not combine this software with "viral" open-source + * software in order to form a larger program. + * + * THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. + * NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT + * NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY + * CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL + * DAMAGES, FOR ANY REASON WHATSOEVER. + * + * This is part of revision 9453 of the EK-LM4F120XL Firmware Package. + * + *****************************************************************************/ + +--retain=g_pfnVectors + +/* The following command line options are set as part of the CCS project. */ +/* If you are building using the command line, or for some reason want to */ +/* define them here, you can uncomment and modify these lines as needed. */ +/* If you are using CCS for building, it is probably better to make any such */ +/* modifications in your CCS project and leave this file alone. */ +/* */ +/* --heap_size=0 */ +/* --stack_size=256 */ +/* --library=rtsv7M3_T_le_eabi.lib */ + +/* The starting address of the application. Normally the interrupt vectors */ +/* must be located at the beginning of the application. */ +#define APP_BASE 0x00000000 +#define RAM_BASE 0x20000000 + +/* System memory map */ + +MEMORY +{ + /* Application stored in and executes from internal flash */ + FLASH (RX) : origin = APP_BASE, length = 0x00040000 + /* Application uses internal RAM for data */ + SRAM (RWX) : origin = 0x20000000, length = 0x00008000 +} + +/* Section allocation in memory */ + +SECTIONS +{ + .intvecs: > APP_BASE + .text : > FLASH + .const : > FLASH + .cinit : > FLASH + .pinit : > FLASH + .init_array : > FLASH + + .vtable : > RAM_BASE + .data : > SRAM + .bss : > SRAM + .sysmem : > SRAM + .stack : > SRAM +} + +__STACK_TOP = __stack + 1024; diff --git a/boards/ek-lm4f120xl/udma_demo/udma_demo_sourcerygxx.ld b/boards/ek-lm4f120xl/udma_demo/udma_demo_sourcerygxx.ld new file mode 100644 index 0000000..89e27cd --- /dev/null +++ b/boards/ek-lm4f120xl/udma_demo/udma_demo_sourcerygxx.ld @@ -0,0 +1,45 @@ +/****************************************************************************** + * + * udma_demo_sourcerygxx.ld - Scatter file for Sourcery CodeBench + * + * Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. + * Software License Agreement + * + * Texas Instruments (TI) is supplying this software for use solely and + * exclusively on TI's microcontroller products. The software is owned by + * TI and/or its suppliers, and is protected under applicable copyright + * laws. You may not combine this software with "viral" open-source + * software in order to form a larger program. + * + * THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. + * NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT + * NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY + * CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL + * DAMAGES, FOR ANY REASON WHATSOEVER. + * + * This is part of revision 9453 of the EK-LM4F120XL Firmware Package. + * + *****************************************************************************/ + +/****************************************************************************** + * + * Define the end of the heap space, which determines the beginning of the + * stack space. + * + *****************************************************************************/ +__cs3_heap_end = __cs3_region_end_ram - 1024; + +/****************************************************************************** + * + * Define the interrupt handlers used by the application. + * + *****************************************************************************/ +EXTERN(SysTickHandler) +__cs3_isr_systick = SysTickHandler; +EXTERN(UART1IntHandler) +__cs3_isr_uart1 = UART1IntHandler; +EXTERN(uDMAIntHandler) +__cs3_isr_udma = uDMAIntHandler; +EXTERN(uDMAErrorHandler) +__cs3_isr_udmaerr = uDMAErrorHandler; diff --git a/boards/ek-lm4f120xl/usb_dev_bulk/Makefile b/boards/ek-lm4f120xl/usb_dev_bulk/Makefile new file mode 100644 index 0000000..634cb6f --- /dev/null +++ b/boards/ek-lm4f120xl/usb_dev_bulk/Makefile @@ -0,0 +1,94 @@ +#****************************************************************************** +# +# Makefile - Rules for building the USB device bulk example. +# +# Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +# Software License Agreement +# +# Texas Instruments (TI) is supplying this software for use solely and +# exclusively on TI's microcontroller products. The software is owned by +# TI and/or its suppliers, and is protected under applicable copyright +# laws. You may not combine this software with "viral" open-source +# software in order to form a larger program. +# +# THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +# NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +# NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +# A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +# CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +# DAMAGES, FOR ANY REASON WHATSOEVER. +# +# This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +# +#****************************************************************************** + +# +# Defines the part type that this project uses. +# +PART=LM4F120H5QR + +# +# Set the processor variant. +# +VARIANT=cm4f + +# +# The base directory for StellarisWare. +# +ROOT=../../.. + +# +# Include the common make definitions. +# +include ${ROOT}/makedefs + +# +# Where to find source files that do not live in this directory. +# +VPATH= +VPATH+=../../../utils + +# +# Where to find header files that do not live in the source directory. +# +IPATH=../../.. + +# +# The default rule, which causes the USB device bulk example to be built. +# +all: ${COMPILER} +all: ${COMPILER}/usb_dev_bulk.axf + +# +# The rule to clean out all the build products. +# +clean: + @rm -rf ${COMPILER} ${wildcard *~} + +# +# The rule to create the target directory. +# +${COMPILER}: + @mkdir -p ${COMPILER} + +# +# Rules for building the USB device bulk example. +# +${COMPILER}/usb_dev_bulk.axf: ${COMPILER}/startup_${COMPILER}.o +${COMPILER}/usb_dev_bulk.axf: ${COMPILER}/uartstdio.o +${COMPILER}/usb_dev_bulk.axf: ${COMPILER}/usb_bulk_structs.o +${COMPILER}/usb_dev_bulk.axf: ${COMPILER}/usb_dev_bulk.o +${COMPILER}/usb_dev_bulk.axf: ${COMPILER}/ustdlib.o +${COMPILER}/usb_dev_bulk.axf: ${ROOT}/usblib/${COMPILER}-cm4f/libusb-cm4f.a +${COMPILER}/usb_dev_bulk.axf: ${ROOT}/driverlib/${COMPILER}-cm4f/libdriver-cm4f.a +${COMPILER}/usb_dev_bulk.axf: usb_dev_bulk.ld +SCATTERgcc_usb_dev_bulk=usb_dev_bulk.ld +ENTRY_usb_dev_bulk=ResetISR +CFLAGSgcc=-DTARGET_IS_BLIZZARD_RA1 -DUART_BUFFERED + +# +# Include the automatically generated dependency files. +# +ifneq (${MAKECMDGOALS},clean) +-include ${wildcard ${COMPILER}/*.d} __dummy__ +endif diff --git a/boards/ek-lm4f120xl/usb_dev_bulk/ccs/.ccsimportspec b/boards/ek-lm4f120xl/usb_dev_bulk/ccs/.ccsimportspec new file mode 100644 index 0000000..6c9f4a0 --- /dev/null +++ b/boards/ek-lm4f120xl/usb_dev_bulk/ccs/.ccsimportspec @@ -0,0 +1,10 @@ + + + + + + + + + + diff --git a/boards/ek-lm4f120xl/usb_dev_bulk/ccs/.ccsproject b/boards/ek-lm4f120xl/usb_dev_bulk/ccs/.ccsproject new file mode 100644 index 0000000..56793f4 --- /dev/null +++ b/boards/ek-lm4f120xl/usb_dev_bulk/ccs/.ccsproject @@ -0,0 +1,12 @@ + + + + + + + + + + + + diff --git a/boards/ek-lm4f120xl/usb_dev_bulk/ccs/.cproject b/boards/ek-lm4f120xl/usb_dev_bulk/ccs/.cproject new file mode 100644 index 0000000..8e52601 --- /dev/null +++ b/boards/ek-lm4f120xl/usb_dev_bulk/ccs/.cproject @@ -0,0 +1,195 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/boards/ek-lm4f120xl/usb_dev_bulk/ccs/.project b/boards/ek-lm4f120xl/usb_dev_bulk/ccs/.project new file mode 100644 index 0000000..82e32c3 --- /dev/null +++ b/boards/ek-lm4f120xl/usb_dev_bulk/ccs/.project @@ -0,0 +1,121 @@ + + + usb_dev_bulk + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + + + ?name? + + + + org.eclipse.cdt.make.core.append_environment + true + + + org.eclipse.cdt.make.core.autoBuildTarget + all + + + org.eclipse.cdt.make.core.buildArguments + -k + + + org.eclipse.cdt.make.core.buildCommand + ${CCS_UTILS_DIR}/bin/gmake + + + org.eclipse.cdt.make.core.buildLocation + ${BuildDirectory} + + + org.eclipse.cdt.make.core.cleanBuildTarget + clean + + + org.eclipse.cdt.make.core.contents + org.eclipse.cdt.make.core.activeConfigSettings + + + org.eclipse.cdt.make.core.enableAutoBuild + true + + + org.eclipse.cdt.make.core.enableCleanBuild + true + + + org.eclipse.cdt.make.core.enableFullBuild + true + + + org.eclipse.cdt.make.core.fullBuildTarget + all + + + org.eclipse.cdt.make.core.stopOnError + false + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + true + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + com.ti.ccstudio.core.ccsNature + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.core.ccnature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + startup_ccs.c + 1 + SW_ROOT/boards/ek-lm4f120xl/usb_dev_bulk/startup_ccs.c + + + usb_bulk_structs.c + 1 + SW_ROOT/boards/ek-lm4f120xl/usb_dev_bulk/usb_bulk_structs.c + + + usb_dev_bulk.c + 1 + SW_ROOT/boards/ek-lm4f120xl/usb_dev_bulk/usb_dev_bulk.c + + + usb_dev_bulk_ccs.cmd + 1 + SW_ROOT/boards/ek-lm4f120xl/usb_dev_bulk/usb_dev_bulk_ccs.cmd + + + utils/uartstdio.c + 1 + SW_ROOT/utils/uartstdio.c + + + utils/ustdlib.c + 1 + SW_ROOT/utils/ustdlib.c + + + + + SW_ROOT + $%7BPARENT-4-PROJECT_LOC%7D + + + diff --git a/boards/ek-lm4f120xl/usb_dev_bulk/ccs/.settings/org.eclipse.cdt.codan.core.prefs b/boards/ek-lm4f120xl/usb_dev_bulk/ccs/.settings/org.eclipse.cdt.codan.core.prefs new file mode 100644 index 0000000..98b6350 --- /dev/null +++ b/boards/ek-lm4f120xl/usb_dev_bulk/ccs/.settings/org.eclipse.cdt.codan.core.prefs @@ -0,0 +1,3 @@ +eclipse.preferences.version=1 +inEditor=false +onBuild=false diff --git a/boards/ek-lm4f120xl/usb_dev_bulk/ccs/Debug/usb_dev_bulk.bin b/boards/ek-lm4f120xl/usb_dev_bulk/ccs/Debug/usb_dev_bulk.bin new file mode 100644 index 0000000..9b2ce37 Binary files /dev/null and b/boards/ek-lm4f120xl/usb_dev_bulk/ccs/Debug/usb_dev_bulk.bin differ diff --git a/boards/ek-lm4f120xl/usb_dev_bulk/ccs/Debug/usb_dev_bulk.out b/boards/ek-lm4f120xl/usb_dev_bulk/ccs/Debug/usb_dev_bulk.out new file mode 100644 index 0000000..30ea958 Binary files /dev/null and b/boards/ek-lm4f120xl/usb_dev_bulk/ccs/Debug/usb_dev_bulk.out differ diff --git a/boards/ek-lm4f120xl/usb_dev_bulk/ccs/macros.ini_initial b/boards/ek-lm4f120xl/usb_dev_bulk/ccs/macros.ini_initial new file mode 100644 index 0000000..588017d --- /dev/null +++ b/boards/ek-lm4f120xl/usb_dev_bulk/ccs/macros.ini_initial @@ -0,0 +1 @@ +SW_ROOT = ../../../.. diff --git a/boards/ek-lm4f120xl/usb_dev_bulk/ccs/target_config.ccxml b/boards/ek-lm4f120xl/usb_dev_bulk/ccs/target_config.ccxml new file mode 100644 index 0000000..469eea0 --- /dev/null +++ b/boards/ek-lm4f120xl/usb_dev_bulk/ccs/target_config.ccxml @@ -0,0 +1,13 @@ + + + + + + + + + + + + + diff --git a/boards/ek-lm4f120xl/usb_dev_bulk/ewarm/Exe/usb_dev_bulk.bin b/boards/ek-lm4f120xl/usb_dev_bulk/ewarm/Exe/usb_dev_bulk.bin new file mode 100644 index 0000000..d1f799b Binary files /dev/null and b/boards/ek-lm4f120xl/usb_dev_bulk/ewarm/Exe/usb_dev_bulk.bin differ diff --git a/boards/ek-lm4f120xl/usb_dev_bulk/ewarm/Exe/usb_dev_bulk.out b/boards/ek-lm4f120xl/usb_dev_bulk/ewarm/Exe/usb_dev_bulk.out new file mode 100644 index 0000000..498ce1b Binary files /dev/null and b/boards/ek-lm4f120xl/usb_dev_bulk/ewarm/Exe/usb_dev_bulk.out differ diff --git a/boards/ek-lm4f120xl/usb_dev_bulk/gcc/usb_dev_bulk.axf b/boards/ek-lm4f120xl/usb_dev_bulk/gcc/usb_dev_bulk.axf new file mode 100644 index 0000000..1d49be1 Binary files /dev/null and b/boards/ek-lm4f120xl/usb_dev_bulk/gcc/usb_dev_bulk.axf differ diff --git a/boards/ek-lm4f120xl/usb_dev_bulk/gcc/usb_dev_bulk.bin b/boards/ek-lm4f120xl/usb_dev_bulk/gcc/usb_dev_bulk.bin new file mode 100644 index 0000000..a09c2b6 Binary files /dev/null and b/boards/ek-lm4f120xl/usb_dev_bulk/gcc/usb_dev_bulk.bin differ diff --git a/boards/ek-lm4f120xl/usb_dev_bulk/readme.txt b/boards/ek-lm4f120xl/usb_dev_bulk/readme.txt new file mode 100644 index 0000000..4a9669d --- /dev/null +++ b/boards/ek-lm4f120xl/usb_dev_bulk/readme.txt @@ -0,0 +1,43 @@ +USB Generic Bulk Device + +This example provides a generic USB device offering simple bulk data +transfer to and from the host. The device uses a vendor-specific class ID +and supports a single bulk IN endpoint and a single bulk OUT endpoint. +Data received from the host is assumed to be ASCII text and it is +echoed back with the case of all alphabetic characters swapped. + +A Windows INF file for the device is provided on the installation CD and +in the C:/StellarisWare/windows_drivers directory of StellarisWare +releases. This INF contains information required to install the WinUSB +subsystem on WindowsXP and Vista PCs. WinUSB is a Windows subsystem +allowing user mode applications to access the USB device without the need +for a vendor-specific kernel mode driver. + +A sample Windows command-line application, usb_bulk_example, illustrating +how to connect to and communicate with the bulk device is also provided. +The application binary is installed as part of the ``Windows-side examples +for USB kits'' package (SW-USB-win) on the installation CD or via download +from http://www.ti.com/stellarisware . Project files are included to allow +the examples to be built using Microsoft VisualStudio 2008. Source code +for this application can be found in directory +StellarisWare/tools/usb_bulk_example. + +------------------------------------------------------------------------------- + +Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +Software License Agreement + +Texas Instruments (TI) is supplying this software for use solely and +exclusively on TI's microcontroller products. The software is owned by +TI and/or its suppliers, and is protected under applicable copyright +laws. You may not combine this software with "viral" open-source +software in order to form a larger program. + +THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +DAMAGES, FOR ANY REASON WHATSOEVER. + +This is part of revision 9453 of the EK-LM4F120XL Firmware Package. diff --git a/boards/ek-lm4f120xl/usb_dev_bulk/rvmdk/usb_dev_bulk.axf b/boards/ek-lm4f120xl/usb_dev_bulk/rvmdk/usb_dev_bulk.axf new file mode 100644 index 0000000..4cf6d23 Binary files /dev/null and b/boards/ek-lm4f120xl/usb_dev_bulk/rvmdk/usb_dev_bulk.axf differ diff --git a/boards/ek-lm4f120xl/usb_dev_bulk/rvmdk/usb_dev_bulk.bin b/boards/ek-lm4f120xl/usb_dev_bulk/rvmdk/usb_dev_bulk.bin new file mode 100644 index 0000000..49839e6 Binary files /dev/null and b/boards/ek-lm4f120xl/usb_dev_bulk/rvmdk/usb_dev_bulk.bin differ diff --git a/boards/ek-lm4f120xl/usb_dev_bulk/sourcerygxx/usb_dev_bulk.axf b/boards/ek-lm4f120xl/usb_dev_bulk/sourcerygxx/usb_dev_bulk.axf new file mode 100644 index 0000000..a3f259e Binary files /dev/null and b/boards/ek-lm4f120xl/usb_dev_bulk/sourcerygxx/usb_dev_bulk.axf differ diff --git a/boards/ek-lm4f120xl/usb_dev_bulk/sourcerygxx/usb_dev_bulk.bin b/boards/ek-lm4f120xl/usb_dev_bulk/sourcerygxx/usb_dev_bulk.bin new file mode 100644 index 0000000..4aecb77 Binary files /dev/null and b/boards/ek-lm4f120xl/usb_dev_bulk/sourcerygxx/usb_dev_bulk.bin differ diff --git a/boards/ek-lm4f120xl/usb_dev_bulk/startup_ccs.c b/boards/ek-lm4f120xl/usb_dev_bulk/startup_ccs.c new file mode 100644 index 0000000..dbb2ea5 --- /dev/null +++ b/boards/ek-lm4f120xl/usb_dev_bulk/startup_ccs.c @@ -0,0 +1,300 @@ +//***************************************************************************** +// +// startup_ccs.c - Startup code for use with TI's Code Composer Studio. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +//***************************************************************************** +// +// Forward declaration of the default fault handlers. +// +//***************************************************************************** +void ResetISR(void); +static void NmiSR(void); +static void FaultISR(void); +static void IntDefaultHandler(void); + +//***************************************************************************** +// +// External declaration for the reset handler that is to be called when the +// processor is started +// +//***************************************************************************** +extern void _c_int00(void); + +//***************************************************************************** +// +// Linker variable that marks the top of the stack. +// +//***************************************************************************** +extern unsigned long __STACK_TOP; + +//***************************************************************************** +// +// External declarations for the interrupt handlers used by the application. +// +//***************************************************************************** +extern void SysTickIntHandler(void); +extern void UARTStdioIntHandler(void); +extern void USB0DeviceIntHandler(void); + +//***************************************************************************** +// +// The vector table. Note that the proper constructs must be placed on this to +// ensure that it ends up at physical address 0x0000.0000 or at the start of +// the program if located at a start address other than 0. +// +//***************************************************************************** +#pragma DATA_SECTION(g_pfnVectors, ".intvecs") +void (* const g_pfnVectors[])(void) = +{ + (void (*)(void))((unsigned long)&__STACK_TOP), + // The initial stack pointer + ResetISR, // The reset handler + NmiSR, // The NMI handler + FaultISR, // The hard fault handler + IntDefaultHandler, // The MPU fault handler + IntDefaultHandler, // The bus fault handler + IntDefaultHandler, // The usage fault handler + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // SVCall handler + IntDefaultHandler, // Debug monitor handler + 0, // Reserved + IntDefaultHandler, // The PendSV handler + SysTickIntHandler, // The SysTick handler + IntDefaultHandler, // GPIO Port A + IntDefaultHandler, // GPIO Port B + IntDefaultHandler, // GPIO Port C + IntDefaultHandler, // GPIO Port D + IntDefaultHandler, // GPIO Port E + UARTStdioIntHandler, // UART0 Rx and Tx + IntDefaultHandler, // UART1 Rx and Tx + IntDefaultHandler, // SSI0 Rx and Tx + IntDefaultHandler, // I2C0 Master and Slave + IntDefaultHandler, // PWM Fault + IntDefaultHandler, // PWM Generator 0 + IntDefaultHandler, // PWM Generator 1 + IntDefaultHandler, // PWM Generator 2 + IntDefaultHandler, // Quadrature Encoder 0 + IntDefaultHandler, // ADC Sequence 0 + IntDefaultHandler, // ADC Sequence 1 + IntDefaultHandler, // ADC Sequence 2 + IntDefaultHandler, // ADC Sequence 3 + IntDefaultHandler, // Watchdog timer + IntDefaultHandler, // Timer 0 subtimer A + IntDefaultHandler, // Timer 0 subtimer B + IntDefaultHandler, // Timer 1 subtimer A + IntDefaultHandler, // Timer 1 subtimer B + IntDefaultHandler, // Timer 2 subtimer A + IntDefaultHandler, // Timer 2 subtimer B + IntDefaultHandler, // Analog Comparator 0 + IntDefaultHandler, // Analog Comparator 1 + IntDefaultHandler, // Analog Comparator 2 + IntDefaultHandler, // System Control (PLL, OSC, BO) + IntDefaultHandler, // FLASH Control + IntDefaultHandler, // GPIO Port F + IntDefaultHandler, // GPIO Port G + IntDefaultHandler, // GPIO Port H + IntDefaultHandler, // UART2 Rx and Tx + IntDefaultHandler, // SSI1 Rx and Tx + IntDefaultHandler, // Timer 3 subtimer A + IntDefaultHandler, // Timer 3 subtimer B + IntDefaultHandler, // I2C1 Master and Slave + IntDefaultHandler, // Quadrature Encoder 1 + IntDefaultHandler, // CAN0 + IntDefaultHandler, // CAN1 + IntDefaultHandler, // CAN2 + IntDefaultHandler, // Ethernet + IntDefaultHandler, // Hibernate + USB0DeviceIntHandler, // USB0 + IntDefaultHandler, // PWM Generator 3 + IntDefaultHandler, // uDMA Software Transfer + IntDefaultHandler, // uDMA Error + IntDefaultHandler, // ADC1 Sequence 0 + IntDefaultHandler, // ADC1 Sequence 1 + IntDefaultHandler, // ADC1 Sequence 2 + IntDefaultHandler, // ADC1 Sequence 3 + IntDefaultHandler, // I2S0 + IntDefaultHandler, // External Bus Interface 0 + IntDefaultHandler, // GPIO Port J + IntDefaultHandler, // GPIO Port K + IntDefaultHandler, // GPIO Port L + IntDefaultHandler, // SSI2 Rx and Tx + IntDefaultHandler, // SSI3 Rx and Tx + IntDefaultHandler, // UART3 Rx and Tx + IntDefaultHandler, // UART4 Rx and Tx + IntDefaultHandler, // UART5 Rx and Tx + IntDefaultHandler, // UART6 Rx and Tx + IntDefaultHandler, // UART7 Rx and Tx + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // I2C2 Master and Slave + IntDefaultHandler, // I2C3 Master and Slave + IntDefaultHandler, // Timer 4 subtimer A + IntDefaultHandler, // Timer 4 subtimer B + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // Timer 5 subtimer A + IntDefaultHandler, // Timer 5 subtimer B + IntDefaultHandler, // Wide Timer 0 subtimer A + IntDefaultHandler, // Wide Timer 0 subtimer B + IntDefaultHandler, // Wide Timer 1 subtimer A + IntDefaultHandler, // Wide Timer 1 subtimer B + IntDefaultHandler, // Wide Timer 2 subtimer A + IntDefaultHandler, // Wide Timer 2 subtimer B + IntDefaultHandler, // Wide Timer 3 subtimer A + IntDefaultHandler, // Wide Timer 3 subtimer B + IntDefaultHandler, // Wide Timer 4 subtimer A + IntDefaultHandler, // Wide Timer 4 subtimer B + IntDefaultHandler, // Wide Timer 5 subtimer A + IntDefaultHandler, // Wide Timer 5 subtimer B + IntDefaultHandler, // FPU + IntDefaultHandler, // PECI 0 + IntDefaultHandler, // LPC 0 + IntDefaultHandler, // I2C4 Master and Slave + IntDefaultHandler, // I2C5 Master and Slave + IntDefaultHandler, // GPIO Port M + IntDefaultHandler, // GPIO Port N + IntDefaultHandler, // Quadrature Encoder 2 + IntDefaultHandler, // Fan 0 + 0, // Reserved + IntDefaultHandler, // GPIO Port P (Summary or P0) + IntDefaultHandler, // GPIO Port P1 + IntDefaultHandler, // GPIO Port P2 + IntDefaultHandler, // GPIO Port P3 + IntDefaultHandler, // GPIO Port P4 + IntDefaultHandler, // GPIO Port P5 + IntDefaultHandler, // GPIO Port P6 + IntDefaultHandler, // GPIO Port P7 + IntDefaultHandler, // GPIO Port Q (Summary or Q0) + IntDefaultHandler, // GPIO Port Q1 + IntDefaultHandler, // GPIO Port Q2 + IntDefaultHandler, // GPIO Port Q3 + IntDefaultHandler, // GPIO Port Q4 + IntDefaultHandler, // GPIO Port Q5 + IntDefaultHandler, // GPIO Port Q6 + IntDefaultHandler, // GPIO Port Q7 + IntDefaultHandler, // GPIO Port R + IntDefaultHandler, // GPIO Port S + IntDefaultHandler, // PWM 1 Generator 0 + IntDefaultHandler, // PWM 1 Generator 1 + IntDefaultHandler, // PWM 1 Generator 2 + IntDefaultHandler, // PWM 1 Generator 3 + IntDefaultHandler // PWM 1 Fault +}; + +//***************************************************************************** +// +// This is the code that gets called when the processor first starts execution +// following a reset event. Only the absolutely necessary set is performed, +// after which the application supplied entry() routine is called. Any fancy +// actions (such as making decisions based on the reset cause register, and +// resetting the bits in that register) are left solely in the hands of the +// application. +// +//***************************************************************************** +void +ResetISR(void) +{ + // + // Jump to the CCS C initialization routine. This will enable the + // floating-point unit as well, so that does not need to be done here. + // + __asm(" .global _c_int00\n" + " b.w _c_int00"); +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a NMI. This +// simply enters an infinite loop, preserving the system state for examination +// by a debugger. +// +//***************************************************************************** +static void +NmiSR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a fault +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +FaultISR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives an unexpected +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +IntDefaultHandler(void) +{ + // + // Go into an infinite loop. + // + while(1) + { + } +} diff --git a/boards/ek-lm4f120xl/usb_dev_bulk/startup_ewarm.c b/boards/ek-lm4f120xl/usb_dev_bulk/startup_ewarm.c new file mode 100644 index 0000000..af70b68 --- /dev/null +++ b/boards/ek-lm4f120xl/usb_dev_bulk/startup_ewarm.c @@ -0,0 +1,334 @@ +//***************************************************************************** +// +// startup_ewarm.c - Startup code for use with IAR's Embedded Workbench, +// version 5. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +#include "inc/hw_nvic.h" +#include "inc/hw_types.h" + +//***************************************************************************** +// +// Enable the IAR extensions for this source file. +// +//***************************************************************************** +#pragma language=extended + +//***************************************************************************** +// +// Forward declaration of the default fault handlers. +// +//***************************************************************************** +void ResetISR(void); +static void NmiSR(void); +static void FaultISR(void); +static void IntDefaultHandler(void); + +//***************************************************************************** +// +// External declarations for the interrupt handlers used by the application. +// +//***************************************************************************** +extern void SysTickIntHandler(void); +extern void UARTStdioIntHandler(void); +extern void USB0DeviceIntHandler(void); + +//***************************************************************************** +// +// The entry point for the application startup code. +// +//***************************************************************************** +extern void __iar_program_start(void); + +//***************************************************************************** +// +// Reserve space for the system stack. +// +//***************************************************************************** +static unsigned long pulStack[256] @ ".noinit"; + +//***************************************************************************** +// +// A union that describes the entries of the vector table. The union is needed +// since the first entry is the stack pointer and the remainder are function +// pointers. +// +//***************************************************************************** +typedef union +{ + void (*pfnHandler)(void); + unsigned long ulPtr; +} +uVectorEntry; + +//***************************************************************************** +// +// The vector table. Note that the proper constructs must be placed on this to +// ensure that it ends up at physical address 0x0000.0000. +// +//***************************************************************************** +__root const uVectorEntry __vector_table[] @ ".intvec" = +{ + { .ulPtr = (unsigned long)pulStack + sizeof(pulStack) }, + // The initial stack pointer + ResetISR, // The reset handler + NmiSR, // The NMI handler + FaultISR, // The hard fault handler + IntDefaultHandler, // The MPU fault handler + IntDefaultHandler, // The bus fault handler + IntDefaultHandler, // The usage fault handler + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // SVCall handler + IntDefaultHandler, // Debug monitor handler + 0, // Reserved + IntDefaultHandler, // The PendSV handler + SysTickIntHandler, // The SysTick handler + IntDefaultHandler, // GPIO Port A + IntDefaultHandler, // GPIO Port B + IntDefaultHandler, // GPIO Port C + IntDefaultHandler, // GPIO Port D + IntDefaultHandler, // GPIO Port E + UARTStdioIntHandler, // UART0 Rx and Tx + IntDefaultHandler, // UART1 Rx and Tx + IntDefaultHandler, // SSI0 Rx and Tx + IntDefaultHandler, // I2C0 Master and Slave + IntDefaultHandler, // PWM Fault + IntDefaultHandler, // PWM Generator 0 + IntDefaultHandler, // PWM Generator 1 + IntDefaultHandler, // PWM Generator 2 + IntDefaultHandler, // Quadrature Encoder 0 + IntDefaultHandler, // ADC Sequence 0 + IntDefaultHandler, // ADC Sequence 1 + IntDefaultHandler, // ADC Sequence 2 + IntDefaultHandler, // ADC Sequence 3 + IntDefaultHandler, // Watchdog timer + IntDefaultHandler, // Timer 0 subtimer A + IntDefaultHandler, // Timer 0 subtimer B + IntDefaultHandler, // Timer 1 subtimer A + IntDefaultHandler, // Timer 1 subtimer B + IntDefaultHandler, // Timer 2 subtimer A + IntDefaultHandler, // Timer 2 subtimer B + IntDefaultHandler, // Analog Comparator 0 + IntDefaultHandler, // Analog Comparator 1 + IntDefaultHandler, // Analog Comparator 2 + IntDefaultHandler, // System Control (PLL, OSC, BO) + IntDefaultHandler, // FLASH Control + IntDefaultHandler, // GPIO Port F + IntDefaultHandler, // GPIO Port G + IntDefaultHandler, // GPIO Port H + IntDefaultHandler, // UART2 Rx and Tx + IntDefaultHandler, // SSI1 Rx and Tx + IntDefaultHandler, // Timer 3 subtimer A + IntDefaultHandler, // Timer 3 subtimer B + IntDefaultHandler, // I2C1 Master and Slave + IntDefaultHandler, // Quadrature Encoder 1 + IntDefaultHandler, // CAN0 + IntDefaultHandler, // CAN1 + IntDefaultHandler, // CAN2 + IntDefaultHandler, // Ethernet + IntDefaultHandler, // Hibernate + USB0DeviceIntHandler, // USB0 + IntDefaultHandler, // PWM Generator 3 + IntDefaultHandler, // uDMA Software Transfer + IntDefaultHandler, // uDMA Error + IntDefaultHandler, // ADC1 Sequence 0 + IntDefaultHandler, // ADC1 Sequence 1 + IntDefaultHandler, // ADC1 Sequence 2 + IntDefaultHandler, // ADC1 Sequence 3 + IntDefaultHandler, // I2S0 + IntDefaultHandler, // External Bus Interface 0 + IntDefaultHandler, // GPIO Port J + IntDefaultHandler, // GPIO Port K + IntDefaultHandler, // GPIO Port L + IntDefaultHandler, // SSI2 Rx and Tx + IntDefaultHandler, // SSI3 Rx and Tx + IntDefaultHandler, // UART3 Rx and Tx + IntDefaultHandler, // UART4 Rx and Tx + IntDefaultHandler, // UART5 Rx and Tx + IntDefaultHandler, // UART6 Rx and Tx + IntDefaultHandler, // UART7 Rx and Tx + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // I2C2 Master and Slave + IntDefaultHandler, // I2C3 Master and Slave + IntDefaultHandler, // Timer 4 subtimer A + IntDefaultHandler, // Timer 4 subtimer B + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // Timer 5 subtimer A + IntDefaultHandler, // Timer 5 subtimer B + IntDefaultHandler, // Wide Timer 0 subtimer A + IntDefaultHandler, // Wide Timer 0 subtimer B + IntDefaultHandler, // Wide Timer 1 subtimer A + IntDefaultHandler, // Wide Timer 1 subtimer B + IntDefaultHandler, // Wide Timer 2 subtimer A + IntDefaultHandler, // Wide Timer 2 subtimer B + IntDefaultHandler, // Wide Timer 3 subtimer A + IntDefaultHandler, // Wide Timer 3 subtimer B + IntDefaultHandler, // Wide Timer 4 subtimer A + IntDefaultHandler, // Wide Timer 4 subtimer B + IntDefaultHandler, // Wide Timer 5 subtimer A + IntDefaultHandler, // Wide Timer 5 subtimer B + IntDefaultHandler, // FPU + IntDefaultHandler, // PECI 0 + IntDefaultHandler, // LPC 0 + IntDefaultHandler, // I2C4 Master and Slave + IntDefaultHandler, // I2C5 Master and Slave + IntDefaultHandler, // GPIO Port M + IntDefaultHandler, // GPIO Port N + IntDefaultHandler, // Quadrature Encoder 2 + IntDefaultHandler, // Fan 0 + 0, // Reserved + IntDefaultHandler, // GPIO Port P (Summary or P0) + IntDefaultHandler, // GPIO Port P1 + IntDefaultHandler, // GPIO Port P2 + IntDefaultHandler, // GPIO Port P3 + IntDefaultHandler, // GPIO Port P4 + IntDefaultHandler, // GPIO Port P5 + IntDefaultHandler, // GPIO Port P6 + IntDefaultHandler, // GPIO Port P7 + IntDefaultHandler, // GPIO Port Q (Summary or Q0) + IntDefaultHandler, // GPIO Port Q1 + IntDefaultHandler, // GPIO Port Q2 + IntDefaultHandler, // GPIO Port Q3 + IntDefaultHandler, // GPIO Port Q4 + IntDefaultHandler, // GPIO Port Q5 + IntDefaultHandler, // GPIO Port Q6 + IntDefaultHandler, // GPIO Port Q7 + IntDefaultHandler, // GPIO Port R + IntDefaultHandler, // GPIO Port S + IntDefaultHandler, // PWM 1 Generator 0 + IntDefaultHandler, // PWM 1 Generator 1 + IntDefaultHandler, // PWM 1 Generator 2 + IntDefaultHandler, // PWM 1 Generator 3 + IntDefaultHandler // PWM 1 Fault +}; + +//***************************************************************************** +// +// This is the code that gets called when the processor first starts execution +// following a reset event. Only the absolutely necessary set is performed, +// after which the application supplied entry() routine is called. Any fancy +// actions (such as making decisions based on the reset cause register, and +// resetting the bits in that register) are left solely in the hands of the +// application. +// +//***************************************************************************** +void +ResetISR(void) +{ + // + // Enable the floating-point unit. This must be done here to handle the + // case where main() uses floating-point and the function prologue saves + // floating-point registers (which will fault if floating-point is not + // enabled). Any configuration of the floating-point unit using DriverLib + // APIs must be done here prior to the floating-point unit being enabled. + // + // Note that this does not use DriverLib since it might not be included in + // this project. + // + HWREG(NVIC_CPAC) = ((HWREG(NVIC_CPAC) & + ~(NVIC_CPAC_CP10_M | NVIC_CPAC_CP11_M)) | + NVIC_CPAC_CP10_FULL | NVIC_CPAC_CP11_FULL); + + // + // Call the application's entry point. + // + __iar_program_start(); +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a NMI. This +// simply enters an infinite loop, preserving the system state for examination +// by a debugger. +// +//***************************************************************************** +static void +NmiSR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a fault +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +FaultISR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives an unexpected +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +IntDefaultHandler(void) +{ + // + // Go into an infinite loop. + // + while(1) + { + } +} diff --git a/boards/ek-lm4f120xl/usb_dev_bulk/startup_gcc.c b/boards/ek-lm4f120xl/usb_dev_bulk/startup_gcc.c new file mode 100644 index 0000000..8d06bfb --- /dev/null +++ b/boards/ek-lm4f120xl/usb_dev_bulk/startup_gcc.c @@ -0,0 +1,350 @@ +//***************************************************************************** +// +// startup_gcc.c - Startup code for use with GNU tools. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +#include "inc/hw_nvic.h" +#include "inc/hw_types.h" + +//***************************************************************************** +// +// Forward declaration of the default fault handlers. +// +//***************************************************************************** +void ResetISR(void); +static void NmiSR(void); +static void FaultISR(void); +static void IntDefaultHandler(void); + +//***************************************************************************** +// +// External declarations for the interrupt handlers used by the application. +// +//***************************************************************************** +extern void SysTickIntHandler(void); +extern void UARTStdioIntHandler(void); +extern void USB0DeviceIntHandler(void); + +//***************************************************************************** +// +// The entry point for the application. +// +//***************************************************************************** +extern int main(void); + +//***************************************************************************** +// +// Reserve space for the system stack. +// +//***************************************************************************** +static unsigned long pulStack[256]; + +//***************************************************************************** +// +// The vector table. Note that the proper constructs must be placed on this to +// ensure that it ends up at physical address 0x0000.0000. +// +//***************************************************************************** +__attribute__ ((section(".isr_vector"))) +void (* const g_pfnVectors[])(void) = +{ + (void (*)(void))((unsigned long)pulStack + sizeof(pulStack)), + // The initial stack pointer + ResetISR, // The reset handler + NmiSR, // The NMI handler + FaultISR, // The hard fault handler + IntDefaultHandler, // The MPU fault handler + IntDefaultHandler, // The bus fault handler + IntDefaultHandler, // The usage fault handler + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // SVCall handler + IntDefaultHandler, // Debug monitor handler + 0, // Reserved + IntDefaultHandler, // The PendSV handler + SysTickIntHandler, // The SysTick handler + IntDefaultHandler, // GPIO Port A + IntDefaultHandler, // GPIO Port B + IntDefaultHandler, // GPIO Port C + IntDefaultHandler, // GPIO Port D + IntDefaultHandler, // GPIO Port E + UARTStdioIntHandler, // UART0 Rx and Tx + IntDefaultHandler, // UART1 Rx and Tx + IntDefaultHandler, // SSI0 Rx and Tx + IntDefaultHandler, // I2C0 Master and Slave + IntDefaultHandler, // PWM Fault + IntDefaultHandler, // PWM Generator 0 + IntDefaultHandler, // PWM Generator 1 + IntDefaultHandler, // PWM Generator 2 + IntDefaultHandler, // Quadrature Encoder 0 + IntDefaultHandler, // ADC Sequence 0 + IntDefaultHandler, // ADC Sequence 1 + IntDefaultHandler, // ADC Sequence 2 + IntDefaultHandler, // ADC Sequence 3 + IntDefaultHandler, // Watchdog timer + IntDefaultHandler, // Timer 0 subtimer A + IntDefaultHandler, // Timer 0 subtimer B + IntDefaultHandler, // Timer 1 subtimer A + IntDefaultHandler, // Timer 1 subtimer B + IntDefaultHandler, // Timer 2 subtimer A + IntDefaultHandler, // Timer 2 subtimer B + IntDefaultHandler, // Analog Comparator 0 + IntDefaultHandler, // Analog Comparator 1 + IntDefaultHandler, // Analog Comparator 2 + IntDefaultHandler, // System Control (PLL, OSC, BO) + IntDefaultHandler, // FLASH Control + IntDefaultHandler, // GPIO Port F + IntDefaultHandler, // GPIO Port G + IntDefaultHandler, // GPIO Port H + IntDefaultHandler, // UART2 Rx and Tx + IntDefaultHandler, // SSI1 Rx and Tx + IntDefaultHandler, // Timer 3 subtimer A + IntDefaultHandler, // Timer 3 subtimer B + IntDefaultHandler, // I2C1 Master and Slave + IntDefaultHandler, // Quadrature Encoder 1 + IntDefaultHandler, // CAN0 + IntDefaultHandler, // CAN1 + IntDefaultHandler, // CAN2 + IntDefaultHandler, // Ethernet + IntDefaultHandler, // Hibernate + USB0DeviceIntHandler, // USB0 + IntDefaultHandler, // PWM Generator 3 + IntDefaultHandler, // uDMA Software Transfer + IntDefaultHandler, // uDMA Error + IntDefaultHandler, // ADC1 Sequence 0 + IntDefaultHandler, // ADC1 Sequence 1 + IntDefaultHandler, // ADC1 Sequence 2 + IntDefaultHandler, // ADC1 Sequence 3 + IntDefaultHandler, // I2S0 + IntDefaultHandler, // External Bus Interface 0 + IntDefaultHandler, // GPIO Port J + IntDefaultHandler, // GPIO Port K + IntDefaultHandler, // GPIO Port L + IntDefaultHandler, // SSI2 Rx and Tx + IntDefaultHandler, // SSI3 Rx and Tx + IntDefaultHandler, // UART3 Rx and Tx + IntDefaultHandler, // UART4 Rx and Tx + IntDefaultHandler, // UART5 Rx and Tx + IntDefaultHandler, // UART6 Rx and Tx + IntDefaultHandler, // UART7 Rx and Tx + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // I2C2 Master and Slave + IntDefaultHandler, // I2C3 Master and Slave + IntDefaultHandler, // Timer 4 subtimer A + IntDefaultHandler, // Timer 4 subtimer B + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // Timer 5 subtimer A + IntDefaultHandler, // Timer 5 subtimer B + IntDefaultHandler, // Wide Timer 0 subtimer A + IntDefaultHandler, // Wide Timer 0 subtimer B + IntDefaultHandler, // Wide Timer 1 subtimer A + IntDefaultHandler, // Wide Timer 1 subtimer B + IntDefaultHandler, // Wide Timer 2 subtimer A + IntDefaultHandler, // Wide Timer 2 subtimer B + IntDefaultHandler, // Wide Timer 3 subtimer A + IntDefaultHandler, // Wide Timer 3 subtimer B + IntDefaultHandler, // Wide Timer 4 subtimer A + IntDefaultHandler, // Wide Timer 4 subtimer B + IntDefaultHandler, // Wide Timer 5 subtimer A + IntDefaultHandler, // Wide Timer 5 subtimer B + IntDefaultHandler, // FPU + IntDefaultHandler, // PECI 0 + IntDefaultHandler, // LPC 0 + IntDefaultHandler, // I2C4 Master and Slave + IntDefaultHandler, // I2C5 Master and Slave + IntDefaultHandler, // GPIO Port M + IntDefaultHandler, // GPIO Port N + IntDefaultHandler, // Quadrature Encoder 2 + IntDefaultHandler, // Fan 0 + 0, // Reserved + IntDefaultHandler, // GPIO Port P (Summary or P0) + IntDefaultHandler, // GPIO Port P1 + IntDefaultHandler, // GPIO Port P2 + IntDefaultHandler, // GPIO Port P3 + IntDefaultHandler, // GPIO Port P4 + IntDefaultHandler, // GPIO Port P5 + IntDefaultHandler, // GPIO Port P6 + IntDefaultHandler, // GPIO Port P7 + IntDefaultHandler, // GPIO Port Q (Summary or Q0) + IntDefaultHandler, // GPIO Port Q1 + IntDefaultHandler, // GPIO Port Q2 + IntDefaultHandler, // GPIO Port Q3 + IntDefaultHandler, // GPIO Port Q4 + IntDefaultHandler, // GPIO Port Q5 + IntDefaultHandler, // GPIO Port Q6 + IntDefaultHandler, // GPIO Port Q7 + IntDefaultHandler, // GPIO Port R + IntDefaultHandler, // GPIO Port S + IntDefaultHandler, // PWM 1 Generator 0 + IntDefaultHandler, // PWM 1 Generator 1 + IntDefaultHandler, // PWM 1 Generator 2 + IntDefaultHandler, // PWM 1 Generator 3 + IntDefaultHandler // PWM 1 Fault +}; + +//***************************************************************************** +// +// The following are constructs created by the linker, indicating where the +// the "data" and "bss" segments reside in memory. The initializers for the +// for the "data" segment resides immediately following the "text" segment. +// +//***************************************************************************** +extern unsigned long _etext; +extern unsigned long _data; +extern unsigned long _edata; +extern unsigned long _bss; +extern unsigned long _ebss; + +//***************************************************************************** +// +// This is the code that gets called when the processor first starts execution +// following a reset event. Only the absolutely necessary set is performed, +// after which the application supplied entry() routine is called. Any fancy +// actions (such as making decisions based on the reset cause register, and +// resetting the bits in that register) are left solely in the hands of the +// application. +// +//***************************************************************************** +void +ResetISR(void) +{ + unsigned long *pulSrc, *pulDest; + + // + // Copy the data segment initializers from flash to SRAM. + // + pulSrc = &_etext; + for(pulDest = &_data; pulDest < &_edata; ) + { + *pulDest++ = *pulSrc++; + } + + // + // Zero fill the bss segment. + // + __asm(" ldr r0, =_bss\n" + " ldr r1, =_ebss\n" + " mov r2, #0\n" + " .thumb_func\n" + "zero_loop:\n" + " cmp r0, r1\n" + " it lt\n" + " strlt r2, [r0], #4\n" + " blt zero_loop"); + + // + // Enable the floating-point unit. This must be done here to handle the + // case where main() uses floating-point and the function prologue saves + // floating-point registers (which will fault if floating-point is not + // enabled). Any configuration of the floating-point unit using DriverLib + // APIs must be done here prior to the floating-point unit being enabled. + // + // Note that this does not use DriverLib since it might not be included in + // this project. + // + HWREG(NVIC_CPAC) = ((HWREG(NVIC_CPAC) & + ~(NVIC_CPAC_CP10_M | NVIC_CPAC_CP11_M)) | + NVIC_CPAC_CP10_FULL | NVIC_CPAC_CP11_FULL); + + // + // Call the application's entry point. + // + main(); +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a NMI. This +// simply enters an infinite loop, preserving the system state for examination +// by a debugger. +// +//***************************************************************************** +static void +NmiSR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a fault +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +FaultISR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives an unexpected +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +IntDefaultHandler(void) +{ + // + // Go into an infinite loop. + // + while(1) + { + } +} diff --git a/boards/ek-lm4f120xl/usb_dev_bulk/startup_rvmdk.S b/boards/ek-lm4f120xl/usb_dev_bulk/startup_rvmdk.S new file mode 100644 index 0000000..5b2c920 --- /dev/null +++ b/boards/ek-lm4f120xl/usb_dev_bulk/startup_rvmdk.S @@ -0,0 +1,360 @@ +; <<< Use Configuration Wizard in Context Menu >>> +;****************************************************************************** +; +; startup_rvmdk.S - Startup code for use with Keil's uVision. +; +; Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +; Software License Agreement +; +; Texas Instruments (TI) is supplying this software for use solely and +; exclusively on TI's microcontroller products. The software is owned by +; TI and/or its suppliers, and is protected under applicable copyright +; laws. You may not combine this software with "viral" open-source +; software in order to form a larger program. +; +; THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +; NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +; NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +; A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +; CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +; DAMAGES, FOR ANY REASON WHATSOEVER. +; +; This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +; +;****************************************************************************** + +;****************************************************************************** +; +; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +; +;****************************************************************************** +Stack EQU 0x00000400 + +;****************************************************************************** +; +; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> +; +;****************************************************************************** +Heap EQU 0x00000000 + +;****************************************************************************** +; +; Allocate space for the stack. +; +;****************************************************************************** + AREA STACK, NOINIT, READWRITE, ALIGN=3 +StackMem + SPACE Stack +__initial_sp + +;****************************************************************************** +; +; Allocate space for the heap. +; +;****************************************************************************** + AREA HEAP, NOINIT, READWRITE, ALIGN=3 +__heap_base +HeapMem + SPACE Heap +__heap_limit + +;****************************************************************************** +; +; Indicate that the code in this file preserves 8-byte alignment of the stack. +; +;****************************************************************************** + PRESERVE8 + +;****************************************************************************** +; +; Place code into the reset code section. +; +;****************************************************************************** + AREA RESET, CODE, READONLY + THUMB + +;****************************************************************************** +; +; External declarations for the interrupt handlers used by the application. +; +;****************************************************************************** + EXTERN SysTickIntHandler + EXTERN UARTStdioIntHandler + EXTERN USB0DeviceIntHandler + +;****************************************************************************** +; +; The vector table. +; +;****************************************************************************** + EXPORT __Vectors +__Vectors + DCD StackMem + Stack ; Top of Stack + DCD Reset_Handler ; Reset Handler + DCD NmiSR ; NMI Handler + DCD FaultISR ; Hard Fault Handler + DCD IntDefaultHandler ; The MPU fault handler + DCD IntDefaultHandler ; The bus fault handler + DCD IntDefaultHandler ; The usage fault handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD IntDefaultHandler ; SVCall handler + DCD IntDefaultHandler ; Debug monitor handler + DCD 0 ; Reserved + DCD IntDefaultHandler ; The PendSV handler + DCD SysTickIntHandler ; The SysTick handler + DCD IntDefaultHandler ; GPIO Port A + DCD IntDefaultHandler ; GPIO Port B + DCD IntDefaultHandler ; GPIO Port C + DCD IntDefaultHandler ; GPIO Port D + DCD IntDefaultHandler ; GPIO Port E + DCD UARTStdioIntHandler ; UART0 Rx and Tx + DCD IntDefaultHandler ; UART1 Rx and Tx + DCD IntDefaultHandler ; SSI0 Rx and Tx + DCD IntDefaultHandler ; I2C0 Master and Slave + DCD IntDefaultHandler ; PWM Fault + DCD IntDefaultHandler ; PWM Generator 0 + DCD IntDefaultHandler ; PWM Generator 1 + DCD IntDefaultHandler ; PWM Generator 2 + DCD IntDefaultHandler ; Quadrature Encoder 0 + DCD IntDefaultHandler ; ADC Sequence 0 + DCD IntDefaultHandler ; ADC Sequence 1 + DCD IntDefaultHandler ; ADC Sequence 2 + DCD IntDefaultHandler ; ADC Sequence 3 + DCD IntDefaultHandler ; Watchdog timer + DCD IntDefaultHandler ; Timer 0 subtimer A + DCD IntDefaultHandler ; Timer 0 subtimer B + DCD IntDefaultHandler ; Timer 1 subtimer A + DCD IntDefaultHandler ; Timer 1 subtimer B + DCD IntDefaultHandler ; Timer 2 subtimer A + DCD IntDefaultHandler ; Timer 2 subtimer B + DCD IntDefaultHandler ; Analog Comparator 0 + DCD IntDefaultHandler ; Analog Comparator 1 + DCD IntDefaultHandler ; Analog Comparator 2 + DCD IntDefaultHandler ; System Control (PLL, OSC, BO) + DCD IntDefaultHandler ; FLASH Control + DCD IntDefaultHandler ; GPIO Port F + DCD IntDefaultHandler ; GPIO Port G + DCD IntDefaultHandler ; GPIO Port H + DCD IntDefaultHandler ; UART2 Rx and Tx + DCD IntDefaultHandler ; SSI1 Rx and Tx + DCD IntDefaultHandler ; Timer 3 subtimer A + DCD IntDefaultHandler ; Timer 3 subtimer B + DCD IntDefaultHandler ; I2C1 Master and Slave + DCD IntDefaultHandler ; Quadrature Encoder 1 + DCD IntDefaultHandler ; CAN0 + DCD IntDefaultHandler ; CAN1 + DCD IntDefaultHandler ; CAN2 + DCD IntDefaultHandler ; Ethernet + DCD IntDefaultHandler ; Hibernate + DCD USB0DeviceIntHandler ; USB0 + DCD IntDefaultHandler ; PWM Generator 3 + DCD IntDefaultHandler ; uDMA Software Transfer + DCD IntDefaultHandler ; uDMA Error + DCD IntDefaultHandler ; ADC1 Sequence 0 + DCD IntDefaultHandler ; ADC1 Sequence 1 + DCD IntDefaultHandler ; ADC1 Sequence 2 + DCD IntDefaultHandler ; ADC1 Sequence 3 + DCD IntDefaultHandler ; I2S0 + DCD IntDefaultHandler ; External Bus Interface 0 + DCD IntDefaultHandler ; GPIO Port J + DCD IntDefaultHandler ; GPIO Port K + DCD IntDefaultHandler ; GPIO Port L + DCD IntDefaultHandler ; SSI2 Rx and Tx + DCD IntDefaultHandler ; SSI3 Rx and Tx + DCD IntDefaultHandler ; UART3 Rx and Tx + DCD IntDefaultHandler ; UART4 Rx and Tx + DCD IntDefaultHandler ; UART5 Rx and Tx + DCD IntDefaultHandler ; UART6 Rx and Tx + DCD IntDefaultHandler ; UART7 Rx and Tx + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD IntDefaultHandler ; I2C2 Master and Slave + DCD IntDefaultHandler ; I2C3 Master and Slave + DCD IntDefaultHandler ; Timer 4 subtimer A + DCD IntDefaultHandler ; Timer 4 subtimer B + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD IntDefaultHandler ; Timer 5 subtimer A + DCD IntDefaultHandler ; Timer 5 subtimer B + DCD IntDefaultHandler ; Wide Timer 0 subtimer A + DCD IntDefaultHandler ; Wide Timer 0 subtimer B + DCD IntDefaultHandler ; Wide Timer 1 subtimer A + DCD IntDefaultHandler ; Wide Timer 1 subtimer B + DCD IntDefaultHandler ; Wide Timer 2 subtimer A + DCD IntDefaultHandler ; Wide Timer 2 subtimer B + DCD IntDefaultHandler ; Wide Timer 3 subtimer A + DCD IntDefaultHandler ; Wide Timer 3 subtimer B + DCD IntDefaultHandler ; Wide Timer 4 subtimer A + DCD IntDefaultHandler ; Wide Timer 4 subtimer B + DCD IntDefaultHandler ; Wide Timer 5 subtimer A + DCD IntDefaultHandler ; Wide Timer 5 subtimer B + DCD IntDefaultHandler ; FPU + DCD IntDefaultHandler ; PECI 0 + DCD IntDefaultHandler ; LPC 0 + DCD IntDefaultHandler ; I2C4 Master and Slave + DCD IntDefaultHandler ; I2C5 Master and Slave + DCD IntDefaultHandler ; GPIO Port M + DCD IntDefaultHandler ; GPIO Port N + DCD IntDefaultHandler ; Quadrature Encoder 2 + DCD IntDefaultHandler ; Fan 0 + DCD 0 ; Reserved + DCD IntDefaultHandler ; GPIO Port P (Summary or P0) + DCD IntDefaultHandler ; GPIO Port P1 + DCD IntDefaultHandler ; GPIO Port P2 + DCD IntDefaultHandler ; GPIO Port P3 + DCD IntDefaultHandler ; GPIO Port P4 + DCD IntDefaultHandler ; GPIO Port P5 + DCD IntDefaultHandler ; GPIO Port P6 + DCD IntDefaultHandler ; GPIO Port P7 + DCD IntDefaultHandler ; GPIO Port Q (Summary or Q0) + DCD IntDefaultHandler ; GPIO Port Q1 + DCD IntDefaultHandler ; GPIO Port Q2 + DCD IntDefaultHandler ; GPIO Port Q3 + DCD IntDefaultHandler ; GPIO Port Q4 + DCD IntDefaultHandler ; GPIO Port Q5 + DCD IntDefaultHandler ; GPIO Port Q6 + DCD IntDefaultHandler ; GPIO Port Q7 + DCD IntDefaultHandler ; GPIO Port R + DCD IntDefaultHandler ; GPIO Port S + DCD IntDefaultHandler ; PWM 1 Generator 0 + DCD IntDefaultHandler ; PWM 1 Generator 1 + DCD IntDefaultHandler ; PWM 1 Generator 2 + DCD IntDefaultHandler ; PWM 1 Generator 3 + DCD IntDefaultHandler ; PWM 1 Fault + +;****************************************************************************** +; +; This is the code that gets called when the processor first starts execution +; following a reset event. +; +;****************************************************************************** + EXPORT Reset_Handler +Reset_Handler + ; + ; Enable the floating-point unit. This must be done here to handle the + ; case where main() uses floating-point and the function prologue saves + ; floating-point registers (which will fault if floating-point is not + ; enabled). Any configuration of the floating-point unit using + ; DriverLib APIs must be done here prior to the floating-point unit + ; being enabled. + ; + ; Note that this does not use DriverLib since it might not be included + ; in this project. + ; + MOVW R0, #0xED88 + MOVT R0, #0xE000 + LDR R1, [R0] + ORR R1, #0x00F00000 + STR R1, [R0] + + ; + ; Call the C library enty point that handles startup. This will copy + ; the .data section initializers from flash to SRAM and zero fill the + ; .bss section. + ; + IMPORT __main + B __main + +;****************************************************************************** +; +; This is the code that gets called when the processor receives a NMI. This +; simply enters an infinite loop, preserving the system state for examination +; by a debugger. +; +;****************************************************************************** +NmiSR + B NmiSR + +;****************************************************************************** +; +; This is the code that gets called when the processor receives a fault +; interrupt. This simply enters an infinite loop, preserving the system state +; for examination by a debugger. +; +;****************************************************************************** +FaultISR + B FaultISR + +;****************************************************************************** +; +; This is the code that gets called when the processor receives an unexpected +; interrupt. This simply enters an infinite loop, preserving the system state +; for examination by a debugger. +; +;****************************************************************************** +IntDefaultHandler + B IntDefaultHandler + +;****************************************************************************** +; +; Make sure the end of this section is aligned. +; +;****************************************************************************** + ALIGN + +;****************************************************************************** +; +; Some code in the normal code section for initializing the heap and stack. +; +;****************************************************************************** + AREA |.text|, CODE, READONLY + +;****************************************************************************** +; +; The function expected of the C library startup code for defining the stack +; and heap memory locations. For the C library version of the startup code, +; provide this function so that the C library initialization code can find out +; the location of the stack and heap. +; +;****************************************************************************** + IF :DEF: __MICROLIB + EXPORT __initial_sp + EXPORT __heap_base + EXPORT __heap_limit + ELSE + IMPORT __use_two_region_memory + EXPORT __user_initial_stackheap +__user_initial_stackheap + LDR R0, =HeapMem + LDR R1, =(StackMem + Stack) + LDR R2, =(HeapMem + Heap) + LDR R3, =StackMem + BX LR + ENDIF + +;****************************************************************************** +; +; Make sure the end of this section is aligned. +; +;****************************************************************************** + ALIGN + +;****************************************************************************** +; +; Tell the assembler that we're done. +; +;****************************************************************************** + END diff --git a/boards/ek-lm4f120xl/usb_dev_bulk/startup_sourcerygxx.S b/boards/ek-lm4f120xl/usb_dev_bulk/startup_sourcerygxx.S new file mode 100644 index 0000000..b720839 --- /dev/null +++ b/boards/ek-lm4f120xl/usb_dev_bulk/startup_sourcerygxx.S @@ -0,0 +1,75 @@ +//***************************************************************************** +// +// startup_sourcerygxx.S - Startup code for Sourcery CodeBench. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + + .syntax unified + .thumb + +//***************************************************************************** +// +// Place this code into the .cs3.reset section so that it can be executed prior +// to the startup code in Sourcery CodeBench. +// +//***************************************************************************** + .section .cs3.reset,"x" + +//***************************************************************************** +// +// The reset handler, which overrides the one provided by CS3. +// +//***************************************************************************** + .globl __cs3_reset + .thumb_func +__cs3_reset: + // + // Enable the floating-point unit. This must be done here to handle the + // case where main() uses floating-point and the function prologue saves + // floating-point registers (which will fault if floating-point is not + // enabled). Any configuration of the floating-point unit using DriverLib + // APIs must be done here prior to the floating-point unit being enabled. + // + // Note that this does not use DriverLib since it might not be included in + // this project. + // + movw r0, #0xed88 + movt r0, #0xe000 + ldr r1, [r0] + orr r1, #0x00f00000 + str r1, [r0] + + // + // Branch to the normal CS3 startup code. + // + .extern __cs3_reset_ekc_lm4f232 + ldr r0, =__cs3_reset_ekc_lm4f232 + bx r0 + + // + // Place the literal pool here. + // + .ltorg + + // + // The end of the file. + // + .end diff --git a/boards/ek-lm4f120xl/usb_dev_bulk/usb_bulk_structs.c b/boards/ek-lm4f120xl/usb_dev_bulk/usb_bulk_structs.c new file mode 100644 index 0000000..fc76ca2 --- /dev/null +++ b/boards/ek-lm4f120xl/usb_dev_bulk/usb_bulk_structs.c @@ -0,0 +1,201 @@ +//***************************************************************************** +// +// usb_bulk_structs.c - Data structures defining this bulk USB device. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +#include "inc/hw_types.h" +#include "driverlib/usb.h" +#include "usblib/usblib.h" +#include "usblib/usb-ids.h" +#include "usblib/device/usbdevice.h" +#include "usblib/device/usbdbulk.h" +#include "usb_bulk_structs.h" + +//***************************************************************************** +// +// The languages supported by this device. +// +//***************************************************************************** +const unsigned char g_pLangDescriptor[] = +{ + 4, + USB_DTYPE_STRING, + USBShort(USB_LANG_EN_US) +}; + +//***************************************************************************** +// +// The manufacturer string. +// +//***************************************************************************** +const unsigned char g_pManufacturerString[] = +{ + (17 + 1) * 2, + USB_DTYPE_STRING, + 'T', 0, 'e', 0, 'x', 0, 'a', 0, 's', 0, ' ', 0, 'I', 0, 'n', 0, 's', 0, + 't', 0, 'r', 0, 'u', 0, 'm', 0, 'e', 0, 'n', 0, 't', 0, 's', 0, +}; + +//***************************************************************************** +// +// The product string. +// +//***************************************************************************** +const unsigned char g_pProductString[] = +{ + (19 + 1) * 2, + USB_DTYPE_STRING, + 'G', 0, 'e', 0, 'n', 0, 'e', 0, 'r', 0, 'i', 0, 'c', 0, ' ', 0, 'B', 0, + 'u', 0, 'l', 0, 'k', 0, ' ', 0, 'D', 0, 'e', 0, 'v', 0, 'i', 0, 'c', 0, + 'e', 0 +}; + +//***************************************************************************** +// +// The serial number string. +// +//***************************************************************************** +const unsigned char g_pSerialNumberString[] = +{ + (8 + 1) * 2, + USB_DTYPE_STRING, + '1', 0, '2', 0, '3', 0, '4', 0, '5', 0, '6', 0, '7', 0, '8', 0 +}; + +//***************************************************************************** +// +// The data interface description string. +// +//***************************************************************************** +const unsigned char g_pDataInterfaceString[] = +{ + (19 + 1) * 2, + USB_DTYPE_STRING, + 'B', 0, 'u', 0, 'l', 0, 'k', 0, ' ', 0, 'D', 0, 'a', 0, 't', 0, + 'a', 0, ' ', 0, 'I', 0, 'n', 0, 't', 0, 'e', 0, 'r', 0, 'f', 0, + 'a', 0, 'c', 0, 'e', 0 +}; + +//***************************************************************************** +// +// The configuration description string. +// +//***************************************************************************** +const unsigned char g_pConfigString[] = +{ + (23 + 1) * 2, + USB_DTYPE_STRING, + 'B', 0, 'u', 0, 'l', 0, 'k', 0, ' ', 0, 'D', 0, 'a', 0, 't', 0, + 'a', 0, ' ', 0, 'C', 0, 'o', 0, 'n', 0, 'f', 0, 'i', 0, 'g', 0, + 'u', 0, 'r', 0, 'a', 0, 't', 0, 'i', 0, 'o', 0, 'n', 0 +}; + +//***************************************************************************** +// +// The descriptor string table. +// +//***************************************************************************** +const unsigned char * const g_pStringDescriptors[] = +{ + g_pLangDescriptor, + g_pManufacturerString, + g_pProductString, + g_pSerialNumberString, + g_pDataInterfaceString, + g_pConfigString +}; + +#define NUM_STRING_DESCRIPTORS (sizeof(g_pStringDescriptors) / \ + sizeof(unsigned char *)) + +//***************************************************************************** +// +// The bulk device initialization and customization structures. In this case, +// we are using USBBuffers between the bulk device class driver and the +// application code. The function pointers and callback data values are set +// to insert a buffer in each of the data channels, transmit and receive. +// +// With the buffer in place, the bulk channel callback is set to the relevant +// channel function and the callback data is set to point to the channel +// instance data. The buffer, in turn, has its callback set to the application +// function and the callback data set to our bulk instance structure. +// +//***************************************************************************** +tBulkInstance g_sBulkInstance; + +extern const tUSBBuffer g_sTxBuffer; +extern const tUSBBuffer g_sRxBuffer; + +const tUSBDBulkDevice g_sBulkDevice = +{ + USB_VID_STELLARIS, + USB_PID_BULK, + 500, + USB_CONF_ATTR_SELF_PWR, + USBBufferEventCallback, + (void *)&g_sRxBuffer, + USBBufferEventCallback, + (void *)&g_sTxBuffer, + g_pStringDescriptors, + NUM_STRING_DESCRIPTORS, + &g_sBulkInstance +}; + +//***************************************************************************** +// +// Receive buffer (from the USB perspective). +// +//***************************************************************************** +unsigned char g_pucUSBRxBuffer[BULK_BUFFER_SIZE]; +unsigned char g_pucRxBufferWorkspace[USB_BUFFER_WORKSPACE_SIZE]; +const tUSBBuffer g_sRxBuffer = +{ + false, // This is a receive buffer. + RxHandler, // pfnCallback + (void *)&g_sBulkDevice, // Callback data is our device pointer. + USBDBulkPacketRead, // pfnTransfer + USBDBulkRxPacketAvailable, // pfnAvailable + (void *)&g_sBulkDevice, // pvHandle + g_pucUSBRxBuffer, // pcBuffer + BULK_BUFFER_SIZE, // ulBufferSize + g_pucRxBufferWorkspace // pvWorkspace +}; + +//***************************************************************************** +// +// Transmit buffer (from the USB perspective). +// +//***************************************************************************** +unsigned char g_pucUSBTxBuffer[BULK_BUFFER_SIZE]; +unsigned char g_pucTxBufferWorkspace[USB_BUFFER_WORKSPACE_SIZE]; +const tUSBBuffer g_sTxBuffer = +{ + true, // This is a transmit buffer. + TxHandler, // pfnCallback + (void *)&g_sBulkDevice, // Callback data is our device pointer. + USBDBulkPacketWrite, // pfnTransfer + USBDBulkTxPacketAvailable, // pfnAvailable + (void *)&g_sBulkDevice, // pvHandle + g_pucUSBTxBuffer, // pcBuffer + BULK_BUFFER_SIZE, // ulBufferSize + g_pucTxBufferWorkspace // pvWorkspace +}; diff --git a/boards/ek-lm4f120xl/usb_dev_bulk/usb_bulk_structs.h b/boards/ek-lm4f120xl/usb_dev_bulk/usb_bulk_structs.h new file mode 100644 index 0000000..e5dcf11 --- /dev/null +++ b/boards/ek-lm4f120xl/usb_dev_bulk/usb_bulk_structs.h @@ -0,0 +1,48 @@ +//***************************************************************************** +// +// usb_bulk_structs.h - Data structures defining this bulk USB device. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +#ifndef _USB_BULK_STRUCTS_H_ +#define _USB_BULK_STRUCTS_H_ + +//***************************************************************************** +// +// The size of the transmit and receive buffers used. 256 is chosen pretty +// much at random though the buffer should be at least twice the size of +// a maximum-sized USB packet. +// +//***************************************************************************** +#define BULK_BUFFER_SIZE 256 + +extern unsigned long RxHandler(void *pvCBData, unsigned long ulEvent, + unsigned long ulMsgValue, void *pvMsgData); +extern unsigned long TxHandler(void *pvlCBData, unsigned long ulEvent, + unsigned long ulMsgValue, void *pvMsgData); + +extern const tUSBBuffer g_sTxBuffer; +extern const tUSBBuffer g_sRxBuffer; +extern const tUSBDBulkDevice g_sBulkDevice; +extern unsigned char g_pucUSBTxBuffer[]; +extern unsigned char g_pucUSBRxBuffer[]; + +#endif diff --git a/boards/ek-lm4f120xl/usb_dev_bulk/usb_dev_bulk.c b/boards/ek-lm4f120xl/usb_dev_bulk/usb_dev_bulk.c new file mode 100644 index 0000000..af4e3c6 --- /dev/null +++ b/boards/ek-lm4f120xl/usb_dev_bulk/usb_dev_bulk.c @@ -0,0 +1,613 @@ +//***************************************************************************** +// +// usb_dev_bulk.c - Main routines for the generic bulk device example. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +#include "inc/hw_ints.h" +#include "inc/hw_memmap.h" +#include "inc/hw_types.h" +#include "driverlib/debug.h" +#include "driverlib/fpu.h" +#include "driverlib/gpio.h" +#include "driverlib/interrupt.h" +#include "driverlib/pin_map.h" +#include "driverlib/sysctl.h" +#include "driverlib/systick.h" +#include "driverlib/timer.h" +#include "driverlib/uart.h" +#include "driverlib/rom.h" +#include "usblib/usblib.h" +#include "usblib/usb-ids.h" +#include "usblib/device/usbdevice.h" +#include "usblib/device/usbdbulk.h" +#include "utils/uartstdio.h" +#include "utils/ustdlib.h" +#include "usb_bulk_structs.h" + +//***************************************************************************** +// +//! \addtogroup example_list +//!

USB Generic Bulk Device (usb_dev_bulk)

+//! +//! This example provides a generic USB device offering simple bulk data +//! transfer to and from the host. The device uses a vendor-specific class ID +//! and supports a single bulk IN endpoint and a single bulk OUT endpoint. +//! Data received from the host is assumed to be ASCII text and it is +//! echoed back with the case of all alphabetic characters swapped. +//! +//! A Windows INF file for the device is provided on the installation CD and +//! in the C:/StellarisWare/windows_drivers directory of StellarisWare +//! releases. This INF contains information required to install the WinUSB +//! subsystem on WindowsXP and Vista PCs. WinUSB is a Windows subsystem +//! allowing user mode applications to access the USB device without the need +//! for a vendor-specific kernel mode driver. +//! +//! A sample Windows command-line application, usb_bulk_example, illustrating +//! how to connect to and communicate with the bulk device is also provided. +//! The application binary is installed as part of the ``Windows-side examples +//! for USB kits'' package (SW-USB-win) on the installation CD or via download +//! from http://www.ti.com/stellarisware . Project files are included to allow +//! the examples to be built using Microsoft VisualStudio 2008. Source code +//! for this application can be found in directory +//! StellarisWare/tools/usb_bulk_example. +// +//***************************************************************************** + + +//***************************************************************************** +// +// The system tick rate expressed both as ticks per second and a millisecond +// period. +// +//***************************************************************************** +#define SYSTICKS_PER_SECOND 100 +#define SYSTICK_PERIOD_MS (1000 / SYSTICKS_PER_SECOND) + +//***************************************************************************** +// +// The global system tick counter. +// +//***************************************************************************** +volatile unsigned long g_ulSysTickCount = 0; + +//***************************************************************************** +// +// Variables tracking transmit and receive counts. +// +//***************************************************************************** +volatile unsigned long g_ulTxCount = 0; +volatile unsigned long g_ulRxCount = 0; +#ifdef DEBUG +unsigned long g_ulUARTRxErrors = 0; +#endif + +//***************************************************************************** +// +// Debug-related definitions and declarations. +// +// Debug output is available via UART0 if DEBUG is defined during build. +// +//***************************************************************************** +#ifdef DEBUG +//***************************************************************************** +// +// Map all debug print calls to UARTprintf in debug builds. +// +//***************************************************************************** +#define DEBUG_PRINT UARTprintf + +#else + +//***************************************************************************** +// +// Compile out all debug print calls in release builds. +// +//***************************************************************************** +#define DEBUG_PRINT while(0) ((int (*)(char *, ...))0) +#endif + +//***************************************************************************** +// +// Flags used to pass commands from interrupt context to the main loop. +// +//***************************************************************************** +#define COMMAND_PACKET_RECEIVED 0x00000001 +#define COMMAND_STATUS_UPDATE 0x00000002 + +volatile unsigned long g_ulFlags = 0; +char *g_pcStatus; + +//***************************************************************************** +// +// Global flag indicating that a USB configuration has been set. +// +//***************************************************************************** +static volatile tBoolean g_bUSBConfigured = false; + +//***************************************************************************** +// +// The error routine that is called if the driver library encounters an error. +// +//***************************************************************************** +#ifdef DEBUG +void +__error__(char *pcFilename, unsigned long ulLine) +{ + UARTprintf("Error at line %d of %s\n", ulLine, pcFilename); + while(1) + { + } +} +#endif + +//***************************************************************************** +// +// Interrupt handler for the system tick counter. +// +//***************************************************************************** +void +SysTickIntHandler(void) +{ + // + // Update our system tick counter. + // + g_ulSysTickCount++; +} + +//***************************************************************************** +// +// Receive new data and echo it back to the host. +// +// \param psDevice points to the instance data for the device whose data is to +// be processed. +// \param pcData points to the newly received data in the USB receive buffer. +// \param ulNumBytes is the number of bytes of data available to be processed. +// +// This function is called whenever we receive a notification that data is +// available from the host. We read the data, byte-by-byte and swap the case +// of any alphabetical characters found then write it back out to be +// transmitted back to the host. +// +// \return Returns the number of bytes of data processed. +// +//***************************************************************************** +static unsigned long +EchoNewDataToHost(tUSBDBulkDevice *psDevice, unsigned char *pcData, + unsigned long ulNumBytes) +{ + unsigned long ulLoop, ulSpace, ulCount; + unsigned long ulReadIndex; + unsigned long ulWriteIndex; + tUSBRingBufObject sTxRing; + + // + // Get the current buffer information to allow us to write directly to + // the transmit buffer (we already have enough information from the + // parameters to access the receive buffer directly). + // + USBBufferInfoGet(&g_sTxBuffer, &sTxRing); + + // + // How much space is there in the transmit buffer? + // + ulSpace = USBBufferSpaceAvailable(&g_sTxBuffer); + + // + // How many characters can we process this time round? + // + ulLoop = (ulSpace < ulNumBytes) ? ulSpace : ulNumBytes; + ulCount = ulLoop; + + // + // Update our receive counter. + // + g_ulRxCount += ulNumBytes; + + // + // Dump a debug message. + // + DEBUG_PRINT("Received %d bytes\n", ulNumBytes); + + // + // Set up to process the characters by directly accessing the USB buffers. + // + ulReadIndex = (unsigned long)(pcData - g_pucUSBRxBuffer); + ulWriteIndex = sTxRing.ulWriteIndex; + + while(ulLoop) + { + // + // Copy from the receive buffer to the transmit buffer converting + // character case on the way. + // + + // + // Is this a lower case character? + // + if((g_pucUSBRxBuffer[ulReadIndex] >= 'a') && + (g_pucUSBRxBuffer[ulReadIndex] <= 'z')) + { + // + // Convert to upper case and write to the transmit buffer. + // + g_pucUSBTxBuffer[ulWriteIndex] = + (g_pucUSBRxBuffer[ulReadIndex] - 'a') + 'A'; + } + else + { + // + // Is this an upper case character? + // + if((g_pucUSBRxBuffer[ulReadIndex] >= 'A') && + (g_pucUSBRxBuffer[ulReadIndex] <= 'Z')) + { + // + // Convert to lower case and write to the transmit buffer. + // + g_pucUSBTxBuffer[ulWriteIndex] = + (g_pucUSBRxBuffer[ulReadIndex] - 'Z') + 'z'; + } + else + { + // + // Copy the received character to the transmit buffer. + // + g_pucUSBTxBuffer[ulWriteIndex] = g_pucUSBRxBuffer[ulReadIndex]; + } + } + + // + // Move to the next character taking care to adjust the pointer for + // the buffer wrap if necessary. + // + ulWriteIndex++; + ulWriteIndex = (ulWriteIndex == BULK_BUFFER_SIZE) ? 0 : ulWriteIndex; + + ulReadIndex++; + ulReadIndex = (ulReadIndex == BULK_BUFFER_SIZE) ? 0 : ulReadIndex; + + ulLoop--; + } + + // + // We've processed the data in place so now send the processed data + // back to the host. + // + USBBufferDataWritten(&g_sTxBuffer, ulCount); + + DEBUG_PRINT("Wrote %d bytes\n", ulCount); + + // + // We processed as much data as we can directly from the receive buffer so + // we need to return the number of bytes to allow the lower layer to + // update its read pointer appropriately. + // + return(ulCount); +} + +//***************************************************************************** +// +// Handles bulk driver notifications related to the transmit channel (data to +// the USB host). +// +// \param pvCBData is the client-supplied callback pointer for this channel. +// \param ulEvent identifies the event we are being notified about. +// \param ulMsgValue is an event-specific value. +// \param pvMsgData is an event-specific pointer. +// +// This function is called by the bulk driver to notify us of any events +// related to operation of the transmit data channel (the IN channel carrying +// data to the USB host). +// +// \return The return value is event-specific. +// +//***************************************************************************** +unsigned long +TxHandler(void *pvCBData, unsigned long ulEvent, unsigned long ulMsgValue, + void *pvMsgData) +{ + // + // We are not required to do anything in response to any transmit event + // in this example. All we do is update our transmit counter. + // + if(ulEvent == USB_EVENT_TX_COMPLETE) + { + g_ulTxCount += ulMsgValue; + } + + // + // Dump a debug message. + // + DEBUG_PRINT("TX complete %d\n", ulMsgValue); + + return(0); +} + +//***************************************************************************** +// +// Handles bulk driver notifications related to the receive channel (data from +// the USB host). +// +// \param pvCBData is the client-supplied callback pointer for this channel. +// \param ulEvent identifies the event we are being notified about. +// \param ulMsgValue is an event-specific value. +// \param pvMsgData is an event-specific pointer. +// +// This function is called by the bulk driver to notify us of any events +// related to operation of the receive data channel (the OUT channel carrying +// data from the USB host). +// +// \return The return value is event-specific. +// +//***************************************************************************** +unsigned long +RxHandler(void *pvCBData, unsigned long ulEvent, + unsigned long ulMsgValue, void *pvMsgData) +{ + // + // Which event are we being sent? + // + switch(ulEvent) + { + // + // We are connected to a host and communication is now possible. + // + case USB_EVENT_CONNECTED: + { + g_bUSBConfigured = true; + UARTprintf("Host connected.\n"); + + // + // Flush our buffers. + // + USBBufferFlush(&g_sTxBuffer); + USBBufferFlush(&g_sRxBuffer); + + break; + } + + // + // The host has disconnected. + // + case USB_EVENT_DISCONNECTED: + { + g_bUSBConfigured = false; + UARTprintf("Host disconnected.\n"); + break; + } + + // + // A new packet has been received. + // + case USB_EVENT_RX_AVAILABLE: + { + tUSBDBulkDevice *psDevice; + + // + // Get a pointer to our instance data from the callback data + // parameter. + // + psDevice = (tUSBDBulkDevice *)pvCBData; + + // + // Read the new packet and echo it back to the host. + // + return(EchoNewDataToHost(psDevice, pvMsgData, ulMsgValue)); + } + + // + // Ignore SUSPEND and RESUME for now. + // + case USB_EVENT_SUSPEND: + case USB_EVENT_RESUME: + { + break; + } + + // + // Ignore all other events and return 0. + // + default: + { + break; + } + } + + return(0); +} + +//***************************************************************************** +// +// This is the main application entry function. +// +//***************************************************************************** +int +main(void) +{ + volatile unsigned long ulLoop; + unsigned long ulTxCount; + unsigned long ulRxCount; + + // + // Enable lazy stacking for interrupt handlers. This allows floating-point + // instructions to be used within interrupt handlers, but at the expense of + // extra stack usage. + // + ROM_FPULazyStackingEnable(); + + // + // Set the clocking to run from the PLL at 50MHz + // + ROM_SysCtlClockSet(SYSCTL_SYSDIV_4 | SYSCTL_USE_PLL | SYSCTL_OSC_MAIN | + SYSCTL_XTAL_16MHZ); + + // + // Configure the relevant pins such that UART0 owns them. + // + ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA); + GPIOPinConfigure(GPIO_PA0_U0RX); + GPIOPinConfigure(GPIO_PA1_U0TX); + ROM_GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_1); + + // + // Enable the GPIO port that is used for the on-board LED. + // + ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOF); + + // + // Enable the GPIO pins for the LED (PF2 & PF3). + // + ROM_GPIOPinTypeGPIOOutput(GPIO_PORTF_BASE, GPIO_PIN_3|GPIO_PIN_2); + + + // + // Open UART0 and show the application name on the UART. + // + UARTStdioInit(0); + UARTprintf("\033[2JStellaris USB bulk device example\n"); + UARTprintf("---------------------------------\n\n"); + + // + // Not configured initially. + // + g_bUSBConfigured = false; + + // + // Enable the GPIO peripheral used for USB, and configure the USB + // pins. + // + ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOD); + ROM_GPIOPinTypeUSBAnalog(GPIO_PORTD_BASE, GPIO_PIN_4 | GPIO_PIN_5); + + // + // Enable the system tick. + // + ROM_SysTickPeriodSet(ROM_SysCtlClockGet() / SYSTICKS_PER_SECOND); + ROM_SysTickIntEnable(); + ROM_SysTickEnable(); + + // + // Tell the user what we are up to. + // + UARTprintf("Configuring USB\n"); + + // + // Initialize the transmit and receive buffers. + // + USBBufferInit((tUSBBuffer *)&g_sTxBuffer); + USBBufferInit((tUSBBuffer *)&g_sRxBuffer); + + // + // Set the USB stack mode to Device mode with VBUS monitoring. + // + USBStackModeSet(0, USB_MODE_FORCE_DEVICE, 0); + + // + // Pass our device information to the USB library and place the device + // on the bus. + // + USBDBulkInit(0, (tUSBDBulkDevice *)&g_sBulkDevice); + + // + // Wait for initial configuration to complete. + // + UARTprintf("Waiting for host...\n"); + + // + // Clear our local byte counters. + // + ulRxCount = 0; + ulTxCount = 0; + + // + // Main application loop. + // + while(1) + { + // + // See if any data has been transferred. + // + if((ulTxCount != g_ulTxCount) || (ulRxCount != g_ulRxCount)) + { + // + // Has there been any transmit traffic since we last checked? + // + if(ulTxCount != g_ulTxCount) + { + // + // Turn on the Green LED. + // + GPIOPinWrite(GPIO_PORTF_BASE, GPIO_PIN_3, GPIO_PIN_3); + + // + // Delay for a bit. + // + for(ulLoop = 0; ulLoop < 150000; ulLoop++) + { + } + + // + // Turn off the Green LED. + // + GPIOPinWrite(GPIO_PORTF_BASE, GPIO_PIN_3, 0); + + // + // Take a snapshot of the latest transmit count. + // + ulTxCount = g_ulTxCount; + } + + // + // Has there been any receive traffic since we last checked? + // + if(ulRxCount != g_ulRxCount) + { + // + // Turn on the Blue LED. + // + GPIOPinWrite(GPIO_PORTF_BASE, GPIO_PIN_2, GPIO_PIN_2); + + // + // Delay for a bit. + // + for(ulLoop = 0; ulLoop < 150000; ulLoop++) + { + } + + // + // Turn off the Blue LED. + // + GPIOPinWrite(GPIO_PORTF_BASE, GPIO_PIN_2, 0); + + // + // Take a snapshot of the latest receive count. + // + ulRxCount = g_ulRxCount; + } + + // + // Update the display of bytes transferred. + // + UARTprintf("\rTx: %d Rx: %d", ulTxCount, ulRxCount); + } + } +} diff --git a/boards/ek-lm4f120xl/usb_dev_bulk/usb_dev_bulk.ewd b/boards/ek-lm4f120xl/usb_dev_bulk/usb_dev_bulk.ewd new file mode 100644 index 0000000..b8eeac7 --- /dev/null +++ b/boards/ek-lm4f120xl/usb_dev_bulk/usb_dev_bulk.ewd @@ -0,0 +1,614 @@ + + + + 1 + + Debug + + ARM + + 1 + + C-SPY + 2 + + 15 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + ARMSIM_ID + 2 + + 1 + 1 + 1 + + + + + + + + ANGEL_ID + 2 + + 0 + 1 + 1 + + + + + + + + + + + + GDBSERVER_ID + 2 + + 0 + 1 + 1 + + + + + + + + + + + IARROM_ID + 2 + + 0 + 1 + 1 + + + + + + + + + + JLINK_ID + 2 + + 9 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + LMIFTDI_ID + 2 + + 1 + 1 + 1 + + + + + + + + MACRAIGOR_ID + 2 + + 2 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + RDI_ID + 2 + + 1 + 1 + 1 + + + + + + + + + + + + + + + + + THIRDPARTY_ID + 2 + + 0 + 1 + 1 + + + + + + + + + $TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\OSE\OseEpsilonPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\PowerPac\PowerPacRTOS.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin + 0 + + + $EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin + 1 + + + $EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin + 0 + + + $EW_DIR$\common\plugins\Profiling\Profiling.ENU.ewplugin + 1 + + + $EW_DIR$\common\plugins\Stack\Stack.ENU.ewplugin + 1 + + + + diff --git a/boards/ek-lm4f120xl/usb_dev_bulk/usb_dev_bulk.ewp b/boards/ek-lm4f120xl/usb_dev_bulk/usb_dev_bulk.ewp new file mode 100644 index 0000000..dc3e97b --- /dev/null +++ b/boards/ek-lm4f120xl/usb_dev_bulk/usb_dev_bulk.ewp @@ -0,0 +1,797 @@ + + + + 1 + + Debug + + ARM + + 1 + + General + 3 + + 14 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCARM + 2 + + 19 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AARM + 2 + + 7 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + OBJCOPY + 0 + + 1 + 1 + 1 + + + + + + + + + CUSTOM + 3 + + + + + + + BICOMP + 0 + + + + BUILDACTION + 1 + + + + + + + ILINK + 0 + + 5 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + IARCHIVE + 0 + + 0 + 1 + 1 + + + + + + + BILINK + 0 + + + + + Libraries + + $PROJ_DIR$\..\..\..\driverlib\ewarm-cm4f\Exe\driverlib-cm4f.a + + + $PROJ_DIR$\..\..\..\usblib\ewarm-cm4f\Exe\usblib-cm4f.a + + + + Source + + $PROJ_DIR$\startup_ewarm.c + + + $PROJ_DIR$\..\..\..\utils\uartstdio.c + + + $PROJ_DIR$\usb_bulk_structs.c + + + $PROJ_DIR$\usb_dev_bulk.c + + + $PROJ_DIR$\..\..\..\utils\ustdlib.c + + + diff --git a/boards/ek-lm4f120xl/usb_dev_bulk/usb_dev_bulk.icf b/boards/ek-lm4f120xl/usb_dev_bulk/usb_dev_bulk.icf new file mode 100644 index 0000000..dbe0ef0 --- /dev/null +++ b/boards/ek-lm4f120xl/usb_dev_bulk/usb_dev_bulk.icf @@ -0,0 +1,78 @@ +//***************************************************************************** +// +// usb_dev_bulk.icf - Linker configuration file for usb_dev_bulk. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +// +// Define a memory region that covers the entire 4 GB addressible space of the +// processor. +// +define memory mem with size = 4G; + +// +// Define a region for the on-chip flash. +// +define region FLASH = mem:[from 0x00000000 to 0x0003ffff]; + +// +// Define a region for the on-chip SRAM. +// +define region SRAM = mem:[from 0x20000000 to 0x20007fff]; + +// +// Define a block for the heap. The size should be set to something other +// than zero if things in the C library that require the heap are used. +// +define block HEAP with alignment = 8, size = 0x00000000 { }; + +// +// Indicate that the read/write values should be initialized by copying from +// flash. +// +initialize by copy { readwrite }; + +// +// Indicate that the noinit values should be left alone. This includes the +// stack, which if initialized will destroy the return address from the +// initialization code, causing the processor to branch to zero and fault. +// +do not initialize { section .noinit }; + +// +// Place the interrupt vectors at the start of flash. +// +place at start of FLASH { readonly section .intvec }; + +// +// Place the remainder of the read-only items into flash. +// +place in FLASH { readonly }; + +// +// Place the RAM vector table at the start of SRAM. +// +place at start of SRAM { section VTABLE }; + +// +// Place all read/write items into SRAM. +// +place in SRAM { readwrite, block HEAP }; diff --git a/boards/ek-lm4f120xl/usb_dev_bulk/usb_dev_bulk.ld b/boards/ek-lm4f120xl/usb_dev_bulk/usb_dev_bulk.ld new file mode 100644 index 0000000..119dcbf --- /dev/null +++ b/boards/ek-lm4f120xl/usb_dev_bulk/usb_dev_bulk.ld @@ -0,0 +1,57 @@ +/****************************************************************************** + * + * usb_dev_bulk.ld - Linker configuration file for usb_dev_bulk. + * + * Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. + * Software License Agreement + * + * Texas Instruments (TI) is supplying this software for use solely and + * exclusively on TI's microcontroller products. The software is owned by + * TI and/or its suppliers, and is protected under applicable copyright + * laws. You may not combine this software with "viral" open-source + * software in order to form a larger program. + * + * THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. + * NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT + * NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY + * CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL + * DAMAGES, FOR ANY REASON WHATSOEVER. + * + * This is part of revision 9453 of the EK-LM4F120XL Firmware Package. + * + *****************************************************************************/ + +MEMORY +{ + FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x00040000 + SRAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00008000 +} + +SECTIONS +{ + .text : + { + _text = .; + KEEP(*(.isr_vector)) + *(.text*) + *(.rodata*) + _etext = .; + } > FLASH + + .data : AT(ADDR(.text) + SIZEOF(.text)) + { + _data = .; + *(vtable) + *(.data*) + _edata = .; + } > SRAM + + .bss : + { + _bss = .; + *(.bss*) + *(COMMON) + _ebss = .; + } > SRAM +} diff --git a/boards/ek-lm4f120xl/usb_dev_bulk/usb_dev_bulk.sct b/boards/ek-lm4f120xl/usb_dev_bulk/usb_dev_bulk.sct new file mode 100644 index 0000000..d792e4c --- /dev/null +++ b/boards/ek-lm4f120xl/usb_dev_bulk/usb_dev_bulk.sct @@ -0,0 +1,47 @@ +;****************************************************************************** +; +; usb_dev_bulk.sct - Linker configuration file for usb_dev_bulk. +; +; Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +; Software License Agreement +; +; Texas Instruments (TI) is supplying this software for use solely and +; exclusively on TI's microcontroller products. The software is owned by +; TI and/or its suppliers, and is protected under applicable copyright +; laws. You may not combine this software with "viral" open-source +; software in order to form a larger program. +; +; THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +; NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +; NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +; A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +; CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +; DAMAGES, FOR ANY REASON WHATSOEVER. +; +; This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +; +;****************************************************************************** + +LR_IROM 0x00000000 0x00040000 +{ + ; + ; Specify the Execution Address of the code and the size. + ; + ER_IROM 0x00000000 0x00040000 + { + *.o (RESET, +First) + * (InRoot$$Sections, +RO) + } + + ; + ; Specify the Execution Address of the data area. + ; + RW_IRAM 0x20000000 0x00008000 + { + ; + ; Uncomment the following line in order to use IntRegister(). + ; + ;* (vtable, +First) + * (+RW, +ZI) + } +} diff --git a/boards/ek-lm4f120xl/usb_dev_bulk/usb_dev_bulk.sgxx b/boards/ek-lm4f120xl/usb_dev_bulk/usb_dev_bulk.sgxx new file mode 100644 index 0000000..0d20239 Binary files /dev/null and b/boards/ek-lm4f120xl/usb_dev_bulk/usb_dev_bulk.sgxx differ diff --git a/boards/ek-lm4f120xl/usb_dev_bulk/usb_dev_bulk.uvopt b/boards/ek-lm4f120xl/usb_dev_bulk/usb_dev_bulk.uvopt new file mode 100644 index 0000000..ddf3e81 --- /dev/null +++ b/boards/ek-lm4f120xl/usb_dev_bulk/usb_dev_bulk.uvopt @@ -0,0 +1,345 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + + + + 0 + 0 + + + + usb_dev_bulk + 0x4 + ARM-ADS + + 8000000 + + 1 + 1 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\rvmdk\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 255 + + + 0 + Data Sheet + DATASHTS\Luminary\LM4F120H5QR.PDF + + + + SARMCM3.DLL + -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 0 + 1 + 0 + 0 + 4 + + + + + + + + + + + BIN\lmidk-agdi.dll + + + + 0 + lmidk-agdi + -O4614 -S3 -FO29 + + + 0 + DLGTARM + + + + 0 + ARMDBGFLAGS + + + + + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + Source + 1 + 0 + 0 + + 1 + 1 + 2 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + .\startup_rvmdk.S + startup_rvmdk.S + + + 1 + 2 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\utils\uartstdio.c + uartstdio.c + + + 1 + 3 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + .\usb_bulk_structs.c + usb_bulk_structs.c + + + 1 + 4 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + .\usb_dev_bulk.c + usb_dev_bulk.c + + + 1 + 5 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\utils\ustdlib.c + ustdlib.c + + + + + Libraries + 1 + 0 + 0 + + 2 + 6 + 4 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\driverlib\rvmdk-cm4f\driverlib-cm4f.lib + driverlib-cm4f.lib + + + 2 + 7 + 4 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\usblib\rvmdk-cm4f\usblib-cm4f.lib + usblib-cm4f.lib + + + + + Documentation + 1 + 0 + 0 + + 3 + 8 + 5 + 0 + 1 + 0 + 0 + 1 + 1 + 0 + .\readme.txt + readme.txt + + 44 + 0 + 1 + + -1 + -1 + + + -1 + -1 + + + 0 + 0 + 729 + 300 + + + + + + + 1 + 0 + + 100 + 0 + + + .\readme.txt + 0 + 1 + 1 + + + + + + diff --git a/boards/ek-lm4f120xl/usb_dev_bulk/usb_dev_bulk.uvproj b/boards/ek-lm4f120xl/usb_dev_bulk/usb_dev_bulk.uvproj new file mode 100644 index 0000000..bb85d40 --- /dev/null +++ b/boards/ek-lm4f120xl/usb_dev_bulk/usb_dev_bulk.uvproj @@ -0,0 +1,444 @@ + + + + 1.1 + +
### uVision Project, (C) Keil Software
+ + + + usb_dev_bulk + 0x4 + ARM-ADS + + + LM4F120H5QR + Texas Instruments + IRAM(0x20000000-0x20007FFF) IROM(0-0x3FFFF) CLOCK(8000000) CPUTYPE("Cortex-M4") FPU2 + + "STARTUP\Luminary\Startup.s" ("Luminary Startup Code") + UL2CM3(-O207 -S0 -C0 -FO7 -FD20000000 -FC800 -FN1 -FF0LM4F_256 -FS00 -FL040000) + 5919 + LM4Fxxxx.H + + + + + + + + + + 0 + + + + Luminary\ + Luminary\ + + 0 + 0 + 0 + 0 + 1 + + .\rvmdk\ + usb_dev_bulk + 1 + 0 + 0 + 1 + 1 + .\rvmdk\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + + 1 + 0 + fromelf --bin --output .\rvmdk\usb_dev_bulk.bin .\rvmdk\usb_dev_bulk.axf + + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + + + SARMCM3.DLL + -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + + 1 + 0 + 0 + 0 + 16 + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + + + 1 + 1 + 0 + 1 + 1 + 1 + 0 + 1 + + 0 + 4 + + + + + + + + + + + + + + BIN\lmidk-agdi.dll + + + + + 1 + 0 + 0 + 0 + 1 + 4099 + + BIN\lmidk-agdi.dll + + + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M4" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 2 + 0 + 0 + 8 + 1 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x8000 + + + 1 + 0x0 + 0x40000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x40000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x8000 + + + 0 + 0x0 + 0x0 + + + + + + 0 + 3 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + + + rvmdk PART_LM4F120H5QR TARGET_IS_BLIZZARD_RA1 UART_BUFFERED + + ..\..\..; + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x00000000 + 0x20000000 + usb_dev_bulk.sct + + + --entry Reset_Handler + + + + + + + + Source + + + startup_rvmdk.S + 2 + .\startup_rvmdk.S + + + uartstdio.c + 1 + ..\..\..\utils\uartstdio.c + + + usb_bulk_structs.c + 1 + .\usb_bulk_structs.c + + + usb_dev_bulk.c + 1 + .\usb_dev_bulk.c + + + ustdlib.c + 1 + ..\..\..\utils\ustdlib.c + + + + + Libraries + + + driverlib-cm4f.lib + 4 + ..\..\..\driverlib\rvmdk-cm4f\driverlib-cm4f.lib + + + usblib-cm4f.lib + 4 + ..\..\..\usblib\rvmdk-cm4f\usblib-cm4f.lib + + + + + Documentation + + + readme.txt + 5 + .\readme.txt + + + + + + + + diff --git a/boards/ek-lm4f120xl/usb_dev_bulk/usb_dev_bulk_ccs.cmd b/boards/ek-lm4f120xl/usb_dev_bulk/usb_dev_bulk_ccs.cmd new file mode 100644 index 0000000..4eaaa9e --- /dev/null +++ b/boards/ek-lm4f120xl/usb_dev_bulk/usb_dev_bulk_ccs.cmd @@ -0,0 +1,70 @@ +/****************************************************************************** + * + * usb_dev_bulk_ccs.cmd - CCS linker configuration file for usb_dev_bulk. + * + * Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. + * Software License Agreement + * + * Texas Instruments (TI) is supplying this software for use solely and + * exclusively on TI's microcontroller products. The software is owned by + * TI and/or its suppliers, and is protected under applicable copyright + * laws. You may not combine this software with "viral" open-source + * software in order to form a larger program. + * + * THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. + * NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT + * NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY + * CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL + * DAMAGES, FOR ANY REASON WHATSOEVER. + * + * This is part of revision 9453 of the EK-LM4F120XL Firmware Package. + * + *****************************************************************************/ + +--retain=g_pfnVectors + +/* The following command line options are set as part of the CCS project. */ +/* If you are building using the command line, or for some reason want to */ +/* define them here, you can uncomment and modify these lines as needed. */ +/* If you are using CCS for building, it is probably better to make any such */ +/* modifications in your CCS project and leave this file alone. */ +/* */ +/* --heap_size=0 */ +/* --stack_size=256 */ +/* --library=rtsv7M3_T_le_eabi.lib */ + +/* The starting address of the application. Normally the interrupt vectors */ +/* must be located at the beginning of the application. */ +#define APP_BASE 0x00000000 +#define RAM_BASE 0x20000000 + +/* System memory map */ + +MEMORY +{ + /* Application stored in and executes from internal flash */ + FLASH (RX) : origin = APP_BASE, length = 0x00040000 + /* Application uses internal RAM for data */ + SRAM (RWX) : origin = 0x20000000, length = 0x00008000 +} + +/* Section allocation in memory */ + +SECTIONS +{ + .intvecs: > APP_BASE + .text : > FLASH + .const : > FLASH + .cinit : > FLASH + .pinit : > FLASH + .init_array : > FLASH + + .vtable : > RAM_BASE + .data : > SRAM + .bss : > SRAM + .sysmem : > SRAM + .stack : > SRAM +} + +__STACK_TOP = __stack + 1024; diff --git a/boards/ek-lm4f120xl/usb_dev_bulk/usb_dev_bulk_sourcerygxx.ld b/boards/ek-lm4f120xl/usb_dev_bulk/usb_dev_bulk_sourcerygxx.ld new file mode 100644 index 0000000..8987330 --- /dev/null +++ b/boards/ek-lm4f120xl/usb_dev_bulk/usb_dev_bulk_sourcerygxx.ld @@ -0,0 +1,43 @@ +/****************************************************************************** + * + * usb_dev_bulk_sourcerygxx.ld - Scatter file for Sourcery CodeBench + * + * Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. + * Software License Agreement + * + * Texas Instruments (TI) is supplying this software for use solely and + * exclusively on TI's microcontroller products. The software is owned by + * TI and/or its suppliers, and is protected under applicable copyright + * laws. You may not combine this software with "viral" open-source + * software in order to form a larger program. + * + * THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. + * NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT + * NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY + * CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL + * DAMAGES, FOR ANY REASON WHATSOEVER. + * + * This is part of revision 9453 of the EK-LM4F120XL Firmware Package. + * + *****************************************************************************/ + +/****************************************************************************** + * + * Define the end of the heap space, which determines the beginning of the + * stack space. + * + *****************************************************************************/ +__cs3_heap_end = __cs3_region_end_ram - 1024; + +/****************************************************************************** + * + * Define the interrupt handlers used by the application. + * + *****************************************************************************/ +EXTERN(SysTickIntHandler) +__cs3_isr_systick = SysTickIntHandler; +EXTERN(UARTStdioIntHandler) +__cs3_isr_uart0 = UARTStdioIntHandler; +EXTERN(USB0DeviceIntHandler) +__cs3_isr_usb0 = USB0DeviceIntHandler; diff --git a/boards/ek-lm4f120xl/usb_dev_serial/Makefile b/boards/ek-lm4f120xl/usb_dev_serial/Makefile new file mode 100644 index 0000000..1be61d1 --- /dev/null +++ b/boards/ek-lm4f120xl/usb_dev_serial/Makefile @@ -0,0 +1,95 @@ +#****************************************************************************** +# +# Makefile - Rules for building the USB device serial example. +# +# Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +# Software License Agreement +# +# Texas Instruments (TI) is supplying this software for use solely and +# exclusively on TI's microcontroller products. The software is owned by +# TI and/or its suppliers, and is protected under applicable copyright +# laws. You may not combine this software with "viral" open-source +# software in order to form a larger program. +# +# THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +# NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +# NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +# A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +# CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +# DAMAGES, FOR ANY REASON WHATSOEVER. +# +# This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +# +#****************************************************************************** + +# +# Defines the part type that this project uses. +# +PART=LM4F120H5QR + +# +# Set the processor variant. +# +VARIANT=cm4f + +# +# The base directory for StellarisWare. +# +ROOT=../../.. + +# +# Include the common make definitions. +# +include ${ROOT}/makedefs + +# +# Where to find source files that do not live in this directory. +# +VPATH=../drivers +VPATH+=../../../utils + +# +# Where to find header files that do not live in the source directory. +# +IPATH=.. +IPATH+=../../.. + +# +# The default rule, which causes the USB device serial example to be built. +# +all: ${COMPILER} +all: ${COMPILER}/usb_dev_serial.axf + +# +# The rule to clean out all the build products. +# +clean: + @rm -rf ${COMPILER} ${wildcard *~} + +# +# The rule to create the target directory. +# +${COMPILER}: + @mkdir -p ${COMPILER} + +# +# Rules for building the USB device serial example. +# +${COMPILER}/usb_dev_serial.axf: ${COMPILER}/startup_${COMPILER}.o +${COMPILER}/usb_dev_serial.axf: ${COMPILER}/uartstdio.o +${COMPILER}/usb_dev_serial.axf: ${COMPILER}/usb_dev_serial.o +${COMPILER}/usb_dev_serial.axf: ${COMPILER}/usb_serial_structs.o +${COMPILER}/usb_dev_serial.axf: ${COMPILER}/ustdlib.o +${COMPILER}/usb_dev_serial.axf: ${ROOT}/usblib/${COMPILER}-cm4f/libusb-cm4f.a +${COMPILER}/usb_dev_serial.axf: ${ROOT}/driverlib/${COMPILER}-cm4f/libdriver-cm4f.a +${COMPILER}/usb_dev_serial.axf: usb_dev_serial.ld +SCATTERgcc_usb_dev_serial=usb_dev_serial.ld +ENTRY_usb_dev_serial=ResetISR +CFLAGSgcc=-DTARGET_IS_BLIZZARD_RA2 -DUART_BUFFERED + +# +# Include the automatically generated dependency files. +# +ifneq (${MAKECMDGOALS},clean) +-include ${wildcard ${COMPILER}/*.d} __dummy__ +endif diff --git a/boards/ek-lm4f120xl/usb_dev_serial/ccs/.ccsimportspec b/boards/ek-lm4f120xl/usb_dev_serial/ccs/.ccsimportspec new file mode 100644 index 0000000..c5ecbbf --- /dev/null +++ b/boards/ek-lm4f120xl/usb_dev_serial/ccs/.ccsimportspec @@ -0,0 +1,10 @@ + + + + + + + + + + diff --git a/boards/ek-lm4f120xl/usb_dev_serial/ccs/.ccsproject b/boards/ek-lm4f120xl/usb_dev_serial/ccs/.ccsproject new file mode 100644 index 0000000..56793f4 --- /dev/null +++ b/boards/ek-lm4f120xl/usb_dev_serial/ccs/.ccsproject @@ -0,0 +1,12 @@ + + + + + + + + + + + + diff --git a/boards/ek-lm4f120xl/usb_dev_serial/ccs/.cproject b/boards/ek-lm4f120xl/usb_dev_serial/ccs/.cproject new file mode 100644 index 0000000..6ac8a31 --- /dev/null +++ b/boards/ek-lm4f120xl/usb_dev_serial/ccs/.cproject @@ -0,0 +1,197 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/boards/ek-lm4f120xl/usb_dev_serial/ccs/.project b/boards/ek-lm4f120xl/usb_dev_serial/ccs/.project new file mode 100644 index 0000000..18bd24b --- /dev/null +++ b/boards/ek-lm4f120xl/usb_dev_serial/ccs/.project @@ -0,0 +1,121 @@ + + + usb_dev_serial + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + + + ?name? + + + + org.eclipse.cdt.make.core.append_environment + true + + + org.eclipse.cdt.make.core.autoBuildTarget + all + + + org.eclipse.cdt.make.core.buildArguments + -k + + + org.eclipse.cdt.make.core.buildCommand + ${CCS_UTILS_DIR}/bin/gmake + + + org.eclipse.cdt.make.core.buildLocation + ${BuildDirectory} + + + org.eclipse.cdt.make.core.cleanBuildTarget + clean + + + org.eclipse.cdt.make.core.contents + org.eclipse.cdt.make.core.activeConfigSettings + + + org.eclipse.cdt.make.core.enableAutoBuild + true + + + org.eclipse.cdt.make.core.enableCleanBuild + true + + + org.eclipse.cdt.make.core.enableFullBuild + true + + + org.eclipse.cdt.make.core.fullBuildTarget + all + + + org.eclipse.cdt.make.core.stopOnError + false + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + true + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + com.ti.ccstudio.core.ccsNature + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.core.ccnature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + startup_ccs.c + 1 + SW_ROOT/boards/ek-lm4f120xl/usb_dev_serial/startup_ccs.c + + + usb_dev_serial.c + 1 + SW_ROOT/boards/ek-lm4f120xl/usb_dev_serial/usb_dev_serial.c + + + usb_dev_serial_ccs.cmd + 1 + SW_ROOT/boards/ek-lm4f120xl/usb_dev_serial/usb_dev_serial_ccs.cmd + + + usb_serial_structs.c + 1 + SW_ROOT/boards/ek-lm4f120xl/usb_dev_serial/usb_serial_structs.c + + + utils/uartstdio.c + 1 + SW_ROOT/utils/uartstdio.c + + + utils/ustdlib.c + 1 + SW_ROOT/utils/ustdlib.c + + + + + SW_ROOT + $%7BPARENT-4-PROJECT_LOC%7D + + + diff --git a/boards/ek-lm4f120xl/usb_dev_serial/ccs/.settings/org.eclipse.cdt.codan.core.prefs b/boards/ek-lm4f120xl/usb_dev_serial/ccs/.settings/org.eclipse.cdt.codan.core.prefs new file mode 100644 index 0000000..98b6350 --- /dev/null +++ b/boards/ek-lm4f120xl/usb_dev_serial/ccs/.settings/org.eclipse.cdt.codan.core.prefs @@ -0,0 +1,3 @@ +eclipse.preferences.version=1 +inEditor=false +onBuild=false diff --git a/boards/ek-lm4f120xl/usb_dev_serial/ccs/Debug/usb_dev_serial.bin b/boards/ek-lm4f120xl/usb_dev_serial/ccs/Debug/usb_dev_serial.bin new file mode 100644 index 0000000..bb054dc Binary files /dev/null and b/boards/ek-lm4f120xl/usb_dev_serial/ccs/Debug/usb_dev_serial.bin differ diff --git a/boards/ek-lm4f120xl/usb_dev_serial/ccs/Debug/usb_dev_serial.out b/boards/ek-lm4f120xl/usb_dev_serial/ccs/Debug/usb_dev_serial.out new file mode 100644 index 0000000..aab07d5 Binary files /dev/null and b/boards/ek-lm4f120xl/usb_dev_serial/ccs/Debug/usb_dev_serial.out differ diff --git a/boards/ek-lm4f120xl/usb_dev_serial/ccs/macros.ini_initial b/boards/ek-lm4f120xl/usb_dev_serial/ccs/macros.ini_initial new file mode 100644 index 0000000..588017d --- /dev/null +++ b/boards/ek-lm4f120xl/usb_dev_serial/ccs/macros.ini_initial @@ -0,0 +1 @@ +SW_ROOT = ../../../.. diff --git a/boards/ek-lm4f120xl/usb_dev_serial/ccs/target_config.ccxml b/boards/ek-lm4f120xl/usb_dev_serial/ccs/target_config.ccxml new file mode 100644 index 0000000..469eea0 --- /dev/null +++ b/boards/ek-lm4f120xl/usb_dev_serial/ccs/target_config.ccxml @@ -0,0 +1,13 @@ + + + + + + + + + + + + + diff --git a/boards/ek-lm4f120xl/usb_dev_serial/ewarm/Exe/usb_dev_serial.bin b/boards/ek-lm4f120xl/usb_dev_serial/ewarm/Exe/usb_dev_serial.bin new file mode 100644 index 0000000..d97773b Binary files /dev/null and b/boards/ek-lm4f120xl/usb_dev_serial/ewarm/Exe/usb_dev_serial.bin differ diff --git a/boards/ek-lm4f120xl/usb_dev_serial/ewarm/Exe/usb_dev_serial.out b/boards/ek-lm4f120xl/usb_dev_serial/ewarm/Exe/usb_dev_serial.out new file mode 100644 index 0000000..7c0cd51 Binary files /dev/null and b/boards/ek-lm4f120xl/usb_dev_serial/ewarm/Exe/usb_dev_serial.out differ diff --git a/boards/ek-lm4f120xl/usb_dev_serial/gcc/usb_dev_serial.axf b/boards/ek-lm4f120xl/usb_dev_serial/gcc/usb_dev_serial.axf new file mode 100644 index 0000000..34fbdfd Binary files /dev/null and b/boards/ek-lm4f120xl/usb_dev_serial/gcc/usb_dev_serial.axf differ diff --git a/boards/ek-lm4f120xl/usb_dev_serial/gcc/usb_dev_serial.bin b/boards/ek-lm4f120xl/usb_dev_serial/gcc/usb_dev_serial.bin new file mode 100644 index 0000000..f5ab27a Binary files /dev/null and b/boards/ek-lm4f120xl/usb_dev_serial/gcc/usb_dev_serial.bin differ diff --git a/boards/ek-lm4f120xl/usb_dev_serial/readme.txt b/boards/ek-lm4f120xl/usb_dev_serial/readme.txt new file mode 100644 index 0000000..97e3f4f --- /dev/null +++ b/boards/ek-lm4f120xl/usb_dev_serial/readme.txt @@ -0,0 +1,31 @@ +USB Serial Device + +This example application turns the evaluation kit into a virtual serial +port when connected to the USB host system. The application supports the +USB Communication Device Class, Abstract Control Model to redirect UART0 +traffic to and from the USB host system. + +Assuming you installed StellarisWare in the default directory, a +driver information (INF) file for use with Windows XP, Windows Vista and +Windows7 can be found in C:/StellarisWare/windows_drivers. For Windows +2000, the required INF file is in C:/StellarisWare/windows_drivers/win2K. + +------------------------------------------------------------------------------- + +Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +Software License Agreement + +Texas Instruments (TI) is supplying this software for use solely and +exclusively on TI's microcontroller products. The software is owned by +TI and/or its suppliers, and is protected under applicable copyright +laws. You may not combine this software with "viral" open-source +software in order to form a larger program. + +THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +DAMAGES, FOR ANY REASON WHATSOEVER. + +This is part of revision 9453 of the EK-LM4F120XL Firmware Package. diff --git a/boards/ek-lm4f120xl/usb_dev_serial/rvmdk/usb_dev_serial.axf b/boards/ek-lm4f120xl/usb_dev_serial/rvmdk/usb_dev_serial.axf new file mode 100644 index 0000000..3efe549 Binary files /dev/null and b/boards/ek-lm4f120xl/usb_dev_serial/rvmdk/usb_dev_serial.axf differ diff --git a/boards/ek-lm4f120xl/usb_dev_serial/rvmdk/usb_dev_serial.bin b/boards/ek-lm4f120xl/usb_dev_serial/rvmdk/usb_dev_serial.bin new file mode 100644 index 0000000..c648087 Binary files /dev/null and b/boards/ek-lm4f120xl/usb_dev_serial/rvmdk/usb_dev_serial.bin differ diff --git a/boards/ek-lm4f120xl/usb_dev_serial/sourcerygxx/usb_dev_serial.axf b/boards/ek-lm4f120xl/usb_dev_serial/sourcerygxx/usb_dev_serial.axf new file mode 100644 index 0000000..159b07b Binary files /dev/null and b/boards/ek-lm4f120xl/usb_dev_serial/sourcerygxx/usb_dev_serial.axf differ diff --git a/boards/ek-lm4f120xl/usb_dev_serial/sourcerygxx/usb_dev_serial.bin b/boards/ek-lm4f120xl/usb_dev_serial/sourcerygxx/usb_dev_serial.bin new file mode 100644 index 0000000..d83720a Binary files /dev/null and b/boards/ek-lm4f120xl/usb_dev_serial/sourcerygxx/usb_dev_serial.bin differ diff --git a/boards/ek-lm4f120xl/usb_dev_serial/startup_ccs.c b/boards/ek-lm4f120xl/usb_dev_serial/startup_ccs.c new file mode 100644 index 0000000..2454774 --- /dev/null +++ b/boards/ek-lm4f120xl/usb_dev_serial/startup_ccs.c @@ -0,0 +1,300 @@ +//***************************************************************************** +// +// startup_ccs.c - Startup code for use with TI's Code Composer Studio. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +//***************************************************************************** +// +// Forward declaration of the default fault handlers. +// +//***************************************************************************** +void ResetISR(void); +static void NmiSR(void); +static void FaultISR(void); +static void IntDefaultHandler(void); + +//***************************************************************************** +// +// External declaration for the reset handler that is to be called when the +// processor is started +// +//***************************************************************************** +extern void _c_int00(void); + +//***************************************************************************** +// +// Linker variable that marks the top of the stack. +// +//***************************************************************************** +extern unsigned long __STACK_TOP; + +//***************************************************************************** +// +// External declarations for the interrupt handlers used by the application. +// +//***************************************************************************** +extern void SysTickIntHandler(void); +extern void USBUARTIntHandler(void); +extern void USB0DeviceIntHandler(void); + +//***************************************************************************** +// +// The vector table. Note that the proper constructs must be placed on this to +// ensure that it ends up at physical address 0x0000.0000 or at the start of +// the program if located at a start address other than 0. +// +//***************************************************************************** +#pragma DATA_SECTION(g_pfnVectors, ".intvecs") +void (* const g_pfnVectors[])(void) = +{ + (void (*)(void))((unsigned long)&__STACK_TOP), + // The initial stack pointer + ResetISR, // The reset handler + NmiSR, // The NMI handler + FaultISR, // The hard fault handler + IntDefaultHandler, // The MPU fault handler + IntDefaultHandler, // The bus fault handler + IntDefaultHandler, // The usage fault handler + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // SVCall handler + IntDefaultHandler, // Debug monitor handler + 0, // Reserved + IntDefaultHandler, // The PendSV handler + SysTickIntHandler, // The SysTick handler + IntDefaultHandler, // GPIO Port A + IntDefaultHandler, // GPIO Port B + IntDefaultHandler, // GPIO Port C + IntDefaultHandler, // GPIO Port D + IntDefaultHandler, // GPIO Port E + USBUARTIntHandler, // UART0 Rx and Tx + IntDefaultHandler, // UART1 Rx and Tx + IntDefaultHandler, // SSI0 Rx and Tx + IntDefaultHandler, // I2C0 Master and Slave + IntDefaultHandler, // PWM Fault + IntDefaultHandler, // PWM Generator 0 + IntDefaultHandler, // PWM Generator 1 + IntDefaultHandler, // PWM Generator 2 + IntDefaultHandler, // Quadrature Encoder 0 + IntDefaultHandler, // ADC Sequence 0 + IntDefaultHandler, // ADC Sequence 1 + IntDefaultHandler, // ADC Sequence 2 + IntDefaultHandler, // ADC Sequence 3 + IntDefaultHandler, // Watchdog timer + IntDefaultHandler, // Timer 0 subtimer A + IntDefaultHandler, // Timer 0 subtimer B + IntDefaultHandler, // Timer 1 subtimer A + IntDefaultHandler, // Timer 1 subtimer B + IntDefaultHandler, // Timer 2 subtimer A + IntDefaultHandler, // Timer 2 subtimer B + IntDefaultHandler, // Analog Comparator 0 + IntDefaultHandler, // Analog Comparator 1 + IntDefaultHandler, // Analog Comparator 2 + IntDefaultHandler, // System Control (PLL, OSC, BO) + IntDefaultHandler, // FLASH Control + IntDefaultHandler, // GPIO Port F + IntDefaultHandler, // GPIO Port G + IntDefaultHandler, // GPIO Port H + IntDefaultHandler, // UART2 Rx and Tx + IntDefaultHandler, // SSI1 Rx and Tx + IntDefaultHandler, // Timer 3 subtimer A + IntDefaultHandler, // Timer 3 subtimer B + IntDefaultHandler, // I2C1 Master and Slave + IntDefaultHandler, // Quadrature Encoder 1 + IntDefaultHandler, // CAN0 + IntDefaultHandler, // CAN1 + IntDefaultHandler, // CAN2 + IntDefaultHandler, // Ethernet + IntDefaultHandler, // Hibernate + USB0DeviceIntHandler, // USB0 + IntDefaultHandler, // PWM Generator 3 + IntDefaultHandler, // uDMA Software Transfer + IntDefaultHandler, // uDMA Error + IntDefaultHandler, // ADC1 Sequence 0 + IntDefaultHandler, // ADC1 Sequence 1 + IntDefaultHandler, // ADC1 Sequence 2 + IntDefaultHandler, // ADC1 Sequence 3 + IntDefaultHandler, // I2S0 + IntDefaultHandler, // External Bus Interface 0 + IntDefaultHandler, // GPIO Port J + IntDefaultHandler, // GPIO Port K + IntDefaultHandler, // GPIO Port L + IntDefaultHandler, // SSI2 Rx and Tx + IntDefaultHandler, // SSI3 Rx and Tx + IntDefaultHandler, // UART3 Rx and Tx + IntDefaultHandler, // UART4 Rx and Tx + IntDefaultHandler, // UART5 Rx and Tx + IntDefaultHandler, // UART6 Rx and Tx + IntDefaultHandler, // UART7 Rx and Tx + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // I2C2 Master and Slave + IntDefaultHandler, // I2C3 Master and Slave + IntDefaultHandler, // Timer 4 subtimer A + IntDefaultHandler, // Timer 4 subtimer B + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // Timer 5 subtimer A + IntDefaultHandler, // Timer 5 subtimer B + IntDefaultHandler, // Wide Timer 0 subtimer A + IntDefaultHandler, // Wide Timer 0 subtimer B + IntDefaultHandler, // Wide Timer 1 subtimer A + IntDefaultHandler, // Wide Timer 1 subtimer B + IntDefaultHandler, // Wide Timer 2 subtimer A + IntDefaultHandler, // Wide Timer 2 subtimer B + IntDefaultHandler, // Wide Timer 3 subtimer A + IntDefaultHandler, // Wide Timer 3 subtimer B + IntDefaultHandler, // Wide Timer 4 subtimer A + IntDefaultHandler, // Wide Timer 4 subtimer B + IntDefaultHandler, // Wide Timer 5 subtimer A + IntDefaultHandler, // Wide Timer 5 subtimer B + IntDefaultHandler, // FPU + IntDefaultHandler, // PECI 0 + IntDefaultHandler, // LPC 0 + IntDefaultHandler, // I2C4 Master and Slave + IntDefaultHandler, // I2C5 Master and Slave + IntDefaultHandler, // GPIO Port M + IntDefaultHandler, // GPIO Port N + IntDefaultHandler, // Quadrature Encoder 2 + IntDefaultHandler, // Fan 0 + 0, // Reserved + IntDefaultHandler, // GPIO Port P (Summary or P0) + IntDefaultHandler, // GPIO Port P1 + IntDefaultHandler, // GPIO Port P2 + IntDefaultHandler, // GPIO Port P3 + IntDefaultHandler, // GPIO Port P4 + IntDefaultHandler, // GPIO Port P5 + IntDefaultHandler, // GPIO Port P6 + IntDefaultHandler, // GPIO Port P7 + IntDefaultHandler, // GPIO Port Q (Summary or Q0) + IntDefaultHandler, // GPIO Port Q1 + IntDefaultHandler, // GPIO Port Q2 + IntDefaultHandler, // GPIO Port Q3 + IntDefaultHandler, // GPIO Port Q4 + IntDefaultHandler, // GPIO Port Q5 + IntDefaultHandler, // GPIO Port Q6 + IntDefaultHandler, // GPIO Port Q7 + IntDefaultHandler, // GPIO Port R + IntDefaultHandler, // GPIO Port S + IntDefaultHandler, // PWM 1 Generator 0 + IntDefaultHandler, // PWM 1 Generator 1 + IntDefaultHandler, // PWM 1 Generator 2 + IntDefaultHandler, // PWM 1 Generator 3 + IntDefaultHandler // PWM 1 Fault +}; + +//***************************************************************************** +// +// This is the code that gets called when the processor first starts execution +// following a reset event. Only the absolutely necessary set is performed, +// after which the application supplied entry() routine is called. Any fancy +// actions (such as making decisions based on the reset cause register, and +// resetting the bits in that register) are left solely in the hands of the +// application. +// +//***************************************************************************** +void +ResetISR(void) +{ + // + // Jump to the CCS C initialization routine. This will enable the + // floating-point unit as well, so that does not need to be done here. + // + __asm(" .global _c_int00\n" + " b.w _c_int00"); +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a NMI. This +// simply enters an infinite loop, preserving the system state for examination +// by a debugger. +// +//***************************************************************************** +static void +NmiSR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a fault +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +FaultISR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives an unexpected +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +IntDefaultHandler(void) +{ + // + // Go into an infinite loop. + // + while(1) + { + } +} diff --git a/boards/ek-lm4f120xl/usb_dev_serial/startup_ewarm.c b/boards/ek-lm4f120xl/usb_dev_serial/startup_ewarm.c new file mode 100644 index 0000000..112bbd0 --- /dev/null +++ b/boards/ek-lm4f120xl/usb_dev_serial/startup_ewarm.c @@ -0,0 +1,334 @@ +//***************************************************************************** +// +// startup_ewarm.c - Startup code for use with IAR's Embedded Workbench, +// version 5. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +#include "inc/hw_nvic.h" +#include "inc/hw_types.h" + +//***************************************************************************** +// +// Enable the IAR extensions for this source file. +// +//***************************************************************************** +#pragma language=extended + +//***************************************************************************** +// +// Forward declaration of the default fault handlers. +// +//***************************************************************************** +void ResetISR(void); +static void NmiSR(void); +static void FaultISR(void); +static void IntDefaultHandler(void); + +//***************************************************************************** +// +// External declarations for the interrupt handlers used by the application. +// +//***************************************************************************** +extern void SysTickIntHandler(void); +extern void USBUARTIntHandler(void); +extern void USB0DeviceIntHandler(void); + +//***************************************************************************** +// +// The entry point for the application startup code. +// +//***************************************************************************** +extern void __iar_program_start(void); + +//***************************************************************************** +// +// Reserve space for the system stack. +// +//***************************************************************************** +static unsigned long pulStack[256] @ ".noinit"; + +//***************************************************************************** +// +// A union that describes the entries of the vector table. The union is needed +// since the first entry is the stack pointer and the remainder are function +// pointers. +// +//***************************************************************************** +typedef union +{ + void (*pfnHandler)(void); + unsigned long ulPtr; +} +uVectorEntry; + +//***************************************************************************** +// +// The vector table. Note that the proper constructs must be placed on this to +// ensure that it ends up at physical address 0x0000.0000. +// +//***************************************************************************** +__root const uVectorEntry __vector_table[] @ ".intvec" = +{ + { .ulPtr = (unsigned long)pulStack + sizeof(pulStack) }, + // The initial stack pointer + ResetISR, // The reset handler + NmiSR, // The NMI handler + FaultISR, // The hard fault handler + IntDefaultHandler, // The MPU fault handler + IntDefaultHandler, // The bus fault handler + IntDefaultHandler, // The usage fault handler + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // SVCall handler + IntDefaultHandler, // Debug monitor handler + 0, // Reserved + IntDefaultHandler, // The PendSV handler + SysTickIntHandler, // The SysTick handler + IntDefaultHandler, // GPIO Port A + IntDefaultHandler, // GPIO Port B + IntDefaultHandler, // GPIO Port C + IntDefaultHandler, // GPIO Port D + IntDefaultHandler, // GPIO Port E + USBUARTIntHandler, // UART0 Rx and Tx + IntDefaultHandler, // UART1 Rx and Tx + IntDefaultHandler, // SSI0 Rx and Tx + IntDefaultHandler, // I2C0 Master and Slave + IntDefaultHandler, // PWM Fault + IntDefaultHandler, // PWM Generator 0 + IntDefaultHandler, // PWM Generator 1 + IntDefaultHandler, // PWM Generator 2 + IntDefaultHandler, // Quadrature Encoder 0 + IntDefaultHandler, // ADC Sequence 0 + IntDefaultHandler, // ADC Sequence 1 + IntDefaultHandler, // ADC Sequence 2 + IntDefaultHandler, // ADC Sequence 3 + IntDefaultHandler, // Watchdog timer + IntDefaultHandler, // Timer 0 subtimer A + IntDefaultHandler, // Timer 0 subtimer B + IntDefaultHandler, // Timer 1 subtimer A + IntDefaultHandler, // Timer 1 subtimer B + IntDefaultHandler, // Timer 2 subtimer A + IntDefaultHandler, // Timer 2 subtimer B + IntDefaultHandler, // Analog Comparator 0 + IntDefaultHandler, // Analog Comparator 1 + IntDefaultHandler, // Analog Comparator 2 + IntDefaultHandler, // System Control (PLL, OSC, BO) + IntDefaultHandler, // FLASH Control + IntDefaultHandler, // GPIO Port F + IntDefaultHandler, // GPIO Port G + IntDefaultHandler, // GPIO Port H + IntDefaultHandler, // UART2 Rx and Tx + IntDefaultHandler, // SSI1 Rx and Tx + IntDefaultHandler, // Timer 3 subtimer A + IntDefaultHandler, // Timer 3 subtimer B + IntDefaultHandler, // I2C1 Master and Slave + IntDefaultHandler, // Quadrature Encoder 1 + IntDefaultHandler, // CAN0 + IntDefaultHandler, // CAN1 + IntDefaultHandler, // CAN2 + IntDefaultHandler, // Ethernet + IntDefaultHandler, // Hibernate + USB0DeviceIntHandler, // USB0 + IntDefaultHandler, // PWM Generator 3 + IntDefaultHandler, // uDMA Software Transfer + IntDefaultHandler, // uDMA Error + IntDefaultHandler, // ADC1 Sequence 0 + IntDefaultHandler, // ADC1 Sequence 1 + IntDefaultHandler, // ADC1 Sequence 2 + IntDefaultHandler, // ADC1 Sequence 3 + IntDefaultHandler, // I2S0 + IntDefaultHandler, // External Bus Interface 0 + IntDefaultHandler, // GPIO Port J + IntDefaultHandler, // GPIO Port K + IntDefaultHandler, // GPIO Port L + IntDefaultHandler, // SSI2 Rx and Tx + IntDefaultHandler, // SSI3 Rx and Tx + IntDefaultHandler, // UART3 Rx and Tx + IntDefaultHandler, // UART4 Rx and Tx + IntDefaultHandler, // UART5 Rx and Tx + IntDefaultHandler, // UART6 Rx and Tx + IntDefaultHandler, // UART7 Rx and Tx + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // I2C2 Master and Slave + IntDefaultHandler, // I2C3 Master and Slave + IntDefaultHandler, // Timer 4 subtimer A + IntDefaultHandler, // Timer 4 subtimer B + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // Timer 5 subtimer A + IntDefaultHandler, // Timer 5 subtimer B + IntDefaultHandler, // Wide Timer 0 subtimer A + IntDefaultHandler, // Wide Timer 0 subtimer B + IntDefaultHandler, // Wide Timer 1 subtimer A + IntDefaultHandler, // Wide Timer 1 subtimer B + IntDefaultHandler, // Wide Timer 2 subtimer A + IntDefaultHandler, // Wide Timer 2 subtimer B + IntDefaultHandler, // Wide Timer 3 subtimer A + IntDefaultHandler, // Wide Timer 3 subtimer B + IntDefaultHandler, // Wide Timer 4 subtimer A + IntDefaultHandler, // Wide Timer 4 subtimer B + IntDefaultHandler, // Wide Timer 5 subtimer A + IntDefaultHandler, // Wide Timer 5 subtimer B + IntDefaultHandler, // FPU + IntDefaultHandler, // PECI 0 + IntDefaultHandler, // LPC 0 + IntDefaultHandler, // I2C4 Master and Slave + IntDefaultHandler, // I2C5 Master and Slave + IntDefaultHandler, // GPIO Port M + IntDefaultHandler, // GPIO Port N + IntDefaultHandler, // Quadrature Encoder 2 + IntDefaultHandler, // Fan 0 + 0, // Reserved + IntDefaultHandler, // GPIO Port P (Summary or P0) + IntDefaultHandler, // GPIO Port P1 + IntDefaultHandler, // GPIO Port P2 + IntDefaultHandler, // GPIO Port P3 + IntDefaultHandler, // GPIO Port P4 + IntDefaultHandler, // GPIO Port P5 + IntDefaultHandler, // GPIO Port P6 + IntDefaultHandler, // GPIO Port P7 + IntDefaultHandler, // GPIO Port Q (Summary or Q0) + IntDefaultHandler, // GPIO Port Q1 + IntDefaultHandler, // GPIO Port Q2 + IntDefaultHandler, // GPIO Port Q3 + IntDefaultHandler, // GPIO Port Q4 + IntDefaultHandler, // GPIO Port Q5 + IntDefaultHandler, // GPIO Port Q6 + IntDefaultHandler, // GPIO Port Q7 + IntDefaultHandler, // GPIO Port R + IntDefaultHandler, // GPIO Port S + IntDefaultHandler, // PWM 1 Generator 0 + IntDefaultHandler, // PWM 1 Generator 1 + IntDefaultHandler, // PWM 1 Generator 2 + IntDefaultHandler, // PWM 1 Generator 3 + IntDefaultHandler // PWM 1 Fault +}; + +//***************************************************************************** +// +// This is the code that gets called when the processor first starts execution +// following a reset event. Only the absolutely necessary set is performed, +// after which the application supplied entry() routine is called. Any fancy +// actions (such as making decisions based on the reset cause register, and +// resetting the bits in that register) are left solely in the hands of the +// application. +// +//***************************************************************************** +void +ResetISR(void) +{ + // + // Enable the floating-point unit. This must be done here to handle the + // case where main() uses floating-point and the function prologue saves + // floating-point registers (which will fault if floating-point is not + // enabled). Any configuration of the floating-point unit using DriverLib + // APIs must be done here prior to the floating-point unit being enabled. + // + // Note that this does not use DriverLib since it might not be included in + // this project. + // + HWREG(NVIC_CPAC) = ((HWREG(NVIC_CPAC) & + ~(NVIC_CPAC_CP10_M | NVIC_CPAC_CP11_M)) | + NVIC_CPAC_CP10_FULL | NVIC_CPAC_CP11_FULL); + + // + // Call the application's entry point. + // + __iar_program_start(); +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a NMI. This +// simply enters an infinite loop, preserving the system state for examination +// by a debugger. +// +//***************************************************************************** +static void +NmiSR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a fault +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +FaultISR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives an unexpected +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +IntDefaultHandler(void) +{ + // + // Go into an infinite loop. + // + while(1) + { + } +} diff --git a/boards/ek-lm4f120xl/usb_dev_serial/startup_gcc.c b/boards/ek-lm4f120xl/usb_dev_serial/startup_gcc.c new file mode 100644 index 0000000..ae99fa6 --- /dev/null +++ b/boards/ek-lm4f120xl/usb_dev_serial/startup_gcc.c @@ -0,0 +1,350 @@ +//***************************************************************************** +// +// startup_gcc.c - Startup code for use with GNU tools. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +#include "inc/hw_nvic.h" +#include "inc/hw_types.h" + +//***************************************************************************** +// +// Forward declaration of the default fault handlers. +// +//***************************************************************************** +void ResetISR(void); +static void NmiSR(void); +static void FaultISR(void); +static void IntDefaultHandler(void); + +//***************************************************************************** +// +// External declarations for the interrupt handlers used by the application. +// +//***************************************************************************** +extern void SysTickIntHandler(void); +extern void USBUARTIntHandler(void); +extern void USB0DeviceIntHandler(void); + +//***************************************************************************** +// +// The entry point for the application. +// +//***************************************************************************** +extern int main(void); + +//***************************************************************************** +// +// Reserve space for the system stack. +// +//***************************************************************************** +static unsigned long pulStack[256]; + +//***************************************************************************** +// +// The vector table. Note that the proper constructs must be placed on this to +// ensure that it ends up at physical address 0x0000.0000. +// +//***************************************************************************** +__attribute__ ((section(".isr_vector"))) +void (* const g_pfnVectors[])(void) = +{ + (void (*)(void))((unsigned long)pulStack + sizeof(pulStack)), + // The initial stack pointer + ResetISR, // The reset handler + NmiSR, // The NMI handler + FaultISR, // The hard fault handler + IntDefaultHandler, // The MPU fault handler + IntDefaultHandler, // The bus fault handler + IntDefaultHandler, // The usage fault handler + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // SVCall handler + IntDefaultHandler, // Debug monitor handler + 0, // Reserved + IntDefaultHandler, // The PendSV handler + SysTickIntHandler, // The SysTick handler + IntDefaultHandler, // GPIO Port A + IntDefaultHandler, // GPIO Port B + IntDefaultHandler, // GPIO Port C + IntDefaultHandler, // GPIO Port D + IntDefaultHandler, // GPIO Port E + USBUARTIntHandler, // UART0 Rx and Tx + IntDefaultHandler, // UART1 Rx and Tx + IntDefaultHandler, // SSI0 Rx and Tx + IntDefaultHandler, // I2C0 Master and Slave + IntDefaultHandler, // PWM Fault + IntDefaultHandler, // PWM Generator 0 + IntDefaultHandler, // PWM Generator 1 + IntDefaultHandler, // PWM Generator 2 + IntDefaultHandler, // Quadrature Encoder 0 + IntDefaultHandler, // ADC Sequence 0 + IntDefaultHandler, // ADC Sequence 1 + IntDefaultHandler, // ADC Sequence 2 + IntDefaultHandler, // ADC Sequence 3 + IntDefaultHandler, // Watchdog timer + IntDefaultHandler, // Timer 0 subtimer A + IntDefaultHandler, // Timer 0 subtimer B + IntDefaultHandler, // Timer 1 subtimer A + IntDefaultHandler, // Timer 1 subtimer B + IntDefaultHandler, // Timer 2 subtimer A + IntDefaultHandler, // Timer 2 subtimer B + IntDefaultHandler, // Analog Comparator 0 + IntDefaultHandler, // Analog Comparator 1 + IntDefaultHandler, // Analog Comparator 2 + IntDefaultHandler, // System Control (PLL, OSC, BO) + IntDefaultHandler, // FLASH Control + IntDefaultHandler, // GPIO Port F + IntDefaultHandler, // GPIO Port G + IntDefaultHandler, // GPIO Port H + IntDefaultHandler, // UART2 Rx and Tx + IntDefaultHandler, // SSI1 Rx and Tx + IntDefaultHandler, // Timer 3 subtimer A + IntDefaultHandler, // Timer 3 subtimer B + IntDefaultHandler, // I2C1 Master and Slave + IntDefaultHandler, // Quadrature Encoder 1 + IntDefaultHandler, // CAN0 + IntDefaultHandler, // CAN1 + IntDefaultHandler, // CAN2 + IntDefaultHandler, // Ethernet + IntDefaultHandler, // Hibernate + USB0DeviceIntHandler, // USB0 + IntDefaultHandler, // PWM Generator 3 + IntDefaultHandler, // uDMA Software Transfer + IntDefaultHandler, // uDMA Error + IntDefaultHandler, // ADC1 Sequence 0 + IntDefaultHandler, // ADC1 Sequence 1 + IntDefaultHandler, // ADC1 Sequence 2 + IntDefaultHandler, // ADC1 Sequence 3 + IntDefaultHandler, // I2S0 + IntDefaultHandler, // External Bus Interface 0 + IntDefaultHandler, // GPIO Port J + IntDefaultHandler, // GPIO Port K + IntDefaultHandler, // GPIO Port L + IntDefaultHandler, // SSI2 Rx and Tx + IntDefaultHandler, // SSI3 Rx and Tx + IntDefaultHandler, // UART3 Rx and Tx + IntDefaultHandler, // UART4 Rx and Tx + IntDefaultHandler, // UART5 Rx and Tx + IntDefaultHandler, // UART6 Rx and Tx + IntDefaultHandler, // UART7 Rx and Tx + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // I2C2 Master and Slave + IntDefaultHandler, // I2C3 Master and Slave + IntDefaultHandler, // Timer 4 subtimer A + IntDefaultHandler, // Timer 4 subtimer B + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + IntDefaultHandler, // Timer 5 subtimer A + IntDefaultHandler, // Timer 5 subtimer B + IntDefaultHandler, // Wide Timer 0 subtimer A + IntDefaultHandler, // Wide Timer 0 subtimer B + IntDefaultHandler, // Wide Timer 1 subtimer A + IntDefaultHandler, // Wide Timer 1 subtimer B + IntDefaultHandler, // Wide Timer 2 subtimer A + IntDefaultHandler, // Wide Timer 2 subtimer B + IntDefaultHandler, // Wide Timer 3 subtimer A + IntDefaultHandler, // Wide Timer 3 subtimer B + IntDefaultHandler, // Wide Timer 4 subtimer A + IntDefaultHandler, // Wide Timer 4 subtimer B + IntDefaultHandler, // Wide Timer 5 subtimer A + IntDefaultHandler, // Wide Timer 5 subtimer B + IntDefaultHandler, // FPU + IntDefaultHandler, // PECI 0 + IntDefaultHandler, // LPC 0 + IntDefaultHandler, // I2C4 Master and Slave + IntDefaultHandler, // I2C5 Master and Slave + IntDefaultHandler, // GPIO Port M + IntDefaultHandler, // GPIO Port N + IntDefaultHandler, // Quadrature Encoder 2 + IntDefaultHandler, // Fan 0 + 0, // Reserved + IntDefaultHandler, // GPIO Port P (Summary or P0) + IntDefaultHandler, // GPIO Port P1 + IntDefaultHandler, // GPIO Port P2 + IntDefaultHandler, // GPIO Port P3 + IntDefaultHandler, // GPIO Port P4 + IntDefaultHandler, // GPIO Port P5 + IntDefaultHandler, // GPIO Port P6 + IntDefaultHandler, // GPIO Port P7 + IntDefaultHandler, // GPIO Port Q (Summary or Q0) + IntDefaultHandler, // GPIO Port Q1 + IntDefaultHandler, // GPIO Port Q2 + IntDefaultHandler, // GPIO Port Q3 + IntDefaultHandler, // GPIO Port Q4 + IntDefaultHandler, // GPIO Port Q5 + IntDefaultHandler, // GPIO Port Q6 + IntDefaultHandler, // GPIO Port Q7 + IntDefaultHandler, // GPIO Port R + IntDefaultHandler, // GPIO Port S + IntDefaultHandler, // PWM 1 Generator 0 + IntDefaultHandler, // PWM 1 Generator 1 + IntDefaultHandler, // PWM 1 Generator 2 + IntDefaultHandler, // PWM 1 Generator 3 + IntDefaultHandler // PWM 1 Fault +}; + +//***************************************************************************** +// +// The following are constructs created by the linker, indicating where the +// the "data" and "bss" segments reside in memory. The initializers for the +// for the "data" segment resides immediately following the "text" segment. +// +//***************************************************************************** +extern unsigned long _etext; +extern unsigned long _data; +extern unsigned long _edata; +extern unsigned long _bss; +extern unsigned long _ebss; + +//***************************************************************************** +// +// This is the code that gets called when the processor first starts execution +// following a reset event. Only the absolutely necessary set is performed, +// after which the application supplied entry() routine is called. Any fancy +// actions (such as making decisions based on the reset cause register, and +// resetting the bits in that register) are left solely in the hands of the +// application. +// +//***************************************************************************** +void +ResetISR(void) +{ + unsigned long *pulSrc, *pulDest; + + // + // Copy the data segment initializers from flash to SRAM. + // + pulSrc = &_etext; + for(pulDest = &_data; pulDest < &_edata; ) + { + *pulDest++ = *pulSrc++; + } + + // + // Zero fill the bss segment. + // + __asm(" ldr r0, =_bss\n" + " ldr r1, =_ebss\n" + " mov r2, #0\n" + " .thumb_func\n" + "zero_loop:\n" + " cmp r0, r1\n" + " it lt\n" + " strlt r2, [r0], #4\n" + " blt zero_loop"); + + // + // Enable the floating-point unit. This must be done here to handle the + // case where main() uses floating-point and the function prologue saves + // floating-point registers (which will fault if floating-point is not + // enabled). Any configuration of the floating-point unit using DriverLib + // APIs must be done here prior to the floating-point unit being enabled. + // + // Note that this does not use DriverLib since it might not be included in + // this project. + // + HWREG(NVIC_CPAC) = ((HWREG(NVIC_CPAC) & + ~(NVIC_CPAC_CP10_M | NVIC_CPAC_CP11_M)) | + NVIC_CPAC_CP10_FULL | NVIC_CPAC_CP11_FULL); + + // + // Call the application's entry point. + // + main(); +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a NMI. This +// simply enters an infinite loop, preserving the system state for examination +// by a debugger. +// +//***************************************************************************** +static void +NmiSR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a fault +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +FaultISR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives an unexpected +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +IntDefaultHandler(void) +{ + // + // Go into an infinite loop. + // + while(1) + { + } +} diff --git a/boards/ek-lm4f120xl/usb_dev_serial/startup_rvmdk.S b/boards/ek-lm4f120xl/usb_dev_serial/startup_rvmdk.S new file mode 100644 index 0000000..e0107de --- /dev/null +++ b/boards/ek-lm4f120xl/usb_dev_serial/startup_rvmdk.S @@ -0,0 +1,360 @@ +; <<< Use Configuration Wizard in Context Menu >>> +;****************************************************************************** +; +; startup_rvmdk.S - Startup code for use with Keil's uVision. +; +; Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +; Software License Agreement +; +; Texas Instruments (TI) is supplying this software for use solely and +; exclusively on TI's microcontroller products. The software is owned by +; TI and/or its suppliers, and is protected under applicable copyright +; laws. You may not combine this software with "viral" open-source +; software in order to form a larger program. +; +; THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +; NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +; NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +; A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +; CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +; DAMAGES, FOR ANY REASON WHATSOEVER. +; +; This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +; +;****************************************************************************** + +;****************************************************************************** +; +; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +; +;****************************************************************************** +Stack EQU 0x00000400 + +;****************************************************************************** +; +; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> +; +;****************************************************************************** +Heap EQU 0x00000000 + +;****************************************************************************** +; +; Allocate space for the stack. +; +;****************************************************************************** + AREA STACK, NOINIT, READWRITE, ALIGN=3 +StackMem + SPACE Stack +__initial_sp + +;****************************************************************************** +; +; Allocate space for the heap. +; +;****************************************************************************** + AREA HEAP, NOINIT, READWRITE, ALIGN=3 +__heap_base +HeapMem + SPACE Heap +__heap_limit + +;****************************************************************************** +; +; Indicate that the code in this file preserves 8-byte alignment of the stack. +; +;****************************************************************************** + PRESERVE8 + +;****************************************************************************** +; +; Place code into the reset code section. +; +;****************************************************************************** + AREA RESET, CODE, READONLY + THUMB + +;****************************************************************************** +; +; External declarations for the interrupt handlers used by the application. +; +;****************************************************************************** + EXTERN SysTickIntHandler + EXTERN USBUARTIntHandler + EXTERN USB0DeviceIntHandler + +;****************************************************************************** +; +; The vector table. +; +;****************************************************************************** + EXPORT __Vectors +__Vectors + DCD StackMem + Stack ; Top of Stack + DCD Reset_Handler ; Reset Handler + DCD NmiSR ; NMI Handler + DCD FaultISR ; Hard Fault Handler + DCD IntDefaultHandler ; The MPU fault handler + DCD IntDefaultHandler ; The bus fault handler + DCD IntDefaultHandler ; The usage fault handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD IntDefaultHandler ; SVCall handler + DCD IntDefaultHandler ; Debug monitor handler + DCD 0 ; Reserved + DCD IntDefaultHandler ; The PendSV handler + DCD SysTickIntHandler ; The SysTick handler + DCD IntDefaultHandler ; GPIO Port A + DCD IntDefaultHandler ; GPIO Port B + DCD IntDefaultHandler ; GPIO Port C + DCD IntDefaultHandler ; GPIO Port D + DCD IntDefaultHandler ; GPIO Port E + DCD USBUARTIntHandler ; UART0 Rx and Tx + DCD IntDefaultHandler ; UART1 Rx and Tx + DCD IntDefaultHandler ; SSI0 Rx and Tx + DCD IntDefaultHandler ; I2C0 Master and Slave + DCD IntDefaultHandler ; PWM Fault + DCD IntDefaultHandler ; PWM Generator 0 + DCD IntDefaultHandler ; PWM Generator 1 + DCD IntDefaultHandler ; PWM Generator 2 + DCD IntDefaultHandler ; Quadrature Encoder 0 + DCD IntDefaultHandler ; ADC Sequence 0 + DCD IntDefaultHandler ; ADC Sequence 1 + DCD IntDefaultHandler ; ADC Sequence 2 + DCD IntDefaultHandler ; ADC Sequence 3 + DCD IntDefaultHandler ; Watchdog timer + DCD IntDefaultHandler ; Timer 0 subtimer A + DCD IntDefaultHandler ; Timer 0 subtimer B + DCD IntDefaultHandler ; Timer 1 subtimer A + DCD IntDefaultHandler ; Timer 1 subtimer B + DCD IntDefaultHandler ; Timer 2 subtimer A + DCD IntDefaultHandler ; Timer 2 subtimer B + DCD IntDefaultHandler ; Analog Comparator 0 + DCD IntDefaultHandler ; Analog Comparator 1 + DCD IntDefaultHandler ; Analog Comparator 2 + DCD IntDefaultHandler ; System Control (PLL, OSC, BO) + DCD IntDefaultHandler ; FLASH Control + DCD IntDefaultHandler ; GPIO Port F + DCD IntDefaultHandler ; GPIO Port G + DCD IntDefaultHandler ; GPIO Port H + DCD IntDefaultHandler ; UART2 Rx and Tx + DCD IntDefaultHandler ; SSI1 Rx and Tx + DCD IntDefaultHandler ; Timer 3 subtimer A + DCD IntDefaultHandler ; Timer 3 subtimer B + DCD IntDefaultHandler ; I2C1 Master and Slave + DCD IntDefaultHandler ; Quadrature Encoder 1 + DCD IntDefaultHandler ; CAN0 + DCD IntDefaultHandler ; CAN1 + DCD IntDefaultHandler ; CAN2 + DCD IntDefaultHandler ; Ethernet + DCD IntDefaultHandler ; Hibernate + DCD USB0DeviceIntHandler ; USB0 + DCD IntDefaultHandler ; PWM Generator 3 + DCD IntDefaultHandler ; uDMA Software Transfer + DCD IntDefaultHandler ; uDMA Error + DCD IntDefaultHandler ; ADC1 Sequence 0 + DCD IntDefaultHandler ; ADC1 Sequence 1 + DCD IntDefaultHandler ; ADC1 Sequence 2 + DCD IntDefaultHandler ; ADC1 Sequence 3 + DCD IntDefaultHandler ; I2S0 + DCD IntDefaultHandler ; External Bus Interface 0 + DCD IntDefaultHandler ; GPIO Port J + DCD IntDefaultHandler ; GPIO Port K + DCD IntDefaultHandler ; GPIO Port L + DCD IntDefaultHandler ; SSI2 Rx and Tx + DCD IntDefaultHandler ; SSI3 Rx and Tx + DCD IntDefaultHandler ; UART3 Rx and Tx + DCD IntDefaultHandler ; UART4 Rx and Tx + DCD IntDefaultHandler ; UART5 Rx and Tx + DCD IntDefaultHandler ; UART6 Rx and Tx + DCD IntDefaultHandler ; UART7 Rx and Tx + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD IntDefaultHandler ; I2C2 Master and Slave + DCD IntDefaultHandler ; I2C3 Master and Slave + DCD IntDefaultHandler ; Timer 4 subtimer A + DCD IntDefaultHandler ; Timer 4 subtimer B + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD IntDefaultHandler ; Timer 5 subtimer A + DCD IntDefaultHandler ; Timer 5 subtimer B + DCD IntDefaultHandler ; Wide Timer 0 subtimer A + DCD IntDefaultHandler ; Wide Timer 0 subtimer B + DCD IntDefaultHandler ; Wide Timer 1 subtimer A + DCD IntDefaultHandler ; Wide Timer 1 subtimer B + DCD IntDefaultHandler ; Wide Timer 2 subtimer A + DCD IntDefaultHandler ; Wide Timer 2 subtimer B + DCD IntDefaultHandler ; Wide Timer 3 subtimer A + DCD IntDefaultHandler ; Wide Timer 3 subtimer B + DCD IntDefaultHandler ; Wide Timer 4 subtimer A + DCD IntDefaultHandler ; Wide Timer 4 subtimer B + DCD IntDefaultHandler ; Wide Timer 5 subtimer A + DCD IntDefaultHandler ; Wide Timer 5 subtimer B + DCD IntDefaultHandler ; FPU + DCD IntDefaultHandler ; PECI 0 + DCD IntDefaultHandler ; LPC 0 + DCD IntDefaultHandler ; I2C4 Master and Slave + DCD IntDefaultHandler ; I2C5 Master and Slave + DCD IntDefaultHandler ; GPIO Port M + DCD IntDefaultHandler ; GPIO Port N + DCD IntDefaultHandler ; Quadrature Encoder 2 + DCD IntDefaultHandler ; Fan 0 + DCD 0 ; Reserved + DCD IntDefaultHandler ; GPIO Port P (Summary or P0) + DCD IntDefaultHandler ; GPIO Port P1 + DCD IntDefaultHandler ; GPIO Port P2 + DCD IntDefaultHandler ; GPIO Port P3 + DCD IntDefaultHandler ; GPIO Port P4 + DCD IntDefaultHandler ; GPIO Port P5 + DCD IntDefaultHandler ; GPIO Port P6 + DCD IntDefaultHandler ; GPIO Port P7 + DCD IntDefaultHandler ; GPIO Port Q (Summary or Q0) + DCD IntDefaultHandler ; GPIO Port Q1 + DCD IntDefaultHandler ; GPIO Port Q2 + DCD IntDefaultHandler ; GPIO Port Q3 + DCD IntDefaultHandler ; GPIO Port Q4 + DCD IntDefaultHandler ; GPIO Port Q5 + DCD IntDefaultHandler ; GPIO Port Q6 + DCD IntDefaultHandler ; GPIO Port Q7 + DCD IntDefaultHandler ; GPIO Port R + DCD IntDefaultHandler ; GPIO Port S + DCD IntDefaultHandler ; PWM 1 Generator 0 + DCD IntDefaultHandler ; PWM 1 Generator 1 + DCD IntDefaultHandler ; PWM 1 Generator 2 + DCD IntDefaultHandler ; PWM 1 Generator 3 + DCD IntDefaultHandler ; PWM 1 Fault + +;****************************************************************************** +; +; This is the code that gets called when the processor first starts execution +; following a reset event. +; +;****************************************************************************** + EXPORT Reset_Handler +Reset_Handler + ; + ; Enable the floating-point unit. This must be done here to handle the + ; case where main() uses floating-point and the function prologue saves + ; floating-point registers (which will fault if floating-point is not + ; enabled). Any configuration of the floating-point unit using + ; DriverLib APIs must be done here prior to the floating-point unit + ; being enabled. + ; + ; Note that this does not use DriverLib since it might not be included + ; in this project. + ; + MOVW R0, #0xED88 + MOVT R0, #0xE000 + LDR R1, [R0] + ORR R1, #0x00F00000 + STR R1, [R0] + + ; + ; Call the C library enty point that handles startup. This will copy + ; the .data section initializers from flash to SRAM and zero fill the + ; .bss section. + ; + IMPORT __main + B __main + +;****************************************************************************** +; +; This is the code that gets called when the processor receives a NMI. This +; simply enters an infinite loop, preserving the system state for examination +; by a debugger. +; +;****************************************************************************** +NmiSR + B NmiSR + +;****************************************************************************** +; +; This is the code that gets called when the processor receives a fault +; interrupt. This simply enters an infinite loop, preserving the system state +; for examination by a debugger. +; +;****************************************************************************** +FaultISR + B FaultISR + +;****************************************************************************** +; +; This is the code that gets called when the processor receives an unexpected +; interrupt. This simply enters an infinite loop, preserving the system state +; for examination by a debugger. +; +;****************************************************************************** +IntDefaultHandler + B IntDefaultHandler + +;****************************************************************************** +; +; Make sure the end of this section is aligned. +; +;****************************************************************************** + ALIGN + +;****************************************************************************** +; +; Some code in the normal code section for initializing the heap and stack. +; +;****************************************************************************** + AREA |.text|, CODE, READONLY + +;****************************************************************************** +; +; The function expected of the C library startup code for defining the stack +; and heap memory locations. For the C library version of the startup code, +; provide this function so that the C library initialization code can find out +; the location of the stack and heap. +; +;****************************************************************************** + IF :DEF: __MICROLIB + EXPORT __initial_sp + EXPORT __heap_base + EXPORT __heap_limit + ELSE + IMPORT __use_two_region_memory + EXPORT __user_initial_stackheap +__user_initial_stackheap + LDR R0, =HeapMem + LDR R1, =(StackMem + Stack) + LDR R2, =(HeapMem + Heap) + LDR R3, =StackMem + BX LR + ENDIF + +;****************************************************************************** +; +; Make sure the end of this section is aligned. +; +;****************************************************************************** + ALIGN + +;****************************************************************************** +; +; Tell the assembler that we're done. +; +;****************************************************************************** + END diff --git a/boards/ek-lm4f120xl/usb_dev_serial/startup_sourcerygxx.S b/boards/ek-lm4f120xl/usb_dev_serial/startup_sourcerygxx.S new file mode 100644 index 0000000..b720839 --- /dev/null +++ b/boards/ek-lm4f120xl/usb_dev_serial/startup_sourcerygxx.S @@ -0,0 +1,75 @@ +//***************************************************************************** +// +// startup_sourcerygxx.S - Startup code for Sourcery CodeBench. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + + .syntax unified + .thumb + +//***************************************************************************** +// +// Place this code into the .cs3.reset section so that it can be executed prior +// to the startup code in Sourcery CodeBench. +// +//***************************************************************************** + .section .cs3.reset,"x" + +//***************************************************************************** +// +// The reset handler, which overrides the one provided by CS3. +// +//***************************************************************************** + .globl __cs3_reset + .thumb_func +__cs3_reset: + // + // Enable the floating-point unit. This must be done here to handle the + // case where main() uses floating-point and the function prologue saves + // floating-point registers (which will fault if floating-point is not + // enabled). Any configuration of the floating-point unit using DriverLib + // APIs must be done here prior to the floating-point unit being enabled. + // + // Note that this does not use DriverLib since it might not be included in + // this project. + // + movw r0, #0xed88 + movt r0, #0xe000 + ldr r1, [r0] + orr r1, #0x00f00000 + str r1, [r0] + + // + // Branch to the normal CS3 startup code. + // + .extern __cs3_reset_ekc_lm4f232 + ldr r0, =__cs3_reset_ekc_lm4f232 + bx r0 + + // + // Place the literal pool here. + // + .ltorg + + // + // The end of the file. + // + .end diff --git a/boards/ek-lm4f120xl/usb_dev_serial/usb_dev_serial.c b/boards/ek-lm4f120xl/usb_dev_serial/usb_dev_serial.c new file mode 100644 index 0000000..a8661a0 --- /dev/null +++ b/boards/ek-lm4f120xl/usb_dev_serial/usb_dev_serial.c @@ -0,0 +1,1223 @@ +//***************************************************************************** +// +// usb_dev_serial.c - Main routines for the USB CDC serial example. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +#include "inc/hw_ints.h" +#include "inc/hw_memmap.h" +#include "inc/hw_types.h" +#include "inc/hw_gpio.h" +#include "inc/hw_uart.h" +#include "inc/hw_sysctl.h" +#include "driverlib/debug.h" +#include "driverlib/fpu.h" +#include "driverlib/gpio.h" +#include "driverlib/pin_map.h" +#include "driverlib/interrupt.h" +#include "driverlib/sysctl.h" +#include "driverlib/systick.h" +#include "driverlib/timer.h" +#include "driverlib/uart.h" +#include "driverlib/usb.h" +#include "driverlib/rom.h" +#include "usblib/usblib.h" +#include "usblib/usbcdc.h" +#include "usblib/usb-ids.h" +#include "usblib/device/usbdevice.h" +#include "usblib/device/usbdcdc.h" +#include "utils/ustdlib.h" +#include "usb_serial_structs.h" +#include "utils/uartstdio.h" + +//***************************************************************************** +// +//! \addtogroup example_list +//!

USB Serial Device (usb_dev_serial)

+//! +//! This example application turns the evaluation kit into a virtual serial +//! port when connected to the USB host system. The application supports the +//! USB Communication Device Class, Abstract Control Model to redirect UART0 +//! traffic to and from the USB host system. +//! +//! Assuming you installed StellarisWare in the default directory, a +//! driver information (INF) file for use with Windows XP, Windows Vista and +//! Windows7 can be found in C:/StellarisWare/windows_drivers. For Windows +//! 2000, the required INF file is in C:/StellarisWare/windows_drivers/win2K. +// +//***************************************************************************** + +//***************************************************************************** +// +// Note: +// +// This example is intended to run on Stellaris evaluation kit hardware +// where the UARTs are wired solely for TX and RX, and do not have GPIOs +// connected to act as handshake signals. As a result, this example mimics +// the case where communication is always possible. It reports DSR, DCD +// and CTS as high to ensure that the USB host recognizes that data can be +// sent and merely ignores the host's requested DTR and RTS states. "TODO" +// comments in the code indicate where code would be required to add support +// for real handshakes. +// +//***************************************************************************** + +//***************************************************************************** +// +// Configuration and tuning parameters. +// +//***************************************************************************** + +//***************************************************************************** +// +// The system tick rate expressed both as ticks per second and a millisecond +// period. +// +//***************************************************************************** +#define SYSTICKS_PER_SECOND 100 +#define SYSTICK_PERIOD_MS (1000 / SYSTICKS_PER_SECOND) + +//***************************************************************************** +// +// Variables tracking transmit and receive counts. +// +//***************************************************************************** +volatile unsigned long g_ulUARTTxCount = 0; +volatile unsigned long g_ulUARTRxCount = 0; +#ifdef DEBUG +unsigned long g_ulUARTRxErrors = 0; +#endif + +//***************************************************************************** +// +// The base address, peripheral ID and interrupt ID of the UART that is to +// be redirected. +// +//***************************************************************************** + +//***************************************************************************** +// +// Defines required to redirect UART0 via USB. +// +//***************************************************************************** +#define USB_UART_BASE UART0_BASE +#define USB_UART_PERIPH SYSCTL_PERIPH_UART0 +#define USB_UART_INT INT_UART0 + +//***************************************************************************** +// +// Default line coding settings for the redirected UART. +// +//***************************************************************************** +#define DEFAULT_BIT_RATE 115200 +#define DEFAULT_UART_CONFIG (UART_CONFIG_WLEN_8 | UART_CONFIG_PAR_NONE | \ + UART_CONFIG_STOP_ONE) + +//***************************************************************************** +// +// GPIO peripherals and pins muxed with the redirected UART. These will depend +// upon the IC in use and the UART selected in USB_UART_BASE. Be careful that +// these settings all agree with the hardware you are using. +// +//***************************************************************************** + +//***************************************************************************** +// +// Defines required to redirect UART0 via USB. +// +//***************************************************************************** +#define TX_GPIO_BASE GPIO_PORTA_BASE +#define TX_GPIO_PERIPH SYSCTL_PERIPH_GPIOA +#define TX_GPIO_PIN GPIO_PIN_1 + +#define RX_GPIO_BASE GPIO_PORTA_BASE +#define RX_GPIO_PERIPH SYSCTL_PERIPH_GPIOA +#define RX_GPIO_PIN GPIO_PIN_0 + +//***************************************************************************** +// +// Flag indicating whether or not we are currently sending a Break condition. +// +//***************************************************************************** +static tBoolean g_bSendingBreak = false; + +//***************************************************************************** +// +// Global system tick counter +// +//***************************************************************************** +volatile unsigned long g_ulSysTickCount = 0; + +//***************************************************************************** +// +// Flags used to pass commands from interrupt context to the main loop. +// +//***************************************************************************** +#define COMMAND_PACKET_RECEIVED 0x00000001 +#define COMMAND_STATUS_UPDATE 0x00000002 + +volatile unsigned long g_ulFlags = 0; +char *g_pcStatus; + +//***************************************************************************** +// +// Global flag indicating that a USB configuration has been set. +// +//***************************************************************************** +static volatile tBoolean g_bUSBConfigured = false; + +//***************************************************************************** +// +// Internal function prototypes. +// +//***************************************************************************** +static void USBUARTPrimeTransmit(unsigned long ulBase); +static void CheckForSerialStateChange(const tUSBDCDCDevice *psDevice, long lErrors); +static void SetControlLineState(unsigned short usState); +static tBoolean SetLineCoding(tLineCoding *psLineCoding); +static void GetLineCoding(tLineCoding *psLineCoding); +static void SendBreak(tBoolean bSend); + +//***************************************************************************** +// +// The error routine that is called if the driver library encounters an error. +// +//***************************************************************************** +#ifdef DEBUG +void +__error__(char *pcFilename, unsigned long ulLine) +{ + while(1) + { + } +} +#endif + +//***************************************************************************** +// +// This function is called whenever serial data is received from the UART. +// It is passed the accumulated error flags from each character received in +// this interrupt and determines from them whether or not an interrupt +// notification to the host is required. +// +// If a notification is required and the control interrupt endpoint is idle, +// we send the notification immediately. If the endpoint is not idle, we +// accumulate the errors in a global variable which will be checked on +// completion of the previous notification and used to send a second one +// if necessary. +// +//***************************************************************************** +static void +CheckForSerialStateChange(const tUSBDCDCDevice *psDevice, long lErrors) +{ + unsigned short usSerialState; + + // + // Clear our USB serial state. Since we are faking the handshakes, always + // set the TXCARRIER (DSR) and RXCARRIER (DCD) bits. + // + usSerialState = USB_CDC_SERIAL_STATE_TXCARRIER | + USB_CDC_SERIAL_STATE_RXCARRIER; + + // + // Are any error bits set? + // + if(lErrors) + { + // + // At least one error is being notified so translate from our hardware + // error bits into the correct state markers for the USB notification. + // + if(lErrors & UART_DR_OE) + { + usSerialState |= USB_CDC_SERIAL_STATE_OVERRUN; + } + + if(lErrors & UART_DR_PE) + { + usSerialState |= USB_CDC_SERIAL_STATE_PARITY; + } + + if(lErrors & UART_DR_FE) + { + usSerialState |= USB_CDC_SERIAL_STATE_FRAMING; + } + + if(lErrors & UART_DR_BE) + { + usSerialState |= USB_CDC_SERIAL_STATE_BREAK; + } + + // Call the CDC driver to notify the state change. + USBDCDCSerialStateChange((void *)psDevice, usSerialState); + } +} + +//***************************************************************************** +// +// Read as many characters from the UART FIFO as we can and move them into +// the CDC transmit buffer. +// +// \return Returns UART error flags read during data reception. +// +//***************************************************************************** +static long +ReadUARTData(void) +{ + long lChar, lErrors; + unsigned char ucChar; + unsigned long ulSpace; + + // + // Clear our error indicator. + // + lErrors = 0; + + // + // How much space do we have in the buffer? + // + ulSpace = USBBufferSpaceAvailable((tUSBBuffer *)&g_sTxBuffer); + + // + // Read data from the UART FIFO until there is none left or we run + // out of space in our receive buffer. + // + while(ulSpace && ROM_UARTCharsAvail(USB_UART_BASE)) + { + // + // Read a character from the UART FIFO into the ring buffer if no + // errors are reported. + // + lChar = ROM_UARTCharGetNonBlocking(USB_UART_BASE); + + // + // If the character did not contain any error notifications, + // copy it to the output buffer. + // + if(!(lChar & ~0xFF)) + { + ucChar = (unsigned char)(lChar & 0xFF); + USBBufferWrite((tUSBBuffer *)&g_sTxBuffer, + (unsigned char *)&ucChar, 1); + + // + // Decrement the number of bytes we know the buffer can accept. + // + ulSpace--; + } + else + { +#ifdef DEBUG + // + // Increment our receive error counter. + // + g_ulUARTRxErrors++; +#endif + // + // Update our error accumulator. + // + lErrors |= lChar; + } + + // + // Update our count of bytes received via the UART. + // + g_ulUARTRxCount++; + } + + // + // Pass back the accumulated error indicators. + // + return(lErrors); +} + +//***************************************************************************** +// +// Take as many bytes from the transmit buffer as we have space for and move +// them into the USB UART's transmit FIFO. +// +//***************************************************************************** +static void +USBUARTPrimeTransmit(unsigned long ulBase) +{ + unsigned long ulRead; + unsigned char ucChar; + + // + // If we are currently sending a break condition, don't receive any + // more data. We will resume transmission once the break is turned off. + // + if(g_bSendingBreak) + { + return; + } + + // + // If there is space in the UART FIFO, try to read some characters + // from the receive buffer to fill it again. + // + while(ROM_UARTSpaceAvail(ulBase)) + { + // + // Get a character from the buffer. + // + ulRead = USBBufferRead((tUSBBuffer *)&g_sRxBuffer, &ucChar, 1); + + // + // Did we get a character? + // + if(ulRead) + { + // + // Place the character in the UART transmit FIFO. + // + ROM_UARTCharPutNonBlocking(ulBase, ucChar); + + // + // Update our count of bytes transmitted via the UART. + // + g_ulUARTTxCount++; + } + else + { + // + // We ran out of characters so exit the function. + // + return; + } + } +} + +//***************************************************************************** +// +// Interrupt handler for the system tick counter. +// +//***************************************************************************** +void +SysTickIntHandler(void) +{ + // + // Update our system time. + // + g_ulSysTickCount++; +} + +//***************************************************************************** +// +// Interrupt handler for the UART which we are redirecting via USB. +// +//***************************************************************************** +void +USBUARTIntHandler(void) +{ + unsigned long ulInts; + long lErrors; + + // + // Get and clear the current interrupt source(s) + // + ulInts = ROM_UARTIntStatus(USB_UART_BASE, true); + ROM_UARTIntClear(USB_UART_BASE, ulInts); + + // + // Are we being interrupted because the TX FIFO has space available? + // + if(ulInts & UART_INT_TX) + { + // + // Move as many bytes as we can into the transmit FIFO. + // + USBUARTPrimeTransmit(USB_UART_BASE); + + // + // If the output buffer is empty, turn off the transmit interrupt. + // + if(!USBBufferDataAvailable(&g_sRxBuffer)) + { + ROM_UARTIntDisable(USB_UART_BASE, UART_INT_TX); + } + } + + // + // Handle receive interrupts. + // + if(ulInts & (UART_INT_RX | UART_INT_RT)) + { + // + // Read the UART's characters into the buffer. + // + lErrors = ReadUARTData(); + + // + // Check to see if we need to notify the host of any errors we just + // detected. + // + CheckForSerialStateChange(&g_sCDCDevice, lErrors); + } +} + +//***************************************************************************** +// +// Set the state of the RS232 RTS and DTR signals. +// +//***************************************************************************** +static void +SetControlLineState(unsigned short usState) +{ + // + // TODO: If configured with GPIOs controlling the handshake lines, + // set them appropriately depending upon the flags passed in the wValue + // field of the request structure passed. + // +} + +//***************************************************************************** +// +// Set the communication parameters to use on the UART. +// +//***************************************************************************** +static tBoolean +SetLineCoding(tLineCoding *psLineCoding) +{ + unsigned long ulConfig; + tBoolean bRetcode; + + // + // Assume everything is OK until we detect any problem. + // + bRetcode = true; + + // + // Word length. For invalid values, the default is to set 8 bits per + // character and return an error. + // + switch(psLineCoding->ucDatabits) + { + case 5: + { + ulConfig = UART_CONFIG_WLEN_5; + break; + } + + case 6: + { + ulConfig = UART_CONFIG_WLEN_6; + break; + } + + case 7: + { + ulConfig = UART_CONFIG_WLEN_7; + break; + } + + case 8: + { + ulConfig = UART_CONFIG_WLEN_8; + break; + } + + default: + { + ulConfig = UART_CONFIG_WLEN_8; + bRetcode = false; + break; + } + } + + // + // Parity. For any invalid values, we set no parity and return an error. + // + switch(psLineCoding->ucParity) + { + case USB_CDC_PARITY_NONE: + { + ulConfig |= UART_CONFIG_PAR_NONE; + break; + } + + case USB_CDC_PARITY_ODD: + { + ulConfig |= UART_CONFIG_PAR_ODD; + break; + } + + case USB_CDC_PARITY_EVEN: + { + ulConfig |= UART_CONFIG_PAR_EVEN; + break; + } + + case USB_CDC_PARITY_MARK: + { + ulConfig |= UART_CONFIG_PAR_ONE; + break; + } + + case USB_CDC_PARITY_SPACE: + { + ulConfig |= UART_CONFIG_PAR_ZERO; + break; + } + + default: + { + ulConfig |= UART_CONFIG_PAR_NONE; + bRetcode = false; + break; + } + } + + // + // Stop bits. Our hardware only supports 1 or 2 stop bits whereas CDC + // allows the host to select 1.5 stop bits. If passed 1.5 (or any other + // invalid or unsupported value of ucStop, we set up for 1 stop bit but + // return an error in case the caller needs to Stall or otherwise report + // this back to the host. + // + switch(psLineCoding->ucStop) + { + // + // One stop bit requested. + // + case USB_CDC_STOP_BITS_1: + { + ulConfig |= UART_CONFIG_STOP_ONE; + break; + } + + // + // Two stop bits requested. + // + case USB_CDC_STOP_BITS_2: + { + ulConfig |= UART_CONFIG_STOP_TWO; + break; + } + + // + // Other cases are either invalid values of ucStop or values that we + // cannot support so set 1 stop bit but return an error. + // + default: + { + ulConfig = UART_CONFIG_STOP_ONE; + bRetcode |= false; + break; + } + } + + // + // Set the UART mode appropriately. + // + ROM_UARTConfigSetExpClk(USB_UART_BASE, ROM_SysCtlClockGet(), + psLineCoding->ulRate, ulConfig); + + // + // Let the caller know if we had a problem or not. + // + return(bRetcode); +} + +//***************************************************************************** +// +// Get the communication parameters in use on the UART. +// +//***************************************************************************** +static void +GetLineCoding(tLineCoding *psLineCoding) +{ + unsigned long ulConfig; + unsigned long ulRate; + + // + // Get the current line coding set in the UART. + // + ROM_UARTConfigGetExpClk(USB_UART_BASE, ROM_SysCtlClockGet(), &ulRate, + &ulConfig); + psLineCoding->ulRate = ulRate; + + // + // Translate the configuration word length field into the format expected + // by the host. + // + switch(ulConfig & UART_CONFIG_WLEN_MASK) + { + case UART_CONFIG_WLEN_8: + { + psLineCoding->ucDatabits = 8; + break; + } + + case UART_CONFIG_WLEN_7: + { + psLineCoding->ucDatabits = 7; + break; + } + + case UART_CONFIG_WLEN_6: + { + psLineCoding->ucDatabits = 6; + break; + } + + case UART_CONFIG_WLEN_5: + { + psLineCoding->ucDatabits = 5; + break; + } + } + + // + // Translate the configuration parity field into the format expected + // by the host. + // + switch(ulConfig & UART_CONFIG_PAR_MASK) + { + case UART_CONFIG_PAR_NONE: + { + psLineCoding->ucParity = USB_CDC_PARITY_NONE; + break; + } + + case UART_CONFIG_PAR_ODD: + { + psLineCoding->ucParity = USB_CDC_PARITY_ODD; + break; + } + + case UART_CONFIG_PAR_EVEN: + { + psLineCoding->ucParity = USB_CDC_PARITY_EVEN; + break; + } + + case UART_CONFIG_PAR_ONE: + { + psLineCoding->ucParity = USB_CDC_PARITY_MARK; + break; + } + + case UART_CONFIG_PAR_ZERO: + { + psLineCoding->ucParity = USB_CDC_PARITY_SPACE; + break; + } + } + + // + // Translate the configuration stop bits field into the format expected + // by the host. + // + switch(ulConfig & UART_CONFIG_STOP_MASK) + { + case UART_CONFIG_STOP_ONE: + { + psLineCoding->ucStop = USB_CDC_STOP_BITS_1; + break; + } + + case UART_CONFIG_STOP_TWO: + { + psLineCoding->ucStop = USB_CDC_STOP_BITS_2; + break; + } + } +} + +//***************************************************************************** +// +// This function sets or clears a break condition on the redirected UART RX +// line. A break is started when the function is called with \e bSend set to +// \b true and persists until the function is called again with \e bSend set +// to \b false. +// +//***************************************************************************** +static void +SendBreak(tBoolean bSend) +{ + // + // Are we being asked to start or stop the break condition? + // + if(!bSend) + { + // + // Remove the break condition on the line. + // + ROM_UARTBreakCtl(USB_UART_BASE, false); + g_bSendingBreak = false; + } + else + { + // + // Start sending a break condition on the line. + // + ROM_UARTBreakCtl(USB_UART_BASE, true); + g_bSendingBreak = true; + } +} + +//***************************************************************************** +// +// Handles CDC driver notifications related to control and setup of the device. +// +// \param pvCBData is the client-supplied callback pointer for this channel. +// \param ulEvent identifies the event we are being notified about. +// \param ulMsgValue is an event-specific value. +// \param pvMsgData is an event-specific pointer. +// +// This function is called by the CDC driver to perform control-related +// operations on behalf of the USB host. These functions include setting +// and querying the serial communication parameters, setting handshake line +// states and sending break conditions. +// +// \return The return value is event-specific. +// +//***************************************************************************** +unsigned long +ControlHandler(void *pvCBData, unsigned long ulEvent, + unsigned long ulMsgValue, void *pvMsgData) +{ + unsigned long ulIntsOff; + + // + // Which event are we being asked to process? + // + switch(ulEvent) + { + // + // We are connected to a host and communication is now possible. + // + case USB_EVENT_CONNECTED: + g_bUSBConfigured = true; + + // + // Flush our buffers. + // + USBBufferFlush(&g_sTxBuffer); + USBBufferFlush(&g_sRxBuffer); + + // + // Tell the main loop to update the display. + // + ulIntsOff = ROM_IntMasterDisable(); + g_pcStatus = "Connected"; + g_ulFlags |= COMMAND_STATUS_UPDATE; + if(!ulIntsOff) + { + ROM_IntMasterEnable(); + } + break; + + // + // The host has disconnected. + // + case USB_EVENT_DISCONNECTED: + g_bUSBConfigured = false; + ulIntsOff = ROM_IntMasterDisable(); + g_pcStatus = "Disconnected"; + g_ulFlags |= COMMAND_STATUS_UPDATE; + if(!ulIntsOff) + { + ROM_IntMasterEnable(); + } + break; + + // + // Return the current serial communication parameters. + // + case USBD_CDC_EVENT_GET_LINE_CODING: + GetLineCoding(pvMsgData); + break; + + // + // Set the current serial communication parameters. + // + case USBD_CDC_EVENT_SET_LINE_CODING: + SetLineCoding(pvMsgData); + break; + + // + // Set the current serial communication parameters. + // + case USBD_CDC_EVENT_SET_CONTROL_LINE_STATE: + SetControlLineState((unsigned short)ulMsgValue); + break; + + // + // Send a break condition on the serial line. + // + case USBD_CDC_EVENT_SEND_BREAK: + SendBreak(true); + break; + + // + // Clear the break condition on the serial line. + // + case USBD_CDC_EVENT_CLEAR_BREAK: + SendBreak(false); + break; + + // + // Ignore SUSPEND and RESUME for now. + // + case USB_EVENT_SUSPEND: + case USB_EVENT_RESUME: + break; + + // + // We don't expect to receive any other events. Ignore any that show + // up in a release build or hang in a debug build. + // + default: +#ifdef DEBUG + while(1); +#else + break; +#endif + + } + + return(0); +} + +//***************************************************************************** +// +// Handles CDC driver notifications related to the transmit channel (data to +// the USB host). +// +// \param ulCBData is the client-supplied callback pointer for this channel. +// \param ulEvent identifies the event we are being notified about. +// \param ulMsgValue is an event-specific value. +// \param pvMsgData is an event-specific pointer. +// +// This function is called by the CDC driver to notify us of any events +// related to operation of the transmit data channel (the IN channel carrying +// data to the USB host). +// +// \return The return value is event-specific. +// +//***************************************************************************** +unsigned long +TxHandler(void *pvCBData, unsigned long ulEvent, unsigned long ulMsgValue, + void *pvMsgData) +{ + // + // Which event have we been sent? + // + switch(ulEvent) + { + case USB_EVENT_TX_COMPLETE: + // + // Since we are using the USBBuffer, we don't need to do anything + // here. + // + break; + + // + // We don't expect to receive any other events. Ignore any that show + // up in a release build or hang in a debug build. + // + default: +#ifdef DEBUG + while(1); +#else + break; +#endif + + } + return(0); +} + +//***************************************************************************** +// +// Handles CDC driver notifications related to the receive channel (data from +// the USB host). +// +// \param ulCBData is the client-supplied callback data value for this channel. +// \param ulEvent identifies the event we are being notified about. +// \param ulMsgValue is an event-specific value. +// \param pvMsgData is an event-specific pointer. +// +// This function is called by the CDC driver to notify us of any events +// related to operation of the receive data channel (the OUT channel carrying +// data from the USB host). +// +// \return The return value is event-specific. +// +//***************************************************************************** +unsigned long +RxHandler(void *pvCBData, unsigned long ulEvent, unsigned long ulMsgValue, + void *pvMsgData) +{ + unsigned long ulCount; + + // + // Which event are we being sent? + // + switch(ulEvent) + { + // + // A new packet has been received. + // + case USB_EVENT_RX_AVAILABLE: + { + // + // Feed some characters into the UART TX FIFO and enable the + // interrupt so we are told when there is more space. + // + USBUARTPrimeTransmit(USB_UART_BASE); + ROM_UARTIntEnable(USB_UART_BASE, UART_INT_TX); + break; + } + + // + // We are being asked how much unprocessed data we have still to + // process. We return 0 if the UART is currently idle or 1 if it is + // in the process of transmitting something. The actual number of + // bytes in the UART FIFO is not important here, merely whether or + // not everything previously sent to us has been transmitted. + // + case USB_EVENT_DATA_REMAINING: + { + // + // Get the number of bytes in the buffer and add 1 if some data + // still has to clear the transmitter. + // + ulCount = ROM_UARTBusy(USB_UART_BASE) ? 1 : 0; + return(ulCount); + } + + // + // We are being asked to provide a buffer into which the next packet + // can be read. We do not support this mode of receiving data so let + // the driver know by returning 0. The CDC driver should not be sending + // this message but this is included just for illustration and + // completeness. + // + case USB_EVENT_REQUEST_BUFFER: + { + return(0); + } + + // + // We don't expect to receive any other events. Ignore any that show + // up in a release build or hang in a debug build. + // + default: +#ifdef DEBUG + while(1); +#else + break; +#endif + } + + return(0); +} + +//***************************************************************************** +// +// This is the main application entry function. +// +//***************************************************************************** +int +main(void) +{ + unsigned long ulTxCount; + unsigned long ulRxCount; + unsigned long ulLoop; + + // + // Enable lazy stacking for interrupt handlers. This allows floating-point + // instructions to be used within interrupt handlers, but at the expense of + // extra stack usage. + // + ROM_FPULazyStackingEnable(); + + // + // Set the clocking to run from the PLL at 50MHz + // + ROM_SysCtlClockSet(SYSCTL_SYSDIV_4 | SYSCTL_USE_PLL | SYSCTL_OSC_MAIN | + SYSCTL_XTAL_16MHZ); + + // + // Configure the required pins for USB operation. + // + ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOD); + ROM_GPIOPinTypeUSBAnalog(GPIO_PORTD_BASE, GPIO_PIN_5 | GPIO_PIN_4); + + // + // Enable the GPIO port that is used for the on-board LED. + // + ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOF); + + // + // Enable the GPIO pins for the LED (PF2 & PF3). + // + ROM_GPIOPinTypeGPIOOutput(GPIO_PORTF_BASE, GPIO_PIN_3|GPIO_PIN_2); + + // + // Not configured initially. + // + g_bUSBConfigured = false; + + // + // Enable the UART that we will be redirecting. + // + ROM_SysCtlPeripheralEnable(USB_UART_PERIPH); + + // + // Enable and configure the UART RX and TX pins + // + ROM_SysCtlPeripheralEnable(TX_GPIO_PERIPH); + ROM_SysCtlPeripheralEnable(RX_GPIO_PERIPH); + ROM_GPIOPinTypeUART(TX_GPIO_BASE, TX_GPIO_PIN); + ROM_GPIOPinTypeUART(RX_GPIO_BASE, RX_GPIO_PIN); + + // + // TODO: Add code to configure handshake GPIOs if required. + // + + // + // Set the default UART configuration. + // + ROM_UARTConfigSetExpClk(USB_UART_BASE, ROM_SysCtlClockGet(), + DEFAULT_BIT_RATE, DEFAULT_UART_CONFIG); + ROM_UARTFIFOLevelSet(USB_UART_BASE, UART_FIFO_TX4_8, UART_FIFO_RX4_8); + + // + // Configure and enable UART interrupts. + // + ROM_UARTIntClear(USB_UART_BASE, ROM_UARTIntStatus(USB_UART_BASE, false)); + ROM_UARTIntEnable(USB_UART_BASE, (UART_INT_OE | UART_INT_BE | UART_INT_PE | + UART_INT_FE | UART_INT_RT | UART_INT_TX | UART_INT_RX)); + + // + // Enable the system tick. + // + ROM_SysTickPeriodSet(ROM_SysCtlClockGet() / SYSTICKS_PER_SECOND); + ROM_SysTickIntEnable(); + ROM_SysTickEnable(); + + // + // Initialize the transmit and receive buffers. + // + USBBufferInit((tUSBBuffer *)&g_sTxBuffer); + USBBufferInit((tUSBBuffer *)&g_sRxBuffer); + + // + // Set the USB stack mode to Device mode with VBUS monitoring. + // + USBStackModeSet(0, USB_MODE_DEVICE, 0); + + // + // Pass our device information to the USB library and place the device + // on the bus. + // + USBDCDCInit(0, (tUSBDCDCDevice *)&g_sCDCDevice); + + // + // Clear our local byte counters. + // + ulRxCount = 0; + ulTxCount = 0; + + // + // Enable interrupts now that the application is ready to start. + // + ROM_IntEnable(USB_UART_INT); + + // + // Main application loop. + // + while(1) + { + // + // Have we been asked to update the status display? + // + if(g_ulFlags & COMMAND_STATUS_UPDATE) + { + // + // Clear the command flag + // + ROM_IntMasterDisable(); + g_ulFlags &= ~COMMAND_STATUS_UPDATE; + ROM_IntMasterEnable(); + } + + // + // Has there been any transmit traffic since we last checked? + // + if(ulTxCount != g_ulUARTTxCount) + { + // + // Turn on the Green LED. + // + GPIOPinWrite(GPIO_PORTF_BASE, GPIO_PIN_3, GPIO_PIN_3); + + // + // Delay for a bit. + // + for(ulLoop = 0; ulLoop < 150000; ulLoop++) + { + } + + // + // Turn off the Green LED. + // + GPIOPinWrite(GPIO_PORTF_BASE, GPIO_PIN_3, 0); + + // + // Take a snapshot of the latest transmit count. + // + ulTxCount = g_ulUARTTxCount; + } + + // + // Has there been any receive traffic since we last checked? + // + if(ulRxCount != g_ulUARTRxCount) + { + // + // Turn on the Blue LED. + // + GPIOPinWrite(GPIO_PORTF_BASE, GPIO_PIN_2, GPIO_PIN_2); + + // + // Delay for a bit. + // + for(ulLoop = 0; ulLoop < 150000; ulLoop++) + { + } + + // + // Turn off the Blue LED. + // + GPIOPinWrite(GPIO_PORTF_BASE, GPIO_PIN_2, 0); + + // + // Take a snapshot of the latest receive count. + // + ulRxCount = g_ulUARTRxCount; + + } + } +} diff --git a/boards/ek-lm4f120xl/usb_dev_serial/usb_dev_serial.ewd b/boards/ek-lm4f120xl/usb_dev_serial/usb_dev_serial.ewd new file mode 100644 index 0000000..b8eeac7 --- /dev/null +++ b/boards/ek-lm4f120xl/usb_dev_serial/usb_dev_serial.ewd @@ -0,0 +1,614 @@ + + + + 1 + + Debug + + ARM + + 1 + + C-SPY + 2 + + 15 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + ARMSIM_ID + 2 + + 1 + 1 + 1 + + + + + + + + ANGEL_ID + 2 + + 0 + 1 + 1 + + + + + + + + + + + + GDBSERVER_ID + 2 + + 0 + 1 + 1 + + + + + + + + + + + IARROM_ID + 2 + + 0 + 1 + 1 + + + + + + + + + + JLINK_ID + 2 + + 9 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + LMIFTDI_ID + 2 + + 1 + 1 + 1 + + + + + + + + MACRAIGOR_ID + 2 + + 2 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + RDI_ID + 2 + + 1 + 1 + 1 + + + + + + + + + + + + + + + + + THIRDPARTY_ID + 2 + + 0 + 1 + 1 + + + + + + + + + $TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\OSE\OseEpsilonPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\PowerPac\PowerPacRTOS.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin + 0 + + + $EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin + 1 + + + $EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin + 0 + + + $EW_DIR$\common\plugins\Profiling\Profiling.ENU.ewplugin + 1 + + + $EW_DIR$\common\plugins\Stack\Stack.ENU.ewplugin + 1 + + + + diff --git a/boards/ek-lm4f120xl/usb_dev_serial/usb_dev_serial.ewp b/boards/ek-lm4f120xl/usb_dev_serial/usb_dev_serial.ewp new file mode 100644 index 0000000..d4ccbb7 --- /dev/null +++ b/boards/ek-lm4f120xl/usb_dev_serial/usb_dev_serial.ewp @@ -0,0 +1,799 @@ + + + + 1 + + Debug + + ARM + + 1 + + General + 3 + + 14 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCARM + 2 + + 19 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AARM + 2 + + 7 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + OBJCOPY + 0 + + 1 + 1 + 1 + + + + + + + + + CUSTOM + 3 + + + + + + + BICOMP + 0 + + + + BUILDACTION + 1 + + + + + + + ILINK + 0 + + 5 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + IARCHIVE + 0 + + 0 + 1 + 1 + + + + + + + BILINK + 0 + + + + + Libraries + + $PROJ_DIR$\..\..\..\driverlib\ewarm-cm4f\Exe\driverlib-cm4f.a + + + $PROJ_DIR$\..\..\..\usblib\ewarm-cm4f\Exe\usblib-cm4f.a + + + + Source + + $PROJ_DIR$\startup_ewarm.c + + + $PROJ_DIR$\..\..\..\utils\uartstdio.c + + + $PROJ_DIR$\usb_dev_serial.c + + + $PROJ_DIR$\usb_serial_structs.c + + + $PROJ_DIR$\..\..\..\utils\ustdlib.c + + + diff --git a/boards/ek-lm4f120xl/usb_dev_serial/usb_dev_serial.icf b/boards/ek-lm4f120xl/usb_dev_serial/usb_dev_serial.icf new file mode 100644 index 0000000..83bd951 --- /dev/null +++ b/boards/ek-lm4f120xl/usb_dev_serial/usb_dev_serial.icf @@ -0,0 +1,78 @@ +//***************************************************************************** +// +// usb_dev_serial.icf - Linker configuration file for usb_dev_serial. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +// +// Define a memory region that covers the entire 4 GB addressible space of the +// processor. +// +define memory mem with size = 4G; + +// +// Define a region for the on-chip flash. +// +define region FLASH = mem:[from 0x00000000 to 0x0003ffff]; + +// +// Define a region for the on-chip SRAM. +// +define region SRAM = mem:[from 0x20000000 to 0x20007fff]; + +// +// Define a block for the heap. The size should be set to something other +// than zero if things in the C library that require the heap are used. +// +define block HEAP with alignment = 8, size = 0x00000000 { }; + +// +// Indicate that the read/write values should be initialized by copying from +// flash. +// +initialize by copy { readwrite }; + +// +// Indicate that the noinit values should be left alone. This includes the +// stack, which if initialized will destroy the return address from the +// initialization code, causing the processor to branch to zero and fault. +// +do not initialize { section .noinit }; + +// +// Place the interrupt vectors at the start of flash. +// +place at start of FLASH { readonly section .intvec }; + +// +// Place the remainder of the read-only items into flash. +// +place in FLASH { readonly }; + +// +// Place the RAM vector table at the start of SRAM. +// +place at start of SRAM { section VTABLE }; + +// +// Place all read/write items into SRAM. +// +place in SRAM { readwrite, block HEAP }; diff --git a/boards/ek-lm4f120xl/usb_dev_serial/usb_dev_serial.ld b/boards/ek-lm4f120xl/usb_dev_serial/usb_dev_serial.ld new file mode 100644 index 0000000..aec2785 --- /dev/null +++ b/boards/ek-lm4f120xl/usb_dev_serial/usb_dev_serial.ld @@ -0,0 +1,57 @@ +/****************************************************************************** + * + * usb_dev_serial.ld - Linker configuration file for usb_dev_serial. + * + * Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. + * Software License Agreement + * + * Texas Instruments (TI) is supplying this software for use solely and + * exclusively on TI's microcontroller products. The software is owned by + * TI and/or its suppliers, and is protected under applicable copyright + * laws. You may not combine this software with "viral" open-source + * software in order to form a larger program. + * + * THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. + * NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT + * NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY + * CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL + * DAMAGES, FOR ANY REASON WHATSOEVER. + * + * This is part of revision 9453 of the EK-LM4F120XL Firmware Package. + * + *****************************************************************************/ + +MEMORY +{ + FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x00040000 + SRAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00008000 +} + +SECTIONS +{ + .text : + { + _text = .; + KEEP(*(.isr_vector)) + *(.text*) + *(.rodata*) + _etext = .; + } > FLASH + + .data : AT(ADDR(.text) + SIZEOF(.text)) + { + _data = .; + *(vtable) + *(.data*) + _edata = .; + } > SRAM + + .bss : + { + _bss = .; + *(.bss*) + *(COMMON) + _ebss = .; + } > SRAM +} diff --git a/boards/ek-lm4f120xl/usb_dev_serial/usb_dev_serial.sct b/boards/ek-lm4f120xl/usb_dev_serial/usb_dev_serial.sct new file mode 100644 index 0000000..a059364 --- /dev/null +++ b/boards/ek-lm4f120xl/usb_dev_serial/usb_dev_serial.sct @@ -0,0 +1,47 @@ +;****************************************************************************** +; +; usb_dev_serial.sct - Linker configuration file for usb_dev_serial. +; +; Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +; Software License Agreement +; +; Texas Instruments (TI) is supplying this software for use solely and +; exclusively on TI's microcontroller products. The software is owned by +; TI and/or its suppliers, and is protected under applicable copyright +; laws. You may not combine this software with "viral" open-source +; software in order to form a larger program. +; +; THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +; NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +; NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +; A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +; CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +; DAMAGES, FOR ANY REASON WHATSOEVER. +; +; This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +; +;****************************************************************************** + +LR_IROM 0x00000000 0x00040000 +{ + ; + ; Specify the Execution Address of the code and the size. + ; + ER_IROM 0x00000000 0x00040000 + { + *.o (RESET, +First) + * (InRoot$$Sections, +RO) + } + + ; + ; Specify the Execution Address of the data area. + ; + RW_IRAM 0x20000000 0x00008000 + { + ; + ; Uncomment the following line in order to use IntRegister(). + ; + ;* (vtable, +First) + * (+RW, +ZI) + } +} diff --git a/boards/ek-lm4f120xl/usb_dev_serial/usb_dev_serial.sgxx b/boards/ek-lm4f120xl/usb_dev_serial/usb_dev_serial.sgxx new file mode 100644 index 0000000..eeaf52f Binary files /dev/null and b/boards/ek-lm4f120xl/usb_dev_serial/usb_dev_serial.sgxx differ diff --git a/boards/ek-lm4f120xl/usb_dev_serial/usb_dev_serial.uvopt b/boards/ek-lm4f120xl/usb_dev_serial/usb_dev_serial.uvopt new file mode 100644 index 0000000..db13fbf --- /dev/null +++ b/boards/ek-lm4f120xl/usb_dev_serial/usb_dev_serial.uvopt @@ -0,0 +1,345 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + + + + 0 + 0 + + + + usb_dev_serial + 0x4 + ARM-ADS + + 8000000 + + 1 + 1 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\rvmdk\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 255 + + + 0 + Data Sheet + DATASHTS\Luminary\LM4F120H5QR.PDF + + + + SARMCM3.DLL + -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 0 + 1 + 0 + 0 + 4 + + + + + + + + + + + BIN\lmidk-agdi.dll + + + + 0 + lmidk-agdi + -O4614 -S3 -FO29 + + + 0 + DLGTARM + + + + 0 + ARMDBGFLAGS + + + + + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + Source + 1 + 0 + 0 + + 1 + 1 + 2 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + .\startup_rvmdk.S + startup_rvmdk.S + + + 1 + 2 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\utils\uartstdio.c + uartstdio.c + + + 1 + 3 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + .\usb_dev_serial.c + usb_dev_serial.c + + + 1 + 4 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + .\usb_serial_structs.c + usb_serial_structs.c + + + 1 + 5 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\utils\ustdlib.c + ustdlib.c + + + + + Libraries + 1 + 0 + 0 + + 2 + 6 + 4 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\driverlib\rvmdk-cm4f\driverlib-cm4f.lib + driverlib-cm4f.lib + + + 2 + 7 + 4 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\usblib\rvmdk-cm4f\usblib-cm4f.lib + usblib-cm4f.lib + + + + + Documentation + 1 + 0 + 0 + + 3 + 8 + 5 + 0 + 1 + 0 + 0 + 1 + 1 + 0 + .\readme.txt + readme.txt + + 44 + 0 + 1 + + -1 + -1 + + + -1 + -1 + + + 0 + 0 + 729 + 300 + + + + + + + 1 + 0 + + 100 + 0 + + + .\readme.txt + 0 + 1 + 1 + + + + + + diff --git a/boards/ek-lm4f120xl/usb_dev_serial/usb_dev_serial.uvproj b/boards/ek-lm4f120xl/usb_dev_serial/usb_dev_serial.uvproj new file mode 100644 index 0000000..ef5bfdc --- /dev/null +++ b/boards/ek-lm4f120xl/usb_dev_serial/usb_dev_serial.uvproj @@ -0,0 +1,444 @@ + + + + 1.1 + +
### uVision Project, (C) Keil Software
+ + + + usb_dev_serial + 0x4 + ARM-ADS + + + LM4F120H5QR + Texas Instruments + IRAM(0x20000000-0x20007FFF) IROM(0-0x3FFFF) CLOCK(8000000) CPUTYPE("Cortex-M4") FPU2 + + "STARTUP\Luminary\Startup.s" ("Luminary Startup Code") + UL2CM3(-O207 -S0 -C0 -FO7 -FD20000000 -FC800 -FN1 -FF0LM4F_256 -FS00 -FL040000) + 5919 + LM4Fxxxx.H + + + + + + + + + + 0 + + + + Luminary\ + Luminary\ + + 0 + 0 + 0 + 0 + 1 + + .\rvmdk\ + usb_dev_serial + 1 + 0 + 0 + 1 + 1 + .\rvmdk\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + + 1 + 0 + fromelf --bin --output .\rvmdk\usb_dev_serial.bin .\rvmdk\usb_dev_serial.axf + + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + + + SARMCM3.DLL + -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + + 1 + 0 + 0 + 0 + 16 + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + + + 1 + 1 + 0 + 1 + 1 + 1 + 0 + 1 + + 0 + 4 + + + + + + + + + + + + + + BIN\lmidk-agdi.dll + + + + + 1 + 0 + 0 + 0 + 1 + 4099 + + BIN\lmidk-agdi.dll + + + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M4" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 2 + 0 + 0 + 8 + 1 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x8000 + + + 1 + 0x0 + 0x40000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x40000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x8000 + + + 0 + 0x0 + 0x0 + + + + + + 0 + 3 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + + + rvmdk PART_LM4F120H5QR TARGET_IS_BLIZZARD_RA2 UART_BUFFERED + + ..;..\..\..; + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x00000000 + 0x20000000 + usb_dev_serial.sct + + + --entry Reset_Handler + + + + + + + + Source + + + startup_rvmdk.S + 2 + .\startup_rvmdk.S + + + uartstdio.c + 1 + ..\..\..\utils\uartstdio.c + + + usb_dev_serial.c + 1 + .\usb_dev_serial.c + + + usb_serial_structs.c + 1 + .\usb_serial_structs.c + + + ustdlib.c + 1 + ..\..\..\utils\ustdlib.c + + + + + Libraries + + + driverlib-cm4f.lib + 4 + ..\..\..\driverlib\rvmdk-cm4f\driverlib-cm4f.lib + + + usblib-cm4f.lib + 4 + ..\..\..\usblib\rvmdk-cm4f\usblib-cm4f.lib + + + + + Documentation + + + readme.txt + 5 + .\readme.txt + + + + + + + + diff --git a/boards/ek-lm4f120xl/usb_dev_serial/usb_dev_serial_ccs.cmd b/boards/ek-lm4f120xl/usb_dev_serial/usb_dev_serial_ccs.cmd new file mode 100644 index 0000000..da519e9 --- /dev/null +++ b/boards/ek-lm4f120xl/usb_dev_serial/usb_dev_serial_ccs.cmd @@ -0,0 +1,70 @@ +/****************************************************************************** + * + * usb_dev_serial_ccs.cmd - CCS linker configuration file for usb_dev_serial. + * + * Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. + * Software License Agreement + * + * Texas Instruments (TI) is supplying this software for use solely and + * exclusively on TI's microcontroller products. The software is owned by + * TI and/or its suppliers, and is protected under applicable copyright + * laws. You may not combine this software with "viral" open-source + * software in order to form a larger program. + * + * THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. + * NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT + * NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY + * CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL + * DAMAGES, FOR ANY REASON WHATSOEVER. + * + * This is part of revision 9453 of the EK-LM4F120XL Firmware Package. + * + *****************************************************************************/ + +--retain=g_pfnVectors + +/* The following command line options are set as part of the CCS project. */ +/* If you are building using the command line, or for some reason want to */ +/* define them here, you can uncomment and modify these lines as needed. */ +/* If you are using CCS for building, it is probably better to make any such */ +/* modifications in your CCS project and leave this file alone. */ +/* */ +/* --heap_size=0 */ +/* --stack_size=256 */ +/* --library=rtsv7M3_T_le_eabi.lib */ + +/* The starting address of the application. Normally the interrupt vectors */ +/* must be located at the beginning of the application. */ +#define APP_BASE 0x00000000 +#define RAM_BASE 0x20000000 + +/* System memory map */ + +MEMORY +{ + /* Application stored in and executes from internal flash */ + FLASH (RX) : origin = APP_BASE, length = 0x00040000 + /* Application uses internal RAM for data */ + SRAM (RWX) : origin = 0x20000000, length = 0x00008000 +} + +/* Section allocation in memory */ + +SECTIONS +{ + .intvecs: > APP_BASE + .text : > FLASH + .const : > FLASH + .cinit : > FLASH + .pinit : > FLASH + .init_array : > FLASH + + .vtable : > RAM_BASE + .data : > SRAM + .bss : > SRAM + .sysmem : > SRAM + .stack : > SRAM +} + +__STACK_TOP = __stack + 1024; diff --git a/boards/ek-lm4f120xl/usb_dev_serial/usb_dev_serial_sourcerygxx.ld b/boards/ek-lm4f120xl/usb_dev_serial/usb_dev_serial_sourcerygxx.ld new file mode 100644 index 0000000..3c1a402 --- /dev/null +++ b/boards/ek-lm4f120xl/usb_dev_serial/usb_dev_serial_sourcerygxx.ld @@ -0,0 +1,43 @@ +/****************************************************************************** + * + * usb_dev_serial_sourcerygxx.ld - Scatter file for Sourcery CodeBench + * + * Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. + * Software License Agreement + * + * Texas Instruments (TI) is supplying this software for use solely and + * exclusively on TI's microcontroller products. The software is owned by + * TI and/or its suppliers, and is protected under applicable copyright + * laws. You may not combine this software with "viral" open-source + * software in order to form a larger program. + * + * THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. + * NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT + * NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY + * CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL + * DAMAGES, FOR ANY REASON WHATSOEVER. + * + * This is part of revision 9453 of the EK-LM4F120XL Firmware Package. + * + *****************************************************************************/ + +/****************************************************************************** + * + * Define the end of the heap space, which determines the beginning of the + * stack space. + * + *****************************************************************************/ +__cs3_heap_end = __cs3_region_end_ram - 1024; + +/****************************************************************************** + * + * Define the interrupt handlers used by the application. + * + *****************************************************************************/ +EXTERN(SysTickIntHandler) +__cs3_isr_systick = SysTickIntHandler; +EXTERN(USBUARTIntHandler) +__cs3_isr_uart0 = USBUARTIntHandler; +EXTERN(USB0DeviceIntHandler) +__cs3_isr_usb0 = USB0DeviceIntHandler; diff --git a/boards/ek-lm4f120xl/usb_dev_serial/usb_serial_structs.c b/boards/ek-lm4f120xl/usb_dev_serial/usb_serial_structs.c new file mode 100644 index 0000000..b5ea11b --- /dev/null +++ b/boards/ek-lm4f120xl/usb_dev_serial/usb_serial_structs.c @@ -0,0 +1,216 @@ +//***************************************************************************** +// +// usb_serial_structs.c - Data structures defining this CDC USB device. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +#include "inc/hw_types.h" +#include "driverlib/usb.h" +#include "usblib/usblib.h" +#include "usblib/usbcdc.h" +#include "usblib/usb-ids.h" +#include "usblib/device/usbdevice.h" +#include "usblib/device/usbdcdc.h" +#include "usb_serial_structs.h" + +//***************************************************************************** +// +// The languages supported by this device. +// +//***************************************************************************** +const unsigned char g_pLangDescriptor[] = +{ + 4, + USB_DTYPE_STRING, + USBShort(USB_LANG_EN_US) +}; + +//***************************************************************************** +// +// The manufacturer string. +// +//***************************************************************************** +const unsigned char g_pManufacturerString[] = +{ + (17 + 1) * 2, + USB_DTYPE_STRING, + 'T', 0, 'e', 0, 'x', 0, 'a', 0, 's', 0, ' ', 0, 'I', 0, 'n', 0, 's', 0, + 't', 0, 'r', 0, 'u', 0, 'm', 0, 'e', 0, 'n', 0, 't', 0, 's', 0, +}; + +//***************************************************************************** +// +// The product string. +// +//***************************************************************************** +const unsigned char g_pProductString[] = +{ + 2 + (16 * 2), + USB_DTYPE_STRING, + 'V', 0, 'i', 0, 'r', 0, 't', 0, 'u', 0, 'a', 0, 'l', 0, ' ', 0, + 'C', 0, 'O', 0, 'M', 0, ' ', 0, 'P', 0, 'o', 0, 'r', 0, 't', 0 +}; + +//***************************************************************************** +// +// The serial number string. +// +//***************************************************************************** +const unsigned char g_pSerialNumberString[] = +{ + 2 + (8 * 2), + USB_DTYPE_STRING, + '1', 0, '2', 0, '3', 0, '4', 0, '5', 0, '6', 0, '7', 0, '8', 0 +}; + +//***************************************************************************** +// +// The control interface description string. +// +//***************************************************************************** +const unsigned char g_pControlInterfaceString[] = +{ + 2 + (21 * 2), + USB_DTYPE_STRING, + 'A', 0, 'C', 0, 'M', 0, ' ', 0, 'C', 0, 'o', 0, 'n', 0, 't', 0, + 'r', 0, 'o', 0, 'l', 0, ' ', 0, 'I', 0, 'n', 0, 't', 0, 'e', 0, + 'r', 0, 'f', 0, 'a', 0, 'c', 0, 'e', 0 +}; + +//***************************************************************************** +// +// The configuration description string. +// +//***************************************************************************** +const unsigned char g_pConfigString[] = +{ + 2 + (26 * 2), + USB_DTYPE_STRING, + 'S', 0, 'e', 0, 'l', 0, 'f', 0, ' ', 0, 'P', 0, 'o', 0, 'w', 0, + 'e', 0, 'r', 0, 'e', 0, 'd', 0, ' ', 0, 'C', 0, 'o', 0, 'n', 0, + 'f', 0, 'i', 0, 'g', 0, 'u', 0, 'r', 0, 'a', 0, 't', 0, 'i', 0, + 'o', 0, 'n', 0 +}; + +//***************************************************************************** +// +// The descriptor string table. +// +//***************************************************************************** +const unsigned char * const g_pStringDescriptors[] = +{ + g_pLangDescriptor, + g_pManufacturerString, + g_pProductString, + g_pSerialNumberString, + g_pControlInterfaceString, + g_pConfigString +}; + +#define NUM_STRING_DESCRIPTORS (sizeof(g_pStringDescriptors) / \ + sizeof(unsigned char *)) + +//***************************************************************************** +// +// CDC device callback function prototypes. +// +//***************************************************************************** +unsigned long RxHandler(void *pvCBData, unsigned long ulEvent, + unsigned long ulMsgValue, void *pvMsgData); +unsigned long TxHandler(void *pvCBData, unsigned long ulEvent, + unsigned long ulMsgValue, void *pvMsgData); +unsigned long ControlHandler(void *pvCBData, unsigned long ulEvent, + unsigned long ulMsgValue, void *pvMsgData); + +//***************************************************************************** +// +// The CDC device initialization and customization structures. In this case, +// we are using USBBuffers between the CDC device class driver and the +// application code. The function pointers and callback data values are set +// to insert a buffer in each of the data channels, transmit and receive. +// +// With the buffer in place, the CDC channel callback is set to the relevant +// channel function and the callback data is set to point to the channel +// instance data. The buffer, in turn, has its callback set to the application +// function and the callback data set to our CDC instance structure. +// +//***************************************************************************** +tCDCSerInstance g_sCDCInstance; + +extern const tUSBBuffer g_sTxBuffer; +extern const tUSBBuffer g_sRxBuffer; + +const tUSBDCDCDevice g_sCDCDevice = +{ + USB_VID_STELLARIS, + USB_PID_SERIAL, + 0, + USB_CONF_ATTR_SELF_PWR, + ControlHandler, + (void *)&g_sCDCDevice, + USBBufferEventCallback, + (void *)&g_sRxBuffer, + USBBufferEventCallback, + (void *)&g_sTxBuffer, + g_pStringDescriptors, + NUM_STRING_DESCRIPTORS, + &g_sCDCInstance +}; + +//***************************************************************************** +// +// Receive buffer (from the USB perspective). +// +//***************************************************************************** +unsigned char g_pcUSBRxBuffer[UART_BUFFER_SIZE]; +unsigned char g_pucRxBufferWorkspace[USB_BUFFER_WORKSPACE_SIZE]; +const tUSBBuffer g_sRxBuffer = +{ + false, // This is a receive buffer. + RxHandler, // pfnCallback + (void *)&g_sCDCDevice, // Callback data is our device pointer. + USBDCDCPacketRead, // pfnTransfer + USBDCDCRxPacketAvailable, // pfnAvailable + (void *)&g_sCDCDevice, // pvHandle + g_pcUSBRxBuffer, // pcBuffer + UART_BUFFER_SIZE, // ulBufferSize + g_pucRxBufferWorkspace // pvWorkspace +}; + +//***************************************************************************** +// +// Transmit buffer (from the USB perspective). +// +//***************************************************************************** +unsigned char g_pcUSBTxBuffer[UART_BUFFER_SIZE]; +unsigned char g_pucTxBufferWorkspace[USB_BUFFER_WORKSPACE_SIZE]; +const tUSBBuffer g_sTxBuffer = +{ + true, // This is a transmit buffer. + TxHandler, // pfnCallback + (void *)&g_sCDCDevice, // Callback data is our device pointer. + USBDCDCPacketWrite, // pfnTransfer + USBDCDCTxPacketAvailable, // pfnAvailable + (void *)&g_sCDCDevice, // pvHandle + g_pcUSBTxBuffer, // pcBuffer + UART_BUFFER_SIZE, // ulBufferSize + g_pucTxBufferWorkspace // pvWorkspace +}; diff --git a/boards/ek-lm4f120xl/usb_dev_serial/usb_serial_structs.h b/boards/ek-lm4f120xl/usb_dev_serial/usb_serial_structs.h new file mode 100644 index 0000000..1d24c6c --- /dev/null +++ b/boards/ek-lm4f120xl/usb_dev_serial/usb_serial_structs.h @@ -0,0 +1,49 @@ +//***************************************************************************** +// +// usb_serial_structs.h - Data structures defining this USB CDC device. +// +// Copyright (c) 2012 Texas Instruments Incorporated. All rights reserved. +// Software License Agreement +// +// Texas Instruments (TI) is supplying this software for use solely and +// exclusively on TI's microcontroller products. The software is owned by +// TI and/or its suppliers, and is protected under applicable copyright +// laws. You may not combine this software with "viral" open-source +// software in order to form a larger program. +// +// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS. +// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT +// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY +// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL +// DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 9453 of the EK-LM4F120XL Firmware Package. +// +//***************************************************************************** + +#ifndef _USB_SERIAL_STRUCTS_H_ +#define _USB_SERIAL_STRUCTS_H_ + +//***************************************************************************** +// +// The size of the transmit and receive buffers used for the redirected UART. +// This number should be a power of 2 for best performance. 256 is chosen +// pretty much at random though the buffer should be at least twice the size of +// a maxmum-sized USB packet. +// +//***************************************************************************** +#define UART_BUFFER_SIZE 256 + +extern unsigned long RxHandler(void *pvCBData, unsigned long ulEvent, + unsigned long ulMsgValue, void *pvMsgData); +extern unsigned long TxHandler(void *pvlCBData, unsigned long ulEvent, + unsigned long ulMsgValue, void *pvMsgData); + +extern const tUSBBuffer g_sTxBuffer; +extern const tUSBBuffer g_sRxBuffer; +extern const tUSBDCDCDevice g_sCDCDevice; +extern unsigned char g_pucUSBTxBuffer[]; +extern unsigned char g_pucUSBRxBuffer[]; + +#endif -- cgit v1.3.1