From 23dd9ed9eede40d033c22645fdc3eec310901b9b Mon Sep 17 00:00:00 2001 From: Yuval Adam <_@yuv.al> Date: Sun, 18 Apr 2021 09:39:07 +0300 Subject: Implement set_sample_rate() --- src/lib.rs | 4 ++++ src/usb.rs | 15 ++++++++++++++- 2 files changed, 18 insertions(+), 1 deletion(-) (limited to 'src') diff --git a/src/lib.rs b/src/lib.rs index 57cac56..1a5e6b2 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -115,6 +115,10 @@ impl RtlSdr { } None } + + pub fn set_sample_rate(&self, samp_rate: u32) { + self.handle.set_sample_rate(samp_rate); + } } #[cfg(test)] diff --git a/src/usb.rs b/src/usb.rs index d32956b..a83c853 100644 --- a/src/usb.rs +++ b/src/usb.rs @@ -251,7 +251,6 @@ impl RtlSdrDeviceHandle { } pub fn set_sample_rate(&self, samp_rate: u32) { - let _tmp: u16; let real_rsamp_ratio: u32; // check if the rate is supported by the resampler @@ -270,9 +269,23 @@ impl RtlSdrDeviceHandle { info!("Exact sample rate is: {} Hz", real_rate); self.set_i2c_repeater(true); + self.tuner.set_bw(self.handle); self.set_i2c_repeater(false); + + let mut tmp: u16 = rsamp_ratio >> 16; + self.handle.demod_write_reg(1, 0x9f, tmp, 2); + tmp = rsamp_ratio & 0xffff; + self.handle.demod_write_reg(1, 0xa1, tmp, 2); + // self.set_sample_freq_corr(); + + // reset demod (bit 3, soft_rst) + self.handle.demod_write_reg(1, 0x01, 0x14, 1); + self.handle.demod_write_reg(1, 0x01, 0x10, 1); + + // self.set_offset_tuning(); } + pub fn reset_buffer(&self) { self.write_reg(BLOCK_USBB, ADDR_USB_EPA_CTL, 0x1002, 2); self.write_reg(BLOCK_USBB, ADDR_USB_EPA_CTL, 0x0000, 2); -- cgit v1.3.1