From a792fa11bea0bde00aa9aaf0aa6c2640bdb633a3 Mon Sep 17 00:00:00 2001 From: Yuval Adam <_@yuv.al> Date: Fri, 3 Aug 2018 16:19:11 +0300 Subject: Implement r820t init --- src/usb.rs | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) (limited to 'src/usb.rs') diff --git a/src/usb.rs b/src/usb.rs index fdae356..035786e 100644 --- a/src/usb.rs +++ b/src/usb.rs @@ -28,6 +28,9 @@ const FIR_DEFAULT: [u8; FIR_LENGTH] = [ 0x9c, 0x0d, 0x71, 0x11, 0x14, 0x71, 0x74, 0x19, 0x41, 0xa5, ]; +const DEF_RTL_XTAL_FREQ: u32 = 28800000; +const MIN_RTL_XTAL_FREQ: u32 = DEF_RTL_XTAL_FREQ - 1000; +const MAX_RTL_XTAL_FREQ: u32 = DEF_RTL_XTAL_FREQ + 1000; const CTRL_TIMEOUT: Duration = Duration::from_millis(300); @@ -181,6 +184,19 @@ impl<'a> Usb<'a> { self.demod_write_reg(0, 0x0d, 0x83, 1); } + pub fn set_if_freq(&self, freq: u32) { + let rtl_xtal: u32 = DEF_RTL_XTAL_FREQ; // need to apply PPM correction + let base = 1u32 << 22; + let if_freq: i32 = (freq as f64 * base as f64 / rtl_xtal as f64 * -1f64) as i32; + + let tmp = ((if_freq >> 16) as u16) & 0x3f; + self.demod_write_reg(1, 0x19, tmp, 1); + let tmp = ((if_freq >> 8) as u16) & 0xff; + self.demod_write_reg(1, 0x1a, tmp, 1); + let tmp = if_freq as u16 & 0xff; + self.demod_write_reg(1, 0x1b, tmp, 1); + } + pub fn deinit_baseband(&self) { // deinit tuner? -- cgit v1.3.1