From 54b4607c46094de0333f474af492981adf39a6cd Mon Sep 17 00:00:00 2001 From: Yuval Adam <_@yuv.al> Date: Wed, 28 Apr 2021 17:21:11 +0300 Subject: Fix set_if_freq() handling in init --- src/lib.rs | 14 +++----------- src/usb.rs | 14 ++++++++++++++ src/utils/rustl_test.rs | 2 +- 3 files changed, 18 insertions(+), 12 deletions(-) diff --git a/src/lib.rs b/src/lib.rs index ca9d634..557268a 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -111,7 +111,7 @@ impl RtlSdr { pub fn set_freq(&self) {} - pub fn set_sample_rate(self, samp_rate: u32) { + pub fn set_sample_rate(&mut self, samp_rate: u32) { let real_rsamp_ratio: u32; // check if the rate is supported by the resampler @@ -131,6 +131,7 @@ impl RtlSdr { self.handle.set_i2c_repeater(true); self.tuner + .as_mut() .unwrap() .set_bandwidth(real_rate as u32, &self.handle); self.handle.set_i2c_repeater(false); @@ -149,16 +150,7 @@ impl RtlSdr { } pub fn set_if_freq(&self, freq: u32) { - let rtl_xtal: u32 = DEF_RTL_XTAL_FREQ; // need to apply PPM correction - let base = 1u32 << 22; - let if_freq: i32 = (freq as f64 * base as f64 / rtl_xtal as f64 * -1f64) as i32; - - let tmp = ((if_freq >> 16) as u16) & 0x3f; - self.handle.demod_write_reg(1, 0x19, tmp, 1); - let tmp = ((if_freq >> 8) as u16) & 0xff; - self.handle.demod_write_reg(1, 0x1a, tmp, 1); - let tmp = if_freq as u16 & 0xff; - self.handle.demod_write_reg(1, 0x1b, tmp, 1); + self.handle.set_if_freq(freq); } pub fn set_test_mode(&self, on: bool) { diff --git a/src/usb.rs b/src/usb.rs index 3499692..d3f4d28 100644 --- a/src/usb.rs +++ b/src/usb.rs @@ -245,6 +245,20 @@ impl RtlSdrDeviceHandle { self.demod_write_reg(0, 0x0d, 0x83, 1); } + pub fn set_if_freq(&self, freq: u32) { + const DEF_RTL_XTAL_FREQ: u32 = 28800000; + let rtl_xtal: u32 = DEF_RTL_XTAL_FREQ; // need to apply PPM correction + let base = 1u32 << 22; + let if_freq: i32 = (freq as f64 * base as f64 / rtl_xtal as f64 * -1f64) as i32; + + let tmp = ((if_freq >> 16) as u16) & 0x3f; + self.demod_write_reg(1, 0x19, tmp, 1); + let tmp = ((if_freq >> 8) as u16) & 0xff; + self.demod_write_reg(1, 0x1a, tmp, 1); + let tmp = if_freq as u16 & 0xff; + self.demod_write_reg(1, 0x1b, tmp, 1); + } + pub fn reset_buffer(&self) { self.write_reg(BLOCK_USBB, ADDR_USB_EPA_CTL, 0x1002, 2); self.write_reg(BLOCK_USBB, ADDR_USB_EPA_CTL, 0x0000, 2); diff --git a/src/utils/rustl_test.rs b/src/utils/rustl_test.rs index b71f094..b923a54 100644 --- a/src/utils/rustl_test.rs +++ b/src/utils/rustl_test.rs @@ -3,7 +3,7 @@ const DEFAULT_BUF_LENGTH: usize = 16 * 16384; pub fn main() { println!("Starting rustl_test"); - let r = rustl_sdr::RtlSdr::new(); + let mut r = rustl_sdr::RtlSdr::new(); r.set_sample_rate(DEFAULT_SAMPLE_RATE); r.set_test_mode(true); r.reset_buffer(); -- cgit v1.3.1